1 /* Intel(R) Gigabit Ethernet Linux driver
2 * Copyright(c) 2007-2014 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, see <http://www.gnu.org/licenses/>.
16 * The full GNU General Public License is included in this distribution in
17 * the file called "COPYING".
19 * Contact Information:
20 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
21 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/init.h>
29 #include <linux/bitops.h>
30 #include <linux/vmalloc.h>
31 #include <linux/pagemap.h>
32 #include <linux/netdevice.h>
33 #include <linux/ipv6.h>
34 #include <linux/slab.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
42 #include <linux/pci.h>
43 #include <linux/pci-aspm.h>
44 #include <linux/delay.h>
45 #include <linux/interrupt.h>
47 #include <linux/tcp.h>
48 #include <linux/sctp.h>
49 #include <linux/if_ether.h>
50 #include <linux/aer.h>
51 #include <linux/prefetch.h>
52 #include <linux/pm_runtime.h>
53 #include <linux/etherdevice.h>
55 #include <linux/dca.h>
57 #include <linux/i2c.h>
63 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
64 __stringify(BUILD) "-k"
65 char igb_driver_name
[] = "igb";
66 char igb_driver_version
[] = DRV_VERSION
;
67 static const char igb_driver_string
[] =
68 "Intel(R) Gigabit Ethernet Network Driver";
69 static const char igb_copyright
[] =
70 "Copyright (c) 2007-2014 Intel Corporation.";
72 static const struct e1000_info
*igb_info_tbl
[] = {
73 [board_82575
] = &e1000_82575_info
,
76 static const struct pci_device_id igb_pci_tbl
[] = {
77 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_1GBPS
) },
78 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_SGMII
) },
79 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS
) },
80 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I211_COPPER
), board_82575
},
81 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER
), board_82575
},
82 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_FIBER
), board_82575
},
83 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES
), board_82575
},
84 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SGMII
), board_82575
},
85 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER_FLASHLESS
), board_82575
},
86 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES_FLASHLESS
), board_82575
},
87 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_COPPER
), board_82575
},
88 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_FIBER
), board_82575
},
89 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SERDES
), board_82575
},
90 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SGMII
), board_82575
},
91 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER
), board_82575
},
92 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_FIBER
), board_82575
},
93 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_QUAD_FIBER
), board_82575
},
94 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SERDES
), board_82575
},
95 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SGMII
), board_82575
},
96 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER_DUAL
), board_82575
},
97 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SGMII
), board_82575
},
98 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SERDES
), board_82575
},
99 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_BACKPLANE
), board_82575
},
100 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SFP
), board_82575
},
101 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
102 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS
), board_82575
},
103 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS_SERDES
), board_82575
},
104 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
105 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
106 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES_QUAD
), board_82575
},
107 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER_ET2
), board_82575
},
108 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER
), board_82575
},
109 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
110 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
111 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
112 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_SGMII
), board_82575
},
113 /* required last entry */
117 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
119 static int igb_setup_all_tx_resources(struct igb_adapter
*);
120 static int igb_setup_all_rx_resources(struct igb_adapter
*);
121 static void igb_free_all_tx_resources(struct igb_adapter
*);
122 static void igb_free_all_rx_resources(struct igb_adapter
*);
123 static void igb_setup_mrqc(struct igb_adapter
*);
124 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
125 static void igb_remove(struct pci_dev
*pdev
);
126 static int igb_sw_init(struct igb_adapter
*);
127 int igb_open(struct net_device
*);
128 int igb_close(struct net_device
*);
129 static void igb_configure(struct igb_adapter
*);
130 static void igb_configure_tx(struct igb_adapter
*);
131 static void igb_configure_rx(struct igb_adapter
*);
132 static void igb_clean_all_tx_rings(struct igb_adapter
*);
133 static void igb_clean_all_rx_rings(struct igb_adapter
*);
134 static void igb_clean_tx_ring(struct igb_ring
*);
135 static void igb_clean_rx_ring(struct igb_ring
*);
136 static void igb_set_rx_mode(struct net_device
*);
137 static void igb_update_phy_info(unsigned long);
138 static void igb_watchdog(unsigned long);
139 static void igb_watchdog_task(struct work_struct
*);
140 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
, struct net_device
*);
141 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*dev
,
142 struct rtnl_link_stats64
*stats
);
143 static int igb_change_mtu(struct net_device
*, int);
144 static int igb_set_mac(struct net_device
*, void *);
145 static void igb_set_uta(struct igb_adapter
*adapter
, bool set
);
146 static irqreturn_t
igb_intr(int irq
, void *);
147 static irqreturn_t
igb_intr_msi(int irq
, void *);
148 static irqreturn_t
igb_msix_other(int irq
, void *);
149 static irqreturn_t
igb_msix_ring(int irq
, void *);
150 #ifdef CONFIG_IGB_DCA
151 static void igb_update_dca(struct igb_q_vector
*);
152 static void igb_setup_dca(struct igb_adapter
*);
153 #endif /* CONFIG_IGB_DCA */
154 static int igb_poll(struct napi_struct
*, int);
155 static bool igb_clean_tx_irq(struct igb_q_vector
*, int);
156 static int igb_clean_rx_irq(struct igb_q_vector
*, int);
157 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
158 static void igb_tx_timeout(struct net_device
*);
159 static void igb_reset_task(struct work_struct
*);
160 static void igb_vlan_mode(struct net_device
*netdev
,
161 netdev_features_t features
);
162 static int igb_vlan_rx_add_vid(struct net_device
*, __be16
, u16
);
163 static int igb_vlan_rx_kill_vid(struct net_device
*, __be16
, u16
);
164 static void igb_restore_vlan(struct igb_adapter
*);
165 static void igb_rar_set_qsel(struct igb_adapter
*, u8
*, u32
, u8
);
166 static void igb_ping_all_vfs(struct igb_adapter
*);
167 static void igb_msg_task(struct igb_adapter
*);
168 static void igb_vmm_control(struct igb_adapter
*);
169 static int igb_set_vf_mac(struct igb_adapter
*, int, unsigned char *);
170 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
171 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
);
172 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
173 int vf
, u16 vlan
, u8 qos
, __be16 vlan_proto
);
174 static int igb_ndo_set_vf_bw(struct net_device
*, int, int, int);
175 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
177 static int igb_ndo_get_vf_config(struct net_device
*netdev
, int vf
,
178 struct ifla_vf_info
*ivi
);
179 static void igb_check_vf_rate_limit(struct igb_adapter
*);
180 static void igb_nfc_filter_exit(struct igb_adapter
*adapter
);
181 static void igb_nfc_filter_restore(struct igb_adapter
*adapter
);
183 #ifdef CONFIG_PCI_IOV
184 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
);
185 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
);
186 static int igb_disable_sriov(struct pci_dev
*dev
);
187 static int igb_pci_disable_sriov(struct pci_dev
*dev
);
191 #ifdef CONFIG_PM_SLEEP
192 static int igb_suspend(struct device
*);
194 static int igb_resume(struct device
*);
195 static int igb_runtime_suspend(struct device
*dev
);
196 static int igb_runtime_resume(struct device
*dev
);
197 static int igb_runtime_idle(struct device
*dev
);
198 static const struct dev_pm_ops igb_pm_ops
= {
199 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend
, igb_resume
)
200 SET_RUNTIME_PM_OPS(igb_runtime_suspend
, igb_runtime_resume
,
204 static void igb_shutdown(struct pci_dev
*);
205 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
);
206 #ifdef CONFIG_IGB_DCA
207 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
208 static struct notifier_block dca_notifier
= {
209 .notifier_call
= igb_notify_dca
,
214 #ifdef CONFIG_NET_POLL_CONTROLLER
215 /* for netdump / net console */
216 static void igb_netpoll(struct net_device
*);
218 #ifdef CONFIG_PCI_IOV
219 static unsigned int max_vfs
;
220 module_param(max_vfs
, uint
, 0);
221 MODULE_PARM_DESC(max_vfs
, "Maximum number of virtual functions to allocate per physical function");
222 #endif /* CONFIG_PCI_IOV */
224 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
225 pci_channel_state_t
);
226 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
227 static void igb_io_resume(struct pci_dev
*);
229 static const struct pci_error_handlers igb_err_handler
= {
230 .error_detected
= igb_io_error_detected
,
231 .slot_reset
= igb_io_slot_reset
,
232 .resume
= igb_io_resume
,
235 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
);
237 static struct pci_driver igb_driver
= {
238 .name
= igb_driver_name
,
239 .id_table
= igb_pci_tbl
,
241 .remove
= igb_remove
,
243 .driver
.pm
= &igb_pm_ops
,
245 .shutdown
= igb_shutdown
,
246 .sriov_configure
= igb_pci_sriov_configure
,
247 .err_handler
= &igb_err_handler
250 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
251 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
252 MODULE_LICENSE("GPL");
253 MODULE_VERSION(DRV_VERSION
);
255 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
256 static int debug
= -1;
257 module_param(debug
, int, 0);
258 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
260 struct igb_reg_info
{
265 static const struct igb_reg_info igb_reg_info_tbl
[] = {
267 /* General Registers */
268 {E1000_CTRL
, "CTRL"},
269 {E1000_STATUS
, "STATUS"},
270 {E1000_CTRL_EXT
, "CTRL_EXT"},
272 /* Interrupt Registers */
276 {E1000_RCTL
, "RCTL"},
277 {E1000_RDLEN(0), "RDLEN"},
278 {E1000_RDH(0), "RDH"},
279 {E1000_RDT(0), "RDT"},
280 {E1000_RXDCTL(0), "RXDCTL"},
281 {E1000_RDBAL(0), "RDBAL"},
282 {E1000_RDBAH(0), "RDBAH"},
285 {E1000_TCTL
, "TCTL"},
286 {E1000_TDBAL(0), "TDBAL"},
287 {E1000_TDBAH(0), "TDBAH"},
288 {E1000_TDLEN(0), "TDLEN"},
289 {E1000_TDH(0), "TDH"},
290 {E1000_TDT(0), "TDT"},
291 {E1000_TXDCTL(0), "TXDCTL"},
292 {E1000_TDFH
, "TDFH"},
293 {E1000_TDFT
, "TDFT"},
294 {E1000_TDFHS
, "TDFHS"},
295 {E1000_TDFPC
, "TDFPC"},
297 /* List Terminator */
301 /* igb_regdump - register printout routine */
302 static void igb_regdump(struct e1000_hw
*hw
, struct igb_reg_info
*reginfo
)
308 switch (reginfo
->ofs
) {
310 for (n
= 0; n
< 4; n
++)
311 regs
[n
] = rd32(E1000_RDLEN(n
));
314 for (n
= 0; n
< 4; n
++)
315 regs
[n
] = rd32(E1000_RDH(n
));
318 for (n
= 0; n
< 4; n
++)
319 regs
[n
] = rd32(E1000_RDT(n
));
321 case E1000_RXDCTL(0):
322 for (n
= 0; n
< 4; n
++)
323 regs
[n
] = rd32(E1000_RXDCTL(n
));
326 for (n
= 0; n
< 4; n
++)
327 regs
[n
] = rd32(E1000_RDBAL(n
));
330 for (n
= 0; n
< 4; n
++)
331 regs
[n
] = rd32(E1000_RDBAH(n
));
334 for (n
= 0; n
< 4; n
++)
335 regs
[n
] = rd32(E1000_RDBAL(n
));
338 for (n
= 0; n
< 4; n
++)
339 regs
[n
] = rd32(E1000_TDBAH(n
));
342 for (n
= 0; n
< 4; n
++)
343 regs
[n
] = rd32(E1000_TDLEN(n
));
346 for (n
= 0; n
< 4; n
++)
347 regs
[n
] = rd32(E1000_TDH(n
));
350 for (n
= 0; n
< 4; n
++)
351 regs
[n
] = rd32(E1000_TDT(n
));
353 case E1000_TXDCTL(0):
354 for (n
= 0; n
< 4; n
++)
355 regs
[n
] = rd32(E1000_TXDCTL(n
));
358 pr_info("%-15s %08x\n", reginfo
->name
, rd32(reginfo
->ofs
));
362 snprintf(rname
, 16, "%s%s", reginfo
->name
, "[0-3]");
363 pr_info("%-15s %08x %08x %08x %08x\n", rname
, regs
[0], regs
[1],
367 /* igb_dump - Print registers, Tx-rings and Rx-rings */
368 static void igb_dump(struct igb_adapter
*adapter
)
370 struct net_device
*netdev
= adapter
->netdev
;
371 struct e1000_hw
*hw
= &adapter
->hw
;
372 struct igb_reg_info
*reginfo
;
373 struct igb_ring
*tx_ring
;
374 union e1000_adv_tx_desc
*tx_desc
;
375 struct my_u0
{ u64 a
; u64 b
; } *u0
;
376 struct igb_ring
*rx_ring
;
377 union e1000_adv_rx_desc
*rx_desc
;
381 if (!netif_msg_hw(adapter
))
384 /* Print netdevice Info */
386 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
387 pr_info("Device Name state trans_start last_rx\n");
388 pr_info("%-15s %016lX %016lX %016lX\n", netdev
->name
,
389 netdev
->state
, dev_trans_start(netdev
), netdev
->last_rx
);
392 /* Print Registers */
393 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
394 pr_info(" Register Name Value\n");
395 for (reginfo
= (struct igb_reg_info
*)igb_reg_info_tbl
;
396 reginfo
->name
; reginfo
++) {
397 igb_regdump(hw
, reginfo
);
400 /* Print TX Ring Summary */
401 if (!netdev
|| !netif_running(netdev
))
404 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
405 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
406 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
407 struct igb_tx_buffer
*buffer_info
;
408 tx_ring
= adapter
->tx_ring
[n
];
409 buffer_info
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
410 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
411 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
412 (u64
)dma_unmap_addr(buffer_info
, dma
),
413 dma_unmap_len(buffer_info
, len
),
414 buffer_info
->next_to_watch
,
415 (u64
)buffer_info
->time_stamp
);
419 if (!netif_msg_tx_done(adapter
))
420 goto rx_ring_summary
;
422 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
424 /* Transmit Descriptor Formats
426 * Advanced Transmit Descriptor
427 * +--------------------------------------------------------------+
428 * 0 | Buffer Address [63:0] |
429 * +--------------------------------------------------------------+
430 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
431 * +--------------------------------------------------------------+
432 * 63 46 45 40 39 38 36 35 32 31 24 15 0
435 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
436 tx_ring
= adapter
->tx_ring
[n
];
437 pr_info("------------------------------------\n");
438 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
439 pr_info("------------------------------------\n");
440 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] [bi->dma ] leng ntw timestamp bi->skb\n");
442 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
443 const char *next_desc
;
444 struct igb_tx_buffer
*buffer_info
;
445 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
446 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
447 u0
= (struct my_u0
*)tx_desc
;
448 if (i
== tx_ring
->next_to_use
&&
449 i
== tx_ring
->next_to_clean
)
450 next_desc
= " NTC/U";
451 else if (i
== tx_ring
->next_to_use
)
453 else if (i
== tx_ring
->next_to_clean
)
458 pr_info("T [0x%03X] %016llX %016llX %016llX %04X %p %016llX %p%s\n",
459 i
, le64_to_cpu(u0
->a
),
461 (u64
)dma_unmap_addr(buffer_info
, dma
),
462 dma_unmap_len(buffer_info
, len
),
463 buffer_info
->next_to_watch
,
464 (u64
)buffer_info
->time_stamp
,
465 buffer_info
->skb
, next_desc
);
467 if (netif_msg_pktdata(adapter
) && buffer_info
->skb
)
468 print_hex_dump(KERN_INFO
, "",
470 16, 1, buffer_info
->skb
->data
,
471 dma_unmap_len(buffer_info
, len
),
476 /* Print RX Rings Summary */
478 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
479 pr_info("Queue [NTU] [NTC]\n");
480 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
481 rx_ring
= adapter
->rx_ring
[n
];
482 pr_info(" %5d %5X %5X\n",
483 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
487 if (!netif_msg_rx_status(adapter
))
490 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
492 /* Advanced Receive Descriptor (Read) Format
494 * +-----------------------------------------------------+
495 * 0 | Packet Buffer Address [63:1] |A0/NSE|
496 * +----------------------------------------------+------+
497 * 8 | Header Buffer Address [63:1] | DD |
498 * +-----------------------------------------------------+
501 * Advanced Receive Descriptor (Write-Back) Format
503 * 63 48 47 32 31 30 21 20 17 16 4 3 0
504 * +------------------------------------------------------+
505 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
506 * | Checksum Ident | | | | Type | Type |
507 * +------------------------------------------------------+
508 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
509 * +------------------------------------------------------+
510 * 63 48 47 32 31 20 19 0
513 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
514 rx_ring
= adapter
->rx_ring
[n
];
515 pr_info("------------------------------------\n");
516 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
517 pr_info("------------------------------------\n");
518 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] [bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
519 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
521 for (i
= 0; i
< rx_ring
->count
; i
++) {
522 const char *next_desc
;
523 struct igb_rx_buffer
*buffer_info
;
524 buffer_info
= &rx_ring
->rx_buffer_info
[i
];
525 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
526 u0
= (struct my_u0
*)rx_desc
;
527 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
529 if (i
== rx_ring
->next_to_use
)
531 else if (i
== rx_ring
->next_to_clean
)
536 if (staterr
& E1000_RXD_STAT_DD
) {
537 /* Descriptor Done */
538 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
544 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
548 (u64
)buffer_info
->dma
,
551 if (netif_msg_pktdata(adapter
) &&
552 buffer_info
->dma
&& buffer_info
->page
) {
553 print_hex_dump(KERN_INFO
, "",
556 page_address(buffer_info
->page
) +
557 buffer_info
->page_offset
,
569 * igb_get_i2c_data - Reads the I2C SDA data bit
570 * @hw: pointer to hardware structure
571 * @i2cctl: Current value of I2CCTL register
573 * Returns the I2C data bit value
575 static int igb_get_i2c_data(void *data
)
577 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
578 struct e1000_hw
*hw
= &adapter
->hw
;
579 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
581 return !!(i2cctl
& E1000_I2C_DATA_IN
);
585 * igb_set_i2c_data - Sets the I2C data bit
586 * @data: pointer to hardware structure
587 * @state: I2C data value (0 or 1) to set
589 * Sets the I2C data bit
591 static void igb_set_i2c_data(void *data
, int state
)
593 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
594 struct e1000_hw
*hw
= &adapter
->hw
;
595 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
598 i2cctl
|= E1000_I2C_DATA_OUT
;
600 i2cctl
&= ~E1000_I2C_DATA_OUT
;
602 i2cctl
&= ~E1000_I2C_DATA_OE_N
;
603 i2cctl
|= E1000_I2C_CLK_OE_N
;
604 wr32(E1000_I2CPARAMS
, i2cctl
);
610 * igb_set_i2c_clk - Sets the I2C SCL clock
611 * @data: pointer to hardware structure
612 * @state: state to set clock
614 * Sets the I2C clock line to state
616 static void igb_set_i2c_clk(void *data
, int state
)
618 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
619 struct e1000_hw
*hw
= &adapter
->hw
;
620 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
623 i2cctl
|= E1000_I2C_CLK_OUT
;
624 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
626 i2cctl
&= ~E1000_I2C_CLK_OUT
;
627 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
629 wr32(E1000_I2CPARAMS
, i2cctl
);
634 * igb_get_i2c_clk - Gets the I2C SCL clock state
635 * @data: pointer to hardware structure
637 * Gets the I2C clock state
639 static int igb_get_i2c_clk(void *data
)
641 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
642 struct e1000_hw
*hw
= &adapter
->hw
;
643 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
645 return !!(i2cctl
& E1000_I2C_CLK_IN
);
648 static const struct i2c_algo_bit_data igb_i2c_algo
= {
649 .setsda
= igb_set_i2c_data
,
650 .setscl
= igb_set_i2c_clk
,
651 .getsda
= igb_get_i2c_data
,
652 .getscl
= igb_get_i2c_clk
,
658 * igb_get_hw_dev - return device
659 * @hw: pointer to hardware structure
661 * used by hardware layer to print debugging information
663 struct net_device
*igb_get_hw_dev(struct e1000_hw
*hw
)
665 struct igb_adapter
*adapter
= hw
->back
;
666 return adapter
->netdev
;
670 * igb_init_module - Driver Registration Routine
672 * igb_init_module is the first routine called when the driver is
673 * loaded. All it does is register with the PCI subsystem.
675 static int __init
igb_init_module(void)
679 pr_info("%s - version %s\n",
680 igb_driver_string
, igb_driver_version
);
681 pr_info("%s\n", igb_copyright
);
683 #ifdef CONFIG_IGB_DCA
684 dca_register_notify(&dca_notifier
);
686 ret
= pci_register_driver(&igb_driver
);
690 module_init(igb_init_module
);
693 * igb_exit_module - Driver Exit Cleanup Routine
695 * igb_exit_module is called just before the driver is removed
698 static void __exit
igb_exit_module(void)
700 #ifdef CONFIG_IGB_DCA
701 dca_unregister_notify(&dca_notifier
);
703 pci_unregister_driver(&igb_driver
);
706 module_exit(igb_exit_module
);
708 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
710 * igb_cache_ring_register - Descriptor ring to register mapping
711 * @adapter: board private structure to initialize
713 * Once we know the feature-set enabled for the device, we'll cache
714 * the register offset the descriptor ring is assigned to.
716 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
719 u32 rbase_offset
= adapter
->vfs_allocated_count
;
721 switch (adapter
->hw
.mac
.type
) {
723 /* The queues are allocated for virtualization such that VF 0
724 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
725 * In order to avoid collision we start at the first free queue
726 * and continue consuming queues in the same sequence
728 if (adapter
->vfs_allocated_count
) {
729 for (; i
< adapter
->rss_queues
; i
++)
730 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+
742 for (; i
< adapter
->num_rx_queues
; i
++)
743 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+ i
;
744 for (; j
< adapter
->num_tx_queues
; j
++)
745 adapter
->tx_ring
[j
]->reg_idx
= rbase_offset
+ j
;
750 u32
igb_rd32(struct e1000_hw
*hw
, u32 reg
)
752 struct igb_adapter
*igb
= container_of(hw
, struct igb_adapter
, hw
);
753 u8 __iomem
*hw_addr
= ACCESS_ONCE(hw
->hw_addr
);
756 if (E1000_REMOVED(hw_addr
))
759 value
= readl(&hw_addr
[reg
]);
761 /* reads should not return all F's */
762 if (!(~value
) && (!reg
|| !(~readl(hw_addr
)))) {
763 struct net_device
*netdev
= igb
->netdev
;
765 netif_device_detach(netdev
);
766 netdev_err(netdev
, "PCIe link lost, device now detached\n");
773 * igb_write_ivar - configure ivar for given MSI-X vector
774 * @hw: pointer to the HW structure
775 * @msix_vector: vector number we are allocating to a given ring
776 * @index: row index of IVAR register to write within IVAR table
777 * @offset: column offset of in IVAR, should be multiple of 8
779 * This function is intended to handle the writing of the IVAR register
780 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
781 * each containing an cause allocation for an Rx and Tx ring, and a
782 * variable number of rows depending on the number of queues supported.
784 static void igb_write_ivar(struct e1000_hw
*hw
, int msix_vector
,
785 int index
, int offset
)
787 u32 ivar
= array_rd32(E1000_IVAR0
, index
);
789 /* clear any bits that are currently set */
790 ivar
&= ~((u32
)0xFF << offset
);
792 /* write vector and valid bit */
793 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << offset
;
795 array_wr32(E1000_IVAR0
, index
, ivar
);
798 #define IGB_N0_QUEUE -1
799 static void igb_assign_vector(struct igb_q_vector
*q_vector
, int msix_vector
)
801 struct igb_adapter
*adapter
= q_vector
->adapter
;
802 struct e1000_hw
*hw
= &adapter
->hw
;
803 int rx_queue
= IGB_N0_QUEUE
;
804 int tx_queue
= IGB_N0_QUEUE
;
807 if (q_vector
->rx
.ring
)
808 rx_queue
= q_vector
->rx
.ring
->reg_idx
;
809 if (q_vector
->tx
.ring
)
810 tx_queue
= q_vector
->tx
.ring
->reg_idx
;
812 switch (hw
->mac
.type
) {
814 /* The 82575 assigns vectors using a bitmask, which matches the
815 * bitmask for the EICR/EIMS/EIMC registers. To assign one
816 * or more queues to a vector, we write the appropriate bits
817 * into the MSIXBM register for that vector.
819 if (rx_queue
> IGB_N0_QUEUE
)
820 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
821 if (tx_queue
> IGB_N0_QUEUE
)
822 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
823 if (!(adapter
->flags
& IGB_FLAG_HAS_MSIX
) && msix_vector
== 0)
824 msixbm
|= E1000_EIMS_OTHER
;
825 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
826 q_vector
->eims_value
= msixbm
;
829 /* 82576 uses a table that essentially consists of 2 columns
830 * with 8 rows. The ordering is column-major so we use the
831 * lower 3 bits as the row index, and the 4th bit as the
834 if (rx_queue
> IGB_N0_QUEUE
)
835 igb_write_ivar(hw
, msix_vector
,
837 (rx_queue
& 0x8) << 1);
838 if (tx_queue
> IGB_N0_QUEUE
)
839 igb_write_ivar(hw
, msix_vector
,
841 ((tx_queue
& 0x8) << 1) + 8);
842 q_vector
->eims_value
= BIT(msix_vector
);
849 /* On 82580 and newer adapters the scheme is similar to 82576
850 * however instead of ordering column-major we have things
851 * ordered row-major. So we traverse the table by using
852 * bit 0 as the column offset, and the remaining bits as the
855 if (rx_queue
> IGB_N0_QUEUE
)
856 igb_write_ivar(hw
, msix_vector
,
858 (rx_queue
& 0x1) << 4);
859 if (tx_queue
> IGB_N0_QUEUE
)
860 igb_write_ivar(hw
, msix_vector
,
862 ((tx_queue
& 0x1) << 4) + 8);
863 q_vector
->eims_value
= BIT(msix_vector
);
870 /* add q_vector eims value to global eims_enable_mask */
871 adapter
->eims_enable_mask
|= q_vector
->eims_value
;
873 /* configure q_vector to set itr on first interrupt */
874 q_vector
->set_itr
= 1;
878 * igb_configure_msix - Configure MSI-X hardware
879 * @adapter: board private structure to initialize
881 * igb_configure_msix sets up the hardware to properly
882 * generate MSI-X interrupts.
884 static void igb_configure_msix(struct igb_adapter
*adapter
)
888 struct e1000_hw
*hw
= &adapter
->hw
;
890 adapter
->eims_enable_mask
= 0;
892 /* set vector for other causes, i.e. link changes */
893 switch (hw
->mac
.type
) {
895 tmp
= rd32(E1000_CTRL_EXT
);
896 /* enable MSI-X PBA support*/
897 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
899 /* Auto-Mask interrupts upon ICR read. */
900 tmp
|= E1000_CTRL_EXT_EIAME
;
901 tmp
|= E1000_CTRL_EXT_IRCA
;
903 wr32(E1000_CTRL_EXT
, tmp
);
905 /* enable msix_other interrupt */
906 array_wr32(E1000_MSIXBM(0), vector
++, E1000_EIMS_OTHER
);
907 adapter
->eims_other
= E1000_EIMS_OTHER
;
917 /* Turn on MSI-X capability first, or our settings
918 * won't stick. And it will take days to debug.
920 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
921 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
924 /* enable msix_other interrupt */
925 adapter
->eims_other
= BIT(vector
);
926 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
928 wr32(E1000_IVAR_MISC
, tmp
);
931 /* do nothing, since nothing else supports MSI-X */
933 } /* switch (hw->mac.type) */
935 adapter
->eims_enable_mask
|= adapter
->eims_other
;
937 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
938 igb_assign_vector(adapter
->q_vector
[i
], vector
++);
944 * igb_request_msix - Initialize MSI-X interrupts
945 * @adapter: board private structure to initialize
947 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
950 static int igb_request_msix(struct igb_adapter
*adapter
)
952 struct net_device
*netdev
= adapter
->netdev
;
953 int i
, err
= 0, vector
= 0, free_vector
= 0;
955 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
956 igb_msix_other
, 0, netdev
->name
, adapter
);
960 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
961 struct igb_q_vector
*q_vector
= adapter
->q_vector
[i
];
965 q_vector
->itr_register
= adapter
->io_addr
+ E1000_EITR(vector
);
967 if (q_vector
->rx
.ring
&& q_vector
->tx
.ring
)
968 sprintf(q_vector
->name
, "%s-TxRx-%u", netdev
->name
,
969 q_vector
->rx
.ring
->queue_index
);
970 else if (q_vector
->tx
.ring
)
971 sprintf(q_vector
->name
, "%s-tx-%u", netdev
->name
,
972 q_vector
->tx
.ring
->queue_index
);
973 else if (q_vector
->rx
.ring
)
974 sprintf(q_vector
->name
, "%s-rx-%u", netdev
->name
,
975 q_vector
->rx
.ring
->queue_index
);
977 sprintf(q_vector
->name
, "%s-unused", netdev
->name
);
979 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
980 igb_msix_ring
, 0, q_vector
->name
,
986 igb_configure_msix(adapter
);
990 /* free already assigned IRQs */
991 free_irq(adapter
->msix_entries
[free_vector
++].vector
, adapter
);
994 for (i
= 0; i
< vector
; i
++) {
995 free_irq(adapter
->msix_entries
[free_vector
++].vector
,
996 adapter
->q_vector
[i
]);
1003 * igb_free_q_vector - Free memory allocated for specific interrupt vector
1004 * @adapter: board private structure to initialize
1005 * @v_idx: Index of vector to be freed
1007 * This function frees the memory allocated to the q_vector.
1009 static void igb_free_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1011 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1013 adapter
->q_vector
[v_idx
] = NULL
;
1015 /* igb_get_stats64() might access the rings on this vector,
1016 * we must wait a grace period before freeing it.
1019 kfree_rcu(q_vector
, rcu
);
1023 * igb_reset_q_vector - Reset config for interrupt vector
1024 * @adapter: board private structure to initialize
1025 * @v_idx: Index of vector to be reset
1027 * If NAPI is enabled it will delete any references to the
1028 * NAPI struct. This is preparation for igb_free_q_vector.
1030 static void igb_reset_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1032 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1034 /* Coming from igb_set_interrupt_capability, the vectors are not yet
1035 * allocated. So, q_vector is NULL so we should stop here.
1040 if (q_vector
->tx
.ring
)
1041 adapter
->tx_ring
[q_vector
->tx
.ring
->queue_index
] = NULL
;
1043 if (q_vector
->rx
.ring
)
1044 adapter
->rx_ring
[q_vector
->rx
.ring
->queue_index
] = NULL
;
1046 netif_napi_del(&q_vector
->napi
);
1050 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
1052 int v_idx
= adapter
->num_q_vectors
;
1054 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
1055 pci_disable_msix(adapter
->pdev
);
1056 else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
1057 pci_disable_msi(adapter
->pdev
);
1060 igb_reset_q_vector(adapter
, v_idx
);
1064 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1065 * @adapter: board private structure to initialize
1067 * This function frees the memory allocated to the q_vectors. In addition if
1068 * NAPI is enabled it will delete any references to the NAPI struct prior
1069 * to freeing the q_vector.
1071 static void igb_free_q_vectors(struct igb_adapter
*adapter
)
1073 int v_idx
= adapter
->num_q_vectors
;
1075 adapter
->num_tx_queues
= 0;
1076 adapter
->num_rx_queues
= 0;
1077 adapter
->num_q_vectors
= 0;
1080 igb_reset_q_vector(adapter
, v_idx
);
1081 igb_free_q_vector(adapter
, v_idx
);
1086 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1087 * @adapter: board private structure to initialize
1089 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1090 * MSI-X interrupts allocated.
1092 static void igb_clear_interrupt_scheme(struct igb_adapter
*adapter
)
1094 igb_free_q_vectors(adapter
);
1095 igb_reset_interrupt_capability(adapter
);
1099 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1100 * @adapter: board private structure to initialize
1101 * @msix: boolean value of MSIX capability
1103 * Attempt to configure interrupts using the best available
1104 * capabilities of the hardware and kernel.
1106 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
, bool msix
)
1113 adapter
->flags
|= IGB_FLAG_HAS_MSIX
;
1115 /* Number of supported queues. */
1116 adapter
->num_rx_queues
= adapter
->rss_queues
;
1117 if (adapter
->vfs_allocated_count
)
1118 adapter
->num_tx_queues
= 1;
1120 adapter
->num_tx_queues
= adapter
->rss_queues
;
1122 /* start with one vector for every Rx queue */
1123 numvecs
= adapter
->num_rx_queues
;
1125 /* if Tx handler is separate add 1 for every Tx queue */
1126 if (!(adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
))
1127 numvecs
+= adapter
->num_tx_queues
;
1129 /* store the number of vectors reserved for queues */
1130 adapter
->num_q_vectors
= numvecs
;
1132 /* add 1 vector for link status interrupts */
1134 for (i
= 0; i
< numvecs
; i
++)
1135 adapter
->msix_entries
[i
].entry
= i
;
1137 err
= pci_enable_msix_range(adapter
->pdev
,
1138 adapter
->msix_entries
,
1144 igb_reset_interrupt_capability(adapter
);
1146 /* If we can't do MSI-X, try MSI */
1148 adapter
->flags
&= ~IGB_FLAG_HAS_MSIX
;
1149 #ifdef CONFIG_PCI_IOV
1150 /* disable SR-IOV for non MSI-X configurations */
1151 if (adapter
->vf_data
) {
1152 struct e1000_hw
*hw
= &adapter
->hw
;
1153 /* disable iov and allow time for transactions to clear */
1154 pci_disable_sriov(adapter
->pdev
);
1157 kfree(adapter
->vf_data
);
1158 adapter
->vf_data
= NULL
;
1159 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1162 dev_info(&adapter
->pdev
->dev
, "IOV Disabled\n");
1165 adapter
->vfs_allocated_count
= 0;
1166 adapter
->rss_queues
= 1;
1167 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
1168 adapter
->num_rx_queues
= 1;
1169 adapter
->num_tx_queues
= 1;
1170 adapter
->num_q_vectors
= 1;
1171 if (!pci_enable_msi(adapter
->pdev
))
1172 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
1175 static void igb_add_ring(struct igb_ring
*ring
,
1176 struct igb_ring_container
*head
)
1183 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1184 * @adapter: board private structure to initialize
1185 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1186 * @v_idx: index of vector in adapter struct
1187 * @txr_count: total number of Tx rings to allocate
1188 * @txr_idx: index of first Tx ring to allocate
1189 * @rxr_count: total number of Rx rings to allocate
1190 * @rxr_idx: index of first Rx ring to allocate
1192 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1194 static int igb_alloc_q_vector(struct igb_adapter
*adapter
,
1195 int v_count
, int v_idx
,
1196 int txr_count
, int txr_idx
,
1197 int rxr_count
, int rxr_idx
)
1199 struct igb_q_vector
*q_vector
;
1200 struct igb_ring
*ring
;
1201 int ring_count
, size
;
1203 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1204 if (txr_count
> 1 || rxr_count
> 1)
1207 ring_count
= txr_count
+ rxr_count
;
1208 size
= sizeof(struct igb_q_vector
) +
1209 (sizeof(struct igb_ring
) * ring_count
);
1211 /* allocate q_vector and rings */
1212 q_vector
= adapter
->q_vector
[v_idx
];
1214 q_vector
= kzalloc(size
, GFP_KERNEL
);
1215 } else if (size
> ksize(q_vector
)) {
1216 kfree_rcu(q_vector
, rcu
);
1217 q_vector
= kzalloc(size
, GFP_KERNEL
);
1219 memset(q_vector
, 0, size
);
1224 /* initialize NAPI */
1225 netif_napi_add(adapter
->netdev
, &q_vector
->napi
,
1228 /* tie q_vector and adapter together */
1229 adapter
->q_vector
[v_idx
] = q_vector
;
1230 q_vector
->adapter
= adapter
;
1232 /* initialize work limits */
1233 q_vector
->tx
.work_limit
= adapter
->tx_work_limit
;
1235 /* initialize ITR configuration */
1236 q_vector
->itr_register
= adapter
->io_addr
+ E1000_EITR(0);
1237 q_vector
->itr_val
= IGB_START_ITR
;
1239 /* initialize pointer to rings */
1240 ring
= q_vector
->ring
;
1244 /* rx or rx/tx vector */
1245 if (!adapter
->rx_itr_setting
|| adapter
->rx_itr_setting
> 3)
1246 q_vector
->itr_val
= adapter
->rx_itr_setting
;
1248 /* tx only vector */
1249 if (!adapter
->tx_itr_setting
|| adapter
->tx_itr_setting
> 3)
1250 q_vector
->itr_val
= adapter
->tx_itr_setting
;
1254 /* assign generic ring traits */
1255 ring
->dev
= &adapter
->pdev
->dev
;
1256 ring
->netdev
= adapter
->netdev
;
1258 /* configure backlink on ring */
1259 ring
->q_vector
= q_vector
;
1261 /* update q_vector Tx values */
1262 igb_add_ring(ring
, &q_vector
->tx
);
1264 /* For 82575, context index must be unique per ring. */
1265 if (adapter
->hw
.mac
.type
== e1000_82575
)
1266 set_bit(IGB_RING_FLAG_TX_CTX_IDX
, &ring
->flags
);
1268 /* apply Tx specific ring traits */
1269 ring
->count
= adapter
->tx_ring_count
;
1270 ring
->queue_index
= txr_idx
;
1272 u64_stats_init(&ring
->tx_syncp
);
1273 u64_stats_init(&ring
->tx_syncp2
);
1275 /* assign ring to adapter */
1276 adapter
->tx_ring
[txr_idx
] = ring
;
1278 /* push pointer to next ring */
1283 /* assign generic ring traits */
1284 ring
->dev
= &adapter
->pdev
->dev
;
1285 ring
->netdev
= adapter
->netdev
;
1287 /* configure backlink on ring */
1288 ring
->q_vector
= q_vector
;
1290 /* update q_vector Rx values */
1291 igb_add_ring(ring
, &q_vector
->rx
);
1293 /* set flag indicating ring supports SCTP checksum offload */
1294 if (adapter
->hw
.mac
.type
>= e1000_82576
)
1295 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
);
1297 /* On i350, i354, i210, and i211, loopback VLAN packets
1298 * have the tag byte-swapped.
1300 if (adapter
->hw
.mac
.type
>= e1000_i350
)
1301 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &ring
->flags
);
1303 /* apply Rx specific ring traits */
1304 ring
->count
= adapter
->rx_ring_count
;
1305 ring
->queue_index
= rxr_idx
;
1307 u64_stats_init(&ring
->rx_syncp
);
1309 /* assign ring to adapter */
1310 adapter
->rx_ring
[rxr_idx
] = ring
;
1318 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1319 * @adapter: board private structure to initialize
1321 * We allocate one q_vector per queue interrupt. If allocation fails we
1324 static int igb_alloc_q_vectors(struct igb_adapter
*adapter
)
1326 int q_vectors
= adapter
->num_q_vectors
;
1327 int rxr_remaining
= adapter
->num_rx_queues
;
1328 int txr_remaining
= adapter
->num_tx_queues
;
1329 int rxr_idx
= 0, txr_idx
= 0, v_idx
= 0;
1332 if (q_vectors
>= (rxr_remaining
+ txr_remaining
)) {
1333 for (; rxr_remaining
; v_idx
++) {
1334 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1340 /* update counts and index */
1346 for (; v_idx
< q_vectors
; v_idx
++) {
1347 int rqpv
= DIV_ROUND_UP(rxr_remaining
, q_vectors
- v_idx
);
1348 int tqpv
= DIV_ROUND_UP(txr_remaining
, q_vectors
- v_idx
);
1350 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1351 tqpv
, txr_idx
, rqpv
, rxr_idx
);
1356 /* update counts and index */
1357 rxr_remaining
-= rqpv
;
1358 txr_remaining
-= tqpv
;
1366 adapter
->num_tx_queues
= 0;
1367 adapter
->num_rx_queues
= 0;
1368 adapter
->num_q_vectors
= 0;
1371 igb_free_q_vector(adapter
, v_idx
);
1377 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1378 * @adapter: board private structure to initialize
1379 * @msix: boolean value of MSIX capability
1381 * This function initializes the interrupts and allocates all of the queues.
1383 static int igb_init_interrupt_scheme(struct igb_adapter
*adapter
, bool msix
)
1385 struct pci_dev
*pdev
= adapter
->pdev
;
1388 igb_set_interrupt_capability(adapter
, msix
);
1390 err
= igb_alloc_q_vectors(adapter
);
1392 dev_err(&pdev
->dev
, "Unable to allocate memory for vectors\n");
1393 goto err_alloc_q_vectors
;
1396 igb_cache_ring_register(adapter
);
1400 err_alloc_q_vectors
:
1401 igb_reset_interrupt_capability(adapter
);
1406 * igb_request_irq - initialize interrupts
1407 * @adapter: board private structure to initialize
1409 * Attempts to configure interrupts using the best available
1410 * capabilities of the hardware and kernel.
1412 static int igb_request_irq(struct igb_adapter
*adapter
)
1414 struct net_device
*netdev
= adapter
->netdev
;
1415 struct pci_dev
*pdev
= adapter
->pdev
;
1418 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1419 err
= igb_request_msix(adapter
);
1422 /* fall back to MSI */
1423 igb_free_all_tx_resources(adapter
);
1424 igb_free_all_rx_resources(adapter
);
1426 igb_clear_interrupt_scheme(adapter
);
1427 err
= igb_init_interrupt_scheme(adapter
, false);
1431 igb_setup_all_tx_resources(adapter
);
1432 igb_setup_all_rx_resources(adapter
);
1433 igb_configure(adapter
);
1436 igb_assign_vector(adapter
->q_vector
[0], 0);
1438 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1439 err
= request_irq(pdev
->irq
, igb_intr_msi
, 0,
1440 netdev
->name
, adapter
);
1444 /* fall back to legacy interrupts */
1445 igb_reset_interrupt_capability(adapter
);
1446 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
1449 err
= request_irq(pdev
->irq
, igb_intr
, IRQF_SHARED
,
1450 netdev
->name
, adapter
);
1453 dev_err(&pdev
->dev
, "Error %d getting interrupt\n",
1460 static void igb_free_irq(struct igb_adapter
*adapter
)
1462 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1465 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
1467 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1468 free_irq(adapter
->msix_entries
[vector
++].vector
,
1469 adapter
->q_vector
[i
]);
1471 free_irq(adapter
->pdev
->irq
, adapter
);
1476 * igb_irq_disable - Mask off interrupt generation on the NIC
1477 * @adapter: board private structure
1479 static void igb_irq_disable(struct igb_adapter
*adapter
)
1481 struct e1000_hw
*hw
= &adapter
->hw
;
1483 /* we need to be careful when disabling interrupts. The VFs are also
1484 * mapped into these registers and so clearing the bits can cause
1485 * issues on the VF drivers so we only need to clear what we set
1487 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1488 u32 regval
= rd32(E1000_EIAM
);
1490 wr32(E1000_EIAM
, regval
& ~adapter
->eims_enable_mask
);
1491 wr32(E1000_EIMC
, adapter
->eims_enable_mask
);
1492 regval
= rd32(E1000_EIAC
);
1493 wr32(E1000_EIAC
, regval
& ~adapter
->eims_enable_mask
);
1497 wr32(E1000_IMC
, ~0);
1499 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1502 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1503 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1505 synchronize_irq(adapter
->pdev
->irq
);
1510 * igb_irq_enable - Enable default interrupt generation settings
1511 * @adapter: board private structure
1513 static void igb_irq_enable(struct igb_adapter
*adapter
)
1515 struct e1000_hw
*hw
= &adapter
->hw
;
1517 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1518 u32 ims
= E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_DRSTA
;
1519 u32 regval
= rd32(E1000_EIAC
);
1521 wr32(E1000_EIAC
, regval
| adapter
->eims_enable_mask
);
1522 regval
= rd32(E1000_EIAM
);
1523 wr32(E1000_EIAM
, regval
| adapter
->eims_enable_mask
);
1524 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
1525 if (adapter
->vfs_allocated_count
) {
1526 wr32(E1000_MBVFIMR
, 0xFF);
1527 ims
|= E1000_IMS_VMMB
;
1529 wr32(E1000_IMS
, ims
);
1531 wr32(E1000_IMS
, IMS_ENABLE_MASK
|
1533 wr32(E1000_IAM
, IMS_ENABLE_MASK
|
1538 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
1540 struct e1000_hw
*hw
= &adapter
->hw
;
1541 u16 pf_id
= adapter
->vfs_allocated_count
;
1542 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
1543 u16 old_vid
= adapter
->mng_vlan_id
;
1545 if (hw
->mng_cookie
.status
& E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
1546 /* add VID to filter table */
1547 igb_vfta_set(hw
, vid
, pf_id
, true, true);
1548 adapter
->mng_vlan_id
= vid
;
1550 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1553 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
1555 !test_bit(old_vid
, adapter
->active_vlans
)) {
1556 /* remove VID from filter table */
1557 igb_vfta_set(hw
, vid
, pf_id
, false, true);
1562 * igb_release_hw_control - release control of the h/w to f/w
1563 * @adapter: address of board private structure
1565 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1566 * For ASF and Pass Through versions of f/w this means that the
1567 * driver is no longer loaded.
1569 static void igb_release_hw_control(struct igb_adapter
*adapter
)
1571 struct e1000_hw
*hw
= &adapter
->hw
;
1574 /* Let firmware take over control of h/w */
1575 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1576 wr32(E1000_CTRL_EXT
,
1577 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
1581 * igb_get_hw_control - get control of the h/w from f/w
1582 * @adapter: address of board private structure
1584 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1585 * For ASF and Pass Through versions of f/w this means that
1586 * the driver is loaded.
1588 static void igb_get_hw_control(struct igb_adapter
*adapter
)
1590 struct e1000_hw
*hw
= &adapter
->hw
;
1593 /* Let firmware know the driver has taken over */
1594 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1595 wr32(E1000_CTRL_EXT
,
1596 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
1600 * igb_configure - configure the hardware for RX and TX
1601 * @adapter: private board structure
1603 static void igb_configure(struct igb_adapter
*adapter
)
1605 struct net_device
*netdev
= adapter
->netdev
;
1608 igb_get_hw_control(adapter
);
1609 igb_set_rx_mode(netdev
);
1611 igb_restore_vlan(adapter
);
1613 igb_setup_tctl(adapter
);
1614 igb_setup_mrqc(adapter
);
1615 igb_setup_rctl(adapter
);
1617 igb_nfc_filter_restore(adapter
);
1618 igb_configure_tx(adapter
);
1619 igb_configure_rx(adapter
);
1621 igb_rx_fifo_flush_82575(&adapter
->hw
);
1623 /* call igb_desc_unused which always leaves
1624 * at least 1 descriptor unused to make sure
1625 * next_to_use != next_to_clean
1627 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1628 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
1629 igb_alloc_rx_buffers(ring
, igb_desc_unused(ring
));
1634 * igb_power_up_link - Power up the phy/serdes link
1635 * @adapter: address of board private structure
1637 void igb_power_up_link(struct igb_adapter
*adapter
)
1639 igb_reset_phy(&adapter
->hw
);
1641 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1642 igb_power_up_phy_copper(&adapter
->hw
);
1644 igb_power_up_serdes_link_82575(&adapter
->hw
);
1646 igb_setup_link(&adapter
->hw
);
1650 * igb_power_down_link - Power down the phy/serdes link
1651 * @adapter: address of board private structure
1653 static void igb_power_down_link(struct igb_adapter
*adapter
)
1655 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1656 igb_power_down_phy_copper_82575(&adapter
->hw
);
1658 igb_shutdown_serdes_link_82575(&adapter
->hw
);
1662 * Detect and switch function for Media Auto Sense
1663 * @adapter: address of the board private structure
1665 static void igb_check_swap_media(struct igb_adapter
*adapter
)
1667 struct e1000_hw
*hw
= &adapter
->hw
;
1668 u32 ctrl_ext
, connsw
;
1669 bool swap_now
= false;
1671 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1672 connsw
= rd32(E1000_CONNSW
);
1674 /* need to live swap if current media is copper and we have fiber/serdes
1678 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
1679 (!(connsw
& E1000_CONNSW_AUTOSENSE_EN
))) {
1681 } else if (!(connsw
& E1000_CONNSW_SERDESD
)) {
1682 /* copper signal takes time to appear */
1683 if (adapter
->copper_tries
< 4) {
1684 adapter
->copper_tries
++;
1685 connsw
|= E1000_CONNSW_AUTOSENSE_CONF
;
1686 wr32(E1000_CONNSW
, connsw
);
1689 adapter
->copper_tries
= 0;
1690 if ((connsw
& E1000_CONNSW_PHYSD
) &&
1691 (!(connsw
& E1000_CONNSW_PHY_PDN
))) {
1693 connsw
&= ~E1000_CONNSW_AUTOSENSE_CONF
;
1694 wr32(E1000_CONNSW
, connsw
);
1702 switch (hw
->phy
.media_type
) {
1703 case e1000_media_type_copper
:
1704 netdev_info(adapter
->netdev
,
1705 "MAS: changing media to fiber/serdes\n");
1707 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
;
1708 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
1709 adapter
->copper_tries
= 0;
1711 case e1000_media_type_internal_serdes
:
1712 case e1000_media_type_fiber
:
1713 netdev_info(adapter
->netdev
,
1714 "MAS: changing media to copper\n");
1716 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
;
1717 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
1720 /* shouldn't get here during regular operation */
1721 netdev_err(adapter
->netdev
,
1722 "AMS: Invalid media type found, returning\n");
1725 wr32(E1000_CTRL_EXT
, ctrl_ext
);
1729 * igb_up - Open the interface and prepare it to handle traffic
1730 * @adapter: board private structure
1732 int igb_up(struct igb_adapter
*adapter
)
1734 struct e1000_hw
*hw
= &adapter
->hw
;
1737 /* hardware has been reset, we need to reload some things */
1738 igb_configure(adapter
);
1740 clear_bit(__IGB_DOWN
, &adapter
->state
);
1742 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1743 napi_enable(&(adapter
->q_vector
[i
]->napi
));
1745 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
1746 igb_configure_msix(adapter
);
1748 igb_assign_vector(adapter
->q_vector
[0], 0);
1750 /* Clear any pending interrupts. */
1752 igb_irq_enable(adapter
);
1754 /* notify VFs that reset has been completed */
1755 if (adapter
->vfs_allocated_count
) {
1756 u32 reg_data
= rd32(E1000_CTRL_EXT
);
1758 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
1759 wr32(E1000_CTRL_EXT
, reg_data
);
1762 netif_tx_start_all_queues(adapter
->netdev
);
1764 /* start the watchdog. */
1765 hw
->mac
.get_link_status
= 1;
1766 schedule_work(&adapter
->watchdog_task
);
1768 if ((adapter
->flags
& IGB_FLAG_EEE
) &&
1769 (!hw
->dev_spec
._82575
.eee_disable
))
1770 adapter
->eee_advert
= MDIO_EEE_100TX
| MDIO_EEE_1000T
;
1775 void igb_down(struct igb_adapter
*adapter
)
1777 struct net_device
*netdev
= adapter
->netdev
;
1778 struct e1000_hw
*hw
= &adapter
->hw
;
1782 /* signal that we're down so the interrupt handler does not
1783 * reschedule our watchdog timer
1785 set_bit(__IGB_DOWN
, &adapter
->state
);
1787 /* disable receives in the hardware */
1788 rctl
= rd32(E1000_RCTL
);
1789 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1790 /* flush and sleep below */
1792 netif_carrier_off(netdev
);
1793 netif_tx_stop_all_queues(netdev
);
1795 /* disable transmits in the hardware */
1796 tctl
= rd32(E1000_TCTL
);
1797 tctl
&= ~E1000_TCTL_EN
;
1798 wr32(E1000_TCTL
, tctl
);
1799 /* flush both disables and wait for them to finish */
1801 usleep_range(10000, 11000);
1803 igb_irq_disable(adapter
);
1805 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
1807 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1808 if (adapter
->q_vector
[i
]) {
1809 napi_synchronize(&adapter
->q_vector
[i
]->napi
);
1810 napi_disable(&adapter
->q_vector
[i
]->napi
);
1814 del_timer_sync(&adapter
->watchdog_timer
);
1815 del_timer_sync(&adapter
->phy_info_timer
);
1817 /* record the stats before reset*/
1818 spin_lock(&adapter
->stats64_lock
);
1819 igb_update_stats(adapter
, &adapter
->stats64
);
1820 spin_unlock(&adapter
->stats64_lock
);
1822 adapter
->link_speed
= 0;
1823 adapter
->link_duplex
= 0;
1825 if (!pci_channel_offline(adapter
->pdev
))
1828 /* clear VLAN promisc flag so VFTA will be updated if necessary */
1829 adapter
->flags
&= ~IGB_FLAG_VLAN_PROMISC
;
1831 igb_clean_all_tx_rings(adapter
);
1832 igb_clean_all_rx_rings(adapter
);
1833 #ifdef CONFIG_IGB_DCA
1835 /* since we reset the hardware DCA settings were cleared */
1836 igb_setup_dca(adapter
);
1840 void igb_reinit_locked(struct igb_adapter
*adapter
)
1842 WARN_ON(in_interrupt());
1843 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
1844 usleep_range(1000, 2000);
1847 clear_bit(__IGB_RESETTING
, &adapter
->state
);
1850 /** igb_enable_mas - Media Autosense re-enable after swap
1852 * @adapter: adapter struct
1854 static void igb_enable_mas(struct igb_adapter
*adapter
)
1856 struct e1000_hw
*hw
= &adapter
->hw
;
1857 u32 connsw
= rd32(E1000_CONNSW
);
1859 /* configure for SerDes media detect */
1860 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
1861 (!(connsw
& E1000_CONNSW_SERDESD
))) {
1862 connsw
|= E1000_CONNSW_ENRGSRC
;
1863 connsw
|= E1000_CONNSW_AUTOSENSE_EN
;
1864 wr32(E1000_CONNSW
, connsw
);
1869 void igb_reset(struct igb_adapter
*adapter
)
1871 struct pci_dev
*pdev
= adapter
->pdev
;
1872 struct e1000_hw
*hw
= &adapter
->hw
;
1873 struct e1000_mac_info
*mac
= &hw
->mac
;
1874 struct e1000_fc_info
*fc
= &hw
->fc
;
1877 /* Repartition Pba for greater than 9k mtu
1878 * To take effect CTRL.RST is required.
1880 switch (mac
->type
) {
1884 pba
= rd32(E1000_RXPBS
);
1885 pba
= igb_rxpbs_adjust_82580(pba
);
1888 pba
= rd32(E1000_RXPBS
);
1889 pba
&= E1000_RXPBS_SIZE_MASK_82576
;
1895 pba
= E1000_PBA_34K
;
1899 if (mac
->type
== e1000_82575
) {
1900 u32 min_rx_space
, min_tx_space
, needed_tx_space
;
1902 /* write Rx PBA so that hardware can report correct Tx PBA */
1903 wr32(E1000_PBA
, pba
);
1905 /* To maintain wire speed transmits, the Tx FIFO should be
1906 * large enough to accommodate two full transmit packets,
1907 * rounded up to the next 1KB and expressed in KB. Likewise,
1908 * the Rx FIFO should be large enough to accommodate at least
1909 * one full receive packet and is similarly rounded up and
1912 min_rx_space
= DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE
, 1024);
1914 /* The Tx FIFO also stores 16 bytes of information about the Tx
1915 * but don't include Ethernet FCS because hardware appends it.
1916 * We only need to round down to the nearest 512 byte block
1917 * count since the value we care about is 2 frames, not 1.
1919 min_tx_space
= adapter
->max_frame_size
;
1920 min_tx_space
+= sizeof(union e1000_adv_tx_desc
) - ETH_FCS_LEN
;
1921 min_tx_space
= DIV_ROUND_UP(min_tx_space
, 512);
1923 /* upper 16 bits has Tx packet buffer allocation size in KB */
1924 needed_tx_space
= min_tx_space
- (rd32(E1000_PBA
) >> 16);
1926 /* If current Tx allocation is less than the min Tx FIFO size,
1927 * and the min Tx FIFO size is less than the current Rx FIFO
1928 * allocation, take space away from current Rx allocation.
1930 if (needed_tx_space
< pba
) {
1931 pba
-= needed_tx_space
;
1933 /* if short on Rx space, Rx wins and must trump Tx
1936 if (pba
< min_rx_space
)
1940 /* adjust PBA for jumbo frames */
1941 wr32(E1000_PBA
, pba
);
1944 /* flow control settings
1945 * The high water mark must be low enough to fit one full frame
1946 * after transmitting the pause frame. As such we must have enough
1947 * space to allow for us to complete our current transmit and then
1948 * receive the frame that is in progress from the link partner.
1950 * - the full Rx FIFO size minus one full Tx plus one full Rx frame
1952 hwm
= (pba
<< 10) - (adapter
->max_frame_size
+ MAX_JUMBO_FRAME_SIZE
);
1954 fc
->high_water
= hwm
& 0xFFFFFFF0; /* 16-byte granularity */
1955 fc
->low_water
= fc
->high_water
- 16;
1956 fc
->pause_time
= 0xFFFF;
1958 fc
->current_mode
= fc
->requested_mode
;
1960 /* disable receive for all VFs and wait one second */
1961 if (adapter
->vfs_allocated_count
) {
1964 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1965 adapter
->vf_data
[i
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
1967 /* ping all the active vfs to let them know we are going down */
1968 igb_ping_all_vfs(adapter
);
1970 /* disable transmits and receives */
1971 wr32(E1000_VFRE
, 0);
1972 wr32(E1000_VFTE
, 0);
1975 /* Allow time for pending master requests to run */
1976 hw
->mac
.ops
.reset_hw(hw
);
1979 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
1980 /* need to resetup here after media swap */
1981 adapter
->ei
.get_invariants(hw
);
1982 adapter
->flags
&= ~IGB_FLAG_MEDIA_RESET
;
1984 if ((mac
->type
== e1000_82575
) &&
1985 (adapter
->flags
& IGB_FLAG_MAS_ENABLE
)) {
1986 igb_enable_mas(adapter
);
1988 if (hw
->mac
.ops
.init_hw(hw
))
1989 dev_err(&pdev
->dev
, "Hardware Error\n");
1991 /* Flow control settings reset on hardware reset, so guarantee flow
1992 * control is off when forcing speed.
1994 if (!hw
->mac
.autoneg
)
1995 igb_force_mac_fc(hw
);
1997 igb_init_dmac(adapter
, pba
);
1998 #ifdef CONFIG_IGB_HWMON
1999 /* Re-initialize the thermal sensor on i350 devices. */
2000 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
2001 if (mac
->type
== e1000_i350
&& hw
->bus
.func
== 0) {
2002 /* If present, re-initialize the external thermal sensor
2006 mac
->ops
.init_thermal_sensor_thresh(hw
);
2010 /* Re-establish EEE setting */
2011 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2012 switch (mac
->type
) {
2016 igb_set_eee_i350(hw
, true, true);
2019 igb_set_eee_i354(hw
, true, true);
2025 if (!netif_running(adapter
->netdev
))
2026 igb_power_down_link(adapter
);
2028 igb_update_mng_vlan(adapter
);
2030 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2031 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
2033 /* Re-enable PTP, where applicable. */
2034 if (adapter
->ptp_flags
& IGB_PTP_ENABLED
)
2035 igb_ptp_reset(adapter
);
2037 igb_get_phy_info(hw
);
2040 static netdev_features_t
igb_fix_features(struct net_device
*netdev
,
2041 netdev_features_t features
)
2043 /* Since there is no support for separate Rx/Tx vlan accel
2044 * enable/disable make sure Tx flag is always in same state as Rx.
2046 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2047 features
|= NETIF_F_HW_VLAN_CTAG_TX
;
2049 features
&= ~NETIF_F_HW_VLAN_CTAG_TX
;
2054 static int igb_set_features(struct net_device
*netdev
,
2055 netdev_features_t features
)
2057 netdev_features_t changed
= netdev
->features
^ features
;
2058 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2060 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
)
2061 igb_vlan_mode(netdev
, features
);
2063 if (!(changed
& (NETIF_F_RXALL
| NETIF_F_NTUPLE
)))
2066 if (!(features
& NETIF_F_NTUPLE
)) {
2067 struct hlist_node
*node2
;
2068 struct igb_nfc_filter
*rule
;
2070 spin_lock(&adapter
->nfc_lock
);
2071 hlist_for_each_entry_safe(rule
, node2
,
2072 &adapter
->nfc_filter_list
, nfc_node
) {
2073 igb_erase_filter(adapter
, rule
);
2074 hlist_del(&rule
->nfc_node
);
2077 spin_unlock(&adapter
->nfc_lock
);
2078 adapter
->nfc_filter_count
= 0;
2081 netdev
->features
= features
;
2083 if (netif_running(netdev
))
2084 igb_reinit_locked(adapter
);
2091 static int igb_ndo_fdb_add(struct ndmsg
*ndm
, struct nlattr
*tb
[],
2092 struct net_device
*dev
,
2093 const unsigned char *addr
, u16 vid
,
2096 /* guarantee we can provide a unique filter for the unicast address */
2097 if (is_unicast_ether_addr(addr
) || is_link_local_ether_addr(addr
)) {
2098 struct igb_adapter
*adapter
= netdev_priv(dev
);
2099 struct e1000_hw
*hw
= &adapter
->hw
;
2100 int vfn
= adapter
->vfs_allocated_count
;
2101 int rar_entries
= hw
->mac
.rar_entry_count
- (vfn
+ 1);
2103 if (netdev_uc_count(dev
) >= rar_entries
)
2107 return ndo_dflt_fdb_add(ndm
, tb
, dev
, addr
, vid
, flags
);
2110 #define IGB_MAX_MAC_HDR_LEN 127
2111 #define IGB_MAX_NETWORK_HDR_LEN 511
2113 static netdev_features_t
2114 igb_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
2115 netdev_features_t features
)
2117 unsigned int network_hdr_len
, mac_hdr_len
;
2119 /* Make certain the headers can be described by a context descriptor */
2120 mac_hdr_len
= skb_network_header(skb
) - skb
->data
;
2121 if (unlikely(mac_hdr_len
> IGB_MAX_MAC_HDR_LEN
))
2122 return features
& ~(NETIF_F_HW_CSUM
|
2124 NETIF_F_HW_VLAN_CTAG_TX
|
2128 network_hdr_len
= skb_checksum_start(skb
) - skb_network_header(skb
);
2129 if (unlikely(network_hdr_len
> IGB_MAX_NETWORK_HDR_LEN
))
2130 return features
& ~(NETIF_F_HW_CSUM
|
2135 /* We can only support IPV4 TSO in tunnels if we can mangle the
2136 * inner IP ID field, so strip TSO if MANGLEID is not supported.
2138 if (skb
->encapsulation
&& !(features
& NETIF_F_TSO_MANGLEID
))
2139 features
&= ~NETIF_F_TSO
;
2144 static const struct net_device_ops igb_netdev_ops
= {
2145 .ndo_open
= igb_open
,
2146 .ndo_stop
= igb_close
,
2147 .ndo_start_xmit
= igb_xmit_frame
,
2148 .ndo_get_stats64
= igb_get_stats64
,
2149 .ndo_set_rx_mode
= igb_set_rx_mode
,
2150 .ndo_set_mac_address
= igb_set_mac
,
2151 .ndo_change_mtu
= igb_change_mtu
,
2152 .ndo_do_ioctl
= igb_ioctl
,
2153 .ndo_tx_timeout
= igb_tx_timeout
,
2154 .ndo_validate_addr
= eth_validate_addr
,
2155 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
2156 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
2157 .ndo_set_vf_mac
= igb_ndo_set_vf_mac
,
2158 .ndo_set_vf_vlan
= igb_ndo_set_vf_vlan
,
2159 .ndo_set_vf_rate
= igb_ndo_set_vf_bw
,
2160 .ndo_set_vf_spoofchk
= igb_ndo_set_vf_spoofchk
,
2161 .ndo_get_vf_config
= igb_ndo_get_vf_config
,
2162 #ifdef CONFIG_NET_POLL_CONTROLLER
2163 .ndo_poll_controller
= igb_netpoll
,
2165 .ndo_fix_features
= igb_fix_features
,
2166 .ndo_set_features
= igb_set_features
,
2167 .ndo_fdb_add
= igb_ndo_fdb_add
,
2168 .ndo_features_check
= igb_features_check
,
2172 * igb_set_fw_version - Configure version string for ethtool
2173 * @adapter: adapter struct
2175 void igb_set_fw_version(struct igb_adapter
*adapter
)
2177 struct e1000_hw
*hw
= &adapter
->hw
;
2178 struct e1000_fw_version fw
;
2180 igb_get_fw_version(hw
, &fw
);
2182 switch (hw
->mac
.type
) {
2185 if (!(igb_get_flash_presence_i210(hw
))) {
2186 snprintf(adapter
->fw_version
,
2187 sizeof(adapter
->fw_version
),
2189 fw
.invm_major
, fw
.invm_minor
,
2195 /* if option is rom valid, display its version too */
2197 snprintf(adapter
->fw_version
,
2198 sizeof(adapter
->fw_version
),
2199 "%d.%d, 0x%08x, %d.%d.%d",
2200 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
,
2201 fw
.or_major
, fw
.or_build
, fw
.or_patch
);
2203 } else if (fw
.etrack_id
!= 0X0000) {
2204 snprintf(adapter
->fw_version
,
2205 sizeof(adapter
->fw_version
),
2207 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
);
2209 snprintf(adapter
->fw_version
,
2210 sizeof(adapter
->fw_version
),
2212 fw
.eep_major
, fw
.eep_minor
, fw
.eep_build
);
2219 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2221 * @adapter: adapter struct
2223 static void igb_init_mas(struct igb_adapter
*adapter
)
2225 struct e1000_hw
*hw
= &adapter
->hw
;
2228 hw
->nvm
.ops
.read(hw
, NVM_COMPAT
, 1, &eeprom_data
);
2229 switch (hw
->bus
.func
) {
2231 if (eeprom_data
& IGB_MAS_ENABLE_0
) {
2232 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2233 netdev_info(adapter
->netdev
,
2234 "MAS: Enabling Media Autosense for port %d\n",
2239 if (eeprom_data
& IGB_MAS_ENABLE_1
) {
2240 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2241 netdev_info(adapter
->netdev
,
2242 "MAS: Enabling Media Autosense for port %d\n",
2247 if (eeprom_data
& IGB_MAS_ENABLE_2
) {
2248 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2249 netdev_info(adapter
->netdev
,
2250 "MAS: Enabling Media Autosense for port %d\n",
2255 if (eeprom_data
& IGB_MAS_ENABLE_3
) {
2256 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2257 netdev_info(adapter
->netdev
,
2258 "MAS: Enabling Media Autosense for port %d\n",
2263 /* Shouldn't get here */
2264 netdev_err(adapter
->netdev
,
2265 "MAS: Invalid port configuration, returning\n");
2271 * igb_init_i2c - Init I2C interface
2272 * @adapter: pointer to adapter structure
2274 static s32
igb_init_i2c(struct igb_adapter
*adapter
)
2278 /* I2C interface supported on i350 devices */
2279 if (adapter
->hw
.mac
.type
!= e1000_i350
)
2282 /* Initialize the i2c bus which is controlled by the registers.
2283 * This bus will use the i2c_algo_bit structue that implements
2284 * the protocol through toggling of the 4 bits in the register.
2286 adapter
->i2c_adap
.owner
= THIS_MODULE
;
2287 adapter
->i2c_algo
= igb_i2c_algo
;
2288 adapter
->i2c_algo
.data
= adapter
;
2289 adapter
->i2c_adap
.algo_data
= &adapter
->i2c_algo
;
2290 adapter
->i2c_adap
.dev
.parent
= &adapter
->pdev
->dev
;
2291 strlcpy(adapter
->i2c_adap
.name
, "igb BB",
2292 sizeof(adapter
->i2c_adap
.name
));
2293 status
= i2c_bit_add_bus(&adapter
->i2c_adap
);
2298 * igb_probe - Device Initialization Routine
2299 * @pdev: PCI device information struct
2300 * @ent: entry in igb_pci_tbl
2302 * Returns 0 on success, negative on failure
2304 * igb_probe initializes an adapter identified by a pci_dev structure.
2305 * The OS initialization, configuring of the adapter private structure,
2306 * and a hardware reset occur.
2308 static int igb_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2310 struct net_device
*netdev
;
2311 struct igb_adapter
*adapter
;
2312 struct e1000_hw
*hw
;
2313 u16 eeprom_data
= 0;
2315 static int global_quad_port_a
; /* global quad port a indication */
2316 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
2317 int err
, pci_using_dac
;
2318 u8 part_str
[E1000_PBANUM_LENGTH
];
2320 /* Catch broken hardware that put the wrong VF device ID in
2321 * the PCIe SR-IOV capability.
2323 if (pdev
->is_virtfn
) {
2324 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
2325 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
2329 err
= pci_enable_device_mem(pdev
);
2334 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
2338 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
2341 "No usable DMA configuration, aborting\n");
2346 err
= pci_request_mem_regions(pdev
, igb_driver_name
);
2350 pci_enable_pcie_error_reporting(pdev
);
2352 pci_set_master(pdev
);
2353 pci_save_state(pdev
);
2356 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
2359 goto err_alloc_etherdev
;
2361 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2363 pci_set_drvdata(pdev
, netdev
);
2364 adapter
= netdev_priv(netdev
);
2365 adapter
->netdev
= netdev
;
2366 adapter
->pdev
= pdev
;
2369 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
2372 adapter
->io_addr
= pci_iomap(pdev
, 0, 0);
2373 if (!adapter
->io_addr
)
2375 /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
2376 hw
->hw_addr
= adapter
->io_addr
;
2378 netdev
->netdev_ops
= &igb_netdev_ops
;
2379 igb_set_ethtool_ops(netdev
);
2380 netdev
->watchdog_timeo
= 5 * HZ
;
2382 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
2384 netdev
->mem_start
= pci_resource_start(pdev
, 0);
2385 netdev
->mem_end
= pci_resource_end(pdev
, 0);
2387 /* PCI config space info */
2388 hw
->vendor_id
= pdev
->vendor
;
2389 hw
->device_id
= pdev
->device
;
2390 hw
->revision_id
= pdev
->revision
;
2391 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
2392 hw
->subsystem_device_id
= pdev
->subsystem_device
;
2394 /* Copy the default MAC, PHY and NVM function pointers */
2395 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
2396 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
2397 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
2398 /* Initialize skew-specific constants */
2399 err
= ei
->get_invariants(hw
);
2403 /* setup the private structure */
2404 err
= igb_sw_init(adapter
);
2408 igb_get_bus_info_pcie(hw
);
2410 hw
->phy
.autoneg_wait_to_complete
= false;
2412 /* Copper options */
2413 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2414 hw
->phy
.mdix
= AUTO_ALL_MODES
;
2415 hw
->phy
.disable_polarity_correction
= false;
2416 hw
->phy
.ms_type
= e1000_ms_hw_default
;
2419 if (igb_check_reset_block(hw
))
2420 dev_info(&pdev
->dev
,
2421 "PHY reset is blocked due to SOL/IDER session.\n");
2423 /* features is initialized to 0 in allocation, it might have bits
2424 * set by igb_sw_init so we should use an or instead of an
2427 netdev
->features
|= NETIF_F_SG
|
2434 if (hw
->mac
.type
>= e1000_82576
)
2435 netdev
->features
|= NETIF_F_SCTP_CRC
;
2437 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
2438 NETIF_F_GSO_GRE_CSUM | \
2439 NETIF_F_GSO_IPXIP4 | \
2440 NETIF_F_GSO_IPXIP6 | \
2441 NETIF_F_GSO_UDP_TUNNEL | \
2442 NETIF_F_GSO_UDP_TUNNEL_CSUM)
2444 netdev
->gso_partial_features
= IGB_GSO_PARTIAL_FEATURES
;
2445 netdev
->features
|= NETIF_F_GSO_PARTIAL
| IGB_GSO_PARTIAL_FEATURES
;
2447 /* copy netdev features into list of user selectable features */
2448 netdev
->hw_features
|= netdev
->features
|
2449 NETIF_F_HW_VLAN_CTAG_RX
|
2450 NETIF_F_HW_VLAN_CTAG_TX
|
2453 if (hw
->mac
.type
>= e1000_i350
)
2454 netdev
->hw_features
|= NETIF_F_NTUPLE
;
2457 netdev
->features
|= NETIF_F_HIGHDMA
;
2459 netdev
->vlan_features
|= netdev
->features
| NETIF_F_TSO_MANGLEID
;
2460 netdev
->mpls_features
|= NETIF_F_HW_CSUM
;
2461 netdev
->hw_enc_features
|= netdev
->vlan_features
;
2463 /* set this bit last since it cannot be part of vlan_features */
2464 netdev
->features
|= NETIF_F_HW_VLAN_CTAG_FILTER
|
2465 NETIF_F_HW_VLAN_CTAG_RX
|
2466 NETIF_F_HW_VLAN_CTAG_TX
;
2468 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
2470 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
2472 /* MTU range: 68 - 9216 */
2473 netdev
->min_mtu
= ETH_MIN_MTU
;
2474 netdev
->max_mtu
= MAX_STD_JUMBO_FRAME_SIZE
;
2476 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(hw
);
2478 /* before reading the NVM, reset the controller to put the device in a
2479 * known good starting state
2481 hw
->mac
.ops
.reset_hw(hw
);
2483 /* make sure the NVM is good , i211/i210 parts can have special NVM
2484 * that doesn't contain a checksum
2486 switch (hw
->mac
.type
) {
2489 if (igb_get_flash_presence_i210(hw
)) {
2490 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2492 "The NVM Checksum Is Not Valid\n");
2499 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2500 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
2507 if (eth_platform_get_mac_address(&pdev
->dev
, hw
->mac
.addr
)) {
2508 /* copy the MAC address out of the NVM */
2509 if (hw
->mac
.ops
.read_mac_addr(hw
))
2510 dev_err(&pdev
->dev
, "NVM Read Error\n");
2513 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
2515 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
2516 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
2521 /* get firmware version for ethtool -i */
2522 igb_set_fw_version(adapter
);
2524 /* configure RXPBSIZE and TXPBSIZE */
2525 if (hw
->mac
.type
== e1000_i210
) {
2526 wr32(E1000_RXPBS
, I210_RXPBSIZE_DEFAULT
);
2527 wr32(E1000_TXPBS
, I210_TXPBSIZE_DEFAULT
);
2530 setup_timer(&adapter
->watchdog_timer
, igb_watchdog
,
2531 (unsigned long) adapter
);
2532 setup_timer(&adapter
->phy_info_timer
, igb_update_phy_info
,
2533 (unsigned long) adapter
);
2535 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
2536 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
2538 /* Initialize link properties that are user-changeable */
2539 adapter
->fc_autoneg
= true;
2540 hw
->mac
.autoneg
= true;
2541 hw
->phy
.autoneg_advertised
= 0x2f;
2543 hw
->fc
.requested_mode
= e1000_fc_default
;
2544 hw
->fc
.current_mode
= e1000_fc_default
;
2546 igb_validate_mdi_setting(hw
);
2548 /* By default, support wake on port A */
2549 if (hw
->bus
.func
== 0)
2550 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2552 /* Check the NVM for wake support on non-port A ports */
2553 if (hw
->mac
.type
>= e1000_82580
)
2554 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
+
2555 NVM_82580_LAN_FUNC_OFFSET(hw
->bus
.func
), 1,
2557 else if (hw
->bus
.func
== 1)
2558 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_B
, 1, &eeprom_data
);
2560 if (eeprom_data
& IGB_EEPROM_APME
)
2561 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2563 /* now that we have the eeprom settings, apply the special cases where
2564 * the eeprom may be wrong or the board simply won't support wake on
2565 * lan on a particular port
2567 switch (pdev
->device
) {
2568 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
2569 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2571 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
2572 case E1000_DEV_ID_82576_FIBER
:
2573 case E1000_DEV_ID_82576_SERDES
:
2574 /* Wake events only supported on port A for dual fiber
2575 * regardless of eeprom setting
2577 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
2578 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2580 case E1000_DEV_ID_82576_QUAD_COPPER
:
2581 case E1000_DEV_ID_82576_QUAD_COPPER_ET2
:
2582 /* if quad port adapter, disable WoL on all but port A */
2583 if (global_quad_port_a
!= 0)
2584 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2586 adapter
->flags
|= IGB_FLAG_QUAD_PORT_A
;
2587 /* Reset for multiple quad port adapters */
2588 if (++global_quad_port_a
== 4)
2589 global_quad_port_a
= 0;
2592 /* If the device can't wake, don't set software support */
2593 if (!device_can_wakeup(&adapter
->pdev
->dev
))
2594 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2597 /* initialize the wol settings based on the eeprom settings */
2598 if (adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
)
2599 adapter
->wol
|= E1000_WUFC_MAG
;
2601 /* Some vendors want WoL disabled by default, but still supported */
2602 if ((hw
->mac
.type
== e1000_i350
) &&
2603 (pdev
->subsystem_vendor
== PCI_VENDOR_ID_HP
)) {
2604 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2608 /* Some vendors want the ability to Use the EEPROM setting as
2609 * enable/disable only, and not for capability
2611 if (((hw
->mac
.type
== e1000_i350
) ||
2612 (hw
->mac
.type
== e1000_i354
)) &&
2613 (pdev
->subsystem_vendor
== PCI_VENDOR_ID_DELL
)) {
2614 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2617 if (hw
->mac
.type
== e1000_i350
) {
2618 if (((pdev
->subsystem_device
== 0x5001) ||
2619 (pdev
->subsystem_device
== 0x5002)) &&
2620 (hw
->bus
.func
== 0)) {
2621 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2624 if (pdev
->subsystem_device
== 0x1F52)
2625 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2628 device_set_wakeup_enable(&adapter
->pdev
->dev
,
2629 adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
);
2631 /* reset the hardware with the new settings */
2634 /* Init the I2C interface */
2635 err
= igb_init_i2c(adapter
);
2637 dev_err(&pdev
->dev
, "failed to init i2c interface\n");
2641 /* let the f/w know that the h/w is now under the control of the
2644 igb_get_hw_control(adapter
);
2646 strcpy(netdev
->name
, "eth%d");
2647 err
= register_netdev(netdev
);
2651 /* carrier off reporting is important to ethtool even BEFORE open */
2652 netif_carrier_off(netdev
);
2654 #ifdef CONFIG_IGB_DCA
2655 if (dca_add_requester(&pdev
->dev
) == 0) {
2656 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
2657 dev_info(&pdev
->dev
, "DCA enabled\n");
2658 igb_setup_dca(adapter
);
2662 #ifdef CONFIG_IGB_HWMON
2663 /* Initialize the thermal sensor on i350 devices. */
2664 if (hw
->mac
.type
== e1000_i350
&& hw
->bus
.func
== 0) {
2667 /* Read the NVM to determine if this i350 device supports an
2668 * external thermal sensor.
2670 hw
->nvm
.ops
.read(hw
, NVM_ETS_CFG
, 1, &ets_word
);
2671 if (ets_word
!= 0x0000 && ets_word
!= 0xFFFF)
2672 adapter
->ets
= true;
2674 adapter
->ets
= false;
2675 if (igb_sysfs_init(adapter
))
2677 "failed to allocate sysfs resources\n");
2679 adapter
->ets
= false;
2682 /* Check if Media Autosense is enabled */
2684 if (hw
->dev_spec
._82575
.mas_capable
)
2685 igb_init_mas(adapter
);
2687 /* do hw tstamp init after resetting */
2688 igb_ptp_init(adapter
);
2690 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
2691 /* print bus type/speed/width info, not applicable to i354 */
2692 if (hw
->mac
.type
!= e1000_i354
) {
2693 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
2695 ((hw
->bus
.speed
== e1000_bus_speed_2500
) ? "2.5Gb/s" :
2696 (hw
->bus
.speed
== e1000_bus_speed_5000
) ? "5.0Gb/s" :
2698 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
) ?
2700 (hw
->bus
.width
== e1000_bus_width_pcie_x2
) ?
2702 (hw
->bus
.width
== e1000_bus_width_pcie_x1
) ?
2703 "Width x1" : "unknown"), netdev
->dev_addr
);
2706 if ((hw
->mac
.type
>= e1000_i210
||
2707 igb_get_flash_presence_i210(hw
))) {
2708 ret_val
= igb_read_part_string(hw
, part_str
,
2709 E1000_PBANUM_LENGTH
);
2711 ret_val
= -E1000_ERR_INVM_VALUE_NOT_FOUND
;
2715 strcpy(part_str
, "Unknown");
2716 dev_info(&pdev
->dev
, "%s: PBA No: %s\n", netdev
->name
, part_str
);
2717 dev_info(&pdev
->dev
,
2718 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2719 (adapter
->flags
& IGB_FLAG_HAS_MSIX
) ? "MSI-X" :
2720 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
2721 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2722 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2723 switch (hw
->mac
.type
) {
2727 /* Enable EEE for internal copper PHY devices */
2728 err
= igb_set_eee_i350(hw
, true, true);
2730 (!hw
->dev_spec
._82575
.eee_disable
)) {
2731 adapter
->eee_advert
=
2732 MDIO_EEE_100TX
| MDIO_EEE_1000T
;
2733 adapter
->flags
|= IGB_FLAG_EEE
;
2737 if ((rd32(E1000_CTRL_EXT
) &
2738 E1000_CTRL_EXT_LINK_MODE_SGMII
)) {
2739 err
= igb_set_eee_i354(hw
, true, true);
2741 (!hw
->dev_spec
._82575
.eee_disable
)) {
2742 adapter
->eee_advert
=
2743 MDIO_EEE_100TX
| MDIO_EEE_1000T
;
2744 adapter
->flags
|= IGB_FLAG_EEE
;
2752 pm_runtime_put_noidle(&pdev
->dev
);
2756 igb_release_hw_control(adapter
);
2757 memset(&adapter
->i2c_adap
, 0, sizeof(adapter
->i2c_adap
));
2759 if (!igb_check_reset_block(hw
))
2762 if (hw
->flash_address
)
2763 iounmap(hw
->flash_address
);
2765 kfree(adapter
->shadow_vfta
);
2766 igb_clear_interrupt_scheme(adapter
);
2767 #ifdef CONFIG_PCI_IOV
2768 igb_disable_sriov(pdev
);
2770 pci_iounmap(pdev
, adapter
->io_addr
);
2772 free_netdev(netdev
);
2774 pci_release_mem_regions(pdev
);
2777 pci_disable_device(pdev
);
2781 #ifdef CONFIG_PCI_IOV
2782 static int igb_disable_sriov(struct pci_dev
*pdev
)
2784 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2785 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2786 struct e1000_hw
*hw
= &adapter
->hw
;
2788 /* reclaim resources allocated to VFs */
2789 if (adapter
->vf_data
) {
2790 /* disable iov and allow time for transactions to clear */
2791 if (pci_vfs_assigned(pdev
)) {
2792 dev_warn(&pdev
->dev
,
2793 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2796 pci_disable_sriov(pdev
);
2800 kfree(adapter
->vf_data
);
2801 adapter
->vf_data
= NULL
;
2802 adapter
->vfs_allocated_count
= 0;
2803 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
2806 dev_info(&pdev
->dev
, "IOV Disabled\n");
2808 /* Re-enable DMA Coalescing flag since IOV is turned off */
2809 adapter
->flags
|= IGB_FLAG_DMAC
;
2815 static int igb_enable_sriov(struct pci_dev
*pdev
, int num_vfs
)
2817 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2818 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2819 int old_vfs
= pci_num_vf(pdev
);
2823 if (!(adapter
->flags
& IGB_FLAG_HAS_MSIX
) || num_vfs
> 7) {
2831 dev_info(&pdev
->dev
, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2833 adapter
->vfs_allocated_count
= old_vfs
;
2835 adapter
->vfs_allocated_count
= num_vfs
;
2837 adapter
->vf_data
= kcalloc(adapter
->vfs_allocated_count
,
2838 sizeof(struct vf_data_storage
), GFP_KERNEL
);
2840 /* if allocation failed then we do not support SR-IOV */
2841 if (!adapter
->vf_data
) {
2842 adapter
->vfs_allocated_count
= 0;
2844 "Unable to allocate memory for VF Data Storage\n");
2849 /* only call pci_enable_sriov() if no VFs are allocated already */
2851 err
= pci_enable_sriov(pdev
, adapter
->vfs_allocated_count
);
2855 dev_info(&pdev
->dev
, "%d VFs allocated\n",
2856 adapter
->vfs_allocated_count
);
2857 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++)
2858 igb_vf_configure(adapter
, i
);
2860 /* DMA Coalescing is not supported in IOV mode. */
2861 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2865 kfree(adapter
->vf_data
);
2866 adapter
->vf_data
= NULL
;
2867 adapter
->vfs_allocated_count
= 0;
2874 * igb_remove_i2c - Cleanup I2C interface
2875 * @adapter: pointer to adapter structure
2877 static void igb_remove_i2c(struct igb_adapter
*adapter
)
2879 /* free the adapter bus structure */
2880 i2c_del_adapter(&adapter
->i2c_adap
);
2884 * igb_remove - Device Removal Routine
2885 * @pdev: PCI device information struct
2887 * igb_remove is called by the PCI subsystem to alert the driver
2888 * that it should release a PCI device. The could be caused by a
2889 * Hot-Plug event, or because the driver is going to be removed from
2892 static void igb_remove(struct pci_dev
*pdev
)
2894 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2895 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2896 struct e1000_hw
*hw
= &adapter
->hw
;
2898 pm_runtime_get_noresume(&pdev
->dev
);
2899 #ifdef CONFIG_IGB_HWMON
2900 igb_sysfs_exit(adapter
);
2902 igb_remove_i2c(adapter
);
2903 igb_ptp_stop(adapter
);
2904 /* The watchdog timer may be rescheduled, so explicitly
2905 * disable watchdog from being rescheduled.
2907 set_bit(__IGB_DOWN
, &adapter
->state
);
2908 del_timer_sync(&adapter
->watchdog_timer
);
2909 del_timer_sync(&adapter
->phy_info_timer
);
2911 cancel_work_sync(&adapter
->reset_task
);
2912 cancel_work_sync(&adapter
->watchdog_task
);
2914 #ifdef CONFIG_IGB_DCA
2915 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
2916 dev_info(&pdev
->dev
, "DCA disabled\n");
2917 dca_remove_requester(&pdev
->dev
);
2918 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
2919 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
2923 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2924 * would have already happened in close and is redundant.
2926 igb_release_hw_control(adapter
);
2928 #ifdef CONFIG_PCI_IOV
2929 igb_disable_sriov(pdev
);
2932 unregister_netdev(netdev
);
2934 igb_clear_interrupt_scheme(adapter
);
2936 pci_iounmap(pdev
, adapter
->io_addr
);
2937 if (hw
->flash_address
)
2938 iounmap(hw
->flash_address
);
2939 pci_release_mem_regions(pdev
);
2941 kfree(adapter
->shadow_vfta
);
2942 free_netdev(netdev
);
2944 pci_disable_pcie_error_reporting(pdev
);
2946 pci_disable_device(pdev
);
2950 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2951 * @adapter: board private structure to initialize
2953 * This function initializes the vf specific data storage and then attempts to
2954 * allocate the VFs. The reason for ordering it this way is because it is much
2955 * mor expensive time wise to disable SR-IOV than it is to allocate and free
2956 * the memory for the VFs.
2958 static void igb_probe_vfs(struct igb_adapter
*adapter
)
2960 #ifdef CONFIG_PCI_IOV
2961 struct pci_dev
*pdev
= adapter
->pdev
;
2962 struct e1000_hw
*hw
= &adapter
->hw
;
2964 /* Virtualization features not supported on i210 family. */
2965 if ((hw
->mac
.type
== e1000_i210
) || (hw
->mac
.type
== e1000_i211
))
2968 /* Of the below we really only want the effect of getting
2969 * IGB_FLAG_HAS_MSIX set (if available), without which
2970 * igb_enable_sriov() has no effect.
2972 igb_set_interrupt_capability(adapter
, true);
2973 igb_reset_interrupt_capability(adapter
);
2975 pci_sriov_set_totalvfs(pdev
, 7);
2976 igb_enable_sriov(pdev
, max_vfs
);
2978 #endif /* CONFIG_PCI_IOV */
2981 static void igb_init_queue_configuration(struct igb_adapter
*adapter
)
2983 struct e1000_hw
*hw
= &adapter
->hw
;
2986 /* Determine the maximum number of RSS queues supported. */
2987 switch (hw
->mac
.type
) {
2989 max_rss_queues
= IGB_MAX_RX_QUEUES_I211
;
2993 max_rss_queues
= IGB_MAX_RX_QUEUES_82575
;
2996 /* I350 cannot do RSS and SR-IOV at the same time */
2997 if (!!adapter
->vfs_allocated_count
) {
3003 if (!!adapter
->vfs_allocated_count
) {
3011 max_rss_queues
= IGB_MAX_RX_QUEUES
;
3015 adapter
->rss_queues
= min_t(u32
, max_rss_queues
, num_online_cpus());
3017 igb_set_flag_queue_pairs(adapter
, max_rss_queues
);
3020 void igb_set_flag_queue_pairs(struct igb_adapter
*adapter
,
3021 const u32 max_rss_queues
)
3023 struct e1000_hw
*hw
= &adapter
->hw
;
3025 /* Determine if we need to pair queues. */
3026 switch (hw
->mac
.type
) {
3029 /* Device supports enough interrupts without queue pairing. */
3037 /* If rss_queues > half of max_rss_queues, pair the queues in
3038 * order to conserve interrupts due to limited supply.
3040 if (adapter
->rss_queues
> (max_rss_queues
/ 2))
3041 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
3043 adapter
->flags
&= ~IGB_FLAG_QUEUE_PAIRS
;
3049 * igb_sw_init - Initialize general software structures (struct igb_adapter)
3050 * @adapter: board private structure to initialize
3052 * igb_sw_init initializes the Adapter private data structure.
3053 * Fields are initialized based on PCI device information and
3054 * OS network device settings (MTU size).
3056 static int igb_sw_init(struct igb_adapter
*adapter
)
3058 struct e1000_hw
*hw
= &adapter
->hw
;
3059 struct net_device
*netdev
= adapter
->netdev
;
3060 struct pci_dev
*pdev
= adapter
->pdev
;
3062 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
3064 /* set default ring sizes */
3065 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
3066 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
3068 /* set default ITR values */
3069 adapter
->rx_itr_setting
= IGB_DEFAULT_ITR
;
3070 adapter
->tx_itr_setting
= IGB_DEFAULT_ITR
;
3072 /* set default work limits */
3073 adapter
->tx_work_limit
= IGB_DEFAULT_TX_WORK
;
3075 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+
3077 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
3079 spin_lock_init(&adapter
->nfc_lock
);
3080 spin_lock_init(&adapter
->stats64_lock
);
3081 #ifdef CONFIG_PCI_IOV
3082 switch (hw
->mac
.type
) {
3086 dev_warn(&pdev
->dev
,
3087 "Maximum of 7 VFs per PF, using max\n");
3088 max_vfs
= adapter
->vfs_allocated_count
= 7;
3090 adapter
->vfs_allocated_count
= max_vfs
;
3091 if (adapter
->vfs_allocated_count
)
3092 dev_warn(&pdev
->dev
,
3093 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3098 #endif /* CONFIG_PCI_IOV */
3100 /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3101 adapter
->flags
|= IGB_FLAG_HAS_MSIX
;
3103 igb_probe_vfs(adapter
);
3105 igb_init_queue_configuration(adapter
);
3107 /* Setup and initialize a copy of the hw vlan table array */
3108 adapter
->shadow_vfta
= kcalloc(E1000_VLAN_FILTER_TBL_SIZE
, sizeof(u32
),
3111 /* This call may decrease the number of queues */
3112 if (igb_init_interrupt_scheme(adapter
, true)) {
3113 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
3117 /* Explicitly disable IRQ since the NIC can be in any state. */
3118 igb_irq_disable(adapter
);
3120 if (hw
->mac
.type
>= e1000_i350
)
3121 adapter
->flags
&= ~IGB_FLAG_DMAC
;
3123 set_bit(__IGB_DOWN
, &adapter
->state
);
3128 * igb_open - Called when a network interface is made active
3129 * @netdev: network interface device structure
3131 * Returns 0 on success, negative value on failure
3133 * The open entry point is called when a network interface is made
3134 * active by the system (IFF_UP). At this point all resources needed
3135 * for transmit and receive operations are allocated, the interrupt
3136 * handler is registered with the OS, the watchdog timer is started,
3137 * and the stack is notified that the interface is ready.
3139 static int __igb_open(struct net_device
*netdev
, bool resuming
)
3141 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3142 struct e1000_hw
*hw
= &adapter
->hw
;
3143 struct pci_dev
*pdev
= adapter
->pdev
;
3147 /* disallow open during test */
3148 if (test_bit(__IGB_TESTING
, &adapter
->state
)) {
3154 pm_runtime_get_sync(&pdev
->dev
);
3156 netif_carrier_off(netdev
);
3158 /* allocate transmit descriptors */
3159 err
= igb_setup_all_tx_resources(adapter
);
3163 /* allocate receive descriptors */
3164 err
= igb_setup_all_rx_resources(adapter
);
3168 igb_power_up_link(adapter
);
3170 /* before we allocate an interrupt, we must be ready to handle it.
3171 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3172 * as soon as we call pci_request_irq, so we have to setup our
3173 * clean_rx handler before we do so.
3175 igb_configure(adapter
);
3177 err
= igb_request_irq(adapter
);
3181 /* Notify the stack of the actual queue counts. */
3182 err
= netif_set_real_num_tx_queues(adapter
->netdev
,
3183 adapter
->num_tx_queues
);
3185 goto err_set_queues
;
3187 err
= netif_set_real_num_rx_queues(adapter
->netdev
,
3188 adapter
->num_rx_queues
);
3190 goto err_set_queues
;
3192 /* From here on the code is the same as igb_up() */
3193 clear_bit(__IGB_DOWN
, &adapter
->state
);
3195 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
3196 napi_enable(&(adapter
->q_vector
[i
]->napi
));
3198 /* Clear any pending interrupts. */
3201 igb_irq_enable(adapter
);
3203 /* notify VFs that reset has been completed */
3204 if (adapter
->vfs_allocated_count
) {
3205 u32 reg_data
= rd32(E1000_CTRL_EXT
);
3207 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
3208 wr32(E1000_CTRL_EXT
, reg_data
);
3211 netif_tx_start_all_queues(netdev
);
3214 pm_runtime_put(&pdev
->dev
);
3216 /* start the watchdog. */
3217 hw
->mac
.get_link_status
= 1;
3218 schedule_work(&adapter
->watchdog_task
);
3223 igb_free_irq(adapter
);
3225 igb_release_hw_control(adapter
);
3226 igb_power_down_link(adapter
);
3227 igb_free_all_rx_resources(adapter
);
3229 igb_free_all_tx_resources(adapter
);
3233 pm_runtime_put(&pdev
->dev
);
3238 int igb_open(struct net_device
*netdev
)
3240 return __igb_open(netdev
, false);
3244 * igb_close - Disables a network interface
3245 * @netdev: network interface device structure
3247 * Returns 0, this is not allowed to fail
3249 * The close entry point is called when an interface is de-activated
3250 * by the OS. The hardware is still under the driver's control, but
3251 * needs to be disabled. A global MAC reset is issued to stop the
3252 * hardware, and all transmit and receive resources are freed.
3254 static int __igb_close(struct net_device
*netdev
, bool suspending
)
3256 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3257 struct pci_dev
*pdev
= adapter
->pdev
;
3259 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
3262 pm_runtime_get_sync(&pdev
->dev
);
3265 igb_free_irq(adapter
);
3267 igb_nfc_filter_exit(adapter
);
3269 igb_free_all_tx_resources(adapter
);
3270 igb_free_all_rx_resources(adapter
);
3273 pm_runtime_put_sync(&pdev
->dev
);
3277 int igb_close(struct net_device
*netdev
)
3279 return __igb_close(netdev
, false);
3283 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3284 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3286 * Return 0 on success, negative on failure
3288 int igb_setup_tx_resources(struct igb_ring
*tx_ring
)
3290 struct device
*dev
= tx_ring
->dev
;
3293 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3295 tx_ring
->tx_buffer_info
= vzalloc(size
);
3296 if (!tx_ring
->tx_buffer_info
)
3299 /* round up to nearest 4K */
3300 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
3301 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
3303 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
3304 &tx_ring
->dma
, GFP_KERNEL
);
3308 tx_ring
->next_to_use
= 0;
3309 tx_ring
->next_to_clean
= 0;
3314 vfree(tx_ring
->tx_buffer_info
);
3315 tx_ring
->tx_buffer_info
= NULL
;
3316 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
3321 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3322 * (Descriptors) for all queues
3323 * @adapter: board private structure
3325 * Return 0 on success, negative on failure
3327 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
3329 struct pci_dev
*pdev
= adapter
->pdev
;
3332 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3333 err
= igb_setup_tx_resources(adapter
->tx_ring
[i
]);
3336 "Allocation for Tx Queue %u failed\n", i
);
3337 for (i
--; i
>= 0; i
--)
3338 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3347 * igb_setup_tctl - configure the transmit control registers
3348 * @adapter: Board private structure
3350 void igb_setup_tctl(struct igb_adapter
*adapter
)
3352 struct e1000_hw
*hw
= &adapter
->hw
;
3355 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3356 wr32(E1000_TXDCTL(0), 0);
3358 /* Program the Transmit Control Register */
3359 tctl
= rd32(E1000_TCTL
);
3360 tctl
&= ~E1000_TCTL_CT
;
3361 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
3362 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
3364 igb_config_collision_dist(hw
);
3366 /* Enable transmits */
3367 tctl
|= E1000_TCTL_EN
;
3369 wr32(E1000_TCTL
, tctl
);
3373 * igb_configure_tx_ring - Configure transmit ring after Reset
3374 * @adapter: board private structure
3375 * @ring: tx ring to configure
3377 * Configure a transmit ring after a reset.
3379 void igb_configure_tx_ring(struct igb_adapter
*adapter
,
3380 struct igb_ring
*ring
)
3382 struct e1000_hw
*hw
= &adapter
->hw
;
3384 u64 tdba
= ring
->dma
;
3385 int reg_idx
= ring
->reg_idx
;
3387 /* disable the queue */
3388 wr32(E1000_TXDCTL(reg_idx
), 0);
3392 wr32(E1000_TDLEN(reg_idx
),
3393 ring
->count
* sizeof(union e1000_adv_tx_desc
));
3394 wr32(E1000_TDBAL(reg_idx
),
3395 tdba
& 0x00000000ffffffffULL
);
3396 wr32(E1000_TDBAH(reg_idx
), tdba
>> 32);
3398 ring
->tail
= hw
->hw_addr
+ E1000_TDT(reg_idx
);
3399 wr32(E1000_TDH(reg_idx
), 0);
3400 writel(0, ring
->tail
);
3402 txdctl
|= IGB_TX_PTHRESH
;
3403 txdctl
|= IGB_TX_HTHRESH
<< 8;
3404 txdctl
|= IGB_TX_WTHRESH
<< 16;
3406 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
3407 wr32(E1000_TXDCTL(reg_idx
), txdctl
);
3411 * igb_configure_tx - Configure transmit Unit after Reset
3412 * @adapter: board private structure
3414 * Configure the Tx unit of the MAC after a reset.
3416 static void igb_configure_tx(struct igb_adapter
*adapter
)
3420 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3421 igb_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3425 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3426 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3428 * Returns 0 on success, negative on failure
3430 int igb_setup_rx_resources(struct igb_ring
*rx_ring
)
3432 struct device
*dev
= rx_ring
->dev
;
3435 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3437 rx_ring
->rx_buffer_info
= vzalloc(size
);
3438 if (!rx_ring
->rx_buffer_info
)
3441 /* Round up to nearest 4K */
3442 rx_ring
->size
= rx_ring
->count
* sizeof(union e1000_adv_rx_desc
);
3443 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
3445 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
3446 &rx_ring
->dma
, GFP_KERNEL
);
3450 rx_ring
->next_to_alloc
= 0;
3451 rx_ring
->next_to_clean
= 0;
3452 rx_ring
->next_to_use
= 0;
3457 vfree(rx_ring
->rx_buffer_info
);
3458 rx_ring
->rx_buffer_info
= NULL
;
3459 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
3464 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3465 * (Descriptors) for all queues
3466 * @adapter: board private structure
3468 * Return 0 on success, negative on failure
3470 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
3472 struct pci_dev
*pdev
= adapter
->pdev
;
3475 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3476 err
= igb_setup_rx_resources(adapter
->rx_ring
[i
]);
3479 "Allocation for Rx Queue %u failed\n", i
);
3480 for (i
--; i
>= 0; i
--)
3481 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3490 * igb_setup_mrqc - configure the multiple receive queue control registers
3491 * @adapter: Board private structure
3493 static void igb_setup_mrqc(struct igb_adapter
*adapter
)
3495 struct e1000_hw
*hw
= &adapter
->hw
;
3497 u32 j
, num_rx_queues
;
3500 netdev_rss_key_fill(rss_key
, sizeof(rss_key
));
3501 for (j
= 0; j
< 10; j
++)
3502 wr32(E1000_RSSRK(j
), rss_key
[j
]);
3504 num_rx_queues
= adapter
->rss_queues
;
3506 switch (hw
->mac
.type
) {
3508 /* 82576 supports 2 RSS queues for SR-IOV */
3509 if (adapter
->vfs_allocated_count
)
3516 if (adapter
->rss_indir_tbl_init
!= num_rx_queues
) {
3517 for (j
= 0; j
< IGB_RETA_SIZE
; j
++)
3518 adapter
->rss_indir_tbl
[j
] =
3519 (j
* num_rx_queues
) / IGB_RETA_SIZE
;
3520 adapter
->rss_indir_tbl_init
= num_rx_queues
;
3522 igb_write_rss_indir_tbl(adapter
);
3524 /* Disable raw packet checksumming so that RSS hash is placed in
3525 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3526 * offloads as they are enabled by default
3528 rxcsum
= rd32(E1000_RXCSUM
);
3529 rxcsum
|= E1000_RXCSUM_PCSD
;
3531 if (adapter
->hw
.mac
.type
>= e1000_82576
)
3532 /* Enable Receive Checksum Offload for SCTP */
3533 rxcsum
|= E1000_RXCSUM_CRCOFL
;
3535 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3536 wr32(E1000_RXCSUM
, rxcsum
);
3538 /* Generate RSS hash based on packet types, TCP/UDP
3539 * port numbers and/or IPv4/v6 src and dst addresses
3541 mrqc
= E1000_MRQC_RSS_FIELD_IPV4
|
3542 E1000_MRQC_RSS_FIELD_IPV4_TCP
|
3543 E1000_MRQC_RSS_FIELD_IPV6
|
3544 E1000_MRQC_RSS_FIELD_IPV6_TCP
|
3545 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
;
3547 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV4_UDP
)
3548 mrqc
|= E1000_MRQC_RSS_FIELD_IPV4_UDP
;
3549 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV6_UDP
)
3550 mrqc
|= E1000_MRQC_RSS_FIELD_IPV6_UDP
;
3552 /* If VMDq is enabled then we set the appropriate mode for that, else
3553 * we default to RSS so that an RSS hash is calculated per packet even
3554 * if we are only using one queue
3556 if (adapter
->vfs_allocated_count
) {
3557 if (hw
->mac
.type
> e1000_82575
) {
3558 /* Set the default pool for the PF's first queue */
3559 u32 vtctl
= rd32(E1000_VT_CTL
);
3561 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
3562 E1000_VT_CTL_DISABLE_DEF_POOL
);
3563 vtctl
|= adapter
->vfs_allocated_count
<<
3564 E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
3565 wr32(E1000_VT_CTL
, vtctl
);
3567 if (adapter
->rss_queues
> 1)
3568 mrqc
|= E1000_MRQC_ENABLE_VMDQ_RSS_MQ
;
3570 mrqc
|= E1000_MRQC_ENABLE_VMDQ
;
3572 if (hw
->mac
.type
!= e1000_i211
)
3573 mrqc
|= E1000_MRQC_ENABLE_RSS_MQ
;
3575 igb_vmm_control(adapter
);
3577 wr32(E1000_MRQC
, mrqc
);
3581 * igb_setup_rctl - configure the receive control registers
3582 * @adapter: Board private structure
3584 void igb_setup_rctl(struct igb_adapter
*adapter
)
3586 struct e1000_hw
*hw
= &adapter
->hw
;
3589 rctl
= rd32(E1000_RCTL
);
3591 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
3592 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
3594 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
3595 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
3597 /* enable stripping of CRC. It's unlikely this will break BMC
3598 * redirection as it did with e1000. Newer features require
3599 * that the HW strips the CRC.
3601 rctl
|= E1000_RCTL_SECRC
;
3603 /* disable store bad packets and clear size bits. */
3604 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
3606 /* enable LPE to allow for reception of jumbo frames */
3607 rctl
|= E1000_RCTL_LPE
;
3609 /* disable queue 0 to prevent tail write w/o re-config */
3610 wr32(E1000_RXDCTL(0), 0);
3612 /* Attention!!! For SR-IOV PF driver operations you must enable
3613 * queue drop for all VF and PF queues to prevent head of line blocking
3614 * if an un-trusted VF does not provide descriptors to hardware.
3616 if (adapter
->vfs_allocated_count
) {
3617 /* set all queue drop enable bits */
3618 wr32(E1000_QDE
, ALL_QUEUES
);
3621 /* This is useful for sniffing bad packets. */
3622 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3623 /* UPE and MPE will be handled by normal PROMISC logic
3624 * in e1000e_set_rx_mode
3626 rctl
|= (E1000_RCTL_SBP
| /* Receive bad packets */
3627 E1000_RCTL_BAM
| /* RX All Bcast Pkts */
3628 E1000_RCTL_PMCF
); /* RX All MAC Ctrl Pkts */
3630 rctl
&= ~(E1000_RCTL_DPF
| /* Allow filtered pause */
3631 E1000_RCTL_CFIEN
); /* Dis VLAN CFIEN Filter */
3632 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3633 * and that breaks VLANs.
3637 wr32(E1000_RCTL
, rctl
);
3640 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
3643 struct e1000_hw
*hw
= &adapter
->hw
;
3646 if (size
> MAX_JUMBO_FRAME_SIZE
)
3647 size
= MAX_JUMBO_FRAME_SIZE
;
3649 vmolr
= rd32(E1000_VMOLR(vfn
));
3650 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
3651 vmolr
|= size
| E1000_VMOLR_LPE
;
3652 wr32(E1000_VMOLR(vfn
), vmolr
);
3657 static inline void igb_set_vf_vlan_strip(struct igb_adapter
*adapter
,
3658 int vfn
, bool enable
)
3660 struct e1000_hw
*hw
= &adapter
->hw
;
3663 if (hw
->mac
.type
< e1000_82576
)
3666 if (hw
->mac
.type
== e1000_i350
)
3667 reg
= E1000_DVMOLR(vfn
);
3669 reg
= E1000_VMOLR(vfn
);
3673 val
|= E1000_VMOLR_STRVLAN
;
3675 val
&= ~(E1000_VMOLR_STRVLAN
);
3679 static inline void igb_set_vmolr(struct igb_adapter
*adapter
,
3682 struct e1000_hw
*hw
= &adapter
->hw
;
3685 /* This register exists only on 82576 and newer so if we are older then
3686 * we should exit and do nothing
3688 if (hw
->mac
.type
< e1000_82576
)
3691 vmolr
= rd32(E1000_VMOLR(vfn
));
3693 vmolr
|= E1000_VMOLR_AUPE
; /* Accept untagged packets */
3695 vmolr
&= ~(E1000_VMOLR_AUPE
); /* Tagged packets ONLY */
3697 /* clear all bits that might not be set */
3698 vmolr
&= ~(E1000_VMOLR_BAM
| E1000_VMOLR_RSSE
);
3700 if (adapter
->rss_queues
> 1 && vfn
== adapter
->vfs_allocated_count
)
3701 vmolr
|= E1000_VMOLR_RSSE
; /* enable RSS */
3702 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3705 if (vfn
<= adapter
->vfs_allocated_count
)
3706 vmolr
|= E1000_VMOLR_BAM
; /* Accept broadcast */
3708 wr32(E1000_VMOLR(vfn
), vmolr
);
3712 * igb_configure_rx_ring - Configure a receive ring after Reset
3713 * @adapter: board private structure
3714 * @ring: receive ring to be configured
3716 * Configure the Rx unit of the MAC after a reset.
3718 void igb_configure_rx_ring(struct igb_adapter
*adapter
,
3719 struct igb_ring
*ring
)
3721 struct e1000_hw
*hw
= &adapter
->hw
;
3722 u64 rdba
= ring
->dma
;
3723 int reg_idx
= ring
->reg_idx
;
3724 u32 srrctl
= 0, rxdctl
= 0;
3726 /* disable the queue */
3727 wr32(E1000_RXDCTL(reg_idx
), 0);
3729 /* Set DMA base address registers */
3730 wr32(E1000_RDBAL(reg_idx
),
3731 rdba
& 0x00000000ffffffffULL
);
3732 wr32(E1000_RDBAH(reg_idx
), rdba
>> 32);
3733 wr32(E1000_RDLEN(reg_idx
),
3734 ring
->count
* sizeof(union e1000_adv_rx_desc
));
3736 /* initialize head and tail */
3737 ring
->tail
= hw
->hw_addr
+ E1000_RDT(reg_idx
);
3738 wr32(E1000_RDH(reg_idx
), 0);
3739 writel(0, ring
->tail
);
3741 /* set descriptor configuration */
3742 srrctl
= IGB_RX_HDR_LEN
<< E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3743 srrctl
|= IGB_RX_BUFSZ
>> E1000_SRRCTL_BSIZEPKT_SHIFT
;
3744 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3745 if (hw
->mac
.type
>= e1000_82580
)
3746 srrctl
|= E1000_SRRCTL_TIMESTAMP
;
3747 /* Only set Drop Enable if we are supporting multiple queues */
3748 if (adapter
->vfs_allocated_count
|| adapter
->num_rx_queues
> 1)
3749 srrctl
|= E1000_SRRCTL_DROP_EN
;
3751 wr32(E1000_SRRCTL(reg_idx
), srrctl
);
3753 /* set filtering for VMDQ pools */
3754 igb_set_vmolr(adapter
, reg_idx
& 0x7, true);
3756 rxdctl
|= IGB_RX_PTHRESH
;
3757 rxdctl
|= IGB_RX_HTHRESH
<< 8;
3758 rxdctl
|= IGB_RX_WTHRESH
<< 16;
3760 /* enable receive descriptor fetching */
3761 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
3762 wr32(E1000_RXDCTL(reg_idx
), rxdctl
);
3766 * igb_configure_rx - Configure receive Unit after Reset
3767 * @adapter: board private structure
3769 * Configure the Rx unit of the MAC after a reset.
3771 static void igb_configure_rx(struct igb_adapter
*adapter
)
3775 /* set the correct pool for the PF default MAC address in entry 0 */
3776 igb_rar_set_qsel(adapter
, adapter
->hw
.mac
.addr
, 0,
3777 adapter
->vfs_allocated_count
);
3779 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3780 * the Base and Length of the Rx Descriptor Ring
3782 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3783 igb_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3787 * igb_free_tx_resources - Free Tx Resources per Queue
3788 * @tx_ring: Tx descriptor ring for a specific queue
3790 * Free all transmit software resources
3792 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
3794 igb_clean_tx_ring(tx_ring
);
3796 vfree(tx_ring
->tx_buffer_info
);
3797 tx_ring
->tx_buffer_info
= NULL
;
3799 /* if not set, then don't free */
3803 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
3804 tx_ring
->desc
, tx_ring
->dma
);
3806 tx_ring
->desc
= NULL
;
3810 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3811 * @adapter: board private structure
3813 * Free all transmit software resources
3815 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
3819 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3820 if (adapter
->tx_ring
[i
])
3821 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3824 void igb_unmap_and_free_tx_resource(struct igb_ring
*ring
,
3825 struct igb_tx_buffer
*tx_buffer
)
3827 if (tx_buffer
->skb
) {
3828 dev_kfree_skb_any(tx_buffer
->skb
);
3829 if (dma_unmap_len(tx_buffer
, len
))
3830 dma_unmap_single(ring
->dev
,
3831 dma_unmap_addr(tx_buffer
, dma
),
3832 dma_unmap_len(tx_buffer
, len
),
3834 } else if (dma_unmap_len(tx_buffer
, len
)) {
3835 dma_unmap_page(ring
->dev
,
3836 dma_unmap_addr(tx_buffer
, dma
),
3837 dma_unmap_len(tx_buffer
, len
),
3840 tx_buffer
->next_to_watch
= NULL
;
3841 tx_buffer
->skb
= NULL
;
3842 dma_unmap_len_set(tx_buffer
, len
, 0);
3843 /* buffer_info must be completely set up in the transmit path */
3847 * igb_clean_tx_ring - Free Tx Buffers
3848 * @tx_ring: ring to be cleaned
3850 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
3852 struct igb_tx_buffer
*buffer_info
;
3856 if (!tx_ring
->tx_buffer_info
)
3858 /* Free all the Tx ring sk_buffs */
3860 for (i
= 0; i
< tx_ring
->count
; i
++) {
3861 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3862 igb_unmap_and_free_tx_resource(tx_ring
, buffer_info
);
3865 netdev_tx_reset_queue(txring_txq(tx_ring
));
3867 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3868 memset(tx_ring
->tx_buffer_info
, 0, size
);
3870 /* Zero out the descriptor ring */
3871 memset(tx_ring
->desc
, 0, tx_ring
->size
);
3873 tx_ring
->next_to_use
= 0;
3874 tx_ring
->next_to_clean
= 0;
3878 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3879 * @adapter: board private structure
3881 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
3885 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3886 if (adapter
->tx_ring
[i
])
3887 igb_clean_tx_ring(adapter
->tx_ring
[i
]);
3891 * igb_free_rx_resources - Free Rx Resources
3892 * @rx_ring: ring to clean the resources from
3894 * Free all receive software resources
3896 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
3898 igb_clean_rx_ring(rx_ring
);
3900 vfree(rx_ring
->rx_buffer_info
);
3901 rx_ring
->rx_buffer_info
= NULL
;
3903 /* if not set, then don't free */
3907 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
3908 rx_ring
->desc
, rx_ring
->dma
);
3910 rx_ring
->desc
= NULL
;
3914 * igb_free_all_rx_resources - Free Rx Resources for All Queues
3915 * @adapter: board private structure
3917 * Free all receive software resources
3919 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
3923 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3924 if (adapter
->rx_ring
[i
])
3925 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3929 * igb_clean_rx_ring - Free Rx Buffers per Queue
3930 * @rx_ring: ring to free buffers from
3932 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
3938 dev_kfree_skb(rx_ring
->skb
);
3939 rx_ring
->skb
= NULL
;
3941 if (!rx_ring
->rx_buffer_info
)
3944 /* Free all the Rx ring sk_buffs */
3945 for (i
= 0; i
< rx_ring
->count
; i
++) {
3946 struct igb_rx_buffer
*buffer_info
= &rx_ring
->rx_buffer_info
[i
];
3948 if (!buffer_info
->page
)
3951 /* Invalidate cache lines that may have been written to by
3952 * device so that we avoid corrupting memory.
3954 dma_sync_single_range_for_cpu(rx_ring
->dev
,
3956 buffer_info
->page_offset
,
3960 /* free resources associated with mapping */
3961 dma_unmap_page_attrs(rx_ring
->dev
,
3965 DMA_ATTR_SKIP_CPU_SYNC
);
3966 __page_frag_cache_drain(buffer_info
->page
,
3967 buffer_info
->pagecnt_bias
);
3969 buffer_info
->page
= NULL
;
3972 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3973 memset(rx_ring
->rx_buffer_info
, 0, size
);
3975 /* Zero out the descriptor ring */
3976 memset(rx_ring
->desc
, 0, rx_ring
->size
);
3978 rx_ring
->next_to_alloc
= 0;
3979 rx_ring
->next_to_clean
= 0;
3980 rx_ring
->next_to_use
= 0;
3984 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3985 * @adapter: board private structure
3987 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
3991 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3992 if (adapter
->rx_ring
[i
])
3993 igb_clean_rx_ring(adapter
->rx_ring
[i
]);
3997 * igb_set_mac - Change the Ethernet Address of the NIC
3998 * @netdev: network interface device structure
3999 * @p: pointer to an address structure
4001 * Returns 0 on success, negative on failure
4003 static int igb_set_mac(struct net_device
*netdev
, void *p
)
4005 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4006 struct e1000_hw
*hw
= &adapter
->hw
;
4007 struct sockaddr
*addr
= p
;
4009 if (!is_valid_ether_addr(addr
->sa_data
))
4010 return -EADDRNOTAVAIL
;
4012 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
4013 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
4015 /* set the correct pool for the new PF MAC address in entry 0 */
4016 igb_rar_set_qsel(adapter
, hw
->mac
.addr
, 0,
4017 adapter
->vfs_allocated_count
);
4023 * igb_write_mc_addr_list - write multicast addresses to MTA
4024 * @netdev: network interface device structure
4026 * Writes multicast address list to the MTA hash table.
4027 * Returns: -ENOMEM on failure
4028 * 0 on no addresses written
4029 * X on writing X addresses to MTA
4031 static int igb_write_mc_addr_list(struct net_device
*netdev
)
4033 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4034 struct e1000_hw
*hw
= &adapter
->hw
;
4035 struct netdev_hw_addr
*ha
;
4039 if (netdev_mc_empty(netdev
)) {
4040 /* nothing to program, so clear mc list */
4041 igb_update_mc_addr_list(hw
, NULL
, 0);
4042 igb_restore_vf_multicasts(adapter
);
4046 mta_list
= kzalloc(netdev_mc_count(netdev
) * 6, GFP_ATOMIC
);
4050 /* The shared function expects a packed array of only addresses. */
4052 netdev_for_each_mc_addr(ha
, netdev
)
4053 memcpy(mta_list
+ (i
++ * ETH_ALEN
), ha
->addr
, ETH_ALEN
);
4055 igb_update_mc_addr_list(hw
, mta_list
, i
);
4058 return netdev_mc_count(netdev
);
4062 * igb_write_uc_addr_list - write unicast addresses to RAR table
4063 * @netdev: network interface device structure
4065 * Writes unicast address list to the RAR table.
4066 * Returns: -ENOMEM on failure/insufficient address space
4067 * 0 on no addresses written
4068 * X on writing X addresses to the RAR table
4070 static int igb_write_uc_addr_list(struct net_device
*netdev
)
4072 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4073 struct e1000_hw
*hw
= &adapter
->hw
;
4074 unsigned int vfn
= adapter
->vfs_allocated_count
;
4075 unsigned int rar_entries
= hw
->mac
.rar_entry_count
- (vfn
+ 1);
4078 /* return ENOMEM indicating insufficient memory for addresses */
4079 if (netdev_uc_count(netdev
) > rar_entries
)
4082 if (!netdev_uc_empty(netdev
) && rar_entries
) {
4083 struct netdev_hw_addr
*ha
;
4085 netdev_for_each_uc_addr(ha
, netdev
) {
4088 igb_rar_set_qsel(adapter
, ha
->addr
,
4094 /* write the addresses in reverse order to avoid write combining */
4095 for (; rar_entries
> 0 ; rar_entries
--) {
4096 wr32(E1000_RAH(rar_entries
), 0);
4097 wr32(E1000_RAL(rar_entries
), 0);
4104 static int igb_vlan_promisc_enable(struct igb_adapter
*adapter
)
4106 struct e1000_hw
*hw
= &adapter
->hw
;
4109 switch (hw
->mac
.type
) {
4113 /* VLAN filtering needed for VLAN prio filter */
4114 if (adapter
->netdev
->features
& NETIF_F_NTUPLE
)
4120 /* VLAN filtering needed for pool filtering */
4121 if (adapter
->vfs_allocated_count
)
4128 /* We are already in VLAN promisc, nothing to do */
4129 if (adapter
->flags
& IGB_FLAG_VLAN_PROMISC
)
4132 if (!adapter
->vfs_allocated_count
)
4135 /* Add PF to all active pools */
4136 pf_id
= adapter
->vfs_allocated_count
+ E1000_VLVF_POOLSEL_SHIFT
;
4138 for (i
= E1000_VLVF_ARRAY_SIZE
; --i
;) {
4139 u32 vlvf
= rd32(E1000_VLVF(i
));
4142 wr32(E1000_VLVF(i
), vlvf
);
4146 /* Set all bits in the VLAN filter table array */
4147 for (i
= E1000_VLAN_FILTER_TBL_SIZE
; i
--;)
4148 hw
->mac
.ops
.write_vfta(hw
, i
, ~0U);
4150 /* Set flag so we don't redo unnecessary work */
4151 adapter
->flags
|= IGB_FLAG_VLAN_PROMISC
;
4156 #define VFTA_BLOCK_SIZE 8
4157 static void igb_scrub_vfta(struct igb_adapter
*adapter
, u32 vfta_offset
)
4159 struct e1000_hw
*hw
= &adapter
->hw
;
4160 u32 vfta
[VFTA_BLOCK_SIZE
] = { 0 };
4161 u32 vid_start
= vfta_offset
* 32;
4162 u32 vid_end
= vid_start
+ (VFTA_BLOCK_SIZE
* 32);
4163 u32 i
, vid
, word
, bits
, pf_id
;
4165 /* guarantee that we don't scrub out management VLAN */
4166 vid
= adapter
->mng_vlan_id
;
4167 if (vid
>= vid_start
&& vid
< vid_end
)
4168 vfta
[(vid
- vid_start
) / 32] |= BIT(vid
% 32);
4170 if (!adapter
->vfs_allocated_count
)
4173 pf_id
= adapter
->vfs_allocated_count
+ E1000_VLVF_POOLSEL_SHIFT
;
4175 for (i
= E1000_VLVF_ARRAY_SIZE
; --i
;) {
4176 u32 vlvf
= rd32(E1000_VLVF(i
));
4178 /* pull VLAN ID from VLVF */
4179 vid
= vlvf
& VLAN_VID_MASK
;
4181 /* only concern ourselves with a certain range */
4182 if (vid
< vid_start
|| vid
>= vid_end
)
4185 if (vlvf
& E1000_VLVF_VLANID_ENABLE
) {
4186 /* record VLAN ID in VFTA */
4187 vfta
[(vid
- vid_start
) / 32] |= BIT(vid
% 32);
4189 /* if PF is part of this then continue */
4190 if (test_bit(vid
, adapter
->active_vlans
))
4194 /* remove PF from the pool */
4196 bits
&= rd32(E1000_VLVF(i
));
4197 wr32(E1000_VLVF(i
), bits
);
4201 /* extract values from active_vlans and write back to VFTA */
4202 for (i
= VFTA_BLOCK_SIZE
; i
--;) {
4203 vid
= (vfta_offset
+ i
) * 32;
4204 word
= vid
/ BITS_PER_LONG
;
4205 bits
= vid
% BITS_PER_LONG
;
4207 vfta
[i
] |= adapter
->active_vlans
[word
] >> bits
;
4209 hw
->mac
.ops
.write_vfta(hw
, vfta_offset
+ i
, vfta
[i
]);
4213 static void igb_vlan_promisc_disable(struct igb_adapter
*adapter
)
4217 /* We are not in VLAN promisc, nothing to do */
4218 if (!(adapter
->flags
& IGB_FLAG_VLAN_PROMISC
))
4221 /* Set flag so we don't redo unnecessary work */
4222 adapter
->flags
&= ~IGB_FLAG_VLAN_PROMISC
;
4224 for (i
= 0; i
< E1000_VLAN_FILTER_TBL_SIZE
; i
+= VFTA_BLOCK_SIZE
)
4225 igb_scrub_vfta(adapter
, i
);
4229 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4230 * @netdev: network interface device structure
4232 * The set_rx_mode entry point is called whenever the unicast or multicast
4233 * address lists or the network interface flags are updated. This routine is
4234 * responsible for configuring the hardware for proper unicast, multicast,
4235 * promiscuous mode, and all-multi behavior.
4237 static void igb_set_rx_mode(struct net_device
*netdev
)
4239 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4240 struct e1000_hw
*hw
= &adapter
->hw
;
4241 unsigned int vfn
= adapter
->vfs_allocated_count
;
4242 u32 rctl
= 0, vmolr
= 0;
4245 /* Check for Promiscuous and All Multicast modes */
4246 if (netdev
->flags
& IFF_PROMISC
) {
4247 rctl
|= E1000_RCTL_UPE
| E1000_RCTL_MPE
;
4248 vmolr
|= E1000_VMOLR_MPME
;
4250 /* enable use of UTA filter to force packets to default pool */
4251 if (hw
->mac
.type
== e1000_82576
)
4252 vmolr
|= E1000_VMOLR_ROPE
;
4254 if (netdev
->flags
& IFF_ALLMULTI
) {
4255 rctl
|= E1000_RCTL_MPE
;
4256 vmolr
|= E1000_VMOLR_MPME
;
4258 /* Write addresses to the MTA, if the attempt fails
4259 * then we should just turn on promiscuous mode so
4260 * that we can at least receive multicast traffic
4262 count
= igb_write_mc_addr_list(netdev
);
4264 rctl
|= E1000_RCTL_MPE
;
4265 vmolr
|= E1000_VMOLR_MPME
;
4267 vmolr
|= E1000_VMOLR_ROMPE
;
4272 /* Write addresses to available RAR registers, if there is not
4273 * sufficient space to store all the addresses then enable
4274 * unicast promiscuous mode
4276 count
= igb_write_uc_addr_list(netdev
);
4278 rctl
|= E1000_RCTL_UPE
;
4279 vmolr
|= E1000_VMOLR_ROPE
;
4282 /* enable VLAN filtering by default */
4283 rctl
|= E1000_RCTL_VFE
;
4285 /* disable VLAN filtering for modes that require it */
4286 if ((netdev
->flags
& IFF_PROMISC
) ||
4287 (netdev
->features
& NETIF_F_RXALL
)) {
4288 /* if we fail to set all rules then just clear VFE */
4289 if (igb_vlan_promisc_enable(adapter
))
4290 rctl
&= ~E1000_RCTL_VFE
;
4292 igb_vlan_promisc_disable(adapter
);
4295 /* update state of unicast, multicast, and VLAN filtering modes */
4296 rctl
|= rd32(E1000_RCTL
) & ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
|
4298 wr32(E1000_RCTL
, rctl
);
4300 /* In order to support SR-IOV and eventually VMDq it is necessary to set
4301 * the VMOLR to enable the appropriate modes. Without this workaround
4302 * we will have issues with VLAN tag stripping not being done for frames
4303 * that are only arriving because we are the default pool
4305 if ((hw
->mac
.type
< e1000_82576
) || (hw
->mac
.type
> e1000_i350
))
4308 /* set UTA to appropriate mode */
4309 igb_set_uta(adapter
, !!(vmolr
& E1000_VMOLR_ROPE
));
4311 vmolr
|= rd32(E1000_VMOLR(vfn
)) &
4312 ~(E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
| E1000_VMOLR_ROMPE
);
4314 /* enable Rx jumbo frames, no need for restriction */
4315 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
4316 vmolr
|= MAX_JUMBO_FRAME_SIZE
| E1000_VMOLR_LPE
;
4318 wr32(E1000_VMOLR(vfn
), vmolr
);
4319 wr32(E1000_RLPML
, MAX_JUMBO_FRAME_SIZE
);
4321 igb_restore_vf_multicasts(adapter
);
4324 static void igb_check_wvbr(struct igb_adapter
*adapter
)
4326 struct e1000_hw
*hw
= &adapter
->hw
;
4329 switch (hw
->mac
.type
) {
4332 wvbr
= rd32(E1000_WVBR
);
4340 adapter
->wvbr
|= wvbr
;
4343 #define IGB_STAGGERED_QUEUE_OFFSET 8
4345 static void igb_spoof_check(struct igb_adapter
*adapter
)
4352 for (j
= 0; j
< adapter
->vfs_allocated_count
; j
++) {
4353 if (adapter
->wvbr
& BIT(j
) ||
4354 adapter
->wvbr
& BIT(j
+ IGB_STAGGERED_QUEUE_OFFSET
)) {
4355 dev_warn(&adapter
->pdev
->dev
,
4356 "Spoof event(s) detected on VF %d\n", j
);
4359 BIT(j
+ IGB_STAGGERED_QUEUE_OFFSET
));
4364 /* Need to wait a few seconds after link up to get diagnostic information from
4367 static void igb_update_phy_info(unsigned long data
)
4369 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
4370 igb_get_phy_info(&adapter
->hw
);
4374 * igb_has_link - check shared code for link and determine up/down
4375 * @adapter: pointer to driver private info
4377 bool igb_has_link(struct igb_adapter
*adapter
)
4379 struct e1000_hw
*hw
= &adapter
->hw
;
4380 bool link_active
= false;
4382 /* get_link_status is set on LSC (link status) interrupt or
4383 * rx sequence error interrupt. get_link_status will stay
4384 * false until the e1000_check_for_link establishes link
4385 * for copper adapters ONLY
4387 switch (hw
->phy
.media_type
) {
4388 case e1000_media_type_copper
:
4389 if (!hw
->mac
.get_link_status
)
4391 case e1000_media_type_internal_serdes
:
4392 hw
->mac
.ops
.check_for_link(hw
);
4393 link_active
= !hw
->mac
.get_link_status
;
4396 case e1000_media_type_unknown
:
4400 if (((hw
->mac
.type
== e1000_i210
) ||
4401 (hw
->mac
.type
== e1000_i211
)) &&
4402 (hw
->phy
.id
== I210_I_PHY_ID
)) {
4403 if (!netif_carrier_ok(adapter
->netdev
)) {
4404 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
4405 } else if (!(adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
)) {
4406 adapter
->flags
|= IGB_FLAG_NEED_LINK_UPDATE
;
4407 adapter
->link_check_timeout
= jiffies
;
4414 static bool igb_thermal_sensor_event(struct e1000_hw
*hw
, u32 event
)
4417 u32 ctrl_ext
, thstat
;
4419 /* check for thermal sensor event on i350 copper only */
4420 if (hw
->mac
.type
== e1000_i350
) {
4421 thstat
= rd32(E1000_THSTAT
);
4422 ctrl_ext
= rd32(E1000_CTRL_EXT
);
4424 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
4425 !(ctrl_ext
& E1000_CTRL_EXT_LINK_MODE_SGMII
))
4426 ret
= !!(thstat
& event
);
4433 * igb_check_lvmmc - check for malformed packets received
4434 * and indicated in LVMMC register
4435 * @adapter: pointer to adapter
4437 static void igb_check_lvmmc(struct igb_adapter
*adapter
)
4439 struct e1000_hw
*hw
= &adapter
->hw
;
4442 lvmmc
= rd32(E1000_LVMMC
);
4444 if (unlikely(net_ratelimit())) {
4445 netdev_warn(adapter
->netdev
,
4446 "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4453 * igb_watchdog - Timer Call-back
4454 * @data: pointer to adapter cast into an unsigned long
4456 static void igb_watchdog(unsigned long data
)
4458 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
4459 /* Do the rest outside of interrupt context */
4460 schedule_work(&adapter
->watchdog_task
);
4463 static void igb_watchdog_task(struct work_struct
*work
)
4465 struct igb_adapter
*adapter
= container_of(work
,
4468 struct e1000_hw
*hw
= &adapter
->hw
;
4469 struct e1000_phy_info
*phy
= &hw
->phy
;
4470 struct net_device
*netdev
= adapter
->netdev
;
4474 u16 phy_data
, retry_count
= 20;
4476 link
= igb_has_link(adapter
);
4478 if (adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
) {
4479 if (time_after(jiffies
, (adapter
->link_check_timeout
+ HZ
)))
4480 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
4485 /* Force link down if we have fiber to swap to */
4486 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
4487 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
4488 connsw
= rd32(E1000_CONNSW
);
4489 if (!(connsw
& E1000_CONNSW_AUTOSENSE_EN
))
4494 /* Perform a reset if the media type changed. */
4495 if (hw
->dev_spec
._82575
.media_changed
) {
4496 hw
->dev_spec
._82575
.media_changed
= false;
4497 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
4500 /* Cancel scheduled suspend requests. */
4501 pm_runtime_resume(netdev
->dev
.parent
);
4503 if (!netif_carrier_ok(netdev
)) {
4506 hw
->mac
.ops
.get_speed_and_duplex(hw
,
4507 &adapter
->link_speed
,
4508 &adapter
->link_duplex
);
4510 ctrl
= rd32(E1000_CTRL
);
4511 /* Links status message must follow this format */
4513 "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4515 adapter
->link_speed
,
4516 adapter
->link_duplex
== FULL_DUPLEX
?
4518 (ctrl
& E1000_CTRL_TFCE
) &&
4519 (ctrl
& E1000_CTRL_RFCE
) ? "RX/TX" :
4520 (ctrl
& E1000_CTRL_RFCE
) ? "RX" :
4521 (ctrl
& E1000_CTRL_TFCE
) ? "TX" : "None");
4523 /* disable EEE if enabled */
4524 if ((adapter
->flags
& IGB_FLAG_EEE
) &&
4525 (adapter
->link_duplex
== HALF_DUPLEX
)) {
4526 dev_info(&adapter
->pdev
->dev
,
4527 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4528 adapter
->hw
.dev_spec
._82575
.eee_disable
= true;
4529 adapter
->flags
&= ~IGB_FLAG_EEE
;
4532 /* check if SmartSpeed worked */
4533 igb_check_downshift(hw
);
4534 if (phy
->speed_downgraded
)
4535 netdev_warn(netdev
, "Link Speed was downgraded by SmartSpeed\n");
4537 /* check for thermal sensor event */
4538 if (igb_thermal_sensor_event(hw
,
4539 E1000_THSTAT_LINK_THROTTLE
))
4540 netdev_info(netdev
, "The network adapter link speed was downshifted because it overheated\n");
4542 /* adjust timeout factor according to speed/duplex */
4543 adapter
->tx_timeout_factor
= 1;
4544 switch (adapter
->link_speed
) {
4546 adapter
->tx_timeout_factor
= 14;
4549 /* maybe add some timeout factor ? */
4553 if (adapter
->link_speed
!= SPEED_1000
)
4556 /* wait for Remote receiver status OK */
4558 if (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
,
4560 if (!(phy_data
& SR_1000T_REMOTE_RX_STATUS
) &&
4564 goto retry_read_status
;
4565 } else if (!retry_count
) {
4566 dev_err(&adapter
->pdev
->dev
, "exceed max 2 second\n");
4569 dev_err(&adapter
->pdev
->dev
, "read 1000Base-T Status Reg\n");
4572 netif_carrier_on(netdev
);
4574 igb_ping_all_vfs(adapter
);
4575 igb_check_vf_rate_limit(adapter
);
4577 /* link state has changed, schedule phy info update */
4578 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4579 mod_timer(&adapter
->phy_info_timer
,
4580 round_jiffies(jiffies
+ 2 * HZ
));
4583 if (netif_carrier_ok(netdev
)) {
4584 adapter
->link_speed
= 0;
4585 adapter
->link_duplex
= 0;
4587 /* check for thermal sensor event */
4588 if (igb_thermal_sensor_event(hw
,
4589 E1000_THSTAT_PWR_DOWN
)) {
4590 netdev_err(netdev
, "The network adapter was stopped because it overheated\n");
4593 /* Links status message must follow this format */
4594 netdev_info(netdev
, "igb: %s NIC Link is Down\n",
4596 netif_carrier_off(netdev
);
4598 igb_ping_all_vfs(adapter
);
4600 /* link state has changed, schedule phy info update */
4601 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4602 mod_timer(&adapter
->phy_info_timer
,
4603 round_jiffies(jiffies
+ 2 * HZ
));
4605 /* link is down, time to check for alternate media */
4606 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
4607 igb_check_swap_media(adapter
);
4608 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
4609 schedule_work(&adapter
->reset_task
);
4610 /* return immediately */
4614 pm_schedule_suspend(netdev
->dev
.parent
,
4617 /* also check for alternate media here */
4618 } else if (!netif_carrier_ok(netdev
) &&
4619 (adapter
->flags
& IGB_FLAG_MAS_ENABLE
)) {
4620 igb_check_swap_media(adapter
);
4621 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
4622 schedule_work(&adapter
->reset_task
);
4623 /* return immediately */
4629 spin_lock(&adapter
->stats64_lock
);
4630 igb_update_stats(adapter
, &adapter
->stats64
);
4631 spin_unlock(&adapter
->stats64_lock
);
4633 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4634 struct igb_ring
*tx_ring
= adapter
->tx_ring
[i
];
4635 if (!netif_carrier_ok(netdev
)) {
4636 /* We've lost link, so the controller stops DMA,
4637 * but we've got queued Tx work that's never going
4638 * to get done, so reset controller to flush Tx.
4639 * (Do the reset outside of interrupt context).
4641 if (igb_desc_unused(tx_ring
) + 1 < tx_ring
->count
) {
4642 adapter
->tx_timeout_count
++;
4643 schedule_work(&adapter
->reset_task
);
4644 /* return immediately since reset is imminent */
4649 /* Force detection of hung controller every watchdog period */
4650 set_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
4653 /* Cause software interrupt to ensure Rx ring is cleaned */
4654 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
4657 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
4658 eics
|= adapter
->q_vector
[i
]->eims_value
;
4659 wr32(E1000_EICS
, eics
);
4661 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
4664 igb_spoof_check(adapter
);
4665 igb_ptp_rx_hang(adapter
);
4667 /* Check LVMMC register on i350/i354 only */
4668 if ((adapter
->hw
.mac
.type
== e1000_i350
) ||
4669 (adapter
->hw
.mac
.type
== e1000_i354
))
4670 igb_check_lvmmc(adapter
);
4672 /* Reset the timer */
4673 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
4674 if (adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
)
4675 mod_timer(&adapter
->watchdog_timer
,
4676 round_jiffies(jiffies
+ HZ
));
4678 mod_timer(&adapter
->watchdog_timer
,
4679 round_jiffies(jiffies
+ 2 * HZ
));
4683 enum latency_range
{
4687 latency_invalid
= 255
4691 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4692 * @q_vector: pointer to q_vector
4694 * Stores a new ITR value based on strictly on packet size. This
4695 * algorithm is less sophisticated than that used in igb_update_itr,
4696 * due to the difficulty of synchronizing statistics across multiple
4697 * receive rings. The divisors and thresholds used by this function
4698 * were determined based on theoretical maximum wire speed and testing
4699 * data, in order to minimize response time while increasing bulk
4701 * This functionality is controlled by ethtool's coalescing settings.
4702 * NOTE: This function is called only when operating in a multiqueue
4703 * receive environment.
4705 static void igb_update_ring_itr(struct igb_q_vector
*q_vector
)
4707 int new_val
= q_vector
->itr_val
;
4708 int avg_wire_size
= 0;
4709 struct igb_adapter
*adapter
= q_vector
->adapter
;
4710 unsigned int packets
;
4712 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4713 * ints/sec - ITR timer value of 120 ticks.
4715 if (adapter
->link_speed
!= SPEED_1000
) {
4716 new_val
= IGB_4K_ITR
;
4720 packets
= q_vector
->rx
.total_packets
;
4722 avg_wire_size
= q_vector
->rx
.total_bytes
/ packets
;
4724 packets
= q_vector
->tx
.total_packets
;
4726 avg_wire_size
= max_t(u32
, avg_wire_size
,
4727 q_vector
->tx
.total_bytes
/ packets
);
4729 /* if avg_wire_size isn't set no work was done */
4733 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4734 avg_wire_size
+= 24;
4736 /* Don't starve jumbo frames */
4737 avg_wire_size
= min(avg_wire_size
, 3000);
4739 /* Give a little boost to mid-size frames */
4740 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
4741 new_val
= avg_wire_size
/ 3;
4743 new_val
= avg_wire_size
/ 2;
4745 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4746 if (new_val
< IGB_20K_ITR
&&
4747 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4748 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4749 new_val
= IGB_20K_ITR
;
4752 if (new_val
!= q_vector
->itr_val
) {
4753 q_vector
->itr_val
= new_val
;
4754 q_vector
->set_itr
= 1;
4757 q_vector
->rx
.total_bytes
= 0;
4758 q_vector
->rx
.total_packets
= 0;
4759 q_vector
->tx
.total_bytes
= 0;
4760 q_vector
->tx
.total_packets
= 0;
4764 * igb_update_itr - update the dynamic ITR value based on statistics
4765 * @q_vector: pointer to q_vector
4766 * @ring_container: ring info to update the itr for
4768 * Stores a new ITR value based on packets and byte
4769 * counts during the last interrupt. The advantage of per interrupt
4770 * computation is faster updates and more accurate ITR for the current
4771 * traffic pattern. Constants in this function were computed
4772 * based on theoretical maximum wire speed and thresholds were set based
4773 * on testing data as well as attempting to minimize response time
4774 * while increasing bulk throughput.
4775 * This functionality is controlled by ethtool's coalescing settings.
4776 * NOTE: These calculations are only valid when operating in a single-
4777 * queue environment.
4779 static void igb_update_itr(struct igb_q_vector
*q_vector
,
4780 struct igb_ring_container
*ring_container
)
4782 unsigned int packets
= ring_container
->total_packets
;
4783 unsigned int bytes
= ring_container
->total_bytes
;
4784 u8 itrval
= ring_container
->itr
;
4786 /* no packets, exit with status unchanged */
4791 case lowest_latency
:
4792 /* handle TSO and jumbo frames */
4793 if (bytes
/packets
> 8000)
4794 itrval
= bulk_latency
;
4795 else if ((packets
< 5) && (bytes
> 512))
4796 itrval
= low_latency
;
4798 case low_latency
: /* 50 usec aka 20000 ints/s */
4799 if (bytes
> 10000) {
4800 /* this if handles the TSO accounting */
4801 if (bytes
/packets
> 8000)
4802 itrval
= bulk_latency
;
4803 else if ((packets
< 10) || ((bytes
/packets
) > 1200))
4804 itrval
= bulk_latency
;
4805 else if ((packets
> 35))
4806 itrval
= lowest_latency
;
4807 } else if (bytes
/packets
> 2000) {
4808 itrval
= bulk_latency
;
4809 } else if (packets
<= 2 && bytes
< 512) {
4810 itrval
= lowest_latency
;
4813 case bulk_latency
: /* 250 usec aka 4000 ints/s */
4814 if (bytes
> 25000) {
4816 itrval
= low_latency
;
4817 } else if (bytes
< 1500) {
4818 itrval
= low_latency
;
4823 /* clear work counters since we have the values we need */
4824 ring_container
->total_bytes
= 0;
4825 ring_container
->total_packets
= 0;
4827 /* write updated itr to ring container */
4828 ring_container
->itr
= itrval
;
4831 static void igb_set_itr(struct igb_q_vector
*q_vector
)
4833 struct igb_adapter
*adapter
= q_vector
->adapter
;
4834 u32 new_itr
= q_vector
->itr_val
;
4837 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4838 if (adapter
->link_speed
!= SPEED_1000
) {
4840 new_itr
= IGB_4K_ITR
;
4844 igb_update_itr(q_vector
, &q_vector
->tx
);
4845 igb_update_itr(q_vector
, &q_vector
->rx
);
4847 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
4849 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4850 if (current_itr
== lowest_latency
&&
4851 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4852 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4853 current_itr
= low_latency
;
4855 switch (current_itr
) {
4856 /* counts and packets in update_itr are dependent on these numbers */
4857 case lowest_latency
:
4858 new_itr
= IGB_70K_ITR
; /* 70,000 ints/sec */
4861 new_itr
= IGB_20K_ITR
; /* 20,000 ints/sec */
4864 new_itr
= IGB_4K_ITR
; /* 4,000 ints/sec */
4871 if (new_itr
!= q_vector
->itr_val
) {
4872 /* this attempts to bias the interrupt rate towards Bulk
4873 * by adding intermediate steps when interrupt rate is
4876 new_itr
= new_itr
> q_vector
->itr_val
?
4877 max((new_itr
* q_vector
->itr_val
) /
4878 (new_itr
+ (q_vector
->itr_val
>> 2)),
4880 /* Don't write the value here; it resets the adapter's
4881 * internal timer, and causes us to delay far longer than
4882 * we should between interrupts. Instead, we write the ITR
4883 * value at the beginning of the next interrupt so the timing
4884 * ends up being correct.
4886 q_vector
->itr_val
= new_itr
;
4887 q_vector
->set_itr
= 1;
4891 static void igb_tx_ctxtdesc(struct igb_ring
*tx_ring
, u32 vlan_macip_lens
,
4892 u32 type_tucmd
, u32 mss_l4len_idx
)
4894 struct e1000_adv_tx_context_desc
*context_desc
;
4895 u16 i
= tx_ring
->next_to_use
;
4897 context_desc
= IGB_TX_CTXTDESC(tx_ring
, i
);
4900 tx_ring
->next_to_use
= (i
< tx_ring
->count
) ? i
: 0;
4902 /* set bits to identify this as an advanced context descriptor */
4903 type_tucmd
|= E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
;
4905 /* For 82575, context index must be unique per ring. */
4906 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4907 mss_l4len_idx
|= tx_ring
->reg_idx
<< 4;
4909 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4910 context_desc
->seqnum_seed
= 0;
4911 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd
);
4912 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
4915 static int igb_tso(struct igb_ring
*tx_ring
,
4916 struct igb_tx_buffer
*first
,
4919 u32 vlan_macip_lens
, type_tucmd
, mss_l4len_idx
;
4920 struct sk_buff
*skb
= first
->skb
;
4930 u32 paylen
, l4_offset
;
4933 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
4936 if (!skb_is_gso(skb
))
4939 err
= skb_cow_head(skb
, 0);
4943 ip
.hdr
= skb_network_header(skb
);
4944 l4
.hdr
= skb_checksum_start(skb
);
4946 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4947 type_tucmd
= E1000_ADVTXD_TUCMD_L4T_TCP
;
4949 /* initialize outer IP header fields */
4950 if (ip
.v4
->version
== 4) {
4951 unsigned char *csum_start
= skb_checksum_start(skb
);
4952 unsigned char *trans_start
= ip
.hdr
+ (ip
.v4
->ihl
* 4);
4954 /* IP header will have to cancel out any data that
4955 * is not a part of the outer IP header
4957 ip
.v4
->check
= csum_fold(csum_partial(trans_start
,
4958 csum_start
- trans_start
,
4960 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4963 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4967 ip
.v6
->payload_len
= 0;
4968 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4972 /* determine offset of inner transport header */
4973 l4_offset
= l4
.hdr
- skb
->data
;
4975 /* compute length of segmentation header */
4976 *hdr_len
= (l4
.tcp
->doff
* 4) + l4_offset
;
4978 /* remove payload length from inner checksum */
4979 paylen
= skb
->len
- l4_offset
;
4980 csum_replace_by_diff(&l4
.tcp
->check
, htonl(paylen
));
4982 /* update gso size and bytecount with header size */
4983 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
4984 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
4987 mss_l4len_idx
= (*hdr_len
- l4_offset
) << E1000_ADVTXD_L4LEN_SHIFT
;
4988 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
;
4990 /* VLAN MACLEN IPLEN */
4991 vlan_macip_lens
= l4
.hdr
- ip
.hdr
;
4992 vlan_macip_lens
|= (ip
.hdr
- skb
->data
) << E1000_ADVTXD_MACLEN_SHIFT
;
4993 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4995 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
5000 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff
*skb
)
5002 unsigned int offset
= 0;
5004 ipv6_find_hdr(skb
, &offset
, IPPROTO_SCTP
, NULL
, NULL
);
5006 return offset
== skb_checksum_start_offset(skb
);
5009 static void igb_tx_csum(struct igb_ring
*tx_ring
, struct igb_tx_buffer
*first
)
5011 struct sk_buff
*skb
= first
->skb
;
5012 u32 vlan_macip_lens
= 0;
5015 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
5017 if (!(first
->tx_flags
& IGB_TX_FLAGS_VLAN
))
5022 switch (skb
->csum_offset
) {
5023 case offsetof(struct tcphdr
, check
):
5024 type_tucmd
= E1000_ADVTXD_TUCMD_L4T_TCP
;
5026 case offsetof(struct udphdr
, check
):
5028 case offsetof(struct sctphdr
, checksum
):
5029 /* validate that this is actually an SCTP request */
5030 if (((first
->protocol
== htons(ETH_P_IP
)) &&
5031 (ip_hdr(skb
)->protocol
== IPPROTO_SCTP
)) ||
5032 ((first
->protocol
== htons(ETH_P_IPV6
)) &&
5033 igb_ipv6_csum_is_sctp(skb
))) {
5034 type_tucmd
= E1000_ADVTXD_TUCMD_L4T_SCTP
;
5038 skb_checksum_help(skb
);
5042 /* update TX checksum flag */
5043 first
->tx_flags
|= IGB_TX_FLAGS_CSUM
;
5044 vlan_macip_lens
= skb_checksum_start_offset(skb
) -
5045 skb_network_offset(skb
);
5047 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
5048 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
5050 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, 0);
5053 #define IGB_SET_FLAG(_input, _flag, _result) \
5054 ((_flag <= _result) ? \
5055 ((u32)(_input & _flag) * (_result / _flag)) : \
5056 ((u32)(_input & _flag) / (_flag / _result)))
5058 static u32
igb_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
5060 /* set type for advanced descriptor with frame checksum insertion */
5061 u32 cmd_type
= E1000_ADVTXD_DTYP_DATA
|
5062 E1000_ADVTXD_DCMD_DEXT
|
5063 E1000_ADVTXD_DCMD_IFCS
;
5065 /* set HW vlan bit if vlan is present */
5066 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_VLAN
,
5067 (E1000_ADVTXD_DCMD_VLE
));
5069 /* set segmentation bits for TSO */
5070 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSO
,
5071 (E1000_ADVTXD_DCMD_TSE
));
5073 /* set timestamp bit if present */
5074 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSTAMP
,
5075 (E1000_ADVTXD_MAC_TSTAMP
));
5077 /* insert frame checksum */
5078 cmd_type
^= IGB_SET_FLAG(skb
->no_fcs
, 1, E1000_ADVTXD_DCMD_IFCS
);
5083 static void igb_tx_olinfo_status(struct igb_ring
*tx_ring
,
5084 union e1000_adv_tx_desc
*tx_desc
,
5085 u32 tx_flags
, unsigned int paylen
)
5087 u32 olinfo_status
= paylen
<< E1000_ADVTXD_PAYLEN_SHIFT
;
5089 /* 82575 requires a unique index per ring */
5090 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
5091 olinfo_status
|= tx_ring
->reg_idx
<< 4;
5093 /* insert L4 checksum */
5094 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
5096 (E1000_TXD_POPTS_TXSM
<< 8));
5098 /* insert IPv4 checksum */
5099 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
5101 (E1000_TXD_POPTS_IXSM
<< 8));
5103 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
5106 static int __igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
5108 struct net_device
*netdev
= tx_ring
->netdev
;
5110 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
5112 /* Herbert's original patch had:
5113 * smp_mb__after_netif_stop_queue();
5114 * but since that doesn't exist yet, just open code it.
5118 /* We need to check again in a case another CPU has just
5119 * made room available.
5121 if (igb_desc_unused(tx_ring
) < size
)
5125 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
5127 u64_stats_update_begin(&tx_ring
->tx_syncp2
);
5128 tx_ring
->tx_stats
.restart_queue2
++;
5129 u64_stats_update_end(&tx_ring
->tx_syncp2
);
5134 static inline int igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
5136 if (igb_desc_unused(tx_ring
) >= size
)
5138 return __igb_maybe_stop_tx(tx_ring
, size
);
5141 static void igb_tx_map(struct igb_ring
*tx_ring
,
5142 struct igb_tx_buffer
*first
,
5145 struct sk_buff
*skb
= first
->skb
;
5146 struct igb_tx_buffer
*tx_buffer
;
5147 union e1000_adv_tx_desc
*tx_desc
;
5148 struct skb_frag_struct
*frag
;
5150 unsigned int data_len
, size
;
5151 u32 tx_flags
= first
->tx_flags
;
5152 u32 cmd_type
= igb_tx_cmd_type(skb
, tx_flags
);
5153 u16 i
= tx_ring
->next_to_use
;
5155 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
5157 igb_tx_olinfo_status(tx_ring
, tx_desc
, tx_flags
, skb
->len
- hdr_len
);
5159 size
= skb_headlen(skb
);
5160 data_len
= skb
->data_len
;
5162 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
5166 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
5167 if (dma_mapping_error(tx_ring
->dev
, dma
))
5170 /* record length, and DMA address */
5171 dma_unmap_len_set(tx_buffer
, len
, size
);
5172 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
5174 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
5176 while (unlikely(size
> IGB_MAX_DATA_PER_TXD
)) {
5177 tx_desc
->read
.cmd_type_len
=
5178 cpu_to_le32(cmd_type
^ IGB_MAX_DATA_PER_TXD
);
5182 if (i
== tx_ring
->count
) {
5183 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
5186 tx_desc
->read
.olinfo_status
= 0;
5188 dma
+= IGB_MAX_DATA_PER_TXD
;
5189 size
-= IGB_MAX_DATA_PER_TXD
;
5191 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
5194 if (likely(!data_len
))
5197 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
5201 if (i
== tx_ring
->count
) {
5202 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
5205 tx_desc
->read
.olinfo_status
= 0;
5207 size
= skb_frag_size(frag
);
5210 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0,
5211 size
, DMA_TO_DEVICE
);
5213 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
5216 /* write last descriptor with RS and EOP bits */
5217 cmd_type
|= size
| IGB_TXD_DCMD
;
5218 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
5220 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
5222 /* set the timestamp */
5223 first
->time_stamp
= jiffies
;
5225 /* Force memory writes to complete before letting h/w know there
5226 * are new descriptors to fetch. (Only applicable for weak-ordered
5227 * memory model archs, such as IA-64).
5229 * We also need this memory barrier to make certain all of the
5230 * status bits have been updated before next_to_watch is written.
5234 /* set next_to_watch value indicating a packet is present */
5235 first
->next_to_watch
= tx_desc
;
5238 if (i
== tx_ring
->count
)
5241 tx_ring
->next_to_use
= i
;
5243 /* Make sure there is space in the ring for the next send. */
5244 igb_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
5246 if (netif_xmit_stopped(txring_txq(tx_ring
)) || !skb
->xmit_more
) {
5247 writel(i
, tx_ring
->tail
);
5249 /* we need this if more than one processor can write to our tail
5250 * at a time, it synchronizes IO on IA64/Altix systems
5257 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
5259 /* clear dma mappings for failed tx_buffer_info map */
5261 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
5262 igb_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
5263 if (tx_buffer
== first
)
5270 tx_ring
->next_to_use
= i
;
5273 netdev_tx_t
igb_xmit_frame_ring(struct sk_buff
*skb
,
5274 struct igb_ring
*tx_ring
)
5276 struct igb_tx_buffer
*first
;
5280 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
5281 __be16 protocol
= vlan_get_protocol(skb
);
5284 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5285 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5286 * + 2 desc gap to keep tail from touching head,
5287 * + 1 desc for context descriptor,
5288 * otherwise try next time
5290 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
5291 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
5293 if (igb_maybe_stop_tx(tx_ring
, count
+ 3)) {
5294 /* this is a hard error */
5295 return NETDEV_TX_BUSY
;
5298 /* record the location of the first descriptor for this packet */
5299 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
5301 first
->bytecount
= skb
->len
;
5302 first
->gso_segs
= 1;
5304 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)) {
5305 struct igb_adapter
*adapter
= netdev_priv(tx_ring
->netdev
);
5307 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS
,
5309 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
5310 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
5312 adapter
->ptp_tx_skb
= skb_get(skb
);
5313 adapter
->ptp_tx_start
= jiffies
;
5314 if (adapter
->hw
.mac
.type
== e1000_82576
)
5315 schedule_work(&adapter
->ptp_tx_work
);
5319 skb_tx_timestamp(skb
);
5321 if (skb_vlan_tag_present(skb
)) {
5322 tx_flags
|= IGB_TX_FLAGS_VLAN
;
5323 tx_flags
|= (skb_vlan_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
5326 /* record initial flags and protocol */
5327 first
->tx_flags
= tx_flags
;
5328 first
->protocol
= protocol
;
5330 tso
= igb_tso(tx_ring
, first
, &hdr_len
);
5334 igb_tx_csum(tx_ring
, first
);
5336 igb_tx_map(tx_ring
, first
, hdr_len
);
5338 return NETDEV_TX_OK
;
5341 igb_unmap_and_free_tx_resource(tx_ring
, first
);
5343 return NETDEV_TX_OK
;
5346 static inline struct igb_ring
*igb_tx_queue_mapping(struct igb_adapter
*adapter
,
5347 struct sk_buff
*skb
)
5349 unsigned int r_idx
= skb
->queue_mapping
;
5351 if (r_idx
>= adapter
->num_tx_queues
)
5352 r_idx
= r_idx
% adapter
->num_tx_queues
;
5354 return adapter
->tx_ring
[r_idx
];
5357 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
,
5358 struct net_device
*netdev
)
5360 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5362 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5363 * in order to meet this minimum size requirement.
5365 if (skb_put_padto(skb
, 17))
5366 return NETDEV_TX_OK
;
5368 return igb_xmit_frame_ring(skb
, igb_tx_queue_mapping(adapter
, skb
));
5372 * igb_tx_timeout - Respond to a Tx Hang
5373 * @netdev: network interface device structure
5375 static void igb_tx_timeout(struct net_device
*netdev
)
5377 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5378 struct e1000_hw
*hw
= &adapter
->hw
;
5380 /* Do the reset outside of interrupt context */
5381 adapter
->tx_timeout_count
++;
5383 if (hw
->mac
.type
>= e1000_82580
)
5384 hw
->dev_spec
._82575
.global_device_reset
= true;
5386 schedule_work(&adapter
->reset_task
);
5388 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
5391 static void igb_reset_task(struct work_struct
*work
)
5393 struct igb_adapter
*adapter
;
5394 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
5397 netdev_err(adapter
->netdev
, "Reset adapter\n");
5398 igb_reinit_locked(adapter
);
5402 * igb_get_stats64 - Get System Network Statistics
5403 * @netdev: network interface device structure
5404 * @stats: rtnl_link_stats64 pointer
5406 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*netdev
,
5407 struct rtnl_link_stats64
*stats
)
5409 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5411 spin_lock(&adapter
->stats64_lock
);
5412 igb_update_stats(adapter
, &adapter
->stats64
);
5413 memcpy(stats
, &adapter
->stats64
, sizeof(*stats
));
5414 spin_unlock(&adapter
->stats64_lock
);
5420 * igb_change_mtu - Change the Maximum Transfer Unit
5421 * @netdev: network interface device structure
5422 * @new_mtu: new value for maximum frame size
5424 * Returns 0 on success, negative on failure
5426 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
5428 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5429 struct pci_dev
*pdev
= adapter
->pdev
;
5430 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
5432 /* adjust max frame to be at least the size of a standard frame */
5433 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
5434 max_frame
= ETH_FRAME_LEN
+ ETH_FCS_LEN
;
5436 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
5437 usleep_range(1000, 2000);
5439 /* igb_down has a dependency on max_frame_size */
5440 adapter
->max_frame_size
= max_frame
;
5442 if (netif_running(netdev
))
5445 dev_info(&pdev
->dev
, "changing MTU from %d to %d\n",
5446 netdev
->mtu
, new_mtu
);
5447 netdev
->mtu
= new_mtu
;
5449 if (netif_running(netdev
))
5454 clear_bit(__IGB_RESETTING
, &adapter
->state
);
5460 * igb_update_stats - Update the board statistics counters
5461 * @adapter: board private structure
5463 void igb_update_stats(struct igb_adapter
*adapter
,
5464 struct rtnl_link_stats64
*net_stats
)
5466 struct e1000_hw
*hw
= &adapter
->hw
;
5467 struct pci_dev
*pdev
= adapter
->pdev
;
5472 u64 _bytes
, _packets
;
5474 /* Prevent stats update while adapter is being reset, or if the pci
5475 * connection is down.
5477 if (adapter
->link_speed
== 0)
5479 if (pci_channel_offline(pdev
))
5486 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5487 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
5488 u32 rqdpc
= rd32(E1000_RQDPC(i
));
5489 if (hw
->mac
.type
>= e1000_i210
)
5490 wr32(E1000_RQDPC(i
), 0);
5493 ring
->rx_stats
.drops
+= rqdpc
;
5494 net_stats
->rx_fifo_errors
+= rqdpc
;
5498 start
= u64_stats_fetch_begin_irq(&ring
->rx_syncp
);
5499 _bytes
= ring
->rx_stats
.bytes
;
5500 _packets
= ring
->rx_stats
.packets
;
5501 } while (u64_stats_fetch_retry_irq(&ring
->rx_syncp
, start
));
5503 packets
+= _packets
;
5506 net_stats
->rx_bytes
= bytes
;
5507 net_stats
->rx_packets
= packets
;
5511 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5512 struct igb_ring
*ring
= adapter
->tx_ring
[i
];
5514 start
= u64_stats_fetch_begin_irq(&ring
->tx_syncp
);
5515 _bytes
= ring
->tx_stats
.bytes
;
5516 _packets
= ring
->tx_stats
.packets
;
5517 } while (u64_stats_fetch_retry_irq(&ring
->tx_syncp
, start
));
5519 packets
+= _packets
;
5521 net_stats
->tx_bytes
= bytes
;
5522 net_stats
->tx_packets
= packets
;
5525 /* read stats registers */
5526 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
5527 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
5528 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
5529 rd32(E1000_GORCH
); /* clear GORCL */
5530 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
5531 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
5532 adapter
->stats
.roc
+= rd32(E1000_ROC
);
5534 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
5535 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
5536 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
5537 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
5538 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
5539 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
5540 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
5541 adapter
->stats
.sec
+= rd32(E1000_SEC
);
5543 mpc
= rd32(E1000_MPC
);
5544 adapter
->stats
.mpc
+= mpc
;
5545 net_stats
->rx_fifo_errors
+= mpc
;
5546 adapter
->stats
.scc
+= rd32(E1000_SCC
);
5547 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
5548 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
5549 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
5550 adapter
->stats
.dc
+= rd32(E1000_DC
);
5551 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
5552 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
5553 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
5554 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
5555 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
5556 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
5557 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
5558 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
5559 rd32(E1000_GOTCH
); /* clear GOTCL */
5560 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
5561 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
5562 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
5563 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
5564 adapter
->stats
.tor
+= rd32(E1000_TORH
);
5565 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
5566 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
5568 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
5569 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
5570 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
5571 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
5572 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
5573 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
5575 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
5576 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
5578 adapter
->stats
.tpt
+= rd32(E1000_TPT
);
5579 adapter
->stats
.colc
+= rd32(E1000_COLC
);
5581 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
5582 /* read internal phy specific stats */
5583 reg
= rd32(E1000_CTRL_EXT
);
5584 if (!(reg
& E1000_CTRL_EXT_LINK_MODE_MASK
)) {
5585 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
5587 /* this stat has invalid values on i210/i211 */
5588 if ((hw
->mac
.type
!= e1000_i210
) &&
5589 (hw
->mac
.type
!= e1000_i211
))
5590 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
5593 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
5594 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
5596 adapter
->stats
.iac
+= rd32(E1000_IAC
);
5597 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
5598 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
5599 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
5600 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
5601 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
5602 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
5603 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
5604 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
5606 /* Fill out the OS statistics structure */
5607 net_stats
->multicast
= adapter
->stats
.mprc
;
5608 net_stats
->collisions
= adapter
->stats
.colc
;
5612 /* RLEC on some newer hardware can be incorrect so build
5613 * our own version based on RUC and ROC
5615 net_stats
->rx_errors
= adapter
->stats
.rxerrc
+
5616 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
5617 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
5618 adapter
->stats
.cexterr
;
5619 net_stats
->rx_length_errors
= adapter
->stats
.ruc
+
5621 net_stats
->rx_crc_errors
= adapter
->stats
.crcerrs
;
5622 net_stats
->rx_frame_errors
= adapter
->stats
.algnerrc
;
5623 net_stats
->rx_missed_errors
= adapter
->stats
.mpc
;
5626 net_stats
->tx_errors
= adapter
->stats
.ecol
+
5627 adapter
->stats
.latecol
;
5628 net_stats
->tx_aborted_errors
= adapter
->stats
.ecol
;
5629 net_stats
->tx_window_errors
= adapter
->stats
.latecol
;
5630 net_stats
->tx_carrier_errors
= adapter
->stats
.tncrs
;
5632 /* Tx Dropped needs to be maintained elsewhere */
5634 /* Management Stats */
5635 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
5636 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
5637 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
5640 reg
= rd32(E1000_MANC
);
5641 if (reg
& E1000_MANC_EN_BMC2OS
) {
5642 adapter
->stats
.o2bgptc
+= rd32(E1000_O2BGPTC
);
5643 adapter
->stats
.o2bspc
+= rd32(E1000_O2BSPC
);
5644 adapter
->stats
.b2ospc
+= rd32(E1000_B2OSPC
);
5645 adapter
->stats
.b2ogprc
+= rd32(E1000_B2OGPRC
);
5649 static void igb_tsync_interrupt(struct igb_adapter
*adapter
)
5651 struct e1000_hw
*hw
= &adapter
->hw
;
5652 struct ptp_clock_event event
;
5653 struct timespec64 ts
;
5654 u32 ack
= 0, tsauxc
, sec
, nsec
, tsicr
= rd32(E1000_TSICR
);
5656 if (tsicr
& TSINTR_SYS_WRAP
) {
5657 event
.type
= PTP_CLOCK_PPS
;
5658 if (adapter
->ptp_caps
.pps
)
5659 ptp_clock_event(adapter
->ptp_clock
, &event
);
5661 dev_err(&adapter
->pdev
->dev
, "unexpected SYS WRAP");
5662 ack
|= TSINTR_SYS_WRAP
;
5665 if (tsicr
& E1000_TSICR_TXTS
) {
5666 /* retrieve hardware timestamp */
5667 schedule_work(&adapter
->ptp_tx_work
);
5668 ack
|= E1000_TSICR_TXTS
;
5671 if (tsicr
& TSINTR_TT0
) {
5672 spin_lock(&adapter
->tmreg_lock
);
5673 ts
= timespec64_add(adapter
->perout
[0].start
,
5674 adapter
->perout
[0].period
);
5675 /* u32 conversion of tv_sec is safe until y2106 */
5676 wr32(E1000_TRGTTIML0
, ts
.tv_nsec
);
5677 wr32(E1000_TRGTTIMH0
, (u32
)ts
.tv_sec
);
5678 tsauxc
= rd32(E1000_TSAUXC
);
5679 tsauxc
|= TSAUXC_EN_TT0
;
5680 wr32(E1000_TSAUXC
, tsauxc
);
5681 adapter
->perout
[0].start
= ts
;
5682 spin_unlock(&adapter
->tmreg_lock
);
5686 if (tsicr
& TSINTR_TT1
) {
5687 spin_lock(&adapter
->tmreg_lock
);
5688 ts
= timespec64_add(adapter
->perout
[1].start
,
5689 adapter
->perout
[1].period
);
5690 wr32(E1000_TRGTTIML1
, ts
.tv_nsec
);
5691 wr32(E1000_TRGTTIMH1
, (u32
)ts
.tv_sec
);
5692 tsauxc
= rd32(E1000_TSAUXC
);
5693 tsauxc
|= TSAUXC_EN_TT1
;
5694 wr32(E1000_TSAUXC
, tsauxc
);
5695 adapter
->perout
[1].start
= ts
;
5696 spin_unlock(&adapter
->tmreg_lock
);
5700 if (tsicr
& TSINTR_AUTT0
) {
5701 nsec
= rd32(E1000_AUXSTMPL0
);
5702 sec
= rd32(E1000_AUXSTMPH0
);
5703 event
.type
= PTP_CLOCK_EXTTS
;
5705 event
.timestamp
= sec
* 1000000000ULL + nsec
;
5706 ptp_clock_event(adapter
->ptp_clock
, &event
);
5707 ack
|= TSINTR_AUTT0
;
5710 if (tsicr
& TSINTR_AUTT1
) {
5711 nsec
= rd32(E1000_AUXSTMPL1
);
5712 sec
= rd32(E1000_AUXSTMPH1
);
5713 event
.type
= PTP_CLOCK_EXTTS
;
5715 event
.timestamp
= sec
* 1000000000ULL + nsec
;
5716 ptp_clock_event(adapter
->ptp_clock
, &event
);
5717 ack
|= TSINTR_AUTT1
;
5720 /* acknowledge the interrupts */
5721 wr32(E1000_TSICR
, ack
);
5724 static irqreturn_t
igb_msix_other(int irq
, void *data
)
5726 struct igb_adapter
*adapter
= data
;
5727 struct e1000_hw
*hw
= &adapter
->hw
;
5728 u32 icr
= rd32(E1000_ICR
);
5729 /* reading ICR causes bit 31 of EICR to be cleared */
5731 if (icr
& E1000_ICR_DRSTA
)
5732 schedule_work(&adapter
->reset_task
);
5734 if (icr
& E1000_ICR_DOUTSYNC
) {
5735 /* HW is reporting DMA is out of sync */
5736 adapter
->stats
.doosync
++;
5737 /* The DMA Out of Sync is also indication of a spoof event
5738 * in IOV mode. Check the Wrong VM Behavior register to
5739 * see if it is really a spoof event.
5741 igb_check_wvbr(adapter
);
5744 /* Check for a mailbox event */
5745 if (icr
& E1000_ICR_VMMB
)
5746 igb_msg_task(adapter
);
5748 if (icr
& E1000_ICR_LSC
) {
5749 hw
->mac
.get_link_status
= 1;
5750 /* guard against interrupt when we're going down */
5751 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5752 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
5755 if (icr
& E1000_ICR_TS
)
5756 igb_tsync_interrupt(adapter
);
5758 wr32(E1000_EIMS
, adapter
->eims_other
);
5763 static void igb_write_itr(struct igb_q_vector
*q_vector
)
5765 struct igb_adapter
*adapter
= q_vector
->adapter
;
5766 u32 itr_val
= q_vector
->itr_val
& 0x7FFC;
5768 if (!q_vector
->set_itr
)
5774 if (adapter
->hw
.mac
.type
== e1000_82575
)
5775 itr_val
|= itr_val
<< 16;
5777 itr_val
|= E1000_EITR_CNT_IGNR
;
5779 writel(itr_val
, q_vector
->itr_register
);
5780 q_vector
->set_itr
= 0;
5783 static irqreturn_t
igb_msix_ring(int irq
, void *data
)
5785 struct igb_q_vector
*q_vector
= data
;
5787 /* Write the ITR value calculated from the previous interrupt. */
5788 igb_write_itr(q_vector
);
5790 napi_schedule(&q_vector
->napi
);
5795 #ifdef CONFIG_IGB_DCA
5796 static void igb_update_tx_dca(struct igb_adapter
*adapter
,
5797 struct igb_ring
*tx_ring
,
5800 struct e1000_hw
*hw
= &adapter
->hw
;
5801 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
5803 if (hw
->mac
.type
!= e1000_82575
)
5804 txctrl
<<= E1000_DCA_TXCTRL_CPUID_SHIFT
;
5806 /* We can enable relaxed ordering for reads, but not writes when
5807 * DCA is enabled. This is due to a known issue in some chipsets
5808 * which will cause the DCA tag to be cleared.
5810 txctrl
|= E1000_DCA_TXCTRL_DESC_RRO_EN
|
5811 E1000_DCA_TXCTRL_DATA_RRO_EN
|
5812 E1000_DCA_TXCTRL_DESC_DCA_EN
;
5814 wr32(E1000_DCA_TXCTRL(tx_ring
->reg_idx
), txctrl
);
5817 static void igb_update_rx_dca(struct igb_adapter
*adapter
,
5818 struct igb_ring
*rx_ring
,
5821 struct e1000_hw
*hw
= &adapter
->hw
;
5822 u32 rxctrl
= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
5824 if (hw
->mac
.type
!= e1000_82575
)
5825 rxctrl
<<= E1000_DCA_RXCTRL_CPUID_SHIFT
;
5827 /* We can enable relaxed ordering for reads, but not writes when
5828 * DCA is enabled. This is due to a known issue in some chipsets
5829 * which will cause the DCA tag to be cleared.
5831 rxctrl
|= E1000_DCA_RXCTRL_DESC_RRO_EN
|
5832 E1000_DCA_RXCTRL_DESC_DCA_EN
;
5834 wr32(E1000_DCA_RXCTRL(rx_ring
->reg_idx
), rxctrl
);
5837 static void igb_update_dca(struct igb_q_vector
*q_vector
)
5839 struct igb_adapter
*adapter
= q_vector
->adapter
;
5840 int cpu
= get_cpu();
5842 if (q_vector
->cpu
== cpu
)
5845 if (q_vector
->tx
.ring
)
5846 igb_update_tx_dca(adapter
, q_vector
->tx
.ring
, cpu
);
5848 if (q_vector
->rx
.ring
)
5849 igb_update_rx_dca(adapter
, q_vector
->rx
.ring
, cpu
);
5851 q_vector
->cpu
= cpu
;
5856 static void igb_setup_dca(struct igb_adapter
*adapter
)
5858 struct e1000_hw
*hw
= &adapter
->hw
;
5861 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
5864 /* Always use CB2 mode, difference is masked in the CB driver. */
5865 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
5867 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
5868 adapter
->q_vector
[i
]->cpu
= -1;
5869 igb_update_dca(adapter
->q_vector
[i
]);
5873 static int __igb_notify_dca(struct device
*dev
, void *data
)
5875 struct net_device
*netdev
= dev_get_drvdata(dev
);
5876 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5877 struct pci_dev
*pdev
= adapter
->pdev
;
5878 struct e1000_hw
*hw
= &adapter
->hw
;
5879 unsigned long event
= *(unsigned long *)data
;
5882 case DCA_PROVIDER_ADD
:
5883 /* if already enabled, don't do it again */
5884 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
5886 if (dca_add_requester(dev
) == 0) {
5887 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
5888 dev_info(&pdev
->dev
, "DCA enabled\n");
5889 igb_setup_dca(adapter
);
5892 /* Fall Through since DCA is disabled. */
5893 case DCA_PROVIDER_REMOVE
:
5894 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
5895 /* without this a class_device is left
5896 * hanging around in the sysfs model
5898 dca_remove_requester(dev
);
5899 dev_info(&pdev
->dev
, "DCA disabled\n");
5900 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
5901 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
5909 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
5914 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
5917 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
5919 #endif /* CONFIG_IGB_DCA */
5921 #ifdef CONFIG_PCI_IOV
5922 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
)
5924 unsigned char mac_addr
[ETH_ALEN
];
5926 eth_zero_addr(mac_addr
);
5927 igb_set_vf_mac(adapter
, vf
, mac_addr
);
5929 /* By default spoof check is enabled for all VFs */
5930 adapter
->vf_data
[vf
].spoofchk_enabled
= true;
5936 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
5938 struct e1000_hw
*hw
= &adapter
->hw
;
5942 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
5943 ping
= E1000_PF_CONTROL_MSG
;
5944 if (adapter
->vf_data
[i
].flags
& IGB_VF_FLAG_CTS
)
5945 ping
|= E1000_VT_MSGTYPE_CTS
;
5946 igb_write_mbx(hw
, &ping
, 1, i
);
5950 static int igb_set_vf_promisc(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5952 struct e1000_hw
*hw
= &adapter
->hw
;
5953 u32 vmolr
= rd32(E1000_VMOLR(vf
));
5954 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5956 vf_data
->flags
&= ~(IGB_VF_FLAG_UNI_PROMISC
|
5957 IGB_VF_FLAG_MULTI_PROMISC
);
5958 vmolr
&= ~(E1000_VMOLR_ROPE
| E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5960 if (*msgbuf
& E1000_VF_SET_PROMISC_MULTICAST
) {
5961 vmolr
|= E1000_VMOLR_MPME
;
5962 vf_data
->flags
|= IGB_VF_FLAG_MULTI_PROMISC
;
5963 *msgbuf
&= ~E1000_VF_SET_PROMISC_MULTICAST
;
5965 /* if we have hashes and we are clearing a multicast promisc
5966 * flag we need to write the hashes to the MTA as this step
5967 * was previously skipped
5969 if (vf_data
->num_vf_mc_hashes
> 30) {
5970 vmolr
|= E1000_VMOLR_MPME
;
5971 } else if (vf_data
->num_vf_mc_hashes
) {
5974 vmolr
|= E1000_VMOLR_ROMPE
;
5975 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5976 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5980 wr32(E1000_VMOLR(vf
), vmolr
);
5982 /* there are flags left unprocessed, likely not supported */
5983 if (*msgbuf
& E1000_VT_MSGINFO_MASK
)
5989 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
5990 u32
*msgbuf
, u32 vf
)
5992 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5993 u16
*hash_list
= (u16
*)&msgbuf
[1];
5994 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5997 /* salt away the number of multicast addresses assigned
5998 * to this VF for later use to restore when the PF multi cast
6001 vf_data
->num_vf_mc_hashes
= n
;
6003 /* only up to 30 hash values supported */
6007 /* store the hashes for later use */
6008 for (i
= 0; i
< n
; i
++)
6009 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];
6011 /* Flush and reset the mta with the new values */
6012 igb_set_rx_mode(adapter
->netdev
);
6017 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
6019 struct e1000_hw
*hw
= &adapter
->hw
;
6020 struct vf_data_storage
*vf_data
;
6023 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
6024 u32 vmolr
= rd32(E1000_VMOLR(i
));
6026 vmolr
&= ~(E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
6028 vf_data
= &adapter
->vf_data
[i
];
6030 if ((vf_data
->num_vf_mc_hashes
> 30) ||
6031 (vf_data
->flags
& IGB_VF_FLAG_MULTI_PROMISC
)) {
6032 vmolr
|= E1000_VMOLR_MPME
;
6033 } else if (vf_data
->num_vf_mc_hashes
) {
6034 vmolr
|= E1000_VMOLR_ROMPE
;
6035 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
6036 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
6038 wr32(E1000_VMOLR(i
), vmolr
);
6042 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
6044 struct e1000_hw
*hw
= &adapter
->hw
;
6045 u32 pool_mask
, vlvf_mask
, i
;
6047 /* create mask for VF and other pools */
6048 pool_mask
= E1000_VLVF_POOLSEL_MASK
;
6049 vlvf_mask
= BIT(E1000_VLVF_POOLSEL_SHIFT
+ vf
);
6051 /* drop PF from pool bits */
6052 pool_mask
&= ~BIT(E1000_VLVF_POOLSEL_SHIFT
+
6053 adapter
->vfs_allocated_count
);
6055 /* Find the vlan filter for this id */
6056 for (i
= E1000_VLVF_ARRAY_SIZE
; i
--;) {
6057 u32 vlvf
= rd32(E1000_VLVF(i
));
6058 u32 vfta_mask
, vid
, vfta
;
6060 /* remove the vf from the pool */
6061 if (!(vlvf
& vlvf_mask
))
6064 /* clear out bit from VLVF */
6067 /* if other pools are present, just remove ourselves */
6068 if (vlvf
& pool_mask
)
6071 /* if PF is present, leave VFTA */
6072 if (vlvf
& E1000_VLVF_POOLSEL_MASK
)
6075 vid
= vlvf
& E1000_VLVF_VLANID_MASK
;
6076 vfta_mask
= BIT(vid
% 32);
6078 /* clear bit from VFTA */
6079 vfta
= adapter
->shadow_vfta
[vid
/ 32];
6080 if (vfta
& vfta_mask
)
6081 hw
->mac
.ops
.write_vfta(hw
, vid
/ 32, vfta
^ vfta_mask
);
6083 /* clear pool selection enable */
6084 if (adapter
->flags
& IGB_FLAG_VLAN_PROMISC
)
6085 vlvf
&= E1000_VLVF_POOLSEL_MASK
;
6089 /* clear pool bits */
6090 wr32(E1000_VLVF(i
), vlvf
);
6094 static int igb_find_vlvf_entry(struct e1000_hw
*hw
, u32 vlan
)
6099 /* short cut the special case */
6103 /* Search for the VLAN id in the VLVF entries */
6104 for (idx
= E1000_VLVF_ARRAY_SIZE
; --idx
;) {
6105 vlvf
= rd32(E1000_VLVF(idx
));
6106 if ((vlvf
& VLAN_VID_MASK
) == vlan
)
6113 static void igb_update_pf_vlvf(struct igb_adapter
*adapter
, u32 vid
)
6115 struct e1000_hw
*hw
= &adapter
->hw
;
6119 idx
= igb_find_vlvf_entry(hw
, vid
);
6123 /* See if any other pools are set for this VLAN filter
6124 * entry other than the PF.
6126 pf_id
= adapter
->vfs_allocated_count
+ E1000_VLVF_POOLSEL_SHIFT
;
6127 bits
= ~BIT(pf_id
) & E1000_VLVF_POOLSEL_MASK
;
6128 bits
&= rd32(E1000_VLVF(idx
));
6130 /* Disable the filter so this falls into the default pool. */
6132 if (adapter
->flags
& IGB_FLAG_VLAN_PROMISC
)
6133 wr32(E1000_VLVF(idx
), BIT(pf_id
));
6135 wr32(E1000_VLVF(idx
), 0);
6139 static s32
igb_set_vf_vlan(struct igb_adapter
*adapter
, u32 vid
,
6142 int pf_id
= adapter
->vfs_allocated_count
;
6143 struct e1000_hw
*hw
= &adapter
->hw
;
6146 /* If VLAN overlaps with one the PF is currently monitoring make
6147 * sure that we are able to allocate a VLVF entry. This may be
6148 * redundant but it guarantees PF will maintain visibility to
6151 if (add
&& test_bit(vid
, adapter
->active_vlans
)) {
6152 err
= igb_vfta_set(hw
, vid
, pf_id
, true, false);
6157 err
= igb_vfta_set(hw
, vid
, vf
, add
, false);
6162 /* If we failed to add the VF VLAN or we are removing the VF VLAN
6163 * we may need to drop the PF pool bit in order to allow us to free
6164 * up the VLVF resources.
6166 if (test_bit(vid
, adapter
->active_vlans
) ||
6167 (adapter
->flags
& IGB_FLAG_VLAN_PROMISC
))
6168 igb_update_pf_vlvf(adapter
, vid
);
6173 static void igb_set_vmvir(struct igb_adapter
*adapter
, u32 vid
, u32 vf
)
6175 struct e1000_hw
*hw
= &adapter
->hw
;
6178 wr32(E1000_VMVIR(vf
), (vid
| E1000_VMVIR_VLANA_DEFAULT
));
6180 wr32(E1000_VMVIR(vf
), 0);
6183 static int igb_enable_port_vlan(struct igb_adapter
*adapter
, int vf
,
6188 err
= igb_set_vf_vlan(adapter
, vlan
, true, vf
);
6192 igb_set_vmvir(adapter
, vlan
| (qos
<< VLAN_PRIO_SHIFT
), vf
);
6193 igb_set_vmolr(adapter
, vf
, !vlan
);
6195 /* revoke access to previous VLAN */
6196 if (vlan
!= adapter
->vf_data
[vf
].pf_vlan
)
6197 igb_set_vf_vlan(adapter
, adapter
->vf_data
[vf
].pf_vlan
,
6200 adapter
->vf_data
[vf
].pf_vlan
= vlan
;
6201 adapter
->vf_data
[vf
].pf_qos
= qos
;
6202 igb_set_vf_vlan_strip(adapter
, vf
, true);
6203 dev_info(&adapter
->pdev
->dev
,
6204 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan
, qos
, vf
);
6205 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
6206 dev_warn(&adapter
->pdev
->dev
,
6207 "The VF VLAN has been set, but the PF device is not up.\n");
6208 dev_warn(&adapter
->pdev
->dev
,
6209 "Bring the PF device up before attempting to use the VF device.\n");
6215 static int igb_disable_port_vlan(struct igb_adapter
*adapter
, int vf
)
6217 /* Restore tagless access via VLAN 0 */
6218 igb_set_vf_vlan(adapter
, 0, true, vf
);
6220 igb_set_vmvir(adapter
, 0, vf
);
6221 igb_set_vmolr(adapter
, vf
, true);
6223 /* Remove any PF assigned VLAN */
6224 if (adapter
->vf_data
[vf
].pf_vlan
)
6225 igb_set_vf_vlan(adapter
, adapter
->vf_data
[vf
].pf_vlan
,
6228 adapter
->vf_data
[vf
].pf_vlan
= 0;
6229 adapter
->vf_data
[vf
].pf_qos
= 0;
6230 igb_set_vf_vlan_strip(adapter
, vf
, false);
6235 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
, int vf
,
6236 u16 vlan
, u8 qos
, __be16 vlan_proto
)
6238 struct igb_adapter
*adapter
= netdev_priv(netdev
);
6240 if ((vf
>= adapter
->vfs_allocated_count
) || (vlan
> 4095) || (qos
> 7))
6243 if (vlan_proto
!= htons(ETH_P_8021Q
))
6244 return -EPROTONOSUPPORT
;
6246 return (vlan
|| qos
) ? igb_enable_port_vlan(adapter
, vf
, vlan
, qos
) :
6247 igb_disable_port_vlan(adapter
, vf
);
6250 static int igb_set_vf_vlan_msg(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
6252 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
6253 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
6256 if (adapter
->vf_data
[vf
].pf_vlan
)
6259 /* VLAN 0 is a special case, don't allow it to be removed */
6263 ret
= igb_set_vf_vlan(adapter
, vid
, !!add
, vf
);
6265 igb_set_vf_vlan_strip(adapter
, vf
, !!vid
);
6269 static inline void igb_vf_reset(struct igb_adapter
*adapter
, u32 vf
)
6271 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6273 /* clear flags - except flag that indicates PF has set the MAC */
6274 vf_data
->flags
&= IGB_VF_FLAG_PF_SET_MAC
;
6275 vf_data
->last_nack
= jiffies
;
6277 /* reset vlans for device */
6278 igb_clear_vf_vfta(adapter
, vf
);
6279 igb_set_vf_vlan(adapter
, vf_data
->pf_vlan
, true, vf
);
6280 igb_set_vmvir(adapter
, vf_data
->pf_vlan
|
6281 (vf_data
->pf_qos
<< VLAN_PRIO_SHIFT
), vf
);
6282 igb_set_vmolr(adapter
, vf
, !vf_data
->pf_vlan
);
6283 igb_set_vf_vlan_strip(adapter
, vf
, !!(vf_data
->pf_vlan
));
6285 /* reset multicast table array for vf */
6286 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
6288 /* Flush and reset the mta with the new values */
6289 igb_set_rx_mode(adapter
->netdev
);
6292 static void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
6294 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
6296 /* clear mac address as we were hotplug removed/added */
6297 if (!(adapter
->vf_data
[vf
].flags
& IGB_VF_FLAG_PF_SET_MAC
))
6298 eth_zero_addr(vf_mac
);
6300 /* process remaining reset events */
6301 igb_vf_reset(adapter
, vf
);
6304 static void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
6306 struct e1000_hw
*hw
= &adapter
->hw
;
6307 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
6308 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
6310 u8
*addr
= (u8
*)(&msgbuf
[1]);
6312 /* process all the same items cleared in a function level reset */
6313 igb_vf_reset(adapter
, vf
);
6315 /* set vf mac address */
6316 igb_rar_set_qsel(adapter
, vf_mac
, rar_entry
, vf
);
6318 /* enable transmit and receive for vf */
6319 reg
= rd32(E1000_VFTE
);
6320 wr32(E1000_VFTE
, reg
| BIT(vf
));
6321 reg
= rd32(E1000_VFRE
);
6322 wr32(E1000_VFRE
, reg
| BIT(vf
));
6324 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_CTS
;
6326 /* reply to reset with ack and vf mac address */
6327 if (!is_zero_ether_addr(vf_mac
)) {
6328 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
6329 memcpy(addr
, vf_mac
, ETH_ALEN
);
6331 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_NACK
;
6333 igb_write_mbx(hw
, msgbuf
, 3, vf
);
6336 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
6338 /* The VF MAC Address is stored in a packed array of bytes
6339 * starting at the second 32 bit word of the msg array
6341 unsigned char *addr
= (char *)&msg
[1];
6344 if (is_valid_ether_addr(addr
))
6345 err
= igb_set_vf_mac(adapter
, vf
, addr
);
6350 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
6352 struct e1000_hw
*hw
= &adapter
->hw
;
6353 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6354 u32 msg
= E1000_VT_MSGTYPE_NACK
;
6356 /* if device isn't clear to send it shouldn't be reading either */
6357 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
) &&
6358 time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
))) {
6359 igb_write_mbx(hw
, &msg
, 1, vf
);
6360 vf_data
->last_nack
= jiffies
;
6364 static void igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
6366 struct pci_dev
*pdev
= adapter
->pdev
;
6367 u32 msgbuf
[E1000_VFMAILBOX_SIZE
];
6368 struct e1000_hw
*hw
= &adapter
->hw
;
6369 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6372 retval
= igb_read_mbx(hw
, msgbuf
, E1000_VFMAILBOX_SIZE
, vf
);
6375 /* if receive failed revoke VF CTS stats and restart init */
6376 dev_err(&pdev
->dev
, "Error receiving message from VF\n");
6377 vf_data
->flags
&= ~IGB_VF_FLAG_CTS
;
6378 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
6383 /* this is a message we already processed, do nothing */
6384 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
6387 /* until the vf completes a reset it should not be
6388 * allowed to start any configuration.
6390 if (msgbuf
[0] == E1000_VF_RESET
) {
6391 igb_vf_reset_msg(adapter
, vf
);
6395 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
)) {
6396 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
6402 switch ((msgbuf
[0] & 0xFFFF)) {
6403 case E1000_VF_SET_MAC_ADDR
:
6405 if (!(vf_data
->flags
& IGB_VF_FLAG_PF_SET_MAC
))
6406 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
6408 dev_warn(&pdev
->dev
,
6409 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6412 case E1000_VF_SET_PROMISC
:
6413 retval
= igb_set_vf_promisc(adapter
, msgbuf
, vf
);
6415 case E1000_VF_SET_MULTICAST
:
6416 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
6418 case E1000_VF_SET_LPE
:
6419 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
6421 case E1000_VF_SET_VLAN
:
6423 if (vf_data
->pf_vlan
)
6424 dev_warn(&pdev
->dev
,
6425 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6428 retval
= igb_set_vf_vlan_msg(adapter
, msgbuf
, vf
);
6431 dev_err(&pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
6436 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
6438 /* notify the VF of the results of what it sent us */
6440 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
6442 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
6444 igb_write_mbx(hw
, msgbuf
, 1, vf
);
6447 static void igb_msg_task(struct igb_adapter
*adapter
)
6449 struct e1000_hw
*hw
= &adapter
->hw
;
6452 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
6453 /* process any reset requests */
6454 if (!igb_check_for_rst(hw
, vf
))
6455 igb_vf_reset_event(adapter
, vf
);
6457 /* process any messages pending */
6458 if (!igb_check_for_msg(hw
, vf
))
6459 igb_rcv_msg_from_vf(adapter
, vf
);
6461 /* process any acks */
6462 if (!igb_check_for_ack(hw
, vf
))
6463 igb_rcv_ack_from_vf(adapter
, vf
);
6468 * igb_set_uta - Set unicast filter table address
6469 * @adapter: board private structure
6470 * @set: boolean indicating if we are setting or clearing bits
6472 * The unicast table address is a register array of 32-bit registers.
6473 * The table is meant to be used in a way similar to how the MTA is used
6474 * however due to certain limitations in the hardware it is necessary to
6475 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6476 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
6478 static void igb_set_uta(struct igb_adapter
*adapter
, bool set
)
6480 struct e1000_hw
*hw
= &adapter
->hw
;
6481 u32 uta
= set
? ~0 : 0;
6484 /* we only need to do this if VMDq is enabled */
6485 if (!adapter
->vfs_allocated_count
)
6488 for (i
= hw
->mac
.uta_reg_count
; i
--;)
6489 array_wr32(E1000_UTA
, i
, uta
);
6493 * igb_intr_msi - Interrupt Handler
6494 * @irq: interrupt number
6495 * @data: pointer to a network interface device structure
6497 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
6499 struct igb_adapter
*adapter
= data
;
6500 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
6501 struct e1000_hw
*hw
= &adapter
->hw
;
6502 /* read ICR disables interrupts using IAM */
6503 u32 icr
= rd32(E1000_ICR
);
6505 igb_write_itr(q_vector
);
6507 if (icr
& E1000_ICR_DRSTA
)
6508 schedule_work(&adapter
->reset_task
);
6510 if (icr
& E1000_ICR_DOUTSYNC
) {
6511 /* HW is reporting DMA is out of sync */
6512 adapter
->stats
.doosync
++;
6515 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
6516 hw
->mac
.get_link_status
= 1;
6517 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
6518 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
6521 if (icr
& E1000_ICR_TS
)
6522 igb_tsync_interrupt(adapter
);
6524 napi_schedule(&q_vector
->napi
);
6530 * igb_intr - Legacy Interrupt Handler
6531 * @irq: interrupt number
6532 * @data: pointer to a network interface device structure
6534 static irqreturn_t
igb_intr(int irq
, void *data
)
6536 struct igb_adapter
*adapter
= data
;
6537 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
6538 struct e1000_hw
*hw
= &adapter
->hw
;
6539 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
6540 * need for the IMC write
6542 u32 icr
= rd32(E1000_ICR
);
6544 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6545 * not set, then the adapter didn't send an interrupt
6547 if (!(icr
& E1000_ICR_INT_ASSERTED
))
6550 igb_write_itr(q_vector
);
6552 if (icr
& E1000_ICR_DRSTA
)
6553 schedule_work(&adapter
->reset_task
);
6555 if (icr
& E1000_ICR_DOUTSYNC
) {
6556 /* HW is reporting DMA is out of sync */
6557 adapter
->stats
.doosync
++;
6560 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
6561 hw
->mac
.get_link_status
= 1;
6562 /* guard against interrupt when we're going down */
6563 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
6564 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
6567 if (icr
& E1000_ICR_TS
)
6568 igb_tsync_interrupt(adapter
);
6570 napi_schedule(&q_vector
->napi
);
6575 static void igb_ring_irq_enable(struct igb_q_vector
*q_vector
)
6577 struct igb_adapter
*adapter
= q_vector
->adapter
;
6578 struct e1000_hw
*hw
= &adapter
->hw
;
6580 if ((q_vector
->rx
.ring
&& (adapter
->rx_itr_setting
& 3)) ||
6581 (!q_vector
->rx
.ring
&& (adapter
->tx_itr_setting
& 3))) {
6582 if ((adapter
->num_q_vectors
== 1) && !adapter
->vf_data
)
6583 igb_set_itr(q_vector
);
6585 igb_update_ring_itr(q_vector
);
6588 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
6589 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
6590 wr32(E1000_EIMS
, q_vector
->eims_value
);
6592 igb_irq_enable(adapter
);
6597 * igb_poll - NAPI Rx polling callback
6598 * @napi: napi polling structure
6599 * @budget: count of how many packets we should handle
6601 static int igb_poll(struct napi_struct
*napi
, int budget
)
6603 struct igb_q_vector
*q_vector
= container_of(napi
,
6604 struct igb_q_vector
,
6606 bool clean_complete
= true;
6609 #ifdef CONFIG_IGB_DCA
6610 if (q_vector
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
6611 igb_update_dca(q_vector
);
6613 if (q_vector
->tx
.ring
)
6614 clean_complete
= igb_clean_tx_irq(q_vector
, budget
);
6616 if (q_vector
->rx
.ring
) {
6617 int cleaned
= igb_clean_rx_irq(q_vector
, budget
);
6619 work_done
+= cleaned
;
6620 if (cleaned
>= budget
)
6621 clean_complete
= false;
6624 /* If all work not completed, return budget and keep polling */
6625 if (!clean_complete
)
6628 /* If not enough Rx work done, exit the polling mode */
6629 napi_complete_done(napi
, work_done
);
6630 igb_ring_irq_enable(q_vector
);
6636 * igb_clean_tx_irq - Reclaim resources after transmit completes
6637 * @q_vector: pointer to q_vector containing needed info
6638 * @napi_budget: Used to determine if we are in netpoll
6640 * returns true if ring is completely cleaned
6642 static bool igb_clean_tx_irq(struct igb_q_vector
*q_vector
, int napi_budget
)
6644 struct igb_adapter
*adapter
= q_vector
->adapter
;
6645 struct igb_ring
*tx_ring
= q_vector
->tx
.ring
;
6646 struct igb_tx_buffer
*tx_buffer
;
6647 union e1000_adv_tx_desc
*tx_desc
;
6648 unsigned int total_bytes
= 0, total_packets
= 0;
6649 unsigned int budget
= q_vector
->tx
.work_limit
;
6650 unsigned int i
= tx_ring
->next_to_clean
;
6652 if (test_bit(__IGB_DOWN
, &adapter
->state
))
6655 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6656 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
6657 i
-= tx_ring
->count
;
6660 union e1000_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
6662 /* if next_to_watch is not set then there is no work pending */
6666 /* prevent any other reads prior to eop_desc */
6667 read_barrier_depends();
6669 /* if DD is not set pending work has not been completed */
6670 if (!(eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)))
6673 /* clear next_to_watch to prevent false hangs */
6674 tx_buffer
->next_to_watch
= NULL
;
6676 /* update the statistics for this packet */
6677 total_bytes
+= tx_buffer
->bytecount
;
6678 total_packets
+= tx_buffer
->gso_segs
;
6681 napi_consume_skb(tx_buffer
->skb
, napi_budget
);
6683 /* unmap skb header data */
6684 dma_unmap_single(tx_ring
->dev
,
6685 dma_unmap_addr(tx_buffer
, dma
),
6686 dma_unmap_len(tx_buffer
, len
),
6689 /* clear tx_buffer data */
6690 tx_buffer
->skb
= NULL
;
6691 dma_unmap_len_set(tx_buffer
, len
, 0);
6693 /* clear last DMA location and unmap remaining buffers */
6694 while (tx_desc
!= eop_desc
) {
6699 i
-= tx_ring
->count
;
6700 tx_buffer
= tx_ring
->tx_buffer_info
;
6701 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6704 /* unmap any remaining paged data */
6705 if (dma_unmap_len(tx_buffer
, len
)) {
6706 dma_unmap_page(tx_ring
->dev
,
6707 dma_unmap_addr(tx_buffer
, dma
),
6708 dma_unmap_len(tx_buffer
, len
),
6710 dma_unmap_len_set(tx_buffer
, len
, 0);
6714 /* move us one more past the eop_desc for start of next pkt */
6719 i
-= tx_ring
->count
;
6720 tx_buffer
= tx_ring
->tx_buffer_info
;
6721 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6724 /* issue prefetch for next Tx descriptor */
6727 /* update budget accounting */
6729 } while (likely(budget
));
6731 netdev_tx_completed_queue(txring_txq(tx_ring
),
6732 total_packets
, total_bytes
);
6733 i
+= tx_ring
->count
;
6734 tx_ring
->next_to_clean
= i
;
6735 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6736 tx_ring
->tx_stats
.bytes
+= total_bytes
;
6737 tx_ring
->tx_stats
.packets
+= total_packets
;
6738 u64_stats_update_end(&tx_ring
->tx_syncp
);
6739 q_vector
->tx
.total_bytes
+= total_bytes
;
6740 q_vector
->tx
.total_packets
+= total_packets
;
6742 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
)) {
6743 struct e1000_hw
*hw
= &adapter
->hw
;
6745 /* Detect a transmit hang in hardware, this serializes the
6746 * check with the clearing of time_stamp and movement of i
6748 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
6749 if (tx_buffer
->next_to_watch
&&
6750 time_after(jiffies
, tx_buffer
->time_stamp
+
6751 (adapter
->tx_timeout_factor
* HZ
)) &&
6752 !(rd32(E1000_STATUS
) & E1000_STATUS_TXOFF
)) {
6754 /* detected Tx unit hang */
6755 dev_err(tx_ring
->dev
,
6756 "Detected Tx Unit Hang\n"
6760 " next_to_use <%x>\n"
6761 " next_to_clean <%x>\n"
6762 "buffer_info[next_to_clean]\n"
6763 " time_stamp <%lx>\n"
6764 " next_to_watch <%p>\n"
6766 " desc.status <%x>\n",
6767 tx_ring
->queue_index
,
6768 rd32(E1000_TDH(tx_ring
->reg_idx
)),
6769 readl(tx_ring
->tail
),
6770 tx_ring
->next_to_use
,
6771 tx_ring
->next_to_clean
,
6772 tx_buffer
->time_stamp
,
6773 tx_buffer
->next_to_watch
,
6775 tx_buffer
->next_to_watch
->wb
.status
);
6776 netif_stop_subqueue(tx_ring
->netdev
,
6777 tx_ring
->queue_index
);
6779 /* we are about to reset, no point in enabling stuff */
6784 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6785 if (unlikely(total_packets
&&
6786 netif_carrier_ok(tx_ring
->netdev
) &&
6787 igb_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
)) {
6788 /* Make sure that anybody stopping the queue after this
6789 * sees the new next_to_clean.
6792 if (__netif_subqueue_stopped(tx_ring
->netdev
,
6793 tx_ring
->queue_index
) &&
6794 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
6795 netif_wake_subqueue(tx_ring
->netdev
,
6796 tx_ring
->queue_index
);
6798 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6799 tx_ring
->tx_stats
.restart_queue
++;
6800 u64_stats_update_end(&tx_ring
->tx_syncp
);
6808 * igb_reuse_rx_page - page flip buffer and store it back on the ring
6809 * @rx_ring: rx descriptor ring to store buffers on
6810 * @old_buff: donor buffer to have page reused
6812 * Synchronizes page for reuse by the adapter
6814 static void igb_reuse_rx_page(struct igb_ring
*rx_ring
,
6815 struct igb_rx_buffer
*old_buff
)
6817 struct igb_rx_buffer
*new_buff
;
6818 u16 nta
= rx_ring
->next_to_alloc
;
6820 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
6822 /* update, and store next to alloc */
6824 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
6826 /* transfer page from old buffer to new buffer */
6827 *new_buff
= *old_buff
;
6830 static inline bool igb_page_is_reserved(struct page
*page
)
6832 return (page_to_nid(page
) != numa_mem_id()) || page_is_pfmemalloc(page
);
6835 static bool igb_can_reuse_rx_page(struct igb_rx_buffer
*rx_buffer
,
6837 unsigned int truesize
)
6839 unsigned int pagecnt_bias
= rx_buffer
->pagecnt_bias
--;
6841 /* avoid re-using remote pages */
6842 if (unlikely(igb_page_is_reserved(page
)))
6845 #if (PAGE_SIZE < 8192)
6846 /* if we are only owner of page we can reuse it */
6847 if (unlikely(page_ref_count(page
) != pagecnt_bias
))
6850 /* flip page offset to other buffer */
6851 rx_buffer
->page_offset
^= IGB_RX_BUFSZ
;
6853 /* move offset up to the next cache line */
6854 rx_buffer
->page_offset
+= truesize
;
6856 if (rx_buffer
->page_offset
> (PAGE_SIZE
- IGB_RX_BUFSZ
))
6860 /* If we have drained the page fragment pool we need to update
6861 * the pagecnt_bias and page count so that we fully restock the
6862 * number of references the driver holds.
6864 if (unlikely(pagecnt_bias
== 1)) {
6865 page_ref_add(page
, USHRT_MAX
);
6866 rx_buffer
->pagecnt_bias
= USHRT_MAX
;
6873 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6874 * @rx_ring: rx descriptor ring to transact packets on
6875 * @rx_buffer: buffer containing page to add
6876 * @rx_desc: descriptor containing length of buffer written by hardware
6877 * @skb: sk_buff to place the data into
6879 * This function will add the data contained in rx_buffer->page to the skb.
6880 * This is done either through a direct copy if the data in the buffer is
6881 * less than the skb header size, otherwise it will just attach the page as
6882 * a frag to the skb.
6884 * The function will then update the page offset if necessary and return
6885 * true if the buffer can be reused by the adapter.
6887 static bool igb_add_rx_frag(struct igb_ring
*rx_ring
,
6888 struct igb_rx_buffer
*rx_buffer
,
6890 union e1000_adv_rx_desc
*rx_desc
,
6891 struct sk_buff
*skb
)
6893 struct page
*page
= rx_buffer
->page
;
6894 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
6895 #if (PAGE_SIZE < 8192)
6896 unsigned int truesize
= IGB_RX_BUFSZ
;
6898 unsigned int truesize
= SKB_DATA_ALIGN(size
);
6900 unsigned int pull_len
;
6902 if (unlikely(skb_is_nonlinear(skb
)))
6905 if (unlikely(igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
))) {
6906 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
6907 va
+= IGB_TS_HDR_LEN
;
6908 size
-= IGB_TS_HDR_LEN
;
6911 if (likely(size
<= IGB_RX_HDR_LEN
)) {
6912 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
6914 /* page is not reserved, we can reuse buffer as-is */
6915 if (likely(!igb_page_is_reserved(page
)))
6918 /* this page cannot be reused so discard it */
6922 /* we need the header to contain the greater of either ETH_HLEN or
6923 * 60 bytes if the skb->len is less than 60 for skb_pad.
6925 pull_len
= eth_get_headlen(va
, IGB_RX_HDR_LEN
);
6927 /* align pull length to size of long to optimize memcpy performance */
6928 memcpy(__skb_put(skb
, pull_len
), va
, ALIGN(pull_len
, sizeof(long)));
6930 /* update all of the pointers */
6935 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
6936 (unsigned long)va
& ~PAGE_MASK
, size
, truesize
);
6938 return igb_can_reuse_rx_page(rx_buffer
, page
, truesize
);
6941 static struct sk_buff
*igb_fetch_rx_buffer(struct igb_ring
*rx_ring
,
6942 union e1000_adv_rx_desc
*rx_desc
,
6943 struct sk_buff
*skb
)
6945 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
6946 struct igb_rx_buffer
*rx_buffer
;
6949 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
6950 page
= rx_buffer
->page
;
6953 /* we are reusing so sync this buffer for CPU use */
6954 dma_sync_single_range_for_cpu(rx_ring
->dev
,
6956 rx_buffer
->page_offset
,
6961 void *page_addr
= page_address(page
) +
6962 rx_buffer
->page_offset
;
6964 /* prefetch first cache line of first page */
6965 prefetch(page_addr
);
6966 #if L1_CACHE_BYTES < 128
6967 prefetch(page_addr
+ L1_CACHE_BYTES
);
6970 /* allocate a skb to store the frags */
6971 skb
= napi_alloc_skb(&rx_ring
->q_vector
->napi
, IGB_RX_HDR_LEN
);
6972 if (unlikely(!skb
)) {
6973 rx_ring
->rx_stats
.alloc_failed
++;
6977 /* we will be copying header into skb->data in
6978 * pskb_may_pull so it is in our interest to prefetch
6979 * it now to avoid a possible cache miss
6981 prefetchw(skb
->data
);
6984 /* pull page into skb */
6985 if (igb_add_rx_frag(rx_ring
, rx_buffer
, size
, rx_desc
, skb
)) {
6986 /* hand second half of page back to the ring */
6987 igb_reuse_rx_page(rx_ring
, rx_buffer
);
6989 /* We are not reusing the buffer so unmap it and free
6990 * any references we are holding to it
6992 dma_unmap_page_attrs(rx_ring
->dev
, rx_buffer
->dma
,
6993 PAGE_SIZE
, DMA_FROM_DEVICE
,
6994 DMA_ATTR_SKIP_CPU_SYNC
);
6995 __page_frag_cache_drain(page
, rx_buffer
->pagecnt_bias
);
6998 /* clear contents of rx_buffer */
6999 rx_buffer
->page
= NULL
;
7004 static inline void igb_rx_checksum(struct igb_ring
*ring
,
7005 union e1000_adv_rx_desc
*rx_desc
,
7006 struct sk_buff
*skb
)
7008 skb_checksum_none_assert(skb
);
7010 /* Ignore Checksum bit is set */
7011 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_IXSM
))
7014 /* Rx checksum disabled via ethtool */
7015 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
7018 /* TCP/UDP checksum error bit is set */
7019 if (igb_test_staterr(rx_desc
,
7020 E1000_RXDEXT_STATERR_TCPE
|
7021 E1000_RXDEXT_STATERR_IPE
)) {
7022 /* work around errata with sctp packets where the TCPE aka
7023 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7024 * packets, (aka let the stack check the crc32c)
7026 if (!((skb
->len
== 60) &&
7027 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
))) {
7028 u64_stats_update_begin(&ring
->rx_syncp
);
7029 ring
->rx_stats
.csum_err
++;
7030 u64_stats_update_end(&ring
->rx_syncp
);
7032 /* let the stack verify checksum errors */
7035 /* It must be a TCP or UDP packet with a valid checksum */
7036 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_TCPCS
|
7037 E1000_RXD_STAT_UDPCS
))
7038 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
7040 dev_dbg(ring
->dev
, "cksum success: bits %08X\n",
7041 le32_to_cpu(rx_desc
->wb
.upper
.status_error
));
7044 static inline void igb_rx_hash(struct igb_ring
*ring
,
7045 union e1000_adv_rx_desc
*rx_desc
,
7046 struct sk_buff
*skb
)
7048 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
7050 le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
),
7055 * igb_is_non_eop - process handling of non-EOP buffers
7056 * @rx_ring: Rx ring being processed
7057 * @rx_desc: Rx descriptor for current buffer
7058 * @skb: current socket buffer containing buffer in progress
7060 * This function updates next to clean. If the buffer is an EOP buffer
7061 * this function exits returning false, otherwise it will place the
7062 * sk_buff in the next buffer to be chained and return true indicating
7063 * that this is in fact a non-EOP buffer.
7065 static bool igb_is_non_eop(struct igb_ring
*rx_ring
,
7066 union e1000_adv_rx_desc
*rx_desc
)
7068 u32 ntc
= rx_ring
->next_to_clean
+ 1;
7070 /* fetch, update, and store next to clean */
7071 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
7072 rx_ring
->next_to_clean
= ntc
;
7074 prefetch(IGB_RX_DESC(rx_ring
, ntc
));
7076 if (likely(igb_test_staterr(rx_desc
, E1000_RXD_STAT_EOP
)))
7083 * igb_cleanup_headers - Correct corrupted or empty headers
7084 * @rx_ring: rx descriptor ring packet is being transacted on
7085 * @rx_desc: pointer to the EOP Rx descriptor
7086 * @skb: pointer to current skb being fixed
7088 * Address the case where we are pulling data in on pages only
7089 * and as such no data is present in the skb header.
7091 * In addition if skb is not at least 60 bytes we need to pad it so that
7092 * it is large enough to qualify as a valid Ethernet frame.
7094 * Returns true if an error was encountered and skb was freed.
7096 static bool igb_cleanup_headers(struct igb_ring
*rx_ring
,
7097 union e1000_adv_rx_desc
*rx_desc
,
7098 struct sk_buff
*skb
)
7100 if (unlikely((igb_test_staterr(rx_desc
,
7101 E1000_RXDEXT_ERR_FRAME_ERR_MASK
)))) {
7102 struct net_device
*netdev
= rx_ring
->netdev
;
7103 if (!(netdev
->features
& NETIF_F_RXALL
)) {
7104 dev_kfree_skb_any(skb
);
7109 /* if eth_skb_pad returns an error the skb was freed */
7110 if (eth_skb_pad(skb
))
7117 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7118 * @rx_ring: rx descriptor ring packet is being transacted on
7119 * @rx_desc: pointer to the EOP Rx descriptor
7120 * @skb: pointer to current skb being populated
7122 * This function checks the ring, descriptor, and packet information in
7123 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7124 * other fields within the skb.
7126 static void igb_process_skb_fields(struct igb_ring
*rx_ring
,
7127 union e1000_adv_rx_desc
*rx_desc
,
7128 struct sk_buff
*skb
)
7130 struct net_device
*dev
= rx_ring
->netdev
;
7132 igb_rx_hash(rx_ring
, rx_desc
, skb
);
7134 igb_rx_checksum(rx_ring
, rx_desc
, skb
);
7136 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TS
) &&
7137 !igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
))
7138 igb_ptp_rx_rgtstamp(rx_ring
->q_vector
, skb
);
7140 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
7141 igb_test_staterr(rx_desc
, E1000_RXD_STAT_VP
)) {
7144 if (igb_test_staterr(rx_desc
, E1000_RXDEXT_STATERR_LB
) &&
7145 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &rx_ring
->flags
))
7146 vid
= be16_to_cpu(rx_desc
->wb
.upper
.vlan
);
7148 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
7150 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
7153 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
7155 skb
->protocol
= eth_type_trans(skb
, rx_ring
->netdev
);
7158 static int igb_clean_rx_irq(struct igb_q_vector
*q_vector
, const int budget
)
7160 struct igb_ring
*rx_ring
= q_vector
->rx
.ring
;
7161 struct sk_buff
*skb
= rx_ring
->skb
;
7162 unsigned int total_bytes
= 0, total_packets
= 0;
7163 u16 cleaned_count
= igb_desc_unused(rx_ring
);
7165 while (likely(total_packets
< budget
)) {
7166 union e1000_adv_rx_desc
*rx_desc
;
7168 /* return some buffers to hardware, one at a time is too slow */
7169 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
7170 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
7174 rx_desc
= IGB_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
7176 if (!rx_desc
->wb
.upper
.status_error
)
7179 /* This memory barrier is needed to keep us from reading
7180 * any other fields out of the rx_desc until we know the
7181 * descriptor has been written back
7185 /* retrieve a buffer from the ring */
7186 skb
= igb_fetch_rx_buffer(rx_ring
, rx_desc
, skb
);
7188 /* exit if we failed to retrieve a buffer */
7194 /* fetch next buffer in frame if non-eop */
7195 if (igb_is_non_eop(rx_ring
, rx_desc
))
7198 /* verify the packet layout is correct */
7199 if (igb_cleanup_headers(rx_ring
, rx_desc
, skb
)) {
7204 /* probably a little skewed due to removing CRC */
7205 total_bytes
+= skb
->len
;
7207 /* populate checksum, timestamp, VLAN, and protocol */
7208 igb_process_skb_fields(rx_ring
, rx_desc
, skb
);
7210 napi_gro_receive(&q_vector
->napi
, skb
);
7212 /* reset skb pointer */
7215 /* update budget accounting */
7219 /* place incomplete frames back on ring for completion */
7222 u64_stats_update_begin(&rx_ring
->rx_syncp
);
7223 rx_ring
->rx_stats
.packets
+= total_packets
;
7224 rx_ring
->rx_stats
.bytes
+= total_bytes
;
7225 u64_stats_update_end(&rx_ring
->rx_syncp
);
7226 q_vector
->rx
.total_packets
+= total_packets
;
7227 q_vector
->rx
.total_bytes
+= total_bytes
;
7230 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
7232 return total_packets
;
7235 static bool igb_alloc_mapped_page(struct igb_ring
*rx_ring
,
7236 struct igb_rx_buffer
*bi
)
7238 struct page
*page
= bi
->page
;
7241 /* since we are recycling buffers we should seldom need to alloc */
7245 /* alloc new page for storage */
7246 page
= dev_alloc_page();
7247 if (unlikely(!page
)) {
7248 rx_ring
->rx_stats
.alloc_failed
++;
7252 /* map page for use */
7253 dma
= dma_map_page_attrs(rx_ring
->dev
, page
, 0, PAGE_SIZE
,
7254 DMA_FROM_DEVICE
, DMA_ATTR_SKIP_CPU_SYNC
);
7256 /* if mapping failed free memory back to system since
7257 * there isn't much point in holding memory we can't use
7259 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
7262 rx_ring
->rx_stats
.alloc_failed
++;
7268 bi
->page_offset
= 0;
7269 bi
->pagecnt_bias
= 1;
7275 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
7276 * @adapter: address of board private structure
7278 void igb_alloc_rx_buffers(struct igb_ring
*rx_ring
, u16 cleaned_count
)
7280 union e1000_adv_rx_desc
*rx_desc
;
7281 struct igb_rx_buffer
*bi
;
7282 u16 i
= rx_ring
->next_to_use
;
7288 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
7289 bi
= &rx_ring
->rx_buffer_info
[i
];
7290 i
-= rx_ring
->count
;
7293 if (!igb_alloc_mapped_page(rx_ring
, bi
))
7296 /* sync the buffer for use by the device */
7297 dma_sync_single_range_for_device(rx_ring
->dev
, bi
->dma
,
7302 /* Refresh the desc even if buffer_addrs didn't change
7303 * because each write-back erases this info.
7305 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
7311 rx_desc
= IGB_RX_DESC(rx_ring
, 0);
7312 bi
= rx_ring
->rx_buffer_info
;
7313 i
-= rx_ring
->count
;
7316 /* clear the status bits for the next_to_use descriptor */
7317 rx_desc
->wb
.upper
.status_error
= 0;
7320 } while (cleaned_count
);
7322 i
+= rx_ring
->count
;
7324 if (rx_ring
->next_to_use
!= i
) {
7325 /* record the next descriptor to use */
7326 rx_ring
->next_to_use
= i
;
7328 /* update next to alloc since we have filled the ring */
7329 rx_ring
->next_to_alloc
= i
;
7331 /* Force memory writes to complete before letting h/w
7332 * know there are new descriptors to fetch. (Only
7333 * applicable for weak-ordered memory model archs,
7337 writel(i
, rx_ring
->tail
);
7347 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
7349 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7350 struct mii_ioctl_data
*data
= if_mii(ifr
);
7352 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
7357 data
->phy_id
= adapter
->hw
.phy
.addr
;
7360 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
7377 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
7383 return igb_mii_ioctl(netdev
, ifr
, cmd
);
7385 return igb_ptp_get_ts_config(netdev
, ifr
);
7387 return igb_ptp_set_ts_config(netdev
, ifr
);
7393 void igb_read_pci_cfg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7395 struct igb_adapter
*adapter
= hw
->back
;
7397 pci_read_config_word(adapter
->pdev
, reg
, value
);
7400 void igb_write_pci_cfg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7402 struct igb_adapter
*adapter
= hw
->back
;
7404 pci_write_config_word(adapter
->pdev
, reg
, *value
);
7407 s32
igb_read_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7409 struct igb_adapter
*adapter
= hw
->back
;
7411 if (pcie_capability_read_word(adapter
->pdev
, reg
, value
))
7412 return -E1000_ERR_CONFIG
;
7417 s32
igb_write_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7419 struct igb_adapter
*adapter
= hw
->back
;
7421 if (pcie_capability_write_word(adapter
->pdev
, reg
, *value
))
7422 return -E1000_ERR_CONFIG
;
7427 static void igb_vlan_mode(struct net_device
*netdev
, netdev_features_t features
)
7429 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7430 struct e1000_hw
*hw
= &adapter
->hw
;
7432 bool enable
= !!(features
& NETIF_F_HW_VLAN_CTAG_RX
);
7435 /* enable VLAN tag insert/strip */
7436 ctrl
= rd32(E1000_CTRL
);
7437 ctrl
|= E1000_CTRL_VME
;
7438 wr32(E1000_CTRL
, ctrl
);
7440 /* Disable CFI check */
7441 rctl
= rd32(E1000_RCTL
);
7442 rctl
&= ~E1000_RCTL_CFIEN
;
7443 wr32(E1000_RCTL
, rctl
);
7445 /* disable VLAN tag insert/strip */
7446 ctrl
= rd32(E1000_CTRL
);
7447 ctrl
&= ~E1000_CTRL_VME
;
7448 wr32(E1000_CTRL
, ctrl
);
7451 igb_set_vf_vlan_strip(adapter
, adapter
->vfs_allocated_count
, enable
);
7454 static int igb_vlan_rx_add_vid(struct net_device
*netdev
,
7455 __be16 proto
, u16 vid
)
7457 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7458 struct e1000_hw
*hw
= &adapter
->hw
;
7459 int pf_id
= adapter
->vfs_allocated_count
;
7461 /* add the filter since PF can receive vlans w/o entry in vlvf */
7462 if (!vid
|| !(adapter
->flags
& IGB_FLAG_VLAN_PROMISC
))
7463 igb_vfta_set(hw
, vid
, pf_id
, true, !!vid
);
7465 set_bit(vid
, adapter
->active_vlans
);
7470 static int igb_vlan_rx_kill_vid(struct net_device
*netdev
,
7471 __be16 proto
, u16 vid
)
7473 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7474 int pf_id
= adapter
->vfs_allocated_count
;
7475 struct e1000_hw
*hw
= &adapter
->hw
;
7477 /* remove VID from filter table */
7478 if (vid
&& !(adapter
->flags
& IGB_FLAG_VLAN_PROMISC
))
7479 igb_vfta_set(hw
, vid
, pf_id
, false, true);
7481 clear_bit(vid
, adapter
->active_vlans
);
7486 static void igb_restore_vlan(struct igb_adapter
*adapter
)
7490 igb_vlan_mode(adapter
->netdev
, adapter
->netdev
->features
);
7491 igb_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), 0);
7493 for_each_set_bit_from(vid
, adapter
->active_vlans
, VLAN_N_VID
)
7494 igb_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
7497 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u32 spd
, u8 dplx
)
7499 struct pci_dev
*pdev
= adapter
->pdev
;
7500 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
7504 /* Make sure dplx is at most 1 bit and lsb of speed is not set
7505 * for the switch() below to work
7507 if ((spd
& 1) || (dplx
& ~1))
7510 /* Fiber NIC's only allow 1000 gbps Full duplex
7511 * and 100Mbps Full duplex for 100baseFx sfp
7513 if (adapter
->hw
.phy
.media_type
== e1000_media_type_internal_serdes
) {
7514 switch (spd
+ dplx
) {
7515 case SPEED_10
+ DUPLEX_HALF
:
7516 case SPEED_10
+ DUPLEX_FULL
:
7517 case SPEED_100
+ DUPLEX_HALF
:
7524 switch (spd
+ dplx
) {
7525 case SPEED_10
+ DUPLEX_HALF
:
7526 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
7528 case SPEED_10
+ DUPLEX_FULL
:
7529 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
7531 case SPEED_100
+ DUPLEX_HALF
:
7532 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
7534 case SPEED_100
+ DUPLEX_FULL
:
7535 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
7537 case SPEED_1000
+ DUPLEX_FULL
:
7539 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
7541 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
7546 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7547 adapter
->hw
.phy
.mdix
= AUTO_ALL_MODES
;
7552 dev_err(&pdev
->dev
, "Unsupported Speed/Duplex configuration\n");
7556 static int __igb_shutdown(struct pci_dev
*pdev
, bool *enable_wake
,
7559 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7560 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7561 struct e1000_hw
*hw
= &adapter
->hw
;
7562 u32 ctrl
, rctl
, status
;
7563 u32 wufc
= runtime
? E1000_WUFC_LNKC
: adapter
->wol
;
7568 netif_device_detach(netdev
);
7570 if (netif_running(netdev
))
7571 __igb_close(netdev
, true);
7573 igb_ptp_suspend(adapter
);
7575 igb_clear_interrupt_scheme(adapter
);
7578 retval
= pci_save_state(pdev
);
7583 status
= rd32(E1000_STATUS
);
7584 if (status
& E1000_STATUS_LU
)
7585 wufc
&= ~E1000_WUFC_LNKC
;
7588 igb_setup_rctl(adapter
);
7589 igb_set_rx_mode(netdev
);
7591 /* turn on all-multi mode if wake on multicast is enabled */
7592 if (wufc
& E1000_WUFC_MC
) {
7593 rctl
= rd32(E1000_RCTL
);
7594 rctl
|= E1000_RCTL_MPE
;
7595 wr32(E1000_RCTL
, rctl
);
7598 ctrl
= rd32(E1000_CTRL
);
7599 /* advertise wake from D3Cold */
7600 #define E1000_CTRL_ADVD3WUC 0x00100000
7601 /* phy power management enable */
7602 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7603 ctrl
|= E1000_CTRL_ADVD3WUC
;
7604 wr32(E1000_CTRL
, ctrl
);
7606 /* Allow time for pending master requests to run */
7607 igb_disable_pcie_master(hw
);
7609 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
7610 wr32(E1000_WUFC
, wufc
);
7613 wr32(E1000_WUFC
, 0);
7616 *enable_wake
= wufc
|| adapter
->en_mng_pt
;
7618 igb_power_down_link(adapter
);
7620 igb_power_up_link(adapter
);
7622 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7623 * would have already happened in close and is redundant.
7625 igb_release_hw_control(adapter
);
7627 pci_disable_device(pdev
);
7633 #ifdef CONFIG_PM_SLEEP
7634 static int igb_suspend(struct device
*dev
)
7638 struct pci_dev
*pdev
= to_pci_dev(dev
);
7640 retval
= __igb_shutdown(pdev
, &wake
, 0);
7645 pci_prepare_to_sleep(pdev
);
7647 pci_wake_from_d3(pdev
, false);
7648 pci_set_power_state(pdev
, PCI_D3hot
);
7653 #endif /* CONFIG_PM_SLEEP */
7655 static int igb_resume(struct device
*dev
)
7657 struct pci_dev
*pdev
= to_pci_dev(dev
);
7658 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7659 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7660 struct e1000_hw
*hw
= &adapter
->hw
;
7663 pci_set_power_state(pdev
, PCI_D0
);
7664 pci_restore_state(pdev
);
7665 pci_save_state(pdev
);
7667 if (!pci_device_is_present(pdev
))
7669 err
= pci_enable_device_mem(pdev
);
7672 "igb: Cannot enable PCI device from suspend\n");
7675 pci_set_master(pdev
);
7677 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7678 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7680 if (igb_init_interrupt_scheme(adapter
, true)) {
7681 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7687 /* let the f/w know that the h/w is now under the control of the
7690 igb_get_hw_control(adapter
);
7692 wr32(E1000_WUS
, ~0);
7694 if (netdev
->flags
& IFF_UP
) {
7696 err
= __igb_open(netdev
, true);
7702 netif_device_attach(netdev
);
7706 static int igb_runtime_idle(struct device
*dev
)
7708 struct pci_dev
*pdev
= to_pci_dev(dev
);
7709 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7710 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7712 if (!igb_has_link(adapter
))
7713 pm_schedule_suspend(dev
, MSEC_PER_SEC
* 5);
7718 static int igb_runtime_suspend(struct device
*dev
)
7720 struct pci_dev
*pdev
= to_pci_dev(dev
);
7724 retval
= __igb_shutdown(pdev
, &wake
, 1);
7729 pci_prepare_to_sleep(pdev
);
7731 pci_wake_from_d3(pdev
, false);
7732 pci_set_power_state(pdev
, PCI_D3hot
);
7738 static int igb_runtime_resume(struct device
*dev
)
7740 return igb_resume(dev
);
7742 #endif /* CONFIG_PM */
7744 static void igb_shutdown(struct pci_dev
*pdev
)
7748 __igb_shutdown(pdev
, &wake
, 0);
7750 if (system_state
== SYSTEM_POWER_OFF
) {
7751 pci_wake_from_d3(pdev
, wake
);
7752 pci_set_power_state(pdev
, PCI_D3hot
);
7756 #ifdef CONFIG_PCI_IOV
7757 static int igb_sriov_reinit(struct pci_dev
*dev
)
7759 struct net_device
*netdev
= pci_get_drvdata(dev
);
7760 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7761 struct pci_dev
*pdev
= adapter
->pdev
;
7765 if (netif_running(netdev
))
7770 igb_clear_interrupt_scheme(adapter
);
7772 igb_init_queue_configuration(adapter
);
7774 if (igb_init_interrupt_scheme(adapter
, true)) {
7776 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7780 if (netif_running(netdev
))
7788 static int igb_pci_disable_sriov(struct pci_dev
*dev
)
7790 int err
= igb_disable_sriov(dev
);
7793 err
= igb_sriov_reinit(dev
);
7798 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
)
7800 int err
= igb_enable_sriov(dev
, num_vfs
);
7805 err
= igb_sriov_reinit(dev
);
7814 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
)
7816 #ifdef CONFIG_PCI_IOV
7818 return igb_pci_disable_sriov(dev
);
7820 return igb_pci_enable_sriov(dev
, num_vfs
);
7825 #ifdef CONFIG_NET_POLL_CONTROLLER
7826 /* Polling 'interrupt' - used by things like netconsole to send skbs
7827 * without having to re-enable interrupts. It's not called while
7828 * the interrupt routine is executing.
7830 static void igb_netpoll(struct net_device
*netdev
)
7832 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7833 struct e1000_hw
*hw
= &adapter
->hw
;
7834 struct igb_q_vector
*q_vector
;
7837 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
7838 q_vector
= adapter
->q_vector
[i
];
7839 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
7840 wr32(E1000_EIMC
, q_vector
->eims_value
);
7842 igb_irq_disable(adapter
);
7843 napi_schedule(&q_vector
->napi
);
7846 #endif /* CONFIG_NET_POLL_CONTROLLER */
7849 * igb_io_error_detected - called when PCI error is detected
7850 * @pdev: Pointer to PCI device
7851 * @state: The current pci connection state
7853 * This function is called after a PCI bus error affecting
7854 * this device has been detected.
7856 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
7857 pci_channel_state_t state
)
7859 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7860 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7862 netif_device_detach(netdev
);
7864 if (state
== pci_channel_io_perm_failure
)
7865 return PCI_ERS_RESULT_DISCONNECT
;
7867 if (netif_running(netdev
))
7869 pci_disable_device(pdev
);
7871 /* Request a slot slot reset. */
7872 return PCI_ERS_RESULT_NEED_RESET
;
7876 * igb_io_slot_reset - called after the pci bus has been reset.
7877 * @pdev: Pointer to PCI device
7879 * Restart the card from scratch, as if from a cold-boot. Implementation
7880 * resembles the first-half of the igb_resume routine.
7882 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
7884 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7885 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7886 struct e1000_hw
*hw
= &adapter
->hw
;
7887 pci_ers_result_t result
;
7890 if (pci_enable_device_mem(pdev
)) {
7892 "Cannot re-enable PCI device after reset.\n");
7893 result
= PCI_ERS_RESULT_DISCONNECT
;
7895 pci_set_master(pdev
);
7896 pci_restore_state(pdev
);
7897 pci_save_state(pdev
);
7899 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7900 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7903 wr32(E1000_WUS
, ~0);
7904 result
= PCI_ERS_RESULT_RECOVERED
;
7907 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7910 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7912 /* non-fatal, continue */
7919 * igb_io_resume - called when traffic can start flowing again.
7920 * @pdev: Pointer to PCI device
7922 * This callback is called when the error recovery driver tells us that
7923 * its OK to resume normal operation. Implementation resembles the
7924 * second-half of the igb_resume routine.
7926 static void igb_io_resume(struct pci_dev
*pdev
)
7928 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7929 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7931 if (netif_running(netdev
)) {
7932 if (igb_up(adapter
)) {
7933 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
7938 netif_device_attach(netdev
);
7940 /* let the f/w know that the h/w is now under the control of the
7943 igb_get_hw_control(adapter
);
7946 static void igb_rar_set_qsel(struct igb_adapter
*adapter
, u8
*addr
, u32 index
,
7949 struct e1000_hw
*hw
= &adapter
->hw
;
7950 u32 rar_low
, rar_high
;
7952 /* HW expects these to be in network order when they are plugged
7953 * into the registers which are little endian. In order to guarantee
7954 * that ordering we need to do an leXX_to_cpup here in order to be
7955 * ready for the byteswap that occurs with writel
7957 rar_low
= le32_to_cpup((__le32
*)(addr
));
7958 rar_high
= le16_to_cpup((__le16
*)(addr
+ 4));
7960 /* Indicate to hardware the Address is Valid. */
7961 rar_high
|= E1000_RAH_AV
;
7963 if (hw
->mac
.type
== e1000_82575
)
7964 rar_high
|= E1000_RAH_POOL_1
* qsel
;
7966 rar_high
|= E1000_RAH_POOL_1
<< qsel
;
7968 wr32(E1000_RAL(index
), rar_low
);
7970 wr32(E1000_RAH(index
), rar_high
);
7974 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
7975 int vf
, unsigned char *mac_addr
)
7977 struct e1000_hw
*hw
= &adapter
->hw
;
7978 /* VF MAC addresses start at end of receive addresses and moves
7979 * towards the first, as a result a collision should not be possible
7981 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
7983 memcpy(adapter
->vf_data
[vf
].vf_mac_addresses
, mac_addr
, ETH_ALEN
);
7985 igb_rar_set_qsel(adapter
, mac_addr
, rar_entry
, vf
);
7990 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
)
7992 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7993 if (!is_valid_ether_addr(mac
) || (vf
>= adapter
->vfs_allocated_count
))
7995 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_PF_SET_MAC
;
7996 dev_info(&adapter
->pdev
->dev
, "setting MAC %pM on VF %d\n", mac
, vf
);
7997 dev_info(&adapter
->pdev
->dev
,
7998 "Reload the VF driver to make this change effective.");
7999 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
8000 dev_warn(&adapter
->pdev
->dev
,
8001 "The VF MAC address has been set, but the PF device is not up.\n");
8002 dev_warn(&adapter
->pdev
->dev
,
8003 "Bring the PF device up before attempting to use the VF device.\n");
8005 return igb_set_vf_mac(adapter
, vf
, mac
);
8008 static int igb_link_mbps(int internal_link_speed
)
8010 switch (internal_link_speed
) {
8020 static void igb_set_vf_rate_limit(struct e1000_hw
*hw
, int vf
, int tx_rate
,
8027 /* Calculate the rate factor values to set */
8028 rf_int
= link_speed
/ tx_rate
;
8029 rf_dec
= (link_speed
- (rf_int
* tx_rate
));
8030 rf_dec
= (rf_dec
* BIT(E1000_RTTBCNRC_RF_INT_SHIFT
)) /
8033 bcnrc_val
= E1000_RTTBCNRC_RS_ENA
;
8034 bcnrc_val
|= ((rf_int
<< E1000_RTTBCNRC_RF_INT_SHIFT
) &
8035 E1000_RTTBCNRC_RF_INT_MASK
);
8036 bcnrc_val
|= (rf_dec
& E1000_RTTBCNRC_RF_DEC_MASK
);
8041 wr32(E1000_RTTDQSEL
, vf
); /* vf X uses queue X */
8042 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
8043 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
8045 wr32(E1000_RTTBCNRM
, 0x14);
8046 wr32(E1000_RTTBCNRC
, bcnrc_val
);
8049 static void igb_check_vf_rate_limit(struct igb_adapter
*adapter
)
8051 int actual_link_speed
, i
;
8052 bool reset_rate
= false;
8054 /* VF TX rate limit was not set or not supported */
8055 if ((adapter
->vf_rate_link_speed
== 0) ||
8056 (adapter
->hw
.mac
.type
!= e1000_82576
))
8059 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
8060 if (actual_link_speed
!= adapter
->vf_rate_link_speed
) {
8062 adapter
->vf_rate_link_speed
= 0;
8063 dev_info(&adapter
->pdev
->dev
,
8064 "Link speed has been changed. VF Transmit rate is disabled\n");
8067 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
8069 adapter
->vf_data
[i
].tx_rate
= 0;
8071 igb_set_vf_rate_limit(&adapter
->hw
, i
,
8072 adapter
->vf_data
[i
].tx_rate
,
8077 static int igb_ndo_set_vf_bw(struct net_device
*netdev
, int vf
,
8078 int min_tx_rate
, int max_tx_rate
)
8080 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8081 struct e1000_hw
*hw
= &adapter
->hw
;
8082 int actual_link_speed
;
8084 if (hw
->mac
.type
!= e1000_82576
)
8090 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
8091 if ((vf
>= adapter
->vfs_allocated_count
) ||
8092 (!(rd32(E1000_STATUS
) & E1000_STATUS_LU
)) ||
8093 (max_tx_rate
< 0) ||
8094 (max_tx_rate
> actual_link_speed
))
8097 adapter
->vf_rate_link_speed
= actual_link_speed
;
8098 adapter
->vf_data
[vf
].tx_rate
= (u16
)max_tx_rate
;
8099 igb_set_vf_rate_limit(hw
, vf
, max_tx_rate
, actual_link_speed
);
8104 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
8107 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8108 struct e1000_hw
*hw
= &adapter
->hw
;
8109 u32 reg_val
, reg_offset
;
8111 if (!adapter
->vfs_allocated_count
)
8114 if (vf
>= adapter
->vfs_allocated_count
)
8117 reg_offset
= (hw
->mac
.type
== e1000_82576
) ? E1000_DTXSWC
: E1000_TXSWC
;
8118 reg_val
= rd32(reg_offset
);
8120 reg_val
|= (BIT(vf
) |
8121 BIT(vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
));
8123 reg_val
&= ~(BIT(vf
) |
8124 BIT(vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
));
8125 wr32(reg_offset
, reg_val
);
8127 adapter
->vf_data
[vf
].spoofchk_enabled
= setting
;
8131 static int igb_ndo_get_vf_config(struct net_device
*netdev
,
8132 int vf
, struct ifla_vf_info
*ivi
)
8134 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8135 if (vf
>= adapter
->vfs_allocated_count
)
8138 memcpy(&ivi
->mac
, adapter
->vf_data
[vf
].vf_mac_addresses
, ETH_ALEN
);
8139 ivi
->max_tx_rate
= adapter
->vf_data
[vf
].tx_rate
;
8140 ivi
->min_tx_rate
= 0;
8141 ivi
->vlan
= adapter
->vf_data
[vf
].pf_vlan
;
8142 ivi
->qos
= adapter
->vf_data
[vf
].pf_qos
;
8143 ivi
->spoofchk
= adapter
->vf_data
[vf
].spoofchk_enabled
;
8147 static void igb_vmm_control(struct igb_adapter
*adapter
)
8149 struct e1000_hw
*hw
= &adapter
->hw
;
8152 switch (hw
->mac
.type
) {
8158 /* replication is not supported for 82575 */
8161 /* notify HW that the MAC is adding vlan tags */
8162 reg
= rd32(E1000_DTXCTL
);
8163 reg
|= E1000_DTXCTL_VLAN_ADDED
;
8164 wr32(E1000_DTXCTL
, reg
);
8167 /* enable replication vlan tag stripping */
8168 reg
= rd32(E1000_RPLOLR
);
8169 reg
|= E1000_RPLOLR_STRVLAN
;
8170 wr32(E1000_RPLOLR
, reg
);
8173 /* none of the above registers are supported by i350 */
8177 if (adapter
->vfs_allocated_count
) {
8178 igb_vmdq_set_loopback_pf(hw
, true);
8179 igb_vmdq_set_replication_pf(hw
, true);
8180 igb_vmdq_set_anti_spoofing_pf(hw
, true,
8181 adapter
->vfs_allocated_count
);
8183 igb_vmdq_set_loopback_pf(hw
, false);
8184 igb_vmdq_set_replication_pf(hw
, false);
8188 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
)
8190 struct e1000_hw
*hw
= &adapter
->hw
;
8194 if (hw
->mac
.type
> e1000_82580
) {
8195 if (adapter
->flags
& IGB_FLAG_DMAC
) {
8198 /* force threshold to 0. */
8199 wr32(E1000_DMCTXTH
, 0);
8201 /* DMA Coalescing high water mark needs to be greater
8202 * than the Rx threshold. Set hwm to PBA - max frame
8203 * size in 16B units, capping it at PBA - 6KB.
8205 hwm
= 64 * (pba
- 6);
8206 reg
= rd32(E1000_FCRTC
);
8207 reg
&= ~E1000_FCRTC_RTH_COAL_MASK
;
8208 reg
|= ((hwm
<< E1000_FCRTC_RTH_COAL_SHIFT
)
8209 & E1000_FCRTC_RTH_COAL_MASK
);
8210 wr32(E1000_FCRTC
, reg
);
8212 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8213 * frame size, capping it at PBA - 10KB.
8215 dmac_thr
= pba
- 10;
8216 reg
= rd32(E1000_DMACR
);
8217 reg
&= ~E1000_DMACR_DMACTHR_MASK
;
8218 reg
|= ((dmac_thr
<< E1000_DMACR_DMACTHR_SHIFT
)
8219 & E1000_DMACR_DMACTHR_MASK
);
8221 /* transition to L0x or L1 if available..*/
8222 reg
|= (E1000_DMACR_DMAC_EN
| E1000_DMACR_DMAC_LX_MASK
);
8224 /* watchdog timer= +-1000 usec in 32usec intervals */
8227 /* Disable BMC-to-OS Watchdog Enable */
8228 if (hw
->mac
.type
!= e1000_i354
)
8229 reg
&= ~E1000_DMACR_DC_BMC2OSW_EN
;
8231 wr32(E1000_DMACR
, reg
);
8233 /* no lower threshold to disable
8234 * coalescing(smart fifb)-UTRESH=0
8236 wr32(E1000_DMCRTRH
, 0);
8238 reg
= (IGB_DMCTLX_DCFLUSH_DIS
| 0x4);
8240 wr32(E1000_DMCTLX
, reg
);
8242 /* free space in tx packet buffer to wake from
8245 wr32(E1000_DMCTXTH
, (IGB_MIN_TXPBSIZE
-
8246 (IGB_TX_BUF_4096
+ adapter
->max_frame_size
)) >> 6);
8248 /* make low power state decision controlled
8251 reg
= rd32(E1000_PCIEMISC
);
8252 reg
&= ~E1000_PCIEMISC_LX_DECISION
;
8253 wr32(E1000_PCIEMISC
, reg
);
8254 } /* endif adapter->dmac is not disabled */
8255 } else if (hw
->mac
.type
== e1000_82580
) {
8256 u32 reg
= rd32(E1000_PCIEMISC
);
8258 wr32(E1000_PCIEMISC
, reg
& ~E1000_PCIEMISC_LX_DECISION
);
8259 wr32(E1000_DMACR
, 0);
8264 * igb_read_i2c_byte - Reads 8 bit word over I2C
8265 * @hw: pointer to hardware structure
8266 * @byte_offset: byte offset to read
8267 * @dev_addr: device address
8270 * Performs byte read operation over I2C interface at
8271 * a specified device address.
8273 s32
igb_read_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
8274 u8 dev_addr
, u8
*data
)
8276 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
8277 struct i2c_client
*this_client
= adapter
->i2c_client
;
8282 return E1000_ERR_I2C
;
8284 swfw_mask
= E1000_SWFW_PHY0_SM
;
8286 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
))
8287 return E1000_ERR_SWFW_SYNC
;
8289 status
= i2c_smbus_read_byte_data(this_client
, byte_offset
);
8290 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
8293 return E1000_ERR_I2C
;
8301 * igb_write_i2c_byte - Writes 8 bit word over I2C
8302 * @hw: pointer to hardware structure
8303 * @byte_offset: byte offset to write
8304 * @dev_addr: device address
8305 * @data: value to write
8307 * Performs byte write operation over I2C interface at
8308 * a specified device address.
8310 s32
igb_write_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
8311 u8 dev_addr
, u8 data
)
8313 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
8314 struct i2c_client
*this_client
= adapter
->i2c_client
;
8316 u16 swfw_mask
= E1000_SWFW_PHY0_SM
;
8319 return E1000_ERR_I2C
;
8321 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
))
8322 return E1000_ERR_SWFW_SYNC
;
8323 status
= i2c_smbus_write_byte_data(this_client
, byte_offset
, data
);
8324 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
8327 return E1000_ERR_I2C
;
8333 int igb_reinit_queues(struct igb_adapter
*adapter
)
8335 struct net_device
*netdev
= adapter
->netdev
;
8336 struct pci_dev
*pdev
= adapter
->pdev
;
8339 if (netif_running(netdev
))
8342 igb_reset_interrupt_capability(adapter
);
8344 if (igb_init_interrupt_scheme(adapter
, true)) {
8345 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
8349 if (netif_running(netdev
))
8350 err
= igb_open(netdev
);
8355 static void igb_nfc_filter_exit(struct igb_adapter
*adapter
)
8357 struct igb_nfc_filter
*rule
;
8359 spin_lock(&adapter
->nfc_lock
);
8361 hlist_for_each_entry(rule
, &adapter
->nfc_filter_list
, nfc_node
)
8362 igb_erase_filter(adapter
, rule
);
8364 spin_unlock(&adapter
->nfc_lock
);
8367 static void igb_nfc_filter_restore(struct igb_adapter
*adapter
)
8369 struct igb_nfc_filter
*rule
;
8371 spin_lock(&adapter
->nfc_lock
);
8373 hlist_for_each_entry(rule
, &adapter
->nfc_filter_list
, nfc_node
)
8374 igb_add_filter(adapter
, rule
);
8376 spin_unlock(&adapter
->nfc_lock
);