1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
4 #include <linux/types.h>
5 #include <linux/module.h>
7 #include <linux/netdevice.h>
8 #include <linux/vmalloc.h>
9 #include <linux/string.h>
11 #include <linux/interrupt.h>
13 #include <linux/tcp.h>
14 #include <linux/sctp.h>
15 #include <linux/pkt_sched.h>
16 #include <linux/ipv6.h>
17 #include <linux/slab.h>
18 #include <net/checksum.h>
19 #include <net/ip6_checksum.h>
20 #include <linux/etherdevice.h>
21 #include <linux/ethtool.h>
23 #include <linux/if_vlan.h>
24 #include <linux/if_macvlan.h>
25 #include <linux/if_bridge.h>
26 #include <linux/prefetch.h>
27 #include <linux/bpf.h>
28 #include <linux/bpf_trace.h>
29 #include <linux/atomic.h>
30 #include <linux/numa.h>
31 #include <generated/utsrelease.h>
32 #include <scsi/fc/fc_fcoe.h>
33 #include <net/udp_tunnel.h>
34 #include <net/pkt_cls.h>
35 #include <net/tc_act/tc_gact.h>
36 #include <net/tc_act/tc_mirred.h>
37 #include <net/vxlan.h>
39 #include <net/xdp_sock_drv.h>
43 #include "ixgbe_common.h"
44 #include "ixgbe_dcb_82599.h"
45 #include "ixgbe_phy.h"
46 #include "ixgbe_sriov.h"
47 #include "ixgbe_model.h"
48 #include "ixgbe_txrx_common.h"
50 char ixgbe_driver_name
[] = "ixgbe";
51 static const char ixgbe_driver_string
[] =
52 "Intel(R) 10 Gigabit PCI Express Network Driver";
54 char ixgbe_default_device_descr
[] =
55 "Intel(R) 10 Gigabit Network Connection";
57 static char ixgbe_default_device_descr
[] =
58 "Intel(R) 10 Gigabit Network Connection";
60 static const char ixgbe_copyright
[] =
61 "Copyright (c) 1999-2016 Intel Corporation.";
63 static const char ixgbe_overheat_msg
[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
65 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
66 [board_82598
] = &ixgbe_82598_info
,
67 [board_82599
] = &ixgbe_82599_info
,
68 [board_X540
] = &ixgbe_X540_info
,
69 [board_X550
] = &ixgbe_X550_info
,
70 [board_X550EM_x
] = &ixgbe_X550EM_x_info
,
71 [board_x550em_x_fw
] = &ixgbe_x550em_x_fw_info
,
72 [board_x550em_a
] = &ixgbe_x550em_a_info
,
73 [board_x550em_a_fw
] = &ixgbe_x550em_a_fw_info
,
76 /* ixgbe_pci_tbl - PCI Device ID Table
78 * Wildcard entries (PCI_ANY_ID) should come last
79 * Last entry must be all 0s
81 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
82 * Class, Class Mask, private data (not used) }
84 static const struct pci_device_id ixgbe_pci_tbl
[] = {
85 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
), board_82598
},
86 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
), board_82598
},
87 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
), board_82598
},
88 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
), board_82598
},
89 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
), board_82598
},
90 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
), board_82598
},
91 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
), board_82598
},
92 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
), board_82598
},
93 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
), board_82598
},
94 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
), board_82598
},
95 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
), board_82598
},
96 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
), board_82598
},
97 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
), board_82599
},
98 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
), board_82599
},
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
), board_82599
},
100 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
), board_82599
},
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
), board_82599
},
102 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
), board_82599
},
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
), board_82599
},
104 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_BACKPLANE_FCOE
), board_82599
},
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_FCOE
), board_82599
},
106 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
), board_82599
},
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
), board_82599
},
108 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T
), board_X540
},
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF2
), board_82599
},
110 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_LS
), board_82599
},
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_QSFP_SF_QP
), board_82599
},
112 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599EN_SFP
), board_82599
},
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF_QP
), board_82599
},
114 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T1
), board_X540
},
115 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550T
), board_X550
},
116 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550T1
), board_X550
},
117 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_KX4
), board_X550EM_x
},
118 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_XFI
), board_X550EM_x
},
119 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_KR
), board_X550EM_x
},
120 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_10G_T
), board_X550EM_x
},
121 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_SFP
), board_X550EM_x
},
122 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_1G_T
), board_x550em_x_fw
},
123 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_KR
), board_x550em_a
},
124 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_KR_L
), board_x550em_a
},
125 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_SFP_N
), board_x550em_a
},
126 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_SGMII
), board_x550em_a
},
127 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_SGMII_L
), board_x550em_a
},
128 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_10G_T
), board_x550em_a
},
129 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_SFP
), board_x550em_a
},
130 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_1G_T
), board_x550em_a_fw
},
131 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_1G_T_L
), board_x550em_a_fw
},
132 /* required last entry */
135 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
137 #ifdef CONFIG_IXGBE_DCA
138 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
140 static struct notifier_block dca_notifier
= {
141 .notifier_call
= ixgbe_notify_dca
,
147 #ifdef CONFIG_PCI_IOV
148 static unsigned int max_vfs
;
149 module_param(max_vfs
, uint
, 0);
150 MODULE_PARM_DESC(max_vfs
,
151 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
152 #endif /* CONFIG_PCI_IOV */
154 static unsigned int allow_unsupported_sfp
;
155 module_param(allow_unsupported_sfp
, uint
, 0);
156 MODULE_PARM_DESC(allow_unsupported_sfp
,
157 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
159 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
160 static int debug
= -1;
161 module_param(debug
, int, 0);
162 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
164 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
165 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
166 MODULE_LICENSE("GPL v2");
168 static struct workqueue_struct
*ixgbe_wq
;
170 static bool ixgbe_check_cfg_remove(struct ixgbe_hw
*hw
, struct pci_dev
*pdev
);
171 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter
*);
173 static const struct net_device_ops ixgbe_netdev_ops
;
175 static bool netif_is_ixgbe(struct net_device
*dev
)
177 return dev
&& (dev
->netdev_ops
== &ixgbe_netdev_ops
);
180 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter
*adapter
,
183 struct pci_dev
*parent_dev
;
184 struct pci_bus
*parent_bus
;
186 parent_bus
= adapter
->pdev
->bus
->parent
;
190 parent_dev
= parent_bus
->self
;
194 if (!pci_is_pcie(parent_dev
))
197 pcie_capability_read_word(parent_dev
, reg
, value
);
198 if (*value
== IXGBE_FAILED_READ_CFG_WORD
&&
199 ixgbe_check_cfg_remove(&adapter
->hw
, parent_dev
))
204 static s32
ixgbe_get_parent_bus_info(struct ixgbe_adapter
*adapter
)
206 struct ixgbe_hw
*hw
= &adapter
->hw
;
210 hw
->bus
.type
= ixgbe_bus_type_pci_express
;
212 /* Get the negotiated link width and speed from PCI config space of the
213 * parent, as this device is behind a switch
215 err
= ixgbe_read_pci_cfg_word_parent(adapter
, 18, &link_status
);
217 /* assume caller will handle error case */
221 hw
->bus
.width
= ixgbe_convert_bus_width(link_status
);
222 hw
->bus
.speed
= ixgbe_convert_bus_speed(link_status
);
228 * ixgbe_pcie_from_parent - Determine whether PCIe info should come from parent
229 * @hw: hw specific details
231 * This function is used by probe to determine whether a device's PCI-Express
232 * bandwidth details should be gathered from the parent bus instead of from the
233 * device. Used to ensure that various locations all have the correct device ID
236 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw
*hw
)
238 switch (hw
->device_id
) {
239 case IXGBE_DEV_ID_82599_SFP_SF_QP
:
240 case IXGBE_DEV_ID_82599_QSFP_SF_QP
:
247 static void ixgbe_check_minimum_link(struct ixgbe_adapter
*adapter
,
250 struct ixgbe_hw
*hw
= &adapter
->hw
;
251 struct pci_dev
*pdev
;
253 /* Some devices are not connected over PCIe and thus do not negotiate
254 * speed. These devices do not have valid bus info, and thus any report
255 * we generate may not be correct.
257 if (hw
->bus
.type
== ixgbe_bus_type_internal
)
260 /* determine whether to use the parent device */
261 if (ixgbe_pcie_from_parent(&adapter
->hw
))
262 pdev
= adapter
->pdev
->bus
->parent
->self
;
264 pdev
= adapter
->pdev
;
266 pcie_print_link_status(pdev
);
269 static void ixgbe_service_event_schedule(struct ixgbe_adapter
*adapter
)
271 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
) &&
272 !test_bit(__IXGBE_REMOVING
, &adapter
->state
) &&
273 !test_and_set_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
))
274 queue_work(ixgbe_wq
, &adapter
->service_task
);
277 static void ixgbe_remove_adapter(struct ixgbe_hw
*hw
)
279 struct ixgbe_adapter
*adapter
= hw
->back
;
284 e_dev_err("Adapter removed\n");
285 if (test_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
))
286 ixgbe_service_event_schedule(adapter
);
289 static u32
ixgbe_check_remove(struct ixgbe_hw
*hw
, u32 reg
)
291 u8 __iomem
*reg_addr
;
295 reg_addr
= READ_ONCE(hw
->hw_addr
);
296 if (ixgbe_removed(reg_addr
))
297 return IXGBE_FAILED_READ_REG
;
299 /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
300 * so perform several status register reads to determine if the adapter
303 for (i
= 0; i
< IXGBE_FAILED_READ_RETRIES
; i
++) {
304 value
= readl(reg_addr
+ IXGBE_STATUS
);
305 if (value
!= IXGBE_FAILED_READ_REG
)
310 if (value
== IXGBE_FAILED_READ_REG
)
311 ixgbe_remove_adapter(hw
);
313 value
= readl(reg_addr
+ reg
);
318 * ixgbe_read_reg - Read from device register
319 * @hw: hw specific details
320 * @reg: offset of register to read
322 * Returns : value read or IXGBE_FAILED_READ_REG if removed
324 * This function is used to read device registers. It checks for device
325 * removal by confirming any read that returns all ones by checking the
326 * status register value for all ones. This function avoids reading from
327 * the hardware if a removal was previously detected in which case it
328 * returns IXGBE_FAILED_READ_REG (all ones).
330 u32
ixgbe_read_reg(struct ixgbe_hw
*hw
, u32 reg
)
332 u8 __iomem
*reg_addr
= READ_ONCE(hw
->hw_addr
);
335 if (ixgbe_removed(reg_addr
))
336 return IXGBE_FAILED_READ_REG
;
337 if (unlikely(hw
->phy
.nw_mng_if_sel
&
338 IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE
)) {
339 struct ixgbe_adapter
*adapter
;
342 for (i
= 0; i
< 200; ++i
) {
343 value
= readl(reg_addr
+ IXGBE_MAC_SGMII_BUSY
);
345 goto writes_completed
;
346 if (value
== IXGBE_FAILED_READ_REG
) {
347 ixgbe_remove_adapter(hw
);
348 return IXGBE_FAILED_READ_REG
;
354 e_warn(hw
, "register writes incomplete %08x\n", value
);
358 value
= readl(reg_addr
+ reg
);
359 if (unlikely(value
== IXGBE_FAILED_READ_REG
))
360 value
= ixgbe_check_remove(hw
, reg
);
364 static bool ixgbe_check_cfg_remove(struct ixgbe_hw
*hw
, struct pci_dev
*pdev
)
368 pci_read_config_word(pdev
, PCI_VENDOR_ID
, &value
);
369 if (value
== IXGBE_FAILED_READ_CFG_WORD
) {
370 ixgbe_remove_adapter(hw
);
376 u16
ixgbe_read_pci_cfg_word(struct ixgbe_hw
*hw
, u32 reg
)
378 struct ixgbe_adapter
*adapter
= hw
->back
;
381 if (ixgbe_removed(hw
->hw_addr
))
382 return IXGBE_FAILED_READ_CFG_WORD
;
383 pci_read_config_word(adapter
->pdev
, reg
, &value
);
384 if (value
== IXGBE_FAILED_READ_CFG_WORD
&&
385 ixgbe_check_cfg_remove(hw
, adapter
->pdev
))
386 return IXGBE_FAILED_READ_CFG_WORD
;
390 #ifdef CONFIG_PCI_IOV
391 static u32
ixgbe_read_pci_cfg_dword(struct ixgbe_hw
*hw
, u32 reg
)
393 struct ixgbe_adapter
*adapter
= hw
->back
;
396 if (ixgbe_removed(hw
->hw_addr
))
397 return IXGBE_FAILED_READ_CFG_DWORD
;
398 pci_read_config_dword(adapter
->pdev
, reg
, &value
);
399 if (value
== IXGBE_FAILED_READ_CFG_DWORD
&&
400 ixgbe_check_cfg_remove(hw
, adapter
->pdev
))
401 return IXGBE_FAILED_READ_CFG_DWORD
;
404 #endif /* CONFIG_PCI_IOV */
406 void ixgbe_write_pci_cfg_word(struct ixgbe_hw
*hw
, u32 reg
, u16 value
)
408 struct ixgbe_adapter
*adapter
= hw
->back
;
410 if (ixgbe_removed(hw
->hw_addr
))
412 pci_write_config_word(adapter
->pdev
, reg
, value
);
415 static void ixgbe_service_event_complete(struct ixgbe_adapter
*adapter
)
417 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
));
419 /* flush memory to make sure state is correct before next watchdog */
420 smp_mb__before_atomic();
421 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
424 struct ixgbe_reg_info
{
429 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
431 /* General Registers */
432 {IXGBE_CTRL
, "CTRL"},
433 {IXGBE_STATUS
, "STATUS"},
434 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
436 /* Interrupt Registers */
437 {IXGBE_EICR
, "EICR"},
440 {IXGBE_SRRCTL(0), "SRRCTL"},
441 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
442 {IXGBE_RDLEN(0), "RDLEN"},
443 {IXGBE_RDH(0), "RDH"},
444 {IXGBE_RDT(0), "RDT"},
445 {IXGBE_RXDCTL(0), "RXDCTL"},
446 {IXGBE_RDBAL(0), "RDBAL"},
447 {IXGBE_RDBAH(0), "RDBAH"},
450 {IXGBE_TDBAL(0), "TDBAL"},
451 {IXGBE_TDBAH(0), "TDBAH"},
452 {IXGBE_TDLEN(0), "TDLEN"},
453 {IXGBE_TDH(0), "TDH"},
454 {IXGBE_TDT(0), "TDT"},
455 {IXGBE_TXDCTL(0), "TXDCTL"},
457 /* List Terminator */
463 * ixgbe_regdump - register printout routine
465 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
471 switch (reginfo
->ofs
) {
472 case IXGBE_SRRCTL(0):
473 for (i
= 0; i
< 64; i
++)
474 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
476 case IXGBE_DCA_RXCTRL(0):
477 for (i
= 0; i
< 64; i
++)
478 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
481 for (i
= 0; i
< 64; i
++)
482 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
485 for (i
= 0; i
< 64; i
++)
486 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
489 for (i
= 0; i
< 64; i
++)
490 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
492 case IXGBE_RXDCTL(0):
493 for (i
= 0; i
< 64; i
++)
494 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
497 for (i
= 0; i
< 64; i
++)
498 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
501 for (i
= 0; i
< 64; i
++)
502 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
505 for (i
= 0; i
< 64; i
++)
506 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
509 for (i
= 0; i
< 64; i
++)
510 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
513 for (i
= 0; i
< 64; i
++)
514 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
517 for (i
= 0; i
< 64; i
++)
518 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
521 for (i
= 0; i
< 64; i
++)
522 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
524 case IXGBE_TXDCTL(0):
525 for (i
= 0; i
< 64; i
++)
526 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
529 pr_info("%-15s %08x\n",
530 reginfo
->name
, IXGBE_READ_REG(hw
, reginfo
->ofs
));
540 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
, i
+ 7);
541 for (j
= 0; j
< 8; j
++)
542 p
+= sprintf(p
, " %08x", regs
[i
++]);
543 pr_err("%-15s%s\n", rname
, buf
);
548 static void ixgbe_print_buffer(struct ixgbe_ring
*ring
, int n
)
550 struct ixgbe_tx_buffer
*tx_buffer
;
552 tx_buffer
= &ring
->tx_buffer_info
[ring
->next_to_clean
];
553 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
554 n
, ring
->next_to_use
, ring
->next_to_clean
,
555 (u64
)dma_unmap_addr(tx_buffer
, dma
),
556 dma_unmap_len(tx_buffer
, len
),
557 tx_buffer
->next_to_watch
,
558 (u64
)tx_buffer
->time_stamp
);
562 * ixgbe_dump - Print registers, tx-rings and rx-rings
564 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
566 struct net_device
*netdev
= adapter
->netdev
;
567 struct ixgbe_hw
*hw
= &adapter
->hw
;
568 struct ixgbe_reg_info
*reginfo
;
570 struct ixgbe_ring
*ring
;
571 struct ixgbe_tx_buffer
*tx_buffer
;
572 union ixgbe_adv_tx_desc
*tx_desc
;
573 struct my_u0
{ u64 a
; u64 b
; } *u0
;
574 struct ixgbe_ring
*rx_ring
;
575 union ixgbe_adv_rx_desc
*rx_desc
;
576 struct ixgbe_rx_buffer
*rx_buffer_info
;
579 if (!netif_msg_hw(adapter
))
582 /* Print netdevice Info */
584 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
585 pr_info("Device Name state "
587 pr_info("%-15s %016lX %016lX\n",
590 dev_trans_start(netdev
));
593 /* Print Registers */
594 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
595 pr_info(" Register Name Value\n");
596 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
597 reginfo
->name
; reginfo
++) {
598 ixgbe_regdump(hw
, reginfo
);
601 /* Print TX Ring Summary */
602 if (!netdev
|| !netif_running(netdev
))
605 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
606 pr_info(" %s %s %s %s\n",
607 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
608 "leng", "ntw", "timestamp");
609 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
610 ring
= adapter
->tx_ring
[n
];
611 ixgbe_print_buffer(ring
, n
);
614 for (n
= 0; n
< adapter
->num_xdp_queues
; n
++) {
615 ring
= adapter
->xdp_ring
[n
];
616 ixgbe_print_buffer(ring
, n
);
620 if (!netif_msg_tx_done(adapter
))
621 goto rx_ring_summary
;
623 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
625 /* Transmit Descriptor Formats
627 * 82598 Advanced Transmit Descriptor
628 * +--------------------------------------------------------------+
629 * 0 | Buffer Address [63:0] |
630 * +--------------------------------------------------------------+
631 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
632 * +--------------------------------------------------------------+
633 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
635 * 82598 Advanced Transmit Descriptor (Write-Back Format)
636 * +--------------------------------------------------------------+
638 * +--------------------------------------------------------------+
639 * 8 | RSV | STA | NXTSEQ |
640 * +--------------------------------------------------------------+
643 * 82599+ Advanced Transmit Descriptor
644 * +--------------------------------------------------------------+
645 * 0 | Buffer Address [63:0] |
646 * +--------------------------------------------------------------+
647 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
648 * +--------------------------------------------------------------+
649 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
651 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
652 * +--------------------------------------------------------------+
654 * +--------------------------------------------------------------+
655 * 8 | RSV | STA | RSV |
656 * +--------------------------------------------------------------+
660 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
661 ring
= adapter
->tx_ring
[n
];
662 pr_info("------------------------------------\n");
663 pr_info("TX QUEUE INDEX = %d\n", ring
->queue_index
);
664 pr_info("------------------------------------\n");
665 pr_info("%s%s %s %s %s %s\n",
666 "T [desc] [address 63:0 ] ",
667 "[PlPOIdStDDt Ln] [bi->dma ] ",
668 "leng", "ntw", "timestamp", "bi->skb");
670 for (i
= 0; ring
->desc
&& (i
< ring
->count
); i
++) {
671 tx_desc
= IXGBE_TX_DESC(ring
, i
);
672 tx_buffer
= &ring
->tx_buffer_info
[i
];
673 u0
= (struct my_u0
*)tx_desc
;
674 if (dma_unmap_len(tx_buffer
, len
) > 0) {
675 const char *ring_desc
;
677 if (i
== ring
->next_to_use
&&
678 i
== ring
->next_to_clean
)
679 ring_desc
= " NTC/U";
680 else if (i
== ring
->next_to_use
)
682 else if (i
== ring
->next_to_clean
)
686 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p%s",
688 le64_to_cpu((__force __le64
)u0
->a
),
689 le64_to_cpu((__force __le64
)u0
->b
),
690 (u64
)dma_unmap_addr(tx_buffer
, dma
),
691 dma_unmap_len(tx_buffer
, len
),
692 tx_buffer
->next_to_watch
,
693 (u64
)tx_buffer
->time_stamp
,
697 if (netif_msg_pktdata(adapter
) &&
699 print_hex_dump(KERN_INFO
, "",
700 DUMP_PREFIX_ADDRESS
, 16, 1,
701 tx_buffer
->skb
->data
,
702 dma_unmap_len(tx_buffer
, len
),
708 /* Print RX Rings Summary */
710 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
711 pr_info("Queue [NTU] [NTC]\n");
712 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
713 rx_ring
= adapter
->rx_ring
[n
];
714 pr_info("%5d %5X %5X\n",
715 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
719 if (!netif_msg_rx_status(adapter
))
722 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
724 /* Receive Descriptor Formats
726 * 82598 Advanced Receive Descriptor (Read) Format
728 * +-----------------------------------------------------+
729 * 0 | Packet Buffer Address [63:1] |A0/NSE|
730 * +----------------------------------------------+------+
731 * 8 | Header Buffer Address [63:1] | DD |
732 * +-----------------------------------------------------+
735 * 82598 Advanced Receive Descriptor (Write-Back) Format
737 * 63 48 47 32 31 30 21 20 16 15 4 3 0
738 * +------------------------------------------------------+
739 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
740 * | Packet | IP | | | | Type | Type |
741 * | Checksum | Ident | | | | | |
742 * +------------------------------------------------------+
743 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
744 * +------------------------------------------------------+
745 * 63 48 47 32 31 20 19 0
747 * 82599+ Advanced Receive Descriptor (Read) Format
749 * +-----------------------------------------------------+
750 * 0 | Packet Buffer Address [63:1] |A0/NSE|
751 * +----------------------------------------------+------+
752 * 8 | Header Buffer Address [63:1] | DD |
753 * +-----------------------------------------------------+
756 * 82599+ Advanced Receive Descriptor (Write-Back) Format
758 * 63 48 47 32 31 30 21 20 17 16 4 3 0
759 * +------------------------------------------------------+
760 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
761 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
762 * |/ Flow Dir Flt ID | | | | | |
763 * +------------------------------------------------------+
764 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
765 * +------------------------------------------------------+
766 * 63 48 47 32 31 20 19 0
769 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
770 rx_ring
= adapter
->rx_ring
[n
];
771 pr_info("------------------------------------\n");
772 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
773 pr_info("------------------------------------\n");
775 "R [desc] [ PktBuf A0] ",
776 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
777 "<-- Adv Rx Read format");
779 "RWB[desc] [PcsmIpSHl PtRs] ",
780 "[vl er S cks ln] ---------------- [bi->skb ] ",
781 "<-- Adv Rx Write-Back format");
783 for (i
= 0; i
< rx_ring
->count
; i
++) {
784 const char *ring_desc
;
786 if (i
== rx_ring
->next_to_use
)
788 else if (i
== rx_ring
->next_to_clean
)
793 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
794 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
795 u0
= (struct my_u0
*)rx_desc
;
796 if (rx_desc
->wb
.upper
.length
) {
797 /* Descriptor Done */
798 pr_info("RWB[0x%03X] %016llX %016llX ---------------- %p%s\n",
800 le64_to_cpu((__force __le64
)u0
->a
),
801 le64_to_cpu((__force __le64
)u0
->b
),
805 pr_info("R [0x%03X] %016llX %016llX %016llX %p%s\n",
807 le64_to_cpu((__force __le64
)u0
->a
),
808 le64_to_cpu((__force __le64
)u0
->b
),
809 (u64
)rx_buffer_info
->dma
,
813 if (netif_msg_pktdata(adapter
) &&
814 rx_buffer_info
->dma
) {
815 print_hex_dump(KERN_INFO
, "",
816 DUMP_PREFIX_ADDRESS
, 16, 1,
817 page_address(rx_buffer_info
->page
) +
818 rx_buffer_info
->page_offset
,
819 ixgbe_rx_bufsz(rx_ring
), true);
826 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
830 /* Let firmware take over control of h/w */
831 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
832 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
833 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
836 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
840 /* Let firmware know the driver has taken over */
841 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
842 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
843 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
847 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
848 * @adapter: pointer to adapter struct
849 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
850 * @queue: queue to map the corresponding interrupt to
851 * @msix_vector: the vector to map to the corresponding queue
854 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
855 u8 queue
, u8 msix_vector
)
858 struct ixgbe_hw
*hw
= &adapter
->hw
;
859 switch (hw
->mac
.type
) {
860 case ixgbe_mac_82598EB
:
861 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
864 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
865 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
866 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
867 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
868 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
870 case ixgbe_mac_82599EB
:
873 case ixgbe_mac_X550EM_x
:
874 case ixgbe_mac_x550em_a
:
875 if (direction
== -1) {
877 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
878 index
= ((queue
& 1) * 8);
879 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
880 ivar
&= ~(0xFF << index
);
881 ivar
|= (msix_vector
<< index
);
882 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
885 /* tx or rx causes */
886 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
887 index
= ((16 * (queue
& 1)) + (8 * direction
));
888 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
889 ivar
&= ~(0xFF << index
);
890 ivar
|= (msix_vector
<< index
);
891 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
899 void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
904 switch (adapter
->hw
.mac
.type
) {
905 case ixgbe_mac_82598EB
:
906 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
907 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
909 case ixgbe_mac_82599EB
:
912 case ixgbe_mac_X550EM_x
:
913 case ixgbe_mac_x550em_a
:
914 mask
= (qmask
& 0xFFFFFFFF);
915 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
916 mask
= (qmask
>> 32);
917 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
924 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter
*adapter
)
926 struct ixgbe_hw
*hw
= &adapter
->hw
;
927 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
931 if ((hw
->fc
.current_mode
!= ixgbe_fc_full
) &&
932 (hw
->fc
.current_mode
!= ixgbe_fc_rx_pause
))
935 switch (hw
->mac
.type
) {
936 case ixgbe_mac_82598EB
:
937 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
940 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
942 hwstats
->lxoffrxc
+= data
;
944 /* refill credits (no tx hang) if we received xoff */
948 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
949 clear_bit(__IXGBE_HANG_CHECK_ARMED
,
950 &adapter
->tx_ring
[i
]->state
);
952 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++)
953 clear_bit(__IXGBE_HANG_CHECK_ARMED
,
954 &adapter
->xdp_ring
[i
]->state
);
957 static void ixgbe_update_xoff_received(struct ixgbe_adapter
*adapter
)
959 struct ixgbe_hw
*hw
= &adapter
->hw
;
960 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
964 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
966 if (adapter
->ixgbe_ieee_pfc
)
967 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
969 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) || !pfc_en
) {
970 ixgbe_update_xoff_rx_lfc(adapter
);
974 /* update stats for each tc, only valid with PFC enabled */
975 for (i
= 0; i
< MAX_TX_PACKET_BUFFERS
; i
++) {
978 switch (hw
->mac
.type
) {
979 case ixgbe_mac_82598EB
:
980 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
983 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
985 hwstats
->pxoffrxc
[i
] += pxoffrxc
;
986 /* Get the TC for given UP */
987 tc
= netdev_get_prio_tc_map(adapter
->netdev
, i
);
988 xoff
[tc
] += pxoffrxc
;
991 /* disarm tx queues that have received xoff frames */
992 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
993 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
995 tc
= tx_ring
->dcb_tc
;
997 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
1000 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++) {
1001 struct ixgbe_ring
*xdp_ring
= adapter
->xdp_ring
[i
];
1003 tc
= xdp_ring
->dcb_tc
;
1005 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &xdp_ring
->state
);
1009 static u64
ixgbe_get_tx_completed(struct ixgbe_ring
*ring
)
1011 return ring
->stats
.packets
;
1014 static u64
ixgbe_get_tx_pending(struct ixgbe_ring
*ring
)
1016 unsigned int head
, tail
;
1018 head
= ring
->next_to_clean
;
1019 tail
= ring
->next_to_use
;
1021 return ((head
<= tail
) ? tail
: tail
+ ring
->count
) - head
;
1024 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring
*tx_ring
)
1026 u32 tx_done
= ixgbe_get_tx_completed(tx_ring
);
1027 u32 tx_done_old
= tx_ring
->tx_stats
.tx_done_old
;
1028 u32 tx_pending
= ixgbe_get_tx_pending(tx_ring
);
1030 clear_check_for_tx_hang(tx_ring
);
1033 * Check for a hung queue, but be thorough. This verifies
1034 * that a transmit has been completed since the previous
1035 * check AND there is at least one packet pending. The
1036 * ARMED bit is set to indicate a potential hang. The
1037 * bit is cleared if a pause frame is received to remove
1038 * false hang detection due to PFC or 802.3x frames. By
1039 * requiring this to fail twice we avoid races with
1040 * pfc clearing the ARMED bit and conditions where we
1041 * run the check_tx_hang logic with a transmit completion
1042 * pending but without time to complete it yet.
1044 if (tx_done_old
== tx_done
&& tx_pending
)
1045 /* make sure it is true for two checks in a row */
1046 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED
,
1048 /* update completed stats and continue */
1049 tx_ring
->tx_stats
.tx_done_old
= tx_done
;
1050 /* reset the countdown */
1051 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
1057 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1058 * @adapter: driver private struct
1060 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter
*adapter
)
1063 /* Do the reset outside of interrupt context */
1064 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1065 set_bit(__IXGBE_RESET_REQUESTED
, &adapter
->state
);
1066 e_warn(drv
, "initiating reset due to tx timeout\n");
1067 ixgbe_service_event_schedule(adapter
);
1072 * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1073 * @netdev: network interface device structure
1074 * @queue_index: Tx queue to set
1075 * @maxrate: desired maximum transmit bitrate
1077 static int ixgbe_tx_maxrate(struct net_device
*netdev
,
1078 int queue_index
, u32 maxrate
)
1080 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1081 struct ixgbe_hw
*hw
= &adapter
->hw
;
1082 u32 bcnrc_val
= ixgbe_link_mbps(adapter
);
1087 /* Calculate the rate factor values to set */
1088 bcnrc_val
<<= IXGBE_RTTBCNRC_RF_INT_SHIFT
;
1089 bcnrc_val
/= maxrate
;
1091 /* clear everything but the rate factor */
1092 bcnrc_val
&= IXGBE_RTTBCNRC_RF_INT_MASK
|
1093 IXGBE_RTTBCNRC_RF_DEC_MASK
;
1095 /* enable the rate scheduler */
1096 bcnrc_val
|= IXGBE_RTTBCNRC_RS_ENA
;
1098 IXGBE_WRITE_REG(hw
, IXGBE_RTTDQSEL
, queue_index
);
1099 IXGBE_WRITE_REG(hw
, IXGBE_RTTBCNRC
, bcnrc_val
);
1105 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1106 * @q_vector: structure containing interrupt and ring information
1107 * @tx_ring: tx ring to clean
1108 * @napi_budget: Used to determine if we are in netpoll
1110 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
1111 struct ixgbe_ring
*tx_ring
, int napi_budget
)
1113 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1114 struct ixgbe_tx_buffer
*tx_buffer
;
1115 union ixgbe_adv_tx_desc
*tx_desc
;
1116 unsigned int total_bytes
= 0, total_packets
= 0, total_ipsec
= 0;
1117 unsigned int budget
= q_vector
->tx
.work_limit
;
1118 unsigned int i
= tx_ring
->next_to_clean
;
1120 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
1123 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
1124 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
1125 i
-= tx_ring
->count
;
1128 union ixgbe_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
1130 /* if next_to_watch is not set then there is no work pending */
1134 /* prevent any other reads prior to eop_desc */
1137 /* if DD is not set pending work has not been completed */
1138 if (!(eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)))
1141 /* clear next_to_watch to prevent false hangs */
1142 tx_buffer
->next_to_watch
= NULL
;
1144 /* update the statistics for this packet */
1145 total_bytes
+= tx_buffer
->bytecount
;
1146 total_packets
+= tx_buffer
->gso_segs
;
1147 if (tx_buffer
->tx_flags
& IXGBE_TX_FLAGS_IPSEC
)
1151 if (ring_is_xdp(tx_ring
))
1152 xdp_return_frame(tx_buffer
->xdpf
);
1154 napi_consume_skb(tx_buffer
->skb
, napi_budget
);
1156 /* unmap skb header data */
1157 dma_unmap_single(tx_ring
->dev
,
1158 dma_unmap_addr(tx_buffer
, dma
),
1159 dma_unmap_len(tx_buffer
, len
),
1162 /* clear tx_buffer data */
1163 dma_unmap_len_set(tx_buffer
, len
, 0);
1165 /* unmap remaining buffers */
1166 while (tx_desc
!= eop_desc
) {
1171 i
-= tx_ring
->count
;
1172 tx_buffer
= tx_ring
->tx_buffer_info
;
1173 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1176 /* unmap any remaining paged data */
1177 if (dma_unmap_len(tx_buffer
, len
)) {
1178 dma_unmap_page(tx_ring
->dev
,
1179 dma_unmap_addr(tx_buffer
, dma
),
1180 dma_unmap_len(tx_buffer
, len
),
1182 dma_unmap_len_set(tx_buffer
, len
, 0);
1186 /* move us one more past the eop_desc for start of next pkt */
1191 i
-= tx_ring
->count
;
1192 tx_buffer
= tx_ring
->tx_buffer_info
;
1193 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1196 /* issue prefetch for next Tx descriptor */
1199 /* update budget accounting */
1201 } while (likely(budget
));
1203 i
+= tx_ring
->count
;
1204 tx_ring
->next_to_clean
= i
;
1205 u64_stats_update_begin(&tx_ring
->syncp
);
1206 tx_ring
->stats
.bytes
+= total_bytes
;
1207 tx_ring
->stats
.packets
+= total_packets
;
1208 u64_stats_update_end(&tx_ring
->syncp
);
1209 q_vector
->tx
.total_bytes
+= total_bytes
;
1210 q_vector
->tx
.total_packets
+= total_packets
;
1211 adapter
->tx_ipsec
+= total_ipsec
;
1213 if (check_for_tx_hang(tx_ring
) && ixgbe_check_tx_hang(tx_ring
)) {
1214 /* schedule immediate reset if we believe we hung */
1215 struct ixgbe_hw
*hw
= &adapter
->hw
;
1216 e_err(drv
, "Detected Tx Unit Hang %s\n"
1218 " TDH, TDT <%x>, <%x>\n"
1219 " next_to_use <%x>\n"
1220 " next_to_clean <%x>\n"
1221 "tx_buffer_info[next_to_clean]\n"
1222 " time_stamp <%lx>\n"
1224 ring_is_xdp(tx_ring
) ? "(XDP)" : "",
1225 tx_ring
->queue_index
,
1226 IXGBE_READ_REG(hw
, IXGBE_TDH(tx_ring
->reg_idx
)),
1227 IXGBE_READ_REG(hw
, IXGBE_TDT(tx_ring
->reg_idx
)),
1228 tx_ring
->next_to_use
, i
,
1229 tx_ring
->tx_buffer_info
[i
].time_stamp
, jiffies
);
1231 if (!ring_is_xdp(tx_ring
))
1232 netif_stop_subqueue(tx_ring
->netdev
,
1233 tx_ring
->queue_index
);
1236 "tx hang %d detected on queue %d, resetting adapter\n",
1237 adapter
->tx_timeout_count
+ 1, tx_ring
->queue_index
);
1239 /* schedule immediate reset if we believe we hung */
1240 ixgbe_tx_timeout_reset(adapter
);
1242 /* the adapter is about to reset, no point in enabling stuff */
1246 if (ring_is_xdp(tx_ring
))
1249 netdev_tx_completed_queue(txring_txq(tx_ring
),
1250 total_packets
, total_bytes
);
1252 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1253 if (unlikely(total_packets
&& netif_carrier_ok(tx_ring
->netdev
) &&
1254 (ixgbe_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
1255 /* Make sure that anybody stopping the queue after this
1256 * sees the new next_to_clean.
1259 if (__netif_subqueue_stopped(tx_ring
->netdev
,
1260 tx_ring
->queue_index
)
1261 && !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1262 netif_wake_subqueue(tx_ring
->netdev
,
1263 tx_ring
->queue_index
);
1264 ++tx_ring
->tx_stats
.restart_queue
;
1271 #ifdef CONFIG_IXGBE_DCA
1272 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
1273 struct ixgbe_ring
*tx_ring
,
1276 struct ixgbe_hw
*hw
= &adapter
->hw
;
1280 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1281 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
1283 switch (hw
->mac
.type
) {
1284 case ixgbe_mac_82598EB
:
1285 reg_offset
= IXGBE_DCA_TXCTRL(tx_ring
->reg_idx
);
1287 case ixgbe_mac_82599EB
:
1288 case ixgbe_mac_X540
:
1289 reg_offset
= IXGBE_DCA_TXCTRL_82599(tx_ring
->reg_idx
);
1290 txctrl
<<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
;
1293 /* for unknown hardware do not write register */
1298 * We can enable relaxed ordering for reads, but not writes when
1299 * DCA is enabled. This is due to a known issue in some chipsets
1300 * which will cause the DCA tag to be cleared.
1302 txctrl
|= IXGBE_DCA_TXCTRL_DESC_RRO_EN
|
1303 IXGBE_DCA_TXCTRL_DATA_RRO_EN
|
1304 IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
1306 IXGBE_WRITE_REG(hw
, reg_offset
, txctrl
);
1309 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
1310 struct ixgbe_ring
*rx_ring
,
1313 struct ixgbe_hw
*hw
= &adapter
->hw
;
1315 u8 reg_idx
= rx_ring
->reg_idx
;
1317 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1318 rxctrl
= dca3_get_tag(rx_ring
->dev
, cpu
);
1320 switch (hw
->mac
.type
) {
1321 case ixgbe_mac_82599EB
:
1322 case ixgbe_mac_X540
:
1323 rxctrl
<<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
;
1330 * We can enable relaxed ordering for reads, but not writes when
1331 * DCA is enabled. This is due to a known issue in some chipsets
1332 * which will cause the DCA tag to be cleared.
1334 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_RRO_EN
|
1335 IXGBE_DCA_RXCTRL_DATA_DCA_EN
|
1336 IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
1338 IXGBE_WRITE_REG(hw
, IXGBE_DCA_RXCTRL(reg_idx
), rxctrl
);
1341 static void ixgbe_update_dca(struct ixgbe_q_vector
*q_vector
)
1343 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1344 struct ixgbe_ring
*ring
;
1345 int cpu
= get_cpu();
1347 if (q_vector
->cpu
== cpu
)
1350 ixgbe_for_each_ring(ring
, q_vector
->tx
)
1351 ixgbe_update_tx_dca(adapter
, ring
, cpu
);
1353 ixgbe_for_each_ring(ring
, q_vector
->rx
)
1354 ixgbe_update_rx_dca(adapter
, ring
, cpu
);
1356 q_vector
->cpu
= cpu
;
1361 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
1365 /* always use CB2 mode, difference is masked in the CB driver */
1366 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1367 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1368 IXGBE_DCA_CTRL_DCA_MODE_CB2
);
1370 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1371 IXGBE_DCA_CTRL_DCA_DISABLE
);
1373 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1374 adapter
->q_vector
[i
]->cpu
= -1;
1375 ixgbe_update_dca(adapter
->q_vector
[i
]);
1379 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
1381 struct ixgbe_adapter
*adapter
= dev_get_drvdata(dev
);
1382 unsigned long event
= *(unsigned long *)data
;
1384 if (!(adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
))
1388 case DCA_PROVIDER_ADD
:
1389 /* if we're already enabled, don't do it again */
1390 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1392 if (dca_add_requester(dev
) == 0) {
1393 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
1394 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1395 IXGBE_DCA_CTRL_DCA_MODE_CB2
);
1398 fallthrough
; /* DCA is disabled. */
1399 case DCA_PROVIDER_REMOVE
:
1400 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
1401 dca_remove_requester(dev
);
1402 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
1403 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1404 IXGBE_DCA_CTRL_DCA_DISABLE
);
1412 #endif /* CONFIG_IXGBE_DCA */
1414 #define IXGBE_RSS_L4_TYPES_MASK \
1415 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1416 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1417 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1418 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1420 static inline void ixgbe_rx_hash(struct ixgbe_ring
*ring
,
1421 union ixgbe_adv_rx_desc
*rx_desc
,
1422 struct sk_buff
*skb
)
1426 if (!(ring
->netdev
->features
& NETIF_F_RXHASH
))
1429 rss_type
= le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
) &
1430 IXGBE_RXDADV_RSSTYPE_MASK
;
1435 skb_set_hash(skb
, le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
),
1436 (IXGBE_RSS_L4_TYPES_MASK
& (1ul << rss_type
)) ?
1437 PKT_HASH_TYPE_L4
: PKT_HASH_TYPE_L3
);
1442 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1443 * @ring: structure containing ring specific data
1444 * @rx_desc: advanced rx descriptor
1446 * Returns : true if it is FCoE pkt
1448 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring
*ring
,
1449 union ixgbe_adv_rx_desc
*rx_desc
)
1451 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1453 return test_bit(__IXGBE_RX_FCOE
, &ring
->state
) &&
1454 ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK
)) ==
1455 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE
<<
1456 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT
)));
1459 #endif /* IXGBE_FCOE */
1461 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1462 * @ring: structure containing ring specific data
1463 * @rx_desc: current Rx descriptor being processed
1464 * @skb: skb currently being received and modified
1466 static inline void ixgbe_rx_checksum(struct ixgbe_ring
*ring
,
1467 union ixgbe_adv_rx_desc
*rx_desc
,
1468 struct sk_buff
*skb
)
1470 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1471 bool encap_pkt
= false;
1473 skb_checksum_none_assert(skb
);
1475 /* Rx csum disabled */
1476 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
1479 /* check for VXLAN and Geneve packets */
1480 if (pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN
)) {
1482 skb
->encapsulation
= 1;
1485 /* if IP and error */
1486 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_IPCS
) &&
1487 ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_IPE
)) {
1488 ring
->rx_stats
.csum_err
++;
1492 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_L4CS
))
1495 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_TCPE
)) {
1497 * 82599 errata, UDP frames with a 0 checksum can be marked as
1500 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP
)) &&
1501 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR
, &ring
->state
))
1504 ring
->rx_stats
.csum_err
++;
1508 /* It must be a TCP or UDP packet with a valid checksum */
1509 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1511 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_OUTERIPCS
))
1514 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_OUTERIPER
)) {
1515 skb
->ip_summed
= CHECKSUM_NONE
;
1518 /* If we checked the outer header let the stack know */
1519 skb
->csum_level
= 1;
1523 static unsigned int ixgbe_rx_offset(struct ixgbe_ring
*rx_ring
)
1525 return ring_uses_build_skb(rx_ring
) ? IXGBE_SKB_PAD
: 0;
1528 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring
*rx_ring
,
1529 struct ixgbe_rx_buffer
*bi
)
1531 struct page
*page
= bi
->page
;
1534 /* since we are recycling buffers we should seldom need to alloc */
1538 /* alloc new page for storage */
1539 page
= dev_alloc_pages(ixgbe_rx_pg_order(rx_ring
));
1540 if (unlikely(!page
)) {
1541 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1545 /* map page for use */
1546 dma
= dma_map_page_attrs(rx_ring
->dev
, page
, 0,
1547 ixgbe_rx_pg_size(rx_ring
),
1552 * if mapping failed free memory back to system since
1553 * there isn't much point in holding memory we can't use
1555 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
1556 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1558 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1564 bi
->page_offset
= rx_ring
->rx_offset
;
1565 page_ref_add(page
, USHRT_MAX
- 1);
1566 bi
->pagecnt_bias
= USHRT_MAX
;
1567 rx_ring
->rx_stats
.alloc_rx_page
++;
1573 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1574 * @rx_ring: ring to place buffers on
1575 * @cleaned_count: number of buffers to replace
1577 void ixgbe_alloc_rx_buffers(struct ixgbe_ring
*rx_ring
, u16 cleaned_count
)
1579 union ixgbe_adv_rx_desc
*rx_desc
;
1580 struct ixgbe_rx_buffer
*bi
;
1581 u16 i
= rx_ring
->next_to_use
;
1588 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
1589 bi
= &rx_ring
->rx_buffer_info
[i
];
1590 i
-= rx_ring
->count
;
1592 bufsz
= ixgbe_rx_bufsz(rx_ring
);
1595 if (!ixgbe_alloc_mapped_page(rx_ring
, bi
))
1598 /* sync the buffer for use by the device */
1599 dma_sync_single_range_for_device(rx_ring
->dev
, bi
->dma
,
1600 bi
->page_offset
, bufsz
,
1604 * Refresh the desc even if buffer_addrs didn't change
1605 * because each write-back erases this info.
1607 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
1613 rx_desc
= IXGBE_RX_DESC(rx_ring
, 0);
1614 bi
= rx_ring
->rx_buffer_info
;
1615 i
-= rx_ring
->count
;
1618 /* clear the length for the next_to_use descriptor */
1619 rx_desc
->wb
.upper
.length
= 0;
1622 } while (cleaned_count
);
1624 i
+= rx_ring
->count
;
1626 if (rx_ring
->next_to_use
!= i
) {
1627 rx_ring
->next_to_use
= i
;
1629 /* update next to alloc since we have filled the ring */
1630 rx_ring
->next_to_alloc
= i
;
1632 /* Force memory writes to complete before letting h/w
1633 * know there are new descriptors to fetch. (Only
1634 * applicable for weak-ordered memory model archs,
1638 writel(i
, rx_ring
->tail
);
1642 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring
*ring
,
1643 struct sk_buff
*skb
)
1645 u16 hdr_len
= skb_headlen(skb
);
1647 /* set gso_size to avoid messing up TCP MSS */
1648 skb_shinfo(skb
)->gso_size
= DIV_ROUND_UP((skb
->len
- hdr_len
),
1649 IXGBE_CB(skb
)->append_cnt
);
1650 skb_shinfo(skb
)->gso_type
= SKB_GSO_TCPV4
;
1653 static void ixgbe_update_rsc_stats(struct ixgbe_ring
*rx_ring
,
1654 struct sk_buff
*skb
)
1656 /* if append_cnt is 0 then frame is not RSC */
1657 if (!IXGBE_CB(skb
)->append_cnt
)
1660 rx_ring
->rx_stats
.rsc_count
+= IXGBE_CB(skb
)->append_cnt
;
1661 rx_ring
->rx_stats
.rsc_flush
++;
1663 ixgbe_set_rsc_gso_size(rx_ring
, skb
);
1665 /* gso_size is computed using append_cnt so always clear it last */
1666 IXGBE_CB(skb
)->append_cnt
= 0;
1670 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1671 * @rx_ring: rx descriptor ring packet is being transacted on
1672 * @rx_desc: pointer to the EOP Rx descriptor
1673 * @skb: pointer to current skb being populated
1675 * This function checks the ring, descriptor, and packet information in
1676 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1677 * other fields within the skb.
1679 void ixgbe_process_skb_fields(struct ixgbe_ring
*rx_ring
,
1680 union ixgbe_adv_rx_desc
*rx_desc
,
1681 struct sk_buff
*skb
)
1683 struct net_device
*dev
= rx_ring
->netdev
;
1684 u32 flags
= rx_ring
->q_vector
->adapter
->flags
;
1686 ixgbe_update_rsc_stats(rx_ring
, skb
);
1688 ixgbe_rx_hash(rx_ring
, rx_desc
, skb
);
1690 ixgbe_rx_checksum(rx_ring
, rx_desc
, skb
);
1692 if (unlikely(flags
& IXGBE_FLAG_RX_HWTSTAMP_ENABLED
))
1693 ixgbe_ptp_rx_hwtstamp(rx_ring
, rx_desc
, skb
);
1695 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
1696 ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_VP
)) {
1697 u16 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
1698 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
1701 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_STAT_SECP
))
1702 ixgbe_ipsec_rx(rx_ring
, rx_desc
, skb
);
1704 /* record Rx queue, or update MACVLAN statistics */
1705 if (netif_is_ixgbe(dev
))
1706 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1708 macvlan_count_rx(netdev_priv(dev
), skb
->len
+ ETH_HLEN
, true,
1711 skb
->protocol
= eth_type_trans(skb
, dev
);
1714 void ixgbe_rx_skb(struct ixgbe_q_vector
*q_vector
,
1715 struct sk_buff
*skb
)
1717 napi_gro_receive(&q_vector
->napi
, skb
);
1721 * ixgbe_is_non_eop - process handling of non-EOP buffers
1722 * @rx_ring: Rx ring being processed
1723 * @rx_desc: Rx descriptor for current buffer
1724 * @skb: Current socket buffer containing buffer in progress
1726 * This function updates next to clean. If the buffer is an EOP buffer
1727 * this function exits returning false, otherwise it will place the
1728 * sk_buff in the next buffer to be chained and return true indicating
1729 * that this is in fact a non-EOP buffer.
1731 static bool ixgbe_is_non_eop(struct ixgbe_ring
*rx_ring
,
1732 union ixgbe_adv_rx_desc
*rx_desc
,
1733 struct sk_buff
*skb
)
1735 u32 ntc
= rx_ring
->next_to_clean
+ 1;
1737 /* fetch, update, and store next to clean */
1738 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
1739 rx_ring
->next_to_clean
= ntc
;
1741 prefetch(IXGBE_RX_DESC(rx_ring
, ntc
));
1743 /* update RSC append count if present */
1744 if (ring_is_rsc_enabled(rx_ring
)) {
1745 __le32 rsc_enabled
= rx_desc
->wb
.lower
.lo_dword
.data
&
1746 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK
);
1748 if (unlikely(rsc_enabled
)) {
1749 u32 rsc_cnt
= le32_to_cpu(rsc_enabled
);
1751 rsc_cnt
>>= IXGBE_RXDADV_RSCCNT_SHIFT
;
1752 IXGBE_CB(skb
)->append_cnt
+= rsc_cnt
- 1;
1754 /* update ntc based on RSC value */
1755 ntc
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1756 ntc
&= IXGBE_RXDADV_NEXTP_MASK
;
1757 ntc
>>= IXGBE_RXDADV_NEXTP_SHIFT
;
1761 /* if we are the last buffer then there is nothing else to do */
1762 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1765 /* place skb in next buffer to be received */
1766 rx_ring
->rx_buffer_info
[ntc
].skb
= skb
;
1767 rx_ring
->rx_stats
.non_eop_descs
++;
1773 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1774 * @rx_ring: rx descriptor ring packet is being transacted on
1775 * @skb: pointer to current skb being adjusted
1777 * This function is an ixgbe specific version of __pskb_pull_tail. The
1778 * main difference between this version and the original function is that
1779 * this function can make several assumptions about the state of things
1780 * that allow for significant optimizations versus the standard function.
1781 * As a result we can do things like drop a frag and maintain an accurate
1782 * truesize for the skb.
1784 static void ixgbe_pull_tail(struct ixgbe_ring
*rx_ring
,
1785 struct sk_buff
*skb
)
1787 skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[0];
1789 unsigned int pull_len
;
1792 * it is valid to use page_address instead of kmap since we are
1793 * working with pages allocated out of the lomem pool per
1794 * alloc_page(GFP_ATOMIC)
1796 va
= skb_frag_address(frag
);
1799 * we need the header to contain the greater of either ETH_HLEN or
1800 * 60 bytes if the skb->len is less than 60 for skb_pad.
1802 pull_len
= eth_get_headlen(skb
->dev
, va
, IXGBE_RX_HDR_SIZE
);
1804 /* align pull length to size of long to optimize memcpy performance */
1805 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
1807 /* update all of the pointers */
1808 skb_frag_size_sub(frag
, pull_len
);
1809 skb_frag_off_add(frag
, pull_len
);
1810 skb
->data_len
-= pull_len
;
1811 skb
->tail
+= pull_len
;
1815 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1816 * @rx_ring: rx descriptor ring packet is being transacted on
1817 * @skb: pointer to current skb being updated
1819 * This function provides a basic DMA sync up for the first fragment of an
1820 * skb. The reason for doing this is that the first fragment cannot be
1821 * unmapped until we have reached the end of packet descriptor for a buffer
1824 static void ixgbe_dma_sync_frag(struct ixgbe_ring
*rx_ring
,
1825 struct sk_buff
*skb
)
1827 if (ring_uses_build_skb(rx_ring
)) {
1828 unsigned long mask
= (unsigned long)ixgbe_rx_pg_size(rx_ring
) - 1;
1829 unsigned long offset
= (unsigned long)(skb
->data
) & mask
;
1831 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1837 skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[0];
1839 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1842 skb_frag_size(frag
),
1846 /* If the page was released, just unmap it. */
1847 if (unlikely(IXGBE_CB(skb
)->page_released
)) {
1848 dma_unmap_page_attrs(rx_ring
->dev
, IXGBE_CB(skb
)->dma
,
1849 ixgbe_rx_pg_size(rx_ring
),
1856 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1857 * @rx_ring: rx descriptor ring packet is being transacted on
1858 * @rx_desc: pointer to the EOP Rx descriptor
1859 * @skb: pointer to current skb being fixed
1861 * Check if the skb is valid in the XDP case it will be an error pointer.
1862 * Return true in this case to abort processing and advance to next
1865 * Check for corrupted packet headers caused by senders on the local L2
1866 * embedded NIC switch not setting up their Tx Descriptors right. These
1867 * should be very rare.
1869 * Also address the case where we are pulling data in on pages only
1870 * and as such no data is present in the skb header.
1872 * In addition if skb is not at least 60 bytes we need to pad it so that
1873 * it is large enough to qualify as a valid Ethernet frame.
1875 * Returns true if an error was encountered and skb was freed.
1877 bool ixgbe_cleanup_headers(struct ixgbe_ring
*rx_ring
,
1878 union ixgbe_adv_rx_desc
*rx_desc
,
1879 struct sk_buff
*skb
)
1881 struct net_device
*netdev
= rx_ring
->netdev
;
1883 /* XDP packets use error pointer so abort at this point */
1887 /* Verify netdev is present, and that packet does not have any
1888 * errors that would be unacceptable to the netdev.
1891 (unlikely(ixgbe_test_staterr(rx_desc
,
1892 IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) &&
1893 !(netdev
->features
& NETIF_F_RXALL
)))) {
1894 dev_kfree_skb_any(skb
);
1898 /* place header in linear portion of buffer */
1899 if (!skb_headlen(skb
))
1900 ixgbe_pull_tail(rx_ring
, skb
);
1903 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1904 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
))
1908 /* if eth_skb_pad returns an error the skb was freed */
1909 if (eth_skb_pad(skb
))
1916 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1917 * @rx_ring: rx descriptor ring to store buffers on
1918 * @old_buff: donor buffer to have page reused
1920 * Synchronizes page for reuse by the adapter
1922 static void ixgbe_reuse_rx_page(struct ixgbe_ring
*rx_ring
,
1923 struct ixgbe_rx_buffer
*old_buff
)
1925 struct ixgbe_rx_buffer
*new_buff
;
1926 u16 nta
= rx_ring
->next_to_alloc
;
1928 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
1930 /* update, and store next to alloc */
1932 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
1934 /* Transfer page from old buffer to new buffer.
1935 * Move each member individually to avoid possible store
1936 * forwarding stalls and unnecessary copy of skb.
1938 new_buff
->dma
= old_buff
->dma
;
1939 new_buff
->page
= old_buff
->page
;
1940 new_buff
->page_offset
= old_buff
->page_offset
;
1941 new_buff
->pagecnt_bias
= old_buff
->pagecnt_bias
;
1944 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer
*rx_buffer
,
1945 int rx_buffer_pgcnt
)
1947 unsigned int pagecnt_bias
= rx_buffer
->pagecnt_bias
;
1948 struct page
*page
= rx_buffer
->page
;
1950 /* avoid re-using remote and pfmemalloc pages */
1951 if (!dev_page_is_reusable(page
))
1954 #if (PAGE_SIZE < 8192)
1955 /* if we are only owner of page we can reuse it */
1956 if (unlikely((rx_buffer_pgcnt
- pagecnt_bias
) > 1))
1959 /* The last offset is a bit aggressive in that we assume the
1960 * worst case of FCoE being enabled and using a 3K buffer.
1961 * However this should have minimal impact as the 1K extra is
1962 * still less than one buffer in size.
1964 #define IXGBE_LAST_OFFSET \
1965 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1966 if (rx_buffer
->page_offset
> IXGBE_LAST_OFFSET
)
1970 /* If we have drained the page fragment pool we need to update
1971 * the pagecnt_bias and page count so that we fully restock the
1972 * number of references the driver holds.
1974 if (unlikely(pagecnt_bias
== 1)) {
1975 page_ref_add(page
, USHRT_MAX
- 1);
1976 rx_buffer
->pagecnt_bias
= USHRT_MAX
;
1983 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1984 * @rx_ring: rx descriptor ring to transact packets on
1985 * @rx_buffer: buffer containing page to add
1986 * @skb: sk_buff to place the data into
1987 * @size: size of data in rx_buffer
1989 * This function will add the data contained in rx_buffer->page to the skb.
1990 * This is done either through a direct copy if the data in the buffer is
1991 * less than the skb header size, otherwise it will just attach the page as
1992 * a frag to the skb.
1994 * The function will then update the page offset if necessary and return
1995 * true if the buffer can be reused by the adapter.
1997 static void ixgbe_add_rx_frag(struct ixgbe_ring
*rx_ring
,
1998 struct ixgbe_rx_buffer
*rx_buffer
,
1999 struct sk_buff
*skb
,
2002 #if (PAGE_SIZE < 8192)
2003 unsigned int truesize
= ixgbe_rx_pg_size(rx_ring
) / 2;
2005 unsigned int truesize
= rx_ring
->rx_offset
?
2006 SKB_DATA_ALIGN(rx_ring
->rx_offset
+ size
) :
2007 SKB_DATA_ALIGN(size
);
2009 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, rx_buffer
->page
,
2010 rx_buffer
->page_offset
, size
, truesize
);
2011 #if (PAGE_SIZE < 8192)
2012 rx_buffer
->page_offset
^= truesize
;
2014 rx_buffer
->page_offset
+= truesize
;
2018 static struct ixgbe_rx_buffer
*ixgbe_get_rx_buffer(struct ixgbe_ring
*rx_ring
,
2019 union ixgbe_adv_rx_desc
*rx_desc
,
2020 struct sk_buff
**skb
,
2021 const unsigned int size
,
2022 int *rx_buffer_pgcnt
)
2024 struct ixgbe_rx_buffer
*rx_buffer
;
2026 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
2028 #if (PAGE_SIZE < 8192)
2029 page_count(rx_buffer
->page
);
2033 prefetchw(rx_buffer
->page
);
2034 *skb
= rx_buffer
->skb
;
2036 /* Delay unmapping of the first packet. It carries the header
2037 * information, HW may still access the header after the writeback.
2038 * Only unmap it when EOP is reached
2040 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)) {
2045 ixgbe_dma_sync_frag(rx_ring
, *skb
);
2048 /* we are reusing so sync this buffer for CPU use */
2049 dma_sync_single_range_for_cpu(rx_ring
->dev
,
2051 rx_buffer
->page_offset
,
2055 rx_buffer
->pagecnt_bias
--;
2060 static void ixgbe_put_rx_buffer(struct ixgbe_ring
*rx_ring
,
2061 struct ixgbe_rx_buffer
*rx_buffer
,
2062 struct sk_buff
*skb
,
2063 int rx_buffer_pgcnt
)
2065 if (ixgbe_can_reuse_rx_page(rx_buffer
, rx_buffer_pgcnt
)) {
2066 /* hand second half of page back to the ring */
2067 ixgbe_reuse_rx_page(rx_ring
, rx_buffer
);
2069 if (!IS_ERR(skb
) && IXGBE_CB(skb
)->dma
== rx_buffer
->dma
) {
2070 /* the page has been released from the ring */
2071 IXGBE_CB(skb
)->page_released
= true;
2073 /* we are not reusing the buffer so unmap it */
2074 dma_unmap_page_attrs(rx_ring
->dev
, rx_buffer
->dma
,
2075 ixgbe_rx_pg_size(rx_ring
),
2079 __page_frag_cache_drain(rx_buffer
->page
,
2080 rx_buffer
->pagecnt_bias
);
2083 /* clear contents of rx_buffer */
2084 rx_buffer
->page
= NULL
;
2085 rx_buffer
->skb
= NULL
;
2088 static struct sk_buff
*ixgbe_construct_skb(struct ixgbe_ring
*rx_ring
,
2089 struct ixgbe_rx_buffer
*rx_buffer
,
2090 struct xdp_buff
*xdp
,
2091 union ixgbe_adv_rx_desc
*rx_desc
)
2093 unsigned int size
= xdp
->data_end
- xdp
->data
;
2094 #if (PAGE_SIZE < 8192)
2095 unsigned int truesize
= ixgbe_rx_pg_size(rx_ring
) / 2;
2097 unsigned int truesize
= SKB_DATA_ALIGN(xdp
->data_end
-
2098 xdp
->data_hard_start
);
2100 struct sk_buff
*skb
;
2102 /* prefetch first cache line of first page */
2103 net_prefetch(xdp
->data
);
2105 /* Note, we get here by enabling legacy-rx via:
2107 * ethtool --set-priv-flags <dev> legacy-rx on
2109 * In this mode, we currently get 0 extra XDP headroom as
2110 * opposed to having legacy-rx off, where we process XDP
2111 * packets going to stack via ixgbe_build_skb(). The latter
2112 * provides us currently with 192 bytes of headroom.
2114 * For ixgbe_construct_skb() mode it means that the
2115 * xdp->data_meta will always point to xdp->data, since
2116 * the helper cannot expand the head. Should this ever
2117 * change in future for legacy-rx mode on, then lets also
2118 * add xdp->data_meta handling here.
2121 /* allocate a skb to store the frags */
2122 skb
= napi_alloc_skb(&rx_ring
->q_vector
->napi
, IXGBE_RX_HDR_SIZE
);
2126 if (size
> IXGBE_RX_HDR_SIZE
) {
2127 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
))
2128 IXGBE_CB(skb
)->dma
= rx_buffer
->dma
;
2130 skb_add_rx_frag(skb
, 0, rx_buffer
->page
,
2131 xdp
->data
- page_address(rx_buffer
->page
),
2133 #if (PAGE_SIZE < 8192)
2134 rx_buffer
->page_offset
^= truesize
;
2136 rx_buffer
->page_offset
+= truesize
;
2139 memcpy(__skb_put(skb
, size
),
2140 xdp
->data
, ALIGN(size
, sizeof(long)));
2141 rx_buffer
->pagecnt_bias
++;
2147 static struct sk_buff
*ixgbe_build_skb(struct ixgbe_ring
*rx_ring
,
2148 struct ixgbe_rx_buffer
*rx_buffer
,
2149 struct xdp_buff
*xdp
,
2150 union ixgbe_adv_rx_desc
*rx_desc
)
2152 unsigned int metasize
= xdp
->data
- xdp
->data_meta
;
2153 #if (PAGE_SIZE < 8192)
2154 unsigned int truesize
= ixgbe_rx_pg_size(rx_ring
) / 2;
2156 unsigned int truesize
= SKB_DATA_ALIGN(sizeof(struct skb_shared_info
)) +
2157 SKB_DATA_ALIGN(xdp
->data_end
-
2158 xdp
->data_hard_start
);
2160 struct sk_buff
*skb
;
2162 /* Prefetch first cache line of first page. If xdp->data_meta
2163 * is unused, this points extactly as xdp->data, otherwise we
2164 * likely have a consumer accessing first few bytes of meta
2165 * data, and then actual data.
2167 net_prefetch(xdp
->data_meta
);
2169 /* build an skb to around the page buffer */
2170 skb
= build_skb(xdp
->data_hard_start
, truesize
);
2174 /* update pointers within the skb to store the data */
2175 skb_reserve(skb
, xdp
->data
- xdp
->data_hard_start
);
2176 __skb_put(skb
, xdp
->data_end
- xdp
->data
);
2178 skb_metadata_set(skb
, metasize
);
2180 /* record DMA address if this is the start of a chain of buffers */
2181 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
))
2182 IXGBE_CB(skb
)->dma
= rx_buffer
->dma
;
2184 /* update buffer offset */
2185 #if (PAGE_SIZE < 8192)
2186 rx_buffer
->page_offset
^= truesize
;
2188 rx_buffer
->page_offset
+= truesize
;
2194 static struct sk_buff
*ixgbe_run_xdp(struct ixgbe_adapter
*adapter
,
2195 struct ixgbe_ring
*rx_ring
,
2196 struct xdp_buff
*xdp
)
2198 int err
, result
= IXGBE_XDP_PASS
;
2199 struct bpf_prog
*xdp_prog
;
2200 struct xdp_frame
*xdpf
;
2203 xdp_prog
= READ_ONCE(rx_ring
->xdp_prog
);
2208 prefetchw(xdp
->data_hard_start
); /* xdp_frame write */
2210 act
= bpf_prog_run_xdp(xdp_prog
, xdp
);
2215 xdpf
= xdp_convert_buff_to_frame(xdp
);
2216 if (unlikely(!xdpf
))
2218 result
= ixgbe_xmit_xdp_ring(adapter
, xdpf
);
2219 if (result
== IXGBE_XDP_CONSUMED
)
2223 err
= xdp_do_redirect(adapter
->netdev
, xdp
, xdp_prog
);
2226 result
= IXGBE_XDP_REDIR
;
2229 bpf_warn_invalid_xdp_action(act
);
2233 trace_xdp_exception(rx_ring
->netdev
, xdp_prog
, act
);
2234 fallthrough
; /* handle aborts by dropping packet */
2236 result
= IXGBE_XDP_CONSUMED
;
2240 return ERR_PTR(-result
);
2243 static unsigned int ixgbe_rx_frame_truesize(struct ixgbe_ring
*rx_ring
,
2246 unsigned int truesize
;
2248 #if (PAGE_SIZE < 8192)
2249 truesize
= ixgbe_rx_pg_size(rx_ring
) / 2; /* Must be power-of-2 */
2251 truesize
= rx_ring
->rx_offset
?
2252 SKB_DATA_ALIGN(rx_ring
->rx_offset
+ size
) +
2253 SKB_DATA_ALIGN(sizeof(struct skb_shared_info
)) :
2254 SKB_DATA_ALIGN(size
);
2259 static void ixgbe_rx_buffer_flip(struct ixgbe_ring
*rx_ring
,
2260 struct ixgbe_rx_buffer
*rx_buffer
,
2263 unsigned int truesize
= ixgbe_rx_frame_truesize(rx_ring
, size
);
2264 #if (PAGE_SIZE < 8192)
2265 rx_buffer
->page_offset
^= truesize
;
2267 rx_buffer
->page_offset
+= truesize
;
2272 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2273 * @q_vector: structure containing interrupt and ring information
2274 * @rx_ring: rx descriptor ring to transact packets on
2275 * @budget: Total limit on number of packets to process
2277 * This function provides a "bounce buffer" approach to Rx interrupt
2278 * processing. The advantage to this is that on systems that have
2279 * expensive overhead for IOMMU access this provides a means of avoiding
2280 * it by maintaining the mapping of the page to the syste.
2282 * Returns amount of work completed
2284 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
2285 struct ixgbe_ring
*rx_ring
,
2288 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0, frame_sz
= 0;
2289 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2292 unsigned int mss
= 0;
2293 #endif /* IXGBE_FCOE */
2294 u16 cleaned_count
= ixgbe_desc_unused(rx_ring
);
2295 unsigned int offset
= rx_ring
->rx_offset
;
2296 unsigned int xdp_xmit
= 0;
2297 struct xdp_buff xdp
;
2299 /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
2300 #if (PAGE_SIZE < 8192)
2301 frame_sz
= ixgbe_rx_frame_truesize(rx_ring
, 0);
2303 xdp_init_buff(&xdp
, frame_sz
, &rx_ring
->xdp_rxq
);
2305 while (likely(total_rx_packets
< budget
)) {
2306 union ixgbe_adv_rx_desc
*rx_desc
;
2307 struct ixgbe_rx_buffer
*rx_buffer
;
2308 struct sk_buff
*skb
;
2309 int rx_buffer_pgcnt
;
2312 /* return some buffers to hardware, one at a time is too slow */
2313 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
2314 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
2318 rx_desc
= IXGBE_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
2319 size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
2323 /* This memory barrier is needed to keep us from reading
2324 * any other fields out of the rx_desc until we know the
2325 * descriptor has been written back
2329 rx_buffer
= ixgbe_get_rx_buffer(rx_ring
, rx_desc
, &skb
, size
, &rx_buffer_pgcnt
);
2331 /* retrieve a buffer from the ring */
2333 unsigned char *hard_start
;
2335 hard_start
= page_address(rx_buffer
->page
) +
2336 rx_buffer
->page_offset
- offset
;
2337 xdp_prepare_buff(&xdp
, hard_start
, offset
, size
, true);
2338 #if (PAGE_SIZE > 4096)
2339 /* At larger PAGE_SIZE, frame_sz depend on len size */
2340 xdp
.frame_sz
= ixgbe_rx_frame_truesize(rx_ring
, size
);
2342 skb
= ixgbe_run_xdp(adapter
, rx_ring
, &xdp
);
2346 unsigned int xdp_res
= -PTR_ERR(skb
);
2348 if (xdp_res
& (IXGBE_XDP_TX
| IXGBE_XDP_REDIR
)) {
2349 xdp_xmit
|= xdp_res
;
2350 ixgbe_rx_buffer_flip(rx_ring
, rx_buffer
, size
);
2352 rx_buffer
->pagecnt_bias
++;
2355 total_rx_bytes
+= size
;
2357 ixgbe_add_rx_frag(rx_ring
, rx_buffer
, skb
, size
);
2358 } else if (ring_uses_build_skb(rx_ring
)) {
2359 skb
= ixgbe_build_skb(rx_ring
, rx_buffer
,
2362 skb
= ixgbe_construct_skb(rx_ring
, rx_buffer
,
2366 /* exit if we failed to retrieve a buffer */
2368 rx_ring
->rx_stats
.alloc_rx_buff_failed
++;
2369 rx_buffer
->pagecnt_bias
++;
2373 ixgbe_put_rx_buffer(rx_ring
, rx_buffer
, skb
, rx_buffer_pgcnt
);
2376 /* place incomplete frames back on ring for completion */
2377 if (ixgbe_is_non_eop(rx_ring
, rx_desc
, skb
))
2380 /* verify the packet layout is correct */
2381 if (ixgbe_cleanup_headers(rx_ring
, rx_desc
, skb
))
2384 /* probably a little skewed due to removing CRC */
2385 total_rx_bytes
+= skb
->len
;
2387 /* populate checksum, timestamp, VLAN, and protocol */
2388 ixgbe_process_skb_fields(rx_ring
, rx_desc
, skb
);
2391 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2392 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
)) {
2393 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
2394 /* include DDPed FCoE data */
2395 if (ddp_bytes
> 0) {
2397 mss
= rx_ring
->netdev
->mtu
-
2398 sizeof(struct fcoe_hdr
) -
2399 sizeof(struct fc_frame_header
) -
2400 sizeof(struct fcoe_crc_eof
);
2404 total_rx_bytes
+= ddp_bytes
;
2405 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
,
2409 dev_kfree_skb_any(skb
);
2414 #endif /* IXGBE_FCOE */
2415 ixgbe_rx_skb(q_vector
, skb
);
2417 /* update budget accounting */
2421 if (xdp_xmit
& IXGBE_XDP_REDIR
)
2424 if (xdp_xmit
& IXGBE_XDP_TX
) {
2425 struct ixgbe_ring
*ring
= adapter
->xdp_ring
[smp_processor_id()];
2427 /* Force memory writes to complete before letting h/w
2428 * know there are new descriptors to fetch.
2431 writel(ring
->next_to_use
, ring
->tail
);
2434 u64_stats_update_begin(&rx_ring
->syncp
);
2435 rx_ring
->stats
.packets
+= total_rx_packets
;
2436 rx_ring
->stats
.bytes
+= total_rx_bytes
;
2437 u64_stats_update_end(&rx_ring
->syncp
);
2438 q_vector
->rx
.total_packets
+= total_rx_packets
;
2439 q_vector
->rx
.total_bytes
+= total_rx_bytes
;
2441 return total_rx_packets
;
2445 * ixgbe_configure_msix - Configure MSI-X hardware
2446 * @adapter: board private structure
2448 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2451 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
2453 struct ixgbe_q_vector
*q_vector
;
2457 /* Populate MSIX to EITR Select */
2458 if (adapter
->num_vfs
> 32) {
2459 u32 eitrsel
= BIT(adapter
->num_vfs
- 32) - 1;
2460 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
2464 * Populate the IVAR table and set the ITR values to the
2465 * corresponding register.
2467 for (v_idx
= 0; v_idx
< adapter
->num_q_vectors
; v_idx
++) {
2468 struct ixgbe_ring
*ring
;
2469 q_vector
= adapter
->q_vector
[v_idx
];
2471 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2472 ixgbe_set_ivar(adapter
, 0, ring
->reg_idx
, v_idx
);
2474 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2475 ixgbe_set_ivar(adapter
, 1, ring
->reg_idx
, v_idx
);
2477 ixgbe_write_eitr(q_vector
);
2480 switch (adapter
->hw
.mac
.type
) {
2481 case ixgbe_mac_82598EB
:
2482 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
2485 case ixgbe_mac_82599EB
:
2486 case ixgbe_mac_X540
:
2487 case ixgbe_mac_X550
:
2488 case ixgbe_mac_X550EM_x
:
2489 case ixgbe_mac_x550em_a
:
2490 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
2495 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
2497 /* set up to autoclear timer, and the vectors */
2498 mask
= IXGBE_EIMS_ENABLE_MASK
;
2499 mask
&= ~(IXGBE_EIMS_OTHER
|
2500 IXGBE_EIMS_MAILBOX
|
2503 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
2507 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2508 * @q_vector: structure containing interrupt and ring information
2509 * @ring_container: structure containing ring performance data
2511 * Stores a new ITR value based on packets and byte
2512 * counts during the last interrupt. The advantage of per interrupt
2513 * computation is faster updates and more accurate ITR for the current
2514 * traffic pattern. Constants in this function were computed
2515 * based on theoretical maximum wire speed and thresholds were set based
2516 * on testing data as well as attempting to minimize response time
2517 * while increasing bulk throughput.
2519 static void ixgbe_update_itr(struct ixgbe_q_vector
*q_vector
,
2520 struct ixgbe_ring_container
*ring_container
)
2522 unsigned int itr
= IXGBE_ITR_ADAPTIVE_MIN_USECS
|
2523 IXGBE_ITR_ADAPTIVE_LATENCY
;
2524 unsigned int avg_wire_size
, packets
, bytes
;
2525 unsigned long next_update
= jiffies
;
2527 /* If we don't have any rings just leave ourselves set for maximum
2528 * possible latency so we take ourselves out of the equation.
2530 if (!ring_container
->ring
)
2533 /* If we didn't update within up to 1 - 2 jiffies we can assume
2534 * that either packets are coming in so slow there hasn't been
2535 * any work, or that there is so much work that NAPI is dealing
2536 * with interrupt moderation and we don't need to do anything.
2538 if (time_after(next_update
, ring_container
->next_update
))
2541 packets
= ring_container
->total_packets
;
2543 /* We have no packets to actually measure against. This means
2544 * either one of the other queues on this vector is active or
2545 * we are a Tx queue doing TSO with too high of an interrupt rate.
2547 * When this occurs just tick up our delay by the minimum value
2548 * and hope that this extra delay will prevent us from being called
2549 * without any work on our queue.
2552 itr
= (q_vector
->itr
>> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC
;
2553 if (itr
> IXGBE_ITR_ADAPTIVE_MAX_USECS
)
2554 itr
= IXGBE_ITR_ADAPTIVE_MAX_USECS
;
2555 itr
+= ring_container
->itr
& IXGBE_ITR_ADAPTIVE_LATENCY
;
2559 bytes
= ring_container
->total_bytes
;
2561 /* If packets are less than 4 or bytes are less than 9000 assume
2562 * insufficient data to use bulk rate limiting approach. We are
2563 * likely latency driven.
2565 if (packets
< 4 && bytes
< 9000) {
2566 itr
= IXGBE_ITR_ADAPTIVE_LATENCY
;
2567 goto adjust_by_size
;
2570 /* Between 4 and 48 we can assume that our current interrupt delay
2571 * is only slightly too low. As such we should increase it by a small
2575 itr
= (q_vector
->itr
>> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC
;
2576 if (itr
> IXGBE_ITR_ADAPTIVE_MAX_USECS
)
2577 itr
= IXGBE_ITR_ADAPTIVE_MAX_USECS
;
2581 /* Between 48 and 96 is our "goldilocks" zone where we are working
2582 * out "just right". Just report that our current ITR is good for us.
2585 itr
= q_vector
->itr
>> 2;
2589 /* If packet count is 96 or greater we are likely looking at a slight
2590 * overrun of the delay we want. Try halving our delay to see if that
2591 * will cut the number of packets in half per interrupt.
2593 if (packets
< 256) {
2594 itr
= q_vector
->itr
>> 3;
2595 if (itr
< IXGBE_ITR_ADAPTIVE_MIN_USECS
)
2596 itr
= IXGBE_ITR_ADAPTIVE_MIN_USECS
;
2600 /* The paths below assume we are dealing with a bulk ITR since number
2601 * of packets is 256 or greater. We are just going to have to compute
2602 * a value and try to bring the count under control, though for smaller
2603 * packet sizes there isn't much we can do as NAPI polling will likely
2604 * be kicking in sooner rather than later.
2606 itr
= IXGBE_ITR_ADAPTIVE_BULK
;
2609 /* If packet counts are 256 or greater we can assume we have a gross
2610 * overestimation of what the rate should be. Instead of trying to fine
2611 * tune it just use the formula below to try and dial in an exact value
2612 * give the current packet size of the frame.
2614 avg_wire_size
= bytes
/ packets
;
2616 /* The following is a crude approximation of:
2617 * wmem_default / (size + overhead) = desired_pkts_per_int
2618 * rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2619 * (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2621 * Assuming wmem_default is 212992 and overhead is 640 bytes per
2622 * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2625 * (170 * (size + 24)) / (size + 640) = ITR
2627 * We first do some math on the packet size and then finally bitshift
2628 * by 8 after rounding up. We also have to account for PCIe link speed
2629 * difference as ITR scales based on this.
2631 if (avg_wire_size
<= 60) {
2632 /* Start at 50k ints/sec */
2633 avg_wire_size
= 5120;
2634 } else if (avg_wire_size
<= 316) {
2635 /* 50K ints/sec to 16K ints/sec */
2636 avg_wire_size
*= 40;
2637 avg_wire_size
+= 2720;
2638 } else if (avg_wire_size
<= 1084) {
2639 /* 16K ints/sec to 9.2K ints/sec */
2640 avg_wire_size
*= 15;
2641 avg_wire_size
+= 11452;
2642 } else if (avg_wire_size
< 1968) {
2643 /* 9.2K ints/sec to 8K ints/sec */
2645 avg_wire_size
+= 22420;
2647 /* plateau at a limit of 8K ints/sec */
2648 avg_wire_size
= 32256;
2651 /* If we are in low latency mode half our delay which doubles the rate
2652 * to somewhere between 100K to 16K ints/sec
2654 if (itr
& IXGBE_ITR_ADAPTIVE_LATENCY
)
2655 avg_wire_size
>>= 1;
2657 /* Resultant value is 256 times larger than it needs to be. This
2658 * gives us room to adjust the value as needed to either increase
2659 * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2661 * Use addition as we have already recorded the new latency flag
2662 * for the ITR value.
2664 switch (q_vector
->adapter
->link_speed
) {
2665 case IXGBE_LINK_SPEED_10GB_FULL
:
2666 case IXGBE_LINK_SPEED_100_FULL
:
2668 itr
+= DIV_ROUND_UP(avg_wire_size
,
2669 IXGBE_ITR_ADAPTIVE_MIN_INC
* 256) *
2670 IXGBE_ITR_ADAPTIVE_MIN_INC
;
2672 case IXGBE_LINK_SPEED_2_5GB_FULL
:
2673 case IXGBE_LINK_SPEED_1GB_FULL
:
2674 case IXGBE_LINK_SPEED_10_FULL
:
2675 if (avg_wire_size
> 8064)
2676 avg_wire_size
= 8064;
2677 itr
+= DIV_ROUND_UP(avg_wire_size
,
2678 IXGBE_ITR_ADAPTIVE_MIN_INC
* 64) *
2679 IXGBE_ITR_ADAPTIVE_MIN_INC
;
2684 /* write back value */
2685 ring_container
->itr
= itr
;
2687 /* next update should occur within next jiffy */
2688 ring_container
->next_update
= next_update
+ 1;
2690 ring_container
->total_bytes
= 0;
2691 ring_container
->total_packets
= 0;
2695 * ixgbe_write_eitr - write EITR register in hardware specific way
2696 * @q_vector: structure containing interrupt and ring information
2698 * This function is made to be called by ethtool and by the driver
2699 * when it needs to update EITR registers at runtime. Hardware
2700 * specific quirks/differences are taken care of here.
2702 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
2704 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2705 struct ixgbe_hw
*hw
= &adapter
->hw
;
2706 int v_idx
= q_vector
->v_idx
;
2707 u32 itr_reg
= q_vector
->itr
& IXGBE_MAX_EITR
;
2709 switch (adapter
->hw
.mac
.type
) {
2710 case ixgbe_mac_82598EB
:
2711 /* must write high and low 16 bits to reset counter */
2712 itr_reg
|= (itr_reg
<< 16);
2714 case ixgbe_mac_82599EB
:
2715 case ixgbe_mac_X540
:
2716 case ixgbe_mac_X550
:
2717 case ixgbe_mac_X550EM_x
:
2718 case ixgbe_mac_x550em_a
:
2720 * set the WDIS bit to not clear the timer bits and cause an
2721 * immediate assertion of the interrupt
2723 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
2728 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
2731 static void ixgbe_set_itr(struct ixgbe_q_vector
*q_vector
)
2735 ixgbe_update_itr(q_vector
, &q_vector
->tx
);
2736 ixgbe_update_itr(q_vector
, &q_vector
->rx
);
2738 /* use the smallest value of new ITR delay calculations */
2739 new_itr
= min(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
2741 /* Clear latency flag if set, shift into correct position */
2742 new_itr
&= ~IXGBE_ITR_ADAPTIVE_LATENCY
;
2745 if (new_itr
!= q_vector
->itr
) {
2746 /* save the algorithm value here */
2747 q_vector
->itr
= new_itr
;
2749 ixgbe_write_eitr(q_vector
);
2754 * ixgbe_check_overtemp_subtask - check for over temperature
2755 * @adapter: pointer to adapter
2757 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter
*adapter
)
2759 struct ixgbe_hw
*hw
= &adapter
->hw
;
2760 u32 eicr
= adapter
->interrupt_event
;
2763 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2766 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_EVENT
))
2769 adapter
->flags2
&= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2771 switch (hw
->device_id
) {
2772 case IXGBE_DEV_ID_82599_T3_LOM
:
2774 * Since the warning interrupt is for both ports
2775 * we don't have to check if:
2776 * - This interrupt wasn't for our port.
2777 * - We may have missed the interrupt so always have to
2778 * check if we got a LSC
2780 if (!(eicr
& IXGBE_EICR_GPI_SDP0_8259X
) &&
2781 !(eicr
& IXGBE_EICR_LSC
))
2784 if (!(eicr
& IXGBE_EICR_LSC
) && hw
->mac
.ops
.check_link
) {
2786 bool link_up
= false;
2788 hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
2794 /* Check if this is not due to overtemp */
2795 if (hw
->phy
.ops
.check_overtemp(hw
) != IXGBE_ERR_OVERTEMP
)
2799 case IXGBE_DEV_ID_X550EM_A_1G_T
:
2800 case IXGBE_DEV_ID_X550EM_A_1G_T_L
:
2801 rc
= hw
->phy
.ops
.check_overtemp(hw
);
2802 if (rc
!= IXGBE_ERR_OVERTEMP
)
2806 if (adapter
->hw
.mac
.type
>= ixgbe_mac_X540
)
2808 if (!(eicr
& IXGBE_EICR_GPI_SDP0(hw
)))
2812 e_crit(drv
, "%s\n", ixgbe_overheat_msg
);
2814 adapter
->interrupt_event
= 0;
2817 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
2819 struct ixgbe_hw
*hw
= &adapter
->hw
;
2821 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
2822 (eicr
& IXGBE_EICR_GPI_SDP1(hw
))) {
2823 e_crit(probe
, "Fan has stopped, replace the adapter\n");
2824 /* write to clear the interrupt */
2825 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1(hw
));
2829 static void ixgbe_check_overtemp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2831 struct ixgbe_hw
*hw
= &adapter
->hw
;
2833 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
2836 switch (adapter
->hw
.mac
.type
) {
2837 case ixgbe_mac_82599EB
:
2839 * Need to check link state so complete overtemp check
2842 if (((eicr
& IXGBE_EICR_GPI_SDP0(hw
)) ||
2843 (eicr
& IXGBE_EICR_LSC
)) &&
2844 (!test_bit(__IXGBE_DOWN
, &adapter
->state
))) {
2845 adapter
->interrupt_event
= eicr
;
2846 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2847 ixgbe_service_event_schedule(adapter
);
2851 case ixgbe_mac_x550em_a
:
2852 if (eicr
& IXGBE_EICR_GPI_SDP0_X550EM_a
) {
2853 adapter
->interrupt_event
= eicr
;
2854 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2855 ixgbe_service_event_schedule(adapter
);
2856 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
,
2857 IXGBE_EICR_GPI_SDP0_X550EM_a
);
2858 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICR
,
2859 IXGBE_EICR_GPI_SDP0_X550EM_a
);
2862 case ixgbe_mac_X550
:
2863 case ixgbe_mac_X540
:
2864 if (!(eicr
& IXGBE_EICR_TS
))
2871 e_crit(drv
, "%s\n", ixgbe_overheat_msg
);
2874 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
2876 switch (hw
->mac
.type
) {
2877 case ixgbe_mac_82598EB
:
2878 if (hw
->phy
.type
== ixgbe_phy_nl
)
2881 case ixgbe_mac_82599EB
:
2882 case ixgbe_mac_X550EM_x
:
2883 case ixgbe_mac_x550em_a
:
2884 switch (hw
->mac
.ops
.get_media_type(hw
)) {
2885 case ixgbe_media_type_fiber
:
2886 case ixgbe_media_type_fiber_qsfp
:
2896 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2898 struct ixgbe_hw
*hw
= &adapter
->hw
;
2899 u32 eicr_mask
= IXGBE_EICR_GPI_SDP2(hw
);
2901 if (!ixgbe_is_sfp(hw
))
2904 /* Later MAC's use different SDP */
2905 if (hw
->mac
.type
>= ixgbe_mac_X540
)
2906 eicr_mask
= IXGBE_EICR_GPI_SDP0_X540
;
2908 if (eicr
& eicr_mask
) {
2909 /* Clear the interrupt */
2910 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr_mask
);
2911 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2912 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
2913 adapter
->sfp_poll_time
= 0;
2914 ixgbe_service_event_schedule(adapter
);
2918 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
&&
2919 (eicr
& IXGBE_EICR_GPI_SDP1(hw
))) {
2920 /* Clear the interrupt */
2921 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1(hw
));
2922 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2923 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
2924 ixgbe_service_event_schedule(adapter
);
2929 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
2931 struct ixgbe_hw
*hw
= &adapter
->hw
;
2934 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2935 adapter
->link_check_timeout
= jiffies
;
2936 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2937 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
2938 IXGBE_WRITE_FLUSH(hw
);
2939 ixgbe_service_event_schedule(adapter
);
2943 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
2947 struct ixgbe_hw
*hw
= &adapter
->hw
;
2949 switch (hw
->mac
.type
) {
2950 case ixgbe_mac_82598EB
:
2951 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2952 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, mask
);
2954 case ixgbe_mac_82599EB
:
2955 case ixgbe_mac_X540
:
2956 case ixgbe_mac_X550
:
2957 case ixgbe_mac_X550EM_x
:
2958 case ixgbe_mac_x550em_a
:
2959 mask
= (qmask
& 0xFFFFFFFF);
2961 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(0), mask
);
2962 mask
= (qmask
>> 32);
2964 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(1), mask
);
2969 /* skip the flush */
2973 * ixgbe_irq_enable - Enable default interrupt generation settings
2974 * @adapter: board private structure
2975 * @queues: enable irqs for queues
2976 * @flush: flush register write
2978 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
, bool queues
,
2981 struct ixgbe_hw
*hw
= &adapter
->hw
;
2982 u32 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2984 /* don't reenable LSC while waiting for link */
2985 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
2986 mask
&= ~IXGBE_EIMS_LSC
;
2988 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2989 switch (adapter
->hw
.mac
.type
) {
2990 case ixgbe_mac_82599EB
:
2991 mask
|= IXGBE_EIMS_GPI_SDP0(hw
);
2993 case ixgbe_mac_X540
:
2994 case ixgbe_mac_X550
:
2995 case ixgbe_mac_X550EM_x
:
2996 case ixgbe_mac_x550em_a
:
2997 mask
|= IXGBE_EIMS_TS
;
3002 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
3003 mask
|= IXGBE_EIMS_GPI_SDP1(hw
);
3004 switch (adapter
->hw
.mac
.type
) {
3005 case ixgbe_mac_82599EB
:
3006 mask
|= IXGBE_EIMS_GPI_SDP1(hw
);
3007 mask
|= IXGBE_EIMS_GPI_SDP2(hw
);
3009 case ixgbe_mac_X540
:
3010 case ixgbe_mac_X550
:
3011 case ixgbe_mac_X550EM_x
:
3012 case ixgbe_mac_x550em_a
:
3013 if (adapter
->hw
.device_id
== IXGBE_DEV_ID_X550EM_X_SFP
||
3014 adapter
->hw
.device_id
== IXGBE_DEV_ID_X550EM_A_SFP
||
3015 adapter
->hw
.device_id
== IXGBE_DEV_ID_X550EM_A_SFP_N
)
3016 mask
|= IXGBE_EIMS_GPI_SDP0(&adapter
->hw
);
3017 if (adapter
->hw
.phy
.type
== ixgbe_phy_x550em_ext_t
)
3018 mask
|= IXGBE_EICR_GPI_SDP0_X540
;
3019 mask
|= IXGBE_EIMS_ECC
;
3020 mask
|= IXGBE_EIMS_MAILBOX
;
3026 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
3027 !(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
3028 mask
|= IXGBE_EIMS_FLOW_DIR
;
3030 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
3032 ixgbe_irq_enable_queues(adapter
, ~0);
3034 IXGBE_WRITE_FLUSH(&adapter
->hw
);
3037 static irqreturn_t
ixgbe_msix_other(int irq
, void *data
)
3039 struct ixgbe_adapter
*adapter
= data
;
3040 struct ixgbe_hw
*hw
= &adapter
->hw
;
3044 * Workaround for Silicon errata. Use clear-by-write instead
3045 * of clear-by-read. Reading with EICS will return the
3046 * interrupt causes without clearing, which later be done
3047 * with the write to EICR.
3049 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
3051 /* The lower 16bits of the EICR register are for the queue interrupts
3052 * which should be masked here in order to not accidentally clear them if
3053 * the bits are high when ixgbe_msix_other is called. There is a race
3054 * condition otherwise which results in possible performance loss
3055 * especially if the ixgbe_msix_other interrupt is triggering
3056 * consistently (as it would when PPS is turned on for the X540 device)
3060 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
3062 if (eicr
& IXGBE_EICR_LSC
)
3063 ixgbe_check_lsc(adapter
);
3065 if (eicr
& IXGBE_EICR_MAILBOX
)
3066 ixgbe_msg_task(adapter
);
3068 switch (hw
->mac
.type
) {
3069 case ixgbe_mac_82599EB
:
3070 case ixgbe_mac_X540
:
3071 case ixgbe_mac_X550
:
3072 case ixgbe_mac_X550EM_x
:
3073 case ixgbe_mac_x550em_a
:
3074 if (hw
->phy
.type
== ixgbe_phy_x550em_ext_t
&&
3075 (eicr
& IXGBE_EICR_GPI_SDP0_X540
)) {
3076 adapter
->flags2
|= IXGBE_FLAG2_PHY_INTERRUPT
;
3077 ixgbe_service_event_schedule(adapter
);
3078 IXGBE_WRITE_REG(hw
, IXGBE_EICR
,
3079 IXGBE_EICR_GPI_SDP0_X540
);
3081 if (eicr
& IXGBE_EICR_ECC
) {
3082 e_info(link
, "Received ECC Err, initiating reset\n");
3083 set_bit(__IXGBE_RESET_REQUESTED
, &adapter
->state
);
3084 ixgbe_service_event_schedule(adapter
);
3085 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_ECC
);
3087 /* Handle Flow Director Full threshold interrupt */
3088 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
3089 int reinit_count
= 0;
3091 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3092 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
3093 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE
,
3098 /* no more flow director interrupts until after init */
3099 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_FLOW_DIR
);
3100 adapter
->flags2
|= IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
3101 ixgbe_service_event_schedule(adapter
);
3104 ixgbe_check_sfp_event(adapter
, eicr
);
3105 ixgbe_check_overtemp_event(adapter
, eicr
);
3111 ixgbe_check_fan_failure(adapter
, eicr
);
3113 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
3114 ixgbe_ptp_check_pps_event(adapter
);
3116 /* re-enable the original interrupt state, no lsc, no queues */
3117 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3118 ixgbe_irq_enable(adapter
, false, false);
3123 static irqreturn_t
ixgbe_msix_clean_rings(int irq
, void *data
)
3125 struct ixgbe_q_vector
*q_vector
= data
;
3127 /* EIAM disabled interrupts (on this vector) for us */
3129 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
3130 napi_schedule_irqoff(&q_vector
->napi
);
3136 * ixgbe_poll - NAPI Rx polling callback
3137 * @napi: structure for representing this polling device
3138 * @budget: how many packets driver is allowed to clean
3140 * This function is used for legacy and MSI, NAPI mode
3142 int ixgbe_poll(struct napi_struct
*napi
, int budget
)
3144 struct ixgbe_q_vector
*q_vector
=
3145 container_of(napi
, struct ixgbe_q_vector
, napi
);
3146 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
3147 struct ixgbe_ring
*ring
;
3148 int per_ring_budget
, work_done
= 0;
3149 bool clean_complete
= true;
3151 #ifdef CONFIG_IXGBE_DCA
3152 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
3153 ixgbe_update_dca(q_vector
);
3156 ixgbe_for_each_ring(ring
, q_vector
->tx
) {
3157 bool wd
= ring
->xsk_pool
?
3158 ixgbe_clean_xdp_tx_irq(q_vector
, ring
, budget
) :
3159 ixgbe_clean_tx_irq(q_vector
, ring
, budget
);
3162 clean_complete
= false;
3165 /* Exit if we are called by netpoll */
3169 /* attempt to distribute budget to each queue fairly, but don't allow
3170 * the budget to go below 1 because we'll exit polling */
3171 if (q_vector
->rx
.count
> 1)
3172 per_ring_budget
= max(budget
/q_vector
->rx
.count
, 1);
3174 per_ring_budget
= budget
;
3176 ixgbe_for_each_ring(ring
, q_vector
->rx
) {
3177 int cleaned
= ring
->xsk_pool
?
3178 ixgbe_clean_rx_irq_zc(q_vector
, ring
,
3180 ixgbe_clean_rx_irq(q_vector
, ring
,
3183 work_done
+= cleaned
;
3184 if (cleaned
>= per_ring_budget
)
3185 clean_complete
= false;
3188 /* If all work not completed, return budget and keep polling */
3189 if (!clean_complete
)
3192 /* all work done, exit the polling mode */
3193 if (likely(napi_complete_done(napi
, work_done
))) {
3194 if (adapter
->rx_itr_setting
& 1)
3195 ixgbe_set_itr(q_vector
);
3196 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3197 ixgbe_irq_enable_queues(adapter
,
3198 BIT_ULL(q_vector
->v_idx
));
3201 return min(work_done
, budget
- 1);
3205 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3206 * @adapter: board private structure
3208 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3209 * interrupts from the kernel.
3211 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
3213 struct net_device
*netdev
= adapter
->netdev
;
3214 unsigned int ri
= 0, ti
= 0;
3217 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
3218 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
3219 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
3221 if (q_vector
->tx
.ring
&& q_vector
->rx
.ring
) {
3222 snprintf(q_vector
->name
, sizeof(q_vector
->name
),
3223 "%s-TxRx-%u", netdev
->name
, ri
++);
3225 } else if (q_vector
->rx
.ring
) {
3226 snprintf(q_vector
->name
, sizeof(q_vector
->name
),
3227 "%s-rx-%u", netdev
->name
, ri
++);
3228 } else if (q_vector
->tx
.ring
) {
3229 snprintf(q_vector
->name
, sizeof(q_vector
->name
),
3230 "%s-tx-%u", netdev
->name
, ti
++);
3232 /* skip this unused q_vector */
3235 err
= request_irq(entry
->vector
, &ixgbe_msix_clean_rings
, 0,
3236 q_vector
->name
, q_vector
);
3238 e_err(probe
, "request_irq failed for MSIX interrupt "
3239 "Error: %d\n", err
);
3240 goto free_queue_irqs
;
3242 /* If Flow Director is enabled, set interrupt affinity */
3243 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3244 /* assign the mask for this irq */
3245 irq_set_affinity_hint(entry
->vector
,
3246 &q_vector
->affinity_mask
);
3250 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
3251 ixgbe_msix_other
, 0, netdev
->name
, adapter
);
3253 e_err(probe
, "request_irq for msix_other failed: %d\n", err
);
3254 goto free_queue_irqs
;
3262 irq_set_affinity_hint(adapter
->msix_entries
[vector
].vector
,
3264 free_irq(adapter
->msix_entries
[vector
].vector
,
3265 adapter
->q_vector
[vector
]);
3267 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
3268 pci_disable_msix(adapter
->pdev
);
3269 kfree(adapter
->msix_entries
);
3270 adapter
->msix_entries
= NULL
;
3275 * ixgbe_intr - legacy mode Interrupt Handler
3276 * @irq: interrupt number
3277 * @data: pointer to a network interface device structure
3279 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
3281 struct ixgbe_adapter
*adapter
= data
;
3282 struct ixgbe_hw
*hw
= &adapter
->hw
;
3283 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
3287 * Workaround for silicon errata #26 on 82598. Mask the interrupt
3288 * before the read of EICR.
3290 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
3292 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3293 * therefore no explicit interrupt disable is necessary */
3294 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
3297 * shared interrupt alert!
3298 * make sure interrupts are enabled because the read will
3299 * have disabled interrupts due to EIAM
3300 * finish the workaround of silicon errata on 82598. Unmask
3301 * the interrupt that we masked before the EICR read.
3303 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3304 ixgbe_irq_enable(adapter
, true, true);
3305 return IRQ_NONE
; /* Not our interrupt */
3308 if (eicr
& IXGBE_EICR_LSC
)
3309 ixgbe_check_lsc(adapter
);
3311 switch (hw
->mac
.type
) {
3312 case ixgbe_mac_82599EB
:
3313 ixgbe_check_sfp_event(adapter
, eicr
);
3315 case ixgbe_mac_X540
:
3316 case ixgbe_mac_X550
:
3317 case ixgbe_mac_X550EM_x
:
3318 case ixgbe_mac_x550em_a
:
3319 if (eicr
& IXGBE_EICR_ECC
) {
3320 e_info(link
, "Received ECC Err, initiating reset\n");
3321 set_bit(__IXGBE_RESET_REQUESTED
, &adapter
->state
);
3322 ixgbe_service_event_schedule(adapter
);
3323 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_ECC
);
3325 ixgbe_check_overtemp_event(adapter
, eicr
);
3331 ixgbe_check_fan_failure(adapter
, eicr
);
3332 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
3333 ixgbe_ptp_check_pps_event(adapter
);
3335 /* would disable interrupts here but EIAM disabled it */
3336 napi_schedule_irqoff(&q_vector
->napi
);
3339 * re-enable link(maybe) and non-queue interrupts, no flush.
3340 * ixgbe_poll will re-enable the queue interrupts
3342 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3343 ixgbe_irq_enable(adapter
, false, false);
3349 * ixgbe_request_irq - initialize interrupts
3350 * @adapter: board private structure
3352 * Attempts to configure interrupts using the best available
3353 * capabilities of the hardware and kernel.
3355 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
3357 struct net_device
*netdev
= adapter
->netdev
;
3360 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3361 err
= ixgbe_request_msix_irqs(adapter
);
3362 else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)
3363 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
3364 netdev
->name
, adapter
);
3366 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
3367 netdev
->name
, adapter
);
3370 e_err(probe
, "request_irq failed, Error %d\n", err
);
3375 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
3379 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
3380 free_irq(adapter
->pdev
->irq
, adapter
);
3384 if (!adapter
->msix_entries
)
3387 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
3388 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
3389 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
3391 /* free only the irqs that were actually requested */
3392 if (!q_vector
->rx
.ring
&& !q_vector
->tx
.ring
)
3395 /* clear the affinity_mask in the IRQ descriptor */
3396 irq_set_affinity_hint(entry
->vector
, NULL
);
3398 free_irq(entry
->vector
, q_vector
);
3401 free_irq(adapter
->msix_entries
[vector
].vector
, adapter
);
3405 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3406 * @adapter: board private structure
3408 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
3410 switch (adapter
->hw
.mac
.type
) {
3411 case ixgbe_mac_82598EB
:
3412 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
3414 case ixgbe_mac_82599EB
:
3415 case ixgbe_mac_X540
:
3416 case ixgbe_mac_X550
:
3417 case ixgbe_mac_X550EM_x
:
3418 case ixgbe_mac_x550em_a
:
3419 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
3420 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
3421 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
3426 IXGBE_WRITE_FLUSH(&adapter
->hw
);
3427 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3430 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++)
3431 synchronize_irq(adapter
->msix_entries
[vector
].vector
);
3433 synchronize_irq(adapter
->msix_entries
[vector
++].vector
);
3435 synchronize_irq(adapter
->pdev
->irq
);
3440 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3441 * @adapter: board private structure
3444 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
3446 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
3448 ixgbe_write_eitr(q_vector
);
3450 ixgbe_set_ivar(adapter
, 0, 0, 0);
3451 ixgbe_set_ivar(adapter
, 1, 0, 0);
3453 e_info(hw
, "Legacy interrupt IVAR setup done\n");
3457 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3458 * @adapter: board private structure
3459 * @ring: structure containing ring specific data
3461 * Configure the Tx descriptor ring after a reset.
3463 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
3464 struct ixgbe_ring
*ring
)
3466 struct ixgbe_hw
*hw
= &adapter
->hw
;
3467 u64 tdba
= ring
->dma
;
3469 u32 txdctl
= IXGBE_TXDCTL_ENABLE
;
3470 u8 reg_idx
= ring
->reg_idx
;
3472 ring
->xsk_pool
= NULL
;
3473 if (ring_is_xdp(ring
))
3474 ring
->xsk_pool
= ixgbe_xsk_pool(adapter
, ring
);
3476 /* disable queue to avoid issues while updating state */
3477 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), 0);
3478 IXGBE_WRITE_FLUSH(hw
);
3480 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
3481 (tdba
& DMA_BIT_MASK(32)));
3482 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
3483 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
3484 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
3485 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
3486 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
3487 ring
->tail
= adapter
->io_addr
+ IXGBE_TDT(reg_idx
);
3490 * set WTHRESH to encourage burst writeback, it should not be set
3491 * higher than 1 when:
3492 * - ITR is 0 as it could cause false TX hangs
3493 * - ITR is set to > 100k int/sec and BQL is enabled
3495 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3496 * to or less than the number of on chip descriptors, which is
3499 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< IXGBE_100K_ITR
))
3500 txdctl
|= 1u << 16; /* WTHRESH = 1 */
3502 txdctl
|= 8u << 16; /* WTHRESH = 8 */
3505 * Setting PTHRESH to 32 both improves performance
3506 * and avoids a TX hang with DFP enabled
3508 txdctl
|= (1u << 8) | /* HTHRESH = 1 */
3509 32; /* PTHRESH = 32 */
3511 /* reinitialize flowdirector state */
3512 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3513 ring
->atr_sample_rate
= adapter
->atr_sample_rate
;
3514 ring
->atr_count
= 0;
3515 set_bit(__IXGBE_TX_FDIR_INIT_DONE
, &ring
->state
);
3517 ring
->atr_sample_rate
= 0;
3520 /* initialize XPS */
3521 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE
, &ring
->state
)) {
3522 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
3525 netif_set_xps_queue(ring
->netdev
,
3526 &q_vector
->affinity_mask
,
3530 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &ring
->state
);
3532 /* reinitialize tx_buffer_info */
3533 memset(ring
->tx_buffer_info
, 0,
3534 sizeof(struct ixgbe_tx_buffer
) * ring
->count
);
3537 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
3539 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3540 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3541 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3544 /* poll to verify queue is enabled */
3546 usleep_range(1000, 2000);
3547 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
3548 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
3550 hw_dbg(hw
, "Could not enable Tx Queue %d\n", reg_idx
);
3553 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
3555 struct ixgbe_hw
*hw
= &adapter
->hw
;
3557 u8 tcs
= adapter
->hw_tcs
;
3559 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3562 /* disable the arbiter while setting MTQC */
3563 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
3564 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
3565 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3567 /* set transmit pool layout */
3568 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3569 mtqc
= IXGBE_MTQC_VT_ENA
;
3571 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3573 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3574 else if (adapter
->ring_feature
[RING_F_VMDQ
].mask
==
3575 IXGBE_82599_VMDQ_4Q_MASK
)
3576 mtqc
|= IXGBE_MTQC_32VF
;
3578 mtqc
|= IXGBE_MTQC_64VF
;
3581 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3582 } else if (tcs
> 1) {
3583 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3585 u8 max_txq
= adapter
->num_tx_queues
+
3586 adapter
->num_xdp_queues
;
3588 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3590 mtqc
= IXGBE_MTQC_64Q_1PB
;
3594 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, mtqc
);
3596 /* Enable Security TX Buffer IFG for multiple pb */
3598 u32 sectx
= IXGBE_READ_REG(hw
, IXGBE_SECTXMINIFG
);
3599 sectx
|= IXGBE_SECTX_DCB
;
3600 IXGBE_WRITE_REG(hw
, IXGBE_SECTXMINIFG
, sectx
);
3603 /* re-enable the arbiter */
3604 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
3605 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3609 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3610 * @adapter: board private structure
3612 * Configure the Tx unit of the MAC after a reset.
3614 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
3616 struct ixgbe_hw
*hw
= &adapter
->hw
;
3620 ixgbe_setup_mtqc(adapter
);
3622 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3623 /* DMATXCTL.EN must be before Tx queues are enabled */
3624 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
3625 dmatxctl
|= IXGBE_DMATXCTL_TE
;
3626 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
3629 /* Setup the HW Tx Head and Tail descriptor pointers */
3630 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3631 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3632 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++)
3633 ixgbe_configure_tx_ring(adapter
, adapter
->xdp_ring
[i
]);
3636 static void ixgbe_enable_rx_drop(struct ixgbe_adapter
*adapter
,
3637 struct ixgbe_ring
*ring
)
3639 struct ixgbe_hw
*hw
= &adapter
->hw
;
3640 u8 reg_idx
= ring
->reg_idx
;
3641 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3643 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
3645 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3648 static void ixgbe_disable_rx_drop(struct ixgbe_adapter
*adapter
,
3649 struct ixgbe_ring
*ring
)
3651 struct ixgbe_hw
*hw
= &adapter
->hw
;
3652 u8 reg_idx
= ring
->reg_idx
;
3653 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3655 srrctl
&= ~IXGBE_SRRCTL_DROP_EN
;
3657 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3660 #ifdef CONFIG_IXGBE_DCB
3661 void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3663 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3667 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
3669 if (adapter
->ixgbe_ieee_pfc
)
3670 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
3673 * We should set the drop enable bit if:
3676 * Number of Rx queues > 1 and flow control is disabled
3678 * This allows us to avoid head of line blocking for security
3679 * and performance reasons.
3681 if (adapter
->num_vfs
|| (adapter
->num_rx_queues
> 1 &&
3682 !(adapter
->hw
.fc
.current_mode
& ixgbe_fc_tx_pause
) && !pfc_en
)) {
3683 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3684 ixgbe_enable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3686 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3687 ixgbe_disable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3691 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3693 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
3694 struct ixgbe_ring
*rx_ring
)
3696 struct ixgbe_hw
*hw
= &adapter
->hw
;
3698 u8 reg_idx
= rx_ring
->reg_idx
;
3700 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3701 u16 mask
= adapter
->ring_feature
[RING_F_RSS
].mask
;
3704 * if VMDq is not active we must program one srrctl register
3705 * per RSS queue since we have enabled RDRXCTL.MVMEN
3710 /* configure header buffer length, needed for RSC */
3711 srrctl
= IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3713 /* configure the packet buffer length */
3714 if (rx_ring
->xsk_pool
) {
3715 u32 xsk_buf_len
= xsk_pool_get_rx_frame_size(rx_ring
->xsk_pool
);
3717 /* If the MAC support setting RXDCTL.RLPML, the
3718 * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and
3719 * RXDCTL.RLPML is set to the actual UMEM buffer
3720 * size. If not, then we are stuck with a 1k buffer
3721 * size resolution. In this case frames larger than
3722 * the UMEM buffer size viewed in a 1k resolution will
3725 if (hw
->mac
.type
!= ixgbe_mac_82599EB
)
3726 srrctl
|= PAGE_SIZE
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
3728 srrctl
|= xsk_buf_len
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
3729 } else if (test_bit(__IXGBE_RX_3K_BUFFER
, &rx_ring
->state
)) {
3730 srrctl
|= IXGBE_RXBUFFER_3K
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
3732 srrctl
|= IXGBE_RXBUFFER_2K
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
3735 /* configure descriptor type */
3736 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3738 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3742 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3743 * @adapter: device handle
3745 * - 82598/82599/X540: 128
3746 * - X550(non-SRIOV mode): 512
3747 * - X550(SRIOV mode): 64
3749 u32
ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter
*adapter
)
3751 if (adapter
->hw
.mac
.type
< ixgbe_mac_X550
)
3753 else if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3760 * ixgbe_store_key - Write the RSS key to HW
3761 * @adapter: device handle
3763 * Write the RSS key stored in adapter.rss_key to HW.
3765 void ixgbe_store_key(struct ixgbe_adapter
*adapter
)
3767 struct ixgbe_hw
*hw
= &adapter
->hw
;
3770 for (i
= 0; i
< 10; i
++)
3771 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), adapter
->rss_key
[i
]);
3775 * ixgbe_init_rss_key - Initialize adapter RSS key
3776 * @adapter: device handle
3778 * Allocates and initializes the RSS key if it is not allocated.
3780 static inline int ixgbe_init_rss_key(struct ixgbe_adapter
*adapter
)
3784 if (!adapter
->rss_key
) {
3785 rss_key
= kzalloc(IXGBE_RSS_KEY_SIZE
, GFP_KERNEL
);
3786 if (unlikely(!rss_key
))
3789 netdev_rss_key_fill(rss_key
, IXGBE_RSS_KEY_SIZE
);
3790 adapter
->rss_key
= rss_key
;
3797 * ixgbe_store_reta - Write the RETA table to HW
3798 * @adapter: device handle
3800 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3802 void ixgbe_store_reta(struct ixgbe_adapter
*adapter
)
3804 u32 i
, reta_entries
= ixgbe_rss_indir_tbl_entries(adapter
);
3805 struct ixgbe_hw
*hw
= &adapter
->hw
;
3808 u8
*indir_tbl
= adapter
->rss_indir_tbl
;
3810 /* Fill out the redirection table as follows:
3811 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3813 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3814 * - X550: 8 bit wide entries containing 6 bit RSS index
3816 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
3817 indices_multi
= 0x11;
3819 indices_multi
= 0x1;
3821 /* Write redirection table to HW */
3822 for (i
= 0; i
< reta_entries
; i
++) {
3823 reta
|= indices_multi
* indir_tbl
[i
] << (i
& 0x3) * 8;
3826 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
3828 IXGBE_WRITE_REG(hw
, IXGBE_ERETA((i
>> 2) - 32),
3836 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3837 * @adapter: device handle
3839 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3841 static void ixgbe_store_vfreta(struct ixgbe_adapter
*adapter
)
3843 u32 i
, reta_entries
= ixgbe_rss_indir_tbl_entries(adapter
);
3844 struct ixgbe_hw
*hw
= &adapter
->hw
;
3847 /* Write redirection table to HW */
3848 for (i
= 0; i
< reta_entries
; i
++) {
3849 u16 pool
= adapter
->num_rx_pools
;
3851 vfreta
|= (u32
)adapter
->rss_indir_tbl
[i
] << (i
& 0x3) * 8;
3857 IXGBE_PFVFRETA(i
>> 2, VMDQ_P(pool
)),
3863 static void ixgbe_setup_reta(struct ixgbe_adapter
*adapter
)
3866 u32 reta_entries
= ixgbe_rss_indir_tbl_entries(adapter
);
3867 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3869 /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3870 * make full use of any rings they may have. We will use the
3871 * PSRTYPE register to control how many rings we use within the PF.
3873 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) && (rss_i
< 4))
3876 /* Fill out hash function seeds */
3877 ixgbe_store_key(adapter
);
3879 /* Fill out redirection table */
3880 memset(adapter
->rss_indir_tbl
, 0, sizeof(adapter
->rss_indir_tbl
));
3882 for (i
= 0, j
= 0; i
< reta_entries
; i
++, j
++) {
3886 adapter
->rss_indir_tbl
[i
] = j
;
3889 ixgbe_store_reta(adapter
);
3892 static void ixgbe_setup_vfreta(struct ixgbe_adapter
*adapter
)
3894 struct ixgbe_hw
*hw
= &adapter
->hw
;
3895 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3898 /* Fill out hash function seeds */
3899 for (i
= 0; i
< 10; i
++) {
3900 u16 pool
= adapter
->num_rx_pools
;
3904 IXGBE_PFVFRSSRK(i
, VMDQ_P(pool
)),
3905 *(adapter
->rss_key
+ i
));
3908 /* Fill out the redirection table */
3909 for (i
= 0, j
= 0; i
< 64; i
++, j
++) {
3913 adapter
->rss_indir_tbl
[i
] = j
;
3916 ixgbe_store_vfreta(adapter
);
3919 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
3921 struct ixgbe_hw
*hw
= &adapter
->hw
;
3922 u32 mrqc
= 0, rss_field
= 0, vfmrqc
= 0;
3925 /* Disable indicating checksum in descriptor, enables RSS hash */
3926 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
3927 rxcsum
|= IXGBE_RXCSUM_PCSD
;
3928 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
3930 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
3931 if (adapter
->ring_feature
[RING_F_RSS
].mask
)
3932 mrqc
= IXGBE_MRQC_RSSEN
;
3934 u8 tcs
= adapter
->hw_tcs
;
3936 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3938 mrqc
= IXGBE_MRQC_VMDQRT8TCEN
; /* 8 TCs */
3940 mrqc
= IXGBE_MRQC_VMDQRT4TCEN
; /* 4 TCs */
3941 else if (adapter
->ring_feature
[RING_F_VMDQ
].mask
==
3942 IXGBE_82599_VMDQ_4Q_MASK
)
3943 mrqc
= IXGBE_MRQC_VMDQRSS32EN
;
3945 mrqc
= IXGBE_MRQC_VMDQRSS64EN
;
3947 /* Enable L3/L4 for Tx Switched packets only for X550,
3948 * older devices do not support this feature
3950 if (hw
->mac
.type
>= ixgbe_mac_X550
)
3951 mrqc
|= IXGBE_MRQC_L3L4TXSWEN
;
3954 mrqc
= IXGBE_MRQC_RTRSS8TCEN
;
3956 mrqc
= IXGBE_MRQC_RTRSS4TCEN
;
3958 mrqc
= IXGBE_MRQC_RSSEN
;
3962 /* Perform hash on these packet types */
3963 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV4
|
3964 IXGBE_MRQC_RSS_FIELD_IPV4_TCP
|
3965 IXGBE_MRQC_RSS_FIELD_IPV6
|
3966 IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
3968 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
3969 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV4_UDP
;
3970 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
3971 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
3973 if ((hw
->mac
.type
>= ixgbe_mac_X550
) &&
3974 (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)) {
3975 u16 pool
= adapter
->num_rx_pools
;
3977 /* Enable VF RSS mode */
3978 mrqc
|= IXGBE_MRQC_MULTIPLE_RSS
;
3979 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3981 /* Setup RSS through the VF registers */
3982 ixgbe_setup_vfreta(adapter
);
3983 vfmrqc
= IXGBE_MRQC_RSSEN
;
3984 vfmrqc
|= rss_field
;
3988 IXGBE_PFVFMRQC(VMDQ_P(pool
)),
3991 ixgbe_setup_reta(adapter
);
3993 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3998 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3999 * @adapter: address of board private structure
4000 * @ring: structure containing ring specific data
4002 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
4003 struct ixgbe_ring
*ring
)
4005 struct ixgbe_hw
*hw
= &adapter
->hw
;
4007 u8 reg_idx
= ring
->reg_idx
;
4009 if (!ring_is_rsc_enabled(ring
))
4012 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
4013 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
4015 * we must limit the number of descriptors so that the
4016 * total size of max desc * buf_len is not greater
4019 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
4020 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
4023 #define IXGBE_MAX_RX_DESC_POLL 10
4024 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
4025 struct ixgbe_ring
*ring
)
4027 struct ixgbe_hw
*hw
= &adapter
->hw
;
4028 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
4030 u8 reg_idx
= ring
->reg_idx
;
4032 if (ixgbe_removed(hw
->hw_addr
))
4034 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4035 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
4036 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
4040 usleep_range(1000, 2000);
4041 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
4042 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
4045 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
4046 "the polling period\n", reg_idx
);
4050 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
4051 struct ixgbe_ring
*ring
)
4053 struct ixgbe_hw
*hw
= &adapter
->hw
;
4054 union ixgbe_adv_rx_desc
*rx_desc
;
4055 u64 rdba
= ring
->dma
;
4057 u8 reg_idx
= ring
->reg_idx
;
4059 xdp_rxq_info_unreg_mem_model(&ring
->xdp_rxq
);
4060 ring
->xsk_pool
= ixgbe_xsk_pool(adapter
, ring
);
4061 if (ring
->xsk_pool
) {
4062 WARN_ON(xdp_rxq_info_reg_mem_model(&ring
->xdp_rxq
,
4063 MEM_TYPE_XSK_BUFF_POOL
,
4065 xsk_pool_set_rxq_info(ring
->xsk_pool
, &ring
->xdp_rxq
);
4067 WARN_ON(xdp_rxq_info_reg_mem_model(&ring
->xdp_rxq
,
4068 MEM_TYPE_PAGE_SHARED
, NULL
));
4071 /* disable queue to avoid use of these values while updating state */
4072 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
4073 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
4075 /* write value back with RXDCTL.ENABLE bit cleared */
4076 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
4077 IXGBE_WRITE_FLUSH(hw
);
4079 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
4080 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
4081 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
4082 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
4083 /* Force flushing of IXGBE_RDLEN to prevent MDD */
4084 IXGBE_WRITE_FLUSH(hw
);
4086 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
4087 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
4088 ring
->tail
= adapter
->io_addr
+ IXGBE_RDT(reg_idx
);
4090 ixgbe_configure_srrctl(adapter
, ring
);
4091 ixgbe_configure_rscctl(adapter
, ring
);
4093 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
4095 * enable cache line friendly hardware writes:
4096 * PTHRESH=32 descriptors (half the internal cache),
4097 * this also removes ugly rx_no_buffer_count increment
4098 * HTHRESH=4 descriptors (to minimize latency on fetch)
4099 * WTHRESH=8 burst writeback up to two cache lines
4101 rxdctl
&= ~0x3FFFFF;
4103 #if (PAGE_SIZE < 8192)
4104 /* RXDCTL.RLPML does not work on 82599 */
4105 } else if (hw
->mac
.type
!= ixgbe_mac_82599EB
) {
4106 rxdctl
&= ~(IXGBE_RXDCTL_RLPMLMASK
|
4107 IXGBE_RXDCTL_RLPML_EN
);
4109 /* Limit the maximum frame size so we don't overrun the skb.
4110 * This can happen in SRIOV mode when the MTU of the VF is
4111 * higher than the MTU of the PF.
4113 if (ring_uses_build_skb(ring
) &&
4114 !test_bit(__IXGBE_RX_3K_BUFFER
, &ring
->state
))
4115 rxdctl
|= IXGBE_MAX_2K_FRAME_BUILD_SKB
|
4116 IXGBE_RXDCTL_RLPML_EN
;
4120 ring
->rx_offset
= ixgbe_rx_offset(ring
);
4122 if (ring
->xsk_pool
&& hw
->mac
.type
!= ixgbe_mac_82599EB
) {
4123 u32 xsk_buf_len
= xsk_pool_get_rx_frame_size(ring
->xsk_pool
);
4125 rxdctl
&= ~(IXGBE_RXDCTL_RLPMLMASK
|
4126 IXGBE_RXDCTL_RLPML_EN
);
4127 rxdctl
|= xsk_buf_len
| IXGBE_RXDCTL_RLPML_EN
;
4129 ring
->rx_buf_len
= xsk_buf_len
;
4132 /* initialize rx_buffer_info */
4133 memset(ring
->rx_buffer_info
, 0,
4134 sizeof(struct ixgbe_rx_buffer
) * ring
->count
);
4136 /* initialize Rx descriptor 0 */
4137 rx_desc
= IXGBE_RX_DESC(ring
, 0);
4138 rx_desc
->wb
.upper
.length
= 0;
4140 /* enable receive descriptor ring */
4141 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
4142 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
4144 ixgbe_rx_desc_queue_enable(adapter
, ring
);
4146 ixgbe_alloc_rx_buffers_zc(ring
, ixgbe_desc_unused(ring
));
4148 ixgbe_alloc_rx_buffers(ring
, ixgbe_desc_unused(ring
));
4151 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
4153 struct ixgbe_hw
*hw
= &adapter
->hw
;
4154 int rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
4155 u16 pool
= adapter
->num_rx_pools
;
4157 /* PSRTYPE must be initialized in non 82598 adapters */
4158 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
4159 IXGBE_PSRTYPE_UDPHDR
|
4160 IXGBE_PSRTYPE_IPV4HDR
|
4161 IXGBE_PSRTYPE_L2HDR
|
4162 IXGBE_PSRTYPE_IPV6HDR
;
4164 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4168 psrtype
|= 2u << 29;
4170 psrtype
|= 1u << 29;
4173 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
4176 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
4178 struct ixgbe_hw
*hw
= &adapter
->hw
;
4179 u16 pool
= adapter
->num_rx_pools
;
4180 u32 reg_offset
, vf_shift
, vmolr
;
4181 u32 gcr_ext
, vmdctl
;
4184 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
4187 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
4188 vmdctl
|= IXGBE_VMD_CTL_VMDQ_EN
;
4189 vmdctl
&= ~IXGBE_VT_CTL_POOL_MASK
;
4190 vmdctl
|= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT
;
4191 vmdctl
|= IXGBE_VT_CTL_REPLEN
;
4192 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
);
4194 /* accept untagged packets until a vlan tag is
4195 * specifically set for the VMDQ queue/pool
4197 vmolr
= IXGBE_VMOLR_AUPE
;
4199 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(VMDQ_P(pool
)), vmolr
);
4201 vf_shift
= VMDQ_P(0) % 32;
4202 reg_offset
= (VMDQ_P(0) >= 32) ? 1 : 0;
4204 /* Enable only the PF's pool for Tx/Rx */
4205 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), GENMASK(31, vf_shift
));
4206 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), reg_offset
- 1);
4207 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), GENMASK(31, vf_shift
));
4208 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), reg_offset
- 1);
4209 if (adapter
->bridge_mode
== BRIDGE_MODE_VEB
)
4210 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
4212 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4213 hw
->mac
.ops
.set_vmdq(hw
, 0, VMDQ_P(0));
4215 /* clear VLAN promisc flag so VFTA will be updated if necessary */
4216 adapter
->flags2
&= ~IXGBE_FLAG2_VLAN_PROMISC
;
4219 * Set up VF register offsets for selected VT Mode,
4220 * i.e. 32 or 64 VFs for SR-IOV
4222 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
4223 case IXGBE_82599_VMDQ_8Q_MASK
:
4224 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_16
;
4226 case IXGBE_82599_VMDQ_4Q_MASK
:
4227 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_32
;
4230 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_64
;
4234 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
4236 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
4237 /* configure spoof checking */
4238 ixgbe_ndo_set_vf_spoofchk(adapter
->netdev
, i
,
4239 adapter
->vfinfo
[i
].spoofchk_enabled
);
4241 /* Enable/Disable RSS query feature */
4242 ixgbe_ndo_set_vf_rss_query_en(adapter
->netdev
, i
,
4243 adapter
->vfinfo
[i
].rss_query_enabled
);
4247 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
4249 struct ixgbe_hw
*hw
= &adapter
->hw
;
4250 struct net_device
*netdev
= adapter
->netdev
;
4251 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4252 struct ixgbe_ring
*rx_ring
;
4257 /* adjust max frame to be able to do baby jumbo for FCoE */
4258 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
4259 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
4260 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
4262 #endif /* IXGBE_FCOE */
4264 /* adjust max frame to be at least the size of a standard frame */
4265 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
4266 max_frame
= (ETH_FRAME_LEN
+ ETH_FCS_LEN
);
4268 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
4269 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
4270 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
4271 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
4273 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
4276 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
4277 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4278 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
4279 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
4282 * Setup the HW Rx Head and Tail Descriptor Pointers and
4283 * the Base and Length of the Rx Descriptor Ring
4285 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4286 rx_ring
= adapter
->rx_ring
[i
];
4288 clear_ring_rsc_enabled(rx_ring
);
4289 clear_bit(__IXGBE_RX_3K_BUFFER
, &rx_ring
->state
);
4290 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED
, &rx_ring
->state
);
4292 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
4293 set_ring_rsc_enabled(rx_ring
);
4295 if (test_bit(__IXGBE_RX_FCOE
, &rx_ring
->state
))
4296 set_bit(__IXGBE_RX_3K_BUFFER
, &rx_ring
->state
);
4298 if (adapter
->flags2
& IXGBE_FLAG2_RX_LEGACY
)
4301 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED
, &rx_ring
->state
);
4303 #if (PAGE_SIZE < 8192)
4304 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
4305 set_bit(__IXGBE_RX_3K_BUFFER
, &rx_ring
->state
);
4307 if (IXGBE_2K_TOO_SMALL_WITH_PADDING
||
4308 (max_frame
> (ETH_FRAME_LEN
+ ETH_FCS_LEN
)))
4309 set_bit(__IXGBE_RX_3K_BUFFER
, &rx_ring
->state
);
4314 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
4316 struct ixgbe_hw
*hw
= &adapter
->hw
;
4317 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
4319 switch (hw
->mac
.type
) {
4320 case ixgbe_mac_82598EB
:
4322 * For VMDq support of different descriptor types or
4323 * buffer sizes through the use of multiple SRRCTL
4324 * registers, RDRXCTL.MVMEN must be set to 1
4326 * also, the manual doesn't mention it clearly but DCA hints
4327 * will only use queue 0's tags unless this bit is set. Side
4328 * effects of setting this bit are only that SRRCTL must be
4329 * fully programmed [0..15]
4331 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
4333 case ixgbe_mac_X550
:
4334 case ixgbe_mac_X550EM_x
:
4335 case ixgbe_mac_x550em_a
:
4336 if (adapter
->num_vfs
)
4337 rdrxctl
|= IXGBE_RDRXCTL_PSP
;
4339 case ixgbe_mac_82599EB
:
4340 case ixgbe_mac_X540
:
4341 /* Disable RSC for ACK packets */
4342 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
4343 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
4344 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
4345 /* hardware requires some bits to be set by default */
4346 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
4347 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
4350 /* We should do nothing since we don't know this hardware */
4354 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
4358 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4359 * @adapter: board private structure
4361 * Configure the Rx unit of the MAC after a reset.
4363 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
4365 struct ixgbe_hw
*hw
= &adapter
->hw
;
4369 /* disable receives while setting up the descriptors */
4370 hw
->mac
.ops
.disable_rx(hw
);
4372 ixgbe_setup_psrtype(adapter
);
4373 ixgbe_setup_rdrxctl(adapter
);
4376 rfctl
= IXGBE_READ_REG(hw
, IXGBE_RFCTL
);
4377 rfctl
&= ~IXGBE_RFCTL_RSC_DIS
;
4378 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
))
4379 rfctl
|= IXGBE_RFCTL_RSC_DIS
;
4381 /* disable NFS filtering */
4382 rfctl
|= (IXGBE_RFCTL_NFSW_DIS
| IXGBE_RFCTL_NFSR_DIS
);
4383 IXGBE_WRITE_REG(hw
, IXGBE_RFCTL
, rfctl
);
4385 /* Program registers for the distribution of queues */
4386 ixgbe_setup_mrqc(adapter
);
4388 /* set_rx_buffer_len must be called before ring initialization */
4389 ixgbe_set_rx_buffer_len(adapter
);
4392 * Setup the HW Rx Head and Tail Descriptor Pointers and
4393 * the Base and Length of the Rx Descriptor Ring
4395 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4396 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
4398 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
4399 /* disable drop enable for 82598 parts */
4400 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4401 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
4403 /* enable all receives */
4404 rxctrl
|= IXGBE_RXCTRL_RXEN
;
4405 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
4408 static int ixgbe_vlan_rx_add_vid(struct net_device
*netdev
,
4409 __be16 proto
, u16 vid
)
4411 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4412 struct ixgbe_hw
*hw
= &adapter
->hw
;
4414 /* add VID to filter table */
4415 if (!vid
|| !(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
4416 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, VMDQ_P(0), true, !!vid
);
4418 set_bit(vid
, adapter
->active_vlans
);
4423 static int ixgbe_find_vlvf_entry(struct ixgbe_hw
*hw
, u32 vlan
)
4428 /* short cut the special case */
4432 /* Search for the vlan id in the VLVF entries */
4433 for (idx
= IXGBE_VLVF_ENTRIES
; --idx
;) {
4434 vlvf
= IXGBE_READ_REG(hw
, IXGBE_VLVF(idx
));
4435 if ((vlvf
& VLAN_VID_MASK
) == vlan
)
4442 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter
*adapter
, u32 vid
)
4444 struct ixgbe_hw
*hw
= &adapter
->hw
;
4448 idx
= ixgbe_find_vlvf_entry(hw
, vid
);
4452 /* See if any other pools are set for this VLAN filter
4453 * entry other than the PF.
4455 word
= idx
* 2 + (VMDQ_P(0) / 32);
4456 bits
= ~BIT(VMDQ_P(0) % 32);
4457 bits
&= IXGBE_READ_REG(hw
, IXGBE_VLVFB(word
));
4459 /* Disable the filter so this falls into the default pool. */
4460 if (!bits
&& !IXGBE_READ_REG(hw
, IXGBE_VLVFB(word
^ 1))) {
4461 if (!(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
4462 IXGBE_WRITE_REG(hw
, IXGBE_VLVFB(word
), 0);
4463 IXGBE_WRITE_REG(hw
, IXGBE_VLVF(idx
), 0);
4467 static int ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
,
4468 __be16 proto
, u16 vid
)
4470 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4471 struct ixgbe_hw
*hw
= &adapter
->hw
;
4473 /* remove VID from filter table */
4474 if (vid
&& !(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
4475 hw
->mac
.ops
.set_vfta(hw
, vid
, VMDQ_P(0), false, true);
4477 clear_bit(vid
, adapter
->active_vlans
);
4483 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4484 * @adapter: driver data
4486 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter
*adapter
)
4488 struct ixgbe_hw
*hw
= &adapter
->hw
;
4492 switch (hw
->mac
.type
) {
4493 case ixgbe_mac_82598EB
:
4494 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4495 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
4496 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4498 case ixgbe_mac_82599EB
:
4499 case ixgbe_mac_X540
:
4500 case ixgbe_mac_X550
:
4501 case ixgbe_mac_X550EM_x
:
4502 case ixgbe_mac_x550em_a
:
4503 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4504 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
4506 if (!netif_is_ixgbe(ring
->netdev
))
4510 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
4511 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
4512 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
4521 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4522 * @adapter: driver data
4524 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter
*adapter
)
4526 struct ixgbe_hw
*hw
= &adapter
->hw
;
4530 switch (hw
->mac
.type
) {
4531 case ixgbe_mac_82598EB
:
4532 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4533 vlnctrl
|= IXGBE_VLNCTRL_VME
;
4534 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4536 case ixgbe_mac_82599EB
:
4537 case ixgbe_mac_X540
:
4538 case ixgbe_mac_X550
:
4539 case ixgbe_mac_X550EM_x
:
4540 case ixgbe_mac_x550em_a
:
4541 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4542 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
4544 if (!netif_is_ixgbe(ring
->netdev
))
4548 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
4549 vlnctrl
|= IXGBE_RXDCTL_VME
;
4550 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
4558 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter
*adapter
)
4560 struct ixgbe_hw
*hw
= &adapter
->hw
;
4563 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4565 if (adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
) {
4566 /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4567 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
4568 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4570 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
4571 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4575 /* Nothing to do for 82598 */
4576 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4579 /* We are already in VLAN promisc, nothing to do */
4580 if (adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
)
4583 /* Set flag so we don't redo unnecessary work */
4584 adapter
->flags2
|= IXGBE_FLAG2_VLAN_PROMISC
;
4586 /* Add PF to all active pools */
4587 for (i
= IXGBE_VLVF_ENTRIES
; --i
;) {
4588 u32 reg_offset
= IXGBE_VLVFB(i
* 2 + VMDQ_P(0) / 32);
4589 u32 vlvfb
= IXGBE_READ_REG(hw
, reg_offset
);
4591 vlvfb
|= BIT(VMDQ_P(0) % 32);
4592 IXGBE_WRITE_REG(hw
, reg_offset
, vlvfb
);
4595 /* Set all bits in the VLAN filter table array */
4596 for (i
= hw
->mac
.vft_size
; i
--;)
4597 IXGBE_WRITE_REG(hw
, IXGBE_VFTA(i
), ~0U);
4600 #define VFTA_BLOCK_SIZE 8
4601 static void ixgbe_scrub_vfta(struct ixgbe_adapter
*adapter
, u32 vfta_offset
)
4603 struct ixgbe_hw
*hw
= &adapter
->hw
;
4604 u32 vfta
[VFTA_BLOCK_SIZE
] = { 0 };
4605 u32 vid_start
= vfta_offset
* 32;
4606 u32 vid_end
= vid_start
+ (VFTA_BLOCK_SIZE
* 32);
4607 u32 i
, vid
, word
, bits
;
4609 for (i
= IXGBE_VLVF_ENTRIES
; --i
;) {
4610 u32 vlvf
= IXGBE_READ_REG(hw
, IXGBE_VLVF(i
));
4612 /* pull VLAN ID from VLVF */
4613 vid
= vlvf
& VLAN_VID_MASK
;
4615 /* only concern outselves with a certain range */
4616 if (vid
< vid_start
|| vid
>= vid_end
)
4620 /* record VLAN ID in VFTA */
4621 vfta
[(vid
- vid_start
) / 32] |= BIT(vid
% 32);
4623 /* if PF is part of this then continue */
4624 if (test_bit(vid
, adapter
->active_vlans
))
4628 /* remove PF from the pool */
4629 word
= i
* 2 + VMDQ_P(0) / 32;
4630 bits
= ~BIT(VMDQ_P(0) % 32);
4631 bits
&= IXGBE_READ_REG(hw
, IXGBE_VLVFB(word
));
4632 IXGBE_WRITE_REG(hw
, IXGBE_VLVFB(word
), bits
);
4635 /* extract values from active_vlans and write back to VFTA */
4636 for (i
= VFTA_BLOCK_SIZE
; i
--;) {
4637 vid
= (vfta_offset
+ i
) * 32;
4638 word
= vid
/ BITS_PER_LONG
;
4639 bits
= vid
% BITS_PER_LONG
;
4641 vfta
[i
] |= adapter
->active_vlans
[word
] >> bits
;
4643 IXGBE_WRITE_REG(hw
, IXGBE_VFTA(vfta_offset
+ i
), vfta
[i
]);
4647 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter
*adapter
)
4649 struct ixgbe_hw
*hw
= &adapter
->hw
;
4652 /* Set VLAN filtering to enabled */
4653 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4654 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
4655 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4657 if (!(adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
) ||
4658 hw
->mac
.type
== ixgbe_mac_82598EB
)
4661 /* We are not in VLAN promisc, nothing to do */
4662 if (!(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
4665 /* Set flag so we don't redo unnecessary work */
4666 adapter
->flags2
&= ~IXGBE_FLAG2_VLAN_PROMISC
;
4668 for (i
= 0; i
< hw
->mac
.vft_size
; i
+= VFTA_BLOCK_SIZE
)
4669 ixgbe_scrub_vfta(adapter
, i
);
4672 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
4676 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), 0);
4678 for_each_set_bit_from(vid
, adapter
->active_vlans
, VLAN_N_VID
)
4679 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
4683 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4684 * @netdev: network interface device structure
4686 * Writes multicast address list to the MTA hash table.
4687 * Returns: -ENOMEM on failure
4688 * 0 on no addresses written
4689 * X on writing X addresses to MTA
4691 static int ixgbe_write_mc_addr_list(struct net_device
*netdev
)
4693 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4694 struct ixgbe_hw
*hw
= &adapter
->hw
;
4696 if (!netif_running(netdev
))
4699 if (hw
->mac
.ops
.update_mc_addr_list
)
4700 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
4704 #ifdef CONFIG_PCI_IOV
4705 ixgbe_restore_vf_multicasts(adapter
);
4708 return netdev_mc_count(netdev
);
4711 #ifdef CONFIG_PCI_IOV
4712 void ixgbe_full_sync_mac_table(struct ixgbe_adapter
*adapter
)
4714 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4715 struct ixgbe_hw
*hw
= &adapter
->hw
;
4718 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4719 mac_table
->state
&= ~IXGBE_MAC_STATE_MODIFIED
;
4721 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
)
4722 hw
->mac
.ops
.set_rar(hw
, i
,
4727 hw
->mac
.ops
.clear_rar(hw
, i
);
4732 static void ixgbe_sync_mac_table(struct ixgbe_adapter
*adapter
)
4734 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4735 struct ixgbe_hw
*hw
= &adapter
->hw
;
4738 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4739 if (!(mac_table
->state
& IXGBE_MAC_STATE_MODIFIED
))
4742 mac_table
->state
&= ~IXGBE_MAC_STATE_MODIFIED
;
4744 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
)
4745 hw
->mac
.ops
.set_rar(hw
, i
,
4750 hw
->mac
.ops
.clear_rar(hw
, i
);
4754 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter
*adapter
)
4756 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4757 struct ixgbe_hw
*hw
= &adapter
->hw
;
4760 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4761 mac_table
->state
|= IXGBE_MAC_STATE_MODIFIED
;
4762 mac_table
->state
&= ~IXGBE_MAC_STATE_IN_USE
;
4765 ixgbe_sync_mac_table(adapter
);
4768 static int ixgbe_available_rars(struct ixgbe_adapter
*adapter
, u16 pool
)
4770 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4771 struct ixgbe_hw
*hw
= &adapter
->hw
;
4774 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4775 /* do not count default RAR as available */
4776 if (mac_table
->state
& IXGBE_MAC_STATE_DEFAULT
)
4779 /* only count unused and addresses that belong to us */
4780 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
) {
4781 if (mac_table
->pool
!= pool
)
4791 /* this function destroys the first RAR entry */
4792 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter
*adapter
)
4794 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4795 struct ixgbe_hw
*hw
= &adapter
->hw
;
4797 memcpy(&mac_table
->addr
, hw
->mac
.addr
, ETH_ALEN
);
4798 mac_table
->pool
= VMDQ_P(0);
4800 mac_table
->state
= IXGBE_MAC_STATE_DEFAULT
| IXGBE_MAC_STATE_IN_USE
;
4802 hw
->mac
.ops
.set_rar(hw
, 0, mac_table
->addr
, mac_table
->pool
,
4806 int ixgbe_add_mac_filter(struct ixgbe_adapter
*adapter
,
4807 const u8
*addr
, u16 pool
)
4809 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4810 struct ixgbe_hw
*hw
= &adapter
->hw
;
4813 if (is_zero_ether_addr(addr
))
4816 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4817 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
)
4820 ether_addr_copy(mac_table
->addr
, addr
);
4821 mac_table
->pool
= pool
;
4823 mac_table
->state
|= IXGBE_MAC_STATE_MODIFIED
|
4824 IXGBE_MAC_STATE_IN_USE
;
4826 ixgbe_sync_mac_table(adapter
);
4834 int ixgbe_del_mac_filter(struct ixgbe_adapter
*adapter
,
4835 const u8
*addr
, u16 pool
)
4837 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4838 struct ixgbe_hw
*hw
= &adapter
->hw
;
4841 if (is_zero_ether_addr(addr
))
4844 /* search table for addr, if found clear IN_USE flag and sync */
4845 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4846 /* we can only delete an entry if it is in use */
4847 if (!(mac_table
->state
& IXGBE_MAC_STATE_IN_USE
))
4849 /* we only care about entries that belong to the given pool */
4850 if (mac_table
->pool
!= pool
)
4852 /* we only care about a specific MAC address */
4853 if (!ether_addr_equal(addr
, mac_table
->addr
))
4856 mac_table
->state
|= IXGBE_MAC_STATE_MODIFIED
;
4857 mac_table
->state
&= ~IXGBE_MAC_STATE_IN_USE
;
4859 ixgbe_sync_mac_table(adapter
);
4867 static int ixgbe_uc_sync(struct net_device
*netdev
, const unsigned char *addr
)
4869 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4872 ret
= ixgbe_add_mac_filter(adapter
, addr
, VMDQ_P(0));
4874 return min_t(int, ret
, 0);
4877 static int ixgbe_uc_unsync(struct net_device
*netdev
, const unsigned char *addr
)
4879 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4881 ixgbe_del_mac_filter(adapter
, addr
, VMDQ_P(0));
4887 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4888 * @netdev: network interface device structure
4890 * The set_rx_method entry point is called whenever the unicast/multicast
4891 * address list or the network interface flags are updated. This routine is
4892 * responsible for configuring the hardware for proper unicast, multicast and
4895 void ixgbe_set_rx_mode(struct net_device
*netdev
)
4897 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4898 struct ixgbe_hw
*hw
= &adapter
->hw
;
4899 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
4900 netdev_features_t features
= netdev
->features
;
4903 /* Check for Promiscuous and All Multicast modes */
4904 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4906 /* set all bits that we expect to always be set */
4907 fctrl
&= ~IXGBE_FCTRL_SBP
; /* disable store-bad-packets */
4908 fctrl
|= IXGBE_FCTRL_BAM
;
4909 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
4910 fctrl
|= IXGBE_FCTRL_PMCF
;
4912 /* clear the bits we are changing the status of */
4913 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
4914 if (netdev
->flags
& IFF_PROMISC
) {
4915 hw
->addr_ctrl
.user_set_promisc
= true;
4916 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
4917 vmolr
|= IXGBE_VMOLR_MPE
;
4918 features
&= ~NETIF_F_HW_VLAN_CTAG_FILTER
;
4920 if (netdev
->flags
& IFF_ALLMULTI
) {
4921 fctrl
|= IXGBE_FCTRL_MPE
;
4922 vmolr
|= IXGBE_VMOLR_MPE
;
4924 hw
->addr_ctrl
.user_set_promisc
= false;
4928 * Write addresses to available RAR registers, if there is not
4929 * sufficient space to store all the addresses then enable
4930 * unicast promiscuous mode
4932 if (__dev_uc_sync(netdev
, ixgbe_uc_sync
, ixgbe_uc_unsync
)) {
4933 fctrl
|= IXGBE_FCTRL_UPE
;
4934 vmolr
|= IXGBE_VMOLR_ROPE
;
4937 /* Write addresses to the MTA, if the attempt fails
4938 * then we should just turn on promiscuous mode so
4939 * that we can at least receive multicast traffic
4941 count
= ixgbe_write_mc_addr_list(netdev
);
4943 fctrl
|= IXGBE_FCTRL_MPE
;
4944 vmolr
|= IXGBE_VMOLR_MPE
;
4946 vmolr
|= IXGBE_VMOLR_ROMPE
;
4949 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
4950 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(VMDQ_P(0))) &
4951 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
4953 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(VMDQ_P(0)), vmolr
);
4956 /* This is useful for sniffing bad packets. */
4957 if (features
& NETIF_F_RXALL
) {
4958 /* UPE and MPE will be handled by normal PROMISC logic
4959 * in e1000e_set_rx_mode */
4960 fctrl
|= (IXGBE_FCTRL_SBP
| /* Receive bad packets */
4961 IXGBE_FCTRL_BAM
| /* RX All Bcast Pkts */
4962 IXGBE_FCTRL_PMCF
); /* RX All MAC Ctrl Pkts */
4964 fctrl
&= ~(IXGBE_FCTRL_DPF
);
4965 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4968 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
4970 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
4971 ixgbe_vlan_strip_enable(adapter
);
4973 ixgbe_vlan_strip_disable(adapter
);
4975 if (features
& NETIF_F_HW_VLAN_CTAG_FILTER
)
4976 ixgbe_vlan_promisc_disable(adapter
);
4978 ixgbe_vlan_promisc_enable(adapter
);
4981 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
4985 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++)
4986 napi_enable(&adapter
->q_vector
[q_idx
]->napi
);
4989 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
4993 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++)
4994 napi_disable(&adapter
->q_vector
[q_idx
]->napi
);
4997 static int ixgbe_udp_tunnel_sync(struct net_device
*dev
, unsigned int table
)
4999 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
5000 struct ixgbe_hw
*hw
= &adapter
->hw
;
5001 struct udp_tunnel_info ti
;
5003 udp_tunnel_nic_get_port(dev
, table
, 0, &ti
);
5004 if (ti
.type
== UDP_TUNNEL_TYPE_VXLAN
)
5005 adapter
->vxlan_port
= ti
.port
;
5007 adapter
->geneve_port
= ti
.port
;
5009 IXGBE_WRITE_REG(hw
, IXGBE_VXLANCTRL
,
5010 ntohs(adapter
->vxlan_port
) |
5011 ntohs(adapter
->geneve_port
) <<
5012 IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT
);
5016 static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550
= {
5017 .sync_table
= ixgbe_udp_tunnel_sync
,
5018 .flags
= UDP_TUNNEL_NIC_INFO_IPV4_ONLY
,
5020 { .n_entries
= 1, .tunnel_types
= UDP_TUNNEL_TYPE_VXLAN
, },
5024 static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550em_a
= {
5025 .sync_table
= ixgbe_udp_tunnel_sync
,
5026 .flags
= UDP_TUNNEL_NIC_INFO_IPV4_ONLY
,
5028 { .n_entries
= 1, .tunnel_types
= UDP_TUNNEL_TYPE_VXLAN
, },
5029 { .n_entries
= 1, .tunnel_types
= UDP_TUNNEL_TYPE_GENEVE
, },
5033 #ifdef CONFIG_IXGBE_DCB
5035 * ixgbe_configure_dcb - Configure DCB hardware
5036 * @adapter: ixgbe adapter struct
5038 * This is called by the driver on open to configure the DCB hardware.
5039 * This is also called by the gennetlink interface when reconfiguring
5042 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
5044 struct ixgbe_hw
*hw
= &adapter
->hw
;
5045 int max_frame
= adapter
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
5047 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
5048 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5049 netif_set_gso_max_size(adapter
->netdev
, 65536);
5053 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5054 netif_set_gso_max_size(adapter
->netdev
, 32768);
5057 if (adapter
->netdev
->features
& NETIF_F_FCOE_MTU
)
5058 max_frame
= max(max_frame
, IXGBE_FCOE_JUMBO_FRAME_SIZE
);
5061 /* reconfigure the hardware */
5062 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
) {
5063 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
5065 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
5067 ixgbe_dcb_hw_config(hw
, &adapter
->dcb_cfg
);
5068 } else if (adapter
->ixgbe_ieee_ets
&& adapter
->ixgbe_ieee_pfc
) {
5069 ixgbe_dcb_hw_ets(&adapter
->hw
,
5070 adapter
->ixgbe_ieee_ets
,
5072 ixgbe_dcb_hw_pfc_config(&adapter
->hw
,
5073 adapter
->ixgbe_ieee_pfc
->pfc_en
,
5074 adapter
->ixgbe_ieee_ets
->prio_tc
);
5077 /* Enable RSS Hash per TC */
5078 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
5080 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
- 1;
5087 /* write msb to all 8 TCs in one write */
5088 IXGBE_WRITE_REG(hw
, IXGBE_RQTC
, msb
* 0x11111111);
5093 /* Additional bittime to account for IXGBE framing */
5094 #define IXGBE_ETH_FRAMING 20
5097 * ixgbe_hpbthresh - calculate high water mark for flow control
5099 * @adapter: board private structure to calculate for
5100 * @pb: packet buffer to calculate
5102 static int ixgbe_hpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
5104 struct ixgbe_hw
*hw
= &adapter
->hw
;
5105 struct net_device
*dev
= adapter
->netdev
;
5106 int link
, tc
, kb
, marker
;
5109 /* Calculate max LAN frame size */
5110 tc
= link
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ IXGBE_ETH_FRAMING
;
5113 /* FCoE traffic class uses FCOE jumbo frames */
5114 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
5115 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
5116 (pb
== ixgbe_fcoe_get_tc(adapter
)))
5117 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
5120 /* Calculate delay value for device */
5121 switch (hw
->mac
.type
) {
5122 case ixgbe_mac_X540
:
5123 case ixgbe_mac_X550
:
5124 case ixgbe_mac_X550EM_x
:
5125 case ixgbe_mac_x550em_a
:
5126 dv_id
= IXGBE_DV_X540(link
, tc
);
5129 dv_id
= IXGBE_DV(link
, tc
);
5133 /* Loopback switch introduces additional latency */
5134 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
5135 dv_id
+= IXGBE_B2BT(tc
);
5137 /* Delay value is calculated in bit times convert to KB */
5138 kb
= IXGBE_BT2KB(dv_id
);
5139 rx_pba
= IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(pb
)) >> 10;
5141 marker
= rx_pba
- kb
;
5143 /* It is possible that the packet buffer is not large enough
5144 * to provide required headroom. In this case throw an error
5145 * to user and a do the best we can.
5148 e_warn(drv
, "Packet Buffer(%i) can not provide enough"
5149 "headroom to support flow control."
5150 "Decrease MTU or number of traffic classes\n", pb
);
5158 * ixgbe_lpbthresh - calculate low water mark for for flow control
5160 * @adapter: board private structure to calculate for
5161 * @pb: packet buffer to calculate
5163 static int ixgbe_lpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
5165 struct ixgbe_hw
*hw
= &adapter
->hw
;
5166 struct net_device
*dev
= adapter
->netdev
;
5170 /* Calculate max LAN frame size */
5171 tc
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
5174 /* FCoE traffic class uses FCOE jumbo frames */
5175 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
5176 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
5177 (pb
== netdev_get_prio_tc_map(dev
, adapter
->fcoe
.up
)))
5178 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
5181 /* Calculate delay value for device */
5182 switch (hw
->mac
.type
) {
5183 case ixgbe_mac_X540
:
5184 case ixgbe_mac_X550
:
5185 case ixgbe_mac_X550EM_x
:
5186 case ixgbe_mac_x550em_a
:
5187 dv_id
= IXGBE_LOW_DV_X540(tc
);
5190 dv_id
= IXGBE_LOW_DV(tc
);
5194 /* Delay value is calculated in bit times convert to KB */
5195 return IXGBE_BT2KB(dv_id
);
5199 * ixgbe_pbthresh_setup - calculate and setup high low water marks
5201 static void ixgbe_pbthresh_setup(struct ixgbe_adapter
*adapter
)
5203 struct ixgbe_hw
*hw
= &adapter
->hw
;
5204 int num_tc
= adapter
->hw_tcs
;
5210 for (i
= 0; i
< num_tc
; i
++) {
5211 hw
->fc
.high_water
[i
] = ixgbe_hpbthresh(adapter
, i
);
5212 hw
->fc
.low_water
[i
] = ixgbe_lpbthresh(adapter
, i
);
5214 /* Low water marks must not be larger than high water marks */
5215 if (hw
->fc
.low_water
[i
] > hw
->fc
.high_water
[i
])
5216 hw
->fc
.low_water
[i
] = 0;
5219 for (; i
< MAX_TRAFFIC_CLASS
; i
++)
5220 hw
->fc
.high_water
[i
] = 0;
5223 static void ixgbe_configure_pb(struct ixgbe_adapter
*adapter
)
5225 struct ixgbe_hw
*hw
= &adapter
->hw
;
5227 u8 tc
= adapter
->hw_tcs
;
5229 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
5230 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
5231 hdrm
= 32 << adapter
->fdir_pballoc
;
5235 hw
->mac
.ops
.set_rxpba(hw
, tc
, hdrm
, PBA_STRATEGY_EQUAL
);
5236 ixgbe_pbthresh_setup(adapter
);
5239 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter
*adapter
)
5241 struct ixgbe_hw
*hw
= &adapter
->hw
;
5242 struct hlist_node
*node2
;
5243 struct ixgbe_fdir_filter
*filter
;
5246 spin_lock(&adapter
->fdir_perfect_lock
);
5248 if (!hlist_empty(&adapter
->fdir_filter_list
))
5249 ixgbe_fdir_set_input_mask_82599(hw
, &adapter
->fdir_mask
);
5251 hlist_for_each_entry_safe(filter
, node2
,
5252 &adapter
->fdir_filter_list
, fdir_node
) {
5253 if (filter
->action
== IXGBE_FDIR_DROP_QUEUE
) {
5254 queue
= IXGBE_FDIR_DROP_QUEUE
;
5256 u32 ring
= ethtool_get_flow_spec_ring(filter
->action
);
5257 u8 vf
= ethtool_get_flow_spec_ring_vf(filter
->action
);
5259 if (!vf
&& (ring
>= adapter
->num_rx_queues
)) {
5260 e_err(drv
, "FDIR restore failed without VF, ring: %u\n",
5264 ((vf
> adapter
->num_vfs
) ||
5265 ring
>= adapter
->num_rx_queues_per_pool
)) {
5266 e_err(drv
, "FDIR restore failed with VF, vf: %hhu, ring: %u\n",
5271 /* Map the ring onto the absolute queue index */
5273 queue
= adapter
->rx_ring
[ring
]->reg_idx
;
5276 adapter
->num_rx_queues_per_pool
) + ring
;
5279 ixgbe_fdir_write_perfect_filter_82599(hw
,
5280 &filter
->filter
, filter
->sw_idx
, queue
);
5283 spin_unlock(&adapter
->fdir_perfect_lock
);
5287 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5288 * @rx_ring: ring to free buffers from
5290 static void ixgbe_clean_rx_ring(struct ixgbe_ring
*rx_ring
)
5292 u16 i
= rx_ring
->next_to_clean
;
5293 struct ixgbe_rx_buffer
*rx_buffer
= &rx_ring
->rx_buffer_info
[i
];
5295 if (rx_ring
->xsk_pool
) {
5296 ixgbe_xsk_clean_rx_ring(rx_ring
);
5300 /* Free all the Rx ring sk_buffs */
5301 while (i
!= rx_ring
->next_to_alloc
) {
5302 if (rx_buffer
->skb
) {
5303 struct sk_buff
*skb
= rx_buffer
->skb
;
5304 if (IXGBE_CB(skb
)->page_released
)
5305 dma_unmap_page_attrs(rx_ring
->dev
,
5307 ixgbe_rx_pg_size(rx_ring
),
5313 /* Invalidate cache lines that may have been written to by
5314 * device so that we avoid corrupting memory.
5316 dma_sync_single_range_for_cpu(rx_ring
->dev
,
5318 rx_buffer
->page_offset
,
5319 ixgbe_rx_bufsz(rx_ring
),
5322 /* free resources associated with mapping */
5323 dma_unmap_page_attrs(rx_ring
->dev
, rx_buffer
->dma
,
5324 ixgbe_rx_pg_size(rx_ring
),
5327 __page_frag_cache_drain(rx_buffer
->page
,
5328 rx_buffer
->pagecnt_bias
);
5332 if (i
== rx_ring
->count
) {
5334 rx_buffer
= rx_ring
->rx_buffer_info
;
5339 rx_ring
->next_to_alloc
= 0;
5340 rx_ring
->next_to_clean
= 0;
5341 rx_ring
->next_to_use
= 0;
5344 static int ixgbe_fwd_ring_up(struct ixgbe_adapter
*adapter
,
5345 struct ixgbe_fwd_adapter
*accel
)
5347 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
5348 int num_tc
= netdev_get_num_tc(adapter
->netdev
);
5349 struct net_device
*vdev
= accel
->netdev
;
5352 baseq
= accel
->pool
* adapter
->num_rx_queues_per_pool
;
5353 netdev_dbg(vdev
, "pool %i:%i queues %i:%i\n",
5354 accel
->pool
, adapter
->num_rx_pools
,
5355 baseq
, baseq
+ adapter
->num_rx_queues_per_pool
);
5357 accel
->rx_base_queue
= baseq
;
5358 accel
->tx_base_queue
= baseq
;
5360 /* record configuration for macvlan interface in vdev */
5361 for (i
= 0; i
< num_tc
; i
++)
5362 netdev_bind_sb_channel_queue(adapter
->netdev
, vdev
,
5363 i
, rss_i
, baseq
+ (rss_i
* i
));
5365 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++)
5366 adapter
->rx_ring
[baseq
+ i
]->netdev
= vdev
;
5368 /* Guarantee all rings are updated before we update the
5369 * MAC address filter.
5373 /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5374 * need to only treat it as an error value if it is negative.
5376 err
= ixgbe_add_mac_filter(adapter
, vdev
->dev_addr
,
5377 VMDQ_P(accel
->pool
));
5381 /* if we cannot add the MAC rule then disable the offload */
5382 macvlan_release_l2fw_offload(vdev
);
5384 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++)
5385 adapter
->rx_ring
[baseq
+ i
]->netdev
= NULL
;
5387 netdev_err(vdev
, "L2FW offload disabled due to L2 filter error\n");
5389 /* unbind the queues and drop the subordinate channel config */
5390 netdev_unbind_sb_channel(adapter
->netdev
, vdev
);
5391 netdev_set_sb_channel(vdev
, 0);
5393 clear_bit(accel
->pool
, adapter
->fwd_bitmask
);
5399 static int ixgbe_macvlan_up(struct net_device
*vdev
,
5400 struct netdev_nested_priv
*priv
)
5402 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)priv
->data
;
5403 struct ixgbe_fwd_adapter
*accel
;
5405 if (!netif_is_macvlan(vdev
))
5408 accel
= macvlan_accel_priv(vdev
);
5412 ixgbe_fwd_ring_up(adapter
, accel
);
5417 static void ixgbe_configure_dfwd(struct ixgbe_adapter
*adapter
)
5419 struct netdev_nested_priv priv
= {
5420 .data
= (void *)adapter
,
5423 netdev_walk_all_upper_dev_rcu(adapter
->netdev
,
5424 ixgbe_macvlan_up
, &priv
);
5427 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
5429 struct ixgbe_hw
*hw
= &adapter
->hw
;
5431 ixgbe_configure_pb(adapter
);
5432 #ifdef CONFIG_IXGBE_DCB
5433 ixgbe_configure_dcb(adapter
);
5436 * We must restore virtualization before VLANs or else
5437 * the VLVF registers will not be populated
5439 ixgbe_configure_virtualization(adapter
);
5441 ixgbe_set_rx_mode(adapter
->netdev
);
5442 ixgbe_restore_vlan(adapter
);
5443 ixgbe_ipsec_restore(adapter
);
5445 switch (hw
->mac
.type
) {
5446 case ixgbe_mac_82599EB
:
5447 case ixgbe_mac_X540
:
5448 hw
->mac
.ops
.disable_rx_buff(hw
);
5454 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
5455 ixgbe_init_fdir_signature_82599(&adapter
->hw
,
5456 adapter
->fdir_pballoc
);
5457 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
5458 ixgbe_init_fdir_perfect_82599(&adapter
->hw
,
5459 adapter
->fdir_pballoc
);
5460 ixgbe_fdir_filter_restore(adapter
);
5463 switch (hw
->mac
.type
) {
5464 case ixgbe_mac_82599EB
:
5465 case ixgbe_mac_X540
:
5466 hw
->mac
.ops
.enable_rx_buff(hw
);
5472 #ifdef CONFIG_IXGBE_DCA
5474 if (adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
)
5475 ixgbe_setup_dca(adapter
);
5476 #endif /* CONFIG_IXGBE_DCA */
5479 /* configure FCoE L2 filters, redirection table, and Rx control */
5480 ixgbe_configure_fcoe(adapter
);
5482 #endif /* IXGBE_FCOE */
5483 ixgbe_configure_tx(adapter
);
5484 ixgbe_configure_rx(adapter
);
5485 ixgbe_configure_dfwd(adapter
);
5489 * ixgbe_sfp_link_config - set up SFP+ link
5490 * @adapter: pointer to private adapter struct
5492 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
5495 * We are assuming the worst case scenario here, and that
5496 * is that an SFP was inserted/removed after the reset
5497 * but before SFP detection was enabled. As such the best
5498 * solution is to just start searching as soon as we start
5500 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
5501 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
5503 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
5504 adapter
->sfp_poll_time
= 0;
5508 * ixgbe_non_sfp_link_config - set up non-SFP+ link
5509 * @hw: pointer to private hardware struct
5511 * Returns 0 on success, negative on failure
5513 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
5516 bool autoneg
, link_up
= false;
5517 int ret
= IXGBE_ERR_LINK_SETUP
;
5519 if (hw
->mac
.ops
.check_link
)
5520 ret
= hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
5525 speed
= hw
->phy
.autoneg_advertised
;
5526 if (!speed
&& hw
->mac
.ops
.get_link_capabilities
) {
5527 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &speed
,
5529 speed
&= ~(IXGBE_LINK_SPEED_5GB_FULL
|
5530 IXGBE_LINK_SPEED_2_5GB_FULL
);
5536 if (hw
->mac
.ops
.setup_link
)
5537 ret
= hw
->mac
.ops
.setup_link(hw
, speed
, link_up
);
5542 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
5544 struct ixgbe_hw
*hw
= &adapter
->hw
;
5547 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
5548 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
5550 gpie
|= IXGBE_GPIE_EIAME
;
5552 * use EIAM to auto-mask when MSI-X interrupt is asserted
5553 * this saves a register write for every interrupt
5555 switch (hw
->mac
.type
) {
5556 case ixgbe_mac_82598EB
:
5557 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
5559 case ixgbe_mac_82599EB
:
5560 case ixgbe_mac_X540
:
5561 case ixgbe_mac_X550
:
5562 case ixgbe_mac_X550EM_x
:
5563 case ixgbe_mac_x550em_a
:
5565 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5566 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5570 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5571 * specifically only auto mask tx and rx interrupts */
5572 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
5575 /* XXX: to interrupt immediately for EICS writes, enable this */
5576 /* gpie |= IXGBE_GPIE_EIMEN; */
5578 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
5579 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
5581 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
5582 case IXGBE_82599_VMDQ_8Q_MASK
:
5583 gpie
|= IXGBE_GPIE_VTMODE_16
;
5585 case IXGBE_82599_VMDQ_4Q_MASK
:
5586 gpie
|= IXGBE_GPIE_VTMODE_32
;
5589 gpie
|= IXGBE_GPIE_VTMODE_64
;
5594 /* Enable Thermal over heat sensor interrupt */
5595 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) {
5596 switch (adapter
->hw
.mac
.type
) {
5597 case ixgbe_mac_82599EB
:
5598 gpie
|= IXGBE_SDP0_GPIEN_8259X
;
5605 /* Enable fan failure interrupt */
5606 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
5607 gpie
|= IXGBE_SDP1_GPIEN(hw
);
5609 switch (hw
->mac
.type
) {
5610 case ixgbe_mac_82599EB
:
5611 gpie
|= IXGBE_SDP1_GPIEN_8259X
| IXGBE_SDP2_GPIEN_8259X
;
5613 case ixgbe_mac_X550EM_x
:
5614 case ixgbe_mac_x550em_a
:
5615 gpie
|= IXGBE_SDP0_GPIEN_X540
;
5621 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
5624 static void ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
5626 struct ixgbe_hw
*hw
= &adapter
->hw
;
5630 ixgbe_get_hw_control(adapter
);
5631 ixgbe_setup_gpie(adapter
);
5633 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
5634 ixgbe_configure_msix(adapter
);
5636 ixgbe_configure_msi_and_legacy(adapter
);
5638 /* enable the optics for 82599 SFP+ fiber */
5639 if (hw
->mac
.ops
.enable_tx_laser
)
5640 hw
->mac
.ops
.enable_tx_laser(hw
);
5642 if (hw
->phy
.ops
.set_phy_power
)
5643 hw
->phy
.ops
.set_phy_power(hw
, true);
5645 smp_mb__before_atomic();
5646 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
5647 ixgbe_napi_enable_all(adapter
);
5649 if (ixgbe_is_sfp(hw
)) {
5650 ixgbe_sfp_link_config(adapter
);
5652 err
= ixgbe_non_sfp_link_config(hw
);
5654 e_err(probe
, "link_config FAILED %d\n", err
);
5657 /* clear any pending interrupts, may auto mask */
5658 IXGBE_READ_REG(hw
, IXGBE_EICR
);
5659 ixgbe_irq_enable(adapter
, true, true);
5662 * If this adapter has a fan, check to see if we had a failure
5663 * before we enabled the interrupt.
5665 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
5666 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
5667 if (esdp
& IXGBE_ESDP_SDP1
)
5668 e_crit(drv
, "Fan has stopped, replace the adapter\n");
5671 /* bring the link up in the watchdog, this could race with our first
5672 * link up interrupt but shouldn't be a problem */
5673 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
5674 adapter
->link_check_timeout
= jiffies
;
5675 mod_timer(&adapter
->service_timer
, jiffies
);
5677 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5678 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
5679 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
5680 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
5683 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
5685 /* put off any impending NetWatchDogTimeout */
5686 netif_trans_update(adapter
->netdev
);
5688 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
5689 usleep_range(1000, 2000);
5690 if (adapter
->hw
.phy
.type
== ixgbe_phy_fw
)
5691 ixgbe_watchdog_link_is_down(adapter
);
5692 ixgbe_down(adapter
);
5694 * If SR-IOV enabled then wait a bit before bringing the adapter
5695 * back up to give the VFs time to respond to the reset. The
5696 * two second wait is based upon the watchdog timer cycle in
5699 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
5702 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
5705 void ixgbe_up(struct ixgbe_adapter
*adapter
)
5707 /* hardware has been reset, we need to reload some things */
5708 ixgbe_configure(adapter
);
5710 ixgbe_up_complete(adapter
);
5713 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter
*adapter
)
5717 pcie_capability_read_word(adapter
->pdev
, PCI_EXP_DEVCTL2
, &devctl2
);
5719 switch (devctl2
& IXGBE_PCIDEVCTRL2_TIMEO_MASK
) {
5720 case IXGBE_PCIDEVCTRL2_17_34s
:
5721 case IXGBE_PCIDEVCTRL2_4_8s
:
5722 /* For now we cap the upper limit on delay to 2 seconds
5723 * as we end up going up to 34 seconds of delay in worst
5724 * case timeout value.
5726 case IXGBE_PCIDEVCTRL2_1_2s
:
5727 return 2000000ul; /* 2.0 s */
5728 case IXGBE_PCIDEVCTRL2_260_520ms
:
5729 return 520000ul; /* 520 ms */
5730 case IXGBE_PCIDEVCTRL2_65_130ms
:
5731 return 130000ul; /* 130 ms */
5732 case IXGBE_PCIDEVCTRL2_16_32ms
:
5733 return 32000ul; /* 32 ms */
5734 case IXGBE_PCIDEVCTRL2_1_2ms
:
5735 return 2000ul; /* 2 ms */
5736 case IXGBE_PCIDEVCTRL2_50_100us
:
5737 return 100ul; /* 100 us */
5738 case IXGBE_PCIDEVCTRL2_16_32ms_def
:
5739 return 32000ul; /* 32 ms */
5744 /* We shouldn't need to hit this path, but just in case default as
5745 * though completion timeout is not supported and support 32ms.
5750 void ixgbe_disable_rx(struct ixgbe_adapter
*adapter
)
5752 unsigned long wait_delay
, delay_interval
;
5753 struct ixgbe_hw
*hw
= &adapter
->hw
;
5757 /* disable receives */
5758 hw
->mac
.ops
.disable_rx(hw
);
5760 if (ixgbe_removed(hw
->hw_addr
))
5763 /* disable all enabled Rx queues */
5764 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5765 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
5766 u8 reg_idx
= ring
->reg_idx
;
5768 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
5769 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
5770 rxdctl
|= IXGBE_RXDCTL_SWFLSH
;
5772 /* write value back with RXDCTL.ENABLE bit cleared */
5773 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
5776 /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5777 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
5778 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
5781 /* Determine our minimum delay interval. We will increase this value
5782 * with each subsequent test. This way if the device returns quickly
5783 * we should spend as little time as possible waiting, however as
5784 * the time increases we will wait for larger periods of time.
5786 * The trick here is that we increase the interval using the
5787 * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5788 * of that wait is that it totals up to 100x whatever interval we
5789 * choose. Since our minimum wait is 100us we can just divide the
5790 * total timeout by 100 to get our minimum delay interval.
5792 delay_interval
= ixgbe_get_completion_timeout(adapter
) / 100;
5794 wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
5795 wait_delay
= delay_interval
;
5797 while (wait_loop
--) {
5798 usleep_range(wait_delay
, wait_delay
+ 10);
5799 wait_delay
+= delay_interval
* 2;
5802 /* OR together the reading of all the active RXDCTL registers,
5803 * and then test the result. We need the disable to complete
5804 * before we start freeing the memory and invalidating the
5807 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5808 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
5809 u8 reg_idx
= ring
->reg_idx
;
5811 rxdctl
|= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
5814 if (!(rxdctl
& IXGBE_RXDCTL_ENABLE
))
5819 "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5822 void ixgbe_disable_tx(struct ixgbe_adapter
*adapter
)
5824 unsigned long wait_delay
, delay_interval
;
5825 struct ixgbe_hw
*hw
= &adapter
->hw
;
5829 if (ixgbe_removed(hw
->hw_addr
))
5832 /* disable all enabled Tx queues */
5833 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5834 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
5835 u8 reg_idx
= ring
->reg_idx
;
5837 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
5840 /* disable all enabled XDP Tx queues */
5841 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++) {
5842 struct ixgbe_ring
*ring
= adapter
->xdp_ring
[i
];
5843 u8 reg_idx
= ring
->reg_idx
;
5845 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
5848 /* If the link is not up there shouldn't be much in the way of
5849 * pending transactions. Those that are left will be flushed out
5850 * when the reset logic goes through the flush sequence to clean out
5851 * the pending Tx transactions.
5853 if (!(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
5854 goto dma_engine_disable
;
5856 /* Determine our minimum delay interval. We will increase this value
5857 * with each subsequent test. This way if the device returns quickly
5858 * we should spend as little time as possible waiting, however as
5859 * the time increases we will wait for larger periods of time.
5861 * The trick here is that we increase the interval using the
5862 * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5863 * of that wait is that it totals up to 100x whatever interval we
5864 * choose. Since our minimum wait is 100us we can just divide the
5865 * total timeout by 100 to get our minimum delay interval.
5867 delay_interval
= ixgbe_get_completion_timeout(adapter
) / 100;
5869 wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
5870 wait_delay
= delay_interval
;
5872 while (wait_loop
--) {
5873 usleep_range(wait_delay
, wait_delay
+ 10);
5874 wait_delay
+= delay_interval
* 2;
5877 /* OR together the reading of all the active TXDCTL registers,
5878 * and then test the result. We need the disable to complete
5879 * before we start freeing the memory and invalidating the
5882 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5883 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
5884 u8 reg_idx
= ring
->reg_idx
;
5886 txdctl
|= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
5888 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++) {
5889 struct ixgbe_ring
*ring
= adapter
->xdp_ring
[i
];
5890 u8 reg_idx
= ring
->reg_idx
;
5892 txdctl
|= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
5895 if (!(txdctl
& IXGBE_TXDCTL_ENABLE
))
5896 goto dma_engine_disable
;
5900 "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5903 /* Disable the Tx DMA engine on 82599 and later MAC */
5904 switch (hw
->mac
.type
) {
5905 case ixgbe_mac_82599EB
:
5906 case ixgbe_mac_X540
:
5907 case ixgbe_mac_X550
:
5908 case ixgbe_mac_X550EM_x
:
5909 case ixgbe_mac_x550em_a
:
5910 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
5911 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
5912 ~IXGBE_DMATXCTL_TE
));
5919 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
5921 struct ixgbe_hw
*hw
= &adapter
->hw
;
5922 struct net_device
*netdev
= adapter
->netdev
;
5925 if (ixgbe_removed(hw
->hw_addr
))
5927 /* lock SFP init bit to prevent race conditions with the watchdog */
5928 while (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
5929 usleep_range(1000, 2000);
5931 /* clear all SFP and link config related flags while holding SFP_INIT */
5932 adapter
->flags2
&= ~(IXGBE_FLAG2_SEARCH_FOR_SFP
|
5933 IXGBE_FLAG2_SFP_NEEDS_RESET
);
5934 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
5936 err
= hw
->mac
.ops
.init_hw(hw
);
5939 case IXGBE_ERR_SFP_NOT_PRESENT
:
5940 case IXGBE_ERR_SFP_NOT_SUPPORTED
:
5942 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
5943 e_dev_err("master disable timed out\n");
5945 case IXGBE_ERR_EEPROM_VERSION
:
5946 /* We are running on a pre-production device, log a warning */
5947 e_dev_warn("This device is a pre-production adapter/LOM. "
5948 "Please be aware there may be issues associated with "
5949 "your hardware. If you are experiencing problems "
5950 "please contact your Intel or hardware "
5951 "representative who provided you with this "
5955 e_dev_err("Hardware Error: %d\n", err
);
5958 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
5960 /* flush entries out of MAC table */
5961 ixgbe_flush_sw_mac_table(adapter
);
5962 __dev_uc_unsync(netdev
, NULL
);
5964 /* do not flush user set addresses */
5965 ixgbe_mac_set_default_filter(adapter
);
5967 /* update SAN MAC vmdq pool selection */
5968 if (hw
->mac
.san_mac_rar_index
)
5969 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
5971 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
5972 ixgbe_ptp_reset(adapter
);
5974 if (hw
->phy
.ops
.set_phy_power
) {
5975 if (!netif_running(adapter
->netdev
) && !adapter
->wol
)
5976 hw
->phy
.ops
.set_phy_power(hw
, false);
5978 hw
->phy
.ops
.set_phy_power(hw
, true);
5983 * ixgbe_clean_tx_ring - Free Tx Buffers
5984 * @tx_ring: ring to be cleaned
5986 static void ixgbe_clean_tx_ring(struct ixgbe_ring
*tx_ring
)
5988 u16 i
= tx_ring
->next_to_clean
;
5989 struct ixgbe_tx_buffer
*tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
5991 if (tx_ring
->xsk_pool
) {
5992 ixgbe_xsk_clean_tx_ring(tx_ring
);
5996 while (i
!= tx_ring
->next_to_use
) {
5997 union ixgbe_adv_tx_desc
*eop_desc
, *tx_desc
;
5999 /* Free all the Tx ring sk_buffs */
6000 if (ring_is_xdp(tx_ring
))
6001 xdp_return_frame(tx_buffer
->xdpf
);
6003 dev_kfree_skb_any(tx_buffer
->skb
);
6005 /* unmap skb header data */
6006 dma_unmap_single(tx_ring
->dev
,
6007 dma_unmap_addr(tx_buffer
, dma
),
6008 dma_unmap_len(tx_buffer
, len
),
6011 /* check for eop_desc to determine the end of the packet */
6012 eop_desc
= tx_buffer
->next_to_watch
;
6013 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
6015 /* unmap remaining buffers */
6016 while (tx_desc
!= eop_desc
) {
6020 if (unlikely(i
== tx_ring
->count
)) {
6022 tx_buffer
= tx_ring
->tx_buffer_info
;
6023 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
6026 /* unmap any remaining paged data */
6027 if (dma_unmap_len(tx_buffer
, len
))
6028 dma_unmap_page(tx_ring
->dev
,
6029 dma_unmap_addr(tx_buffer
, dma
),
6030 dma_unmap_len(tx_buffer
, len
),
6034 /* move us one more past the eop_desc for start of next pkt */
6037 if (unlikely(i
== tx_ring
->count
)) {
6039 tx_buffer
= tx_ring
->tx_buffer_info
;
6043 /* reset BQL for queue */
6044 if (!ring_is_xdp(tx_ring
))
6045 netdev_tx_reset_queue(txring_txq(tx_ring
));
6048 /* reset next_to_use and next_to_clean */
6049 tx_ring
->next_to_use
= 0;
6050 tx_ring
->next_to_clean
= 0;
6054 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
6055 * @adapter: board private structure
6057 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
6061 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
6062 ixgbe_clean_rx_ring(adapter
->rx_ring
[i
]);
6066 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
6067 * @adapter: board private structure
6069 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
6073 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
6074 ixgbe_clean_tx_ring(adapter
->tx_ring
[i
]);
6075 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++)
6076 ixgbe_clean_tx_ring(adapter
->xdp_ring
[i
]);
6079 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter
*adapter
)
6081 struct hlist_node
*node2
;
6082 struct ixgbe_fdir_filter
*filter
;
6084 spin_lock(&adapter
->fdir_perfect_lock
);
6086 hlist_for_each_entry_safe(filter
, node2
,
6087 &adapter
->fdir_filter_list
, fdir_node
) {
6088 hlist_del(&filter
->fdir_node
);
6091 adapter
->fdir_filter_count
= 0;
6093 spin_unlock(&adapter
->fdir_perfect_lock
);
6096 void ixgbe_down(struct ixgbe_adapter
*adapter
)
6098 struct net_device
*netdev
= adapter
->netdev
;
6099 struct ixgbe_hw
*hw
= &adapter
->hw
;
6102 /* signal that we are down to the interrupt handler */
6103 if (test_and_set_bit(__IXGBE_DOWN
, &adapter
->state
))
6104 return; /* do nothing if already down */
6106 /* Shut off incoming Tx traffic */
6107 netif_tx_stop_all_queues(netdev
);
6109 /* call carrier off first to avoid false dev_watchdog timeouts */
6110 netif_carrier_off(netdev
);
6111 netif_tx_disable(netdev
);
6114 ixgbe_disable_rx(adapter
);
6116 /* synchronize_rcu() needed for pending XDP buffers to drain */
6117 if (adapter
->xdp_ring
[0])
6120 ixgbe_irq_disable(adapter
);
6122 ixgbe_napi_disable_all(adapter
);
6124 clear_bit(__IXGBE_RESET_REQUESTED
, &adapter
->state
);
6125 adapter
->flags2
&= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
6126 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
6128 del_timer_sync(&adapter
->service_timer
);
6130 if (adapter
->num_vfs
) {
6131 /* Clear EITR Select mapping */
6132 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
6134 /* Mark all the VFs as inactive */
6135 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
6136 adapter
->vfinfo
[i
].clear_to_send
= false;
6138 /* ping all the active vfs to let them know we are going down */
6139 ixgbe_ping_all_vfs(adapter
);
6141 /* Disable all VFTE/VFRE TX/RX */
6142 ixgbe_disable_tx_rx(adapter
);
6145 /* disable transmits in the hardware now that interrupts are off */
6146 ixgbe_disable_tx(adapter
);
6148 if (!pci_channel_offline(adapter
->pdev
))
6149 ixgbe_reset(adapter
);
6151 /* power down the optics for 82599 SFP+ fiber */
6152 if (hw
->mac
.ops
.disable_tx_laser
)
6153 hw
->mac
.ops
.disable_tx_laser(hw
);
6155 ixgbe_clean_all_tx_rings(adapter
);
6156 ixgbe_clean_all_rx_rings(adapter
);
6160 * ixgbe_set_eee_capable - helper function to determine EEE support on X550
6161 * @adapter: board private structure
6163 static void ixgbe_set_eee_capable(struct ixgbe_adapter
*adapter
)
6165 struct ixgbe_hw
*hw
= &adapter
->hw
;
6167 switch (hw
->device_id
) {
6168 case IXGBE_DEV_ID_X550EM_A_1G_T
:
6169 case IXGBE_DEV_ID_X550EM_A_1G_T_L
:
6170 if (!hw
->phy
.eee_speeds_supported
)
6172 adapter
->flags2
|= IXGBE_FLAG2_EEE_CAPABLE
;
6173 if (!hw
->phy
.eee_speeds_advertised
)
6175 adapter
->flags2
|= IXGBE_FLAG2_EEE_ENABLED
;
6178 adapter
->flags2
&= ~IXGBE_FLAG2_EEE_CAPABLE
;
6179 adapter
->flags2
&= ~IXGBE_FLAG2_EEE_ENABLED
;
6185 * ixgbe_tx_timeout - Respond to a Tx Hang
6186 * @netdev: network interface device structure
6187 * @txqueue: queue number that timed out
6189 static void ixgbe_tx_timeout(struct net_device
*netdev
, unsigned int __always_unused txqueue
)
6191 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6193 /* Do the reset outside of interrupt context */
6194 ixgbe_tx_timeout_reset(adapter
);
6197 #ifdef CONFIG_IXGBE_DCB
6198 static void ixgbe_init_dcb(struct ixgbe_adapter
*adapter
)
6200 struct ixgbe_hw
*hw
= &adapter
->hw
;
6201 struct tc_configuration
*tc
;
6204 switch (hw
->mac
.type
) {
6205 case ixgbe_mac_82598EB
:
6206 case ixgbe_mac_82599EB
:
6207 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= MAX_TRAFFIC_CLASS
;
6208 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= MAX_TRAFFIC_CLASS
;
6210 case ixgbe_mac_X540
:
6211 case ixgbe_mac_X550
:
6212 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= X540_TRAFFIC_CLASS
;
6213 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= X540_TRAFFIC_CLASS
;
6215 case ixgbe_mac_X550EM_x
:
6216 case ixgbe_mac_x550em_a
:
6218 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= DEF_TRAFFIC_CLASS
;
6219 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= DEF_TRAFFIC_CLASS
;
6223 /* Configure DCB traffic classes */
6224 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
6225 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
6226 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
6227 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
6228 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
6229 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
6230 tc
->dcb_pfc
= pfc_disabled
;
6233 /* Initialize default user to priority mapping, UPx->TC0 */
6234 tc
= &adapter
->dcb_cfg
.tc_config
[0];
6235 tc
->path
[DCB_TX_CONFIG
].up_to_tc_bitmap
= 0xFF;
6236 tc
->path
[DCB_RX_CONFIG
].up_to_tc_bitmap
= 0xFF;
6238 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
6239 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
6240 adapter
->dcb_cfg
.pfc_mode_enable
= false;
6241 adapter
->dcb_set_bitmap
= 0x00;
6242 if (adapter
->flags
& IXGBE_FLAG_DCB_CAPABLE
)
6243 adapter
->dcbx_cap
= DCB_CAP_DCBX_HOST
| DCB_CAP_DCBX_VER_CEE
;
6244 memcpy(&adapter
->temp_dcb_cfg
, &adapter
->dcb_cfg
,
6245 sizeof(adapter
->temp_dcb_cfg
));
6250 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6251 * @adapter: board private structure to initialize
6252 * @ii: pointer to ixgbe_info for device
6254 * ixgbe_sw_init initializes the Adapter private data structure.
6255 * Fields are initialized based on PCI device information and
6256 * OS network device settings (MTU size).
6258 static int ixgbe_sw_init(struct ixgbe_adapter
*adapter
,
6259 const struct ixgbe_info
*ii
)
6261 struct ixgbe_hw
*hw
= &adapter
->hw
;
6262 struct pci_dev
*pdev
= adapter
->pdev
;
6263 unsigned int rss
, fdir
;
6267 /* PCI config space info */
6269 hw
->vendor_id
= pdev
->vendor
;
6270 hw
->device_id
= pdev
->device
;
6271 hw
->revision_id
= pdev
->revision
;
6272 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
6273 hw
->subsystem_device_id
= pdev
->subsystem_device
;
6275 /* get_invariants needs the device IDs */
6276 ii
->get_invariants(hw
);
6278 /* Set common capability flags and settings */
6279 rss
= min_t(int, ixgbe_max_rss_indices(adapter
), num_online_cpus());
6280 adapter
->ring_feature
[RING_F_RSS
].limit
= rss
;
6281 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
6282 adapter
->max_q_vectors
= MAX_Q_VECTORS_82599
;
6283 adapter
->atr_sample_rate
= 20;
6284 fdir
= min_t(int, IXGBE_MAX_FDIR_INDICES
, num_online_cpus());
6285 adapter
->ring_feature
[RING_F_FDIR
].limit
= fdir
;
6286 adapter
->fdir_pballoc
= IXGBE_FDIR_PBALLOC_64K
;
6287 adapter
->ring_feature
[RING_F_VMDQ
].limit
= 1;
6288 #ifdef CONFIG_IXGBE_DCA
6289 adapter
->flags
|= IXGBE_FLAG_DCA_CAPABLE
;
6291 #ifdef CONFIG_IXGBE_DCB
6292 adapter
->flags
|= IXGBE_FLAG_DCB_CAPABLE
;
6293 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
6296 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
6297 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
6298 #ifdef CONFIG_IXGBE_DCB
6299 /* Default traffic class to use for FCoE */
6300 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
6301 #endif /* CONFIG_IXGBE_DCB */
6302 #endif /* IXGBE_FCOE */
6304 /* initialize static ixgbe jump table entries */
6305 adapter
->jump_tables
[0] = kzalloc(sizeof(*adapter
->jump_tables
[0]),
6307 if (!adapter
->jump_tables
[0])
6309 adapter
->jump_tables
[0]->mat
= ixgbe_ipv4_fields
;
6311 for (i
= 1; i
< IXGBE_MAX_LINK_HANDLE
; i
++)
6312 adapter
->jump_tables
[i
] = NULL
;
6314 adapter
->mac_table
= kcalloc(hw
->mac
.num_rar_entries
,
6315 sizeof(struct ixgbe_mac_addr
),
6317 if (!adapter
->mac_table
)
6320 if (ixgbe_init_rss_key(adapter
))
6323 adapter
->af_xdp_zc_qps
= bitmap_zalloc(MAX_XDP_QUEUES
, GFP_KERNEL
);
6324 if (!adapter
->af_xdp_zc_qps
)
6327 /* Set MAC specific capability flags and exceptions */
6328 switch (hw
->mac
.type
) {
6329 case ixgbe_mac_82598EB
:
6330 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_CAPABLE
;
6332 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
6333 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
6335 adapter
->max_q_vectors
= MAX_Q_VECTORS_82598
;
6336 adapter
->ring_feature
[RING_F_FDIR
].limit
= 0;
6337 adapter
->atr_sample_rate
= 0;
6338 adapter
->fdir_pballoc
= 0;
6340 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
6341 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
6342 #ifdef CONFIG_IXGBE_DCB
6343 adapter
->fcoe
.up
= 0;
6344 #endif /* IXGBE_DCB */
6345 #endif /* IXGBE_FCOE */
6347 case ixgbe_mac_82599EB
:
6348 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
6349 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
6351 case ixgbe_mac_X540
:
6352 fwsm
= IXGBE_READ_REG(hw
, IXGBE_FWSM(hw
));
6353 if (fwsm
& IXGBE_FWSM_TS_ENABLED
)
6354 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
6356 case ixgbe_mac_x550em_a
:
6357 switch (hw
->device_id
) {
6358 case IXGBE_DEV_ID_X550EM_A_1G_T
:
6359 case IXGBE_DEV_ID_X550EM_A_1G_T_L
:
6360 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
6366 case ixgbe_mac_X550EM_x
:
6367 #ifdef CONFIG_IXGBE_DCB
6368 adapter
->flags
&= ~IXGBE_FLAG_DCB_CAPABLE
;
6371 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
6372 #ifdef CONFIG_IXGBE_DCB
6373 adapter
->fcoe
.up
= 0;
6374 #endif /* IXGBE_DCB */
6375 #endif /* IXGBE_FCOE */
6377 case ixgbe_mac_X550
:
6378 if (hw
->mac
.type
== ixgbe_mac_X550
)
6379 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
6380 #ifdef CONFIG_IXGBE_DCA
6381 adapter
->flags
&= ~IXGBE_FLAG_DCA_CAPABLE
;
6389 /* FCoE support exists, always init the FCoE lock */
6390 spin_lock_init(&adapter
->fcoe
.lock
);
6393 /* n-tuple support exists, always init our spinlock */
6394 spin_lock_init(&adapter
->fdir_perfect_lock
);
6396 #ifdef CONFIG_IXGBE_DCB
6397 ixgbe_init_dcb(adapter
);
6399 ixgbe_init_ipsec_offload(adapter
);
6401 /* default flow control settings */
6402 hw
->fc
.requested_mode
= ixgbe_fc_full
;
6403 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
6404 ixgbe_pbthresh_setup(adapter
);
6405 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
6406 hw
->fc
.send_xon
= true;
6407 hw
->fc
.disable_fc_autoneg
= ixgbe_device_supports_autoneg_fc(hw
);
6409 #ifdef CONFIG_PCI_IOV
6411 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6413 /* assign number of SR-IOV VFs */
6414 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
6415 if (max_vfs
> IXGBE_MAX_VFS_DRV_LIMIT
) {
6417 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6420 #endif /* CONFIG_PCI_IOV */
6422 /* enable itr by default in dynamic mode */
6423 adapter
->rx_itr_setting
= 1;
6424 adapter
->tx_itr_setting
= 1;
6426 /* set default ring sizes */
6427 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
6428 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
6430 /* set default work limits */
6431 adapter
->tx_work_limit
= IXGBE_DEFAULT_TX_WORK
;
6433 /* initialize eeprom parameters */
6434 if (ixgbe_init_eeprom_params_generic(hw
)) {
6435 e_dev_err("EEPROM initialization failed\n");
6439 /* PF holds first pool slot */
6440 set_bit(0, adapter
->fwd_bitmask
);
6441 set_bit(__IXGBE_DOWN
, &adapter
->state
);
6447 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6448 * @tx_ring: tx descriptor ring (for a specific queue) to setup
6450 * Return 0 on success, negative on failure
6452 int ixgbe_setup_tx_resources(struct ixgbe_ring
*tx_ring
)
6454 struct device
*dev
= tx_ring
->dev
;
6455 int orig_node
= dev_to_node(dev
);
6456 int ring_node
= NUMA_NO_NODE
;
6459 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
6461 if (tx_ring
->q_vector
)
6462 ring_node
= tx_ring
->q_vector
->numa_node
;
6464 tx_ring
->tx_buffer_info
= vmalloc_node(size
, ring_node
);
6465 if (!tx_ring
->tx_buffer_info
)
6466 tx_ring
->tx_buffer_info
= vmalloc(size
);
6467 if (!tx_ring
->tx_buffer_info
)
6470 /* round up to nearest 4K */
6471 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
6472 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
6474 set_dev_node(dev
, ring_node
);
6475 tx_ring
->desc
= dma_alloc_coherent(dev
,
6479 set_dev_node(dev
, orig_node
);
6481 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
6482 &tx_ring
->dma
, GFP_KERNEL
);
6486 tx_ring
->next_to_use
= 0;
6487 tx_ring
->next_to_clean
= 0;
6491 vfree(tx_ring
->tx_buffer_info
);
6492 tx_ring
->tx_buffer_info
= NULL
;
6493 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
6498 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6499 * @adapter: board private structure
6501 * If this function returns with an error, then it's possible one or
6502 * more of the rings is populated (while the rest are not). It is the
6503 * callers duty to clean those orphaned rings.
6505 * Return 0 on success, negative on failure
6507 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
6509 int i
, j
= 0, err
= 0;
6511 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6512 err
= ixgbe_setup_tx_resources(adapter
->tx_ring
[i
]);
6516 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
6519 for (j
= 0; j
< adapter
->num_xdp_queues
; j
++) {
6520 err
= ixgbe_setup_tx_resources(adapter
->xdp_ring
[j
]);
6524 e_err(probe
, "Allocation for Tx Queue %u failed\n", j
);
6530 /* rewind the index freeing the rings as we go */
6532 ixgbe_free_tx_resources(adapter
->xdp_ring
[j
]);
6534 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
6538 static int ixgbe_rx_napi_id(struct ixgbe_ring
*rx_ring
)
6540 struct ixgbe_q_vector
*q_vector
= rx_ring
->q_vector
;
6542 return q_vector
? q_vector
->napi
.napi_id
: 0;
6546 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6547 * @adapter: pointer to ixgbe_adapter
6548 * @rx_ring: rx descriptor ring (for a specific queue) to setup
6550 * Returns 0 on success, negative on failure
6552 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
6553 struct ixgbe_ring
*rx_ring
)
6555 struct device
*dev
= rx_ring
->dev
;
6556 int orig_node
= dev_to_node(dev
);
6557 int ring_node
= NUMA_NO_NODE
;
6560 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
6562 if (rx_ring
->q_vector
)
6563 ring_node
= rx_ring
->q_vector
->numa_node
;
6565 rx_ring
->rx_buffer_info
= vmalloc_node(size
, ring_node
);
6566 if (!rx_ring
->rx_buffer_info
)
6567 rx_ring
->rx_buffer_info
= vmalloc(size
);
6568 if (!rx_ring
->rx_buffer_info
)
6571 /* Round up to nearest 4K */
6572 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
6573 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
6575 set_dev_node(dev
, ring_node
);
6576 rx_ring
->desc
= dma_alloc_coherent(dev
,
6580 set_dev_node(dev
, orig_node
);
6582 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
6583 &rx_ring
->dma
, GFP_KERNEL
);
6587 rx_ring
->next_to_clean
= 0;
6588 rx_ring
->next_to_use
= 0;
6590 /* XDP RX-queue info */
6591 if (xdp_rxq_info_reg(&rx_ring
->xdp_rxq
, adapter
->netdev
,
6592 rx_ring
->queue_index
, ixgbe_rx_napi_id(rx_ring
)) < 0)
6595 rx_ring
->xdp_prog
= adapter
->xdp_prog
;
6599 vfree(rx_ring
->rx_buffer_info
);
6600 rx_ring
->rx_buffer_info
= NULL
;
6601 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
6606 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6607 * @adapter: board private structure
6609 * If this function returns with an error, then it's possible one or
6610 * more of the rings is populated (while the rest are not). It is the
6611 * callers duty to clean those orphaned rings.
6613 * Return 0 on success, negative on failure
6615 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
6619 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6620 err
= ixgbe_setup_rx_resources(adapter
, adapter
->rx_ring
[i
]);
6624 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
6629 err
= ixgbe_setup_fcoe_ddp_resources(adapter
);
6634 /* rewind the index freeing the rings as we go */
6636 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
6641 * ixgbe_free_tx_resources - Free Tx Resources per Queue
6642 * @tx_ring: Tx descriptor ring for a specific queue
6644 * Free all transmit software resources
6646 void ixgbe_free_tx_resources(struct ixgbe_ring
*tx_ring
)
6648 ixgbe_clean_tx_ring(tx_ring
);
6650 vfree(tx_ring
->tx_buffer_info
);
6651 tx_ring
->tx_buffer_info
= NULL
;
6653 /* if not set, then don't free */
6657 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
6658 tx_ring
->desc
, tx_ring
->dma
);
6660 tx_ring
->desc
= NULL
;
6664 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6665 * @adapter: board private structure
6667 * Free all transmit software resources
6669 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
6673 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
6674 if (adapter
->tx_ring
[i
]->desc
)
6675 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
6676 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++)
6677 if (adapter
->xdp_ring
[i
]->desc
)
6678 ixgbe_free_tx_resources(adapter
->xdp_ring
[i
]);
6682 * ixgbe_free_rx_resources - Free Rx Resources
6683 * @rx_ring: ring to clean the resources from
6685 * Free all receive software resources
6687 void ixgbe_free_rx_resources(struct ixgbe_ring
*rx_ring
)
6689 ixgbe_clean_rx_ring(rx_ring
);
6691 rx_ring
->xdp_prog
= NULL
;
6692 xdp_rxq_info_unreg(&rx_ring
->xdp_rxq
);
6693 vfree(rx_ring
->rx_buffer_info
);
6694 rx_ring
->rx_buffer_info
= NULL
;
6696 /* if not set, then don't free */
6700 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
6701 rx_ring
->desc
, rx_ring
->dma
);
6703 rx_ring
->desc
= NULL
;
6707 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6708 * @adapter: board private structure
6710 * Free all receive software resources
6712 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
6717 ixgbe_free_fcoe_ddp_resources(adapter
);
6720 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
6721 if (adapter
->rx_ring
[i
]->desc
)
6722 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
6726 * ixgbe_change_mtu - Change the Maximum Transfer Unit
6727 * @netdev: network interface device structure
6728 * @new_mtu: new value for maximum frame size
6730 * Returns 0 on success, negative on failure
6732 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
6734 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6736 if (adapter
->xdp_prog
) {
6737 int new_frame_size
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+
6741 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6742 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
6744 if (new_frame_size
> ixgbe_rx_bufsz(ring
)) {
6745 e_warn(probe
, "Requested MTU size is not supported with XDP\n");
6752 * For 82599EB we cannot allow legacy VFs to enable their receive
6753 * paths when MTU greater than 1500 is configured. So display a
6754 * warning that legacy VFs will be disabled.
6756 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
6757 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) &&
6758 (new_mtu
> ETH_DATA_LEN
))
6759 e_warn(probe
, "Setting MTU > 1500 will disable legacy VFs\n");
6761 netdev_dbg(netdev
, "changing MTU from %d to %d\n",
6762 netdev
->mtu
, new_mtu
);
6764 /* must set new MTU before calling down or up */
6765 netdev
->mtu
= new_mtu
;
6767 if (netif_running(netdev
))
6768 ixgbe_reinit_locked(adapter
);
6774 * ixgbe_open - Called when a network interface is made active
6775 * @netdev: network interface device structure
6777 * Returns 0 on success, negative value on failure
6779 * The open entry point is called when a network interface is made
6780 * active by the system (IFF_UP). At this point all resources needed
6781 * for transmit and receive operations are allocated, the interrupt
6782 * handler is registered with the OS, the watchdog timer is started,
6783 * and the stack is notified that the interface is ready.
6785 int ixgbe_open(struct net_device
*netdev
)
6787 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6788 struct ixgbe_hw
*hw
= &adapter
->hw
;
6791 /* disallow open during test */
6792 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
6795 netif_carrier_off(netdev
);
6797 /* allocate transmit descriptors */
6798 err
= ixgbe_setup_all_tx_resources(adapter
);
6802 /* allocate receive descriptors */
6803 err
= ixgbe_setup_all_rx_resources(adapter
);
6807 ixgbe_configure(adapter
);
6809 err
= ixgbe_request_irq(adapter
);
6813 /* Notify the stack of the actual queue counts. */
6814 queues
= adapter
->num_tx_queues
;
6815 err
= netif_set_real_num_tx_queues(netdev
, queues
);
6817 goto err_set_queues
;
6819 queues
= adapter
->num_rx_queues
;
6820 err
= netif_set_real_num_rx_queues(netdev
, queues
);
6822 goto err_set_queues
;
6824 ixgbe_ptp_init(adapter
);
6826 ixgbe_up_complete(adapter
);
6828 udp_tunnel_nic_reset_ntf(netdev
);
6833 ixgbe_free_irq(adapter
);
6835 ixgbe_free_all_rx_resources(adapter
);
6836 if (hw
->phy
.ops
.set_phy_power
&& !adapter
->wol
)
6837 hw
->phy
.ops
.set_phy_power(&adapter
->hw
, false);
6839 ixgbe_free_all_tx_resources(adapter
);
6841 ixgbe_reset(adapter
);
6846 static void ixgbe_close_suspend(struct ixgbe_adapter
*adapter
)
6848 ixgbe_ptp_suspend(adapter
);
6850 if (adapter
->hw
.phy
.ops
.enter_lplu
) {
6851 adapter
->hw
.phy
.reset_disable
= true;
6852 ixgbe_down(adapter
);
6853 adapter
->hw
.phy
.ops
.enter_lplu(&adapter
->hw
);
6854 adapter
->hw
.phy
.reset_disable
= false;
6856 ixgbe_down(adapter
);
6859 ixgbe_free_irq(adapter
);
6861 ixgbe_free_all_tx_resources(adapter
);
6862 ixgbe_free_all_rx_resources(adapter
);
6866 * ixgbe_close - Disables a network interface
6867 * @netdev: network interface device structure
6869 * Returns 0, this is not allowed to fail
6871 * The close entry point is called when an interface is de-activated
6872 * by the OS. The hardware is still under the drivers control, but
6873 * needs to be disabled. A global MAC reset is issued to stop the
6874 * hardware, and all transmit and receive resources are freed.
6876 int ixgbe_close(struct net_device
*netdev
)
6878 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6880 ixgbe_ptp_stop(adapter
);
6882 if (netif_device_present(netdev
))
6883 ixgbe_close_suspend(adapter
);
6885 ixgbe_fdir_filter_exit(adapter
);
6887 ixgbe_release_hw_control(adapter
);
6892 static int __maybe_unused
ixgbe_resume(struct device
*dev_d
)
6894 struct pci_dev
*pdev
= to_pci_dev(dev_d
);
6895 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
6896 struct net_device
*netdev
= adapter
->netdev
;
6899 adapter
->hw
.hw_addr
= adapter
->io_addr
;
6901 err
= pci_enable_device_mem(pdev
);
6903 e_dev_err("Cannot enable PCI device from suspend\n");
6906 smp_mb__before_atomic();
6907 clear_bit(__IXGBE_DISABLED
, &adapter
->state
);
6908 pci_set_master(pdev
);
6910 device_wakeup_disable(dev_d
);
6912 ixgbe_reset(adapter
);
6914 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
6917 err
= ixgbe_init_interrupt_scheme(adapter
);
6918 if (!err
&& netif_running(netdev
))
6919 err
= ixgbe_open(netdev
);
6923 netif_device_attach(netdev
);
6929 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
6931 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
6932 struct net_device
*netdev
= adapter
->netdev
;
6933 struct ixgbe_hw
*hw
= &adapter
->hw
;
6935 u32 wufc
= adapter
->wol
;
6938 netif_device_detach(netdev
);
6940 if (netif_running(netdev
))
6941 ixgbe_close_suspend(adapter
);
6943 ixgbe_clear_interrupt_scheme(adapter
);
6946 if (hw
->mac
.ops
.stop_link_on_d3
)
6947 hw
->mac
.ops
.stop_link_on_d3(hw
);
6952 ixgbe_set_rx_mode(netdev
);
6954 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6955 if (hw
->mac
.ops
.enable_tx_laser
)
6956 hw
->mac
.ops
.enable_tx_laser(hw
);
6958 /* enable the reception of multicast packets */
6959 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
6960 fctrl
|= IXGBE_FCTRL_MPE
;
6961 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
6963 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
6964 ctrl
|= IXGBE_CTRL_GIO_DIS
;
6965 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
6967 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
6969 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
6970 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
6973 switch (hw
->mac
.type
) {
6974 case ixgbe_mac_82598EB
:
6975 pci_wake_from_d3(pdev
, false);
6977 case ixgbe_mac_82599EB
:
6978 case ixgbe_mac_X540
:
6979 case ixgbe_mac_X550
:
6980 case ixgbe_mac_X550EM_x
:
6981 case ixgbe_mac_x550em_a
:
6982 pci_wake_from_d3(pdev
, !!wufc
);
6988 *enable_wake
= !!wufc
;
6989 if (hw
->phy
.ops
.set_phy_power
&& !*enable_wake
)
6990 hw
->phy
.ops
.set_phy_power(hw
, false);
6992 ixgbe_release_hw_control(adapter
);
6994 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
6995 pci_disable_device(pdev
);
7000 static int __maybe_unused
ixgbe_suspend(struct device
*dev_d
)
7002 struct pci_dev
*pdev
= to_pci_dev(dev_d
);
7006 retval
= __ixgbe_shutdown(pdev
, &wake
);
7008 device_set_wakeup_enable(dev_d
, wake
);
7013 static void ixgbe_shutdown(struct pci_dev
*pdev
)
7017 __ixgbe_shutdown(pdev
, &wake
);
7019 if (system_state
== SYSTEM_POWER_OFF
) {
7020 pci_wake_from_d3(pdev
, wake
);
7021 pci_set_power_state(pdev
, PCI_D3hot
);
7026 * ixgbe_update_stats - Update the board statistics counters.
7027 * @adapter: board private structure
7029 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
7031 struct net_device
*netdev
= adapter
->netdev
;
7032 struct ixgbe_hw
*hw
= &adapter
->hw
;
7033 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
7035 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
7036 u64 non_eop_descs
= 0, restart_queue
= 0, tx_busy
= 0;
7037 u64 alloc_rx_page_failed
= 0, alloc_rx_buff_failed
= 0;
7038 u64 alloc_rx_page
= 0;
7039 u64 bytes
= 0, packets
= 0, hw_csum_rx_error
= 0;
7041 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
7042 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
7045 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
7048 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
7049 rsc_count
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_count
;
7050 rsc_flush
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_flush
;
7052 adapter
->rsc_total_count
= rsc_count
;
7053 adapter
->rsc_total_flush
= rsc_flush
;
7056 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
7057 struct ixgbe_ring
*rx_ring
= READ_ONCE(adapter
->rx_ring
[i
]);
7061 non_eop_descs
+= rx_ring
->rx_stats
.non_eop_descs
;
7062 alloc_rx_page
+= rx_ring
->rx_stats
.alloc_rx_page
;
7063 alloc_rx_page_failed
+= rx_ring
->rx_stats
.alloc_rx_page_failed
;
7064 alloc_rx_buff_failed
+= rx_ring
->rx_stats
.alloc_rx_buff_failed
;
7065 hw_csum_rx_error
+= rx_ring
->rx_stats
.csum_err
;
7066 bytes
+= rx_ring
->stats
.bytes
;
7067 packets
+= rx_ring
->stats
.packets
;
7069 adapter
->non_eop_descs
= non_eop_descs
;
7070 adapter
->alloc_rx_page
= alloc_rx_page
;
7071 adapter
->alloc_rx_page_failed
= alloc_rx_page_failed
;
7072 adapter
->alloc_rx_buff_failed
= alloc_rx_buff_failed
;
7073 adapter
->hw_csum_rx_error
= hw_csum_rx_error
;
7074 netdev
->stats
.rx_bytes
= bytes
;
7075 netdev
->stats
.rx_packets
= packets
;
7079 /* gather some stats to the adapter struct that are per queue */
7080 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
7081 struct ixgbe_ring
*tx_ring
= READ_ONCE(adapter
->tx_ring
[i
]);
7085 restart_queue
+= tx_ring
->tx_stats
.restart_queue
;
7086 tx_busy
+= tx_ring
->tx_stats
.tx_busy
;
7087 bytes
+= tx_ring
->stats
.bytes
;
7088 packets
+= tx_ring
->stats
.packets
;
7090 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++) {
7091 struct ixgbe_ring
*xdp_ring
= READ_ONCE(adapter
->xdp_ring
[i
]);
7095 restart_queue
+= xdp_ring
->tx_stats
.restart_queue
;
7096 tx_busy
+= xdp_ring
->tx_stats
.tx_busy
;
7097 bytes
+= xdp_ring
->stats
.bytes
;
7098 packets
+= xdp_ring
->stats
.packets
;
7100 adapter
->restart_queue
= restart_queue
;
7101 adapter
->tx_busy
= tx_busy
;
7102 netdev
->stats
.tx_bytes
= bytes
;
7103 netdev
->stats
.tx_packets
= packets
;
7105 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
7107 /* 8 register reads */
7108 for (i
= 0; i
< 8; i
++) {
7109 /* for packet buffers not used, the register should read 0 */
7110 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
7112 hwstats
->mpc
[i
] += mpc
;
7113 total_mpc
+= hwstats
->mpc
[i
];
7114 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
7115 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
7116 switch (hw
->mac
.type
) {
7117 case ixgbe_mac_82598EB
:
7118 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
7119 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
7120 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
7121 hwstats
->pxonrxc
[i
] +=
7122 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
7124 case ixgbe_mac_82599EB
:
7125 case ixgbe_mac_X540
:
7126 case ixgbe_mac_X550
:
7127 case ixgbe_mac_X550EM_x
:
7128 case ixgbe_mac_x550em_a
:
7129 hwstats
->pxonrxc
[i
] +=
7130 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
7137 /*16 register reads */
7138 for (i
= 0; i
< 16; i
++) {
7139 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
7140 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
7141 if ((hw
->mac
.type
== ixgbe_mac_82599EB
) ||
7142 (hw
->mac
.type
== ixgbe_mac_X540
) ||
7143 (hw
->mac
.type
== ixgbe_mac_X550
) ||
7144 (hw
->mac
.type
== ixgbe_mac_X550EM_x
) ||
7145 (hw
->mac
.type
== ixgbe_mac_x550em_a
)) {
7146 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC_L(i
));
7147 IXGBE_READ_REG(hw
, IXGBE_QBTC_H(i
)); /* to clear */
7148 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC_L(i
));
7149 IXGBE_READ_REG(hw
, IXGBE_QBRC_H(i
)); /* to clear */
7153 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
7154 /* work around hardware counting issue */
7155 hwstats
->gprc
-= missed_rx
;
7157 ixgbe_update_xoff_received(adapter
);
7159 /* 82598 hardware only has a 32 bit counter in the high register */
7160 switch (hw
->mac
.type
) {
7161 case ixgbe_mac_82598EB
:
7162 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
7163 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
7164 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
7165 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
7167 case ixgbe_mac_X540
:
7168 case ixgbe_mac_X550
:
7169 case ixgbe_mac_X550EM_x
:
7170 case ixgbe_mac_x550em_a
:
7171 /* OS2BMC stats are X540 and later */
7172 hwstats
->o2bgptc
+= IXGBE_READ_REG(hw
, IXGBE_O2BGPTC
);
7173 hwstats
->o2bspc
+= IXGBE_READ_REG(hw
, IXGBE_O2BSPC
);
7174 hwstats
->b2ospc
+= IXGBE_READ_REG(hw
, IXGBE_B2OSPC
);
7175 hwstats
->b2ogprc
+= IXGBE_READ_REG(hw
, IXGBE_B2OGPRC
);
7177 case ixgbe_mac_82599EB
:
7178 for (i
= 0; i
< 16; i
++)
7179 adapter
->hw_rx_no_dma_resources
+=
7180 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
7181 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
7182 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
7183 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
7184 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
7185 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
7186 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
7187 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
7188 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
7189 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
7191 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
7192 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
7193 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
7194 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
7195 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
7196 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
7197 /* Add up per cpu counters for total ddp aloc fail */
7198 if (adapter
->fcoe
.ddp_pool
) {
7199 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
7200 struct ixgbe_fcoe_ddp_pool
*ddp_pool
;
7202 u64 noddp
= 0, noddp_ext_buff
= 0;
7203 for_each_possible_cpu(cpu
) {
7204 ddp_pool
= per_cpu_ptr(fcoe
->ddp_pool
, cpu
);
7205 noddp
+= ddp_pool
->noddp
;
7206 noddp_ext_buff
+= ddp_pool
->noddp_ext_buff
;
7208 hwstats
->fcoe_noddp
= noddp
;
7209 hwstats
->fcoe_noddp_ext_buff
= noddp_ext_buff
;
7211 #endif /* IXGBE_FCOE */
7216 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
7217 hwstats
->bprc
+= bprc
;
7218 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
7219 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
7220 hwstats
->mprc
-= bprc
;
7221 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
7222 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
7223 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
7224 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
7225 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
7226 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
7227 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
7228 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
7229 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
7230 hwstats
->lxontxc
+= lxon
;
7231 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
7232 hwstats
->lxofftxc
+= lxoff
;
7233 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
7234 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
7236 * 82598 errata - tx of flow control packets is included in tx counters
7238 xon_off_tot
= lxon
+ lxoff
;
7239 hwstats
->gptc
-= xon_off_tot
;
7240 hwstats
->mptc
-= xon_off_tot
;
7241 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
7242 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
7243 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
7244 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
7245 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
7246 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
7247 hwstats
->ptc64
-= xon_off_tot
;
7248 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
7249 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
7250 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
7251 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
7252 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
7253 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
7255 /* Fill out the OS statistics structure */
7256 netdev
->stats
.multicast
= hwstats
->mprc
;
7259 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
7260 netdev
->stats
.rx_dropped
= 0;
7261 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
7262 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
7263 netdev
->stats
.rx_missed_errors
= total_mpc
;
7267 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7268 * @adapter: pointer to the device adapter structure
7270 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter
*adapter
)
7272 struct ixgbe_hw
*hw
= &adapter
->hw
;
7275 if (!(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
7278 adapter
->flags2
&= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
7280 /* if interface is down do nothing */
7281 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
7284 /* do nothing if we are not using signature filters */
7285 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
))
7288 adapter
->fdir_overflow
++;
7290 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
7291 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
7292 set_bit(__IXGBE_TX_FDIR_INIT_DONE
,
7293 &(adapter
->tx_ring
[i
]->state
));
7294 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++)
7295 set_bit(__IXGBE_TX_FDIR_INIT_DONE
,
7296 &adapter
->xdp_ring
[i
]->state
);
7297 /* re-enable flow director interrupts */
7298 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_FLOW_DIR
);
7300 e_err(probe
, "failed to finish FDIR re-initialization, "
7301 "ignored adding FDIR ATR filters\n");
7306 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7307 * @adapter: pointer to the device adapter structure
7309 * This function serves two purposes. First it strobes the interrupt lines
7310 * in order to make certain interrupts are occurring. Secondly it sets the
7311 * bits needed to check for TX hangs. As a result we should immediately
7312 * determine if a hang has occurred.
7314 static void ixgbe_check_hang_subtask(struct ixgbe_adapter
*adapter
)
7316 struct ixgbe_hw
*hw
= &adapter
->hw
;
7320 /* If we're down, removing or resetting, just bail */
7321 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
7322 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
7323 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
7326 /* Force detection of hung controller */
7327 if (netif_carrier_ok(adapter
->netdev
)) {
7328 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
7329 set_check_for_tx_hang(adapter
->tx_ring
[i
]);
7330 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++)
7331 set_check_for_tx_hang(adapter
->xdp_ring
[i
]);
7334 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
7336 * for legacy and MSI interrupts don't set any bits
7337 * that are enabled for EIAM, because this operation
7338 * would set *both* EIMS and EICS for any bit in EIAM
7340 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
7341 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
7343 /* get one bit for every active tx/rx interrupt vector */
7344 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
7345 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
7346 if (qv
->rx
.ring
|| qv
->tx
.ring
)
7351 /* Cause software interrupt to ensure rings are cleaned */
7352 ixgbe_irq_rearm_queues(adapter
, eics
);
7356 * ixgbe_watchdog_update_link - update the link status
7357 * @adapter: pointer to the device adapter structure
7359 static void ixgbe_watchdog_update_link(struct ixgbe_adapter
*adapter
)
7361 struct ixgbe_hw
*hw
= &adapter
->hw
;
7362 u32 link_speed
= adapter
->link_speed
;
7363 bool link_up
= adapter
->link_up
;
7364 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
7366 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
7369 if (hw
->mac
.ops
.check_link
) {
7370 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
7372 /* always assume link is up, if no check link function */
7373 link_speed
= IXGBE_LINK_SPEED_10GB_FULL
;
7377 if (adapter
->ixgbe_ieee_pfc
)
7378 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
7380 if (link_up
&& !((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) && pfc_en
)) {
7381 hw
->mac
.ops
.fc_enable(hw
);
7382 ixgbe_set_rx_drop_en(adapter
);
7386 time_after(jiffies
, (adapter
->link_check_timeout
+
7387 IXGBE_TRY_LINK_TIMEOUT
))) {
7388 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
7389 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
7390 IXGBE_WRITE_FLUSH(hw
);
7393 adapter
->link_up
= link_up
;
7394 adapter
->link_speed
= link_speed
;
7397 static void ixgbe_update_default_up(struct ixgbe_adapter
*adapter
)
7399 #ifdef CONFIG_IXGBE_DCB
7400 struct net_device
*netdev
= adapter
->netdev
;
7401 struct dcb_app app
= {
7402 .selector
= IEEE_8021QAZ_APP_SEL_ETHERTYPE
,
7407 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_IEEE
)
7408 up
= dcb_ieee_getapp_mask(netdev
, &app
);
7410 adapter
->default_up
= (up
> 1) ? (ffs(up
) - 1) : 0;
7415 * ixgbe_watchdog_link_is_up - update netif_carrier status and
7416 * print link up message
7417 * @adapter: pointer to the device adapter structure
7419 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter
*adapter
)
7421 struct net_device
*netdev
= adapter
->netdev
;
7422 struct ixgbe_hw
*hw
= &adapter
->hw
;
7423 u32 link_speed
= adapter
->link_speed
;
7424 const char *speed_str
;
7425 bool flow_rx
, flow_tx
;
7427 /* only continue if link was previously down */
7428 if (netif_carrier_ok(netdev
))
7431 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
7433 switch (hw
->mac
.type
) {
7434 case ixgbe_mac_82598EB
: {
7435 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
7436 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
7437 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
7438 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
7441 case ixgbe_mac_X540
:
7442 case ixgbe_mac_X550
:
7443 case ixgbe_mac_X550EM_x
:
7444 case ixgbe_mac_x550em_a
:
7445 case ixgbe_mac_82599EB
: {
7446 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
7447 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
7448 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
7449 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
7458 adapter
->last_rx_ptp_check
= jiffies
;
7460 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
7461 ixgbe_ptp_start_cyclecounter(adapter
);
7463 switch (link_speed
) {
7464 case IXGBE_LINK_SPEED_10GB_FULL
:
7465 speed_str
= "10 Gbps";
7467 case IXGBE_LINK_SPEED_5GB_FULL
:
7468 speed_str
= "5 Gbps";
7470 case IXGBE_LINK_SPEED_2_5GB_FULL
:
7471 speed_str
= "2.5 Gbps";
7473 case IXGBE_LINK_SPEED_1GB_FULL
:
7474 speed_str
= "1 Gbps";
7476 case IXGBE_LINK_SPEED_100_FULL
:
7477 speed_str
= "100 Mbps";
7479 case IXGBE_LINK_SPEED_10_FULL
:
7480 speed_str
= "10 Mbps";
7483 speed_str
= "unknown speed";
7486 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n", speed_str
,
7487 ((flow_rx
&& flow_tx
) ? "RX/TX" :
7489 (flow_tx
? "TX" : "None"))));
7491 netif_carrier_on(netdev
);
7492 ixgbe_check_vf_rate_limit(adapter
);
7494 /* enable transmits */
7495 netif_tx_wake_all_queues(adapter
->netdev
);
7497 /* update the default user priority for VFs */
7498 ixgbe_update_default_up(adapter
);
7500 /* ping all the active vfs to let them know link has changed */
7501 ixgbe_ping_all_vfs(adapter
);
7505 * ixgbe_watchdog_link_is_down - update netif_carrier status and
7506 * print link down message
7507 * @adapter: pointer to the adapter structure
7509 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter
*adapter
)
7511 struct net_device
*netdev
= adapter
->netdev
;
7512 struct ixgbe_hw
*hw
= &adapter
->hw
;
7514 adapter
->link_up
= false;
7515 adapter
->link_speed
= 0;
7517 /* only continue if link was up previously */
7518 if (!netif_carrier_ok(netdev
))
7521 /* poll for SFP+ cable when link is down */
7522 if (ixgbe_is_sfp(hw
) && hw
->mac
.type
== ixgbe_mac_82598EB
)
7523 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
7525 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
7526 ixgbe_ptp_start_cyclecounter(adapter
);
7528 e_info(drv
, "NIC Link is Down\n");
7529 netif_carrier_off(netdev
);
7531 /* ping all the active vfs to let them know link has changed */
7532 ixgbe_ping_all_vfs(adapter
);
7535 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter
*adapter
)
7539 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
7540 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
7542 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
)
7546 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++) {
7547 struct ixgbe_ring
*ring
= adapter
->xdp_ring
[i
];
7549 if (ring
->next_to_use
!= ring
->next_to_clean
)
7556 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter
*adapter
)
7558 struct ixgbe_hw
*hw
= &adapter
->hw
;
7559 struct ixgbe_ring_feature
*vmdq
= &adapter
->ring_feature
[RING_F_VMDQ
];
7560 u32 q_per_pool
= __ALIGN_MASK(1, ~vmdq
->mask
);
7564 if (!adapter
->num_vfs
)
7567 /* resetting the PF is only needed for MAC before X550 */
7568 if (hw
->mac
.type
>= ixgbe_mac_X550
)
7571 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
7572 for (j
= 0; j
< q_per_pool
; j
++) {
7575 h
= IXGBE_READ_REG(hw
, IXGBE_PVFTDHN(q_per_pool
, i
, j
));
7576 t
= IXGBE_READ_REG(hw
, IXGBE_PVFTDTN(q_per_pool
, i
, j
));
7587 * ixgbe_watchdog_flush_tx - flush queues on link down
7588 * @adapter: pointer to the device adapter structure
7590 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter
*adapter
)
7592 if (!netif_carrier_ok(adapter
->netdev
)) {
7593 if (ixgbe_ring_tx_pending(adapter
) ||
7594 ixgbe_vf_tx_pending(adapter
)) {
7595 /* We've lost link, so the controller stops DMA,
7596 * but we've got queued Tx work that's never going
7597 * to get done, so reset controller to flush Tx.
7598 * (Do the reset outside of interrupt context).
7600 e_warn(drv
, "initiating reset to clear Tx work after link loss\n");
7601 set_bit(__IXGBE_RESET_REQUESTED
, &adapter
->state
);
7606 #ifdef CONFIG_PCI_IOV
7607 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter
*adapter
)
7609 struct ixgbe_hw
*hw
= &adapter
->hw
;
7610 struct pci_dev
*pdev
= adapter
->pdev
;
7614 if (!(netif_carrier_ok(adapter
->netdev
)))
7617 gpc
= IXGBE_READ_REG(hw
, IXGBE_TXDGPC
);
7618 if (gpc
) /* If incrementing then no need for the check below */
7620 /* Check to see if a bad DMA write target from an errant or
7621 * malicious VF has caused a PCIe error. If so then we can
7622 * issue a VFLR to the offending VF(s) and then resume without
7623 * requesting a full slot reset.
7629 /* check status reg for all VFs owned by this PF */
7630 for (vf
= 0; vf
< adapter
->num_vfs
; ++vf
) {
7631 struct pci_dev
*vfdev
= adapter
->vfinfo
[vf
].vfdev
;
7636 pci_read_config_word(vfdev
, PCI_STATUS
, &status_reg
);
7637 if (status_reg
!= IXGBE_FAILED_READ_CFG_WORD
&&
7638 status_reg
& PCI_STATUS_REC_MASTER_ABORT
)
7643 static void ixgbe_spoof_check(struct ixgbe_adapter
*adapter
)
7647 /* Do not perform spoof check for 82598 or if not in IOV mode */
7648 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
7649 adapter
->num_vfs
== 0)
7652 ssvpc
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SSVPC
);
7655 * ssvpc register is cleared on read, if zero then no
7656 * spoofed packets in the last interval.
7661 e_warn(drv
, "%u Spoofed packets detected\n", ssvpc
);
7664 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused
*adapter
)
7669 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused
*adapter
)
7672 #endif /* CONFIG_PCI_IOV */
7676 * ixgbe_watchdog_subtask - check and bring link up
7677 * @adapter: pointer to the device adapter structure
7679 static void ixgbe_watchdog_subtask(struct ixgbe_adapter
*adapter
)
7681 /* if interface is down, removing or resetting, do nothing */
7682 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
7683 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
7684 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
7687 ixgbe_watchdog_update_link(adapter
);
7689 if (adapter
->link_up
)
7690 ixgbe_watchdog_link_is_up(adapter
);
7692 ixgbe_watchdog_link_is_down(adapter
);
7694 ixgbe_check_for_bad_vf(adapter
);
7695 ixgbe_spoof_check(adapter
);
7696 ixgbe_update_stats(adapter
);
7698 ixgbe_watchdog_flush_tx(adapter
);
7702 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7703 * @adapter: the ixgbe adapter structure
7705 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter
*adapter
)
7707 struct ixgbe_hw
*hw
= &adapter
->hw
;
7710 /* not searching for SFP so there is nothing to do here */
7711 if (!(adapter
->flags2
& IXGBE_FLAG2_SEARCH_FOR_SFP
) &&
7712 !(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
7715 if (adapter
->sfp_poll_time
&&
7716 time_after(adapter
->sfp_poll_time
, jiffies
))
7717 return; /* If not yet time to poll for SFP */
7719 /* someone else is in init, wait until next service event */
7720 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
7723 adapter
->sfp_poll_time
= jiffies
+ IXGBE_SFP_POLL_JIFFIES
- 1;
7725 err
= hw
->phy
.ops
.identify_sfp(hw
);
7726 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
7729 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
7730 /* If no cable is present, then we need to reset
7731 * the next time we find a good cable. */
7732 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
7739 /* exit if reset not needed */
7740 if (!(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
7743 adapter
->flags2
&= ~IXGBE_FLAG2_SFP_NEEDS_RESET
;
7746 * A module may be identified correctly, but the EEPROM may not have
7747 * support for that module. setup_sfp() will fail in that case, so
7748 * we should not allow that module to load.
7750 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
7751 err
= hw
->phy
.ops
.reset(hw
);
7753 err
= hw
->mac
.ops
.setup_sfp(hw
);
7755 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
7758 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
7759 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
7762 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
7764 if ((err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) &&
7765 (adapter
->netdev
->reg_state
== NETREG_REGISTERED
)) {
7766 e_dev_err("failed to initialize because an unsupported "
7767 "SFP+ module type was detected.\n");
7768 e_dev_err("Reload the driver after installing a "
7769 "supported module.\n");
7770 unregister_netdev(adapter
->netdev
);
7775 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7776 * @adapter: the ixgbe adapter structure
7778 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter
*adapter
)
7780 struct ixgbe_hw
*hw
= &adapter
->hw
;
7783 bool autoneg
= false;
7785 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_CONFIG
))
7788 /* someone else is in init, wait until next service event */
7789 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
7792 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
7794 hw
->mac
.ops
.get_link_capabilities(hw
, &cap_speed
, &autoneg
);
7796 /* advertise highest capable link speed */
7797 if (!autoneg
&& (cap_speed
& IXGBE_LINK_SPEED_10GB_FULL
))
7798 speed
= IXGBE_LINK_SPEED_10GB_FULL
;
7800 speed
= cap_speed
& (IXGBE_LINK_SPEED_10GB_FULL
|
7801 IXGBE_LINK_SPEED_1GB_FULL
);
7803 if (hw
->mac
.ops
.setup_link
)
7804 hw
->mac
.ops
.setup_link(hw
, speed
, true);
7806 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
7807 adapter
->link_check_timeout
= jiffies
;
7808 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
7812 * ixgbe_service_timer - Timer Call-back
7813 * @t: pointer to timer_list structure
7815 static void ixgbe_service_timer(struct timer_list
*t
)
7817 struct ixgbe_adapter
*adapter
= from_timer(adapter
, t
, service_timer
);
7818 unsigned long next_event_offset
;
7820 /* poll faster when waiting for link */
7821 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
7822 next_event_offset
= HZ
/ 10;
7824 next_event_offset
= HZ
* 2;
7826 /* Reset the timer */
7827 mod_timer(&adapter
->service_timer
, next_event_offset
+ jiffies
);
7829 ixgbe_service_event_schedule(adapter
);
7832 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter
*adapter
)
7834 struct ixgbe_hw
*hw
= &adapter
->hw
;
7837 if (!(adapter
->flags2
& IXGBE_FLAG2_PHY_INTERRUPT
))
7840 adapter
->flags2
&= ~IXGBE_FLAG2_PHY_INTERRUPT
;
7842 if (!hw
->phy
.ops
.handle_lasi
)
7845 status
= hw
->phy
.ops
.handle_lasi(&adapter
->hw
);
7846 if (status
!= IXGBE_ERR_OVERTEMP
)
7849 e_crit(drv
, "%s\n", ixgbe_overheat_msg
);
7852 static void ixgbe_reset_subtask(struct ixgbe_adapter
*adapter
)
7854 if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED
, &adapter
->state
))
7858 /* If we're already down, removing or resetting, just bail */
7859 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
7860 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
7861 test_bit(__IXGBE_RESETTING
, &adapter
->state
)) {
7866 ixgbe_dump(adapter
);
7867 netdev_err(adapter
->netdev
, "Reset adapter\n");
7868 adapter
->tx_timeout_count
++;
7870 ixgbe_reinit_locked(adapter
);
7875 * ixgbe_check_fw_error - Check firmware for errors
7876 * @adapter: the adapter private structure
7878 * Check firmware errors in register FWSM
7880 static bool ixgbe_check_fw_error(struct ixgbe_adapter
*adapter
)
7882 struct ixgbe_hw
*hw
= &adapter
->hw
;
7885 /* read fwsm.ext_err_ind register and log errors */
7886 fwsm
= IXGBE_READ_REG(hw
, IXGBE_FWSM(hw
));
7888 if (fwsm
& IXGBE_FWSM_EXT_ERR_IND_MASK
||
7889 !(fwsm
& IXGBE_FWSM_FW_VAL_BIT
))
7890 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",
7893 if (hw
->mac
.ops
.fw_recovery_mode
&& hw
->mac
.ops
.fw_recovery_mode(hw
)) {
7894 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
7902 * ixgbe_service_task - manages and runs subtasks
7903 * @work: pointer to work_struct containing our data
7905 static void ixgbe_service_task(struct work_struct
*work
)
7907 struct ixgbe_adapter
*adapter
= container_of(work
,
7908 struct ixgbe_adapter
,
7910 if (ixgbe_removed(adapter
->hw
.hw_addr
)) {
7911 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
7913 ixgbe_down(adapter
);
7916 ixgbe_service_event_complete(adapter
);
7919 if (ixgbe_check_fw_error(adapter
)) {
7920 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
7921 unregister_netdev(adapter
->netdev
);
7922 ixgbe_service_event_complete(adapter
);
7925 ixgbe_reset_subtask(adapter
);
7926 ixgbe_phy_interrupt_subtask(adapter
);
7927 ixgbe_sfp_detection_subtask(adapter
);
7928 ixgbe_sfp_link_config_subtask(adapter
);
7929 ixgbe_check_overtemp_subtask(adapter
);
7930 ixgbe_watchdog_subtask(adapter
);
7931 ixgbe_fdir_reinit_subtask(adapter
);
7932 ixgbe_check_hang_subtask(adapter
);
7934 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
)) {
7935 ixgbe_ptp_overflow_check(adapter
);
7936 if (adapter
->flags
& IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER
)
7937 ixgbe_ptp_rx_hang(adapter
);
7938 ixgbe_ptp_tx_hang(adapter
);
7941 ixgbe_service_event_complete(adapter
);
7944 static int ixgbe_tso(struct ixgbe_ring
*tx_ring
,
7945 struct ixgbe_tx_buffer
*first
,
7947 struct ixgbe_ipsec_tx_data
*itd
)
7949 u32 vlan_macip_lens
, type_tucmd
, mss_l4len_idx
;
7950 struct sk_buff
*skb
= first
->skb
;
7961 u32 paylen
, l4_offset
;
7962 u32 fceof_saidx
= 0;
7965 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
7968 if (!skb_is_gso(skb
))
7971 err
= skb_cow_head(skb
, 0);
7975 if (eth_p_mpls(first
->protocol
))
7976 ip
.hdr
= skb_inner_network_header(skb
);
7978 ip
.hdr
= skb_network_header(skb
);
7979 l4
.hdr
= skb_checksum_start(skb
);
7981 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7982 type_tucmd
= (skb_shinfo(skb
)->gso_type
& SKB_GSO_UDP_L4
) ?
7983 IXGBE_ADVTXD_TUCMD_L4T_UDP
: IXGBE_ADVTXD_TUCMD_L4T_TCP
;
7985 /* initialize outer IP header fields */
7986 if (ip
.v4
->version
== 4) {
7987 unsigned char *csum_start
= skb_checksum_start(skb
);
7988 unsigned char *trans_start
= ip
.hdr
+ (ip
.v4
->ihl
* 4);
7989 int len
= csum_start
- trans_start
;
7991 /* IP header will have to cancel out any data that
7992 * is not a part of the outer IP header, so set to
7993 * a reverse csum if needed, else init check to 0.
7995 ip
.v4
->check
= (skb_shinfo(skb
)->gso_type
& SKB_GSO_PARTIAL
) ?
7996 csum_fold(csum_partial(trans_start
,
7998 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
8001 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
8002 IXGBE_TX_FLAGS_CSUM
|
8003 IXGBE_TX_FLAGS_IPV4
;
8005 ip
.v6
->payload_len
= 0;
8006 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
8007 IXGBE_TX_FLAGS_CSUM
;
8010 /* determine offset of inner transport header */
8011 l4_offset
= l4
.hdr
- skb
->data
;
8013 /* remove payload length from inner checksum */
8014 paylen
= skb
->len
- l4_offset
;
8016 if (type_tucmd
& IXGBE_ADVTXD_TUCMD_L4T_TCP
) {
8017 /* compute length of segmentation header */
8018 *hdr_len
= (l4
.tcp
->doff
* 4) + l4_offset
;
8019 csum_replace_by_diff(&l4
.tcp
->check
,
8020 (__force __wsum
)htonl(paylen
));
8022 /* compute length of segmentation header */
8023 *hdr_len
= sizeof(*l4
.udp
) + l4_offset
;
8024 csum_replace_by_diff(&l4
.udp
->check
,
8025 (__force __wsum
)htonl(paylen
));
8028 /* update gso size and bytecount with header size */
8029 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
8030 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
8032 /* mss_l4len_id: use 0 as index for TSO */
8033 mss_l4len_idx
= (*hdr_len
- l4_offset
) << IXGBE_ADVTXD_L4LEN_SHIFT
;
8034 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
;
8036 fceof_saidx
|= itd
->sa_idx
;
8037 type_tucmd
|= itd
->flags
| itd
->trailer_len
;
8039 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
8040 vlan_macip_lens
= l4
.hdr
- ip
.hdr
;
8041 vlan_macip_lens
|= (ip
.hdr
- skb
->data
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
8042 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
8044 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, fceof_saidx
, type_tucmd
,
8050 static void ixgbe_tx_csum(struct ixgbe_ring
*tx_ring
,
8051 struct ixgbe_tx_buffer
*first
,
8052 struct ixgbe_ipsec_tx_data
*itd
)
8054 struct sk_buff
*skb
= first
->skb
;
8055 u32 vlan_macip_lens
= 0;
8056 u32 fceof_saidx
= 0;
8059 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
8061 if (!(first
->tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
|
8062 IXGBE_TX_FLAGS_CC
)))
8067 switch (skb
->csum_offset
) {
8068 case offsetof(struct tcphdr
, check
):
8069 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
8071 case offsetof(struct udphdr
, check
):
8073 case offsetof(struct sctphdr
, checksum
):
8074 /* validate that this is actually an SCTP request */
8075 if (skb_csum_is_sctp(skb
)) {
8076 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
8081 skb_checksum_help(skb
);
8085 /* update TX checksum flag */
8086 first
->tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
8087 vlan_macip_lens
= skb_checksum_start_offset(skb
) -
8088 skb_network_offset(skb
);
8090 /* vlan_macip_lens: MACLEN, VLAN tag */
8091 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
8092 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
8094 fceof_saidx
|= itd
->sa_idx
;
8095 type_tucmd
|= itd
->flags
| itd
->trailer_len
;
8097 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, fceof_saidx
, type_tucmd
, 0);
8100 #define IXGBE_SET_FLAG(_input, _flag, _result) \
8101 ((_flag <= _result) ? \
8102 ((u32)(_input & _flag) * (_result / _flag)) : \
8103 ((u32)(_input & _flag) / (_flag / _result)))
8105 static u32
ixgbe_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
8107 /* set type for advanced descriptor with frame checksum insertion */
8108 u32 cmd_type
= IXGBE_ADVTXD_DTYP_DATA
|
8109 IXGBE_ADVTXD_DCMD_DEXT
|
8110 IXGBE_ADVTXD_DCMD_IFCS
;
8112 /* set HW vlan bit if vlan is present */
8113 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_HW_VLAN
,
8114 IXGBE_ADVTXD_DCMD_VLE
);
8116 /* set segmentation enable bits for TSO/FSO */
8117 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSO
,
8118 IXGBE_ADVTXD_DCMD_TSE
);
8120 /* set timestamp bit if present */
8121 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSTAMP
,
8122 IXGBE_ADVTXD_MAC_TSTAMP
);
8124 /* insert frame checksum */
8125 cmd_type
^= IXGBE_SET_FLAG(skb
->no_fcs
, 1, IXGBE_ADVTXD_DCMD_IFCS
);
8130 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc
*tx_desc
,
8131 u32 tx_flags
, unsigned int paylen
)
8133 u32 olinfo_status
= paylen
<< IXGBE_ADVTXD_PAYLEN_SHIFT
;
8135 /* enable L4 checksum for TSO and TX checksum offload */
8136 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
8137 IXGBE_TX_FLAGS_CSUM
,
8138 IXGBE_ADVTXD_POPTS_TXSM
);
8140 /* enable IPv4 checksum for TSO */
8141 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
8142 IXGBE_TX_FLAGS_IPV4
,
8143 IXGBE_ADVTXD_POPTS_IXSM
);
8146 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
8147 IXGBE_TX_FLAGS_IPSEC
,
8148 IXGBE_ADVTXD_POPTS_IPSEC
);
8151 * Check Context must be set if Tx switch is enabled, which it
8152 * always is for case where virtual functions are running
8154 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
8158 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
8161 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
8163 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
8165 /* Herbert's original patch had:
8166 * smp_mb__after_netif_stop_queue();
8167 * but since that doesn't exist yet, just open code it.
8171 /* We need to check again in a case another CPU has just
8172 * made room available.
8174 if (likely(ixgbe_desc_unused(tx_ring
) < size
))
8177 /* A reprieve! - use start_queue because it doesn't call schedule */
8178 netif_start_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
8179 ++tx_ring
->tx_stats
.restart_queue
;
8183 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
8185 if (likely(ixgbe_desc_unused(tx_ring
) >= size
))
8188 return __ixgbe_maybe_stop_tx(tx_ring
, size
);
8191 static int ixgbe_tx_map(struct ixgbe_ring
*tx_ring
,
8192 struct ixgbe_tx_buffer
*first
,
8195 struct sk_buff
*skb
= first
->skb
;
8196 struct ixgbe_tx_buffer
*tx_buffer
;
8197 union ixgbe_adv_tx_desc
*tx_desc
;
8200 unsigned int data_len
, size
;
8201 u32 tx_flags
= first
->tx_flags
;
8202 u32 cmd_type
= ixgbe_tx_cmd_type(skb
, tx_flags
);
8203 u16 i
= tx_ring
->next_to_use
;
8205 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
8207 ixgbe_tx_olinfo_status(tx_desc
, tx_flags
, skb
->len
- hdr_len
);
8209 size
= skb_headlen(skb
);
8210 data_len
= skb
->data_len
;
8213 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
8214 if (data_len
< sizeof(struct fcoe_crc_eof
)) {
8215 size
-= sizeof(struct fcoe_crc_eof
) - data_len
;
8218 data_len
-= sizeof(struct fcoe_crc_eof
);
8223 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
8227 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
8228 if (dma_mapping_error(tx_ring
->dev
, dma
))
8231 /* record length, and DMA address */
8232 dma_unmap_len_set(tx_buffer
, len
, size
);
8233 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
8235 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
8237 while (unlikely(size
> IXGBE_MAX_DATA_PER_TXD
)) {
8238 tx_desc
->read
.cmd_type_len
=
8239 cpu_to_le32(cmd_type
^ IXGBE_MAX_DATA_PER_TXD
);
8243 if (i
== tx_ring
->count
) {
8244 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
8247 tx_desc
->read
.olinfo_status
= 0;
8249 dma
+= IXGBE_MAX_DATA_PER_TXD
;
8250 size
-= IXGBE_MAX_DATA_PER_TXD
;
8252 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
8255 if (likely(!data_len
))
8258 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
8262 if (i
== tx_ring
->count
) {
8263 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
8266 tx_desc
->read
.olinfo_status
= 0;
8269 size
= min_t(unsigned int, data_len
, skb_frag_size(frag
));
8271 size
= skb_frag_size(frag
);
8275 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0, size
,
8278 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
8281 /* write last descriptor with RS and EOP bits */
8282 cmd_type
|= size
| IXGBE_TXD_CMD
;
8283 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
8285 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
8287 /* set the timestamp */
8288 first
->time_stamp
= jiffies
;
8290 skb_tx_timestamp(skb
);
8293 * Force memory writes to complete before letting h/w know there
8294 * are new descriptors to fetch. (Only applicable for weak-ordered
8295 * memory model archs, such as IA-64).
8297 * We also need this memory barrier to make certain all of the
8298 * status bits have been updated before next_to_watch is written.
8302 /* set next_to_watch value indicating a packet is present */
8303 first
->next_to_watch
= tx_desc
;
8306 if (i
== tx_ring
->count
)
8309 tx_ring
->next_to_use
= i
;
8311 ixgbe_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
8313 if (netif_xmit_stopped(txring_txq(tx_ring
)) || !netdev_xmit_more()) {
8314 writel(i
, tx_ring
->tail
);
8319 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
8321 /* clear dma mappings for failed tx_buffer_info map */
8323 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
8324 if (dma_unmap_len(tx_buffer
, len
))
8325 dma_unmap_page(tx_ring
->dev
,
8326 dma_unmap_addr(tx_buffer
, dma
),
8327 dma_unmap_len(tx_buffer
, len
),
8329 dma_unmap_len_set(tx_buffer
, len
, 0);
8330 if (tx_buffer
== first
)
8333 i
+= tx_ring
->count
;
8337 dev_kfree_skb_any(first
->skb
);
8340 tx_ring
->next_to_use
= i
;
8345 static void ixgbe_atr(struct ixgbe_ring
*ring
,
8346 struct ixgbe_tx_buffer
*first
)
8348 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
8349 union ixgbe_atr_hash_dword input
= { .dword
= 0 };
8350 union ixgbe_atr_hash_dword common
= { .dword
= 0 };
8352 unsigned char *network
;
8354 struct ipv6hdr
*ipv6
;
8358 struct sk_buff
*skb
;
8362 /* if ring doesn't have a interrupt vector, cannot perform ATR */
8366 /* do nothing if sampling is disabled */
8367 if (!ring
->atr_sample_rate
)
8372 /* currently only IPv4/IPv6 with TCP is supported */
8373 if ((first
->protocol
!= htons(ETH_P_IP
)) &&
8374 (first
->protocol
!= htons(ETH_P_IPV6
)))
8377 /* snag network header to get L4 type and address */
8379 hdr
.network
= skb_network_header(skb
);
8380 if (unlikely(hdr
.network
<= skb
->data
))
8382 if (skb
->encapsulation
&&
8383 first
->protocol
== htons(ETH_P_IP
) &&
8384 hdr
.ipv4
->protocol
== IPPROTO_UDP
) {
8385 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
8387 if (unlikely(skb_tail_pointer(skb
) < hdr
.network
+
8391 /* verify the port is recognized as VXLAN */
8392 if (adapter
->vxlan_port
&&
8393 udp_hdr(skb
)->dest
== adapter
->vxlan_port
)
8394 hdr
.network
= skb_inner_network_header(skb
);
8396 if (adapter
->geneve_port
&&
8397 udp_hdr(skb
)->dest
== adapter
->geneve_port
)
8398 hdr
.network
= skb_inner_network_header(skb
);
8401 /* Make sure we have at least [minimum IPv4 header + TCP]
8402 * or [IPv6 header] bytes
8404 if (unlikely(skb_tail_pointer(skb
) < hdr
.network
+ 40))
8407 /* Currently only IPv4/IPv6 with TCP is supported */
8408 switch (hdr
.ipv4
->version
) {
8410 /* access ihl as u8 to avoid unaligned access on ia64 */
8411 hlen
= (hdr
.network
[0] & 0x0F) << 2;
8412 l4_proto
= hdr
.ipv4
->protocol
;
8415 hlen
= hdr
.network
- skb
->data
;
8416 l4_proto
= ipv6_find_hdr(skb
, &hlen
, IPPROTO_TCP
, NULL
, NULL
);
8417 hlen
-= hdr
.network
- skb
->data
;
8423 if (l4_proto
!= IPPROTO_TCP
)
8426 if (unlikely(skb_tail_pointer(skb
) < hdr
.network
+
8427 hlen
+ sizeof(struct tcphdr
)))
8430 th
= (struct tcphdr
*)(hdr
.network
+ hlen
);
8432 /* skip this packet since the socket is closing */
8436 /* sample on all syn packets or once every atr sample count */
8437 if (!th
->syn
&& (ring
->atr_count
< ring
->atr_sample_rate
))
8440 /* reset sample count */
8441 ring
->atr_count
= 0;
8443 vlan_id
= htons(first
->tx_flags
>> IXGBE_TX_FLAGS_VLAN_SHIFT
);
8446 * src and dst are inverted, think how the receiver sees them
8448 * The input is broken into two sections, a non-compressed section
8449 * containing vm_pool, vlan_id, and flow_type. The rest of the data
8450 * is XORed together and stored in the compressed dword.
8452 input
.formatted
.vlan_id
= vlan_id
;
8455 * since src port and flex bytes occupy the same word XOR them together
8456 * and write the value to source port portion of compressed dword
8458 if (first
->tx_flags
& (IXGBE_TX_FLAGS_SW_VLAN
| IXGBE_TX_FLAGS_HW_VLAN
))
8459 common
.port
.src
^= th
->dest
^ htons(ETH_P_8021Q
);
8461 common
.port
.src
^= th
->dest
^ first
->protocol
;
8462 common
.port
.dst
^= th
->source
;
8464 switch (hdr
.ipv4
->version
) {
8466 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
8467 common
.ip
^= hdr
.ipv4
->saddr
^ hdr
.ipv4
->daddr
;
8470 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV6
;
8471 common
.ip
^= hdr
.ipv6
->saddr
.s6_addr32
[0] ^
8472 hdr
.ipv6
->saddr
.s6_addr32
[1] ^
8473 hdr
.ipv6
->saddr
.s6_addr32
[2] ^
8474 hdr
.ipv6
->saddr
.s6_addr32
[3] ^
8475 hdr
.ipv6
->daddr
.s6_addr32
[0] ^
8476 hdr
.ipv6
->daddr
.s6_addr32
[1] ^
8477 hdr
.ipv6
->daddr
.s6_addr32
[2] ^
8478 hdr
.ipv6
->daddr
.s6_addr32
[3];
8484 if (hdr
.network
!= skb_network_header(skb
))
8485 input
.formatted
.flow_type
|= IXGBE_ATR_L4TYPE_TUNNEL_MASK
;
8487 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8488 ixgbe_fdir_add_signature_filter_82599(&q_vector
->adapter
->hw
,
8489 input
, common
, ring
->queue_index
);
8493 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
,
8494 struct net_device
*sb_dev
)
8496 struct ixgbe_adapter
*adapter
;
8497 struct ixgbe_ring_feature
*f
;
8501 u8 tc
= netdev_get_prio_tc_map(dev
, skb
->priority
);
8502 struct net_device
*vdev
= sb_dev
;
8504 txq
= vdev
->tc_to_txq
[tc
].offset
;
8505 txq
+= reciprocal_scale(skb_get_hash(skb
),
8506 vdev
->tc_to_txq
[tc
].count
);
8512 * only execute the code below if protocol is FCoE
8513 * or FIP and we have FCoE enabled on the adapter
8515 switch (vlan_get_protocol(skb
)) {
8516 case htons(ETH_P_FCOE
):
8517 case htons(ETH_P_FIP
):
8518 adapter
= netdev_priv(dev
);
8520 if (!sb_dev
&& (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
))
8524 return netdev_pick_tx(dev
, skb
, sb_dev
);
8527 f
= &adapter
->ring_feature
[RING_F_FCOE
];
8529 txq
= skb_rx_queue_recorded(skb
) ? skb_get_rx_queue(skb
) :
8532 while (txq
>= f
->indices
)
8535 return txq
+ f
->offset
;
8539 int ixgbe_xmit_xdp_ring(struct ixgbe_adapter
*adapter
,
8540 struct xdp_frame
*xdpf
)
8542 struct ixgbe_ring
*ring
= adapter
->xdp_ring
[smp_processor_id()];
8543 struct ixgbe_tx_buffer
*tx_buffer
;
8544 union ixgbe_adv_tx_desc
*tx_desc
;
8551 if (unlikely(!ixgbe_desc_unused(ring
)))
8552 return IXGBE_XDP_CONSUMED
;
8554 dma
= dma_map_single(ring
->dev
, xdpf
->data
, len
, DMA_TO_DEVICE
);
8555 if (dma_mapping_error(ring
->dev
, dma
))
8556 return IXGBE_XDP_CONSUMED
;
8558 /* record the location of the first descriptor for this packet */
8559 tx_buffer
= &ring
->tx_buffer_info
[ring
->next_to_use
];
8560 tx_buffer
->bytecount
= len
;
8561 tx_buffer
->gso_segs
= 1;
8562 tx_buffer
->protocol
= 0;
8564 i
= ring
->next_to_use
;
8565 tx_desc
= IXGBE_TX_DESC(ring
, i
);
8567 dma_unmap_len_set(tx_buffer
, len
, len
);
8568 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
8569 tx_buffer
->xdpf
= xdpf
;
8571 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
8573 /* put descriptor type bits */
8574 cmd_type
= IXGBE_ADVTXD_DTYP_DATA
|
8575 IXGBE_ADVTXD_DCMD_DEXT
|
8576 IXGBE_ADVTXD_DCMD_IFCS
;
8577 cmd_type
|= len
| IXGBE_TXD_CMD
;
8578 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
8579 tx_desc
->read
.olinfo_status
=
8580 cpu_to_le32(len
<< IXGBE_ADVTXD_PAYLEN_SHIFT
);
8582 /* Avoid any potential race with xdp_xmit and cleanup */
8585 /* set next_to_watch value indicating a packet is present */
8587 if (i
== ring
->count
)
8590 tx_buffer
->next_to_watch
= tx_desc
;
8591 ring
->next_to_use
= i
;
8593 return IXGBE_XDP_TX
;
8596 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
,
8597 struct ixgbe_adapter
*adapter
,
8598 struct ixgbe_ring
*tx_ring
)
8600 struct ixgbe_tx_buffer
*first
;
8604 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
8605 struct ixgbe_ipsec_tx_data ipsec_tx
= { 0 };
8606 __be16 protocol
= skb
->protocol
;
8610 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8611 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8612 * + 2 desc gap to keep tail from touching head,
8613 * + 1 desc for context descriptor,
8614 * otherwise try next time
8616 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
8617 count
+= TXD_USE_COUNT(skb_frag_size(
8618 &skb_shinfo(skb
)->frags
[f
]));
8620 if (ixgbe_maybe_stop_tx(tx_ring
, count
+ 3)) {
8621 tx_ring
->tx_stats
.tx_busy
++;
8622 return NETDEV_TX_BUSY
;
8625 /* record the location of the first descriptor for this packet */
8626 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
8628 first
->bytecount
= skb
->len
;
8629 first
->gso_segs
= 1;
8631 /* if we have a HW VLAN tag being added default to the HW one */
8632 if (skb_vlan_tag_present(skb
)) {
8633 tx_flags
|= skb_vlan_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
;
8634 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
8635 /* else if it is a SW VLAN check the next protocol and store the tag */
8636 } else if (protocol
== htons(ETH_P_8021Q
)) {
8637 struct vlan_hdr
*vhdr
, _vhdr
;
8638 vhdr
= skb_header_pointer(skb
, ETH_HLEN
, sizeof(_vhdr
), &_vhdr
);
8642 tx_flags
|= ntohs(vhdr
->h_vlan_TCI
) <<
8643 IXGBE_TX_FLAGS_VLAN_SHIFT
;
8644 tx_flags
|= IXGBE_TX_FLAGS_SW_VLAN
;
8646 protocol
= vlan_get_protocol(skb
);
8648 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
) &&
8649 adapter
->ptp_clock
) {
8650 if (adapter
->tstamp_config
.tx_type
== HWTSTAMP_TX_ON
&&
8651 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS
,
8653 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
8654 tx_flags
|= IXGBE_TX_FLAGS_TSTAMP
;
8656 /* schedule check for Tx timestamp */
8657 adapter
->ptp_tx_skb
= skb_get(skb
);
8658 adapter
->ptp_tx_start
= jiffies
;
8659 schedule_work(&adapter
->ptp_tx_work
);
8661 adapter
->tx_hwtstamp_skipped
++;
8665 #ifdef CONFIG_PCI_IOV
8667 * Use the l2switch_enable flag - would be false if the DMA
8668 * Tx switch had been disabled.
8670 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
8671 tx_flags
|= IXGBE_TX_FLAGS_CC
;
8674 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8675 if ((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
8676 ((tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
| IXGBE_TX_FLAGS_SW_VLAN
)) ||
8677 (skb
->priority
!= TC_PRIO_CONTROL
))) {
8678 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
8679 tx_flags
|= (skb
->priority
& 0x7) <<
8680 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT
;
8681 if (tx_flags
& IXGBE_TX_FLAGS_SW_VLAN
) {
8682 struct vlan_ethhdr
*vhdr
;
8684 if (skb_cow_head(skb
, 0))
8686 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
8687 vhdr
->h_vlan_TCI
= htons(tx_flags
>>
8688 IXGBE_TX_FLAGS_VLAN_SHIFT
);
8690 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
8694 /* record initial flags and protocol */
8695 first
->tx_flags
= tx_flags
;
8696 first
->protocol
= protocol
;
8699 /* setup tx offload for FCoE */
8700 if ((protocol
== htons(ETH_P_FCOE
)) &&
8701 (tx_ring
->netdev
->features
& (NETIF_F_FSO
| NETIF_F_FCOE_CRC
))) {
8702 tso
= ixgbe_fso(tx_ring
, first
, &hdr_len
);
8709 #endif /* IXGBE_FCOE */
8711 #ifdef CONFIG_IXGBE_IPSEC
8712 if (xfrm_offload(skb
) &&
8713 !ixgbe_ipsec_tx(tx_ring
, first
, &ipsec_tx
))
8716 tso
= ixgbe_tso(tx_ring
, first
, &hdr_len
, &ipsec_tx
);
8720 ixgbe_tx_csum(tx_ring
, first
, &ipsec_tx
);
8722 /* add the ATR filter if ATR is on */
8723 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE
, &tx_ring
->state
))
8724 ixgbe_atr(tx_ring
, first
);
8728 #endif /* IXGBE_FCOE */
8729 if (ixgbe_tx_map(tx_ring
, first
, hdr_len
))
8730 goto cleanup_tx_timestamp
;
8732 return NETDEV_TX_OK
;
8735 dev_kfree_skb_any(first
->skb
);
8737 cleanup_tx_timestamp
:
8738 if (unlikely(tx_flags
& IXGBE_TX_FLAGS_TSTAMP
)) {
8739 dev_kfree_skb_any(adapter
->ptp_tx_skb
);
8740 adapter
->ptp_tx_skb
= NULL
;
8741 cancel_work_sync(&adapter
->ptp_tx_work
);
8742 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS
, &adapter
->state
);
8745 return NETDEV_TX_OK
;
8748 static netdev_tx_t
__ixgbe_xmit_frame(struct sk_buff
*skb
,
8749 struct net_device
*netdev
,
8750 struct ixgbe_ring
*ring
)
8752 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8753 struct ixgbe_ring
*tx_ring
;
8756 * The minimum packet size for olinfo paylen is 17 so pad the skb
8757 * in order to meet this minimum size requirement.
8759 if (skb_put_padto(skb
, 17))
8760 return NETDEV_TX_OK
;
8762 tx_ring
= ring
? ring
: adapter
->tx_ring
[skb_get_queue_mapping(skb
)];
8763 if (unlikely(test_bit(__IXGBE_TX_DISABLED
, &tx_ring
->state
)))
8764 return NETDEV_TX_BUSY
;
8766 return ixgbe_xmit_frame_ring(skb
, adapter
, tx_ring
);
8769 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
8770 struct net_device
*netdev
)
8772 return __ixgbe_xmit_frame(skb
, netdev
, NULL
);
8776 * ixgbe_set_mac - Change the Ethernet Address of the NIC
8777 * @netdev: network interface device structure
8778 * @p: pointer to an address structure
8780 * Returns 0 on success, negative on failure
8782 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
8784 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8785 struct ixgbe_hw
*hw
= &adapter
->hw
;
8786 struct sockaddr
*addr
= p
;
8788 if (!is_valid_ether_addr(addr
->sa_data
))
8789 return -EADDRNOTAVAIL
;
8791 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
8792 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
8794 ixgbe_mac_set_default_filter(adapter
);
8800 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
8802 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8803 struct ixgbe_hw
*hw
= &adapter
->hw
;
8807 if (adapter
->mii_bus
) {
8810 if (devad
!= MDIO_DEVAD_NONE
)
8811 regnum
|= (devad
<< 16) | MII_ADDR_C45
;
8813 return mdiobus_read(adapter
->mii_bus
, prtad
, regnum
);
8816 if (prtad
!= hw
->phy
.mdio
.prtad
)
8818 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
8824 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
8825 u16 addr
, u16 value
)
8827 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8828 struct ixgbe_hw
*hw
= &adapter
->hw
;
8830 if (adapter
->mii_bus
) {
8833 if (devad
!= MDIO_DEVAD_NONE
)
8834 regnum
|= (devad
<< 16) | MII_ADDR_C45
;
8836 return mdiobus_write(adapter
->mii_bus
, prtad
, regnum
, value
);
8839 if (prtad
!= hw
->phy
.mdio
.prtad
)
8841 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
8844 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
8846 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8850 return ixgbe_ptp_set_ts_config(adapter
, req
);
8852 return ixgbe_ptp_get_ts_config(adapter
, req
);
8854 if (!adapter
->hw
.phy
.ops
.read_reg
)
8858 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
8863 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8865 * @dev: network interface device structure
8867 * Returns non-zero on failure
8869 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
8872 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8873 struct ixgbe_hw
*hw
= &adapter
->hw
;
8875 if (is_valid_ether_addr(hw
->mac
.san_addr
)) {
8877 err
= dev_addr_add(dev
, hw
->mac
.san_addr
, NETDEV_HW_ADDR_T_SAN
);
8880 /* update SAN MAC vmdq pool selection */
8881 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
8887 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8889 * @dev: network interface device structure
8891 * Returns non-zero on failure
8893 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
8896 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8897 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
8899 if (is_valid_ether_addr(mac
->san_addr
)) {
8901 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
8907 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64
*stats
,
8908 struct ixgbe_ring
*ring
)
8915 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
8916 packets
= ring
->stats
.packets
;
8917 bytes
= ring
->stats
.bytes
;
8918 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
8919 stats
->tx_packets
+= packets
;
8920 stats
->tx_bytes
+= bytes
;
8924 static void ixgbe_get_stats64(struct net_device
*netdev
,
8925 struct rtnl_link_stats64
*stats
)
8927 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8931 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
8932 struct ixgbe_ring
*ring
= READ_ONCE(adapter
->rx_ring
[i
]);
8938 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
8939 packets
= ring
->stats
.packets
;
8940 bytes
= ring
->stats
.bytes
;
8941 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
8942 stats
->rx_packets
+= packets
;
8943 stats
->rx_bytes
+= bytes
;
8947 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
8948 struct ixgbe_ring
*ring
= READ_ONCE(adapter
->tx_ring
[i
]);
8950 ixgbe_get_ring_stats64(stats
, ring
);
8952 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++) {
8953 struct ixgbe_ring
*ring
= READ_ONCE(adapter
->xdp_ring
[i
]);
8955 ixgbe_get_ring_stats64(stats
, ring
);
8959 /* following stats updated by ixgbe_watchdog_task() */
8960 stats
->multicast
= netdev
->stats
.multicast
;
8961 stats
->rx_errors
= netdev
->stats
.rx_errors
;
8962 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
8963 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
8964 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
8967 #ifdef CONFIG_IXGBE_DCB
8969 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8970 * @adapter: pointer to ixgbe_adapter
8971 * @tc: number of traffic classes currently enabled
8973 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8974 * 802.1Q priority maps to a packet buffer that exists.
8976 static void ixgbe_validate_rtr(struct ixgbe_adapter
*adapter
, u8 tc
)
8978 struct ixgbe_hw
*hw
= &adapter
->hw
;
8982 /* 82598 have a static priority to TC mapping that can not
8983 * be changed so no validation is needed.
8985 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
8988 reg
= IXGBE_READ_REG(hw
, IXGBE_RTRUP2TC
);
8991 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
8992 u8 up2tc
= reg
>> (i
* IXGBE_RTRUP2TC_UP_SHIFT
);
8994 /* If up2tc is out of bounds default to zero */
8996 reg
&= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT
);
9000 IXGBE_WRITE_REG(hw
, IXGBE_RTRUP2TC
, reg
);
9006 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
9007 * @adapter: Pointer to adapter struct
9009 * Populate the netdev user priority to tc map
9011 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter
*adapter
)
9013 struct net_device
*dev
= adapter
->netdev
;
9014 struct ixgbe_dcb_config
*dcb_cfg
= &adapter
->dcb_cfg
;
9015 struct ieee_ets
*ets
= adapter
->ixgbe_ieee_ets
;
9018 for (prio
= 0; prio
< MAX_USER_PRIORITY
; prio
++) {
9021 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
)
9022 tc
= ixgbe_dcb_get_tc_from_up(dcb_cfg
, 0, prio
);
9024 tc
= ets
->prio_tc
[prio
];
9026 netdev_set_prio_tc_map(dev
, prio
, tc
);
9030 #endif /* CONFIG_IXGBE_DCB */
9031 static int ixgbe_reassign_macvlan_pool(struct net_device
*vdev
,
9032 struct netdev_nested_priv
*priv
)
9034 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)priv
->data
;
9035 struct ixgbe_fwd_adapter
*accel
;
9038 /* we only care about macvlans... */
9039 if (!netif_is_macvlan(vdev
))
9042 /* that have hardware offload enabled... */
9043 accel
= macvlan_accel_priv(vdev
);
9047 /* If we can relocate to a different bit do so */
9048 pool
= find_first_zero_bit(adapter
->fwd_bitmask
, adapter
->num_rx_pools
);
9049 if (pool
< adapter
->num_rx_pools
) {
9050 set_bit(pool
, adapter
->fwd_bitmask
);
9055 /* if we cannot find a free pool then disable the offload */
9056 netdev_err(vdev
, "L2FW offload disabled due to lack of queue resources\n");
9057 macvlan_release_l2fw_offload(vdev
);
9059 /* unbind the queues and drop the subordinate channel config */
9060 netdev_unbind_sb_channel(adapter
->netdev
, vdev
);
9061 netdev_set_sb_channel(vdev
, 0);
9068 static void ixgbe_defrag_macvlan_pools(struct net_device
*dev
)
9070 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
9071 struct netdev_nested_priv priv
= {
9072 .data
= (void *)adapter
,
9075 /* flush any stale bits out of the fwd bitmask */
9076 bitmap_clear(adapter
->fwd_bitmask
, 1, 63);
9078 /* walk through upper devices reassigning pools */
9079 netdev_walk_all_upper_dev_rcu(dev
, ixgbe_reassign_macvlan_pool
,
9084 * ixgbe_setup_tc - configure net_device for multiple traffic classes
9086 * @dev: net device to configure
9087 * @tc: number of traffic classes to enable
9089 int ixgbe_setup_tc(struct net_device
*dev
, u8 tc
)
9091 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
9092 struct ixgbe_hw
*hw
= &adapter
->hw
;
9094 /* Hardware supports up to 8 traffic classes */
9095 if (tc
> adapter
->dcb_cfg
.num_tcs
.pg_tcs
)
9098 if (hw
->mac
.type
== ixgbe_mac_82598EB
&& tc
&& tc
< MAX_TRAFFIC_CLASS
)
9101 /* Hardware has to reinitialize queues and interrupts to
9102 * match packet buffer alignment. Unfortunately, the
9103 * hardware is not flexible enough to do this dynamically.
9105 if (netif_running(dev
))
9108 ixgbe_reset(adapter
);
9110 ixgbe_clear_interrupt_scheme(adapter
);
9112 #ifdef CONFIG_IXGBE_DCB
9114 if (adapter
->xdp_prog
) {
9115 e_warn(probe
, "DCB is not supported with XDP\n");
9117 ixgbe_init_interrupt_scheme(adapter
);
9118 if (netif_running(dev
))
9123 netdev_set_num_tc(dev
, tc
);
9124 ixgbe_set_prio_tc_map(adapter
);
9126 adapter
->hw_tcs
= tc
;
9127 adapter
->flags
|= IXGBE_FLAG_DCB_ENABLED
;
9129 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
9130 adapter
->last_lfc_mode
= adapter
->hw
.fc
.requested_mode
;
9131 adapter
->hw
.fc
.requested_mode
= ixgbe_fc_none
;
9134 netdev_reset_tc(dev
);
9136 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
9137 adapter
->hw
.fc
.requested_mode
= adapter
->last_lfc_mode
;
9139 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
9140 adapter
->hw_tcs
= tc
;
9142 adapter
->temp_dcb_cfg
.pfc_mode_enable
= false;
9143 adapter
->dcb_cfg
.pfc_mode_enable
= false;
9146 ixgbe_validate_rtr(adapter
, tc
);
9148 #endif /* CONFIG_IXGBE_DCB */
9149 ixgbe_init_interrupt_scheme(adapter
);
9151 ixgbe_defrag_macvlan_pools(dev
);
9153 if (netif_running(dev
))
9154 return ixgbe_open(dev
);
9159 static int ixgbe_delete_clsu32(struct ixgbe_adapter
*adapter
,
9160 struct tc_cls_u32_offload
*cls
)
9162 u32 hdl
= cls
->knode
.handle
;
9163 u32 uhtid
= TC_U32_USERHTID(cls
->knode
.handle
);
9164 u32 loc
= cls
->knode
.handle
& 0xfffff;
9166 struct ixgbe_jump_table
*jump
= NULL
;
9168 if (loc
> IXGBE_MAX_HW_ENTRIES
)
9171 if ((uhtid
!= 0x800) && (uhtid
>= IXGBE_MAX_LINK_HANDLE
))
9174 /* Clear this filter in the link data it is associated with */
9175 if (uhtid
!= 0x800) {
9176 jump
= adapter
->jump_tables
[uhtid
];
9179 if (!test_bit(loc
- 1, jump
->child_loc_map
))
9181 clear_bit(loc
- 1, jump
->child_loc_map
);
9184 /* Check if the filter being deleted is a link */
9185 for (i
= 1; i
< IXGBE_MAX_LINK_HANDLE
; i
++) {
9186 jump
= adapter
->jump_tables
[i
];
9187 if (jump
&& jump
->link_hdl
== hdl
) {
9188 /* Delete filters in the hardware in the child hash
9189 * table associated with this link
9191 for (j
= 0; j
< IXGBE_MAX_HW_ENTRIES
; j
++) {
9192 if (!test_bit(j
, jump
->child_loc_map
))
9194 spin_lock(&adapter
->fdir_perfect_lock
);
9195 err
= ixgbe_update_ethtool_fdir_entry(adapter
,
9198 spin_unlock(&adapter
->fdir_perfect_lock
);
9199 clear_bit(j
, jump
->child_loc_map
);
9201 /* Remove resources for this link */
9205 adapter
->jump_tables
[i
] = NULL
;
9210 spin_lock(&adapter
->fdir_perfect_lock
);
9211 err
= ixgbe_update_ethtool_fdir_entry(adapter
, NULL
, loc
);
9212 spin_unlock(&adapter
->fdir_perfect_lock
);
9216 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter
*adapter
,
9217 struct tc_cls_u32_offload
*cls
)
9219 u32 uhtid
= TC_U32_USERHTID(cls
->hnode
.handle
);
9221 if (uhtid
>= IXGBE_MAX_LINK_HANDLE
)
9224 /* This ixgbe devices do not support hash tables at the moment
9225 * so abort when given hash tables.
9227 if (cls
->hnode
.divisor
> 0)
9230 set_bit(uhtid
- 1, &adapter
->tables
);
9234 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter
*adapter
,
9235 struct tc_cls_u32_offload
*cls
)
9237 u32 uhtid
= TC_U32_USERHTID(cls
->hnode
.handle
);
9239 if (uhtid
>= IXGBE_MAX_LINK_HANDLE
)
9242 clear_bit(uhtid
- 1, &adapter
->tables
);
9246 #ifdef CONFIG_NET_CLS_ACT
9247 struct upper_walk_data
{
9248 struct ixgbe_adapter
*adapter
;
9254 static int get_macvlan_queue(struct net_device
*upper
,
9255 struct netdev_nested_priv
*priv
)
9257 if (netif_is_macvlan(upper
)) {
9258 struct ixgbe_fwd_adapter
*vadapter
= macvlan_accel_priv(upper
);
9259 struct ixgbe_adapter
*adapter
;
9260 struct upper_walk_data
*data
;
9263 data
= (struct upper_walk_data
*)priv
->data
;
9264 ifindex
= data
->ifindex
;
9265 adapter
= data
->adapter
;
9266 if (vadapter
&& upper
->ifindex
== ifindex
) {
9267 data
->queue
= adapter
->rx_ring
[vadapter
->rx_base_queue
]->reg_idx
;
9268 data
->action
= data
->queue
;
9276 static int handle_redirect_action(struct ixgbe_adapter
*adapter
, int ifindex
,
9277 u8
*queue
, u64
*action
)
9279 struct ixgbe_ring_feature
*vmdq
= &adapter
->ring_feature
[RING_F_VMDQ
];
9280 unsigned int num_vfs
= adapter
->num_vfs
, vf
;
9281 struct netdev_nested_priv priv
;
9282 struct upper_walk_data data
;
9283 struct net_device
*upper
;
9285 /* redirect to a SRIOV VF */
9286 for (vf
= 0; vf
< num_vfs
; ++vf
) {
9287 upper
= pci_get_drvdata(adapter
->vfinfo
[vf
].vfdev
);
9288 if (upper
->ifindex
== ifindex
) {
9289 *queue
= vf
* __ALIGN_MASK(1, ~vmdq
->mask
);
9291 *action
<<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF
;
9296 /* redirect to a offloaded macvlan netdev */
9297 data
.adapter
= adapter
;
9298 data
.ifindex
= ifindex
;
9301 priv
.data
= (void *)&data
;
9302 if (netdev_walk_all_upper_dev_rcu(adapter
->netdev
,
9303 get_macvlan_queue
, &priv
)) {
9304 *action
= data
.action
;
9305 *queue
= data
.queue
;
9313 static int parse_tc_actions(struct ixgbe_adapter
*adapter
,
9314 struct tcf_exts
*exts
, u64
*action
, u8
*queue
)
9316 const struct tc_action
*a
;
9319 if (!tcf_exts_has_actions(exts
))
9322 tcf_exts_for_each_action(i
, a
, exts
) {
9324 if (is_tcf_gact_shot(a
)) {
9325 *action
= IXGBE_FDIR_DROP_QUEUE
;
9326 *queue
= IXGBE_FDIR_DROP_QUEUE
;
9330 /* Redirect to a VF or a offloaded macvlan */
9331 if (is_tcf_mirred_egress_redirect(a
)) {
9332 struct net_device
*dev
= tcf_mirred_dev(a
);
9336 return handle_redirect_action(adapter
, dev
->ifindex
,
9346 static int parse_tc_actions(struct ixgbe_adapter
*adapter
,
9347 struct tcf_exts
*exts
, u64
*action
, u8
*queue
)
9351 #endif /* CONFIG_NET_CLS_ACT */
9353 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter
*input
,
9354 union ixgbe_atr_input
*mask
,
9355 struct tc_cls_u32_offload
*cls
,
9356 struct ixgbe_mat_field
*field_ptr
,
9357 struct ixgbe_nexthdr
*nexthdr
)
9361 bool found_entry
= false, found_jump_field
= false;
9363 for (i
= 0; i
< cls
->knode
.sel
->nkeys
; i
++) {
9364 off
= cls
->knode
.sel
->keys
[i
].off
;
9365 val
= cls
->knode
.sel
->keys
[i
].val
;
9366 m
= cls
->knode
.sel
->keys
[i
].mask
;
9368 for (j
= 0; field_ptr
[j
].val
; j
++) {
9369 if (field_ptr
[j
].off
== off
) {
9370 field_ptr
[j
].val(input
, mask
, (__force u32
)val
,
9372 input
->filter
.formatted
.flow_type
|=
9379 if (nexthdr
->off
== cls
->knode
.sel
->keys
[i
].off
&&
9381 (__force u32
)cls
->knode
.sel
->keys
[i
].val
&&
9383 (__force u32
)cls
->knode
.sel
->keys
[i
].mask
)
9384 found_jump_field
= true;
9390 if (nexthdr
&& !found_jump_field
)
9396 mask
->formatted
.flow_type
= IXGBE_ATR_L4TYPE_IPV6_MASK
|
9397 IXGBE_ATR_L4TYPE_MASK
;
9399 if (input
->filter
.formatted
.flow_type
== IXGBE_ATR_FLOW_TYPE_IPV4
)
9400 mask
->formatted
.flow_type
&= IXGBE_ATR_L4TYPE_IPV6_MASK
;
9405 static int ixgbe_configure_clsu32(struct ixgbe_adapter
*adapter
,
9406 struct tc_cls_u32_offload
*cls
)
9408 __be16 protocol
= cls
->common
.protocol
;
9409 u32 loc
= cls
->knode
.handle
& 0xfffff;
9410 struct ixgbe_hw
*hw
= &adapter
->hw
;
9411 struct ixgbe_mat_field
*field_ptr
;
9412 struct ixgbe_fdir_filter
*input
= NULL
;
9413 union ixgbe_atr_input
*mask
= NULL
;
9414 struct ixgbe_jump_table
*jump
= NULL
;
9415 int i
, err
= -EINVAL
;
9417 u32 uhtid
, link_uhtid
;
9419 uhtid
= TC_U32_USERHTID(cls
->knode
.handle
);
9420 link_uhtid
= TC_U32_USERHTID(cls
->knode
.link_handle
);
9422 /* At the moment cls_u32 jumps to network layer and skips past
9423 * L2 headers. The canonical method to match L2 frames is to use
9424 * negative values. However this is error prone at best but really
9425 * just broken because there is no way to "know" what sort of hdr
9426 * is in front of the network layer. Fix cls_u32 to support L2
9427 * headers when needed.
9429 if (protocol
!= htons(ETH_P_IP
))
9432 if (loc
>= ((1024 << adapter
->fdir_pballoc
) - 2)) {
9433 e_err(drv
, "Location out of range\n");
9437 /* cls u32 is a graph starting at root node 0x800. The driver tracks
9438 * links and also the fields used to advance the parser across each
9439 * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9440 * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9441 * To add support for new nodes update ixgbe_model.h parse structures
9442 * this function _should_ be generic try not to hardcode values here.
9444 if (uhtid
== 0x800) {
9445 field_ptr
= (adapter
->jump_tables
[0])->mat
;
9447 if (uhtid
>= IXGBE_MAX_LINK_HANDLE
)
9449 if (!adapter
->jump_tables
[uhtid
])
9451 field_ptr
= (adapter
->jump_tables
[uhtid
])->mat
;
9457 /* At this point we know the field_ptr is valid and need to either
9458 * build cls_u32 link or attach filter. Because adding a link to
9459 * a handle that does not exist is invalid and the same for adding
9460 * rules to handles that don't exist.
9464 struct ixgbe_nexthdr
*nexthdr
= ixgbe_ipv4_jumps
;
9466 if (link_uhtid
>= IXGBE_MAX_LINK_HANDLE
)
9469 if (!test_bit(link_uhtid
- 1, &adapter
->tables
))
9472 /* Multiple filters as links to the same hash table are not
9473 * supported. To add a new filter with the same next header
9474 * but different match/jump conditions, create a new hash table
9477 if (adapter
->jump_tables
[link_uhtid
] &&
9478 (adapter
->jump_tables
[link_uhtid
])->link_hdl
) {
9479 e_err(drv
, "Link filter exists for link: %x\n",
9484 for (i
= 0; nexthdr
[i
].jump
; i
++) {
9485 if (nexthdr
[i
].o
!= cls
->knode
.sel
->offoff
||
9486 nexthdr
[i
].s
!= cls
->knode
.sel
->offshift
||
9488 (__force u32
)cls
->knode
.sel
->offmask
)
9491 jump
= kzalloc(sizeof(*jump
), GFP_KERNEL
);
9494 input
= kzalloc(sizeof(*input
), GFP_KERNEL
);
9499 mask
= kzalloc(sizeof(*mask
), GFP_KERNEL
);
9504 jump
->input
= input
;
9506 jump
->link_hdl
= cls
->knode
.handle
;
9508 err
= ixgbe_clsu32_build_input(input
, mask
, cls
,
9509 field_ptr
, &nexthdr
[i
]);
9511 jump
->mat
= nexthdr
[i
].jump
;
9512 adapter
->jump_tables
[link_uhtid
] = jump
;
9523 input
= kzalloc(sizeof(*input
), GFP_KERNEL
);
9526 mask
= kzalloc(sizeof(*mask
), GFP_KERNEL
);
9532 if ((uhtid
!= 0x800) && (adapter
->jump_tables
[uhtid
])) {
9533 if ((adapter
->jump_tables
[uhtid
])->input
)
9534 memcpy(input
, (adapter
->jump_tables
[uhtid
])->input
,
9536 if ((adapter
->jump_tables
[uhtid
])->mask
)
9537 memcpy(mask
, (adapter
->jump_tables
[uhtid
])->mask
,
9540 /* Lookup in all child hash tables if this location is already
9541 * filled with a filter
9543 for (i
= 1; i
< IXGBE_MAX_LINK_HANDLE
; i
++) {
9544 struct ixgbe_jump_table
*link
= adapter
->jump_tables
[i
];
9546 if (link
&& (test_bit(loc
- 1, link
->child_loc_map
))) {
9547 e_err(drv
, "Filter exists in location: %x\n",
9554 err
= ixgbe_clsu32_build_input(input
, mask
, cls
, field_ptr
, NULL
);
9558 err
= parse_tc_actions(adapter
, cls
->knode
.exts
, &input
->action
,
9563 input
->sw_idx
= loc
;
9565 spin_lock(&adapter
->fdir_perfect_lock
);
9567 if (hlist_empty(&adapter
->fdir_filter_list
)) {
9568 memcpy(&adapter
->fdir_mask
, mask
, sizeof(*mask
));
9569 err
= ixgbe_fdir_set_input_mask_82599(hw
, mask
);
9571 goto err_out_w_lock
;
9572 } else if (memcmp(&adapter
->fdir_mask
, mask
, sizeof(*mask
))) {
9574 goto err_out_w_lock
;
9577 ixgbe_atr_compute_perfect_hash_82599(&input
->filter
, mask
);
9578 err
= ixgbe_fdir_write_perfect_filter_82599(hw
, &input
->filter
,
9579 input
->sw_idx
, queue
);
9581 goto err_out_w_lock
;
9583 ixgbe_update_ethtool_fdir_entry(adapter
, input
, input
->sw_idx
);
9584 spin_unlock(&adapter
->fdir_perfect_lock
);
9586 if ((uhtid
!= 0x800) && (adapter
->jump_tables
[uhtid
]))
9587 set_bit(loc
- 1, (adapter
->jump_tables
[uhtid
])->child_loc_map
);
9592 spin_unlock(&adapter
->fdir_perfect_lock
);
9602 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter
*adapter
,
9603 struct tc_cls_u32_offload
*cls_u32
)
9605 switch (cls_u32
->command
) {
9606 case TC_CLSU32_NEW_KNODE
:
9607 case TC_CLSU32_REPLACE_KNODE
:
9608 return ixgbe_configure_clsu32(adapter
, cls_u32
);
9609 case TC_CLSU32_DELETE_KNODE
:
9610 return ixgbe_delete_clsu32(adapter
, cls_u32
);
9611 case TC_CLSU32_NEW_HNODE
:
9612 case TC_CLSU32_REPLACE_HNODE
:
9613 return ixgbe_configure_clsu32_add_hnode(adapter
, cls_u32
);
9614 case TC_CLSU32_DELETE_HNODE
:
9615 return ixgbe_configure_clsu32_del_hnode(adapter
, cls_u32
);
9621 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type
, void *type_data
,
9624 struct ixgbe_adapter
*adapter
= cb_priv
;
9626 if (!tc_cls_can_offload_and_chain0(adapter
->netdev
, type_data
))
9630 case TC_SETUP_CLSU32
:
9631 return ixgbe_setup_tc_cls_u32(adapter
, type_data
);
9637 static int ixgbe_setup_tc_mqprio(struct net_device
*dev
,
9638 struct tc_mqprio_qopt
*mqprio
)
9640 mqprio
->hw
= TC_MQPRIO_HW_OFFLOAD_TCS
;
9641 return ixgbe_setup_tc(dev
, mqprio
->num_tc
);
9644 static LIST_HEAD(ixgbe_block_cb_list
);
9646 static int __ixgbe_setup_tc(struct net_device
*dev
, enum tc_setup_type type
,
9649 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
9652 case TC_SETUP_BLOCK
:
9653 return flow_block_cb_setup_simple(type_data
,
9654 &ixgbe_block_cb_list
,
9655 ixgbe_setup_tc_block_cb
,
9656 adapter
, adapter
, true);
9657 case TC_SETUP_QDISC_MQPRIO
:
9658 return ixgbe_setup_tc_mqprio(dev
, type_data
);
9664 #ifdef CONFIG_PCI_IOV
9665 void ixgbe_sriov_reinit(struct ixgbe_adapter
*adapter
)
9667 struct net_device
*netdev
= adapter
->netdev
;
9670 ixgbe_setup_tc(netdev
, adapter
->hw_tcs
);
9675 void ixgbe_do_reset(struct net_device
*netdev
)
9677 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
9679 if (netif_running(netdev
))
9680 ixgbe_reinit_locked(adapter
);
9682 ixgbe_reset(adapter
);
9685 static netdev_features_t
ixgbe_fix_features(struct net_device
*netdev
,
9686 netdev_features_t features
)
9688 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
9690 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9691 if (!(features
& NETIF_F_RXCSUM
))
9692 features
&= ~NETIF_F_LRO
;
9694 /* Turn off LRO if not RSC capable */
9695 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
))
9696 features
&= ~NETIF_F_LRO
;
9698 if (adapter
->xdp_prog
&& (features
& NETIF_F_LRO
)) {
9699 e_dev_err("LRO is not supported with XDP\n");
9700 features
&= ~NETIF_F_LRO
;
9706 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter
*adapter
)
9708 int rss
= min_t(int, ixgbe_max_rss_indices(adapter
),
9711 /* go back to full RSS if we're not running SR-IOV */
9712 if (!adapter
->ring_feature
[RING_F_VMDQ
].offset
)
9713 adapter
->flags
&= ~(IXGBE_FLAG_VMDQ_ENABLED
|
9714 IXGBE_FLAG_SRIOV_ENABLED
);
9716 adapter
->ring_feature
[RING_F_RSS
].limit
= rss
;
9717 adapter
->ring_feature
[RING_F_VMDQ
].limit
= 1;
9719 ixgbe_setup_tc(adapter
->netdev
, adapter
->hw_tcs
);
9722 static int ixgbe_set_features(struct net_device
*netdev
,
9723 netdev_features_t features
)
9725 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
9726 netdev_features_t changed
= netdev
->features
^ features
;
9727 bool need_reset
= false;
9729 /* Make sure RSC matches LRO, reset if change */
9730 if (!(features
& NETIF_F_LRO
)) {
9731 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
9733 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
9734 } else if ((adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
) &&
9735 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)) {
9736 if (adapter
->rx_itr_setting
== 1 ||
9737 adapter
->rx_itr_setting
> IXGBE_MIN_RSC_ITR
) {
9738 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
9740 } else if ((changed
^ features
) & NETIF_F_LRO
) {
9741 e_info(probe
, "rx-usecs set too low, "
9747 * Check if Flow Director n-tuple support or hw_tc support was
9748 * enabled or disabled. If the state changed, we need to reset.
9750 if ((features
& NETIF_F_NTUPLE
) || (features
& NETIF_F_HW_TC
)) {
9751 /* turn off ATR, enable perfect filters and reset */
9752 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
9755 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
9756 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
9758 /* turn off perfect filters, enable ATR and reset */
9759 if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
9762 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
9764 /* We cannot enable ATR if SR-IOV is enabled */
9765 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
||
9766 /* We cannot enable ATR if we have 2 or more tcs */
9767 (adapter
->hw_tcs
> 1) ||
9768 /* We cannot enable ATR if RSS is disabled */
9769 (adapter
->ring_feature
[RING_F_RSS
].limit
<= 1) ||
9770 /* A sample rate of 0 indicates ATR disabled */
9771 (!adapter
->atr_sample_rate
))
9772 ; /* do nothing not supported */
9773 else /* otherwise supported and set the flag */
9774 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
9777 if (changed
& NETIF_F_RXALL
)
9780 netdev
->features
= features
;
9782 if ((changed
& NETIF_F_HW_L2FW_DOFFLOAD
) && adapter
->num_rx_pools
> 1)
9783 ixgbe_reset_l2fw_offload(adapter
);
9784 else if (need_reset
)
9785 ixgbe_do_reset(netdev
);
9786 else if (changed
& (NETIF_F_HW_VLAN_CTAG_RX
|
9787 NETIF_F_HW_VLAN_CTAG_FILTER
))
9788 ixgbe_set_rx_mode(netdev
);
9793 static int ixgbe_ndo_fdb_add(struct ndmsg
*ndm
, struct nlattr
*tb
[],
9794 struct net_device
*dev
,
9795 const unsigned char *addr
, u16 vid
,
9797 struct netlink_ext_ack
*extack
)
9799 /* guarantee we can provide a unique filter for the unicast address */
9800 if (is_unicast_ether_addr(addr
) || is_link_local_ether_addr(addr
)) {
9801 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
9802 u16 pool
= VMDQ_P(0);
9804 if (netdev_uc_count(dev
) >= ixgbe_available_rars(adapter
, pool
))
9808 return ndo_dflt_fdb_add(ndm
, tb
, dev
, addr
, vid
, flags
);
9812 * ixgbe_configure_bridge_mode - set various bridge modes
9813 * @adapter: the private structure
9814 * @mode: requested bridge mode
9816 * Configure some settings require for various bridge modes.
9818 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter
*adapter
,
9821 struct ixgbe_hw
*hw
= &adapter
->hw
;
9822 unsigned int p
, num_pools
;
9826 case BRIDGE_MODE_VEPA
:
9827 /* disable Tx loopback, rely on switch hairpin mode */
9828 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_PFDTXGSWC
, 0);
9830 /* must enable Rx switching replication to allow multicast
9831 * packet reception on all VFs, and to enable source address
9834 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VMD_CTL
);
9835 vmdctl
|= IXGBE_VT_CTL_REPLEN
;
9836 IXGBE_WRITE_REG(hw
, IXGBE_VMD_CTL
, vmdctl
);
9838 /* enable Rx source address pruning. Note, this requires
9839 * replication to be enabled or else it does nothing.
9841 num_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
9842 for (p
= 0; p
< num_pools
; p
++) {
9843 if (hw
->mac
.ops
.set_source_address_pruning
)
9844 hw
->mac
.ops
.set_source_address_pruning(hw
,
9849 case BRIDGE_MODE_VEB
:
9850 /* enable Tx loopback for internal VF/PF communication */
9851 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_PFDTXGSWC
,
9852 IXGBE_PFDTXGSWC_VT_LBEN
);
9854 /* disable Rx switching replication unless we have SR-IOV
9857 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VMD_CTL
);
9858 if (!adapter
->num_vfs
)
9859 vmdctl
&= ~IXGBE_VT_CTL_REPLEN
;
9860 IXGBE_WRITE_REG(hw
, IXGBE_VMD_CTL
, vmdctl
);
9862 /* disable Rx source address pruning, since we don't expect to
9863 * be receiving external loopback of our transmitted frames.
9865 num_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
9866 for (p
= 0; p
< num_pools
; p
++) {
9867 if (hw
->mac
.ops
.set_source_address_pruning
)
9868 hw
->mac
.ops
.set_source_address_pruning(hw
,
9877 adapter
->bridge_mode
= mode
;
9879 e_info(drv
, "enabling bridge mode: %s\n",
9880 mode
== BRIDGE_MODE_VEPA
? "VEPA" : "VEB");
9885 static int ixgbe_ndo_bridge_setlink(struct net_device
*dev
,
9886 struct nlmsghdr
*nlh
, u16 flags
,
9887 struct netlink_ext_ack
*extack
)
9889 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
9890 struct nlattr
*attr
, *br_spec
;
9893 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
9896 br_spec
= nlmsg_find_attr(nlh
, sizeof(struct ifinfomsg
), IFLA_AF_SPEC
);
9900 nla_for_each_nested(attr
, br_spec
, rem
) {
9904 if (nla_type(attr
) != IFLA_BRIDGE_MODE
)
9907 if (nla_len(attr
) < sizeof(mode
))
9910 mode
= nla_get_u16(attr
);
9911 status
= ixgbe_configure_bridge_mode(adapter
, mode
);
9921 static int ixgbe_ndo_bridge_getlink(struct sk_buff
*skb
, u32 pid
, u32 seq
,
9922 struct net_device
*dev
,
9923 u32 filter_mask
, int nlflags
)
9925 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
9927 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
9930 return ndo_dflt_bridge_getlink(skb
, pid
, seq
, dev
,
9931 adapter
->bridge_mode
, 0, 0, nlflags
,
9935 static void *ixgbe_fwd_add(struct net_device
*pdev
, struct net_device
*vdev
)
9937 struct ixgbe_adapter
*adapter
= netdev_priv(pdev
);
9938 struct ixgbe_fwd_adapter
*accel
;
9939 int tcs
= adapter
->hw_tcs
? : 1;
9942 if (adapter
->xdp_prog
) {
9943 e_warn(probe
, "L2FW offload is not supported with XDP\n");
9944 return ERR_PTR(-EINVAL
);
9947 /* The hardware supported by ixgbe only filters on the destination MAC
9948 * address. In order to avoid issues we only support offloading modes
9949 * where the hardware can actually provide the functionality.
9951 if (!macvlan_supports_dest_filter(vdev
))
9952 return ERR_PTR(-EMEDIUMTYPE
);
9954 /* We need to lock down the macvlan to be a single queue device so that
9955 * we can reuse the tc_to_txq field in the macvlan netdev to represent
9956 * the queue mapping to our netdev.
9958 if (netif_is_multiqueue(vdev
))
9959 return ERR_PTR(-ERANGE
);
9961 pool
= find_first_zero_bit(adapter
->fwd_bitmask
, adapter
->num_rx_pools
);
9962 if (pool
== adapter
->num_rx_pools
) {
9963 u16 used_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
9966 if (((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
9967 adapter
->num_rx_pools
>= (MAX_TX_QUEUES
/ tcs
)) ||
9968 adapter
->num_rx_pools
> IXGBE_MAX_MACVLANS
)
9969 return ERR_PTR(-EBUSY
);
9971 /* Hardware has a limited number of available pools. Each VF,
9972 * and the PF require a pool. Check to ensure we don't
9973 * attempt to use more then the available number of pools.
9975 if (used_pools
>= IXGBE_MAX_VF_FUNCTIONS
)
9976 return ERR_PTR(-EBUSY
);
9978 /* Enable VMDq flag so device will be set in VM mode */
9979 adapter
->flags
|= IXGBE_FLAG_VMDQ_ENABLED
|
9980 IXGBE_FLAG_SRIOV_ENABLED
;
9982 /* Try to reserve as many queues per pool as possible,
9983 * we start with the configurations that support 4 queues
9984 * per pools, followed by 2, and then by just 1 per pool.
9986 if (used_pools
< 32 && adapter
->num_rx_pools
< 16)
9987 reserved_pools
= min_t(u16
,
9989 16 - adapter
->num_rx_pools
);
9990 else if (adapter
->num_rx_pools
< 32)
9991 reserved_pools
= min_t(u16
,
9993 32 - adapter
->num_rx_pools
);
9995 reserved_pools
= 64 - used_pools
;
9998 if (!reserved_pools
)
9999 return ERR_PTR(-EBUSY
);
10001 adapter
->ring_feature
[RING_F_VMDQ
].limit
+= reserved_pools
;
10003 /* Force reinit of ring allocation with VMDQ enabled */
10004 err
= ixgbe_setup_tc(pdev
, adapter
->hw_tcs
);
10006 return ERR_PTR(err
);
10008 if (pool
>= adapter
->num_rx_pools
)
10009 return ERR_PTR(-ENOMEM
);
10012 accel
= kzalloc(sizeof(*accel
), GFP_KERNEL
);
10014 return ERR_PTR(-ENOMEM
);
10016 set_bit(pool
, adapter
->fwd_bitmask
);
10017 netdev_set_sb_channel(vdev
, pool
);
10018 accel
->pool
= pool
;
10019 accel
->netdev
= vdev
;
10021 if (!netif_running(pdev
))
10024 err
= ixgbe_fwd_ring_up(adapter
, accel
);
10026 return ERR_PTR(err
);
10031 static void ixgbe_fwd_del(struct net_device
*pdev
, void *priv
)
10033 struct ixgbe_fwd_adapter
*accel
= priv
;
10034 struct ixgbe_adapter
*adapter
= netdev_priv(pdev
);
10035 unsigned int rxbase
= accel
->rx_base_queue
;
10038 /* delete unicast filter associated with offloaded interface */
10039 ixgbe_del_mac_filter(adapter
, accel
->netdev
->dev_addr
,
10040 VMDQ_P(accel
->pool
));
10042 /* Allow remaining Rx packets to get flushed out of the
10043 * Rx FIFO before we drop the netdev for the ring.
10045 usleep_range(10000, 20000);
10047 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
10048 struct ixgbe_ring
*ring
= adapter
->rx_ring
[rxbase
+ i
];
10049 struct ixgbe_q_vector
*qv
= ring
->q_vector
;
10051 /* Make sure we aren't processing any packets and clear
10052 * netdev to shut down the ring.
10054 if (netif_running(adapter
->netdev
))
10055 napi_synchronize(&qv
->napi
);
10056 ring
->netdev
= NULL
;
10059 /* unbind the queues and drop the subordinate channel config */
10060 netdev_unbind_sb_channel(pdev
, accel
->netdev
);
10061 netdev_set_sb_channel(accel
->netdev
, 0);
10063 clear_bit(accel
->pool
, adapter
->fwd_bitmask
);
10067 #define IXGBE_MAX_MAC_HDR_LEN 127
10068 #define IXGBE_MAX_NETWORK_HDR_LEN 511
10070 static netdev_features_t
10071 ixgbe_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
10072 netdev_features_t features
)
10074 unsigned int network_hdr_len
, mac_hdr_len
;
10076 /* Make certain the headers can be described by a context descriptor */
10077 mac_hdr_len
= skb_network_header(skb
) - skb
->data
;
10078 if (unlikely(mac_hdr_len
> IXGBE_MAX_MAC_HDR_LEN
))
10079 return features
& ~(NETIF_F_HW_CSUM
|
10081 NETIF_F_GSO_UDP_L4
|
10082 NETIF_F_HW_VLAN_CTAG_TX
|
10086 network_hdr_len
= skb_checksum_start(skb
) - skb_network_header(skb
);
10087 if (unlikely(network_hdr_len
> IXGBE_MAX_NETWORK_HDR_LEN
))
10088 return features
& ~(NETIF_F_HW_CSUM
|
10090 NETIF_F_GSO_UDP_L4
|
10094 /* We can only support IPV4 TSO in tunnels if we can mangle the
10095 * inner IP ID field, so strip TSO if MANGLEID is not supported.
10096 * IPsec offoad sets skb->encapsulation but still can handle
10097 * the TSO, so it's the exception.
10099 if (skb
->encapsulation
&& !(features
& NETIF_F_TSO_MANGLEID
)) {
10100 #ifdef CONFIG_IXGBE_IPSEC
10101 if (!secpath_exists(skb
))
10103 features
&= ~NETIF_F_TSO
;
10109 static int ixgbe_xdp_setup(struct net_device
*dev
, struct bpf_prog
*prog
)
10111 int i
, frame_size
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
10112 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
10113 struct bpf_prog
*old_prog
;
10116 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
10119 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
10122 /* verify ixgbe ring attributes are sufficient for XDP */
10123 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
10124 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
10126 if (ring_is_rsc_enabled(ring
))
10129 if (frame_size
> ixgbe_rx_bufsz(ring
))
10133 if (nr_cpu_ids
> MAX_XDP_QUEUES
)
10136 old_prog
= xchg(&adapter
->xdp_prog
, prog
);
10137 need_reset
= (!!prog
!= !!old_prog
);
10139 /* If transitioning XDP modes reconfigure rings */
10144 /* Wait until ndo_xsk_wakeup completes. */
10146 err
= ixgbe_setup_tc(dev
, adapter
->hw_tcs
);
10149 rcu_assign_pointer(adapter
->xdp_prog
, old_prog
);
10153 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
10154 (void)xchg(&adapter
->rx_ring
[i
]->xdp_prog
,
10155 adapter
->xdp_prog
);
10159 bpf_prog_put(old_prog
);
10161 /* Kick start the NAPI context if there is an AF_XDP socket open
10162 * on that queue id. This so that receiving will start.
10164 if (need_reset
&& prog
)
10165 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
10166 if (adapter
->xdp_ring
[i
]->xsk_pool
)
10167 (void)ixgbe_xsk_wakeup(adapter
->netdev
, i
,
10173 static int ixgbe_xdp(struct net_device
*dev
, struct netdev_bpf
*xdp
)
10175 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
10177 switch (xdp
->command
) {
10178 case XDP_SETUP_PROG
:
10179 return ixgbe_xdp_setup(dev
, xdp
->prog
);
10180 case XDP_SETUP_XSK_POOL
:
10181 return ixgbe_xsk_pool_setup(adapter
, xdp
->xsk
.pool
,
10182 xdp
->xsk
.queue_id
);
10189 void ixgbe_xdp_ring_update_tail(struct ixgbe_ring
*ring
)
10191 /* Force memory writes to complete before letting h/w know there
10192 * are new descriptors to fetch.
10195 writel(ring
->next_to_use
, ring
->tail
);
10198 static int ixgbe_xdp_xmit(struct net_device
*dev
, int n
,
10199 struct xdp_frame
**frames
, u32 flags
)
10201 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
10202 struct ixgbe_ring
*ring
;
10206 if (unlikely(test_bit(__IXGBE_DOWN
, &adapter
->state
)))
10209 if (unlikely(flags
& ~XDP_XMIT_FLAGS_MASK
))
10212 /* During program transitions its possible adapter->xdp_prog is assigned
10213 * but ring has not been configured yet. In this case simply abort xmit.
10215 ring
= adapter
->xdp_prog
? adapter
->xdp_ring
[smp_processor_id()] : NULL
;
10216 if (unlikely(!ring
))
10219 if (unlikely(test_bit(__IXGBE_TX_DISABLED
, &ring
->state
)))
10222 for (i
= 0; i
< n
; i
++) {
10223 struct xdp_frame
*xdpf
= frames
[i
];
10226 err
= ixgbe_xmit_xdp_ring(adapter
, xdpf
);
10227 if (err
!= IXGBE_XDP_TX
)
10232 if (unlikely(flags
& XDP_XMIT_FLUSH
))
10233 ixgbe_xdp_ring_update_tail(ring
);
10238 static const struct net_device_ops ixgbe_netdev_ops
= {
10239 .ndo_open
= ixgbe_open
,
10240 .ndo_stop
= ixgbe_close
,
10241 .ndo_start_xmit
= ixgbe_xmit_frame
,
10242 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
10243 .ndo_validate_addr
= eth_validate_addr
,
10244 .ndo_set_mac_address
= ixgbe_set_mac
,
10245 .ndo_change_mtu
= ixgbe_change_mtu
,
10246 .ndo_tx_timeout
= ixgbe_tx_timeout
,
10247 .ndo_set_tx_maxrate
= ixgbe_tx_maxrate
,
10248 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
10249 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
10250 .ndo_eth_ioctl
= ixgbe_ioctl
,
10251 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
10252 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
10253 .ndo_set_vf_rate
= ixgbe_ndo_set_vf_bw
,
10254 .ndo_set_vf_spoofchk
= ixgbe_ndo_set_vf_spoofchk
,
10255 .ndo_set_vf_rss_query_en
= ixgbe_ndo_set_vf_rss_query_en
,
10256 .ndo_set_vf_trust
= ixgbe_ndo_set_vf_trust
,
10257 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
10258 .ndo_get_stats64
= ixgbe_get_stats64
,
10259 .ndo_setup_tc
= __ixgbe_setup_tc
,
10261 .ndo_select_queue
= ixgbe_select_queue
,
10262 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
10263 .ndo_fcoe_ddp_target
= ixgbe_fcoe_ddp_target
,
10264 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
10265 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
10266 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
10267 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
10268 .ndo_fcoe_get_hbainfo
= ixgbe_fcoe_get_hbainfo
,
10269 #endif /* IXGBE_FCOE */
10270 .ndo_set_features
= ixgbe_set_features
,
10271 .ndo_fix_features
= ixgbe_fix_features
,
10272 .ndo_fdb_add
= ixgbe_ndo_fdb_add
,
10273 .ndo_bridge_setlink
= ixgbe_ndo_bridge_setlink
,
10274 .ndo_bridge_getlink
= ixgbe_ndo_bridge_getlink
,
10275 .ndo_dfwd_add_station
= ixgbe_fwd_add
,
10276 .ndo_dfwd_del_station
= ixgbe_fwd_del
,
10277 .ndo_features_check
= ixgbe_features_check
,
10278 .ndo_bpf
= ixgbe_xdp
,
10279 .ndo_xdp_xmit
= ixgbe_xdp_xmit
,
10280 .ndo_xsk_wakeup
= ixgbe_xsk_wakeup
,
10283 static void ixgbe_disable_txr_hw(struct ixgbe_adapter
*adapter
,
10284 struct ixgbe_ring
*tx_ring
)
10286 unsigned long wait_delay
, delay_interval
;
10287 struct ixgbe_hw
*hw
= &adapter
->hw
;
10288 u8 reg_idx
= tx_ring
->reg_idx
;
10292 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
10294 /* delay mechanism from ixgbe_disable_tx */
10295 delay_interval
= ixgbe_get_completion_timeout(adapter
) / 100;
10297 wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
10298 wait_delay
= delay_interval
;
10300 while (wait_loop
--) {
10301 usleep_range(wait_delay
, wait_delay
+ 10);
10302 wait_delay
+= delay_interval
* 2;
10303 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
10305 if (!(txdctl
& IXGBE_TXDCTL_ENABLE
))
10309 e_err(drv
, "TXDCTL.ENABLE not cleared within the polling period\n");
10312 static void ixgbe_disable_txr(struct ixgbe_adapter
*adapter
,
10313 struct ixgbe_ring
*tx_ring
)
10315 set_bit(__IXGBE_TX_DISABLED
, &tx_ring
->state
);
10316 ixgbe_disable_txr_hw(adapter
, tx_ring
);
10319 static void ixgbe_disable_rxr_hw(struct ixgbe_adapter
*adapter
,
10320 struct ixgbe_ring
*rx_ring
)
10322 unsigned long wait_delay
, delay_interval
;
10323 struct ixgbe_hw
*hw
= &adapter
->hw
;
10324 u8 reg_idx
= rx_ring
->reg_idx
;
10328 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
10329 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
10330 rxdctl
|= IXGBE_RXDCTL_SWFLSH
;
10332 /* write value back with RXDCTL.ENABLE bit cleared */
10333 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
10335 /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
10336 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
10337 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
10340 /* delay mechanism from ixgbe_disable_rx */
10341 delay_interval
= ixgbe_get_completion_timeout(adapter
) / 100;
10343 wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
10344 wait_delay
= delay_interval
;
10346 while (wait_loop
--) {
10347 usleep_range(wait_delay
, wait_delay
+ 10);
10348 wait_delay
+= delay_interval
* 2;
10349 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
10351 if (!(rxdctl
& IXGBE_RXDCTL_ENABLE
))
10355 e_err(drv
, "RXDCTL.ENABLE not cleared within the polling period\n");
10358 static void ixgbe_reset_txr_stats(struct ixgbe_ring
*tx_ring
)
10360 memset(&tx_ring
->stats
, 0, sizeof(tx_ring
->stats
));
10361 memset(&tx_ring
->tx_stats
, 0, sizeof(tx_ring
->tx_stats
));
10364 static void ixgbe_reset_rxr_stats(struct ixgbe_ring
*rx_ring
)
10366 memset(&rx_ring
->stats
, 0, sizeof(rx_ring
->stats
));
10367 memset(&rx_ring
->rx_stats
, 0, sizeof(rx_ring
->rx_stats
));
10371 * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings
10372 * @adapter: adapter structure
10373 * @ring: ring index
10375 * This function disables a certain Rx/Tx/XDP Tx ring. The function
10376 * assumes that the netdev is running.
10378 void ixgbe_txrx_ring_disable(struct ixgbe_adapter
*adapter
, int ring
)
10380 struct ixgbe_ring
*rx_ring
, *tx_ring
, *xdp_ring
;
10382 rx_ring
= adapter
->rx_ring
[ring
];
10383 tx_ring
= adapter
->tx_ring
[ring
];
10384 xdp_ring
= adapter
->xdp_ring
[ring
];
10386 ixgbe_disable_txr(adapter
, tx_ring
);
10388 ixgbe_disable_txr(adapter
, xdp_ring
);
10389 ixgbe_disable_rxr_hw(adapter
, rx_ring
);
10394 /* Rx/Tx/XDP Tx share the same napi context. */
10395 napi_disable(&rx_ring
->q_vector
->napi
);
10397 ixgbe_clean_tx_ring(tx_ring
);
10399 ixgbe_clean_tx_ring(xdp_ring
);
10400 ixgbe_clean_rx_ring(rx_ring
);
10402 ixgbe_reset_txr_stats(tx_ring
);
10404 ixgbe_reset_txr_stats(xdp_ring
);
10405 ixgbe_reset_rxr_stats(rx_ring
);
10409 * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings
10410 * @adapter: adapter structure
10411 * @ring: ring index
10413 * This function enables a certain Rx/Tx/XDP Tx ring. The function
10414 * assumes that the netdev is running.
10416 void ixgbe_txrx_ring_enable(struct ixgbe_adapter
*adapter
, int ring
)
10418 struct ixgbe_ring
*rx_ring
, *tx_ring
, *xdp_ring
;
10420 rx_ring
= adapter
->rx_ring
[ring
];
10421 tx_ring
= adapter
->tx_ring
[ring
];
10422 xdp_ring
= adapter
->xdp_ring
[ring
];
10424 /* Rx/Tx/XDP Tx share the same napi context. */
10425 napi_enable(&rx_ring
->q_vector
->napi
);
10427 ixgbe_configure_tx_ring(adapter
, tx_ring
);
10429 ixgbe_configure_tx_ring(adapter
, xdp_ring
);
10430 ixgbe_configure_rx_ring(adapter
, rx_ring
);
10432 clear_bit(__IXGBE_TX_DISABLED
, &tx_ring
->state
);
10434 clear_bit(__IXGBE_TX_DISABLED
, &xdp_ring
->state
);
10438 * ixgbe_enumerate_functions - Get the number of ports this device has
10439 * @adapter: adapter structure
10441 * This function enumerates the phsyical functions co-located on a single slot,
10442 * in order to determine how many ports a device has. This is most useful in
10443 * determining the required GT/s of PCIe bandwidth necessary for optimal
10446 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter
*adapter
)
10448 struct pci_dev
*entry
, *pdev
= adapter
->pdev
;
10451 /* Some cards can not use the generic count PCIe functions method,
10452 * because they are behind a parent switch, so we hardcode these with
10453 * the correct number of functions.
10455 if (ixgbe_pcie_from_parent(&adapter
->hw
))
10458 list_for_each_entry(entry
, &adapter
->pdev
->bus
->devices
, bus_list
) {
10459 /* don't count virtual functions */
10460 if (entry
->is_virtfn
)
10463 /* When the devices on the bus don't all match our device ID,
10464 * we can't reliably determine the correct number of
10465 * functions. This can occur if a function has been direct
10466 * attached to a virtual machine using VT-d, for example. In
10467 * this case, simply return -1 to indicate this.
10469 if ((entry
->vendor
!= pdev
->vendor
) ||
10470 (entry
->device
!= pdev
->device
))
10480 * ixgbe_wol_supported - Check whether device supports WoL
10481 * @adapter: the adapter private structure
10482 * @device_id: the device ID
10483 * @subdevice_id: the subsystem device ID
10485 * This function is used by probe and ethtool to determine
10486 * which devices have WoL support
10489 bool ixgbe_wol_supported(struct ixgbe_adapter
*adapter
, u16 device_id
,
10492 struct ixgbe_hw
*hw
= &adapter
->hw
;
10493 u16 wol_cap
= adapter
->eeprom_cap
& IXGBE_DEVICE_CAPS_WOL_MASK
;
10495 /* WOL not supported on 82598 */
10496 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
10499 /* check eeprom to see if WOL is enabled for X540 and newer */
10500 if (hw
->mac
.type
>= ixgbe_mac_X540
) {
10501 if ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0_1
) ||
10502 ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0
) &&
10503 (hw
->bus
.func
== 0)))
10507 /* WOL is determined based on device IDs for 82599 MACs */
10508 switch (device_id
) {
10509 case IXGBE_DEV_ID_82599_SFP
:
10510 /* Only these subdevices could supports WOL */
10511 switch (subdevice_id
) {
10512 case IXGBE_SUBDEV_ID_82599_560FLR
:
10513 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6
:
10514 case IXGBE_SUBDEV_ID_82599_SFP_WOL0
:
10515 case IXGBE_SUBDEV_ID_82599_SFP_2OCP
:
10516 /* only support first port */
10517 if (hw
->bus
.func
!= 0)
10520 case IXGBE_SUBDEV_ID_82599_SP_560FLR
:
10521 case IXGBE_SUBDEV_ID_82599_SFP
:
10522 case IXGBE_SUBDEV_ID_82599_RNDC
:
10523 case IXGBE_SUBDEV_ID_82599_ECNA_DP
:
10524 case IXGBE_SUBDEV_ID_82599_SFP_1OCP
:
10525 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1
:
10526 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2
:
10530 case IXGBE_DEV_ID_82599EN_SFP
:
10531 /* Only these subdevices support WOL */
10532 switch (subdevice_id
) {
10533 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1
:
10537 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE
:
10538 /* All except this subdevice support WOL */
10539 if (subdevice_id
!= IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ
)
10542 case IXGBE_DEV_ID_82599_KX4
:
10552 * ixgbe_set_fw_version - Set FW version
10553 * @adapter: the adapter private structure
10555 * This function is used by probe and ethtool to determine the FW version to
10556 * format to display. The FW version is taken from the EEPROM/NVM.
10558 static void ixgbe_set_fw_version(struct ixgbe_adapter
*adapter
)
10560 struct ixgbe_hw
*hw
= &adapter
->hw
;
10561 struct ixgbe_nvm_version nvm_ver
;
10563 ixgbe_get_oem_prod_version(hw
, &nvm_ver
);
10564 if (nvm_ver
.oem_valid
) {
10565 snprintf(adapter
->eeprom_id
, sizeof(adapter
->eeprom_id
),
10566 "%x.%x.%x", nvm_ver
.oem_major
, nvm_ver
.oem_minor
,
10567 nvm_ver
.oem_release
);
10571 ixgbe_get_etk_id(hw
, &nvm_ver
);
10572 ixgbe_get_orom_version(hw
, &nvm_ver
);
10574 if (nvm_ver
.or_valid
) {
10575 snprintf(adapter
->eeprom_id
, sizeof(adapter
->eeprom_id
),
10576 "0x%08x, %d.%d.%d", nvm_ver
.etk_id
, nvm_ver
.or_major
,
10577 nvm_ver
.or_build
, nvm_ver
.or_patch
);
10581 /* Set ETrack ID format */
10582 snprintf(adapter
->eeprom_id
, sizeof(adapter
->eeprom_id
),
10583 "0x%08x", nvm_ver
.etk_id
);
10587 * ixgbe_probe - Device Initialization Routine
10588 * @pdev: PCI device information struct
10589 * @ent: entry in ixgbe_pci_tbl
10591 * Returns 0 on success, negative on failure
10593 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10594 * The OS initialization, configuring of the adapter private structure,
10595 * and a hardware reset occur.
10597 static int ixgbe_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
10599 struct net_device
*netdev
;
10600 struct ixgbe_adapter
*adapter
= NULL
;
10601 struct ixgbe_hw
*hw
;
10602 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
10603 int i
, err
, pci_using_dac
, expected_gts
;
10604 unsigned int indices
= MAX_TX_QUEUES
;
10605 u8 part_str
[IXGBE_PBANUM_LENGTH
];
10606 bool disable_dev
= false;
10612 /* Catch broken hardware that put the wrong VF device ID in
10613 * the PCIe SR-IOV capability.
10615 if (pdev
->is_virtfn
) {
10616 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
10617 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
10621 err
= pci_enable_device_mem(pdev
);
10625 if (!dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64))) {
10628 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
10630 dev_err(&pdev
->dev
,
10631 "No usable DMA configuration, aborting\n");
10637 err
= pci_request_mem_regions(pdev
, ixgbe_driver_name
);
10639 dev_err(&pdev
->dev
,
10640 "pci_request_selected_regions failed 0x%x\n", err
);
10644 pci_enable_pcie_error_reporting(pdev
);
10646 pci_set_master(pdev
);
10647 pci_save_state(pdev
);
10649 if (ii
->mac
== ixgbe_mac_82598EB
) {
10650 #ifdef CONFIG_IXGBE_DCB
10651 /* 8 TC w/ 4 queues per TC */
10652 indices
= 4 * MAX_TRAFFIC_CLASS
;
10654 indices
= IXGBE_MAX_RSS_INDICES
;
10658 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
10661 goto err_alloc_etherdev
;
10664 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
10666 adapter
= netdev_priv(netdev
);
10668 adapter
->netdev
= netdev
;
10669 adapter
->pdev
= pdev
;
10671 hw
->back
= adapter
;
10672 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
10674 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
10675 pci_resource_len(pdev
, 0));
10676 adapter
->io_addr
= hw
->hw_addr
;
10677 if (!hw
->hw_addr
) {
10682 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
10683 ixgbe_set_ethtool_ops(netdev
);
10684 netdev
->watchdog_timeo
= 5 * HZ
;
10685 strlcpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
));
10688 hw
->mac
.ops
= *ii
->mac_ops
;
10689 hw
->mac
.type
= ii
->mac
;
10690 hw
->mvals
= ii
->mvals
;
10692 hw
->link
.ops
= *ii
->link_ops
;
10695 hw
->eeprom
.ops
= *ii
->eeprom_ops
;
10696 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC(hw
));
10697 if (ixgbe_removed(hw
->hw_addr
)) {
10701 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10702 if (!(eec
& BIT(8)))
10703 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
10706 hw
->phy
.ops
= *ii
->phy_ops
;
10707 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
10708 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10709 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
10710 hw
->phy
.mdio
.mmds
= 0;
10711 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
10712 hw
->phy
.mdio
.dev
= netdev
;
10713 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
10714 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
10716 /* setup the private structure */
10717 err
= ixgbe_sw_init(adapter
, ii
);
10721 switch (adapter
->hw
.mac
.type
) {
10722 case ixgbe_mac_X550
:
10723 case ixgbe_mac_X550EM_x
:
10724 netdev
->udp_tunnel_nic_info
= &ixgbe_udp_tunnels_x550
;
10726 case ixgbe_mac_x550em_a
:
10727 netdev
->udp_tunnel_nic_info
= &ixgbe_udp_tunnels_x550em_a
;
10733 /* Make sure the SWFW semaphore is in a valid state */
10734 if (hw
->mac
.ops
.init_swfw_sync
)
10735 hw
->mac
.ops
.init_swfw_sync(hw
);
10737 /* Make it possible the adapter to be woken up via WOL */
10738 switch (adapter
->hw
.mac
.type
) {
10739 case ixgbe_mac_82599EB
:
10740 case ixgbe_mac_X540
:
10741 case ixgbe_mac_X550
:
10742 case ixgbe_mac_X550EM_x
:
10743 case ixgbe_mac_x550em_a
:
10744 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
10751 * If there is a fan on this device and it has failed log the
10754 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
10755 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
10756 if (esdp
& IXGBE_ESDP_SDP1
)
10757 e_crit(probe
, "Fan has stopped, replace the adapter\n");
10760 if (allow_unsupported_sfp
)
10761 hw
->allow_unsupported_sfp
= allow_unsupported_sfp
;
10763 /* reset_hw fills in the perm_addr as well */
10764 hw
->phy
.reset_if_overtemp
= true;
10765 err
= hw
->mac
.ops
.reset_hw(hw
);
10766 hw
->phy
.reset_if_overtemp
= false;
10767 ixgbe_set_eee_capable(adapter
);
10768 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
10770 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
10771 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10772 e_dev_err("Reload the driver after installing a supported module.\n");
10775 e_dev_err("HW Init failed: %d\n", err
);
10779 #ifdef CONFIG_PCI_IOV
10780 /* SR-IOV not supported on the 82598 */
10781 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
10784 ixgbe_init_mbx_params_pf(hw
);
10785 hw
->mbx
.ops
= ii
->mbx_ops
;
10786 pci_sriov_set_totalvfs(pdev
, IXGBE_MAX_VFS_DRV_LIMIT
);
10787 ixgbe_enable_sriov(adapter
, max_vfs
);
10791 netdev
->features
= NETIF_F_SG
|
10798 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10799 NETIF_F_GSO_GRE_CSUM | \
10800 NETIF_F_GSO_IPXIP4 | \
10801 NETIF_F_GSO_IPXIP6 | \
10802 NETIF_F_GSO_UDP_TUNNEL | \
10803 NETIF_F_GSO_UDP_TUNNEL_CSUM)
10805 netdev
->gso_partial_features
= IXGBE_GSO_PARTIAL_FEATURES
;
10806 netdev
->features
|= NETIF_F_GSO_PARTIAL
|
10807 IXGBE_GSO_PARTIAL_FEATURES
;
10809 if (hw
->mac
.type
>= ixgbe_mac_82599EB
)
10810 netdev
->features
|= NETIF_F_SCTP_CRC
| NETIF_F_GSO_UDP_L4
;
10812 #ifdef CONFIG_IXGBE_IPSEC
10813 #define IXGBE_ESP_FEATURES (NETIF_F_HW_ESP | \
10814 NETIF_F_HW_ESP_TX_CSUM | \
10817 if (adapter
->ipsec
)
10818 netdev
->features
|= IXGBE_ESP_FEATURES
;
10820 /* copy netdev features into list of user selectable features */
10821 netdev
->hw_features
|= netdev
->features
|
10822 NETIF_F_HW_VLAN_CTAG_FILTER
|
10823 NETIF_F_HW_VLAN_CTAG_RX
|
10824 NETIF_F_HW_VLAN_CTAG_TX
|
10826 NETIF_F_HW_L2FW_DOFFLOAD
;
10828 if (hw
->mac
.type
>= ixgbe_mac_82599EB
)
10829 netdev
->hw_features
|= NETIF_F_NTUPLE
|
10833 netdev
->features
|= NETIF_F_HIGHDMA
;
10835 netdev
->vlan_features
|= netdev
->features
| NETIF_F_TSO_MANGLEID
;
10836 netdev
->hw_enc_features
|= netdev
->vlan_features
;
10837 netdev
->mpls_features
|= NETIF_F_SG
|
10841 netdev
->mpls_features
|= IXGBE_GSO_PARTIAL_FEATURES
;
10843 /* set this bit last since it cannot be part of vlan_features */
10844 netdev
->features
|= NETIF_F_HW_VLAN_CTAG_FILTER
|
10845 NETIF_F_HW_VLAN_CTAG_RX
|
10846 NETIF_F_HW_VLAN_CTAG_TX
;
10848 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
10849 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
10851 /* MTU range: 68 - 9710 */
10852 netdev
->min_mtu
= ETH_MIN_MTU
;
10853 netdev
->max_mtu
= IXGBE_MAX_JUMBO_FRAME_SIZE
- (ETH_HLEN
+ ETH_FCS_LEN
);
10855 #ifdef CONFIG_IXGBE_DCB
10856 if (adapter
->flags
& IXGBE_FLAG_DCB_CAPABLE
)
10857 netdev
->dcbnl_ops
= &ixgbe_dcbnl_ops
;
10861 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
10862 unsigned int fcoe_l
;
10864 if (hw
->mac
.ops
.get_device_caps
) {
10865 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
10866 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
10867 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
10871 fcoe_l
= min_t(int, IXGBE_FCRETA_SIZE
, num_online_cpus());
10872 adapter
->ring_feature
[RING_F_FCOE
].limit
= fcoe_l
;
10874 netdev
->features
|= NETIF_F_FSO
|
10877 netdev
->vlan_features
|= NETIF_F_FSO
|
10881 #endif /* IXGBE_FCOE */
10882 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
10883 netdev
->hw_features
|= NETIF_F_LRO
;
10884 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
10885 netdev
->features
|= NETIF_F_LRO
;
10887 if (ixgbe_check_fw_error(adapter
)) {
10892 /* make sure the EEPROM is good */
10893 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
10894 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10899 eth_platform_get_mac_address(&adapter
->pdev
->dev
,
10900 adapter
->hw
.mac
.perm_addr
);
10902 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
10904 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
10905 e_dev_err("invalid MAC address\n");
10910 /* Set hw->mac.addr to permanent MAC address */
10911 ether_addr_copy(hw
->mac
.addr
, hw
->mac
.perm_addr
);
10912 ixgbe_mac_set_default_filter(adapter
);
10914 timer_setup(&adapter
->service_timer
, ixgbe_service_timer
, 0);
10916 if (ixgbe_removed(hw
->hw_addr
)) {
10920 INIT_WORK(&adapter
->service_task
, ixgbe_service_task
);
10921 set_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
);
10922 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
10924 err
= ixgbe_init_interrupt_scheme(adapter
);
10928 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
10929 u64_stats_init(&adapter
->rx_ring
[i
]->syncp
);
10930 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
10931 u64_stats_init(&adapter
->tx_ring
[i
]->syncp
);
10932 for (i
= 0; i
< adapter
->num_xdp_queues
; i
++)
10933 u64_stats_init(&adapter
->xdp_ring
[i
]->syncp
);
10935 /* WOL not supported for all devices */
10937 hw
->eeprom
.ops
.read(hw
, 0x2c, &adapter
->eeprom_cap
);
10938 hw
->wol_enabled
= ixgbe_wol_supported(adapter
, pdev
->device
,
10939 pdev
->subsystem_device
);
10940 if (hw
->wol_enabled
)
10941 adapter
->wol
= IXGBE_WUFC_MAG
;
10943 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
10945 /* save off EEPROM version number */
10946 ixgbe_set_fw_version(adapter
);
10948 /* pick up the PCI bus settings for reporting later */
10949 if (ixgbe_pcie_from_parent(hw
))
10950 ixgbe_get_parent_bus_info(adapter
);
10952 hw
->mac
.ops
.get_bus_info(hw
);
10954 /* calculate the expected PCIe bandwidth required for optimal
10955 * performance. Note that some older parts will never have enough
10956 * bandwidth due to being older generation PCIe parts. We clamp these
10957 * parts to ensure no warning is displayed if it can't be fixed.
10959 switch (hw
->mac
.type
) {
10960 case ixgbe_mac_82598EB
:
10961 expected_gts
= min(ixgbe_enumerate_functions(adapter
) * 10, 16);
10964 expected_gts
= ixgbe_enumerate_functions(adapter
) * 10;
10968 /* don't check link if we failed to enumerate functions */
10969 if (expected_gts
> 0)
10970 ixgbe_check_minimum_link(adapter
, expected_gts
);
10972 err
= ixgbe_read_pba_string_generic(hw
, part_str
, sizeof(part_str
));
10974 strlcpy(part_str
, "Unknown", sizeof(part_str
));
10975 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
10976 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10977 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
10980 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10981 hw
->mac
.type
, hw
->phy
.type
, part_str
);
10983 e_dev_info("%pM\n", netdev
->dev_addr
);
10985 /* reset the hardware with the new settings */
10986 err
= hw
->mac
.ops
.start_hw(hw
);
10987 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
10988 /* We are running on a pre-production device, log a warning */
10989 e_dev_warn("This device is a pre-production adapter/LOM. "
10990 "Please be aware there may be issues associated "
10991 "with your hardware. If you are experiencing "
10992 "problems please contact your Intel or hardware "
10993 "representative who provided you with this "
10996 strcpy(netdev
->name
, "eth%d");
10997 pci_set_drvdata(pdev
, adapter
);
10998 err
= register_netdev(netdev
);
11003 /* power down the optics for 82599 SFP+ fiber */
11004 if (hw
->mac
.ops
.disable_tx_laser
)
11005 hw
->mac
.ops
.disable_tx_laser(hw
);
11007 /* carrier off reporting is important to ethtool even BEFORE open */
11008 netif_carrier_off(netdev
);
11010 #ifdef CONFIG_IXGBE_DCA
11011 if (dca_add_requester(&pdev
->dev
) == 0) {
11012 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
11013 ixgbe_setup_dca(adapter
);
11016 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
11017 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
11018 for (i
= 0; i
< adapter
->num_vfs
; i
++)
11019 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
11022 /* firmware requires driver version to be 0xFFFFFFFF
11023 * since os does not support feature
11025 if (hw
->mac
.ops
.set_fw_drv_ver
)
11026 hw
->mac
.ops
.set_fw_drv_ver(hw
, 0xFF, 0xFF, 0xFF, 0xFF,
11027 sizeof(UTS_RELEASE
) - 1,
11030 /* add san mac addr to netdev */
11031 ixgbe_add_sanmac_netdev(netdev
);
11033 e_dev_info("%s\n", ixgbe_default_device_descr
);
11035 #ifdef CONFIG_IXGBE_HWMON
11036 if (ixgbe_sysfs_init(adapter
))
11037 e_err(probe
, "failed to allocate sysfs resources\n");
11038 #endif /* CONFIG_IXGBE_HWMON */
11040 ixgbe_dbg_adapter_init(adapter
);
11042 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
11043 if (ixgbe_mng_enabled(hw
) && ixgbe_is_sfp(hw
) && hw
->mac
.ops
.setup_link
)
11044 hw
->mac
.ops
.setup_link(hw
,
11045 IXGBE_LINK_SPEED_10GB_FULL
| IXGBE_LINK_SPEED_1GB_FULL
,
11048 err
= ixgbe_mii_bus_init(hw
);
11055 unregister_netdev(netdev
);
11057 ixgbe_release_hw_control(adapter
);
11058 ixgbe_clear_interrupt_scheme(adapter
);
11060 ixgbe_disable_sriov(adapter
);
11061 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
11062 iounmap(adapter
->io_addr
);
11063 kfree(adapter
->jump_tables
[0]);
11064 kfree(adapter
->mac_table
);
11065 kfree(adapter
->rss_key
);
11066 bitmap_free(adapter
->af_xdp_zc_qps
);
11068 disable_dev
= !test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
);
11069 free_netdev(netdev
);
11070 err_alloc_etherdev
:
11071 pci_disable_pcie_error_reporting(pdev
);
11072 pci_release_mem_regions(pdev
);
11075 if (!adapter
|| disable_dev
)
11076 pci_disable_device(pdev
);
11081 * ixgbe_remove - Device Removal Routine
11082 * @pdev: PCI device information struct
11084 * ixgbe_remove is called by the PCI subsystem to alert the driver
11085 * that it should release a PCI device. The could be caused by a
11086 * Hot-Plug event, or because the driver is going to be removed from
11089 static void ixgbe_remove(struct pci_dev
*pdev
)
11091 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
11092 struct net_device
*netdev
;
11096 /* if !adapter then we already cleaned up in probe */
11100 netdev
= adapter
->netdev
;
11101 ixgbe_dbg_adapter_exit(adapter
);
11103 set_bit(__IXGBE_REMOVING
, &adapter
->state
);
11104 cancel_work_sync(&adapter
->service_task
);
11106 if (adapter
->mii_bus
)
11107 mdiobus_unregister(adapter
->mii_bus
);
11109 #ifdef CONFIG_IXGBE_DCA
11110 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
11111 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
11112 dca_remove_requester(&pdev
->dev
);
11113 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
11114 IXGBE_DCA_CTRL_DCA_DISABLE
);
11118 #ifdef CONFIG_IXGBE_HWMON
11119 ixgbe_sysfs_exit(adapter
);
11120 #endif /* CONFIG_IXGBE_HWMON */
11122 /* remove the added san mac */
11123 ixgbe_del_sanmac_netdev(netdev
);
11125 #ifdef CONFIG_PCI_IOV
11126 ixgbe_disable_sriov(adapter
);
11128 if (netdev
->reg_state
== NETREG_REGISTERED
)
11129 unregister_netdev(netdev
);
11131 ixgbe_stop_ipsec_offload(adapter
);
11132 ixgbe_clear_interrupt_scheme(adapter
);
11134 ixgbe_release_hw_control(adapter
);
11137 kfree(adapter
->ixgbe_ieee_pfc
);
11138 kfree(adapter
->ixgbe_ieee_ets
);
11141 iounmap(adapter
->io_addr
);
11142 pci_release_mem_regions(pdev
);
11144 e_dev_info("complete\n");
11146 for (i
= 0; i
< IXGBE_MAX_LINK_HANDLE
; i
++) {
11147 if (adapter
->jump_tables
[i
]) {
11148 kfree(adapter
->jump_tables
[i
]->input
);
11149 kfree(adapter
->jump_tables
[i
]->mask
);
11151 kfree(adapter
->jump_tables
[i
]);
11154 kfree(adapter
->mac_table
);
11155 kfree(adapter
->rss_key
);
11156 bitmap_free(adapter
->af_xdp_zc_qps
);
11157 disable_dev
= !test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
);
11158 free_netdev(netdev
);
11160 pci_disable_pcie_error_reporting(pdev
);
11163 pci_disable_device(pdev
);
11167 * ixgbe_io_error_detected - called when PCI error is detected
11168 * @pdev: Pointer to PCI device
11169 * @state: The current pci connection state
11171 * This function is called after a PCI bus error affecting
11172 * this device has been detected.
11174 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
11175 pci_channel_state_t state
)
11177 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
11178 struct net_device
*netdev
= adapter
->netdev
;
11180 #ifdef CONFIG_PCI_IOV
11181 struct ixgbe_hw
*hw
= &adapter
->hw
;
11182 struct pci_dev
*bdev
, *vfdev
;
11183 u32 dw0
, dw1
, dw2
, dw3
;
11185 u16 req_id
, pf_func
;
11187 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
11188 adapter
->num_vfs
== 0)
11189 goto skip_bad_vf_detection
;
11191 bdev
= pdev
->bus
->self
;
11192 while (bdev
&& (pci_pcie_type(bdev
) != PCI_EXP_TYPE_ROOT_PORT
))
11193 bdev
= bdev
->bus
->self
;
11196 goto skip_bad_vf_detection
;
11198 pos
= pci_find_ext_capability(bdev
, PCI_EXT_CAP_ID_ERR
);
11200 goto skip_bad_vf_detection
;
11202 dw0
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
);
11203 dw1
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 4);
11204 dw2
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 8);
11205 dw3
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 12);
11206 if (ixgbe_removed(hw
->hw_addr
))
11207 goto skip_bad_vf_detection
;
11209 req_id
= dw1
>> 16;
11210 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11211 if (!(req_id
& 0x0080))
11212 goto skip_bad_vf_detection
;
11214 pf_func
= req_id
& 0x01;
11215 if ((pf_func
& 1) == (pdev
->devfn
& 1)) {
11216 unsigned int device_id
;
11218 vf
= (req_id
& 0x7F) >> 1;
11219 e_dev_err("VF %d has caused a PCIe error\n", vf
);
11220 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11221 "%8.8x\tdw3: %8.8x\n",
11222 dw0
, dw1
, dw2
, dw3
);
11223 switch (adapter
->hw
.mac
.type
) {
11224 case ixgbe_mac_82599EB
:
11225 device_id
= IXGBE_82599_VF_DEVICE_ID
;
11227 case ixgbe_mac_X540
:
11228 device_id
= IXGBE_X540_VF_DEVICE_ID
;
11230 case ixgbe_mac_X550
:
11231 device_id
= IXGBE_DEV_ID_X550_VF
;
11233 case ixgbe_mac_X550EM_x
:
11234 device_id
= IXGBE_DEV_ID_X550EM_X_VF
;
11236 case ixgbe_mac_x550em_a
:
11237 device_id
= IXGBE_DEV_ID_X550EM_A_VF
;
11244 /* Find the pci device of the offending VF */
11245 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
, device_id
, NULL
);
11247 if (vfdev
->devfn
== (req_id
& 0xFF))
11249 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
,
11253 * There's a slim chance the VF could have been hot plugged,
11254 * so if it is no longer present we don't need to issue the
11255 * VFLR. Just clean up the AER in that case.
11259 /* Free device reference count */
11260 pci_dev_put(vfdev
);
11265 * Even though the error may have occurred on the other port
11266 * we still need to increment the vf error reference count for
11267 * both ports because the I/O resume function will be called
11268 * for both of them.
11270 adapter
->vferr_refcount
++;
11272 return PCI_ERS_RESULT_RECOVERED
;
11274 skip_bad_vf_detection
:
11275 #endif /* CONFIG_PCI_IOV */
11276 if (!test_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
))
11277 return PCI_ERS_RESULT_DISCONNECT
;
11279 if (!netif_device_present(netdev
))
11280 return PCI_ERS_RESULT_DISCONNECT
;
11283 netif_device_detach(netdev
);
11285 if (netif_running(netdev
))
11286 ixgbe_close_suspend(adapter
);
11288 if (state
== pci_channel_io_perm_failure
) {
11290 return PCI_ERS_RESULT_DISCONNECT
;
11293 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
11294 pci_disable_device(pdev
);
11297 /* Request a slot reset. */
11298 return PCI_ERS_RESULT_NEED_RESET
;
11302 * ixgbe_io_slot_reset - called after the pci bus has been reset.
11303 * @pdev: Pointer to PCI device
11305 * Restart the card from scratch, as if from a cold-boot.
11307 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
11309 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
11310 pci_ers_result_t result
;
11312 if (pci_enable_device_mem(pdev
)) {
11313 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
11314 result
= PCI_ERS_RESULT_DISCONNECT
;
11316 smp_mb__before_atomic();
11317 clear_bit(__IXGBE_DISABLED
, &adapter
->state
);
11318 adapter
->hw
.hw_addr
= adapter
->io_addr
;
11319 pci_set_master(pdev
);
11320 pci_restore_state(pdev
);
11321 pci_save_state(pdev
);
11323 pci_wake_from_d3(pdev
, false);
11325 ixgbe_reset(adapter
);
11326 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
11327 result
= PCI_ERS_RESULT_RECOVERED
;
11334 * ixgbe_io_resume - called when traffic can start flowing again.
11335 * @pdev: Pointer to PCI device
11337 * This callback is called when the error recovery driver tells us that
11338 * its OK to resume normal operation.
11340 static void ixgbe_io_resume(struct pci_dev
*pdev
)
11342 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
11343 struct net_device
*netdev
= adapter
->netdev
;
11345 #ifdef CONFIG_PCI_IOV
11346 if (adapter
->vferr_refcount
) {
11347 e_info(drv
, "Resuming after VF err\n");
11348 adapter
->vferr_refcount
--;
11354 if (netif_running(netdev
))
11355 ixgbe_open(netdev
);
11357 netif_device_attach(netdev
);
11361 static const struct pci_error_handlers ixgbe_err_handler
= {
11362 .error_detected
= ixgbe_io_error_detected
,
11363 .slot_reset
= ixgbe_io_slot_reset
,
11364 .resume
= ixgbe_io_resume
,
11367 static SIMPLE_DEV_PM_OPS(ixgbe_pm_ops
, ixgbe_suspend
, ixgbe_resume
);
11369 static struct pci_driver ixgbe_driver
= {
11370 .name
= ixgbe_driver_name
,
11371 .id_table
= ixgbe_pci_tbl
,
11372 .probe
= ixgbe_probe
,
11373 .remove
= ixgbe_remove
,
11374 .driver
.pm
= &ixgbe_pm_ops
,
11375 .shutdown
= ixgbe_shutdown
,
11376 .sriov_configure
= ixgbe_pci_sriov_configure
,
11377 .err_handler
= &ixgbe_err_handler
11381 * ixgbe_init_module - Driver Registration Routine
11383 * ixgbe_init_module is the first routine called when the driver is
11384 * loaded. All it does is register with the PCI subsystem.
11386 static int __init
ixgbe_init_module(void)
11389 pr_info("%s\n", ixgbe_driver_string
);
11390 pr_info("%s\n", ixgbe_copyright
);
11392 ixgbe_wq
= create_singlethread_workqueue(ixgbe_driver_name
);
11394 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name
);
11400 ret
= pci_register_driver(&ixgbe_driver
);
11402 destroy_workqueue(ixgbe_wq
);
11407 #ifdef CONFIG_IXGBE_DCA
11408 dca_register_notify(&dca_notifier
);
11414 module_init(ixgbe_init_module
);
11417 * ixgbe_exit_module - Driver Exit Cleanup Routine
11419 * ixgbe_exit_module is called just before the driver is removed
11422 static void __exit
ixgbe_exit_module(void)
11424 #ifdef CONFIG_IXGBE_DCA
11425 dca_unregister_notify(&dca_notifier
);
11427 pci_unregister_driver(&ixgbe_driver
);
11431 destroy_workqueue(ixgbe_wq
);
11436 #ifdef CONFIG_IXGBE_DCA
11437 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
11442 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
11443 __ixgbe_notify_dca
);
11445 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
11448 #endif /* CONFIG_IXGBE_DCA */
11450 module_exit(ixgbe_exit_module
);