1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/prefetch.h>
48 #include <scsi/fc/fc_fcoe.h>
51 #include "ixgbe_common.h"
52 #include "ixgbe_dcb_82599.h"
53 #include "ixgbe_sriov.h"
55 char ixgbe_driver_name
[] = "ixgbe";
56 static const char ixgbe_driver_string
[] =
57 "Intel(R) 10 Gigabit PCI Express Network Driver";
59 char ixgbe_default_device_descr
[] =
60 "Intel(R) 10 Gigabit Network Connection";
62 static char ixgbe_default_device_descr
[] =
63 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
69 __stringify(BUILD) "-k"
70 const char ixgbe_driver_version
[] = DRV_VERSION
;
71 static const char ixgbe_copyright
[] =
72 "Copyright (c) 1999-2012 Intel Corporation.";
74 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
75 [board_82598
] = &ixgbe_82598_info
,
76 [board_82599
] = &ixgbe_82599_info
,
77 [board_X540
] = &ixgbe_X540_info
,
80 /* ixgbe_pci_tbl - PCI Device ID Table
82 * Wildcard entries (PCI_ANY_ID) should come last
83 * Last entry must be all 0s
85 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
86 * Class, Class Mask, private data (not used) }
88 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl
) = {
89 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
), board_82598
},
90 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
), board_82598
},
91 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
), board_82598
},
92 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
), board_82598
},
93 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
), board_82598
},
94 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
), board_82598
},
95 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
), board_82598
},
96 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
), board_82598
},
97 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
), board_82598
},
98 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
), board_82598
},
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
), board_82598
},
100 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
), board_82598
},
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
), board_82599
},
102 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
), board_82599
},
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
), board_82599
},
104 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
), board_82599
},
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
), board_82599
},
106 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
), board_82599
},
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
), board_82599
},
108 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_BACKPLANE_FCOE
), board_82599
},
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_FCOE
), board_82599
},
110 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
), board_82599
},
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
), board_82599
},
112 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T
), board_X540
},
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF2
), board_82599
},
114 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_LS
), board_82599
},
115 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599EN_SFP
), board_82599
},
116 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF_QP
), board_82599
},
117 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T1
), board_X540
},
118 /* required last entry */
121 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
123 #ifdef CONFIG_IXGBE_DCA
124 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
126 static struct notifier_block dca_notifier
= {
127 .notifier_call
= ixgbe_notify_dca
,
133 #ifdef CONFIG_PCI_IOV
134 static unsigned int max_vfs
;
135 module_param(max_vfs
, uint
, 0);
136 MODULE_PARM_DESC(max_vfs
,
137 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63");
138 #endif /* CONFIG_PCI_IOV */
140 static unsigned int allow_unsupported_sfp
;
141 module_param(allow_unsupported_sfp
, uint
, 0);
142 MODULE_PARM_DESC(allow_unsupported_sfp
,
143 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
145 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
146 static int debug
= -1;
147 module_param(debug
, int, 0);
148 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
150 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
151 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
152 MODULE_LICENSE("GPL");
153 MODULE_VERSION(DRV_VERSION
);
155 static void ixgbe_service_event_schedule(struct ixgbe_adapter
*adapter
)
157 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
) &&
158 !test_and_set_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
))
159 schedule_work(&adapter
->service_task
);
162 static void ixgbe_service_event_complete(struct ixgbe_adapter
*adapter
)
164 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
));
166 /* flush memory to make sure state is correct before next watchdog */
167 smp_mb__before_clear_bit();
168 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
171 struct ixgbe_reg_info
{
176 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
178 /* General Registers */
179 {IXGBE_CTRL
, "CTRL"},
180 {IXGBE_STATUS
, "STATUS"},
181 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
183 /* Interrupt Registers */
184 {IXGBE_EICR
, "EICR"},
187 {IXGBE_SRRCTL(0), "SRRCTL"},
188 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
189 {IXGBE_RDLEN(0), "RDLEN"},
190 {IXGBE_RDH(0), "RDH"},
191 {IXGBE_RDT(0), "RDT"},
192 {IXGBE_RXDCTL(0), "RXDCTL"},
193 {IXGBE_RDBAL(0), "RDBAL"},
194 {IXGBE_RDBAH(0), "RDBAH"},
197 {IXGBE_TDBAL(0), "TDBAL"},
198 {IXGBE_TDBAH(0), "TDBAH"},
199 {IXGBE_TDLEN(0), "TDLEN"},
200 {IXGBE_TDH(0), "TDH"},
201 {IXGBE_TDT(0), "TDT"},
202 {IXGBE_TXDCTL(0), "TXDCTL"},
204 /* List Terminator */
210 * ixgbe_regdump - register printout routine
212 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
218 switch (reginfo
->ofs
) {
219 case IXGBE_SRRCTL(0):
220 for (i
= 0; i
< 64; i
++)
221 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
223 case IXGBE_DCA_RXCTRL(0):
224 for (i
= 0; i
< 64; i
++)
225 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
228 for (i
= 0; i
< 64; i
++)
229 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
232 for (i
= 0; i
< 64; i
++)
233 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
236 for (i
= 0; i
< 64; i
++)
237 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
239 case IXGBE_RXDCTL(0):
240 for (i
= 0; i
< 64; i
++)
241 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
244 for (i
= 0; i
< 64; i
++)
245 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
248 for (i
= 0; i
< 64; i
++)
249 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
252 for (i
= 0; i
< 64; i
++)
253 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
256 for (i
= 0; i
< 64; i
++)
257 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
260 for (i
= 0; i
< 64; i
++)
261 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
264 for (i
= 0; i
< 64; i
++)
265 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
268 for (i
= 0; i
< 64; i
++)
269 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
271 case IXGBE_TXDCTL(0):
272 for (i
= 0; i
< 64; i
++)
273 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
276 pr_info("%-15s %08x\n", reginfo
->name
,
277 IXGBE_READ_REG(hw
, reginfo
->ofs
));
281 for (i
= 0; i
< 8; i
++) {
282 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
283 pr_err("%-15s", rname
);
284 for (j
= 0; j
< 8; j
++)
285 pr_cont(" %08x", regs
[i
*8+j
]);
292 * ixgbe_dump - Print registers, tx-rings and rx-rings
294 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
296 struct net_device
*netdev
= adapter
->netdev
;
297 struct ixgbe_hw
*hw
= &adapter
->hw
;
298 struct ixgbe_reg_info
*reginfo
;
300 struct ixgbe_ring
*tx_ring
;
301 struct ixgbe_tx_buffer
*tx_buffer
;
302 union ixgbe_adv_tx_desc
*tx_desc
;
303 struct my_u0
{ u64 a
; u64 b
; } *u0
;
304 struct ixgbe_ring
*rx_ring
;
305 union ixgbe_adv_rx_desc
*rx_desc
;
306 struct ixgbe_rx_buffer
*rx_buffer_info
;
310 if (!netif_msg_hw(adapter
))
313 /* Print netdevice Info */
315 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
316 pr_info("Device Name state "
317 "trans_start last_rx\n");
318 pr_info("%-15s %016lX %016lX %016lX\n",
325 /* Print Registers */
326 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
327 pr_info(" Register Name Value\n");
328 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
329 reginfo
->name
; reginfo
++) {
330 ixgbe_regdump(hw
, reginfo
);
333 /* Print TX Ring Summary */
334 if (!netdev
|| !netif_running(netdev
))
337 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
338 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
339 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
340 tx_ring
= adapter
->tx_ring
[n
];
341 tx_buffer
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
342 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
343 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
344 (u64
)dma_unmap_addr(tx_buffer
, dma
),
345 dma_unmap_len(tx_buffer
, len
),
346 tx_buffer
->next_to_watch
,
347 (u64
)tx_buffer
->time_stamp
);
351 if (!netif_msg_tx_done(adapter
))
352 goto rx_ring_summary
;
354 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
356 /* Transmit Descriptor Formats
358 * Advanced Transmit Descriptor
359 * +--------------------------------------------------------------+
360 * 0 | Buffer Address [63:0] |
361 * +--------------------------------------------------------------+
362 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
363 * +--------------------------------------------------------------+
364 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
367 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
368 tx_ring
= adapter
->tx_ring
[n
];
369 pr_info("------------------------------------\n");
370 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
371 pr_info("------------------------------------\n");
372 pr_info("T [desc] [address 63:0 ] "
373 "[PlPOIdStDDt Ln] [bi->dma ] "
374 "leng ntw timestamp bi->skb\n");
376 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
377 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
378 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
379 u0
= (struct my_u0
*)tx_desc
;
380 pr_info("T [0x%03X] %016llX %016llX %016llX"
381 " %04X %p %016llX %p", i
,
384 (u64
)dma_unmap_addr(tx_buffer
, dma
),
385 dma_unmap_len(tx_buffer
, len
),
386 tx_buffer
->next_to_watch
,
387 (u64
)tx_buffer
->time_stamp
,
389 if (i
== tx_ring
->next_to_use
&&
390 i
== tx_ring
->next_to_clean
)
392 else if (i
== tx_ring
->next_to_use
)
394 else if (i
== tx_ring
->next_to_clean
)
399 if (netif_msg_pktdata(adapter
) &&
401 print_hex_dump(KERN_INFO
, "",
402 DUMP_PREFIX_ADDRESS
, 16, 1,
403 tx_buffer
->skb
->data
,
404 dma_unmap_len(tx_buffer
, len
),
409 /* Print RX Rings Summary */
411 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
412 pr_info("Queue [NTU] [NTC]\n");
413 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
414 rx_ring
= adapter
->rx_ring
[n
];
415 pr_info("%5d %5X %5X\n",
416 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
420 if (!netif_msg_rx_status(adapter
))
423 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
425 /* Advanced Receive Descriptor (Read) Format
427 * +-----------------------------------------------------+
428 * 0 | Packet Buffer Address [63:1] |A0/NSE|
429 * +----------------------------------------------+------+
430 * 8 | Header Buffer Address [63:1] | DD |
431 * +-----------------------------------------------------+
434 * Advanced Receive Descriptor (Write-Back) Format
436 * 63 48 47 32 31 30 21 20 16 15 4 3 0
437 * +------------------------------------------------------+
438 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
439 * | Checksum Ident | | | | Type | Type |
440 * +------------------------------------------------------+
441 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
442 * +------------------------------------------------------+
443 * 63 48 47 32 31 20 19 0
445 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
446 rx_ring
= adapter
->rx_ring
[n
];
447 pr_info("------------------------------------\n");
448 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
449 pr_info("------------------------------------\n");
450 pr_info("R [desc] [ PktBuf A0] "
451 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
452 "<-- Adv Rx Read format\n");
453 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
454 "[vl er S cks ln] ---------------- [bi->skb] "
455 "<-- Adv Rx Write-Back format\n");
457 for (i
= 0; i
< rx_ring
->count
; i
++) {
458 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
459 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
460 u0
= (struct my_u0
*)rx_desc
;
461 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
462 if (staterr
& IXGBE_RXD_STAT_DD
) {
463 /* Descriptor Done */
464 pr_info("RWB[0x%03X] %016llX "
465 "%016llX ---------------- %p", i
,
468 rx_buffer_info
->skb
);
470 pr_info("R [0x%03X] %016llX "
471 "%016llX %016llX %p", i
,
474 (u64
)rx_buffer_info
->dma
,
475 rx_buffer_info
->skb
);
477 if (netif_msg_pktdata(adapter
) &&
478 rx_buffer_info
->dma
) {
479 print_hex_dump(KERN_INFO
, "",
480 DUMP_PREFIX_ADDRESS
, 16, 1,
481 page_address(rx_buffer_info
->page
) +
482 rx_buffer_info
->page_offset
,
483 ixgbe_rx_bufsz(rx_ring
), true);
487 if (i
== rx_ring
->next_to_use
)
489 else if (i
== rx_ring
->next_to_clean
)
501 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
505 /* Let firmware take over control of h/w */
506 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
507 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
508 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
511 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
515 /* Let firmware know the driver has taken over */
516 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
517 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
518 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
522 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
523 * @adapter: pointer to adapter struct
524 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
525 * @queue: queue to map the corresponding interrupt to
526 * @msix_vector: the vector to map to the corresponding queue
529 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
530 u8 queue
, u8 msix_vector
)
533 struct ixgbe_hw
*hw
= &adapter
->hw
;
534 switch (hw
->mac
.type
) {
535 case ixgbe_mac_82598EB
:
536 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
539 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
540 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
541 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
542 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
543 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
545 case ixgbe_mac_82599EB
:
547 if (direction
== -1) {
549 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
550 index
= ((queue
& 1) * 8);
551 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
552 ivar
&= ~(0xFF << index
);
553 ivar
|= (msix_vector
<< index
);
554 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
557 /* tx or rx causes */
558 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
559 index
= ((16 * (queue
& 1)) + (8 * direction
));
560 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
561 ivar
&= ~(0xFF << index
);
562 ivar
|= (msix_vector
<< index
);
563 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
571 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
576 switch (adapter
->hw
.mac
.type
) {
577 case ixgbe_mac_82598EB
:
578 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
579 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
581 case ixgbe_mac_82599EB
:
583 mask
= (qmask
& 0xFFFFFFFF);
584 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
585 mask
= (qmask
>> 32);
586 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
593 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring
*ring
,
594 struct ixgbe_tx_buffer
*tx_buffer
)
596 if (tx_buffer
->skb
) {
597 dev_kfree_skb_any(tx_buffer
->skb
);
598 if (dma_unmap_len(tx_buffer
, len
))
599 dma_unmap_single(ring
->dev
,
600 dma_unmap_addr(tx_buffer
, dma
),
601 dma_unmap_len(tx_buffer
, len
),
603 } else if (dma_unmap_len(tx_buffer
, len
)) {
604 dma_unmap_page(ring
->dev
,
605 dma_unmap_addr(tx_buffer
, dma
),
606 dma_unmap_len(tx_buffer
, len
),
609 tx_buffer
->next_to_watch
= NULL
;
610 tx_buffer
->skb
= NULL
;
611 dma_unmap_len_set(tx_buffer
, len
, 0);
612 /* tx_buffer must be completely set up in the transmit path */
615 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter
*adapter
)
617 struct ixgbe_hw
*hw
= &adapter
->hw
;
618 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
622 if ((hw
->fc
.current_mode
!= ixgbe_fc_full
) &&
623 (hw
->fc
.current_mode
!= ixgbe_fc_rx_pause
))
626 switch (hw
->mac
.type
) {
627 case ixgbe_mac_82598EB
:
628 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
631 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
633 hwstats
->lxoffrxc
+= data
;
635 /* refill credits (no tx hang) if we received xoff */
639 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
640 clear_bit(__IXGBE_HANG_CHECK_ARMED
,
641 &adapter
->tx_ring
[i
]->state
);
644 static void ixgbe_update_xoff_received(struct ixgbe_adapter
*adapter
)
646 struct ixgbe_hw
*hw
= &adapter
->hw
;
647 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
650 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
652 if (adapter
->ixgbe_ieee_pfc
)
653 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
655 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) || !pfc_en
) {
656 ixgbe_update_xoff_rx_lfc(adapter
);
660 /* update stats for each tc, only valid with PFC enabled */
661 for (i
= 0; i
< MAX_TX_PACKET_BUFFERS
; i
++) {
662 switch (hw
->mac
.type
) {
663 case ixgbe_mac_82598EB
:
664 xoff
[i
] = IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
667 xoff
[i
] = IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
669 hwstats
->pxoffrxc
[i
] += xoff
[i
];
672 /* disarm tx queues that have received xoff frames */
673 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
674 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
675 u8 tc
= tx_ring
->dcb_tc
;
678 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
682 static u64
ixgbe_get_tx_completed(struct ixgbe_ring
*ring
)
684 return ring
->stats
.packets
;
687 static u64
ixgbe_get_tx_pending(struct ixgbe_ring
*ring
)
689 struct ixgbe_adapter
*adapter
= netdev_priv(ring
->netdev
);
690 struct ixgbe_hw
*hw
= &adapter
->hw
;
692 u32 head
= IXGBE_READ_REG(hw
, IXGBE_TDH(ring
->reg_idx
));
693 u32 tail
= IXGBE_READ_REG(hw
, IXGBE_TDT(ring
->reg_idx
));
696 return (head
< tail
) ?
697 tail
- head
: (tail
+ ring
->count
- head
);
702 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring
*tx_ring
)
704 u32 tx_done
= ixgbe_get_tx_completed(tx_ring
);
705 u32 tx_done_old
= tx_ring
->tx_stats
.tx_done_old
;
706 u32 tx_pending
= ixgbe_get_tx_pending(tx_ring
);
709 clear_check_for_tx_hang(tx_ring
);
712 * Check for a hung queue, but be thorough. This verifies
713 * that a transmit has been completed since the previous
714 * check AND there is at least one packet pending. The
715 * ARMED bit is set to indicate a potential hang. The
716 * bit is cleared if a pause frame is received to remove
717 * false hang detection due to PFC or 802.3x frames. By
718 * requiring this to fail twice we avoid races with
719 * pfc clearing the ARMED bit and conditions where we
720 * run the check_tx_hang logic with a transmit completion
721 * pending but without time to complete it yet.
723 if ((tx_done_old
== tx_done
) && tx_pending
) {
724 /* make sure it is true for two checks in a row */
725 ret
= test_and_set_bit(__IXGBE_HANG_CHECK_ARMED
,
728 /* update completed stats and continue */
729 tx_ring
->tx_stats
.tx_done_old
= tx_done
;
730 /* reset the countdown */
731 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
738 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
739 * @adapter: driver private struct
741 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter
*adapter
)
744 /* Do the reset outside of interrupt context */
745 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
746 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
747 ixgbe_service_event_schedule(adapter
);
752 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
753 * @q_vector: structure containing interrupt and ring information
754 * @tx_ring: tx ring to clean
756 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
757 struct ixgbe_ring
*tx_ring
)
759 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
760 struct ixgbe_tx_buffer
*tx_buffer
;
761 union ixgbe_adv_tx_desc
*tx_desc
;
762 unsigned int total_bytes
= 0, total_packets
= 0;
763 unsigned int budget
= q_vector
->tx
.work_limit
;
764 unsigned int i
= tx_ring
->next_to_clean
;
766 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
769 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
770 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
774 union ixgbe_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
776 /* if next_to_watch is not set then there is no work pending */
780 /* prevent any other reads prior to eop_desc */
783 /* if DD is not set pending work has not been completed */
784 if (!(eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)))
787 /* clear next_to_watch to prevent false hangs */
788 tx_buffer
->next_to_watch
= NULL
;
790 /* update the statistics for this packet */
791 total_bytes
+= tx_buffer
->bytecount
;
792 total_packets
+= tx_buffer
->gso_segs
;
794 #ifdef CONFIG_IXGBE_PTP
795 if (unlikely(tx_buffer
->tx_flags
& IXGBE_TX_FLAGS_TSTAMP
))
796 ixgbe_ptp_tx_hwtstamp(q_vector
, tx_buffer
->skb
);
800 dev_kfree_skb_any(tx_buffer
->skb
);
802 /* unmap skb header data */
803 dma_unmap_single(tx_ring
->dev
,
804 dma_unmap_addr(tx_buffer
, dma
),
805 dma_unmap_len(tx_buffer
, len
),
808 /* clear tx_buffer data */
809 tx_buffer
->skb
= NULL
;
810 dma_unmap_len_set(tx_buffer
, len
, 0);
812 /* unmap remaining buffers */
813 while (tx_desc
!= eop_desc
) {
819 tx_buffer
= tx_ring
->tx_buffer_info
;
820 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
823 /* unmap any remaining paged data */
824 if (dma_unmap_len(tx_buffer
, len
)) {
825 dma_unmap_page(tx_ring
->dev
,
826 dma_unmap_addr(tx_buffer
, dma
),
827 dma_unmap_len(tx_buffer
, len
),
829 dma_unmap_len_set(tx_buffer
, len
, 0);
833 /* move us one more past the eop_desc for start of next pkt */
839 tx_buffer
= tx_ring
->tx_buffer_info
;
840 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
843 /* issue prefetch for next Tx descriptor */
846 /* update budget accounting */
848 } while (likely(budget
));
851 tx_ring
->next_to_clean
= i
;
852 u64_stats_update_begin(&tx_ring
->syncp
);
853 tx_ring
->stats
.bytes
+= total_bytes
;
854 tx_ring
->stats
.packets
+= total_packets
;
855 u64_stats_update_end(&tx_ring
->syncp
);
856 q_vector
->tx
.total_bytes
+= total_bytes
;
857 q_vector
->tx
.total_packets
+= total_packets
;
859 if (check_for_tx_hang(tx_ring
) && ixgbe_check_tx_hang(tx_ring
)) {
860 /* schedule immediate reset if we believe we hung */
861 struct ixgbe_hw
*hw
= &adapter
->hw
;
862 e_err(drv
, "Detected Tx Unit Hang\n"
864 " TDH, TDT <%x>, <%x>\n"
865 " next_to_use <%x>\n"
866 " next_to_clean <%x>\n"
867 "tx_buffer_info[next_to_clean]\n"
868 " time_stamp <%lx>\n"
870 tx_ring
->queue_index
,
871 IXGBE_READ_REG(hw
, IXGBE_TDH(tx_ring
->reg_idx
)),
872 IXGBE_READ_REG(hw
, IXGBE_TDT(tx_ring
->reg_idx
)),
873 tx_ring
->next_to_use
, i
,
874 tx_ring
->tx_buffer_info
[i
].time_stamp
, jiffies
);
876 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
879 "tx hang %d detected on queue %d, resetting adapter\n",
880 adapter
->tx_timeout_count
+ 1, tx_ring
->queue_index
);
882 /* schedule immediate reset if we believe we hung */
883 ixgbe_tx_timeout_reset(adapter
);
885 /* the adapter is about to reset, no point in enabling stuff */
889 netdev_tx_completed_queue(txring_txq(tx_ring
),
890 total_packets
, total_bytes
);
892 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
893 if (unlikely(total_packets
&& netif_carrier_ok(tx_ring
->netdev
) &&
894 (ixgbe_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
895 /* Make sure that anybody stopping the queue after this
896 * sees the new next_to_clean.
899 if (__netif_subqueue_stopped(tx_ring
->netdev
,
900 tx_ring
->queue_index
)
901 && !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
902 netif_wake_subqueue(tx_ring
->netdev
,
903 tx_ring
->queue_index
);
904 ++tx_ring
->tx_stats
.restart_queue
;
911 #ifdef CONFIG_IXGBE_DCA
912 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
913 struct ixgbe_ring
*tx_ring
,
916 struct ixgbe_hw
*hw
= &adapter
->hw
;
917 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
920 switch (hw
->mac
.type
) {
921 case ixgbe_mac_82598EB
:
922 reg_offset
= IXGBE_DCA_TXCTRL(tx_ring
->reg_idx
);
924 case ixgbe_mac_82599EB
:
926 reg_offset
= IXGBE_DCA_TXCTRL_82599(tx_ring
->reg_idx
);
927 txctrl
<<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
;
930 /* for unknown hardware do not write register */
935 * We can enable relaxed ordering for reads, but not writes when
936 * DCA is enabled. This is due to a known issue in some chipsets
937 * which will cause the DCA tag to be cleared.
939 txctrl
|= IXGBE_DCA_TXCTRL_DESC_RRO_EN
|
940 IXGBE_DCA_TXCTRL_DATA_RRO_EN
|
941 IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
943 IXGBE_WRITE_REG(hw
, reg_offset
, txctrl
);
946 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
947 struct ixgbe_ring
*rx_ring
,
950 struct ixgbe_hw
*hw
= &adapter
->hw
;
951 u32 rxctrl
= dca3_get_tag(rx_ring
->dev
, cpu
);
952 u8 reg_idx
= rx_ring
->reg_idx
;
955 switch (hw
->mac
.type
) {
956 case ixgbe_mac_82599EB
:
958 rxctrl
<<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
;
965 * We can enable relaxed ordering for reads, but not writes when
966 * DCA is enabled. This is due to a known issue in some chipsets
967 * which will cause the DCA tag to be cleared.
969 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_RRO_EN
|
970 IXGBE_DCA_RXCTRL_DATA_DCA_EN
|
971 IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
973 IXGBE_WRITE_REG(hw
, IXGBE_DCA_RXCTRL(reg_idx
), rxctrl
);
976 static void ixgbe_update_dca(struct ixgbe_q_vector
*q_vector
)
978 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
979 struct ixgbe_ring
*ring
;
982 if (q_vector
->cpu
== cpu
)
985 ixgbe_for_each_ring(ring
, q_vector
->tx
)
986 ixgbe_update_tx_dca(adapter
, ring
, cpu
);
988 ixgbe_for_each_ring(ring
, q_vector
->rx
)
989 ixgbe_update_rx_dca(adapter
, ring
, cpu
);
996 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
1000 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
1003 /* always use CB2 mode, difference is masked in the CB driver */
1004 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
1006 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1007 adapter
->q_vector
[i
]->cpu
= -1;
1008 ixgbe_update_dca(adapter
->q_vector
[i
]);
1012 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
1014 struct ixgbe_adapter
*adapter
= dev_get_drvdata(dev
);
1015 unsigned long event
= *(unsigned long *)data
;
1017 if (!(adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
))
1021 case DCA_PROVIDER_ADD
:
1022 /* if we're already enabled, don't do it again */
1023 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1025 if (dca_add_requester(dev
) == 0) {
1026 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
1027 ixgbe_setup_dca(adapter
);
1030 /* Fall Through since DCA is disabled. */
1031 case DCA_PROVIDER_REMOVE
:
1032 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
1033 dca_remove_requester(dev
);
1034 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
1035 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
1043 #endif /* CONFIG_IXGBE_DCA */
1044 static inline void ixgbe_rx_hash(struct ixgbe_ring
*ring
,
1045 union ixgbe_adv_rx_desc
*rx_desc
,
1046 struct sk_buff
*skb
)
1048 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
1049 skb
->rxhash
= le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
);
1054 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1055 * @ring: structure containing ring specific data
1056 * @rx_desc: advanced rx descriptor
1058 * Returns : true if it is FCoE pkt
1060 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring
*ring
,
1061 union ixgbe_adv_rx_desc
*rx_desc
)
1063 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1065 return test_bit(__IXGBE_RX_FCOE
, &ring
->state
) &&
1066 ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK
)) ==
1067 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE
<<
1068 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT
)));
1071 #endif /* IXGBE_FCOE */
1073 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1074 * @ring: structure containing ring specific data
1075 * @rx_desc: current Rx descriptor being processed
1076 * @skb: skb currently being received and modified
1078 static inline void ixgbe_rx_checksum(struct ixgbe_ring
*ring
,
1079 union ixgbe_adv_rx_desc
*rx_desc
,
1080 struct sk_buff
*skb
)
1082 skb_checksum_none_assert(skb
);
1084 /* Rx csum disabled */
1085 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
1088 /* if IP and error */
1089 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_IPCS
) &&
1090 ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_IPE
)) {
1091 ring
->rx_stats
.csum_err
++;
1095 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_L4CS
))
1098 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_TCPE
)) {
1099 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1102 * 82599 errata, UDP frames with a 0 checksum can be marked as
1105 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP
)) &&
1106 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR
, &ring
->state
))
1109 ring
->rx_stats
.csum_err
++;
1113 /* It must be a TCP or UDP packet with a valid checksum */
1114 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1117 static inline void ixgbe_release_rx_desc(struct ixgbe_ring
*rx_ring
, u32 val
)
1119 rx_ring
->next_to_use
= val
;
1121 /* update next to alloc since we have filled the ring */
1122 rx_ring
->next_to_alloc
= val
;
1124 * Force memory writes to complete before letting h/w
1125 * know there are new descriptors to fetch. (Only
1126 * applicable for weak-ordered memory model archs,
1130 writel(val
, rx_ring
->tail
);
1133 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring
*rx_ring
,
1134 struct ixgbe_rx_buffer
*bi
)
1136 struct page
*page
= bi
->page
;
1137 dma_addr_t dma
= bi
->dma
;
1139 /* since we are recycling buffers we should seldom need to alloc */
1143 /* alloc new page for storage */
1144 if (likely(!page
)) {
1145 page
= __skb_alloc_pages(GFP_ATOMIC
| __GFP_COLD
| __GFP_COMP
,
1146 bi
->skb
, ixgbe_rx_pg_order(rx_ring
));
1147 if (unlikely(!page
)) {
1148 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1154 /* map page for use */
1155 dma
= dma_map_page(rx_ring
->dev
, page
, 0,
1156 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1159 * if mapping failed free memory back to system since
1160 * there isn't much point in holding memory we can't use
1162 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
1163 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1166 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1171 bi
->page_offset
= 0;
1177 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1178 * @rx_ring: ring to place buffers on
1179 * @cleaned_count: number of buffers to replace
1181 void ixgbe_alloc_rx_buffers(struct ixgbe_ring
*rx_ring
, u16 cleaned_count
)
1183 union ixgbe_adv_rx_desc
*rx_desc
;
1184 struct ixgbe_rx_buffer
*bi
;
1185 u16 i
= rx_ring
->next_to_use
;
1191 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
1192 bi
= &rx_ring
->rx_buffer_info
[i
];
1193 i
-= rx_ring
->count
;
1196 if (!ixgbe_alloc_mapped_page(rx_ring
, bi
))
1200 * Refresh the desc even if buffer_addrs didn't change
1201 * because each write-back erases this info.
1203 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
1209 rx_desc
= IXGBE_RX_DESC(rx_ring
, 0);
1210 bi
= rx_ring
->rx_buffer_info
;
1211 i
-= rx_ring
->count
;
1214 /* clear the hdr_addr for the next_to_use descriptor */
1215 rx_desc
->read
.hdr_addr
= 0;
1218 } while (cleaned_count
);
1220 i
+= rx_ring
->count
;
1222 if (rx_ring
->next_to_use
!= i
)
1223 ixgbe_release_rx_desc(rx_ring
, i
);
1227 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1228 * @data: pointer to the start of the headers
1229 * @max_len: total length of section to find headers in
1231 * This function is meant to determine the length of headers that will
1232 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1233 * motivation of doing this is to only perform one pull for IPv4 TCP
1234 * packets so that we can do basic things like calculating the gso_size
1235 * based on the average data per packet.
1237 static unsigned int ixgbe_get_headlen(unsigned char *data
,
1238 unsigned int max_len
)
1241 unsigned char *network
;
1244 struct vlan_hdr
*vlan
;
1247 struct ipv6hdr
*ipv6
;
1250 u8 nexthdr
= 0; /* default to not TCP */
1253 /* this should never happen, but better safe than sorry */
1254 if (max_len
< ETH_HLEN
)
1257 /* initialize network frame pointer */
1260 /* set first protocol and move network header forward */
1261 protocol
= hdr
.eth
->h_proto
;
1262 hdr
.network
+= ETH_HLEN
;
1264 /* handle any vlan tag if present */
1265 if (protocol
== __constant_htons(ETH_P_8021Q
)) {
1266 if ((hdr
.network
- data
) > (max_len
- VLAN_HLEN
))
1269 protocol
= hdr
.vlan
->h_vlan_encapsulated_proto
;
1270 hdr
.network
+= VLAN_HLEN
;
1273 /* handle L3 protocols */
1274 if (protocol
== __constant_htons(ETH_P_IP
)) {
1275 if ((hdr
.network
- data
) > (max_len
- sizeof(struct iphdr
)))
1278 /* access ihl as a u8 to avoid unaligned access on ia64 */
1279 hlen
= (hdr
.network
[0] & 0x0F) << 2;
1281 /* verify hlen meets minimum size requirements */
1282 if (hlen
< sizeof(struct iphdr
))
1283 return hdr
.network
- data
;
1285 /* record next protocol */
1286 nexthdr
= hdr
.ipv4
->protocol
;
1287 hdr
.network
+= hlen
;
1288 } else if (protocol
== __constant_htons(ETH_P_IPV6
)) {
1289 if ((hdr
.network
- data
) > (max_len
- sizeof(struct ipv6hdr
)))
1292 /* record next protocol */
1293 nexthdr
= hdr
.ipv6
->nexthdr
;
1294 hdr
.network
+= sizeof(struct ipv6hdr
);
1296 } else if (protocol
== __constant_htons(ETH_P_FCOE
)) {
1297 if ((hdr
.network
- data
) > (max_len
- FCOE_HEADER_LEN
))
1299 hdr
.network
+= FCOE_HEADER_LEN
;
1302 return hdr
.network
- data
;
1305 /* finally sort out TCP/UDP */
1306 if (nexthdr
== IPPROTO_TCP
) {
1307 if ((hdr
.network
- data
) > (max_len
- sizeof(struct tcphdr
)))
1310 /* access doff as a u8 to avoid unaligned access on ia64 */
1311 hlen
= (hdr
.network
[12] & 0xF0) >> 2;
1313 /* verify hlen meets minimum size requirements */
1314 if (hlen
< sizeof(struct tcphdr
))
1315 return hdr
.network
- data
;
1317 hdr
.network
+= hlen
;
1318 } else if (nexthdr
== IPPROTO_UDP
) {
1319 if ((hdr
.network
- data
) > (max_len
- sizeof(struct udphdr
)))
1322 hdr
.network
+= sizeof(struct udphdr
);
1326 * If everything has gone correctly hdr.network should be the
1327 * data section of the packet and will be the end of the header.
1328 * If not then it probably represents the end of the last recognized
1331 if ((hdr
.network
- data
) < max_len
)
1332 return hdr
.network
- data
;
1337 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring
*ring
,
1338 struct sk_buff
*skb
)
1340 u16 hdr_len
= skb_headlen(skb
);
1342 /* set gso_size to avoid messing up TCP MSS */
1343 skb_shinfo(skb
)->gso_size
= DIV_ROUND_UP((skb
->len
- hdr_len
),
1344 IXGBE_CB(skb
)->append_cnt
);
1347 static void ixgbe_update_rsc_stats(struct ixgbe_ring
*rx_ring
,
1348 struct sk_buff
*skb
)
1350 /* if append_cnt is 0 then frame is not RSC */
1351 if (!IXGBE_CB(skb
)->append_cnt
)
1354 rx_ring
->rx_stats
.rsc_count
+= IXGBE_CB(skb
)->append_cnt
;
1355 rx_ring
->rx_stats
.rsc_flush
++;
1357 ixgbe_set_rsc_gso_size(rx_ring
, skb
);
1359 /* gso_size is computed using append_cnt so always clear it last */
1360 IXGBE_CB(skb
)->append_cnt
= 0;
1364 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1365 * @rx_ring: rx descriptor ring packet is being transacted on
1366 * @rx_desc: pointer to the EOP Rx descriptor
1367 * @skb: pointer to current skb being populated
1369 * This function checks the ring, descriptor, and packet information in
1370 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1371 * other fields within the skb.
1373 static void ixgbe_process_skb_fields(struct ixgbe_ring
*rx_ring
,
1374 union ixgbe_adv_rx_desc
*rx_desc
,
1375 struct sk_buff
*skb
)
1377 struct net_device
*dev
= rx_ring
->netdev
;
1379 ixgbe_update_rsc_stats(rx_ring
, skb
);
1381 ixgbe_rx_hash(rx_ring
, rx_desc
, skb
);
1383 ixgbe_rx_checksum(rx_ring
, rx_desc
, skb
);
1385 #ifdef CONFIG_IXGBE_PTP
1386 ixgbe_ptp_rx_hwtstamp(rx_ring
->q_vector
, rx_desc
, skb
);
1389 if ((dev
->features
& NETIF_F_HW_VLAN_RX
) &&
1390 ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_VP
)) {
1391 u16 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
1392 __vlan_hwaccel_put_tag(skb
, vid
);
1395 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1397 skb
->protocol
= eth_type_trans(skb
, dev
);
1400 static void ixgbe_rx_skb(struct ixgbe_q_vector
*q_vector
,
1401 struct sk_buff
*skb
)
1403 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1405 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1406 napi_gro_receive(&q_vector
->napi
, skb
);
1412 * ixgbe_is_non_eop - process handling of non-EOP buffers
1413 * @rx_ring: Rx ring being processed
1414 * @rx_desc: Rx descriptor for current buffer
1415 * @skb: Current socket buffer containing buffer in progress
1417 * This function updates next to clean. If the buffer is an EOP buffer
1418 * this function exits returning false, otherwise it will place the
1419 * sk_buff in the next buffer to be chained and return true indicating
1420 * that this is in fact a non-EOP buffer.
1422 static bool ixgbe_is_non_eop(struct ixgbe_ring
*rx_ring
,
1423 union ixgbe_adv_rx_desc
*rx_desc
,
1424 struct sk_buff
*skb
)
1426 u32 ntc
= rx_ring
->next_to_clean
+ 1;
1428 /* fetch, update, and store next to clean */
1429 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
1430 rx_ring
->next_to_clean
= ntc
;
1432 prefetch(IXGBE_RX_DESC(rx_ring
, ntc
));
1434 /* update RSC append count if present */
1435 if (ring_is_rsc_enabled(rx_ring
)) {
1436 __le32 rsc_enabled
= rx_desc
->wb
.lower
.lo_dword
.data
&
1437 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK
);
1439 if (unlikely(rsc_enabled
)) {
1440 u32 rsc_cnt
= le32_to_cpu(rsc_enabled
);
1442 rsc_cnt
>>= IXGBE_RXDADV_RSCCNT_SHIFT
;
1443 IXGBE_CB(skb
)->append_cnt
+= rsc_cnt
- 1;
1445 /* update ntc based on RSC value */
1446 ntc
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1447 ntc
&= IXGBE_RXDADV_NEXTP_MASK
;
1448 ntc
>>= IXGBE_RXDADV_NEXTP_SHIFT
;
1452 /* if we are the last buffer then there is nothing else to do */
1453 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1456 /* place skb in next buffer to be received */
1457 rx_ring
->rx_buffer_info
[ntc
].skb
= skb
;
1458 rx_ring
->rx_stats
.non_eop_descs
++;
1464 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1465 * @rx_ring: rx descriptor ring packet is being transacted on
1466 * @skb: pointer to current skb being adjusted
1468 * This function is an ixgbe specific version of __pskb_pull_tail. The
1469 * main difference between this version and the original function is that
1470 * this function can make several assumptions about the state of things
1471 * that allow for significant optimizations versus the standard function.
1472 * As a result we can do things like drop a frag and maintain an accurate
1473 * truesize for the skb.
1475 static void ixgbe_pull_tail(struct ixgbe_ring
*rx_ring
,
1476 struct sk_buff
*skb
)
1478 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1480 unsigned int pull_len
;
1483 * it is valid to use page_address instead of kmap since we are
1484 * working with pages allocated out of the lomem pool per
1485 * alloc_page(GFP_ATOMIC)
1487 va
= skb_frag_address(frag
);
1490 * we need the header to contain the greater of either ETH_HLEN or
1491 * 60 bytes if the skb->len is less than 60 for skb_pad.
1493 pull_len
= ixgbe_get_headlen(va
, IXGBE_RX_HDR_SIZE
);
1495 /* align pull length to size of long to optimize memcpy performance */
1496 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
1498 /* update all of the pointers */
1499 skb_frag_size_sub(frag
, pull_len
);
1500 frag
->page_offset
+= pull_len
;
1501 skb
->data_len
-= pull_len
;
1502 skb
->tail
+= pull_len
;
1506 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1507 * @rx_ring: rx descriptor ring packet is being transacted on
1508 * @skb: pointer to current skb being updated
1510 * This function provides a basic DMA sync up for the first fragment of an
1511 * skb. The reason for doing this is that the first fragment cannot be
1512 * unmapped until we have reached the end of packet descriptor for a buffer
1515 static void ixgbe_dma_sync_frag(struct ixgbe_ring
*rx_ring
,
1516 struct sk_buff
*skb
)
1518 /* if the page was released unmap it, else just sync our portion */
1519 if (unlikely(IXGBE_CB(skb
)->page_released
)) {
1520 dma_unmap_page(rx_ring
->dev
, IXGBE_CB(skb
)->dma
,
1521 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1522 IXGBE_CB(skb
)->page_released
= false;
1524 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1526 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1529 ixgbe_rx_bufsz(rx_ring
),
1532 IXGBE_CB(skb
)->dma
= 0;
1536 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1537 * @rx_ring: rx descriptor ring packet is being transacted on
1538 * @rx_desc: pointer to the EOP Rx descriptor
1539 * @skb: pointer to current skb being fixed
1541 * Check for corrupted packet headers caused by senders on the local L2
1542 * embedded NIC switch not setting up their Tx Descriptors right. These
1543 * should be very rare.
1545 * Also address the case where we are pulling data in on pages only
1546 * and as such no data is present in the skb header.
1548 * In addition if skb is not at least 60 bytes we need to pad it so that
1549 * it is large enough to qualify as a valid Ethernet frame.
1551 * Returns true if an error was encountered and skb was freed.
1553 static bool ixgbe_cleanup_headers(struct ixgbe_ring
*rx_ring
,
1554 union ixgbe_adv_rx_desc
*rx_desc
,
1555 struct sk_buff
*skb
)
1557 struct net_device
*netdev
= rx_ring
->netdev
;
1559 /* verify that the packet does not have any known errors */
1560 if (unlikely(ixgbe_test_staterr(rx_desc
,
1561 IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) &&
1562 !(netdev
->features
& NETIF_F_RXALL
))) {
1563 dev_kfree_skb_any(skb
);
1567 /* place header in linear portion of buffer */
1568 if (skb_is_nonlinear(skb
))
1569 ixgbe_pull_tail(rx_ring
, skb
);
1572 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1573 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
))
1577 /* if skb_pad returns an error the skb was freed */
1578 if (unlikely(skb
->len
< 60)) {
1579 int pad_len
= 60 - skb
->len
;
1581 if (skb_pad(skb
, pad_len
))
1583 __skb_put(skb
, pad_len
);
1590 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1591 * @rx_ring: rx descriptor ring to store buffers on
1592 * @old_buff: donor buffer to have page reused
1594 * Synchronizes page for reuse by the adapter
1596 static void ixgbe_reuse_rx_page(struct ixgbe_ring
*rx_ring
,
1597 struct ixgbe_rx_buffer
*old_buff
)
1599 struct ixgbe_rx_buffer
*new_buff
;
1600 u16 nta
= rx_ring
->next_to_alloc
;
1602 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
1604 /* update, and store next to alloc */
1606 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
1608 /* transfer page from old buffer to new buffer */
1609 new_buff
->page
= old_buff
->page
;
1610 new_buff
->dma
= old_buff
->dma
;
1611 new_buff
->page_offset
= old_buff
->page_offset
;
1613 /* sync the buffer for use by the device */
1614 dma_sync_single_range_for_device(rx_ring
->dev
, new_buff
->dma
,
1615 new_buff
->page_offset
,
1616 ixgbe_rx_bufsz(rx_ring
),
1621 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1622 * @rx_ring: rx descriptor ring to transact packets on
1623 * @rx_buffer: buffer containing page to add
1624 * @rx_desc: descriptor containing length of buffer written by hardware
1625 * @skb: sk_buff to place the data into
1627 * This function will add the data contained in rx_buffer->page to the skb.
1628 * This is done either through a direct copy if the data in the buffer is
1629 * less than the skb header size, otherwise it will just attach the page as
1630 * a frag to the skb.
1632 * The function will then update the page offset if necessary and return
1633 * true if the buffer can be reused by the adapter.
1635 static bool ixgbe_add_rx_frag(struct ixgbe_ring
*rx_ring
,
1636 struct ixgbe_rx_buffer
*rx_buffer
,
1637 union ixgbe_adv_rx_desc
*rx_desc
,
1638 struct sk_buff
*skb
)
1640 struct page
*page
= rx_buffer
->page
;
1641 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1642 #if (PAGE_SIZE < 8192)
1643 unsigned int truesize
= ixgbe_rx_bufsz(rx_ring
);
1645 unsigned int truesize
= ALIGN(size
, L1_CACHE_BYTES
);
1646 unsigned int last_offset
= ixgbe_rx_pg_size(rx_ring
) -
1647 ixgbe_rx_bufsz(rx_ring
);
1650 if ((size
<= IXGBE_RX_HDR_SIZE
) && !skb_is_nonlinear(skb
)) {
1651 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
1653 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
1655 /* we can reuse buffer as-is, just make sure it is local */
1656 if (likely(page_to_nid(page
) == numa_node_id()))
1659 /* this page cannot be reused so discard it */
1664 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
1665 rx_buffer
->page_offset
, size
, truesize
);
1667 /* avoid re-using remote pages */
1668 if (unlikely(page_to_nid(page
) != numa_node_id()))
1671 #if (PAGE_SIZE < 8192)
1672 /* if we are only owner of page we can reuse it */
1673 if (unlikely(page_count(page
) != 1))
1676 /* flip page offset to other buffer */
1677 rx_buffer
->page_offset
^= truesize
;
1680 * since we are the only owner of the page and we need to
1681 * increment it, just set the value to 2 in order to avoid
1682 * an unecessary locked operation
1684 atomic_set(&page
->_count
, 2);
1686 /* move offset up to the next cache line */
1687 rx_buffer
->page_offset
+= truesize
;
1689 if (rx_buffer
->page_offset
> last_offset
)
1692 /* bump ref count on page before it is given to the stack */
1699 static struct sk_buff
*ixgbe_fetch_rx_buffer(struct ixgbe_ring
*rx_ring
,
1700 union ixgbe_adv_rx_desc
*rx_desc
)
1702 struct ixgbe_rx_buffer
*rx_buffer
;
1703 struct sk_buff
*skb
;
1706 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
1707 page
= rx_buffer
->page
;
1710 skb
= rx_buffer
->skb
;
1713 void *page_addr
= page_address(page
) +
1714 rx_buffer
->page_offset
;
1716 /* prefetch first cache line of first page */
1717 prefetch(page_addr
);
1718 #if L1_CACHE_BYTES < 128
1719 prefetch(page_addr
+ L1_CACHE_BYTES
);
1722 /* allocate a skb to store the frags */
1723 skb
= netdev_alloc_skb_ip_align(rx_ring
->netdev
,
1725 if (unlikely(!skb
)) {
1726 rx_ring
->rx_stats
.alloc_rx_buff_failed
++;
1731 * we will be copying header into skb->data in
1732 * pskb_may_pull so it is in our interest to prefetch
1733 * it now to avoid a possible cache miss
1735 prefetchw(skb
->data
);
1738 * Delay unmapping of the first packet. It carries the
1739 * header information, HW may still access the header
1740 * after the writeback. Only unmap it when EOP is
1743 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1746 IXGBE_CB(skb
)->dma
= rx_buffer
->dma
;
1748 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
))
1749 ixgbe_dma_sync_frag(rx_ring
, skb
);
1752 /* we are reusing so sync this buffer for CPU use */
1753 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1755 rx_buffer
->page_offset
,
1756 ixgbe_rx_bufsz(rx_ring
),
1760 /* pull page into skb */
1761 if (ixgbe_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
1762 /* hand second half of page back to the ring */
1763 ixgbe_reuse_rx_page(rx_ring
, rx_buffer
);
1764 } else if (IXGBE_CB(skb
)->dma
== rx_buffer
->dma
) {
1765 /* the page has been released from the ring */
1766 IXGBE_CB(skb
)->page_released
= true;
1768 /* we are not reusing the buffer so unmap it */
1769 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
1770 ixgbe_rx_pg_size(rx_ring
),
1774 /* clear contents of buffer_info */
1775 rx_buffer
->skb
= NULL
;
1777 rx_buffer
->page
= NULL
;
1783 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1784 * @q_vector: structure containing interrupt and ring information
1785 * @rx_ring: rx descriptor ring to transact packets on
1786 * @budget: Total limit on number of packets to process
1788 * This function provides a "bounce buffer" approach to Rx interrupt
1789 * processing. The advantage to this is that on systems that have
1790 * expensive overhead for IOMMU access this provides a means of avoiding
1791 * it by maintaining the mapping of the page to the syste.
1793 * Returns true if all work is completed without reaching budget
1795 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
1796 struct ixgbe_ring
*rx_ring
,
1799 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
1801 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1803 unsigned int mss
= 0;
1804 #endif /* IXGBE_FCOE */
1805 u16 cleaned_count
= ixgbe_desc_unused(rx_ring
);
1808 union ixgbe_adv_rx_desc
*rx_desc
;
1809 struct sk_buff
*skb
;
1811 /* return some buffers to hardware, one at a time is too slow */
1812 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
1813 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
1817 rx_desc
= IXGBE_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
1819 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_DD
))
1823 * This memory barrier is needed to keep us from reading
1824 * any other fields out of the rx_desc until we know the
1825 * RXD_STAT_DD bit is set
1829 /* retrieve a buffer from the ring */
1830 skb
= ixgbe_fetch_rx_buffer(rx_ring
, rx_desc
);
1832 /* exit if we failed to retrieve a buffer */
1838 /* place incomplete frames back on ring for completion */
1839 if (ixgbe_is_non_eop(rx_ring
, rx_desc
, skb
))
1842 /* verify the packet layout is correct */
1843 if (ixgbe_cleanup_headers(rx_ring
, rx_desc
, skb
))
1846 /* probably a little skewed due to removing CRC */
1847 total_rx_bytes
+= skb
->len
;
1850 /* populate checksum, timestamp, VLAN, and protocol */
1851 ixgbe_process_skb_fields(rx_ring
, rx_desc
, skb
);
1854 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1855 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
)) {
1856 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
1857 /* include DDPed FCoE data */
1858 if (ddp_bytes
> 0) {
1860 mss
= rx_ring
->netdev
->mtu
-
1861 sizeof(struct fcoe_hdr
) -
1862 sizeof(struct fc_frame_header
) -
1863 sizeof(struct fcoe_crc_eof
);
1867 total_rx_bytes
+= ddp_bytes
;
1868 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
,
1872 dev_kfree_skb_any(skb
);
1877 #endif /* IXGBE_FCOE */
1878 ixgbe_rx_skb(q_vector
, skb
);
1880 /* update budget accounting */
1882 } while (likely(budget
));
1884 u64_stats_update_begin(&rx_ring
->syncp
);
1885 rx_ring
->stats
.packets
+= total_rx_packets
;
1886 rx_ring
->stats
.bytes
+= total_rx_bytes
;
1887 u64_stats_update_end(&rx_ring
->syncp
);
1888 q_vector
->rx
.total_packets
+= total_rx_packets
;
1889 q_vector
->rx
.total_bytes
+= total_rx_bytes
;
1892 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
1898 * ixgbe_configure_msix - Configure MSI-X hardware
1899 * @adapter: board private structure
1901 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1904 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
1906 struct ixgbe_q_vector
*q_vector
;
1910 /* Populate MSIX to EITR Select */
1911 if (adapter
->num_vfs
> 32) {
1912 u32 eitrsel
= (1 << (adapter
->num_vfs
- 32)) - 1;
1913 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
1917 * Populate the IVAR table and set the ITR values to the
1918 * corresponding register.
1920 for (v_idx
= 0; v_idx
< adapter
->num_q_vectors
; v_idx
++) {
1921 struct ixgbe_ring
*ring
;
1922 q_vector
= adapter
->q_vector
[v_idx
];
1924 ixgbe_for_each_ring(ring
, q_vector
->rx
)
1925 ixgbe_set_ivar(adapter
, 0, ring
->reg_idx
, v_idx
);
1927 ixgbe_for_each_ring(ring
, q_vector
->tx
)
1928 ixgbe_set_ivar(adapter
, 1, ring
->reg_idx
, v_idx
);
1930 if (q_vector
->tx
.ring
&& !q_vector
->rx
.ring
) {
1931 /* tx only vector */
1932 if (adapter
->tx_itr_setting
== 1)
1933 q_vector
->itr
= IXGBE_10K_ITR
;
1935 q_vector
->itr
= adapter
->tx_itr_setting
;
1937 /* rx or rx/tx vector */
1938 if (adapter
->rx_itr_setting
== 1)
1939 q_vector
->itr
= IXGBE_20K_ITR
;
1941 q_vector
->itr
= adapter
->rx_itr_setting
;
1944 ixgbe_write_eitr(q_vector
);
1947 switch (adapter
->hw
.mac
.type
) {
1948 case ixgbe_mac_82598EB
:
1949 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
1952 case ixgbe_mac_82599EB
:
1953 case ixgbe_mac_X540
:
1954 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
1959 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
1961 /* set up to autoclear timer, and the vectors */
1962 mask
= IXGBE_EIMS_ENABLE_MASK
;
1963 mask
&= ~(IXGBE_EIMS_OTHER
|
1964 IXGBE_EIMS_MAILBOX
|
1967 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
1970 enum latency_range
{
1974 latency_invalid
= 255
1978 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1979 * @q_vector: structure containing interrupt and ring information
1980 * @ring_container: structure containing ring performance data
1982 * Stores a new ITR value based on packets and byte
1983 * counts during the last interrupt. The advantage of per interrupt
1984 * computation is faster updates and more accurate ITR for the current
1985 * traffic pattern. Constants in this function were computed
1986 * based on theoretical maximum wire speed and thresholds were set based
1987 * on testing data as well as attempting to minimize response time
1988 * while increasing bulk throughput.
1989 * this functionality is controlled by the InterruptThrottleRate module
1990 * parameter (see ixgbe_param.c)
1992 static void ixgbe_update_itr(struct ixgbe_q_vector
*q_vector
,
1993 struct ixgbe_ring_container
*ring_container
)
1995 int bytes
= ring_container
->total_bytes
;
1996 int packets
= ring_container
->total_packets
;
1999 u8 itr_setting
= ring_container
->itr
;
2004 /* simple throttlerate management
2005 * 0-10MB/s lowest (100000 ints/s)
2006 * 10-20MB/s low (20000 ints/s)
2007 * 20-1249MB/s bulk (8000 ints/s)
2009 /* what was last interrupt timeslice? */
2010 timepassed_us
= q_vector
->itr
>> 2;
2011 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
2013 switch (itr_setting
) {
2014 case lowest_latency
:
2015 if (bytes_perint
> 10)
2016 itr_setting
= low_latency
;
2019 if (bytes_perint
> 20)
2020 itr_setting
= bulk_latency
;
2021 else if (bytes_perint
<= 10)
2022 itr_setting
= lowest_latency
;
2025 if (bytes_perint
<= 20)
2026 itr_setting
= low_latency
;
2030 /* clear work counters since we have the values we need */
2031 ring_container
->total_bytes
= 0;
2032 ring_container
->total_packets
= 0;
2034 /* write updated itr to ring container */
2035 ring_container
->itr
= itr_setting
;
2039 * ixgbe_write_eitr - write EITR register in hardware specific way
2040 * @q_vector: structure containing interrupt and ring information
2042 * This function is made to be called by ethtool and by the driver
2043 * when it needs to update EITR registers at runtime. Hardware
2044 * specific quirks/differences are taken care of here.
2046 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
2048 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2049 struct ixgbe_hw
*hw
= &adapter
->hw
;
2050 int v_idx
= q_vector
->v_idx
;
2051 u32 itr_reg
= q_vector
->itr
& IXGBE_MAX_EITR
;
2053 switch (adapter
->hw
.mac
.type
) {
2054 case ixgbe_mac_82598EB
:
2055 /* must write high and low 16 bits to reset counter */
2056 itr_reg
|= (itr_reg
<< 16);
2058 case ixgbe_mac_82599EB
:
2059 case ixgbe_mac_X540
:
2061 * set the WDIS bit to not clear the timer bits and cause an
2062 * immediate assertion of the interrupt
2064 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
2069 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
2072 static void ixgbe_set_itr(struct ixgbe_q_vector
*q_vector
)
2074 u32 new_itr
= q_vector
->itr
;
2077 ixgbe_update_itr(q_vector
, &q_vector
->tx
);
2078 ixgbe_update_itr(q_vector
, &q_vector
->rx
);
2080 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
2082 switch (current_itr
) {
2083 /* counts and packets in update_itr are dependent on these numbers */
2084 case lowest_latency
:
2085 new_itr
= IXGBE_100K_ITR
;
2088 new_itr
= IXGBE_20K_ITR
;
2091 new_itr
= IXGBE_8K_ITR
;
2097 if (new_itr
!= q_vector
->itr
) {
2098 /* do an exponential smoothing */
2099 new_itr
= (10 * new_itr
* q_vector
->itr
) /
2100 ((9 * new_itr
) + q_vector
->itr
);
2102 /* save the algorithm value here */
2103 q_vector
->itr
= new_itr
;
2105 ixgbe_write_eitr(q_vector
);
2110 * ixgbe_check_overtemp_subtask - check for over temperature
2111 * @adapter: pointer to adapter
2113 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter
*adapter
)
2115 struct ixgbe_hw
*hw
= &adapter
->hw
;
2116 u32 eicr
= adapter
->interrupt_event
;
2118 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2121 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
2122 !(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_EVENT
))
2125 adapter
->flags2
&= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2127 switch (hw
->device_id
) {
2128 case IXGBE_DEV_ID_82599_T3_LOM
:
2130 * Since the warning interrupt is for both ports
2131 * we don't have to check if:
2132 * - This interrupt wasn't for our port.
2133 * - We may have missed the interrupt so always have to
2134 * check if we got a LSC
2136 if (!(eicr
& IXGBE_EICR_GPI_SDP0
) &&
2137 !(eicr
& IXGBE_EICR_LSC
))
2140 if (!(eicr
& IXGBE_EICR_LSC
) && hw
->mac
.ops
.check_link
) {
2142 bool link_up
= false;
2144 hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
2150 /* Check if this is not due to overtemp */
2151 if (hw
->phy
.ops
.check_overtemp(hw
) != IXGBE_ERR_OVERTEMP
)
2156 if (!(eicr
& IXGBE_EICR_GPI_SDP0
))
2161 "Network adapter has been stopped because it has over heated. "
2162 "Restart the computer. If the problem persists, "
2163 "power off the system and replace the adapter\n");
2165 adapter
->interrupt_event
= 0;
2168 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
2170 struct ixgbe_hw
*hw
= &adapter
->hw
;
2172 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
2173 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
2174 e_crit(probe
, "Fan has stopped, replace the adapter\n");
2175 /* write to clear the interrupt */
2176 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2180 static void ixgbe_check_overtemp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2182 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
2185 switch (adapter
->hw
.mac
.type
) {
2186 case ixgbe_mac_82599EB
:
2188 * Need to check link state so complete overtemp check
2191 if (((eicr
& IXGBE_EICR_GPI_SDP0
) || (eicr
& IXGBE_EICR_LSC
)) &&
2192 (!test_bit(__IXGBE_DOWN
, &adapter
->state
))) {
2193 adapter
->interrupt_event
= eicr
;
2194 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2195 ixgbe_service_event_schedule(adapter
);
2199 case ixgbe_mac_X540
:
2200 if (!(eicr
& IXGBE_EICR_TS
))
2208 "Network adapter has been stopped because it has over heated. "
2209 "Restart the computer. If the problem persists, "
2210 "power off the system and replace the adapter\n");
2213 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2215 struct ixgbe_hw
*hw
= &adapter
->hw
;
2217 if (eicr
& IXGBE_EICR_GPI_SDP2
) {
2218 /* Clear the interrupt */
2219 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
2220 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2221 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
2222 ixgbe_service_event_schedule(adapter
);
2226 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
2227 /* Clear the interrupt */
2228 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2229 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2230 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
2231 ixgbe_service_event_schedule(adapter
);
2236 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
2238 struct ixgbe_hw
*hw
= &adapter
->hw
;
2241 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2242 adapter
->link_check_timeout
= jiffies
;
2243 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2244 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
2245 IXGBE_WRITE_FLUSH(hw
);
2246 ixgbe_service_event_schedule(adapter
);
2250 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
2254 struct ixgbe_hw
*hw
= &adapter
->hw
;
2256 switch (hw
->mac
.type
) {
2257 case ixgbe_mac_82598EB
:
2258 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2259 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, mask
);
2261 case ixgbe_mac_82599EB
:
2262 case ixgbe_mac_X540
:
2263 mask
= (qmask
& 0xFFFFFFFF);
2265 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(0), mask
);
2266 mask
= (qmask
>> 32);
2268 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(1), mask
);
2273 /* skip the flush */
2276 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
2280 struct ixgbe_hw
*hw
= &adapter
->hw
;
2282 switch (hw
->mac
.type
) {
2283 case ixgbe_mac_82598EB
:
2284 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2285 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, mask
);
2287 case ixgbe_mac_82599EB
:
2288 case ixgbe_mac_X540
:
2289 mask
= (qmask
& 0xFFFFFFFF);
2291 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(0), mask
);
2292 mask
= (qmask
>> 32);
2294 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(1), mask
);
2299 /* skip the flush */
2303 * ixgbe_irq_enable - Enable default interrupt generation settings
2304 * @adapter: board private structure
2306 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
, bool queues
,
2309 u32 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2311 /* don't reenable LSC while waiting for link */
2312 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
2313 mask
&= ~IXGBE_EIMS_LSC
;
2315 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2316 switch (adapter
->hw
.mac
.type
) {
2317 case ixgbe_mac_82599EB
:
2318 mask
|= IXGBE_EIMS_GPI_SDP0
;
2320 case ixgbe_mac_X540
:
2321 mask
|= IXGBE_EIMS_TS
;
2326 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2327 mask
|= IXGBE_EIMS_GPI_SDP1
;
2328 switch (adapter
->hw
.mac
.type
) {
2329 case ixgbe_mac_82599EB
:
2330 mask
|= IXGBE_EIMS_GPI_SDP1
;
2331 mask
|= IXGBE_EIMS_GPI_SDP2
;
2332 case ixgbe_mac_X540
:
2333 mask
|= IXGBE_EIMS_ECC
;
2334 mask
|= IXGBE_EIMS_MAILBOX
;
2340 #ifdef CONFIG_IXGBE_PTP
2341 if (adapter
->hw
.mac
.type
== ixgbe_mac_X540
)
2342 mask
|= IXGBE_EIMS_TIMESYNC
;
2345 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2346 !(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
2347 mask
|= IXGBE_EIMS_FLOW_DIR
;
2349 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2351 ixgbe_irq_enable_queues(adapter
, ~0);
2353 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2356 static irqreturn_t
ixgbe_msix_other(int irq
, void *data
)
2358 struct ixgbe_adapter
*adapter
= data
;
2359 struct ixgbe_hw
*hw
= &adapter
->hw
;
2363 * Workaround for Silicon errata. Use clear-by-write instead
2364 * of clear-by-read. Reading with EICS will return the
2365 * interrupt causes without clearing, which later be done
2366 * with the write to EICR.
2368 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
2369 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
2371 if (eicr
& IXGBE_EICR_LSC
)
2372 ixgbe_check_lsc(adapter
);
2374 if (eicr
& IXGBE_EICR_MAILBOX
)
2375 ixgbe_msg_task(adapter
);
2377 switch (hw
->mac
.type
) {
2378 case ixgbe_mac_82599EB
:
2379 case ixgbe_mac_X540
:
2380 if (eicr
& IXGBE_EICR_ECC
)
2381 e_info(link
, "Received unrecoverable ECC Err, please "
2383 /* Handle Flow Director Full threshold interrupt */
2384 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
2385 int reinit_count
= 0;
2387 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2388 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
2389 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE
,
2394 /* no more flow director interrupts until after init */
2395 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_FLOW_DIR
);
2396 adapter
->flags2
|= IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
2397 ixgbe_service_event_schedule(adapter
);
2400 ixgbe_check_sfp_event(adapter
, eicr
);
2401 ixgbe_check_overtemp_event(adapter
, eicr
);
2407 ixgbe_check_fan_failure(adapter
, eicr
);
2409 #ifdef CONFIG_IXGBE_PTP
2410 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
2411 ixgbe_ptp_check_pps_event(adapter
, eicr
);
2414 /* re-enable the original interrupt state, no lsc, no queues */
2415 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2416 ixgbe_irq_enable(adapter
, false, false);
2421 static irqreturn_t
ixgbe_msix_clean_rings(int irq
, void *data
)
2423 struct ixgbe_q_vector
*q_vector
= data
;
2425 /* EIAM disabled interrupts (on this vector) for us */
2427 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
2428 napi_schedule(&q_vector
->napi
);
2434 * ixgbe_poll - NAPI Rx polling callback
2435 * @napi: structure for representing this polling device
2436 * @budget: how many packets driver is allowed to clean
2438 * This function is used for legacy and MSI, NAPI mode
2440 int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2442 struct ixgbe_q_vector
*q_vector
=
2443 container_of(napi
, struct ixgbe_q_vector
, napi
);
2444 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2445 struct ixgbe_ring
*ring
;
2446 int per_ring_budget
;
2447 bool clean_complete
= true;
2449 #ifdef CONFIG_IXGBE_DCA
2450 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
2451 ixgbe_update_dca(q_vector
);
2454 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2455 clean_complete
&= !!ixgbe_clean_tx_irq(q_vector
, ring
);
2457 /* attempt to distribute budget to each queue fairly, but don't allow
2458 * the budget to go below 1 because we'll exit polling */
2459 if (q_vector
->rx
.count
> 1)
2460 per_ring_budget
= max(budget
/q_vector
->rx
.count
, 1);
2462 per_ring_budget
= budget
;
2464 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2465 clean_complete
&= ixgbe_clean_rx_irq(q_vector
, ring
,
2468 /* If all work not completed, return budget and keep polling */
2469 if (!clean_complete
)
2472 /* all work done, exit the polling mode */
2473 napi_complete(napi
);
2474 if (adapter
->rx_itr_setting
& 1)
2475 ixgbe_set_itr(q_vector
);
2476 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2477 ixgbe_irq_enable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
2483 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2484 * @adapter: board private structure
2486 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2487 * interrupts from the kernel.
2489 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2491 struct net_device
*netdev
= adapter
->netdev
;
2495 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2496 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2497 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2499 if (q_vector
->tx
.ring
&& q_vector
->rx
.ring
) {
2500 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2501 "%s-%s-%d", netdev
->name
, "TxRx", ri
++);
2503 } else if (q_vector
->rx
.ring
) {
2504 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2505 "%s-%s-%d", netdev
->name
, "rx", ri
++);
2506 } else if (q_vector
->tx
.ring
) {
2507 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2508 "%s-%s-%d", netdev
->name
, "tx", ti
++);
2510 /* skip this unused q_vector */
2513 err
= request_irq(entry
->vector
, &ixgbe_msix_clean_rings
, 0,
2514 q_vector
->name
, q_vector
);
2516 e_err(probe
, "request_irq failed for MSIX interrupt "
2517 "Error: %d\n", err
);
2518 goto free_queue_irqs
;
2520 /* If Flow Director is enabled, set interrupt affinity */
2521 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2522 /* assign the mask for this irq */
2523 irq_set_affinity_hint(entry
->vector
,
2524 &q_vector
->affinity_mask
);
2528 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2529 ixgbe_msix_other
, 0, netdev
->name
, adapter
);
2531 e_err(probe
, "request_irq for msix_other failed: %d\n", err
);
2532 goto free_queue_irqs
;
2540 irq_set_affinity_hint(adapter
->msix_entries
[vector
].vector
,
2542 free_irq(adapter
->msix_entries
[vector
].vector
,
2543 adapter
->q_vector
[vector
]);
2545 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2546 pci_disable_msix(adapter
->pdev
);
2547 kfree(adapter
->msix_entries
);
2548 adapter
->msix_entries
= NULL
;
2553 * ixgbe_intr - legacy mode Interrupt Handler
2554 * @irq: interrupt number
2555 * @data: pointer to a network interface device structure
2557 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2559 struct ixgbe_adapter
*adapter
= data
;
2560 struct ixgbe_hw
*hw
= &adapter
->hw
;
2561 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2565 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2566 * before the read of EICR.
2568 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2570 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2571 * therefore no explicit interrupt disable is necessary */
2572 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2575 * shared interrupt alert!
2576 * make sure interrupts are enabled because the read will
2577 * have disabled interrupts due to EIAM
2578 * finish the workaround of silicon errata on 82598. Unmask
2579 * the interrupt that we masked before the EICR read.
2581 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2582 ixgbe_irq_enable(adapter
, true, true);
2583 return IRQ_NONE
; /* Not our interrupt */
2586 if (eicr
& IXGBE_EICR_LSC
)
2587 ixgbe_check_lsc(adapter
);
2589 switch (hw
->mac
.type
) {
2590 case ixgbe_mac_82599EB
:
2591 ixgbe_check_sfp_event(adapter
, eicr
);
2593 case ixgbe_mac_X540
:
2594 if (eicr
& IXGBE_EICR_ECC
)
2595 e_info(link
, "Received unrecoverable ECC err, please "
2597 ixgbe_check_overtemp_event(adapter
, eicr
);
2603 ixgbe_check_fan_failure(adapter
, eicr
);
2604 #ifdef CONFIG_IXGBE_PTP
2605 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
2606 ixgbe_ptp_check_pps_event(adapter
, eicr
);
2609 /* would disable interrupts here but EIAM disabled it */
2610 napi_schedule(&q_vector
->napi
);
2613 * re-enable link(maybe) and non-queue interrupts, no flush.
2614 * ixgbe_poll will re-enable the queue interrupts
2616 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2617 ixgbe_irq_enable(adapter
, false, false);
2623 * ixgbe_request_irq - initialize interrupts
2624 * @adapter: board private structure
2626 * Attempts to configure interrupts using the best available
2627 * capabilities of the hardware and kernel.
2629 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
2631 struct net_device
*netdev
= adapter
->netdev
;
2634 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2635 err
= ixgbe_request_msix_irqs(adapter
);
2636 else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)
2637 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
2638 netdev
->name
, adapter
);
2640 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
2641 netdev
->name
, adapter
);
2644 e_err(probe
, "request_irq failed, Error %d\n", err
);
2649 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
2653 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
2654 free_irq(adapter
->pdev
->irq
, adapter
);
2658 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2659 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2660 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2662 /* free only the irqs that were actually requested */
2663 if (!q_vector
->rx
.ring
&& !q_vector
->tx
.ring
)
2666 /* clear the affinity_mask in the IRQ descriptor */
2667 irq_set_affinity_hint(entry
->vector
, NULL
);
2669 free_irq(entry
->vector
, q_vector
);
2672 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
2676 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2677 * @adapter: board private structure
2679 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
2681 switch (adapter
->hw
.mac
.type
) {
2682 case ixgbe_mac_82598EB
:
2683 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
2685 case ixgbe_mac_82599EB
:
2686 case ixgbe_mac_X540
:
2687 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
2688 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
2689 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
2694 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2695 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2698 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++)
2699 synchronize_irq(adapter
->msix_entries
[vector
].vector
);
2701 synchronize_irq(adapter
->msix_entries
[vector
++].vector
);
2703 synchronize_irq(adapter
->pdev
->irq
);
2708 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2711 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
2713 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2716 if (adapter
->rx_itr_setting
== 1)
2717 q_vector
->itr
= IXGBE_20K_ITR
;
2719 q_vector
->itr
= adapter
->rx_itr_setting
;
2721 ixgbe_write_eitr(q_vector
);
2723 ixgbe_set_ivar(adapter
, 0, 0, 0);
2724 ixgbe_set_ivar(adapter
, 1, 0, 0);
2726 e_info(hw
, "Legacy interrupt IVAR setup done\n");
2730 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2731 * @adapter: board private structure
2732 * @ring: structure containing ring specific data
2734 * Configure the Tx descriptor ring after a reset.
2736 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
2737 struct ixgbe_ring
*ring
)
2739 struct ixgbe_hw
*hw
= &adapter
->hw
;
2740 u64 tdba
= ring
->dma
;
2742 u32 txdctl
= IXGBE_TXDCTL_ENABLE
;
2743 u8 reg_idx
= ring
->reg_idx
;
2745 /* disable queue to avoid issues while updating state */
2746 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), 0);
2747 IXGBE_WRITE_FLUSH(hw
);
2749 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
2750 (tdba
& DMA_BIT_MASK(32)));
2751 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
2752 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
2753 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
2754 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
2755 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
2756 ring
->tail
= hw
->hw_addr
+ IXGBE_TDT(reg_idx
);
2759 * set WTHRESH to encourage burst writeback, it should not be set
2760 * higher than 1 when ITR is 0 as it could cause false TX hangs
2762 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2763 * to or less than the number of on chip descriptors, which is
2766 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< 8))
2767 txdctl
|= (1 << 16); /* WTHRESH = 1 */
2769 txdctl
|= (8 << 16); /* WTHRESH = 8 */
2772 * Setting PTHRESH to 32 both improves performance
2773 * and avoids a TX hang with DFP enabled
2775 txdctl
|= (1 << 8) | /* HTHRESH = 1 */
2776 32; /* PTHRESH = 32 */
2778 /* reinitialize flowdirector state */
2779 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2780 ring
->atr_sample_rate
= adapter
->atr_sample_rate
;
2781 ring
->atr_count
= 0;
2782 set_bit(__IXGBE_TX_FDIR_INIT_DONE
, &ring
->state
);
2784 ring
->atr_sample_rate
= 0;
2787 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &ring
->state
);
2790 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
2792 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2793 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
2794 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
2797 /* poll to verify queue is enabled */
2799 usleep_range(1000, 2000);
2800 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
2801 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
2803 e_err(drv
, "Could not enable Tx Queue %d\n", reg_idx
);
2806 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
2808 struct ixgbe_hw
*hw
= &adapter
->hw
;
2810 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
2812 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2815 /* disable the arbiter while setting MTQC */
2816 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
2817 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
2818 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2820 /* set transmit pool layout */
2821 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
2822 mtqc
= IXGBE_MTQC_VT_ENA
;
2824 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
2826 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
2827 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
2828 mtqc
|= IXGBE_MTQC_32VF
;
2830 mtqc
|= IXGBE_MTQC_64VF
;
2833 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
2835 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
2837 mtqc
= IXGBE_MTQC_64Q_1PB
;
2840 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, mtqc
);
2842 /* Enable Security TX Buffer IFG for multiple pb */
2844 u32 sectx
= IXGBE_READ_REG(hw
, IXGBE_SECTXMINIFG
);
2845 sectx
|= IXGBE_SECTX_DCB
;
2846 IXGBE_WRITE_REG(hw
, IXGBE_SECTXMINIFG
, sectx
);
2849 /* re-enable the arbiter */
2850 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
2851 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2855 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2856 * @adapter: board private structure
2858 * Configure the Tx unit of the MAC after a reset.
2860 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
2862 struct ixgbe_hw
*hw
= &adapter
->hw
;
2866 ixgbe_setup_mtqc(adapter
);
2868 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
2869 /* DMATXCTL.EN must be before Tx queues are enabled */
2870 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
2871 dmatxctl
|= IXGBE_DMATXCTL_TE
;
2872 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
2875 /* Setup the HW Tx Head and Tail descriptor pointers */
2876 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2877 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
2880 static void ixgbe_enable_rx_drop(struct ixgbe_adapter
*adapter
,
2881 struct ixgbe_ring
*ring
)
2883 struct ixgbe_hw
*hw
= &adapter
->hw
;
2884 u8 reg_idx
= ring
->reg_idx
;
2885 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
2887 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
2889 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
2892 static void ixgbe_disable_rx_drop(struct ixgbe_adapter
*adapter
,
2893 struct ixgbe_ring
*ring
)
2895 struct ixgbe_hw
*hw
= &adapter
->hw
;
2896 u8 reg_idx
= ring
->reg_idx
;
2897 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
2899 srrctl
&= ~IXGBE_SRRCTL_DROP_EN
;
2901 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
2904 #ifdef CONFIG_IXGBE_DCB
2905 void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
2907 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
2911 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
2913 if (adapter
->ixgbe_ieee_pfc
)
2914 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
2917 * We should set the drop enable bit if:
2920 * Number of Rx queues > 1 and flow control is disabled
2922 * This allows us to avoid head of line blocking for security
2923 * and performance reasons.
2925 if (adapter
->num_vfs
|| (adapter
->num_rx_queues
> 1 &&
2926 !(adapter
->hw
.fc
.current_mode
& ixgbe_fc_tx_pause
) && !pfc_en
)) {
2927 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2928 ixgbe_enable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
2930 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2931 ixgbe_disable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
2935 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2937 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
2938 struct ixgbe_ring
*rx_ring
)
2940 struct ixgbe_hw
*hw
= &adapter
->hw
;
2942 u8 reg_idx
= rx_ring
->reg_idx
;
2944 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
2945 u16 mask
= adapter
->ring_feature
[RING_F_RSS
].mask
;
2948 * if VMDq is not active we must program one srrctl register
2949 * per RSS queue since we have enabled RDRXCTL.MVMEN
2954 /* configure header buffer length, needed for RSC */
2955 srrctl
= IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
;
2957 /* configure the packet buffer length */
2958 srrctl
|= ixgbe_rx_bufsz(rx_ring
) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2960 /* configure descriptor type */
2961 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2963 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
2966 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
2968 struct ixgbe_hw
*hw
= &adapter
->hw
;
2969 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2970 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2971 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2972 u32 mrqc
= 0, reta
= 0;
2975 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2978 * Program table for at least 2 queues w/ SR-IOV so that VFs can
2979 * make full use of any rings they may have. We will use the
2980 * PSRTYPE register to control how many rings we use within the PF.
2982 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) && (rss_i
< 2))
2985 /* Fill out hash function seeds */
2986 for (i
= 0; i
< 10; i
++)
2987 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
2989 /* Fill out redirection table */
2990 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
2993 /* reta = 4-byte sliding window of
2994 * 0x00..(indices-1)(indices-1)00..etc. */
2995 reta
= (reta
<< 8) | (j
* 0x11);
2997 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
3000 /* Disable indicating checksum in descriptor, enables RSS hash */
3001 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
3002 rxcsum
|= IXGBE_RXCSUM_PCSD
;
3003 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
3005 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
3006 if (adapter
->ring_feature
[RING_F_RSS
].mask
)
3007 mrqc
= IXGBE_MRQC_RSSEN
;
3009 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3011 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3013 mrqc
= IXGBE_MRQC_VMDQRT8TCEN
; /* 8 TCs */
3015 mrqc
= IXGBE_MRQC_VMDQRT4TCEN
; /* 4 TCs */
3016 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3017 mrqc
= IXGBE_MRQC_VMDQRSS32EN
;
3019 mrqc
= IXGBE_MRQC_VMDQRSS64EN
;
3022 mrqc
= IXGBE_MRQC_RTRSS8TCEN
;
3024 mrqc
= IXGBE_MRQC_RTRSS4TCEN
;
3026 mrqc
= IXGBE_MRQC_RSSEN
;
3030 /* Perform hash on these packet types */
3031 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
|
3032 IXGBE_MRQC_RSS_FIELD_IPV4_TCP
|
3033 IXGBE_MRQC_RSS_FIELD_IPV6
|
3034 IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
3036 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
3037 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4_UDP
;
3038 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
3039 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
3041 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3045 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3046 * @adapter: address of board private structure
3047 * @index: index of ring to set
3049 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
3050 struct ixgbe_ring
*ring
)
3052 struct ixgbe_hw
*hw
= &adapter
->hw
;
3054 u8 reg_idx
= ring
->reg_idx
;
3056 if (!ring_is_rsc_enabled(ring
))
3059 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
3060 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
3062 * we must limit the number of descriptors so that the
3063 * total size of max desc * buf_len is not greater
3066 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
3067 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
3070 #define IXGBE_MAX_RX_DESC_POLL 10
3071 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
3072 struct ixgbe_ring
*ring
)
3074 struct ixgbe_hw
*hw
= &adapter
->hw
;
3075 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3077 u8 reg_idx
= ring
->reg_idx
;
3079 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3080 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3081 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3085 usleep_range(1000, 2000);
3086 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3087 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
3090 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
3091 "the polling period\n", reg_idx
);
3095 void ixgbe_disable_rx_queue(struct ixgbe_adapter
*adapter
,
3096 struct ixgbe_ring
*ring
)
3098 struct ixgbe_hw
*hw
= &adapter
->hw
;
3099 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3101 u8 reg_idx
= ring
->reg_idx
;
3103 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3104 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
3106 /* write value back with RXDCTL.ENABLE bit cleared */
3107 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3109 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3110 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3113 /* the hardware may take up to 100us to really disable the rx queue */
3116 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3117 } while (--wait_loop
&& (rxdctl
& IXGBE_RXDCTL_ENABLE
));
3120 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3121 "the polling period\n", reg_idx
);
3125 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
3126 struct ixgbe_ring
*ring
)
3128 struct ixgbe_hw
*hw
= &adapter
->hw
;
3129 u64 rdba
= ring
->dma
;
3131 u8 reg_idx
= ring
->reg_idx
;
3133 /* disable queue to avoid issues while updating state */
3134 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3135 ixgbe_disable_rx_queue(adapter
, ring
);
3137 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
3138 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
3139 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
3140 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
3141 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
3142 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
3143 ring
->tail
= hw
->hw_addr
+ IXGBE_RDT(reg_idx
);
3145 ixgbe_configure_srrctl(adapter
, ring
);
3146 ixgbe_configure_rscctl(adapter
, ring
);
3148 /* If operating in IOV mode set RLPML for X540 */
3149 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
3150 hw
->mac
.type
== ixgbe_mac_X540
) {
3151 rxdctl
&= ~IXGBE_RXDCTL_RLPMLMASK
;
3152 rxdctl
|= ((ring
->netdev
->mtu
+ ETH_HLEN
+
3153 ETH_FCS_LEN
+ VLAN_HLEN
) | IXGBE_RXDCTL_RLPML_EN
);
3156 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3158 * enable cache line friendly hardware writes:
3159 * PTHRESH=32 descriptors (half the internal cache),
3160 * this also removes ugly rx_no_buffer_count increment
3161 * HTHRESH=4 descriptors (to minimize latency on fetch)
3162 * WTHRESH=8 burst writeback up to two cache lines
3164 rxdctl
&= ~0x3FFFFF;
3168 /* enable receive descriptor ring */
3169 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
3170 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3172 ixgbe_rx_desc_queue_enable(adapter
, ring
);
3173 ixgbe_alloc_rx_buffers(ring
, ixgbe_desc_unused(ring
));
3176 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
3178 struct ixgbe_hw
*hw
= &adapter
->hw
;
3179 int rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3182 /* PSRTYPE must be initialized in non 82598 adapters */
3183 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
3184 IXGBE_PSRTYPE_UDPHDR
|
3185 IXGBE_PSRTYPE_IPV4HDR
|
3186 IXGBE_PSRTYPE_L2HDR
|
3187 IXGBE_PSRTYPE_IPV6HDR
;
3189 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3197 for (p
= 0; p
< adapter
->num_rx_pools
; p
++)
3198 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(p
)),
3202 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
3204 struct ixgbe_hw
*hw
= &adapter
->hw
;
3205 u32 reg_offset
, vf_shift
;
3206 u32 gcr_ext
, vmdctl
;
3209 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
3212 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
3213 vmdctl
|= IXGBE_VMD_CTL_VMDQ_EN
;
3214 vmdctl
&= ~IXGBE_VT_CTL_POOL_MASK
;
3215 vmdctl
|= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT
;
3216 vmdctl
|= IXGBE_VT_CTL_REPLEN
;
3217 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
);
3219 vf_shift
= VMDQ_P(0) % 32;
3220 reg_offset
= (VMDQ_P(0) >= 32) ? 1 : 0;
3222 /* Enable only the PF's pool for Tx/Rx */
3223 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), (~0) << vf_shift
);
3224 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), reg_offset
- 1);
3225 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), (~0) << vf_shift
);
3226 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), reg_offset
- 1);
3227 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3229 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3230 hw
->mac
.ops
.set_vmdq(hw
, 0, VMDQ_P(0));
3233 * Set up VF register offsets for selected VT Mode,
3234 * i.e. 32 or 64 VFs for SR-IOV
3236 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
3237 case IXGBE_82599_VMDQ_8Q_MASK
:
3238 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_16
;
3240 case IXGBE_82599_VMDQ_4Q_MASK
:
3241 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_32
;
3244 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_64
;
3248 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
3250 /* enable Tx loopback for VF/PF communication */
3251 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3253 /* Enable MAC Anti-Spoofing */
3254 hw
->mac
.ops
.set_mac_anti_spoofing(hw
, (adapter
->num_vfs
!= 0),
3256 /* For VFs that have spoof checking turned off */
3257 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
3258 if (!adapter
->vfinfo
[i
].spoofchk_enabled
)
3259 ixgbe_ndo_set_vf_spoofchk(adapter
->netdev
, i
, false);
3263 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
3265 struct ixgbe_hw
*hw
= &adapter
->hw
;
3266 struct net_device
*netdev
= adapter
->netdev
;
3267 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3268 struct ixgbe_ring
*rx_ring
;
3273 /* adjust max frame to be able to do baby jumbo for FCoE */
3274 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
3275 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
3276 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3278 #endif /* IXGBE_FCOE */
3280 /* adjust max frame to be at least the size of a standard frame */
3281 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
3282 max_frame
= (ETH_FRAME_LEN
+ ETH_FCS_LEN
);
3284 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
3285 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
3286 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
3287 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
3289 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
3292 /* MHADD will allow an extra 4 bytes past for vlan tagged frames */
3293 max_frame
+= VLAN_HLEN
;
3295 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
3296 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3297 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
3298 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
3301 * Setup the HW Rx Head and Tail Descriptor Pointers and
3302 * the Base and Length of the Rx Descriptor Ring
3304 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3305 rx_ring
= adapter
->rx_ring
[i
];
3306 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
3307 set_ring_rsc_enabled(rx_ring
);
3309 clear_ring_rsc_enabled(rx_ring
);
3313 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
3315 struct ixgbe_hw
*hw
= &adapter
->hw
;
3316 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
3318 switch (hw
->mac
.type
) {
3319 case ixgbe_mac_82598EB
:
3321 * For VMDq support of different descriptor types or
3322 * buffer sizes through the use of multiple SRRCTL
3323 * registers, RDRXCTL.MVMEN must be set to 1
3325 * also, the manual doesn't mention it clearly but DCA hints
3326 * will only use queue 0's tags unless this bit is set. Side
3327 * effects of setting this bit are only that SRRCTL must be
3328 * fully programmed [0..15]
3330 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
3332 case ixgbe_mac_82599EB
:
3333 case ixgbe_mac_X540
:
3334 /* Disable RSC for ACK packets */
3335 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
3336 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
3337 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
3338 /* hardware requires some bits to be set by default */
3339 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
3340 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
3343 /* We should do nothing since we don't know this hardware */
3347 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
3351 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3352 * @adapter: board private structure
3354 * Configure the Rx unit of the MAC after a reset.
3356 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
3358 struct ixgbe_hw
*hw
= &adapter
->hw
;
3362 /* disable receives while setting up the descriptors */
3363 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3364 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3366 ixgbe_setup_psrtype(adapter
);
3367 ixgbe_setup_rdrxctl(adapter
);
3369 /* Program registers for the distribution of queues */
3370 ixgbe_setup_mrqc(adapter
);
3372 /* set_rx_buffer_len must be called before ring initialization */
3373 ixgbe_set_rx_buffer_len(adapter
);
3376 * Setup the HW Rx Head and Tail Descriptor Pointers and
3377 * the Base and Length of the Rx Descriptor Ring
3379 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3380 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3382 /* disable drop enable for 82598 parts */
3383 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3384 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
3386 /* enable all receives */
3387 rxctrl
|= IXGBE_RXCTRL_RXEN
;
3388 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
3391 static int ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
3393 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3394 struct ixgbe_hw
*hw
= &adapter
->hw
;
3396 /* add VID to filter table */
3397 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, VMDQ_P(0), true);
3398 set_bit(vid
, adapter
->active_vlans
);
3403 static int ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
3405 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3406 struct ixgbe_hw
*hw
= &adapter
->hw
;
3408 /* remove VID from filter table */
3409 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, VMDQ_P(0), false);
3410 clear_bit(vid
, adapter
->active_vlans
);
3416 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3417 * @adapter: driver data
3419 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter
*adapter
)
3421 struct ixgbe_hw
*hw
= &adapter
->hw
;
3424 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3425 vlnctrl
&= ~(IXGBE_VLNCTRL_VFE
| IXGBE_VLNCTRL_CFIEN
);
3426 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3430 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3431 * @adapter: driver data
3433 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter
*adapter
)
3435 struct ixgbe_hw
*hw
= &adapter
->hw
;
3438 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3439 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
3440 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
3441 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3445 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3446 * @adapter: driver data
3448 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter
*adapter
)
3450 struct ixgbe_hw
*hw
= &adapter
->hw
;
3454 switch (hw
->mac
.type
) {
3455 case ixgbe_mac_82598EB
:
3456 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3457 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
3458 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3460 case ixgbe_mac_82599EB
:
3461 case ixgbe_mac_X540
:
3462 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3463 j
= adapter
->rx_ring
[i
]->reg_idx
;
3464 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3465 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
3466 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3475 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3476 * @adapter: driver data
3478 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter
*adapter
)
3480 struct ixgbe_hw
*hw
= &adapter
->hw
;
3484 switch (hw
->mac
.type
) {
3485 case ixgbe_mac_82598EB
:
3486 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3487 vlnctrl
|= IXGBE_VLNCTRL_VME
;
3488 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3490 case ixgbe_mac_82599EB
:
3491 case ixgbe_mac_X540
:
3492 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3493 j
= adapter
->rx_ring
[i
]->reg_idx
;
3494 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3495 vlnctrl
|= IXGBE_RXDCTL_VME
;
3496 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3504 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
3508 ixgbe_vlan_rx_add_vid(adapter
->netdev
, 0);
3510 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
3511 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
3515 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3516 * @netdev: network interface device structure
3518 * Writes unicast address list to the RAR table.
3519 * Returns: -ENOMEM on failure/insufficient address space
3520 * 0 on no addresses written
3521 * X on writing X addresses to the RAR table
3523 static int ixgbe_write_uc_addr_list(struct net_device
*netdev
)
3525 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3526 struct ixgbe_hw
*hw
= &adapter
->hw
;
3527 unsigned int rar_entries
= hw
->mac
.num_rar_entries
- 1;
3530 /* In SR-IOV mode significantly less RAR entries are available */
3531 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3532 rar_entries
= IXGBE_MAX_PF_MACVLANS
- 1;
3534 /* return ENOMEM indicating insufficient memory for addresses */
3535 if (netdev_uc_count(netdev
) > rar_entries
)
3538 if (!netdev_uc_empty(netdev
)) {
3539 struct netdev_hw_addr
*ha
;
3540 /* return error if we do not support writing to RAR table */
3541 if (!hw
->mac
.ops
.set_rar
)
3544 netdev_for_each_uc_addr(ha
, netdev
) {
3547 hw
->mac
.ops
.set_rar(hw
, rar_entries
--, ha
->addr
,
3548 VMDQ_P(0), IXGBE_RAH_AV
);
3552 /* write the addresses in reverse order to avoid write combining */
3553 for (; rar_entries
> 0 ; rar_entries
--)
3554 hw
->mac
.ops
.clear_rar(hw
, rar_entries
);
3560 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3561 * @netdev: network interface device structure
3563 * The set_rx_method entry point is called whenever the unicast/multicast
3564 * address list or the network interface flags are updated. This routine is
3565 * responsible for configuring the hardware for proper unicast, multicast and
3568 void ixgbe_set_rx_mode(struct net_device
*netdev
)
3570 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3571 struct ixgbe_hw
*hw
= &adapter
->hw
;
3572 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
3575 /* Check for Promiscuous and All Multicast modes */
3577 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3579 /* set all bits that we expect to always be set */
3580 fctrl
&= ~IXGBE_FCTRL_SBP
; /* disable store-bad-packets */
3581 fctrl
|= IXGBE_FCTRL_BAM
;
3582 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
3583 fctrl
|= IXGBE_FCTRL_PMCF
;
3585 /* clear the bits we are changing the status of */
3586 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3588 if (netdev
->flags
& IFF_PROMISC
) {
3589 hw
->addr_ctrl
.user_set_promisc
= true;
3590 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3591 vmolr
|= (IXGBE_VMOLR_ROPE
| IXGBE_VMOLR_MPE
);
3592 /* don't hardware filter vlans in promisc mode */
3593 ixgbe_vlan_filter_disable(adapter
);
3595 if (netdev
->flags
& IFF_ALLMULTI
) {
3596 fctrl
|= IXGBE_FCTRL_MPE
;
3597 vmolr
|= IXGBE_VMOLR_MPE
;
3600 * Write addresses to the MTA, if the attempt fails
3601 * then we should just turn on promiscuous mode so
3602 * that we can at least receive multicast traffic
3604 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
3605 vmolr
|= IXGBE_VMOLR_ROMPE
;
3607 ixgbe_vlan_filter_enable(adapter
);
3608 hw
->addr_ctrl
.user_set_promisc
= false;
3612 * Write addresses to available RAR registers, if there is not
3613 * sufficient space to store all the addresses then enable
3614 * unicast promiscuous mode
3616 count
= ixgbe_write_uc_addr_list(netdev
);
3618 fctrl
|= IXGBE_FCTRL_UPE
;
3619 vmolr
|= IXGBE_VMOLR_ROPE
;
3622 if (adapter
->num_vfs
)
3623 ixgbe_restore_vf_multicasts(adapter
);
3625 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3626 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(VMDQ_P(0))) &
3627 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
3629 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(VMDQ_P(0)), vmolr
);
3632 /* This is useful for sniffing bad packets. */
3633 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3634 /* UPE and MPE will be handled by normal PROMISC logic
3635 * in e1000e_set_rx_mode */
3636 fctrl
|= (IXGBE_FCTRL_SBP
| /* Receive bad packets */
3637 IXGBE_FCTRL_BAM
| /* RX All Bcast Pkts */
3638 IXGBE_FCTRL_PMCF
); /* RX All MAC Ctrl Pkts */
3640 fctrl
&= ~(IXGBE_FCTRL_DPF
);
3641 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3644 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
3646 if (netdev
->features
& NETIF_F_HW_VLAN_RX
)
3647 ixgbe_vlan_strip_enable(adapter
);
3649 ixgbe_vlan_strip_disable(adapter
);
3652 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
3656 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++)
3657 napi_enable(&adapter
->q_vector
[q_idx
]->napi
);
3660 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
3664 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++)
3665 napi_disable(&adapter
->q_vector
[q_idx
]->napi
);
3668 #ifdef CONFIG_IXGBE_DCB
3670 * ixgbe_configure_dcb - Configure DCB hardware
3671 * @adapter: ixgbe adapter struct
3673 * This is called by the driver on open to configure the DCB hardware.
3674 * This is also called by the gennetlink interface when reconfiguring
3677 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
3679 struct ixgbe_hw
*hw
= &adapter
->hw
;
3680 int max_frame
= adapter
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3682 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
3683 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3684 netif_set_gso_max_size(adapter
->netdev
, 65536);
3688 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3689 netif_set_gso_max_size(adapter
->netdev
, 32768);
3692 if (adapter
->netdev
->features
& NETIF_F_FCOE_MTU
)
3693 max_frame
= max(max_frame
, IXGBE_FCOE_JUMBO_FRAME_SIZE
);
3696 /* reconfigure the hardware */
3697 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
) {
3698 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
3700 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
3702 ixgbe_dcb_hw_config(hw
, &adapter
->dcb_cfg
);
3703 } else if (adapter
->ixgbe_ieee_ets
&& adapter
->ixgbe_ieee_pfc
) {
3704 ixgbe_dcb_hw_ets(&adapter
->hw
,
3705 adapter
->ixgbe_ieee_ets
,
3707 ixgbe_dcb_hw_pfc_config(&adapter
->hw
,
3708 adapter
->ixgbe_ieee_pfc
->pfc_en
,
3709 adapter
->ixgbe_ieee_ets
->prio_tc
);
3712 /* Enable RSS Hash per TC */
3713 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3715 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
- 1;
3722 /* write msb to all 8 TCs in one write */
3723 IXGBE_WRITE_REG(hw
, IXGBE_RQTC
, msb
* 0x11111111);
3728 /* Additional bittime to account for IXGBE framing */
3729 #define IXGBE_ETH_FRAMING 20
3732 * ixgbe_hpbthresh - calculate high water mark for flow control
3734 * @adapter: board private structure to calculate for
3735 * @pb: packet buffer to calculate
3737 static int ixgbe_hpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
3739 struct ixgbe_hw
*hw
= &adapter
->hw
;
3740 struct net_device
*dev
= adapter
->netdev
;
3741 int link
, tc
, kb
, marker
;
3744 /* Calculate max LAN frame size */
3745 tc
= link
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ IXGBE_ETH_FRAMING
;
3748 /* FCoE traffic class uses FCOE jumbo frames */
3749 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
3750 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
3751 (pb
== ixgbe_fcoe_get_tc(adapter
)))
3752 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3755 /* Calculate delay value for device */
3756 switch (hw
->mac
.type
) {
3757 case ixgbe_mac_X540
:
3758 dv_id
= IXGBE_DV_X540(link
, tc
);
3761 dv_id
= IXGBE_DV(link
, tc
);
3765 /* Loopback switch introduces additional latency */
3766 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3767 dv_id
+= IXGBE_B2BT(tc
);
3769 /* Delay value is calculated in bit times convert to KB */
3770 kb
= IXGBE_BT2KB(dv_id
);
3771 rx_pba
= IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(pb
)) >> 10;
3773 marker
= rx_pba
- kb
;
3775 /* It is possible that the packet buffer is not large enough
3776 * to provide required headroom. In this case throw an error
3777 * to user and a do the best we can.
3780 e_warn(drv
, "Packet Buffer(%i) can not provide enough"
3781 "headroom to support flow control."
3782 "Decrease MTU or number of traffic classes\n", pb
);
3790 * ixgbe_lpbthresh - calculate low water mark for for flow control
3792 * @adapter: board private structure to calculate for
3793 * @pb: packet buffer to calculate
3795 static int ixgbe_lpbthresh(struct ixgbe_adapter
*adapter
)
3797 struct ixgbe_hw
*hw
= &adapter
->hw
;
3798 struct net_device
*dev
= adapter
->netdev
;
3802 /* Calculate max LAN frame size */
3803 tc
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3805 /* Calculate delay value for device */
3806 switch (hw
->mac
.type
) {
3807 case ixgbe_mac_X540
:
3808 dv_id
= IXGBE_LOW_DV_X540(tc
);
3811 dv_id
= IXGBE_LOW_DV(tc
);
3815 /* Delay value is calculated in bit times convert to KB */
3816 return IXGBE_BT2KB(dv_id
);
3820 * ixgbe_pbthresh_setup - calculate and setup high low water marks
3822 static void ixgbe_pbthresh_setup(struct ixgbe_adapter
*adapter
)
3824 struct ixgbe_hw
*hw
= &adapter
->hw
;
3825 int num_tc
= netdev_get_num_tc(adapter
->netdev
);
3831 hw
->fc
.low_water
= ixgbe_lpbthresh(adapter
);
3833 for (i
= 0; i
< num_tc
; i
++) {
3834 hw
->fc
.high_water
[i
] = ixgbe_hpbthresh(adapter
, i
);
3836 /* Low water marks must not be larger than high water marks */
3837 if (hw
->fc
.low_water
> hw
->fc
.high_water
[i
])
3838 hw
->fc
.low_water
= 0;
3842 static void ixgbe_configure_pb(struct ixgbe_adapter
*adapter
)
3844 struct ixgbe_hw
*hw
= &adapter
->hw
;
3846 u8 tc
= netdev_get_num_tc(adapter
->netdev
);
3848 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
3849 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
3850 hdrm
= 32 << adapter
->fdir_pballoc
;
3854 hw
->mac
.ops
.set_rxpba(hw
, tc
, hdrm
, PBA_STRATEGY_EQUAL
);
3855 ixgbe_pbthresh_setup(adapter
);
3858 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter
*adapter
)
3860 struct ixgbe_hw
*hw
= &adapter
->hw
;
3861 struct hlist_node
*node
, *node2
;
3862 struct ixgbe_fdir_filter
*filter
;
3864 spin_lock(&adapter
->fdir_perfect_lock
);
3866 if (!hlist_empty(&adapter
->fdir_filter_list
))
3867 ixgbe_fdir_set_input_mask_82599(hw
, &adapter
->fdir_mask
);
3869 hlist_for_each_entry_safe(filter
, node
, node2
,
3870 &adapter
->fdir_filter_list
, fdir_node
) {
3871 ixgbe_fdir_write_perfect_filter_82599(hw
,
3874 (filter
->action
== IXGBE_FDIR_DROP_QUEUE
) ?
3875 IXGBE_FDIR_DROP_QUEUE
:
3876 adapter
->rx_ring
[filter
->action
]->reg_idx
);
3879 spin_unlock(&adapter
->fdir_perfect_lock
);
3882 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
3884 struct ixgbe_hw
*hw
= &adapter
->hw
;
3886 ixgbe_configure_pb(adapter
);
3887 #ifdef CONFIG_IXGBE_DCB
3888 ixgbe_configure_dcb(adapter
);
3891 * We must restore virtualization before VLANs or else
3892 * the VLVF registers will not be populated
3894 ixgbe_configure_virtualization(adapter
);
3896 ixgbe_set_rx_mode(adapter
->netdev
);
3897 ixgbe_restore_vlan(adapter
);
3899 switch (hw
->mac
.type
) {
3900 case ixgbe_mac_82599EB
:
3901 case ixgbe_mac_X540
:
3902 hw
->mac
.ops
.disable_rx_buff(hw
);
3908 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3909 ixgbe_init_fdir_signature_82599(&adapter
->hw
,
3910 adapter
->fdir_pballoc
);
3911 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
3912 ixgbe_init_fdir_perfect_82599(&adapter
->hw
,
3913 adapter
->fdir_pballoc
);
3914 ixgbe_fdir_filter_restore(adapter
);
3917 switch (hw
->mac
.type
) {
3918 case ixgbe_mac_82599EB
:
3919 case ixgbe_mac_X540
:
3920 hw
->mac
.ops
.enable_rx_buff(hw
);
3927 /* configure FCoE L2 filters, redirection table, and Rx control */
3928 ixgbe_configure_fcoe(adapter
);
3930 #endif /* IXGBE_FCOE */
3931 ixgbe_configure_tx(adapter
);
3932 ixgbe_configure_rx(adapter
);
3935 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
3937 switch (hw
->phy
.type
) {
3938 case ixgbe_phy_sfp_avago
:
3939 case ixgbe_phy_sfp_ftl
:
3940 case ixgbe_phy_sfp_intel
:
3941 case ixgbe_phy_sfp_unknown
:
3942 case ixgbe_phy_sfp_passive_tyco
:
3943 case ixgbe_phy_sfp_passive_unknown
:
3944 case ixgbe_phy_sfp_active_unknown
:
3945 case ixgbe_phy_sfp_ftl_active
:
3948 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3956 * ixgbe_sfp_link_config - set up SFP+ link
3957 * @adapter: pointer to private adapter struct
3959 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
3962 * We are assuming the worst case scenario here, and that
3963 * is that an SFP was inserted/removed after the reset
3964 * but before SFP detection was enabled. As such the best
3965 * solution is to just start searching as soon as we start
3967 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
3968 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
3970 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
3974 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3975 * @hw: pointer to private hardware struct
3977 * Returns 0 on success, negative on failure
3979 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
3982 bool negotiation
, link_up
= false;
3983 u32 ret
= IXGBE_ERR_LINK_SETUP
;
3985 if (hw
->mac
.ops
.check_link
)
3986 ret
= hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
3991 autoneg
= hw
->phy
.autoneg_advertised
;
3992 if ((!autoneg
) && (hw
->mac
.ops
.get_link_capabilities
))
3993 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
,
3998 if (hw
->mac
.ops
.setup_link
)
3999 ret
= hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, link_up
);
4004 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
4006 struct ixgbe_hw
*hw
= &adapter
->hw
;
4009 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
4010 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
4012 gpie
|= IXGBE_GPIE_EIAME
;
4014 * use EIAM to auto-mask when MSI-X interrupt is asserted
4015 * this saves a register write for every interrupt
4017 switch (hw
->mac
.type
) {
4018 case ixgbe_mac_82598EB
:
4019 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
4021 case ixgbe_mac_82599EB
:
4022 case ixgbe_mac_X540
:
4024 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4025 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4029 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4030 * specifically only auto mask tx and rx interrupts */
4031 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
4034 /* XXX: to interrupt immediately for EICS writes, enable this */
4035 /* gpie |= IXGBE_GPIE_EIMEN; */
4037 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
4038 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
4040 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
4041 case IXGBE_82599_VMDQ_8Q_MASK
:
4042 gpie
|= IXGBE_GPIE_VTMODE_16
;
4044 case IXGBE_82599_VMDQ_4Q_MASK
:
4045 gpie
|= IXGBE_GPIE_VTMODE_32
;
4048 gpie
|= IXGBE_GPIE_VTMODE_64
;
4053 /* Enable Thermal over heat sensor interrupt */
4054 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) {
4055 switch (adapter
->hw
.mac
.type
) {
4056 case ixgbe_mac_82599EB
:
4057 gpie
|= IXGBE_SDP0_GPIEN
;
4059 case ixgbe_mac_X540
:
4060 gpie
|= IXGBE_EIMS_TS
;
4067 /* Enable fan failure interrupt */
4068 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
4069 gpie
|= IXGBE_SDP1_GPIEN
;
4071 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4072 gpie
|= IXGBE_SDP1_GPIEN
;
4073 gpie
|= IXGBE_SDP2_GPIEN
;
4076 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
4079 static void ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
4081 struct ixgbe_hw
*hw
= &adapter
->hw
;
4085 ixgbe_get_hw_control(adapter
);
4086 ixgbe_setup_gpie(adapter
);
4088 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
4089 ixgbe_configure_msix(adapter
);
4091 ixgbe_configure_msi_and_legacy(adapter
);
4093 /* enable the optics for both mult-speed fiber and 82599 SFP+ fiber */
4094 if (hw
->mac
.ops
.enable_tx_laser
&&
4095 ((hw
->phy
.multispeed_fiber
) ||
4096 ((hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
) &&
4097 (hw
->mac
.type
== ixgbe_mac_82599EB
))))
4098 hw
->mac
.ops
.enable_tx_laser(hw
);
4100 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
4101 ixgbe_napi_enable_all(adapter
);
4103 if (ixgbe_is_sfp(hw
)) {
4104 ixgbe_sfp_link_config(adapter
);
4106 err
= ixgbe_non_sfp_link_config(hw
);
4108 e_err(probe
, "link_config FAILED %d\n", err
);
4111 /* clear any pending interrupts, may auto mask */
4112 IXGBE_READ_REG(hw
, IXGBE_EICR
);
4113 ixgbe_irq_enable(adapter
, true, true);
4116 * If this adapter has a fan, check to see if we had a failure
4117 * before we enabled the interrupt.
4119 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
4120 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
4121 if (esdp
& IXGBE_ESDP_SDP1
)
4122 e_crit(drv
, "Fan has stopped, replace the adapter\n");
4125 /* enable transmits */
4126 netif_tx_start_all_queues(adapter
->netdev
);
4128 /* bring the link up in the watchdog, this could race with our first
4129 * link up interrupt but shouldn't be a problem */
4130 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
4131 adapter
->link_check_timeout
= jiffies
;
4132 mod_timer(&adapter
->service_timer
, jiffies
);
4134 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4135 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
4136 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
4137 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
4140 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
4142 WARN_ON(in_interrupt());
4143 /* put off any impending NetWatchDogTimeout */
4144 adapter
->netdev
->trans_start
= jiffies
;
4146 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
4147 usleep_range(1000, 2000);
4148 ixgbe_down(adapter
);
4150 * If SR-IOV enabled then wait a bit before bringing the adapter
4151 * back up to give the VFs time to respond to the reset. The
4152 * two second wait is based upon the watchdog timer cycle in
4155 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4158 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
4161 void ixgbe_up(struct ixgbe_adapter
*adapter
)
4163 /* hardware has been reset, we need to reload some things */
4164 ixgbe_configure(adapter
);
4166 ixgbe_up_complete(adapter
);
4169 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
4171 struct ixgbe_hw
*hw
= &adapter
->hw
;
4174 /* lock SFP init bit to prevent race conditions with the watchdog */
4175 while (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
4176 usleep_range(1000, 2000);
4178 /* clear all SFP and link config related flags while holding SFP_INIT */
4179 adapter
->flags2
&= ~(IXGBE_FLAG2_SEARCH_FOR_SFP
|
4180 IXGBE_FLAG2_SFP_NEEDS_RESET
);
4181 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
4183 err
= hw
->mac
.ops
.init_hw(hw
);
4186 case IXGBE_ERR_SFP_NOT_PRESENT
:
4187 case IXGBE_ERR_SFP_NOT_SUPPORTED
:
4189 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
4190 e_dev_err("master disable timed out\n");
4192 case IXGBE_ERR_EEPROM_VERSION
:
4193 /* We are running on a pre-production device, log a warning */
4194 e_dev_warn("This device is a pre-production adapter/LOM. "
4195 "Please be aware there may be issues associated with "
4196 "your hardware. If you are experiencing problems "
4197 "please contact your Intel or hardware "
4198 "representative who provided you with this "
4202 e_dev_err("Hardware Error: %d\n", err
);
4205 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
4207 /* reprogram the RAR[0] in case user changed it. */
4208 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, VMDQ_P(0), IXGBE_RAH_AV
);
4210 /* update SAN MAC vmdq pool selection */
4211 if (hw
->mac
.san_mac_rar_index
)
4212 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
4216 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4217 * @rx_ring: ring to free buffers from
4219 static void ixgbe_clean_rx_ring(struct ixgbe_ring
*rx_ring
)
4221 struct device
*dev
= rx_ring
->dev
;
4225 /* ring already cleared, nothing to do */
4226 if (!rx_ring
->rx_buffer_info
)
4229 /* Free all the Rx ring sk_buffs */
4230 for (i
= 0; i
< rx_ring
->count
; i
++) {
4231 struct ixgbe_rx_buffer
*rx_buffer
;
4233 rx_buffer
= &rx_ring
->rx_buffer_info
[i
];
4234 if (rx_buffer
->skb
) {
4235 struct sk_buff
*skb
= rx_buffer
->skb
;
4236 if (IXGBE_CB(skb
)->page_released
) {
4239 ixgbe_rx_bufsz(rx_ring
),
4241 IXGBE_CB(skb
)->page_released
= false;
4245 rx_buffer
->skb
= NULL
;
4247 dma_unmap_page(dev
, rx_buffer
->dma
,
4248 ixgbe_rx_pg_size(rx_ring
),
4251 if (rx_buffer
->page
)
4252 __free_pages(rx_buffer
->page
,
4253 ixgbe_rx_pg_order(rx_ring
));
4254 rx_buffer
->page
= NULL
;
4257 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4258 memset(rx_ring
->rx_buffer_info
, 0, size
);
4260 /* Zero out the descriptor ring */
4261 memset(rx_ring
->desc
, 0, rx_ring
->size
);
4263 rx_ring
->next_to_alloc
= 0;
4264 rx_ring
->next_to_clean
= 0;
4265 rx_ring
->next_to_use
= 0;
4269 * ixgbe_clean_tx_ring - Free Tx Buffers
4270 * @tx_ring: ring to be cleaned
4272 static void ixgbe_clean_tx_ring(struct ixgbe_ring
*tx_ring
)
4274 struct ixgbe_tx_buffer
*tx_buffer_info
;
4278 /* ring already cleared, nothing to do */
4279 if (!tx_ring
->tx_buffer_info
)
4282 /* Free all the Tx ring sk_buffs */
4283 for (i
= 0; i
< tx_ring
->count
; i
++) {
4284 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4285 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer_info
);
4288 netdev_tx_reset_queue(txring_txq(tx_ring
));
4290 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4291 memset(tx_ring
->tx_buffer_info
, 0, size
);
4293 /* Zero out the descriptor ring */
4294 memset(tx_ring
->desc
, 0, tx_ring
->size
);
4296 tx_ring
->next_to_use
= 0;
4297 tx_ring
->next_to_clean
= 0;
4301 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4302 * @adapter: board private structure
4304 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
4308 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4309 ixgbe_clean_rx_ring(adapter
->rx_ring
[i
]);
4313 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4314 * @adapter: board private structure
4316 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
4320 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4321 ixgbe_clean_tx_ring(adapter
->tx_ring
[i
]);
4324 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter
*adapter
)
4326 struct hlist_node
*node
, *node2
;
4327 struct ixgbe_fdir_filter
*filter
;
4329 spin_lock(&adapter
->fdir_perfect_lock
);
4331 hlist_for_each_entry_safe(filter
, node
, node2
,
4332 &adapter
->fdir_filter_list
, fdir_node
) {
4333 hlist_del(&filter
->fdir_node
);
4336 adapter
->fdir_filter_count
= 0;
4338 spin_unlock(&adapter
->fdir_perfect_lock
);
4341 void ixgbe_down(struct ixgbe_adapter
*adapter
)
4343 struct net_device
*netdev
= adapter
->netdev
;
4344 struct ixgbe_hw
*hw
= &adapter
->hw
;
4348 /* signal that we are down to the interrupt handler */
4349 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4351 /* disable receives */
4352 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
4353 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
4355 /* disable all enabled rx queues */
4356 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4357 /* this call also flushes the previous write */
4358 ixgbe_disable_rx_queue(adapter
, adapter
->rx_ring
[i
]);
4360 usleep_range(10000, 20000);
4362 netif_tx_stop_all_queues(netdev
);
4364 /* call carrier off first to avoid false dev_watchdog timeouts */
4365 netif_carrier_off(netdev
);
4366 netif_tx_disable(netdev
);
4368 ixgbe_irq_disable(adapter
);
4370 ixgbe_napi_disable_all(adapter
);
4372 adapter
->flags2
&= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT
|
4373 IXGBE_FLAG2_RESET_REQUESTED
);
4374 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
4376 del_timer_sync(&adapter
->service_timer
);
4378 if (adapter
->num_vfs
) {
4379 /* Clear EITR Select mapping */
4380 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
4382 /* Mark all the VFs as inactive */
4383 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
4384 adapter
->vfinfo
[i
].clear_to_send
= false;
4386 /* ping all the active vfs to let them know we are going down */
4387 ixgbe_ping_all_vfs(adapter
);
4389 /* Disable all VFTE/VFRE TX/RX */
4390 ixgbe_disable_tx_rx(adapter
);
4393 /* disable transmits in the hardware now that interrupts are off */
4394 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4395 u8 reg_idx
= adapter
->tx_ring
[i
]->reg_idx
;
4396 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
4399 /* Disable the Tx DMA engine on 82599 and X540 */
4400 switch (hw
->mac
.type
) {
4401 case ixgbe_mac_82599EB
:
4402 case ixgbe_mac_X540
:
4403 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
4404 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
4405 ~IXGBE_DMATXCTL_TE
));
4411 if (!pci_channel_offline(adapter
->pdev
))
4412 ixgbe_reset(adapter
);
4414 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
4415 if (hw
->mac
.ops
.disable_tx_laser
&&
4416 ((hw
->phy
.multispeed_fiber
) ||
4417 ((hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
) &&
4418 (hw
->mac
.type
== ixgbe_mac_82599EB
))))
4419 hw
->mac
.ops
.disable_tx_laser(hw
);
4421 ixgbe_clean_all_tx_rings(adapter
);
4422 ixgbe_clean_all_rx_rings(adapter
);
4424 #ifdef CONFIG_IXGBE_DCA
4425 /* since we reset the hardware DCA settings were cleared */
4426 ixgbe_setup_dca(adapter
);
4431 * ixgbe_tx_timeout - Respond to a Tx Hang
4432 * @netdev: network interface device structure
4434 static void ixgbe_tx_timeout(struct net_device
*netdev
)
4436 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4438 /* Do the reset outside of interrupt context */
4439 ixgbe_tx_timeout_reset(adapter
);
4443 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4444 * @adapter: board private structure to initialize
4446 * ixgbe_sw_init initializes the Adapter private data structure.
4447 * Fields are initialized based on PCI device information and
4448 * OS network device settings (MTU size).
4450 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
4452 struct ixgbe_hw
*hw
= &adapter
->hw
;
4453 struct pci_dev
*pdev
= adapter
->pdev
;
4455 #ifdef CONFIG_IXGBE_DCB
4457 struct tc_configuration
*tc
;
4460 /* PCI config space info */
4462 hw
->vendor_id
= pdev
->vendor
;
4463 hw
->device_id
= pdev
->device
;
4464 hw
->revision_id
= pdev
->revision
;
4465 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
4466 hw
->subsystem_device_id
= pdev
->subsystem_device
;
4468 /* Set capability flags */
4469 rss
= min_t(int, IXGBE_MAX_RSS_INDICES
, num_online_cpus());
4470 adapter
->ring_feature
[RING_F_RSS
].limit
= rss
;
4471 switch (hw
->mac
.type
) {
4472 case ixgbe_mac_82598EB
:
4473 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
4474 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
4475 adapter
->max_q_vectors
= MAX_Q_VECTORS_82598
;
4477 case ixgbe_mac_X540
:
4478 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
4479 case ixgbe_mac_82599EB
:
4480 adapter
->max_q_vectors
= MAX_Q_VECTORS_82599
;
4481 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
4482 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
4483 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
4484 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
4485 /* Flow Director hash filters enabled */
4486 adapter
->atr_sample_rate
= 20;
4487 adapter
->ring_feature
[RING_F_FDIR
].limit
=
4488 IXGBE_MAX_FDIR_INDICES
;
4489 adapter
->fdir_pballoc
= IXGBE_FDIR_PBALLOC_64K
;
4491 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
4492 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
4493 #ifdef CONFIG_IXGBE_DCB
4494 /* Default traffic class to use for FCoE */
4495 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
4497 #endif /* IXGBE_FCOE */
4504 /* FCoE support exists, always init the FCoE lock */
4505 spin_lock_init(&adapter
->fcoe
.lock
);
4508 /* n-tuple support exists, always init our spinlock */
4509 spin_lock_init(&adapter
->fdir_perfect_lock
);
4511 #ifdef CONFIG_IXGBE_DCB
4512 switch (hw
->mac
.type
) {
4513 case ixgbe_mac_X540
:
4514 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= X540_TRAFFIC_CLASS
;
4515 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= X540_TRAFFIC_CLASS
;
4518 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= MAX_TRAFFIC_CLASS
;
4519 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= MAX_TRAFFIC_CLASS
;
4523 /* Configure DCB traffic classes */
4524 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
4525 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
4526 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
4527 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4528 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
4529 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4530 tc
->dcb_pfc
= pfc_disabled
;
4533 /* Initialize default user to priority mapping, UPx->TC0 */
4534 tc
= &adapter
->dcb_cfg
.tc_config
[0];
4535 tc
->path
[DCB_TX_CONFIG
].up_to_tc_bitmap
= 0xFF;
4536 tc
->path
[DCB_RX_CONFIG
].up_to_tc_bitmap
= 0xFF;
4538 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
4539 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
4540 adapter
->dcb_cfg
.pfc_mode_enable
= false;
4541 adapter
->dcb_set_bitmap
= 0x00;
4542 adapter
->dcbx_cap
= DCB_CAP_DCBX_HOST
| DCB_CAP_DCBX_VER_CEE
;
4543 memcpy(&adapter
->temp_dcb_cfg
, &adapter
->dcb_cfg
,
4544 sizeof(adapter
->temp_dcb_cfg
));
4548 /* default flow control settings */
4549 hw
->fc
.requested_mode
= ixgbe_fc_full
;
4550 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
4551 ixgbe_pbthresh_setup(adapter
);
4552 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
4553 hw
->fc
.send_xon
= true;
4554 hw
->fc
.disable_fc_autoneg
= false;
4556 #ifdef CONFIG_PCI_IOV
4557 /* assign number of SR-IOV VFs */
4558 if (hw
->mac
.type
!= ixgbe_mac_82598EB
)
4559 adapter
->num_vfs
= (max_vfs
> 63) ? 0 : max_vfs
;
4562 /* enable itr by default in dynamic mode */
4563 adapter
->rx_itr_setting
= 1;
4564 adapter
->tx_itr_setting
= 1;
4566 /* set default ring sizes */
4567 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
4568 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
4570 /* set default work limits */
4571 adapter
->tx_work_limit
= IXGBE_DEFAULT_TX_WORK
;
4573 /* initialize eeprom parameters */
4574 if (ixgbe_init_eeprom_params_generic(hw
)) {
4575 e_dev_err("EEPROM initialization failed\n");
4579 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4585 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4586 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4588 * Return 0 on success, negative on failure
4590 int ixgbe_setup_tx_resources(struct ixgbe_ring
*tx_ring
)
4592 struct device
*dev
= tx_ring
->dev
;
4593 int orig_node
= dev_to_node(dev
);
4597 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4599 if (tx_ring
->q_vector
)
4600 numa_node
= tx_ring
->q_vector
->numa_node
;
4602 tx_ring
->tx_buffer_info
= vzalloc_node(size
, numa_node
);
4603 if (!tx_ring
->tx_buffer_info
)
4604 tx_ring
->tx_buffer_info
= vzalloc(size
);
4605 if (!tx_ring
->tx_buffer_info
)
4608 /* round up to nearest 4K */
4609 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
4610 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
4612 set_dev_node(dev
, numa_node
);
4613 tx_ring
->desc
= dma_alloc_coherent(dev
,
4617 set_dev_node(dev
, orig_node
);
4619 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
4620 &tx_ring
->dma
, GFP_KERNEL
);
4624 tx_ring
->next_to_use
= 0;
4625 tx_ring
->next_to_clean
= 0;
4629 vfree(tx_ring
->tx_buffer_info
);
4630 tx_ring
->tx_buffer_info
= NULL
;
4631 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
4636 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4637 * @adapter: board private structure
4639 * If this function returns with an error, then it's possible one or
4640 * more of the rings is populated (while the rest are not). It is the
4641 * callers duty to clean those orphaned rings.
4643 * Return 0 on success, negative on failure
4645 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
4649 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4650 err
= ixgbe_setup_tx_resources(adapter
->tx_ring
[i
]);
4654 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
4660 /* rewind the index freeing the rings as we go */
4662 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
4667 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4668 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4670 * Returns 0 on success, negative on failure
4672 int ixgbe_setup_rx_resources(struct ixgbe_ring
*rx_ring
)
4674 struct device
*dev
= rx_ring
->dev
;
4675 int orig_node
= dev_to_node(dev
);
4679 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4681 if (rx_ring
->q_vector
)
4682 numa_node
= rx_ring
->q_vector
->numa_node
;
4684 rx_ring
->rx_buffer_info
= vzalloc_node(size
, numa_node
);
4685 if (!rx_ring
->rx_buffer_info
)
4686 rx_ring
->rx_buffer_info
= vzalloc(size
);
4687 if (!rx_ring
->rx_buffer_info
)
4690 /* Round up to nearest 4K */
4691 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
4692 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
4694 set_dev_node(dev
, numa_node
);
4695 rx_ring
->desc
= dma_alloc_coherent(dev
,
4699 set_dev_node(dev
, orig_node
);
4701 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
4702 &rx_ring
->dma
, GFP_KERNEL
);
4706 rx_ring
->next_to_clean
= 0;
4707 rx_ring
->next_to_use
= 0;
4711 vfree(rx_ring
->rx_buffer_info
);
4712 rx_ring
->rx_buffer_info
= NULL
;
4713 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
4718 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4719 * @adapter: board private structure
4721 * If this function returns with an error, then it's possible one or
4722 * more of the rings is populated (while the rest are not). It is the
4723 * callers duty to clean those orphaned rings.
4725 * Return 0 on success, negative on failure
4727 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
4731 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4732 err
= ixgbe_setup_rx_resources(adapter
->rx_ring
[i
]);
4736 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
4741 err
= ixgbe_setup_fcoe_ddp_resources(adapter
);
4746 /* rewind the index freeing the rings as we go */
4748 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
4753 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4754 * @tx_ring: Tx descriptor ring for a specific queue
4756 * Free all transmit software resources
4758 void ixgbe_free_tx_resources(struct ixgbe_ring
*tx_ring
)
4760 ixgbe_clean_tx_ring(tx_ring
);
4762 vfree(tx_ring
->tx_buffer_info
);
4763 tx_ring
->tx_buffer_info
= NULL
;
4765 /* if not set, then don't free */
4769 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
4770 tx_ring
->desc
, tx_ring
->dma
);
4772 tx_ring
->desc
= NULL
;
4776 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4777 * @adapter: board private structure
4779 * Free all transmit software resources
4781 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
4785 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4786 if (adapter
->tx_ring
[i
]->desc
)
4787 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
4791 * ixgbe_free_rx_resources - Free Rx Resources
4792 * @rx_ring: ring to clean the resources from
4794 * Free all receive software resources
4796 void ixgbe_free_rx_resources(struct ixgbe_ring
*rx_ring
)
4798 ixgbe_clean_rx_ring(rx_ring
);
4800 vfree(rx_ring
->rx_buffer_info
);
4801 rx_ring
->rx_buffer_info
= NULL
;
4803 /* if not set, then don't free */
4807 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
4808 rx_ring
->desc
, rx_ring
->dma
);
4810 rx_ring
->desc
= NULL
;
4814 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4815 * @adapter: board private structure
4817 * Free all receive software resources
4819 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
4824 ixgbe_free_fcoe_ddp_resources(adapter
);
4827 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4828 if (adapter
->rx_ring
[i
]->desc
)
4829 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
4833 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4834 * @netdev: network interface device structure
4835 * @new_mtu: new value for maximum frame size
4837 * Returns 0 on success, negative on failure
4839 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
4841 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4842 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4844 /* MTU < 68 is an error and causes problems on some kernels */
4845 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
4849 * For 82599EB we cannot allow legacy VFs to enable their receive
4850 * paths when MTU greater than 1500 is configured. So display a
4851 * warning that legacy VFs will be disabled.
4853 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
4854 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) &&
4855 (max_frame
> MAXIMUM_ETHERNET_VLAN_SIZE
))
4856 e_warn(probe
, "Setting MTU > 1500 will disable legacy VFs\n");
4858 e_info(probe
, "changing MTU from %d to %d\n", netdev
->mtu
, new_mtu
);
4860 /* must set new MTU before calling down or up */
4861 netdev
->mtu
= new_mtu
;
4863 if (netif_running(netdev
))
4864 ixgbe_reinit_locked(adapter
);
4870 * ixgbe_open - Called when a network interface is made active
4871 * @netdev: network interface device structure
4873 * Returns 0 on success, negative value on failure
4875 * The open entry point is called when a network interface is made
4876 * active by the system (IFF_UP). At this point all resources needed
4877 * for transmit and receive operations are allocated, the interrupt
4878 * handler is registered with the OS, the watchdog timer is started,
4879 * and the stack is notified that the interface is ready.
4881 static int ixgbe_open(struct net_device
*netdev
)
4883 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4886 /* disallow open during test */
4887 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
4890 netif_carrier_off(netdev
);
4892 /* allocate transmit descriptors */
4893 err
= ixgbe_setup_all_tx_resources(adapter
);
4897 /* allocate receive descriptors */
4898 err
= ixgbe_setup_all_rx_resources(adapter
);
4902 ixgbe_configure(adapter
);
4904 err
= ixgbe_request_irq(adapter
);
4908 /* Notify the stack of the actual queue counts. */
4909 err
= netif_set_real_num_tx_queues(netdev
,
4910 adapter
->num_rx_pools
> 1 ? 1 :
4911 adapter
->num_tx_queues
);
4913 goto err_set_queues
;
4916 err
= netif_set_real_num_rx_queues(netdev
,
4917 adapter
->num_rx_pools
> 1 ? 1 :
4918 adapter
->num_rx_queues
);
4920 goto err_set_queues
;
4922 ixgbe_up_complete(adapter
);
4927 ixgbe_free_irq(adapter
);
4929 ixgbe_free_all_rx_resources(adapter
);
4931 ixgbe_free_all_tx_resources(adapter
);
4933 ixgbe_reset(adapter
);
4939 * ixgbe_close - Disables a network interface
4940 * @netdev: network interface device structure
4942 * Returns 0, this is not allowed to fail
4944 * The close entry point is called when an interface is de-activated
4945 * by the OS. The hardware is still under the drivers control, but
4946 * needs to be disabled. A global MAC reset is issued to stop the
4947 * hardware, and all transmit and receive resources are freed.
4949 static int ixgbe_close(struct net_device
*netdev
)
4951 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4953 ixgbe_down(adapter
);
4954 ixgbe_free_irq(adapter
);
4956 ixgbe_fdir_filter_exit(adapter
);
4958 ixgbe_free_all_tx_resources(adapter
);
4959 ixgbe_free_all_rx_resources(adapter
);
4961 ixgbe_release_hw_control(adapter
);
4967 static int ixgbe_resume(struct pci_dev
*pdev
)
4969 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
4970 struct net_device
*netdev
= adapter
->netdev
;
4973 pci_set_power_state(pdev
, PCI_D0
);
4974 pci_restore_state(pdev
);
4976 * pci_restore_state clears dev->state_saved so call
4977 * pci_save_state to restore it.
4979 pci_save_state(pdev
);
4981 err
= pci_enable_device_mem(pdev
);
4983 e_dev_err("Cannot enable PCI device from suspend\n");
4986 pci_set_master(pdev
);
4988 pci_wake_from_d3(pdev
, false);
4990 ixgbe_reset(adapter
);
4992 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
4995 err
= ixgbe_init_interrupt_scheme(adapter
);
4996 if (!err
&& netif_running(netdev
))
4997 err
= ixgbe_open(netdev
);
5004 netif_device_attach(netdev
);
5008 #endif /* CONFIG_PM */
5010 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
5012 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
5013 struct net_device
*netdev
= adapter
->netdev
;
5014 struct ixgbe_hw
*hw
= &adapter
->hw
;
5016 u32 wufc
= adapter
->wol
;
5021 netif_device_detach(netdev
);
5023 if (netif_running(netdev
)) {
5025 ixgbe_down(adapter
);
5026 ixgbe_free_irq(adapter
);
5027 ixgbe_free_all_tx_resources(adapter
);
5028 ixgbe_free_all_rx_resources(adapter
);
5032 ixgbe_clear_interrupt_scheme(adapter
);
5035 retval
= pci_save_state(pdev
);
5041 ixgbe_set_rx_mode(netdev
);
5044 * enable the optics for both mult-speed fiber and
5045 * 82599 SFP+ fiber as we can WoL.
5047 if (hw
->mac
.ops
.enable_tx_laser
&&
5048 (hw
->phy
.multispeed_fiber
||
5049 (hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
&&
5050 hw
->mac
.type
== ixgbe_mac_82599EB
)))
5051 hw
->mac
.ops
.enable_tx_laser(hw
);
5053 /* turn on all-multi mode if wake on multicast is enabled */
5054 if (wufc
& IXGBE_WUFC_MC
) {
5055 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5056 fctrl
|= IXGBE_FCTRL_MPE
;
5057 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
5060 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
5061 ctrl
|= IXGBE_CTRL_GIO_DIS
;
5062 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
5064 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
5066 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
5067 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
5070 switch (hw
->mac
.type
) {
5071 case ixgbe_mac_82598EB
:
5072 pci_wake_from_d3(pdev
, false);
5074 case ixgbe_mac_82599EB
:
5075 case ixgbe_mac_X540
:
5076 pci_wake_from_d3(pdev
, !!wufc
);
5082 *enable_wake
= !!wufc
;
5084 ixgbe_release_hw_control(adapter
);
5086 pci_disable_device(pdev
);
5092 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
5097 retval
= __ixgbe_shutdown(pdev
, &wake
);
5102 pci_prepare_to_sleep(pdev
);
5104 pci_wake_from_d3(pdev
, false);
5105 pci_set_power_state(pdev
, PCI_D3hot
);
5110 #endif /* CONFIG_PM */
5112 static void ixgbe_shutdown(struct pci_dev
*pdev
)
5116 __ixgbe_shutdown(pdev
, &wake
);
5118 if (system_state
== SYSTEM_POWER_OFF
) {
5119 pci_wake_from_d3(pdev
, wake
);
5120 pci_set_power_state(pdev
, PCI_D3hot
);
5125 * ixgbe_update_stats - Update the board statistics counters.
5126 * @adapter: board private structure
5128 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
5130 struct net_device
*netdev
= adapter
->netdev
;
5131 struct ixgbe_hw
*hw
= &adapter
->hw
;
5132 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
5134 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
5135 u64 non_eop_descs
= 0, restart_queue
= 0, tx_busy
= 0;
5136 u64 alloc_rx_page_failed
= 0, alloc_rx_buff_failed
= 0;
5137 u64 bytes
= 0, packets
= 0, hw_csum_rx_error
= 0;
5139 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5140 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5143 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
5146 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5147 rsc_count
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_count
;
5148 rsc_flush
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_flush
;
5150 adapter
->rsc_total_count
= rsc_count
;
5151 adapter
->rsc_total_flush
= rsc_flush
;
5154 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5155 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[i
];
5156 non_eop_descs
+= rx_ring
->rx_stats
.non_eop_descs
;
5157 alloc_rx_page_failed
+= rx_ring
->rx_stats
.alloc_rx_page_failed
;
5158 alloc_rx_buff_failed
+= rx_ring
->rx_stats
.alloc_rx_buff_failed
;
5159 hw_csum_rx_error
+= rx_ring
->rx_stats
.csum_err
;
5160 bytes
+= rx_ring
->stats
.bytes
;
5161 packets
+= rx_ring
->stats
.packets
;
5163 adapter
->non_eop_descs
= non_eop_descs
;
5164 adapter
->alloc_rx_page_failed
= alloc_rx_page_failed
;
5165 adapter
->alloc_rx_buff_failed
= alloc_rx_buff_failed
;
5166 adapter
->hw_csum_rx_error
= hw_csum_rx_error
;
5167 netdev
->stats
.rx_bytes
= bytes
;
5168 netdev
->stats
.rx_packets
= packets
;
5172 /* gather some stats to the adapter struct that are per queue */
5173 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5174 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
5175 restart_queue
+= tx_ring
->tx_stats
.restart_queue
;
5176 tx_busy
+= tx_ring
->tx_stats
.tx_busy
;
5177 bytes
+= tx_ring
->stats
.bytes
;
5178 packets
+= tx_ring
->stats
.packets
;
5180 adapter
->restart_queue
= restart_queue
;
5181 adapter
->tx_busy
= tx_busy
;
5182 netdev
->stats
.tx_bytes
= bytes
;
5183 netdev
->stats
.tx_packets
= packets
;
5185 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
5187 /* 8 register reads */
5188 for (i
= 0; i
< 8; i
++) {
5189 /* for packet buffers not used, the register should read 0 */
5190 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
5192 hwstats
->mpc
[i
] += mpc
;
5193 total_mpc
+= hwstats
->mpc
[i
];
5194 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
5195 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
5196 switch (hw
->mac
.type
) {
5197 case ixgbe_mac_82598EB
:
5198 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
5199 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
5200 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
5201 hwstats
->pxonrxc
[i
] +=
5202 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
5204 case ixgbe_mac_82599EB
:
5205 case ixgbe_mac_X540
:
5206 hwstats
->pxonrxc
[i
] +=
5207 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
5214 /*16 register reads */
5215 for (i
= 0; i
< 16; i
++) {
5216 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
5217 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
5218 if ((hw
->mac
.type
== ixgbe_mac_82599EB
) ||
5219 (hw
->mac
.type
== ixgbe_mac_X540
)) {
5220 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC_L(i
));
5221 IXGBE_READ_REG(hw
, IXGBE_QBTC_H(i
)); /* to clear */
5222 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC_L(i
));
5223 IXGBE_READ_REG(hw
, IXGBE_QBRC_H(i
)); /* to clear */
5227 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
5228 /* work around hardware counting issue */
5229 hwstats
->gprc
-= missed_rx
;
5231 ixgbe_update_xoff_received(adapter
);
5233 /* 82598 hardware only has a 32 bit counter in the high register */
5234 switch (hw
->mac
.type
) {
5235 case ixgbe_mac_82598EB
:
5236 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
5237 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
5238 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
5239 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
5241 case ixgbe_mac_X540
:
5242 /* OS2BMC stats are X540 only*/
5243 hwstats
->o2bgptc
+= IXGBE_READ_REG(hw
, IXGBE_O2BGPTC
);
5244 hwstats
->o2bspc
+= IXGBE_READ_REG(hw
, IXGBE_O2BSPC
);
5245 hwstats
->b2ospc
+= IXGBE_READ_REG(hw
, IXGBE_B2OSPC
);
5246 hwstats
->b2ogprc
+= IXGBE_READ_REG(hw
, IXGBE_B2OGPRC
);
5247 case ixgbe_mac_82599EB
:
5248 for (i
= 0; i
< 16; i
++)
5249 adapter
->hw_rx_no_dma_resources
+=
5250 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
5251 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
5252 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
5253 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
5254 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
5255 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
5256 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
5257 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
5258 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
5259 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
5261 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
5262 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
5263 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
5264 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
5265 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
5266 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
5267 /* Add up per cpu counters for total ddp aloc fail */
5268 if (adapter
->fcoe
.ddp_pool
) {
5269 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
5270 struct ixgbe_fcoe_ddp_pool
*ddp_pool
;
5272 u64 noddp
= 0, noddp_ext_buff
= 0;
5273 for_each_possible_cpu(cpu
) {
5274 ddp_pool
= per_cpu_ptr(fcoe
->ddp_pool
, cpu
);
5275 noddp
+= ddp_pool
->noddp
;
5276 noddp_ext_buff
+= ddp_pool
->noddp_ext_buff
;
5278 hwstats
->fcoe_noddp
= noddp
;
5279 hwstats
->fcoe_noddp_ext_buff
= noddp_ext_buff
;
5281 #endif /* IXGBE_FCOE */
5286 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
5287 hwstats
->bprc
+= bprc
;
5288 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
5289 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5290 hwstats
->mprc
-= bprc
;
5291 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
5292 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
5293 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
5294 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
5295 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
5296 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
5297 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
5298 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
5299 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
5300 hwstats
->lxontxc
+= lxon
;
5301 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
5302 hwstats
->lxofftxc
+= lxoff
;
5303 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
5304 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
5306 * 82598 errata - tx of flow control packets is included in tx counters
5308 xon_off_tot
= lxon
+ lxoff
;
5309 hwstats
->gptc
-= xon_off_tot
;
5310 hwstats
->mptc
-= xon_off_tot
;
5311 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
5312 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
5313 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
5314 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
5315 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
5316 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
5317 hwstats
->ptc64
-= xon_off_tot
;
5318 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
5319 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
5320 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
5321 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
5322 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
5323 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
5325 /* Fill out the OS statistics structure */
5326 netdev
->stats
.multicast
= hwstats
->mprc
;
5329 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
5330 netdev
->stats
.rx_dropped
= 0;
5331 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
5332 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
5333 netdev
->stats
.rx_missed_errors
= total_mpc
;
5337 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5338 * @adapter: pointer to the device adapter structure
5340 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter
*adapter
)
5342 struct ixgbe_hw
*hw
= &adapter
->hw
;
5345 if (!(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
5348 adapter
->flags2
&= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
5350 /* if interface is down do nothing */
5351 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
5354 /* do nothing if we are not using signature filters */
5355 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
))
5358 adapter
->fdir_overflow
++;
5360 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
5361 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5362 set_bit(__IXGBE_TX_FDIR_INIT_DONE
,
5363 &(adapter
->tx_ring
[i
]->state
));
5364 /* re-enable flow director interrupts */
5365 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_FLOW_DIR
);
5367 e_err(probe
, "failed to finish FDIR re-initialization, "
5368 "ignored adding FDIR ATR filters\n");
5373 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5374 * @adapter: pointer to the device adapter structure
5376 * This function serves two purposes. First it strobes the interrupt lines
5377 * in order to make certain interrupts are occurring. Secondly it sets the
5378 * bits needed to check for TX hangs. As a result we should immediately
5379 * determine if a hang has occurred.
5381 static void ixgbe_check_hang_subtask(struct ixgbe_adapter
*adapter
)
5383 struct ixgbe_hw
*hw
= &adapter
->hw
;
5387 /* If we're down or resetting, just bail */
5388 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5389 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5392 /* Force detection of hung controller */
5393 if (netif_carrier_ok(adapter
->netdev
)) {
5394 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5395 set_check_for_tx_hang(adapter
->tx_ring
[i
]);
5398 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
5400 * for legacy and MSI interrupts don't set any bits
5401 * that are enabled for EIAM, because this operation
5402 * would set *both* EIMS and EICS for any bit in EIAM
5404 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
5405 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
5407 /* get one bit for every active tx/rx interrupt vector */
5408 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
5409 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
5410 if (qv
->rx
.ring
|| qv
->tx
.ring
)
5411 eics
|= ((u64
)1 << i
);
5415 /* Cause software interrupt to ensure rings are cleaned */
5416 ixgbe_irq_rearm_queues(adapter
, eics
);
5421 * ixgbe_watchdog_update_link - update the link status
5422 * @adapter: pointer to the device adapter structure
5423 * @link_speed: pointer to a u32 to store the link_speed
5425 static void ixgbe_watchdog_update_link(struct ixgbe_adapter
*adapter
)
5427 struct ixgbe_hw
*hw
= &adapter
->hw
;
5428 u32 link_speed
= adapter
->link_speed
;
5429 bool link_up
= adapter
->link_up
;
5430 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
5432 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
5435 if (hw
->mac
.ops
.check_link
) {
5436 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
5438 /* always assume link is up, if no check link function */
5439 link_speed
= IXGBE_LINK_SPEED_10GB_FULL
;
5443 if (adapter
->ixgbe_ieee_pfc
)
5444 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
5446 if (link_up
&& !((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) && pfc_en
)) {
5447 hw
->mac
.ops
.fc_enable(hw
);
5448 ixgbe_set_rx_drop_en(adapter
);
5452 time_after(jiffies
, (adapter
->link_check_timeout
+
5453 IXGBE_TRY_LINK_TIMEOUT
))) {
5454 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
5455 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
5456 IXGBE_WRITE_FLUSH(hw
);
5459 adapter
->link_up
= link_up
;
5460 adapter
->link_speed
= link_speed
;
5464 * ixgbe_watchdog_link_is_up - update netif_carrier status and
5465 * print link up message
5466 * @adapter: pointer to the device adapter structure
5468 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter
*adapter
)
5470 struct net_device
*netdev
= adapter
->netdev
;
5471 struct ixgbe_hw
*hw
= &adapter
->hw
;
5472 u32 link_speed
= adapter
->link_speed
;
5473 bool flow_rx
, flow_tx
;
5475 /* only continue if link was previously down */
5476 if (netif_carrier_ok(netdev
))
5479 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
5481 switch (hw
->mac
.type
) {
5482 case ixgbe_mac_82598EB
: {
5483 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5484 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
5485 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
5486 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
5489 case ixgbe_mac_X540
:
5490 case ixgbe_mac_82599EB
: {
5491 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
5492 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
5493 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
5494 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
5503 #ifdef CONFIG_IXGBE_PTP
5504 ixgbe_ptp_start_cyclecounter(adapter
);
5507 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n",
5508 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
5510 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
5512 (link_speed
== IXGBE_LINK_SPEED_100_FULL
?
5515 ((flow_rx
&& flow_tx
) ? "RX/TX" :
5517 (flow_tx
? "TX" : "None"))));
5519 netif_carrier_on(netdev
);
5520 ixgbe_check_vf_rate_limit(adapter
);
5522 /* ping all the active vfs to let them know link has changed */
5523 ixgbe_ping_all_vfs(adapter
);
5527 * ixgbe_watchdog_link_is_down - update netif_carrier status and
5528 * print link down message
5529 * @adapter: pointer to the adapter structure
5531 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter
*adapter
)
5533 struct net_device
*netdev
= adapter
->netdev
;
5534 struct ixgbe_hw
*hw
= &adapter
->hw
;
5536 adapter
->link_up
= false;
5537 adapter
->link_speed
= 0;
5539 /* only continue if link was up previously */
5540 if (!netif_carrier_ok(netdev
))
5543 /* poll for SFP+ cable when link is down */
5544 if (ixgbe_is_sfp(hw
) && hw
->mac
.type
== ixgbe_mac_82598EB
)
5545 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
5547 #ifdef CONFIG_IXGBE_PTP
5548 ixgbe_ptp_start_cyclecounter(adapter
);
5551 e_info(drv
, "NIC Link is Down\n");
5552 netif_carrier_off(netdev
);
5554 /* ping all the active vfs to let them know link has changed */
5555 ixgbe_ping_all_vfs(adapter
);
5559 * ixgbe_watchdog_flush_tx - flush queues on link down
5560 * @adapter: pointer to the device adapter structure
5562 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter
*adapter
)
5565 int some_tx_pending
= 0;
5567 if (!netif_carrier_ok(adapter
->netdev
)) {
5568 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5569 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
5570 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
) {
5571 some_tx_pending
= 1;
5576 if (some_tx_pending
) {
5577 /* We've lost link, so the controller stops DMA,
5578 * but we've got queued Tx work that's never going
5579 * to get done, so reset controller to flush Tx.
5580 * (Do the reset outside of interrupt context).
5582 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
5587 static void ixgbe_spoof_check(struct ixgbe_adapter
*adapter
)
5591 /* Do not perform spoof check for 82598 or if not in IOV mode */
5592 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
5593 adapter
->num_vfs
== 0)
5596 ssvpc
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SSVPC
);
5599 * ssvpc register is cleared on read, if zero then no
5600 * spoofed packets in the last interval.
5605 e_warn(drv
, "%u Spoofed packets detected\n", ssvpc
);
5609 * ixgbe_watchdog_subtask - check and bring link up
5610 * @adapter: pointer to the device adapter structure
5612 static void ixgbe_watchdog_subtask(struct ixgbe_adapter
*adapter
)
5614 /* if interface is down do nothing */
5615 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5616 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5619 ixgbe_watchdog_update_link(adapter
);
5621 if (adapter
->link_up
)
5622 ixgbe_watchdog_link_is_up(adapter
);
5624 ixgbe_watchdog_link_is_down(adapter
);
5626 ixgbe_spoof_check(adapter
);
5627 ixgbe_update_stats(adapter
);
5629 ixgbe_watchdog_flush_tx(adapter
);
5633 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
5634 * @adapter: the ixgbe adapter structure
5636 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter
*adapter
)
5638 struct ixgbe_hw
*hw
= &adapter
->hw
;
5641 /* not searching for SFP so there is nothing to do here */
5642 if (!(adapter
->flags2
& IXGBE_FLAG2_SEARCH_FOR_SFP
) &&
5643 !(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
5646 /* someone else is in init, wait until next service event */
5647 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
5650 err
= hw
->phy
.ops
.identify_sfp(hw
);
5651 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
5654 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
5655 /* If no cable is present, then we need to reset
5656 * the next time we find a good cable. */
5657 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
5664 /* exit if reset not needed */
5665 if (!(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
5668 adapter
->flags2
&= ~IXGBE_FLAG2_SFP_NEEDS_RESET
;
5671 * A module may be identified correctly, but the EEPROM may not have
5672 * support for that module. setup_sfp() will fail in that case, so
5673 * we should not allow that module to load.
5675 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5676 err
= hw
->phy
.ops
.reset(hw
);
5678 err
= hw
->mac
.ops
.setup_sfp(hw
);
5680 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
5683 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
5684 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
5687 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
5689 if ((err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) &&
5690 (adapter
->netdev
->reg_state
== NETREG_REGISTERED
)) {
5691 e_dev_err("failed to initialize because an unsupported "
5692 "SFP+ module type was detected.\n");
5693 e_dev_err("Reload the driver after installing a "
5694 "supported module.\n");
5695 unregister_netdev(adapter
->netdev
);
5700 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
5701 * @adapter: the ixgbe adapter structure
5703 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter
*adapter
)
5705 struct ixgbe_hw
*hw
= &adapter
->hw
;
5709 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_CONFIG
))
5712 /* someone else is in init, wait until next service event */
5713 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
5716 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
5718 autoneg
= hw
->phy
.autoneg_advertised
;
5719 if ((!autoneg
) && (hw
->mac
.ops
.get_link_capabilities
))
5720 hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
, &negotiation
);
5721 if (hw
->mac
.ops
.setup_link
)
5722 hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, true);
5724 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
5725 adapter
->link_check_timeout
= jiffies
;
5726 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
5729 #ifdef CONFIG_PCI_IOV
5730 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter
*adapter
)
5733 struct ixgbe_hw
*hw
= &adapter
->hw
;
5734 struct net_device
*netdev
= adapter
->netdev
;
5738 gpc
= IXGBE_READ_REG(hw
, IXGBE_TXDGPC
);
5739 if (gpc
) /* If incrementing then no need for the check below */
5742 * Check to see if a bad DMA write target from an errant or
5743 * malicious VF has caused a PCIe error. If so then we can
5744 * issue a VFLR to the offending VF(s) and then resume without
5745 * requesting a full slot reset.
5748 for (vf
= 0; vf
< adapter
->num_vfs
; vf
++) {
5749 ciaa
= (vf
<< 16) | 0x80000000;
5750 /* 32 bit read so align, we really want status at offset 6 */
5751 ciaa
|= PCI_COMMAND
;
5752 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5753 ciad
= IXGBE_READ_REG(hw
, IXGBE_CIAD_82599
);
5755 /* disable debug mode asap after reading data */
5756 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5757 /* Get the upper 16 bits which will be the PCI status reg */
5759 if (ciad
& PCI_STATUS_REC_MASTER_ABORT
) {
5760 netdev_err(netdev
, "VF %d Hung DMA\n", vf
);
5762 ciaa
= (vf
<< 16) | 0x80000000;
5764 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5765 ciad
= 0x00008000; /* VFLR */
5766 IXGBE_WRITE_REG(hw
, IXGBE_CIAD_82599
, ciad
);
5768 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5775 * ixgbe_service_timer - Timer Call-back
5776 * @data: pointer to adapter cast into an unsigned long
5778 static void ixgbe_service_timer(unsigned long data
)
5780 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
5781 unsigned long next_event_offset
;
5784 /* poll faster when waiting for link */
5785 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
5786 next_event_offset
= HZ
/ 10;
5788 next_event_offset
= HZ
* 2;
5790 #ifdef CONFIG_PCI_IOV
5792 * don't bother with SR-IOV VF DMA hang check if there are
5793 * no VFs or the link is down
5795 if (!adapter
->num_vfs
||
5796 (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
5797 goto normal_timer_service
;
5799 /* If we have VFs allocated then we must check for DMA hangs */
5800 ixgbe_check_for_bad_vf(adapter
);
5801 next_event_offset
= HZ
/ 50;
5802 adapter
->timer_event_accumulator
++;
5804 if (adapter
->timer_event_accumulator
>= 100)
5805 adapter
->timer_event_accumulator
= 0;
5809 normal_timer_service
:
5811 /* Reset the timer */
5812 mod_timer(&adapter
->service_timer
, next_event_offset
+ jiffies
);
5815 ixgbe_service_event_schedule(adapter
);
5818 static void ixgbe_reset_subtask(struct ixgbe_adapter
*adapter
)
5820 if (!(adapter
->flags2
& IXGBE_FLAG2_RESET_REQUESTED
))
5823 adapter
->flags2
&= ~IXGBE_FLAG2_RESET_REQUESTED
;
5825 /* If we're already down or resetting, just bail */
5826 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5827 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5830 ixgbe_dump(adapter
);
5831 netdev_err(adapter
->netdev
, "Reset adapter\n");
5832 adapter
->tx_timeout_count
++;
5834 ixgbe_reinit_locked(adapter
);
5838 * ixgbe_service_task - manages and runs subtasks
5839 * @work: pointer to work_struct containing our data
5841 static void ixgbe_service_task(struct work_struct
*work
)
5843 struct ixgbe_adapter
*adapter
= container_of(work
,
5844 struct ixgbe_adapter
,
5847 ixgbe_reset_subtask(adapter
);
5848 ixgbe_sfp_detection_subtask(adapter
);
5849 ixgbe_sfp_link_config_subtask(adapter
);
5850 ixgbe_check_overtemp_subtask(adapter
);
5851 ixgbe_watchdog_subtask(adapter
);
5852 ixgbe_fdir_reinit_subtask(adapter
);
5853 ixgbe_check_hang_subtask(adapter
);
5854 #ifdef CONFIG_IXGBE_PTP
5855 ixgbe_ptp_overflow_check(adapter
);
5858 ixgbe_service_event_complete(adapter
);
5861 static int ixgbe_tso(struct ixgbe_ring
*tx_ring
,
5862 struct ixgbe_tx_buffer
*first
,
5865 struct sk_buff
*skb
= first
->skb
;
5866 u32 vlan_macip_lens
, type_tucmd
;
5867 u32 mss_l4len_idx
, l4len
;
5869 if (!skb_is_gso(skb
))
5872 if (skb_header_cloned(skb
)) {
5873 int err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
5878 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5879 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5881 if (first
->protocol
== __constant_htons(ETH_P_IP
)) {
5882 struct iphdr
*iph
= ip_hdr(skb
);
5885 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
5889 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5890 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
5891 IXGBE_TX_FLAGS_CSUM
|
5892 IXGBE_TX_FLAGS_IPV4
;
5893 } else if (skb_is_gso_v6(skb
)) {
5894 ipv6_hdr(skb
)->payload_len
= 0;
5895 tcp_hdr(skb
)->check
=
5896 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
5897 &ipv6_hdr(skb
)->daddr
,
5899 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
5900 IXGBE_TX_FLAGS_CSUM
;
5903 /* compute header lengths */
5904 l4len
= tcp_hdrlen(skb
);
5905 *hdr_len
= skb_transport_offset(skb
) + l4len
;
5907 /* update gso size and bytecount with header size */
5908 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
5909 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
5911 /* mss_l4len_id: use 1 as index for TSO */
5912 mss_l4len_idx
= l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
;
5913 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
;
5914 mss_l4len_idx
|= 1 << IXGBE_ADVTXD_IDX_SHIFT
;
5916 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
5917 vlan_macip_lens
= skb_network_header_len(skb
);
5918 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
5919 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
5921 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0, type_tucmd
,
5927 static void ixgbe_tx_csum(struct ixgbe_ring
*tx_ring
,
5928 struct ixgbe_tx_buffer
*first
)
5930 struct sk_buff
*skb
= first
->skb
;
5931 u32 vlan_macip_lens
= 0;
5932 u32 mss_l4len_idx
= 0;
5935 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
5936 if (!(first
->tx_flags
& IXGBE_TX_FLAGS_HW_VLAN
)) {
5937 if (unlikely(skb
->no_fcs
))
5938 first
->tx_flags
|= IXGBE_TX_FLAGS_NO_IFCS
;
5939 if (!(first
->tx_flags
& IXGBE_TX_FLAGS_TXSW
))
5944 switch (first
->protocol
) {
5945 case __constant_htons(ETH_P_IP
):
5946 vlan_macip_lens
|= skb_network_header_len(skb
);
5947 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5948 l4_hdr
= ip_hdr(skb
)->protocol
;
5950 case __constant_htons(ETH_P_IPV6
):
5951 vlan_macip_lens
|= skb_network_header_len(skb
);
5952 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
5955 if (unlikely(net_ratelimit())) {
5956 dev_warn(tx_ring
->dev
,
5957 "partial checksum but proto=%x!\n",
5965 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5966 mss_l4len_idx
= tcp_hdrlen(skb
) <<
5967 IXGBE_ADVTXD_L4LEN_SHIFT
;
5970 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
5971 mss_l4len_idx
= sizeof(struct sctphdr
) <<
5972 IXGBE_ADVTXD_L4LEN_SHIFT
;
5975 mss_l4len_idx
= sizeof(struct udphdr
) <<
5976 IXGBE_ADVTXD_L4LEN_SHIFT
;
5979 if (unlikely(net_ratelimit())) {
5980 dev_warn(tx_ring
->dev
,
5981 "partial checksum but l4 proto=%x!\n",
5987 /* update TX checksum flag */
5988 first
->tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
5991 /* vlan_macip_lens: MACLEN, VLAN tag */
5992 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
5993 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
5995 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0,
5996 type_tucmd
, mss_l4len_idx
);
5999 static __le32
ixgbe_tx_cmd_type(u32 tx_flags
)
6001 /* set type for advanced descriptor with frame checksum insertion */
6002 __le32 cmd_type
= cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA
|
6003 IXGBE_ADVTXD_DCMD_DEXT
);
6005 /* set HW vlan bit if vlan is present */
6006 if (tx_flags
& IXGBE_TX_FLAGS_HW_VLAN
)
6007 cmd_type
|= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE
);
6009 #ifdef CONFIG_IXGBE_PTP
6010 if (tx_flags
& IXGBE_TX_FLAGS_TSTAMP
)
6011 cmd_type
|= cpu_to_le32(IXGBE_ADVTXD_MAC_TSTAMP
);
6014 /* set segmentation enable bits for TSO/FSO */
6016 if (tx_flags
& (IXGBE_TX_FLAGS_TSO
| IXGBE_TX_FLAGS_FSO
))
6018 if (tx_flags
& IXGBE_TX_FLAGS_TSO
)
6020 cmd_type
|= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE
);
6022 /* insert frame checksum */
6023 if (!(tx_flags
& IXGBE_TX_FLAGS_NO_IFCS
))
6024 cmd_type
|= cpu_to_le32(IXGBE_ADVTXD_DCMD_IFCS
);
6029 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc
*tx_desc
,
6030 u32 tx_flags
, unsigned int paylen
)
6032 __le32 olinfo_status
= cpu_to_le32(paylen
<< IXGBE_ADVTXD_PAYLEN_SHIFT
);
6034 /* enable L4 checksum for TSO and TX checksum offload */
6035 if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
6036 olinfo_status
|= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM
);
6038 /* enble IPv4 checksum for TSO */
6039 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
6040 olinfo_status
|= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM
);
6042 /* use index 1 context for TSO/FSO/FCOE */
6044 if (tx_flags
& (IXGBE_TX_FLAGS_TSO
| IXGBE_TX_FLAGS_FCOE
))
6046 if (tx_flags
& IXGBE_TX_FLAGS_TSO
)
6048 olinfo_status
|= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT
);
6051 * Check Context must be set if Tx switch is enabled, which it
6052 * always is for case where virtual functions are running
6055 if (tx_flags
& (IXGBE_TX_FLAGS_TXSW
| IXGBE_TX_FLAGS_FCOE
))
6057 if (tx_flags
& IXGBE_TX_FLAGS_TXSW
)
6059 olinfo_status
|= cpu_to_le32(IXGBE_ADVTXD_CC
);
6061 tx_desc
->read
.olinfo_status
= olinfo_status
;
6064 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6067 static void ixgbe_tx_map(struct ixgbe_ring
*tx_ring
,
6068 struct ixgbe_tx_buffer
*first
,
6072 struct sk_buff
*skb
= first
->skb
;
6073 struct ixgbe_tx_buffer
*tx_buffer
;
6074 union ixgbe_adv_tx_desc
*tx_desc
;
6075 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
6076 unsigned int data_len
= skb
->data_len
;
6077 unsigned int size
= skb_headlen(skb
);
6078 unsigned int paylen
= skb
->len
- hdr_len
;
6079 u32 tx_flags
= first
->tx_flags
;
6081 u16 i
= tx_ring
->next_to_use
;
6083 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
6085 ixgbe_tx_olinfo_status(tx_desc
, tx_flags
, paylen
);
6086 cmd_type
= ixgbe_tx_cmd_type(tx_flags
);
6089 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
6090 if (data_len
< sizeof(struct fcoe_crc_eof
)) {
6091 size
-= sizeof(struct fcoe_crc_eof
) - data_len
;
6094 data_len
-= sizeof(struct fcoe_crc_eof
);
6099 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
6100 if (dma_mapping_error(tx_ring
->dev
, dma
))
6103 /* record length, and DMA address */
6104 dma_unmap_len_set(first
, len
, size
);
6105 dma_unmap_addr_set(first
, dma
, dma
);
6107 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6110 while (unlikely(size
> IXGBE_MAX_DATA_PER_TXD
)) {
6111 tx_desc
->read
.cmd_type_len
=
6112 cmd_type
| cpu_to_le32(IXGBE_MAX_DATA_PER_TXD
);
6116 if (i
== tx_ring
->count
) {
6117 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
6121 dma
+= IXGBE_MAX_DATA_PER_TXD
;
6122 size
-= IXGBE_MAX_DATA_PER_TXD
;
6124 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6125 tx_desc
->read
.olinfo_status
= 0;
6128 if (likely(!data_len
))
6131 tx_desc
->read
.cmd_type_len
= cmd_type
| cpu_to_le32(size
);
6135 if (i
== tx_ring
->count
) {
6136 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
6141 size
= min_t(unsigned int, data_len
, skb_frag_size(frag
));
6143 size
= skb_frag_size(frag
);
6147 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0, size
,
6149 if (dma_mapping_error(tx_ring
->dev
, dma
))
6152 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6153 dma_unmap_len_set(tx_buffer
, len
, size
);
6154 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
6156 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6157 tx_desc
->read
.olinfo_status
= 0;
6162 /* write last descriptor with RS and EOP bits */
6163 cmd_type
|= cpu_to_le32(size
) | cpu_to_le32(IXGBE_TXD_CMD
);
6164 tx_desc
->read
.cmd_type_len
= cmd_type
;
6166 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
6168 /* set the timestamp */
6169 first
->time_stamp
= jiffies
;
6172 * Force memory writes to complete before letting h/w know there
6173 * are new descriptors to fetch. (Only applicable for weak-ordered
6174 * memory model archs, such as IA-64).
6176 * We also need this memory barrier to make certain all of the
6177 * status bits have been updated before next_to_watch is written.
6181 /* set next_to_watch value indicating a packet is present */
6182 first
->next_to_watch
= tx_desc
;
6185 if (i
== tx_ring
->count
)
6188 tx_ring
->next_to_use
= i
;
6190 /* notify HW of packet */
6191 writel(i
, tx_ring
->tail
);
6195 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
6197 /* clear dma mappings for failed tx_buffer_info map */
6199 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6200 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
6201 if (tx_buffer
== first
)
6208 tx_ring
->next_to_use
= i
;
6211 static void ixgbe_atr(struct ixgbe_ring
*ring
,
6212 struct ixgbe_tx_buffer
*first
)
6214 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
6215 union ixgbe_atr_hash_dword input
= { .dword
= 0 };
6216 union ixgbe_atr_hash_dword common
= { .dword
= 0 };
6218 unsigned char *network
;
6220 struct ipv6hdr
*ipv6
;
6225 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6229 /* do nothing if sampling is disabled */
6230 if (!ring
->atr_sample_rate
)
6235 /* snag network header to get L4 type and address */
6236 hdr
.network
= skb_network_header(first
->skb
);
6238 /* Currently only IPv4/IPv6 with TCP is supported */
6239 if ((first
->protocol
!= __constant_htons(ETH_P_IPV6
) ||
6240 hdr
.ipv6
->nexthdr
!= IPPROTO_TCP
) &&
6241 (first
->protocol
!= __constant_htons(ETH_P_IP
) ||
6242 hdr
.ipv4
->protocol
!= IPPROTO_TCP
))
6245 th
= tcp_hdr(first
->skb
);
6247 /* skip this packet since it is invalid or the socket is closing */
6251 /* sample on all syn packets or once every atr sample count */
6252 if (!th
->syn
&& (ring
->atr_count
< ring
->atr_sample_rate
))
6255 /* reset sample count */
6256 ring
->atr_count
= 0;
6258 vlan_id
= htons(first
->tx_flags
>> IXGBE_TX_FLAGS_VLAN_SHIFT
);
6261 * src and dst are inverted, think how the receiver sees them
6263 * The input is broken into two sections, a non-compressed section
6264 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6265 * is XORed together and stored in the compressed dword.
6267 input
.formatted
.vlan_id
= vlan_id
;
6270 * since src port and flex bytes occupy the same word XOR them together
6271 * and write the value to source port portion of compressed dword
6273 if (first
->tx_flags
& (IXGBE_TX_FLAGS_SW_VLAN
| IXGBE_TX_FLAGS_HW_VLAN
))
6274 common
.port
.src
^= th
->dest
^ __constant_htons(ETH_P_8021Q
);
6276 common
.port
.src
^= th
->dest
^ first
->protocol
;
6277 common
.port
.dst
^= th
->source
;
6279 if (first
->protocol
== __constant_htons(ETH_P_IP
)) {
6280 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
6281 common
.ip
^= hdr
.ipv4
->saddr
^ hdr
.ipv4
->daddr
;
6283 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV6
;
6284 common
.ip
^= hdr
.ipv6
->saddr
.s6_addr32
[0] ^
6285 hdr
.ipv6
->saddr
.s6_addr32
[1] ^
6286 hdr
.ipv6
->saddr
.s6_addr32
[2] ^
6287 hdr
.ipv6
->saddr
.s6_addr32
[3] ^
6288 hdr
.ipv6
->daddr
.s6_addr32
[0] ^
6289 hdr
.ipv6
->daddr
.s6_addr32
[1] ^
6290 hdr
.ipv6
->daddr
.s6_addr32
[2] ^
6291 hdr
.ipv6
->daddr
.s6_addr32
[3];
6294 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6295 ixgbe_fdir_add_signature_filter_82599(&q_vector
->adapter
->hw
,
6296 input
, common
, ring
->queue_index
);
6299 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6301 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6302 /* Herbert's original patch had:
6303 * smp_mb__after_netif_stop_queue();
6304 * but since that doesn't exist yet, just open code it. */
6307 /* We need to check again in a case another CPU has just
6308 * made room available. */
6309 if (likely(ixgbe_desc_unused(tx_ring
) < size
))
6312 /* A reprieve! - use start_queue because it doesn't call schedule */
6313 netif_start_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6314 ++tx_ring
->tx_stats
.restart_queue
;
6318 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6320 if (likely(ixgbe_desc_unused(tx_ring
) >= size
))
6322 return __ixgbe_maybe_stop_tx(tx_ring
, size
);
6325 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
)
6327 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6328 int txq
= skb_rx_queue_recorded(skb
) ? skb_get_rx_queue(skb
) :
6331 __be16 protocol
= vlan_get_protocol(skb
);
6333 if (((protocol
== htons(ETH_P_FCOE
)) ||
6334 (protocol
== htons(ETH_P_FIP
))) &&
6335 (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)) {
6336 struct ixgbe_ring_feature
*f
;
6338 f
= &adapter
->ring_feature
[RING_F_FCOE
];
6340 while (txq
>= f
->indices
)
6342 txq
+= adapter
->ring_feature
[RING_F_FCOE
].offset
;
6348 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
6349 while (unlikely(txq
>= dev
->real_num_tx_queues
))
6350 txq
-= dev
->real_num_tx_queues
;
6354 return skb_tx_hash(dev
, skb
);
6357 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
,
6358 struct ixgbe_adapter
*adapter
,
6359 struct ixgbe_ring
*tx_ring
)
6361 struct ixgbe_tx_buffer
*first
;
6364 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6367 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
6368 __be16 protocol
= skb
->protocol
;
6372 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6373 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6374 * + 2 desc gap to keep tail from touching head,
6375 * + 1 desc for context descriptor,
6376 * otherwise try next time
6378 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6379 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
6380 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
6382 count
+= skb_shinfo(skb
)->nr_frags
;
6384 if (ixgbe_maybe_stop_tx(tx_ring
, count
+ 3)) {
6385 tx_ring
->tx_stats
.tx_busy
++;
6386 return NETDEV_TX_BUSY
;
6389 /* record the location of the first descriptor for this packet */
6390 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
6392 first
->bytecount
= skb
->len
;
6393 first
->gso_segs
= 1;
6395 /* if we have a HW VLAN tag being added default to the HW one */
6396 if (vlan_tx_tag_present(skb
)) {
6397 tx_flags
|= vlan_tx_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
;
6398 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
6399 /* else if it is a SW VLAN check the next protocol and store the tag */
6400 } else if (protocol
== __constant_htons(ETH_P_8021Q
)) {
6401 struct vlan_hdr
*vhdr
, _vhdr
;
6402 vhdr
= skb_header_pointer(skb
, ETH_HLEN
, sizeof(_vhdr
), &_vhdr
);
6406 protocol
= vhdr
->h_vlan_encapsulated_proto
;
6407 tx_flags
|= ntohs(vhdr
->h_vlan_TCI
) <<
6408 IXGBE_TX_FLAGS_VLAN_SHIFT
;
6409 tx_flags
|= IXGBE_TX_FLAGS_SW_VLAN
;
6412 skb_tx_timestamp(skb
);
6414 #ifdef CONFIG_IXGBE_PTP
6415 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)) {
6416 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
6417 tx_flags
|= IXGBE_TX_FLAGS_TSTAMP
;
6421 #ifdef CONFIG_PCI_IOV
6423 * Use the l2switch_enable flag - would be false if the DMA
6424 * Tx switch had been disabled.
6426 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6427 tx_flags
|= IXGBE_TX_FLAGS_TXSW
;
6430 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
6431 if ((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
6432 ((tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
| IXGBE_TX_FLAGS_SW_VLAN
)) ||
6433 (skb
->priority
!= TC_PRIO_CONTROL
))) {
6434 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
6435 tx_flags
|= (skb
->priority
& 0x7) <<
6436 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT
;
6437 if (tx_flags
& IXGBE_TX_FLAGS_SW_VLAN
) {
6438 struct vlan_ethhdr
*vhdr
;
6439 if (skb_header_cloned(skb
) &&
6440 pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
))
6442 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
6443 vhdr
->h_vlan_TCI
= htons(tx_flags
>>
6444 IXGBE_TX_FLAGS_VLAN_SHIFT
);
6446 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
6450 /* record initial flags and protocol */
6451 first
->tx_flags
= tx_flags
;
6452 first
->protocol
= protocol
;
6455 /* setup tx offload for FCoE */
6456 if ((protocol
== __constant_htons(ETH_P_FCOE
)) &&
6457 (tx_ring
->netdev
->features
& (NETIF_F_FSO
| NETIF_F_FCOE_CRC
))) {
6458 tso
= ixgbe_fso(tx_ring
, first
, &hdr_len
);
6465 #endif /* IXGBE_FCOE */
6466 tso
= ixgbe_tso(tx_ring
, first
, &hdr_len
);
6470 ixgbe_tx_csum(tx_ring
, first
);
6472 /* add the ATR filter if ATR is on */
6473 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE
, &tx_ring
->state
))
6474 ixgbe_atr(tx_ring
, first
);
6478 #endif /* IXGBE_FCOE */
6479 ixgbe_tx_map(tx_ring
, first
, hdr_len
);
6481 ixgbe_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
6483 return NETDEV_TX_OK
;
6486 dev_kfree_skb_any(first
->skb
);
6489 return NETDEV_TX_OK
;
6492 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
6493 struct net_device
*netdev
)
6495 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6496 struct ixgbe_ring
*tx_ring
;
6499 * The minimum packet size for olinfo paylen is 17 so pad the skb
6500 * in order to meet this minimum size requirement.
6502 if (unlikely(skb
->len
< 17)) {
6503 if (skb_pad(skb
, 17 - skb
->len
))
6504 return NETDEV_TX_OK
;
6508 tx_ring
= adapter
->tx_ring
[skb
->queue_mapping
];
6509 return ixgbe_xmit_frame_ring(skb
, adapter
, tx_ring
);
6513 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6514 * @netdev: network interface device structure
6515 * @p: pointer to an address structure
6517 * Returns 0 on success, negative on failure
6519 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
6521 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6522 struct ixgbe_hw
*hw
= &adapter
->hw
;
6523 struct sockaddr
*addr
= p
;
6525 if (!is_valid_ether_addr(addr
->sa_data
))
6526 return -EADDRNOTAVAIL
;
6528 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
6529 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
6531 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, VMDQ_P(0), IXGBE_RAH_AV
);
6537 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
6539 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6540 struct ixgbe_hw
*hw
= &adapter
->hw
;
6544 if (prtad
!= hw
->phy
.mdio
.prtad
)
6546 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
6552 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
6553 u16 addr
, u16 value
)
6555 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6556 struct ixgbe_hw
*hw
= &adapter
->hw
;
6558 if (prtad
!= hw
->phy
.mdio
.prtad
)
6560 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
6563 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
6565 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6568 #ifdef CONFIG_IXGBE_PTP
6570 return ixgbe_ptp_hwtstamp_ioctl(adapter
, req
, cmd
);
6573 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
6578 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6580 * @netdev: network interface device structure
6582 * Returns non-zero on failure
6584 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
6587 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6588 struct ixgbe_hw
*hw
= &adapter
->hw
;
6590 if (is_valid_ether_addr(hw
->mac
.san_addr
)) {
6592 err
= dev_addr_add(dev
, hw
->mac
.san_addr
, NETDEV_HW_ADDR_T_SAN
);
6595 /* update SAN MAC vmdq pool selection */
6596 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
6602 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6604 * @netdev: network interface device structure
6606 * Returns non-zero on failure
6608 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
6611 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6612 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6614 if (is_valid_ether_addr(mac
->san_addr
)) {
6616 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6622 #ifdef CONFIG_NET_POLL_CONTROLLER
6624 * Polling 'interrupt' - used by things like netconsole to send skbs
6625 * without having to re-enable interrupts. It's not called while
6626 * the interrupt routine is executing.
6628 static void ixgbe_netpoll(struct net_device
*netdev
)
6630 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6633 /* if interface is down do nothing */
6634 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
6637 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
6638 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
6639 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
6640 ixgbe_msix_clean_rings(0, adapter
->q_vector
[i
]);
6642 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
6644 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
6648 static struct rtnl_link_stats64
*ixgbe_get_stats64(struct net_device
*netdev
,
6649 struct rtnl_link_stats64
*stats
)
6651 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6655 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6656 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->rx_ring
[i
]);
6662 start
= u64_stats_fetch_begin_bh(&ring
->syncp
);
6663 packets
= ring
->stats
.packets
;
6664 bytes
= ring
->stats
.bytes
;
6665 } while (u64_stats_fetch_retry_bh(&ring
->syncp
, start
));
6666 stats
->rx_packets
+= packets
;
6667 stats
->rx_bytes
+= bytes
;
6671 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6672 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->tx_ring
[i
]);
6678 start
= u64_stats_fetch_begin_bh(&ring
->syncp
);
6679 packets
= ring
->stats
.packets
;
6680 bytes
= ring
->stats
.bytes
;
6681 } while (u64_stats_fetch_retry_bh(&ring
->syncp
, start
));
6682 stats
->tx_packets
+= packets
;
6683 stats
->tx_bytes
+= bytes
;
6687 /* following stats updated by ixgbe_watchdog_task() */
6688 stats
->multicast
= netdev
->stats
.multicast
;
6689 stats
->rx_errors
= netdev
->stats
.rx_errors
;
6690 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
6691 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
6692 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
6696 #ifdef CONFIG_IXGBE_DCB
6698 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
6699 * @adapter: pointer to ixgbe_adapter
6700 * @tc: number of traffic classes currently enabled
6702 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
6703 * 802.1Q priority maps to a packet buffer that exists.
6705 static void ixgbe_validate_rtr(struct ixgbe_adapter
*adapter
, u8 tc
)
6707 struct ixgbe_hw
*hw
= &adapter
->hw
;
6711 /* 82598 have a static priority to TC mapping that can not
6712 * be changed so no validation is needed.
6714 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6717 reg
= IXGBE_READ_REG(hw
, IXGBE_RTRUP2TC
);
6720 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
6721 u8 up2tc
= reg
>> (i
* IXGBE_RTRUP2TC_UP_SHIFT
);
6723 /* If up2tc is out of bounds default to zero */
6725 reg
&= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT
);
6729 IXGBE_WRITE_REG(hw
, IXGBE_RTRUP2TC
, reg
);
6735 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
6736 * @adapter: Pointer to adapter struct
6738 * Populate the netdev user priority to tc map
6740 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter
*adapter
)
6742 struct net_device
*dev
= adapter
->netdev
;
6743 struct ixgbe_dcb_config
*dcb_cfg
= &adapter
->dcb_cfg
;
6744 struct ieee_ets
*ets
= adapter
->ixgbe_ieee_ets
;
6747 for (prio
= 0; prio
< MAX_USER_PRIORITY
; prio
++) {
6750 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
)
6751 tc
= ixgbe_dcb_get_tc_from_up(dcb_cfg
, 0, prio
);
6753 tc
= ets
->prio_tc
[prio
];
6755 netdev_set_prio_tc_map(dev
, prio
, tc
);
6760 * ixgbe_setup_tc - configure net_device for multiple traffic classes
6762 * @netdev: net device to configure
6763 * @tc: number of traffic classes to enable
6765 int ixgbe_setup_tc(struct net_device
*dev
, u8 tc
)
6767 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6768 struct ixgbe_hw
*hw
= &adapter
->hw
;
6770 /* Hardware supports up to 8 traffic classes */
6771 if (tc
> adapter
->dcb_cfg
.num_tcs
.pg_tcs
||
6772 (hw
->mac
.type
== ixgbe_mac_82598EB
&&
6773 tc
< MAX_TRAFFIC_CLASS
))
6776 /* Hardware has to reinitialize queues and interrupts to
6777 * match packet buffer alignment. Unfortunately, the
6778 * hardware is not flexible enough to do this dynamically.
6780 if (netif_running(dev
))
6782 ixgbe_clear_interrupt_scheme(adapter
);
6785 netdev_set_num_tc(dev
, tc
);
6786 ixgbe_set_prio_tc_map(adapter
);
6788 adapter
->flags
|= IXGBE_FLAG_DCB_ENABLED
;
6790 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
6791 adapter
->last_lfc_mode
= adapter
->hw
.fc
.requested_mode
;
6792 adapter
->hw
.fc
.requested_mode
= ixgbe_fc_none
;
6795 netdev_reset_tc(dev
);
6797 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
6798 adapter
->hw
.fc
.requested_mode
= adapter
->last_lfc_mode
;
6800 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
6802 adapter
->temp_dcb_cfg
.pfc_mode_enable
= false;
6803 adapter
->dcb_cfg
.pfc_mode_enable
= false;
6806 ixgbe_init_interrupt_scheme(adapter
);
6807 ixgbe_validate_rtr(adapter
, tc
);
6808 if (netif_running(dev
))
6814 #endif /* CONFIG_IXGBE_DCB */
6815 void ixgbe_do_reset(struct net_device
*netdev
)
6817 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6819 if (netif_running(netdev
))
6820 ixgbe_reinit_locked(adapter
);
6822 ixgbe_reset(adapter
);
6825 static netdev_features_t
ixgbe_fix_features(struct net_device
*netdev
,
6826 netdev_features_t features
)
6828 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6830 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
6831 if (!(features
& NETIF_F_RXCSUM
))
6832 features
&= ~NETIF_F_LRO
;
6834 /* Turn off LRO if not RSC capable */
6835 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
))
6836 features
&= ~NETIF_F_LRO
;
6841 static int ixgbe_set_features(struct net_device
*netdev
,
6842 netdev_features_t features
)
6844 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6845 netdev_features_t changed
= netdev
->features
^ features
;
6846 bool need_reset
= false;
6848 /* Make sure RSC matches LRO, reset if change */
6849 if (!(features
& NETIF_F_LRO
)) {
6850 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
6852 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
6853 } else if ((adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
) &&
6854 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)) {
6855 if (adapter
->rx_itr_setting
== 1 ||
6856 adapter
->rx_itr_setting
> IXGBE_MIN_RSC_ITR
) {
6857 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
6859 } else if ((changed
^ features
) & NETIF_F_LRO
) {
6860 e_info(probe
, "rx-usecs set too low, "
6866 * Check if Flow Director n-tuple support was enabled or disabled. If
6867 * the state changed, we need to reset.
6869 switch (features
& NETIF_F_NTUPLE
) {
6870 case NETIF_F_NTUPLE
:
6871 /* turn off ATR, enable perfect filters and reset */
6872 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
6875 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6876 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
6879 /* turn off perfect filters, enable ATR and reset */
6880 if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
6883 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
6885 /* We cannot enable ATR if SR-IOV is enabled */
6886 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6889 /* We cannot enable ATR if we have 2 or more traffic classes */
6890 if (netdev_get_num_tc(netdev
) > 1)
6893 /* We cannot enable ATR if RSS is disabled */
6894 if (adapter
->ring_feature
[RING_F_RSS
].limit
<= 1)
6897 /* A sample rate of 0 indicates ATR disabled */
6898 if (!adapter
->atr_sample_rate
)
6901 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6905 if (features
& NETIF_F_HW_VLAN_RX
)
6906 ixgbe_vlan_strip_enable(adapter
);
6908 ixgbe_vlan_strip_disable(adapter
);
6910 if (changed
& NETIF_F_RXALL
)
6913 netdev
->features
= features
;
6915 ixgbe_do_reset(netdev
);
6920 static int ixgbe_ndo_fdb_add(struct ndmsg
*ndm
, struct nlattr
*tb
[],
6921 struct net_device
*dev
,
6922 const unsigned char *addr
,
6925 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6928 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
6931 if (ndm
->ndm_state
& NUD_PERMANENT
) {
6932 pr_info("%s: FDB only supports static addresses\n",
6937 if (is_unicast_ether_addr(addr
)) {
6938 u32 rar_uc_entries
= IXGBE_MAX_PF_MACVLANS
;
6940 if (netdev_uc_count(dev
) < rar_uc_entries
)
6941 err
= dev_uc_add_excl(dev
, addr
);
6944 } else if (is_multicast_ether_addr(addr
)) {
6945 err
= dev_mc_add_excl(dev
, addr
);
6950 /* Only return duplicate errors if NLM_F_EXCL is set */
6951 if (err
== -EEXIST
&& !(flags
& NLM_F_EXCL
))
6957 static int ixgbe_ndo_fdb_del(struct ndmsg
*ndm
,
6958 struct net_device
*dev
,
6959 const unsigned char *addr
)
6961 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6962 int err
= -EOPNOTSUPP
;
6964 if (ndm
->ndm_state
& NUD_PERMANENT
) {
6965 pr_info("%s: FDB only supports static addresses\n",
6970 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
6971 if (is_unicast_ether_addr(addr
))
6972 err
= dev_uc_del(dev
, addr
);
6973 else if (is_multicast_ether_addr(addr
))
6974 err
= dev_mc_del(dev
, addr
);
6982 static int ixgbe_ndo_fdb_dump(struct sk_buff
*skb
,
6983 struct netlink_callback
*cb
,
6984 struct net_device
*dev
,
6987 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6989 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6990 idx
= ndo_dflt_fdb_dump(skb
, cb
, dev
, idx
);
6995 static const struct net_device_ops ixgbe_netdev_ops
= {
6996 .ndo_open
= ixgbe_open
,
6997 .ndo_stop
= ixgbe_close
,
6998 .ndo_start_xmit
= ixgbe_xmit_frame
,
6999 .ndo_select_queue
= ixgbe_select_queue
,
7000 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
7001 .ndo_validate_addr
= eth_validate_addr
,
7002 .ndo_set_mac_address
= ixgbe_set_mac
,
7003 .ndo_change_mtu
= ixgbe_change_mtu
,
7004 .ndo_tx_timeout
= ixgbe_tx_timeout
,
7005 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
7006 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
7007 .ndo_do_ioctl
= ixgbe_ioctl
,
7008 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
7009 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
7010 .ndo_set_vf_tx_rate
= ixgbe_ndo_set_vf_bw
,
7011 .ndo_set_vf_spoofchk
= ixgbe_ndo_set_vf_spoofchk
,
7012 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
7013 .ndo_get_stats64
= ixgbe_get_stats64
,
7014 #ifdef CONFIG_IXGBE_DCB
7015 .ndo_setup_tc
= ixgbe_setup_tc
,
7017 #ifdef CONFIG_NET_POLL_CONTROLLER
7018 .ndo_poll_controller
= ixgbe_netpoll
,
7021 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
7022 .ndo_fcoe_ddp_target
= ixgbe_fcoe_ddp_target
,
7023 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
7024 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
7025 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
7026 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
7027 .ndo_fcoe_get_hbainfo
= ixgbe_fcoe_get_hbainfo
,
7028 #endif /* IXGBE_FCOE */
7029 .ndo_set_features
= ixgbe_set_features
,
7030 .ndo_fix_features
= ixgbe_fix_features
,
7031 .ndo_fdb_add
= ixgbe_ndo_fdb_add
,
7032 .ndo_fdb_del
= ixgbe_ndo_fdb_del
,
7033 .ndo_fdb_dump
= ixgbe_ndo_fdb_dump
,
7037 * ixgbe_wol_supported - Check whether device supports WoL
7038 * @hw: hw specific details
7039 * @device_id: the device ID
7040 * @subdev_id: the subsystem device ID
7042 * This function is used by probe and ethtool to determine
7043 * which devices have WoL support
7046 int ixgbe_wol_supported(struct ixgbe_adapter
*adapter
, u16 device_id
,
7049 struct ixgbe_hw
*hw
= &adapter
->hw
;
7050 u16 wol_cap
= adapter
->eeprom_cap
& IXGBE_DEVICE_CAPS_WOL_MASK
;
7051 int is_wol_supported
= 0;
7053 switch (device_id
) {
7054 case IXGBE_DEV_ID_82599_SFP
:
7055 /* Only these subdevices could supports WOL */
7056 switch (subdevice_id
) {
7057 case IXGBE_SUBDEV_ID_82599_560FLR
:
7058 /* only support first port */
7059 if (hw
->bus
.func
!= 0)
7061 case IXGBE_SUBDEV_ID_82599_SFP
:
7062 case IXGBE_SUBDEV_ID_82599_RNDC
:
7063 is_wol_supported
= 1;
7067 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE
:
7068 /* All except this subdevice support WOL */
7069 if (subdevice_id
!= IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ
)
7070 is_wol_supported
= 1;
7072 case IXGBE_DEV_ID_82599_KX4
:
7073 is_wol_supported
= 1;
7075 case IXGBE_DEV_ID_X540T
:
7076 case IXGBE_DEV_ID_X540T1
:
7077 /* check eeprom to see if enabled wol */
7078 if ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0_1
) ||
7079 ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0
) &&
7080 (hw
->bus
.func
== 0))) {
7081 is_wol_supported
= 1;
7086 return is_wol_supported
;
7090 * ixgbe_probe - Device Initialization Routine
7091 * @pdev: PCI device information struct
7092 * @ent: entry in ixgbe_pci_tbl
7094 * Returns 0 on success, negative on failure
7096 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
7097 * The OS initialization, configuring of the adapter private structure,
7098 * and a hardware reset occur.
7100 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
7101 const struct pci_device_id
*ent
)
7103 struct net_device
*netdev
;
7104 struct ixgbe_adapter
*adapter
= NULL
;
7105 struct ixgbe_hw
*hw
;
7106 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
7107 static int cards_found
;
7108 int i
, err
, pci_using_dac
;
7109 u8 part_str
[IXGBE_PBANUM_LENGTH
];
7110 unsigned int indices
= num_possible_cpus();
7111 unsigned int dcb_max
= 0;
7117 /* Catch broken hardware that put the wrong VF device ID in
7118 * the PCIe SR-IOV capability.
7120 if (pdev
->is_virtfn
) {
7121 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
7122 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
7126 err
= pci_enable_device_mem(pdev
);
7130 if (!dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(64)) &&
7131 !dma_set_coherent_mask(&pdev
->dev
, DMA_BIT_MASK(64))) {
7134 err
= dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(32));
7136 err
= dma_set_coherent_mask(&pdev
->dev
,
7140 "No usable DMA configuration, aborting\n");
7147 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
7148 IORESOURCE_MEM
), ixgbe_driver_name
);
7151 "pci_request_selected_regions failed 0x%x\n", err
);
7155 pci_enable_pcie_error_reporting(pdev
);
7157 pci_set_master(pdev
);
7158 pci_save_state(pdev
);
7160 #ifdef CONFIG_IXGBE_DCB
7161 if (ii
->mac
== ixgbe_mac_82598EB
)
7162 dcb_max
= min_t(unsigned int, indices
* MAX_TRAFFIC_CLASS
,
7163 IXGBE_MAX_RSS_INDICES
);
7165 dcb_max
= min_t(unsigned int, indices
* MAX_TRAFFIC_CLASS
,
7166 IXGBE_MAX_FDIR_INDICES
);
7169 if (ii
->mac
== ixgbe_mac_82598EB
)
7170 indices
= min_t(unsigned int, indices
, IXGBE_MAX_RSS_INDICES
);
7172 indices
= min_t(unsigned int, indices
, IXGBE_MAX_FDIR_INDICES
);
7175 indices
+= min_t(unsigned int, num_possible_cpus(),
7176 IXGBE_MAX_FCOE_INDICES
);
7178 indices
= max_t(unsigned int, dcb_max
, indices
);
7179 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
7182 goto err_alloc_etherdev
;
7185 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
7187 adapter
= netdev_priv(netdev
);
7188 pci_set_drvdata(pdev
, adapter
);
7190 adapter
->netdev
= netdev
;
7191 adapter
->pdev
= pdev
;
7194 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
7196 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
7197 pci_resource_len(pdev
, 0));
7203 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
7204 ixgbe_set_ethtool_ops(netdev
);
7205 netdev
->watchdog_timeo
= 5 * HZ
;
7206 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
7208 adapter
->bd_number
= cards_found
;
7211 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
7212 hw
->mac
.type
= ii
->mac
;
7215 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
7216 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
7217 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
7218 if (!(eec
& (1 << 8)))
7219 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
7222 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
7223 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
7224 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
7225 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
7226 hw
->phy
.mdio
.mmds
= 0;
7227 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
7228 hw
->phy
.mdio
.dev
= netdev
;
7229 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
7230 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
7232 ii
->get_invariants(hw
);
7234 /* setup the private structure */
7235 err
= ixgbe_sw_init(adapter
);
7239 /* Make it possible the adapter to be woken up via WOL */
7240 switch (adapter
->hw
.mac
.type
) {
7241 case ixgbe_mac_82599EB
:
7242 case ixgbe_mac_X540
:
7243 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
7250 * If there is a fan on this device and it has failed log the
7253 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
7254 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
7255 if (esdp
& IXGBE_ESDP_SDP1
)
7256 e_crit(probe
, "Fan has stopped, replace the adapter\n");
7259 if (allow_unsupported_sfp
)
7260 hw
->allow_unsupported_sfp
= allow_unsupported_sfp
;
7262 /* reset_hw fills in the perm_addr as well */
7263 hw
->phy
.reset_if_overtemp
= true;
7264 err
= hw
->mac
.ops
.reset_hw(hw
);
7265 hw
->phy
.reset_if_overtemp
= false;
7266 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
&&
7267 hw
->mac
.type
== ixgbe_mac_82598EB
) {
7269 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
7270 e_dev_err("failed to load because an unsupported SFP+ "
7271 "module type was detected.\n");
7272 e_dev_err("Reload the driver after installing a supported "
7276 e_dev_err("HW Init failed: %d\n", err
);
7280 #ifdef CONFIG_PCI_IOV
7281 ixgbe_enable_sriov(adapter
, ii
);
7284 netdev
->features
= NETIF_F_SG
|
7287 NETIF_F_HW_VLAN_TX
|
7288 NETIF_F_HW_VLAN_RX
|
7289 NETIF_F_HW_VLAN_FILTER
|
7295 netdev
->hw_features
= netdev
->features
;
7297 switch (adapter
->hw
.mac
.type
) {
7298 case ixgbe_mac_82599EB
:
7299 case ixgbe_mac_X540
:
7300 netdev
->features
|= NETIF_F_SCTP_CSUM
;
7301 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
|
7308 netdev
->hw_features
|= NETIF_F_RXALL
;
7310 netdev
->vlan_features
|= NETIF_F_TSO
;
7311 netdev
->vlan_features
|= NETIF_F_TSO6
;
7312 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
7313 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
7314 netdev
->vlan_features
|= NETIF_F_SG
;
7316 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
7317 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
7319 #ifdef CONFIG_IXGBE_DCB
7320 netdev
->dcbnl_ops
= &dcbnl_ops
;
7324 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
7325 if (hw
->mac
.ops
.get_device_caps
) {
7326 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
7327 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
7328 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
7331 adapter
->ring_feature
[RING_F_FCOE
].limit
= IXGBE_FCRETA_SIZE
;
7333 netdev
->features
|= NETIF_F_FSO
|
7336 netdev
->vlan_features
|= NETIF_F_FSO
|
7340 #endif /* IXGBE_FCOE */
7341 if (pci_using_dac
) {
7342 netdev
->features
|= NETIF_F_HIGHDMA
;
7343 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
7346 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
7347 netdev
->hw_features
|= NETIF_F_LRO
;
7348 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
7349 netdev
->features
|= NETIF_F_LRO
;
7351 /* make sure the EEPROM is good */
7352 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
7353 e_dev_err("The EEPROM Checksum Is Not Valid\n");
7358 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
7359 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
7361 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
7362 e_dev_err("invalid MAC address\n");
7367 setup_timer(&adapter
->service_timer
, &ixgbe_service_timer
,
7368 (unsigned long) adapter
);
7370 INIT_WORK(&adapter
->service_task
, ixgbe_service_task
);
7371 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
7373 err
= ixgbe_init_interrupt_scheme(adapter
);
7377 /* WOL not supported for all devices */
7379 hw
->eeprom
.ops
.read(hw
, 0x2c, &adapter
->eeprom_cap
);
7380 if (ixgbe_wol_supported(adapter
, pdev
->device
, pdev
->subsystem_device
))
7381 adapter
->wol
= IXGBE_WUFC_MAG
;
7383 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
7385 #ifdef CONFIG_IXGBE_PTP
7386 ixgbe_ptp_init(adapter
);
7387 #endif /* CONFIG_IXGBE_PTP*/
7389 /* save off EEPROM version number */
7390 hw
->eeprom
.ops
.read(hw
, 0x2e, &adapter
->eeprom_verh
);
7391 hw
->eeprom
.ops
.read(hw
, 0x2d, &adapter
->eeprom_verl
);
7393 /* pick up the PCI bus settings for reporting later */
7394 hw
->mac
.ops
.get_bus_info(hw
);
7396 /* print bus type/speed/width info */
7397 e_dev_info("(PCI Express:%s:%s) %pM\n",
7398 (hw
->bus
.speed
== ixgbe_bus_speed_5000
? "5.0GT/s" :
7399 hw
->bus
.speed
== ixgbe_bus_speed_2500
? "2.5GT/s" :
7401 (hw
->bus
.width
== ixgbe_bus_width_pcie_x8
? "Width x8" :
7402 hw
->bus
.width
== ixgbe_bus_width_pcie_x4
? "Width x4" :
7403 hw
->bus
.width
== ixgbe_bus_width_pcie_x1
? "Width x1" :
7407 err
= ixgbe_read_pba_string_generic(hw
, part_str
, IXGBE_PBANUM_LENGTH
);
7409 strncpy(part_str
, "Unknown", IXGBE_PBANUM_LENGTH
);
7410 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
7411 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
7412 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
7415 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
7416 hw
->mac
.type
, hw
->phy
.type
, part_str
);
7418 if (hw
->bus
.width
<= ixgbe_bus_width_pcie_x4
) {
7419 e_dev_warn("PCI-Express bandwidth available for this card is "
7420 "not sufficient for optimal performance.\n");
7421 e_dev_warn("For optimal performance a x8 PCI-Express slot "
7425 /* reset the hardware with the new settings */
7426 err
= hw
->mac
.ops
.start_hw(hw
);
7427 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
7428 /* We are running on a pre-production device, log a warning */
7429 e_dev_warn("This device is a pre-production adapter/LOM. "
7430 "Please be aware there may be issues associated "
7431 "with your hardware. If you are experiencing "
7432 "problems please contact your Intel or hardware "
7433 "representative who provided you with this "
7436 strcpy(netdev
->name
, "eth%d");
7437 err
= register_netdev(netdev
);
7441 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
7442 if (hw
->mac
.ops
.disable_tx_laser
&&
7443 ((hw
->phy
.multispeed_fiber
) ||
7444 ((hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
) &&
7445 (hw
->mac
.type
== ixgbe_mac_82599EB
))))
7446 hw
->mac
.ops
.disable_tx_laser(hw
);
7448 /* carrier off reporting is important to ethtool even BEFORE open */
7449 netif_carrier_off(netdev
);
7451 #ifdef CONFIG_IXGBE_DCA
7452 if (dca_add_requester(&pdev
->dev
) == 0) {
7453 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
7454 ixgbe_setup_dca(adapter
);
7457 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
7458 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
7459 for (i
= 0; i
< adapter
->num_vfs
; i
++)
7460 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
7463 /* firmware requires driver version to be 0xFFFFFFFF
7464 * since os does not support feature
7466 if (hw
->mac
.ops
.set_fw_drv_ver
)
7467 hw
->mac
.ops
.set_fw_drv_ver(hw
, 0xFF, 0xFF, 0xFF,
7470 /* add san mac addr to netdev */
7471 ixgbe_add_sanmac_netdev(netdev
);
7473 e_dev_info("%s\n", ixgbe_default_device_descr
);
7476 #ifdef CONFIG_IXGBE_HWMON
7477 if (ixgbe_sysfs_init(adapter
))
7478 e_err(probe
, "failed to allocate sysfs resources\n");
7479 #endif /* CONFIG_IXGBE_HWMON */
7481 #ifdef CONFIG_DEBUG_FS
7482 ixgbe_dbg_adapter_init(adapter
);
7483 #endif /* CONFIG_DEBUG_FS */
7488 ixgbe_release_hw_control(adapter
);
7489 ixgbe_clear_interrupt_scheme(adapter
);
7491 ixgbe_disable_sriov(adapter
);
7492 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
7493 iounmap(hw
->hw_addr
);
7495 free_netdev(netdev
);
7497 pci_release_selected_regions(pdev
,
7498 pci_select_bars(pdev
, IORESOURCE_MEM
));
7501 pci_disable_device(pdev
);
7506 * ixgbe_remove - Device Removal Routine
7507 * @pdev: PCI device information struct
7509 * ixgbe_remove is called by the PCI subsystem to alert the driver
7510 * that it should release a PCI device. The could be caused by a
7511 * Hot-Plug event, or because the driver is going to be removed from
7514 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
7516 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7517 struct net_device
*netdev
= adapter
->netdev
;
7519 #ifdef CONFIG_DEBUG_FS
7520 ixgbe_dbg_adapter_exit(adapter
);
7521 #endif /*CONFIG_DEBUG_FS */
7523 set_bit(__IXGBE_DOWN
, &adapter
->state
);
7524 cancel_work_sync(&adapter
->service_task
);
7526 #ifdef CONFIG_IXGBE_PTP
7527 ixgbe_ptp_stop(adapter
);
7530 #ifdef CONFIG_IXGBE_DCA
7531 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
7532 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
7533 dca_remove_requester(&pdev
->dev
);
7534 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
7538 #ifdef CONFIG_IXGBE_HWMON
7539 ixgbe_sysfs_exit(adapter
);
7540 #endif /* CONFIG_IXGBE_HWMON */
7542 /* remove the added san mac */
7543 ixgbe_del_sanmac_netdev(netdev
);
7545 if (netdev
->reg_state
== NETREG_REGISTERED
)
7546 unregister_netdev(netdev
);
7548 ixgbe_disable_sriov(adapter
);
7550 ixgbe_clear_interrupt_scheme(adapter
);
7552 ixgbe_release_hw_control(adapter
);
7555 kfree(adapter
->ixgbe_ieee_pfc
);
7556 kfree(adapter
->ixgbe_ieee_ets
);
7559 iounmap(adapter
->hw
.hw_addr
);
7560 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
7563 e_dev_info("complete\n");
7565 free_netdev(netdev
);
7567 pci_disable_pcie_error_reporting(pdev
);
7569 pci_disable_device(pdev
);
7573 * ixgbe_io_error_detected - called when PCI error is detected
7574 * @pdev: Pointer to PCI device
7575 * @state: The current pci connection state
7577 * This function is called after a PCI bus error affecting
7578 * this device has been detected.
7580 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
7581 pci_channel_state_t state
)
7583 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7584 struct net_device
*netdev
= adapter
->netdev
;
7586 #ifdef CONFIG_PCI_IOV
7587 struct pci_dev
*bdev
, *vfdev
;
7588 u32 dw0
, dw1
, dw2
, dw3
;
7590 u16 req_id
, pf_func
;
7592 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
7593 adapter
->num_vfs
== 0)
7594 goto skip_bad_vf_detection
;
7596 bdev
= pdev
->bus
->self
;
7597 while (bdev
&& (pci_pcie_type(bdev
) != PCI_EXP_TYPE_ROOT_PORT
))
7598 bdev
= bdev
->bus
->self
;
7601 goto skip_bad_vf_detection
;
7603 pos
= pci_find_ext_capability(bdev
, PCI_EXT_CAP_ID_ERR
);
7605 goto skip_bad_vf_detection
;
7607 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
, &dw0
);
7608 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 4, &dw1
);
7609 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 8, &dw2
);
7610 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 12, &dw3
);
7613 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
7614 if (!(req_id
& 0x0080))
7615 goto skip_bad_vf_detection
;
7617 pf_func
= req_id
& 0x01;
7618 if ((pf_func
& 1) == (pdev
->devfn
& 1)) {
7619 unsigned int device_id
;
7621 vf
= (req_id
& 0x7F) >> 1;
7622 e_dev_err("VF %d has caused a PCIe error\n", vf
);
7623 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
7624 "%8.8x\tdw3: %8.8x\n",
7625 dw0
, dw1
, dw2
, dw3
);
7626 switch (adapter
->hw
.mac
.type
) {
7627 case ixgbe_mac_82599EB
:
7628 device_id
= IXGBE_82599_VF_DEVICE_ID
;
7630 case ixgbe_mac_X540
:
7631 device_id
= IXGBE_X540_VF_DEVICE_ID
;
7638 /* Find the pci device of the offending VF */
7639 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
, device_id
, NULL
);
7641 if (vfdev
->devfn
== (req_id
& 0xFF))
7643 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
,
7647 * There's a slim chance the VF could have been hot plugged,
7648 * so if it is no longer present we don't need to issue the
7649 * VFLR. Just clean up the AER in that case.
7652 e_dev_err("Issuing VFLR to VF %d\n", vf
);
7653 pci_write_config_dword(vfdev
, 0xA8, 0x00008000);
7656 pci_cleanup_aer_uncorrect_error_status(pdev
);
7660 * Even though the error may have occurred on the other port
7661 * we still need to increment the vf error reference count for
7662 * both ports because the I/O resume function will be called
7665 adapter
->vferr_refcount
++;
7667 return PCI_ERS_RESULT_RECOVERED
;
7669 skip_bad_vf_detection
:
7670 #endif /* CONFIG_PCI_IOV */
7671 netif_device_detach(netdev
);
7673 if (state
== pci_channel_io_perm_failure
)
7674 return PCI_ERS_RESULT_DISCONNECT
;
7676 if (netif_running(netdev
))
7677 ixgbe_down(adapter
);
7678 pci_disable_device(pdev
);
7680 /* Request a slot reset. */
7681 return PCI_ERS_RESULT_NEED_RESET
;
7685 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7686 * @pdev: Pointer to PCI device
7688 * Restart the card from scratch, as if from a cold-boot.
7690 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
7692 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7693 pci_ers_result_t result
;
7696 if (pci_enable_device_mem(pdev
)) {
7697 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
7698 result
= PCI_ERS_RESULT_DISCONNECT
;
7700 pci_set_master(pdev
);
7701 pci_restore_state(pdev
);
7702 pci_save_state(pdev
);
7704 pci_wake_from_d3(pdev
, false);
7706 ixgbe_reset(adapter
);
7707 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
7708 result
= PCI_ERS_RESULT_RECOVERED
;
7711 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7713 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7714 "failed 0x%0x\n", err
);
7715 /* non-fatal, continue */
7722 * ixgbe_io_resume - called when traffic can start flowing again.
7723 * @pdev: Pointer to PCI device
7725 * This callback is called when the error recovery driver tells us that
7726 * its OK to resume normal operation.
7728 static void ixgbe_io_resume(struct pci_dev
*pdev
)
7730 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7731 struct net_device
*netdev
= adapter
->netdev
;
7733 #ifdef CONFIG_PCI_IOV
7734 if (adapter
->vferr_refcount
) {
7735 e_info(drv
, "Resuming after VF err\n");
7736 adapter
->vferr_refcount
--;
7741 if (netif_running(netdev
))
7744 netif_device_attach(netdev
);
7747 static const struct pci_error_handlers ixgbe_err_handler
= {
7748 .error_detected
= ixgbe_io_error_detected
,
7749 .slot_reset
= ixgbe_io_slot_reset
,
7750 .resume
= ixgbe_io_resume
,
7753 static struct pci_driver ixgbe_driver
= {
7754 .name
= ixgbe_driver_name
,
7755 .id_table
= ixgbe_pci_tbl
,
7756 .probe
= ixgbe_probe
,
7757 .remove
= __devexit_p(ixgbe_remove
),
7759 .suspend
= ixgbe_suspend
,
7760 .resume
= ixgbe_resume
,
7762 .shutdown
= ixgbe_shutdown
,
7763 .err_handler
= &ixgbe_err_handler
7767 * ixgbe_init_module - Driver Registration Routine
7769 * ixgbe_init_module is the first routine called when the driver is
7770 * loaded. All it does is register with the PCI subsystem.
7772 static int __init
ixgbe_init_module(void)
7775 pr_info("%s - version %s\n", ixgbe_driver_string
, ixgbe_driver_version
);
7776 pr_info("%s\n", ixgbe_copyright
);
7778 #ifdef CONFIG_DEBUG_FS
7780 #endif /* CONFIG_DEBUG_FS */
7782 #ifdef CONFIG_IXGBE_DCA
7783 dca_register_notify(&dca_notifier
);
7786 ret
= pci_register_driver(&ixgbe_driver
);
7790 module_init(ixgbe_init_module
);
7793 * ixgbe_exit_module - Driver Exit Cleanup Routine
7795 * ixgbe_exit_module is called just before the driver is removed
7798 static void __exit
ixgbe_exit_module(void)
7800 #ifdef CONFIG_IXGBE_DCA
7801 dca_unregister_notify(&dca_notifier
);
7803 pci_unregister_driver(&ixgbe_driver
);
7805 #ifdef CONFIG_DEBUG_FS
7807 #endif /* CONFIG_DEBUG_FS */
7809 rcu_barrier(); /* Wait for completion of call_rcu()'s */
7812 #ifdef CONFIG_IXGBE_DCA
7813 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
7818 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
7819 __ixgbe_notify_dca
);
7821 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
7824 #endif /* CONFIG_IXGBE_DCA */
7826 module_exit(ixgbe_exit_module
);