2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <net/busy_poll.h>
35 #include <linux/bpf.h>
36 #include <linux/bpf_trace.h>
37 #include <linux/mlx4/cq.h>
38 #include <linux/slab.h>
39 #include <linux/mlx4/qp.h>
40 #include <linux/skbuff.h>
41 #include <linux/rculist.h>
42 #include <linux/if_ether.h>
43 #include <linux/if_vlan.h>
44 #include <linux/vmalloc.h>
45 #include <linux/irq.h>
47 #if IS_ENABLED(CONFIG_IPV6)
48 #include <net/ip6_checksum.h>
53 static int mlx4_alloc_page(struct mlx4_en_priv
*priv
,
54 struct mlx4_en_rx_alloc
*frag
,
60 page
= alloc_page(gfp
);
63 dma
= dma_map_page(priv
->ddev
, page
, 0, PAGE_SIZE
, priv
->dma_dir
);
64 if (unlikely(dma_mapping_error(priv
->ddev
, dma
))) {
70 frag
->page_offset
= priv
->rx_headroom
;
74 static int mlx4_en_alloc_frags(struct mlx4_en_priv
*priv
,
75 struct mlx4_en_rx_ring
*ring
,
76 struct mlx4_en_rx_desc
*rx_desc
,
77 struct mlx4_en_rx_alloc
*frags
,
82 for (i
= 0; i
< priv
->num_frags
; i
++, frags
++) {
84 if (mlx4_alloc_page(priv
, frags
, gfp
))
86 ring
->rx_alloc_pages
++;
88 rx_desc
->data
[i
].addr
= cpu_to_be64(frags
->dma
+
94 static void mlx4_en_free_frag(const struct mlx4_en_priv
*priv
,
95 struct mlx4_en_rx_alloc
*frag
)
98 dma_unmap_page(priv
->ddev
, frag
->dma
,
99 PAGE_SIZE
, priv
->dma_dir
);
100 __free_page(frag
->page
);
102 /* We need to clear all fields, otherwise a change of priv->log_rx_info
103 * could lead to see garbage later in frag->page.
105 memset(frag
, 0, sizeof(*frag
));
108 static void mlx4_en_init_rx_desc(const struct mlx4_en_priv
*priv
,
109 struct mlx4_en_rx_ring
*ring
, int index
)
111 struct mlx4_en_rx_desc
*rx_desc
= ring
->buf
+ ring
->stride
* index
;
115 /* Set size and memtype fields */
116 for (i
= 0; i
< priv
->num_frags
; i
++) {
117 rx_desc
->data
[i
].byte_count
=
118 cpu_to_be32(priv
->frag_info
[i
].frag_size
);
119 rx_desc
->data
[i
].lkey
= cpu_to_be32(priv
->mdev
->mr
.key
);
122 /* If the number of used fragments does not fill up the ring stride,
123 * remaining (unused) fragments must be padded with null address/size
124 * and a special memory key */
125 possible_frags
= (ring
->stride
- sizeof(struct mlx4_en_rx_desc
)) / DS_SIZE
;
126 for (i
= priv
->num_frags
; i
< possible_frags
; i
++) {
127 rx_desc
->data
[i
].byte_count
= 0;
128 rx_desc
->data
[i
].lkey
= cpu_to_be32(MLX4_EN_MEMTYPE_PAD
);
129 rx_desc
->data
[i
].addr
= 0;
133 static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv
*priv
,
134 struct mlx4_en_rx_ring
*ring
, int index
,
137 struct mlx4_en_rx_desc
*rx_desc
= ring
->buf
+
138 (index
<< ring
->log_stride
);
139 struct mlx4_en_rx_alloc
*frags
= ring
->rx_info
+
140 (index
<< priv
->log_rx_info
);
141 if (likely(ring
->page_cache
.index
> 0)) {
142 /* XDP uses a single page per frame */
144 ring
->page_cache
.index
--;
145 frags
->page
= ring
->page_cache
.buf
[ring
->page_cache
.index
].page
;
146 frags
->dma
= ring
->page_cache
.buf
[ring
->page_cache
.index
].dma
;
148 frags
->page_offset
= XDP_PACKET_HEADROOM
;
149 rx_desc
->data
[0].addr
= cpu_to_be64(frags
->dma
+
150 XDP_PACKET_HEADROOM
);
154 return mlx4_en_alloc_frags(priv
, ring
, rx_desc
, frags
, gfp
);
157 static bool mlx4_en_is_ring_empty(const struct mlx4_en_rx_ring
*ring
)
159 return ring
->prod
== ring
->cons
;
162 static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring
*ring
)
164 *ring
->wqres
.db
.db
= cpu_to_be32(ring
->prod
& 0xffff);
168 static void mlx4_en_free_rx_desc(const struct mlx4_en_priv
*priv
,
169 struct mlx4_en_rx_ring
*ring
,
172 struct mlx4_en_rx_alloc
*frags
;
175 frags
= ring
->rx_info
+ (index
<< priv
->log_rx_info
);
176 for (nr
= 0; nr
< priv
->num_frags
; nr
++) {
177 en_dbg(DRV
, priv
, "Freeing fragment:%d\n", nr
);
178 mlx4_en_free_frag(priv
, frags
+ nr
);
182 /* Function not in fast-path */
183 static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv
*priv
)
185 struct mlx4_en_rx_ring
*ring
;
190 for (buf_ind
= 0; buf_ind
< priv
->prof
->rx_ring_size
; buf_ind
++) {
191 for (ring_ind
= 0; ring_ind
< priv
->rx_ring_num
; ring_ind
++) {
192 ring
= priv
->rx_ring
[ring_ind
];
194 if (mlx4_en_prepare_rx_desc(priv
, ring
,
196 GFP_KERNEL
| __GFP_COLD
)) {
197 if (ring
->actual_size
< MLX4_EN_MIN_RX_SIZE
) {
198 en_err(priv
, "Failed to allocate enough rx buffers\n");
201 new_size
= rounddown_pow_of_two(ring
->actual_size
);
202 en_warn(priv
, "Only %d buffers allocated reducing ring size to %d\n",
203 ring
->actual_size
, new_size
);
214 for (ring_ind
= 0; ring_ind
< priv
->rx_ring_num
; ring_ind
++) {
215 ring
= priv
->rx_ring
[ring_ind
];
216 while (ring
->actual_size
> new_size
) {
219 mlx4_en_free_rx_desc(priv
, ring
, ring
->actual_size
);
226 static void mlx4_en_free_rx_buf(struct mlx4_en_priv
*priv
,
227 struct mlx4_en_rx_ring
*ring
)
231 en_dbg(DRV
, priv
, "Freeing Rx buf - cons:%d prod:%d\n",
232 ring
->cons
, ring
->prod
);
234 /* Unmap and free Rx buffers */
235 for (index
= 0; index
< ring
->size
; index
++) {
236 en_dbg(DRV
, priv
, "Processing descriptor:%d\n", index
);
237 mlx4_en_free_rx_desc(priv
, ring
, index
);
243 void mlx4_en_set_num_rx_rings(struct mlx4_en_dev
*mdev
)
248 struct mlx4_dev
*dev
= mdev
->dev
;
250 mlx4_foreach_port(i
, dev
, MLX4_PORT_TYPE_ETH
) {
251 num_of_eqs
= max_t(int, MIN_RX_RINGS
,
253 mlx4_get_eqs_per_port(mdev
->dev
, i
),
256 num_rx_rings
= mlx4_low_memory_profile() ? MIN_RX_RINGS
:
257 min_t(int, num_of_eqs
,
258 netif_get_num_default_rss_queues());
259 mdev
->profile
.prof
[i
].rx_ring_num
=
260 rounddown_pow_of_two(num_rx_rings
);
264 int mlx4_en_create_rx_ring(struct mlx4_en_priv
*priv
,
265 struct mlx4_en_rx_ring
**pring
,
266 u32 size
, u16 stride
, int node
)
268 struct mlx4_en_dev
*mdev
= priv
->mdev
;
269 struct mlx4_en_rx_ring
*ring
;
273 ring
= kzalloc_node(sizeof(*ring
), GFP_KERNEL
, node
);
275 ring
= kzalloc(sizeof(*ring
), GFP_KERNEL
);
277 en_err(priv
, "Failed to allocate RX ring structure\n");
285 ring
->size_mask
= size
- 1;
286 ring
->stride
= stride
;
287 ring
->log_stride
= ffs(ring
->stride
) - 1;
288 ring
->buf_size
= ring
->size
* ring
->stride
+ TXBB_SIZE
;
290 tmp
= size
* roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS
*
291 sizeof(struct mlx4_en_rx_alloc
));
292 ring
->rx_info
= vzalloc_node(tmp
, node
);
293 if (!ring
->rx_info
) {
294 ring
->rx_info
= vzalloc(tmp
);
295 if (!ring
->rx_info
) {
301 en_dbg(DRV
, priv
, "Allocated rx_info ring at addr:%p size:%d\n",
304 /* Allocate HW buffers on provided NUMA node */
305 set_dev_node(&mdev
->dev
->persist
->pdev
->dev
, node
);
306 err
= mlx4_alloc_hwq_res(mdev
->dev
, &ring
->wqres
, ring
->buf_size
);
307 set_dev_node(&mdev
->dev
->persist
->pdev
->dev
, mdev
->dev
->numa_node
);
311 ring
->buf
= ring
->wqres
.buf
.direct
.buf
;
313 ring
->hwtstamp_rx_filter
= priv
->hwtstamp_config
.rx_filter
;
319 vfree(ring
->rx_info
);
320 ring
->rx_info
= NULL
;
328 int mlx4_en_activate_rx_rings(struct mlx4_en_priv
*priv
)
330 struct mlx4_en_rx_ring
*ring
;
334 int stride
= roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc
) +
335 DS_SIZE
* priv
->num_frags
);
337 for (ring_ind
= 0; ring_ind
< priv
->rx_ring_num
; ring_ind
++) {
338 ring
= priv
->rx_ring
[ring_ind
];
342 ring
->actual_size
= 0;
343 ring
->cqn
= priv
->rx_cq
[ring_ind
]->mcq
.cqn
;
345 ring
->stride
= stride
;
346 if (ring
->stride
<= TXBB_SIZE
) {
347 /* Stamp first unused send wqe */
348 __be32
*ptr
= (__be32
*)ring
->buf
;
349 __be32 stamp
= cpu_to_be32(1 << STAMP_SHIFT
);
351 /* Move pointer to start of rx section */
352 ring
->buf
+= TXBB_SIZE
;
355 ring
->log_stride
= ffs(ring
->stride
) - 1;
356 ring
->buf_size
= ring
->size
* ring
->stride
;
358 memset(ring
->buf
, 0, ring
->buf_size
);
359 mlx4_en_update_rx_prod_db(ring
);
361 /* Initialize all descriptors */
362 for (i
= 0; i
< ring
->size
; i
++)
363 mlx4_en_init_rx_desc(priv
, ring
, i
);
365 err
= mlx4_en_fill_rx_buffers(priv
);
369 for (ring_ind
= 0; ring_ind
< priv
->rx_ring_num
; ring_ind
++) {
370 ring
= priv
->rx_ring
[ring_ind
];
372 ring
->size_mask
= ring
->actual_size
- 1;
373 mlx4_en_update_rx_prod_db(ring
);
379 for (ring_ind
= 0; ring_ind
< priv
->rx_ring_num
; ring_ind
++)
380 mlx4_en_free_rx_buf(priv
, priv
->rx_ring
[ring_ind
]);
382 ring_ind
= priv
->rx_ring_num
- 1;
383 while (ring_ind
>= 0) {
384 if (priv
->rx_ring
[ring_ind
]->stride
<= TXBB_SIZE
)
385 priv
->rx_ring
[ring_ind
]->buf
-= TXBB_SIZE
;
391 /* We recover from out of memory by scheduling our napi poll
392 * function (mlx4_en_process_cq), which tries to allocate
393 * all missing RX buffers (call to mlx4_en_refill_rx_buffers).
395 void mlx4_en_recover_from_oom(struct mlx4_en_priv
*priv
)
402 for (ring
= 0; ring
< priv
->rx_ring_num
; ring
++) {
403 if (mlx4_en_is_ring_empty(priv
->rx_ring
[ring
])) {
405 napi_reschedule(&priv
->rx_cq
[ring
]->napi
);
411 /* When the rx ring is running in page-per-packet mode, a released frame can go
412 * directly into a small cache, to avoid unmapping or touching the page
413 * allocator. In bpf prog performance scenarios, buffers are either forwarded
414 * or dropped, never converted to skbs, so every page can come directly from
415 * this cache when it is sized to be a multiple of the napi budget.
417 bool mlx4_en_rx_recycle(struct mlx4_en_rx_ring
*ring
,
418 struct mlx4_en_rx_alloc
*frame
)
420 struct mlx4_en_page_cache
*cache
= &ring
->page_cache
;
422 if (cache
->index
>= MLX4_EN_CACHE_SIZE
)
425 cache
->buf
[cache
->index
].page
= frame
->page
;
426 cache
->buf
[cache
->index
].dma
= frame
->dma
;
431 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv
*priv
,
432 struct mlx4_en_rx_ring
**pring
,
433 u32 size
, u16 stride
)
435 struct mlx4_en_dev
*mdev
= priv
->mdev
;
436 struct mlx4_en_rx_ring
*ring
= *pring
;
437 struct bpf_prog
*old_prog
;
439 old_prog
= rcu_dereference_protected(
441 lockdep_is_held(&mdev
->state_lock
));
443 bpf_prog_put(old_prog
);
444 mlx4_free_hwq_res(mdev
->dev
, &ring
->wqres
, size
* stride
+ TXBB_SIZE
);
445 vfree(ring
->rx_info
);
446 ring
->rx_info
= NULL
;
451 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv
*priv
,
452 struct mlx4_en_rx_ring
*ring
)
456 for (i
= 0; i
< ring
->page_cache
.index
; i
++) {
457 dma_unmap_page(priv
->ddev
, ring
->page_cache
.buf
[i
].dma
,
458 PAGE_SIZE
, priv
->dma_dir
);
459 put_page(ring
->page_cache
.buf
[i
].page
);
461 ring
->page_cache
.index
= 0;
462 mlx4_en_free_rx_buf(priv
, ring
);
463 if (ring
->stride
<= TXBB_SIZE
)
464 ring
->buf
-= TXBB_SIZE
;
468 static int mlx4_en_complete_rx_desc(struct mlx4_en_priv
*priv
,
469 struct mlx4_en_rx_alloc
*frags
,
473 const struct mlx4_en_frag_info
*frag_info
= priv
->frag_info
;
474 unsigned int truesize
= 0;
480 /* Collect used fragments while replacing them in the HW descriptors */
481 for (nr
= 0;; frags
++) {
482 frag_size
= min_t(int, length
, frag_info
->frag_size
);
489 dma_sync_single_range_for_cpu(priv
->ddev
, dma
, frags
->page_offset
,
490 frag_size
, priv
->dma_dir
);
492 __skb_fill_page_desc(skb
, nr
, page
, frags
->page_offset
,
495 truesize
+= frag_info
->frag_stride
;
496 if (frag_info
->frag_stride
== PAGE_SIZE
/ 2) {
497 frags
->page_offset
^= PAGE_SIZE
/ 2;
498 release
= page_count(page
) != 1 ||
499 page_is_pfmemalloc(page
) ||
500 page_to_nid(page
) != numa_mem_id();
502 u32 sz_align
= ALIGN(frag_size
, SMP_CACHE_BYTES
);
504 frags
->page_offset
+= sz_align
;
505 release
= frags
->page_offset
+ frag_info
->frag_size
> PAGE_SIZE
;
508 dma_unmap_page(priv
->ddev
, dma
, PAGE_SIZE
, priv
->dma_dir
);
520 skb
->truesize
+= truesize
;
526 __skb_frag_unref(skb_shinfo(skb
)->frags
+ nr
);
531 static void validate_loopback(struct mlx4_en_priv
*priv
, void *va
)
533 const unsigned char *data
= va
+ ETH_HLEN
;
536 for (i
= 0; i
< MLX4_LOOPBACK_TEST_PAYLOAD
; i
++) {
537 if (data
[i
] != (unsigned char)i
)
541 priv
->loopback_ok
= 1;
544 static void mlx4_en_refill_rx_buffers(struct mlx4_en_priv
*priv
,
545 struct mlx4_en_rx_ring
*ring
)
547 u32 missing
= ring
->actual_size
- (ring
->prod
- ring
->cons
);
549 /* Try to batch allocations, but not too much. */
553 if (mlx4_en_prepare_rx_desc(priv
, ring
,
554 ring
->prod
& ring
->size_mask
,
555 GFP_ATOMIC
| __GFP_COLD
|
559 } while (likely(--missing
));
561 mlx4_en_update_rx_prod_db(ring
);
564 /* When hardware doesn't strip the vlan, we need to calculate the checksum
565 * over it and add it to the hardware's checksum calculation
567 static inline __wsum
get_fixed_vlan_csum(__wsum hw_checksum
,
568 struct vlan_hdr
*vlanh
)
570 return csum_add(hw_checksum
, *(__wsum
*)vlanh
);
573 /* Although the stack expects checksum which doesn't include the pseudo
574 * header, the HW adds it. To address that, we are subtracting the pseudo
575 * header checksum from the checksum value provided by the HW.
577 static int get_fixed_ipv4_csum(__wsum hw_checksum
, struct sk_buff
*skb
,
580 __u16 length_for_csum
= 0;
581 __wsum csum_pseudo_header
= 0;
582 __u8 ipproto
= iph
->protocol
;
584 if (unlikely(ipproto
== IPPROTO_SCTP
))
587 length_for_csum
= (be16_to_cpu(iph
->tot_len
) - (iph
->ihl
<< 2));
588 csum_pseudo_header
= csum_tcpudp_nofold(iph
->saddr
, iph
->daddr
,
589 length_for_csum
, ipproto
, 0);
590 skb
->csum
= csum_sub(hw_checksum
, csum_pseudo_header
);
594 #if IS_ENABLED(CONFIG_IPV6)
595 /* In IPv6 packets, besides subtracting the pseudo header checksum,
596 * we also compute/add the IP header checksum which
597 * is not added by the HW.
599 static int get_fixed_ipv6_csum(__wsum hw_checksum
, struct sk_buff
*skb
,
600 struct ipv6hdr
*ipv6h
)
602 __u8 nexthdr
= ipv6h
->nexthdr
;
603 __wsum csum_pseudo_hdr
= 0;
605 if (unlikely(nexthdr
== IPPROTO_FRAGMENT
||
606 nexthdr
== IPPROTO_HOPOPTS
||
607 nexthdr
== IPPROTO_SCTP
))
609 hw_checksum
= csum_add(hw_checksum
, (__force __wsum
)htons(nexthdr
));
611 csum_pseudo_hdr
= csum_partial(&ipv6h
->saddr
,
612 sizeof(ipv6h
->saddr
) + sizeof(ipv6h
->daddr
), 0);
613 csum_pseudo_hdr
= csum_add(csum_pseudo_hdr
, (__force __wsum
)ipv6h
->payload_len
);
614 csum_pseudo_hdr
= csum_add(csum_pseudo_hdr
,
615 (__force __wsum
)htons(nexthdr
));
617 skb
->csum
= csum_sub(hw_checksum
, csum_pseudo_hdr
);
618 skb
->csum
= csum_add(skb
->csum
, csum_partial(ipv6h
, sizeof(struct ipv6hdr
), 0));
622 static int check_csum(struct mlx4_cqe
*cqe
, struct sk_buff
*skb
, void *va
,
623 netdev_features_t dev_features
)
625 __wsum hw_checksum
= 0;
627 void *hdr
= (u8
*)va
+ sizeof(struct ethhdr
);
629 hw_checksum
= csum_unfold((__force __sum16
)cqe
->checksum
);
631 if (cqe
->vlan_my_qpn
& cpu_to_be32(MLX4_CQE_CVLAN_PRESENT_MASK
) &&
632 !(dev_features
& NETIF_F_HW_VLAN_CTAG_RX
)) {
633 hw_checksum
= get_fixed_vlan_csum(hw_checksum
, hdr
);
634 hdr
+= sizeof(struct vlan_hdr
);
637 if (cqe
->status
& cpu_to_be16(MLX4_CQE_STATUS_IPV4
))
638 return get_fixed_ipv4_csum(hw_checksum
, skb
, hdr
);
639 #if IS_ENABLED(CONFIG_IPV6)
640 if (cqe
->status
& cpu_to_be16(MLX4_CQE_STATUS_IPV6
))
641 return get_fixed_ipv6_csum(hw_checksum
, skb
, hdr
);
646 int mlx4_en_process_rx_cq(struct net_device
*dev
, struct mlx4_en_cq
*cq
, int budget
)
648 struct mlx4_en_priv
*priv
= netdev_priv(dev
);
649 int factor
= priv
->cqe_factor
;
650 struct mlx4_en_rx_ring
*ring
;
651 struct bpf_prog
*xdp_prog
;
652 int cq_ring
= cq
->ring
;
653 bool doorbell_pending
;
654 struct mlx4_cqe
*cqe
;
658 if (unlikely(!priv
->port_up
))
661 if (unlikely(budget
<= 0))
664 ring
= priv
->rx_ring
[cq_ring
];
666 /* Protect accesses to: ring->xdp_prog, priv->mac_hash list */
668 xdp_prog
= rcu_dereference(ring
->xdp_prog
);
669 doorbell_pending
= 0;
671 /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx
672 * descriptor offset can be deduced from the CQE index instead of
673 * reading 'cqe->index' */
674 index
= cq
->mcq
.cons_index
& ring
->size_mask
;
675 cqe
= mlx4_en_get_cqe(cq
->buf
, index
, priv
->cqe_size
) + factor
;
677 /* Process all completed CQEs */
678 while (XNOR(cqe
->owner_sr_opcode
& MLX4_CQE_OWNER_MASK
,
679 cq
->mcq
.cons_index
& cq
->size
)) {
680 struct mlx4_en_rx_alloc
*frags
;
681 enum pkt_hash_types hash_type
;
688 frags
= ring
->rx_info
+ (index
<< priv
->log_rx_info
);
689 va
= page_address(frags
[0].page
) + frags
[0].page_offset
;
692 * make sure we read the CQE after we read the ownership bit
696 /* Drop packet on bad receive or bad checksum */
697 if (unlikely((cqe
->owner_sr_opcode
& MLX4_CQE_OPCODE_MASK
) ==
698 MLX4_CQE_OPCODE_ERROR
)) {
699 en_err(priv
, "CQE completed in error - vendor syndrom:%d syndrom:%d\n",
700 ((struct mlx4_err_cqe
*)cqe
)->vendor_err_syndrome
,
701 ((struct mlx4_err_cqe
*)cqe
)->syndrome
);
704 if (unlikely(cqe
->badfcs_enc
& MLX4_CQE_BAD_FCS
)) {
705 en_dbg(RX_ERR
, priv
, "Accepted frame with bad FCS\n");
709 /* Check if we need to drop the packet if SRIOV is not enabled
710 * and not performing the selftest or flb disabled
712 if (priv
->flags
& MLX4_EN_FLAG_RX_FILTER_NEEDED
) {
713 const struct ethhdr
*ethh
= va
;
715 /* Get pointer to first fragment since we haven't
716 * skb yet and cast it to ethhdr struct
718 dma
= frags
[0].dma
+ frags
[0].page_offset
;
719 dma_sync_single_for_cpu(priv
->ddev
, dma
, sizeof(*ethh
),
722 if (is_multicast_ether_addr(ethh
->h_dest
)) {
723 struct mlx4_mac_entry
*entry
;
724 struct hlist_head
*bucket
;
725 unsigned int mac_hash
;
727 /* Drop the packet, since HW loopback-ed it */
728 mac_hash
= ethh
->h_source
[MLX4_EN_MAC_HASH_IDX
];
729 bucket
= &priv
->mac_hash
[mac_hash
];
730 hlist_for_each_entry_rcu(entry
, bucket
, hlist
) {
731 if (ether_addr_equal_64bits(entry
->mac
,
738 if (unlikely(priv
->validate_loopback
)) {
739 validate_loopback(priv
, va
);
744 * Packet is OK - process it.
746 length
= be32_to_cpu(cqe
->byte_cnt
);
747 length
-= ring
->fcs_del
;
749 /* A bpf program gets first chance to drop the packet. It may
750 * read bytes but not past the end of the frag.
758 dma
= frags
[0].dma
+ frags
[0].page_offset
;
759 dma_sync_single_for_cpu(priv
->ddev
, dma
,
760 priv
->frag_info
[0].frag_size
,
763 xdp
.data_hard_start
= va
- frags
[0].page_offset
;
765 xdp
.data_end
= xdp
.data
+ length
;
766 orig_data
= xdp
.data
;
768 act
= bpf_prog_run_xdp(xdp_prog
, &xdp
);
770 if (xdp
.data
!= orig_data
) {
771 length
= xdp
.data_end
- xdp
.data
;
772 frags
[0].page_offset
= xdp
.data
-
781 if (likely(!mlx4_en_xmit_frame(ring
, frags
, dev
,
783 &doorbell_pending
))) {
784 frags
[0].page
= NULL
;
787 trace_xdp_exception(dev
, xdp_prog
, act
);
788 goto xdp_drop_no_cnt
; /* Drop on xmit failure */
790 bpf_warn_invalid_xdp_action(act
);
792 trace_xdp_exception(dev
, xdp_prog
, act
);
800 ring
->bytes
+= length
;
803 skb
= napi_get_frags(&cq
->napi
);
807 if (unlikely(ring
->hwtstamp_rx_filter
== HWTSTAMP_FILTER_ALL
)) {
808 u64 timestamp
= mlx4_en_get_cqe_ts(cqe
);
810 mlx4_en_fill_hwtstamps(priv
->mdev
, skb_hwtstamps(skb
),
813 skb_record_rx_queue(skb
, cq_ring
);
815 if (likely(dev
->features
& NETIF_F_RXCSUM
)) {
816 if (cqe
->status
& cpu_to_be16(MLX4_CQE_STATUS_TCP
|
817 MLX4_CQE_STATUS_UDP
)) {
818 if ((cqe
->status
& cpu_to_be16(MLX4_CQE_STATUS_IPOK
)) &&
819 cqe
->checksum
== cpu_to_be16(0xffff)) {
820 bool l2_tunnel
= (dev
->hw_enc_features
& NETIF_F_RXCSUM
) &&
821 (cqe
->vlan_my_qpn
& cpu_to_be32(MLX4_CQE_L2_TUNNEL
));
823 ip_summed
= CHECKSUM_UNNECESSARY
;
824 hash_type
= PKT_HASH_TYPE_L4
;
832 if (priv
->flags
& MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP
&&
833 (cqe
->status
& cpu_to_be16(MLX4_CQE_STATUS_IPV4
|
834 MLX4_CQE_STATUS_IPV6
))) {
835 if (check_csum(cqe
, skb
, va
, dev
->features
)) {
838 ip_summed
= CHECKSUM_COMPLETE
;
839 hash_type
= PKT_HASH_TYPE_L3
;
840 ring
->csum_complete
++;
848 ip_summed
= CHECKSUM_NONE
;
849 hash_type
= PKT_HASH_TYPE_L3
;
852 skb
->ip_summed
= ip_summed
;
853 if (dev
->features
& NETIF_F_RXHASH
)
855 be32_to_cpu(cqe
->immed_rss_invalid
),
858 if ((cqe
->vlan_my_qpn
&
859 cpu_to_be32(MLX4_CQE_CVLAN_PRESENT_MASK
)) &&
860 (dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
))
861 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
862 be16_to_cpu(cqe
->sl_vid
));
863 else if ((cqe
->vlan_my_qpn
&
864 cpu_to_be32(MLX4_CQE_SVLAN_PRESENT_MASK
)) &&
865 (dev
->features
& NETIF_F_HW_VLAN_STAG_RX
))
866 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021AD
),
867 be16_to_cpu(cqe
->sl_vid
));
869 nr
= mlx4_en_complete_rx_desc(priv
, frags
, skb
, length
);
871 skb_shinfo(skb
)->nr_frags
= nr
;
873 skb
->data_len
= length
;
874 napi_gro_frags(&cq
->napi
);
880 ++cq
->mcq
.cons_index
;
881 index
= (cq
->mcq
.cons_index
) & ring
->size_mask
;
882 cqe
= mlx4_en_get_cqe(cq
->buf
, index
, priv
->cqe_size
) + factor
;
883 if (unlikely(++polled
== budget
))
889 if (likely(polled
)) {
890 if (doorbell_pending
) {
891 priv
->tx_cq
[TX_XDP
][cq_ring
]->xdp_busy
= true;
892 mlx4_en_xmit_doorbell(priv
->tx_ring
[TX_XDP
][cq_ring
]);
895 mlx4_cq_set_ci(&cq
->mcq
);
896 wmb(); /* ensure HW sees CQ consumer before we post new buffers */
897 ring
->cons
= cq
->mcq
.cons_index
;
899 AVG_PERF_COUNTER(priv
->pstats
.rx_coal_avg
, polled
);
901 mlx4_en_refill_rx_buffers(priv
, ring
);
907 void mlx4_en_rx_irq(struct mlx4_cq
*mcq
)
909 struct mlx4_en_cq
*cq
= container_of(mcq
, struct mlx4_en_cq
, mcq
);
910 struct mlx4_en_priv
*priv
= netdev_priv(cq
->dev
);
912 if (likely(priv
->port_up
))
913 napi_schedule_irqoff(&cq
->napi
);
915 mlx4_en_arm_cq(priv
, cq
);
918 /* Rx CQ polling - called by NAPI */
919 int mlx4_en_poll_rx_cq(struct napi_struct
*napi
, int budget
)
921 struct mlx4_en_cq
*cq
= container_of(napi
, struct mlx4_en_cq
, napi
);
922 struct net_device
*dev
= cq
->dev
;
923 struct mlx4_en_priv
*priv
= netdev_priv(dev
);
924 struct mlx4_en_cq
*xdp_tx_cq
= NULL
;
925 bool clean_complete
= true;
928 if (priv
->tx_ring_num
[TX_XDP
]) {
929 xdp_tx_cq
= priv
->tx_cq
[TX_XDP
][cq
->ring
];
930 if (xdp_tx_cq
->xdp_busy
) {
931 clean_complete
= mlx4_en_process_tx_cq(dev
, xdp_tx_cq
,
933 xdp_tx_cq
->xdp_busy
= !clean_complete
;
937 done
= mlx4_en_process_rx_cq(dev
, cq
, budget
);
939 /* If we used up all the quota - we're probably not done yet... */
940 if (done
== budget
|| !clean_complete
) {
941 const struct cpumask
*aff
;
942 struct irq_data
*idata
;
945 /* in case we got here because of !clean_complete */
948 INC_PERF_COUNTER(priv
->pstats
.napi_quota
);
950 cpu_curr
= smp_processor_id();
951 idata
= irq_desc_get_irq_data(cq
->irq_desc
);
952 aff
= irq_data_get_affinity_mask(idata
);
954 if (likely(cpumask_test_cpu(cpu_curr
, aff
)))
957 /* Current cpu is not according to smp_irq_affinity -
958 * probably affinity changed. Need to stop this NAPI
959 * poll, and restart it on the right CPU.
960 * Try to avoid returning a too small value (like 0),
961 * to not fool net_rx_action() and its netdev_budget
967 if (likely(napi_complete_done(napi
, done
)))
968 mlx4_en_arm_cq(priv
, cq
);
972 void mlx4_en_calc_rx_buf(struct net_device
*dev
)
974 struct mlx4_en_priv
*priv
= netdev_priv(dev
);
975 int eff_mtu
= MLX4_EN_EFF_MTU(dev
->mtu
);
978 /* bpf requires buffers to be set up as 1 packet per page.
979 * This only works when num_frags == 1.
981 if (priv
->tx_ring_num
[TX_XDP
]) {
982 priv
->frag_info
[0].frag_size
= eff_mtu
;
983 /* This will gain efficient xdp frame recycling at the
984 * expense of more costly truesize accounting
986 priv
->frag_info
[0].frag_stride
= PAGE_SIZE
;
987 priv
->dma_dir
= PCI_DMA_BIDIRECTIONAL
;
988 priv
->rx_headroom
= XDP_PACKET_HEADROOM
;
991 int frag_size_max
= 2048, buf_size
= 0;
993 /* should not happen, right ? */
994 if (eff_mtu
> PAGE_SIZE
+ (MLX4_EN_MAX_RX_FRAGS
- 1) * 2048)
995 frag_size_max
= PAGE_SIZE
;
997 while (buf_size
< eff_mtu
) {
998 int frag_stride
, frag_size
= eff_mtu
- buf_size
;
1001 if (i
< MLX4_EN_MAX_RX_FRAGS
- 1)
1002 frag_size
= min(frag_size
, frag_size_max
);
1004 priv
->frag_info
[i
].frag_size
= frag_size
;
1005 frag_stride
= ALIGN(frag_size
, SMP_CACHE_BYTES
);
1006 /* We can only pack 2 1536-bytes frames in on 4K page
1007 * Therefore, each frame would consume more bytes (truesize)
1009 nb
= PAGE_SIZE
/ frag_stride
;
1010 pad
= (PAGE_SIZE
- nb
* frag_stride
) / nb
;
1011 pad
&= ~(SMP_CACHE_BYTES
- 1);
1012 priv
->frag_info
[i
].frag_stride
= frag_stride
+ pad
;
1014 buf_size
+= frag_size
;
1017 priv
->dma_dir
= PCI_DMA_FROMDEVICE
;
1018 priv
->rx_headroom
= 0;
1021 priv
->num_frags
= i
;
1022 priv
->rx_skb_size
= eff_mtu
;
1023 priv
->log_rx_info
= ROUNDUP_LOG2(i
* sizeof(struct mlx4_en_rx_alloc
));
1025 en_dbg(DRV
, priv
, "Rx buffer scatter-list (effective-mtu:%d num_frags:%d):\n",
1026 eff_mtu
, priv
->num_frags
);
1027 for (i
= 0; i
< priv
->num_frags
; i
++) {
1030 " frag:%d - size:%d stride:%d\n",
1032 priv
->frag_info
[i
].frag_size
,
1033 priv
->frag_info
[i
].frag_stride
);
1037 /* RSS related functions */
1039 static int mlx4_en_config_rss_qp(struct mlx4_en_priv
*priv
, int qpn
,
1040 struct mlx4_en_rx_ring
*ring
,
1041 enum mlx4_qp_state
*state
,
1044 struct mlx4_en_dev
*mdev
= priv
->mdev
;
1045 struct mlx4_qp_context
*context
;
1048 context
= kmalloc(sizeof(*context
), GFP_KERNEL
);
1052 err
= mlx4_qp_alloc(mdev
->dev
, qpn
, qp
);
1054 en_err(priv
, "Failed to allocate qp #%x\n", qpn
);
1057 qp
->event
= mlx4_en_sqp_event
;
1059 memset(context
, 0, sizeof *context
);
1060 mlx4_en_fill_qp_context(priv
, ring
->actual_size
, ring
->stride
, 0, 0,
1061 qpn
, ring
->cqn
, -1, context
);
1062 context
->db_rec_addr
= cpu_to_be64(ring
->wqres
.db
.dma
);
1064 /* Cancel FCS removal if FW allows */
1065 if (mdev
->dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_FCS_KEEP
) {
1066 context
->param3
|= cpu_to_be32(1 << 29);
1067 if (priv
->dev
->features
& NETIF_F_RXFCS
)
1070 ring
->fcs_del
= ETH_FCS_LEN
;
1074 err
= mlx4_qp_to_ready(mdev
->dev
, &ring
->wqres
.mtt
, context
, qp
, state
);
1076 mlx4_qp_remove(mdev
->dev
, qp
);
1077 mlx4_qp_free(mdev
->dev
, qp
);
1079 mlx4_en_update_rx_prod_db(ring
);
1085 int mlx4_en_create_drop_qp(struct mlx4_en_priv
*priv
)
1090 err
= mlx4_qp_reserve_range(priv
->mdev
->dev
, 1, 1, &qpn
,
1091 MLX4_RESERVE_A0_QP
);
1093 en_err(priv
, "Failed reserving drop qpn\n");
1096 err
= mlx4_qp_alloc(priv
->mdev
->dev
, qpn
, &priv
->drop_qp
);
1098 en_err(priv
, "Failed allocating drop qp\n");
1099 mlx4_qp_release_range(priv
->mdev
->dev
, qpn
, 1);
1106 void mlx4_en_destroy_drop_qp(struct mlx4_en_priv
*priv
)
1110 qpn
= priv
->drop_qp
.qpn
;
1111 mlx4_qp_remove(priv
->mdev
->dev
, &priv
->drop_qp
);
1112 mlx4_qp_free(priv
->mdev
->dev
, &priv
->drop_qp
);
1113 mlx4_qp_release_range(priv
->mdev
->dev
, qpn
, 1);
1116 /* Allocate rx qp's and configure them according to rss map */
1117 int mlx4_en_config_rss_steer(struct mlx4_en_priv
*priv
)
1119 struct mlx4_en_dev
*mdev
= priv
->mdev
;
1120 struct mlx4_en_rss_map
*rss_map
= &priv
->rss_map
;
1121 struct mlx4_qp_context context
;
1122 struct mlx4_rss_context
*rss_context
;
1125 u8 rss_mask
= (MLX4_RSS_IPV4
| MLX4_RSS_TCP_IPV4
| MLX4_RSS_IPV6
|
1132 en_dbg(DRV
, priv
, "Configuring rss steering\n");
1134 flags
= priv
->rx_ring_num
== 1 ? MLX4_RESERVE_A0_QP
: 0;
1135 err
= mlx4_qp_reserve_range(mdev
->dev
, priv
->rx_ring_num
,
1137 &rss_map
->base_qpn
, flags
);
1139 en_err(priv
, "Failed reserving %d qps\n", priv
->rx_ring_num
);
1143 for (i
= 0; i
< priv
->rx_ring_num
; i
++) {
1144 qpn
= rss_map
->base_qpn
+ i
;
1145 err
= mlx4_en_config_rss_qp(priv
, qpn
, priv
->rx_ring
[i
],
1154 if (priv
->rx_ring_num
== 1) {
1155 rss_map
->indir_qp
= &rss_map
->qps
[0];
1156 priv
->base_qpn
= rss_map
->indir_qp
->qpn
;
1157 en_info(priv
, "Optimized Non-RSS steering\n");
1161 rss_map
->indir_qp
= kzalloc(sizeof(*rss_map
->indir_qp
), GFP_KERNEL
);
1162 if (!rss_map
->indir_qp
) {
1167 /* Configure RSS indirection qp */
1168 err
= mlx4_qp_alloc(mdev
->dev
, priv
->base_qpn
, rss_map
->indir_qp
);
1170 en_err(priv
, "Failed to allocate RSS indirection QP\n");
1174 rss_map
->indir_qp
->event
= mlx4_en_sqp_event
;
1175 mlx4_en_fill_qp_context(priv
, 0, 0, 0, 1, priv
->base_qpn
,
1176 priv
->rx_ring
[0]->cqn
, -1, &context
);
1178 if (!priv
->prof
->rss_rings
|| priv
->prof
->rss_rings
> priv
->rx_ring_num
)
1179 rss_rings
= priv
->rx_ring_num
;
1181 rss_rings
= priv
->prof
->rss_rings
;
1183 ptr
= ((void *) &context
) + offsetof(struct mlx4_qp_context
, pri_path
)
1184 + MLX4_RSS_OFFSET_IN_QPC_PRI_PATH
;
1186 rss_context
->base_qpn
= cpu_to_be32(ilog2(rss_rings
) << 24 |
1187 (rss_map
->base_qpn
));
1188 rss_context
->default_qpn
= cpu_to_be32(rss_map
->base_qpn
);
1189 if (priv
->mdev
->profile
.udp_rss
) {
1190 rss_mask
|= MLX4_RSS_UDP_IPV4
| MLX4_RSS_UDP_IPV6
;
1191 rss_context
->base_qpn_udp
= rss_context
->default_qpn
;
1194 if (mdev
->dev
->caps
.tunnel_offload_mode
== MLX4_TUNNEL_OFFLOAD_MODE_VXLAN
) {
1195 en_info(priv
, "Setting RSS context tunnel type to RSS on inner headers\n");
1196 rss_mask
|= MLX4_RSS_BY_INNER_HEADERS
;
1199 rss_context
->flags
= rss_mask
;
1200 rss_context
->hash_fn
= MLX4_RSS_HASH_TOP
;
1201 if (priv
->rss_hash_fn
== ETH_RSS_HASH_XOR
) {
1202 rss_context
->hash_fn
= MLX4_RSS_HASH_XOR
;
1203 } else if (priv
->rss_hash_fn
== ETH_RSS_HASH_TOP
) {
1204 rss_context
->hash_fn
= MLX4_RSS_HASH_TOP
;
1205 memcpy(rss_context
->rss_key
, priv
->rss_key
,
1206 MLX4_EN_RSS_KEY_SIZE
);
1208 en_err(priv
, "Unknown RSS hash function requested\n");
1213 err
= mlx4_qp_to_ready(mdev
->dev
, &priv
->res
.mtt
, &context
,
1214 rss_map
->indir_qp
, &rss_map
->indir_state
);
1221 mlx4_qp_modify(mdev
->dev
, NULL
, rss_map
->indir_state
,
1222 MLX4_QP_STATE_RST
, NULL
, 0, 0, rss_map
->indir_qp
);
1223 mlx4_qp_remove(mdev
->dev
, rss_map
->indir_qp
);
1224 mlx4_qp_free(mdev
->dev
, rss_map
->indir_qp
);
1225 kfree(rss_map
->indir_qp
);
1226 rss_map
->indir_qp
= NULL
;
1228 for (i
= 0; i
< good_qps
; i
++) {
1229 mlx4_qp_modify(mdev
->dev
, NULL
, rss_map
->state
[i
],
1230 MLX4_QP_STATE_RST
, NULL
, 0, 0, &rss_map
->qps
[i
]);
1231 mlx4_qp_remove(mdev
->dev
, &rss_map
->qps
[i
]);
1232 mlx4_qp_free(mdev
->dev
, &rss_map
->qps
[i
]);
1234 mlx4_qp_release_range(mdev
->dev
, rss_map
->base_qpn
, priv
->rx_ring_num
);
1238 void mlx4_en_release_rss_steer(struct mlx4_en_priv
*priv
)
1240 struct mlx4_en_dev
*mdev
= priv
->mdev
;
1241 struct mlx4_en_rss_map
*rss_map
= &priv
->rss_map
;
1244 if (priv
->rx_ring_num
> 1) {
1245 mlx4_qp_modify(mdev
->dev
, NULL
, rss_map
->indir_state
,
1246 MLX4_QP_STATE_RST
, NULL
, 0, 0,
1248 mlx4_qp_remove(mdev
->dev
, rss_map
->indir_qp
);
1249 mlx4_qp_free(mdev
->dev
, rss_map
->indir_qp
);
1250 kfree(rss_map
->indir_qp
);
1251 rss_map
->indir_qp
= NULL
;
1254 for (i
= 0; i
< priv
->rx_ring_num
; i
++) {
1255 mlx4_qp_modify(mdev
->dev
, NULL
, rss_map
->state
[i
],
1256 MLX4_QP_STATE_RST
, NULL
, 0, 0, &rss_map
->qps
[i
]);
1257 mlx4_qp_remove(mdev
->dev
, &rss_map
->qps
[i
]);
1258 mlx4_qp_free(mdev
->dev
, &rss_map
->qps
[i
]);
1260 mlx4_qp_release_range(mdev
->dev
, rss_map
->base_qpn
, priv
->rx_ring_num
);