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IB/mlx4: Implement IB_QP_CREATE_USE_GFP_NOIO
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1 /*
2 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
3 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34 #include <linux/errno.h>
35 #include <linux/mm.h>
36 #include <linux/scatterlist.h>
37 #include <linux/slab.h>
38
39 #include <linux/mlx4/cmd.h>
40
41 #include "mlx4.h"
42 #include "icm.h"
43 #include "fw.h"
44
45 /*
46 * We allocate in as big chunks as we can, up to a maximum of 256 KB
47 * per chunk.
48 */
49 enum {
50 MLX4_ICM_ALLOC_SIZE = 1 << 18,
51 MLX4_TABLE_CHUNK_SIZE = 1 << 18
52 };
53
54 static void mlx4_free_icm_pages(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk)
55 {
56 int i;
57
58 if (chunk->nsg > 0)
59 pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages,
60 PCI_DMA_BIDIRECTIONAL);
61
62 for (i = 0; i < chunk->npages; ++i)
63 __free_pages(sg_page(&chunk->mem[i]),
64 get_order(chunk->mem[i].length));
65 }
66
67 static void mlx4_free_icm_coherent(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk)
68 {
69 int i;
70
71 for (i = 0; i < chunk->npages; ++i)
72 dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length,
73 lowmem_page_address(sg_page(&chunk->mem[i])),
74 sg_dma_address(&chunk->mem[i]));
75 }
76
77 void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm, int coherent)
78 {
79 struct mlx4_icm_chunk *chunk, *tmp;
80
81 if (!icm)
82 return;
83
84 list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) {
85 if (coherent)
86 mlx4_free_icm_coherent(dev, chunk);
87 else
88 mlx4_free_icm_pages(dev, chunk);
89
90 kfree(chunk);
91 }
92
93 kfree(icm);
94 }
95
96 static int mlx4_alloc_icm_pages(struct scatterlist *mem, int order,
97 gfp_t gfp_mask, int node)
98 {
99 struct page *page;
100
101 page = alloc_pages_node(node, gfp_mask, order);
102 if (!page) {
103 page = alloc_pages(gfp_mask, order);
104 if (!page)
105 return -ENOMEM;
106 }
107
108 sg_set_page(mem, page, PAGE_SIZE << order, 0);
109 return 0;
110 }
111
112 static int mlx4_alloc_icm_coherent(struct device *dev, struct scatterlist *mem,
113 int order, gfp_t gfp_mask)
114 {
115 void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order,
116 &sg_dma_address(mem), gfp_mask);
117 if (!buf)
118 return -ENOMEM;
119
120 sg_set_buf(mem, buf, PAGE_SIZE << order);
121 BUG_ON(mem->offset);
122 sg_dma_len(mem) = PAGE_SIZE << order;
123 return 0;
124 }
125
126 struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages,
127 gfp_t gfp_mask, int coherent)
128 {
129 struct mlx4_icm *icm;
130 struct mlx4_icm_chunk *chunk = NULL;
131 int cur_order;
132 int ret;
133
134 /* We use sg_set_buf for coherent allocs, which assumes low memory */
135 BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM));
136
137 icm = kmalloc_node(sizeof(*icm),
138 gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN),
139 dev->numa_node);
140 if (!icm) {
141 icm = kmalloc(sizeof(*icm),
142 gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
143 if (!icm)
144 return NULL;
145 }
146
147 icm->refcount = 0;
148 INIT_LIST_HEAD(&icm->chunk_list);
149
150 cur_order = get_order(MLX4_ICM_ALLOC_SIZE);
151
152 while (npages > 0) {
153 if (!chunk) {
154 chunk = kmalloc_node(sizeof(*chunk),
155 gfp_mask & ~(__GFP_HIGHMEM |
156 __GFP_NOWARN),
157 dev->numa_node);
158 if (!chunk) {
159 chunk = kmalloc(sizeof(*chunk),
160 gfp_mask & ~(__GFP_HIGHMEM |
161 __GFP_NOWARN));
162 if (!chunk)
163 goto fail;
164 }
165
166 sg_init_table(chunk->mem, MLX4_ICM_CHUNK_LEN);
167 chunk->npages = 0;
168 chunk->nsg = 0;
169 list_add_tail(&chunk->list, &icm->chunk_list);
170 }
171
172 while (1 << cur_order > npages)
173 --cur_order;
174
175 if (coherent)
176 ret = mlx4_alloc_icm_coherent(&dev->pdev->dev,
177 &chunk->mem[chunk->npages],
178 cur_order, gfp_mask);
179 else
180 ret = mlx4_alloc_icm_pages(&chunk->mem[chunk->npages],
181 cur_order, gfp_mask,
182 dev->numa_node);
183
184 if (ret) {
185 if (--cur_order < 0)
186 goto fail;
187 else
188 continue;
189 }
190
191 ++chunk->npages;
192
193 if (coherent)
194 ++chunk->nsg;
195 else if (chunk->npages == MLX4_ICM_CHUNK_LEN) {
196 chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
197 chunk->npages,
198 PCI_DMA_BIDIRECTIONAL);
199
200 if (chunk->nsg <= 0)
201 goto fail;
202 }
203
204 if (chunk->npages == MLX4_ICM_CHUNK_LEN)
205 chunk = NULL;
206
207 npages -= 1 << cur_order;
208 }
209
210 if (!coherent && chunk) {
211 chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
212 chunk->npages,
213 PCI_DMA_BIDIRECTIONAL);
214
215 if (chunk->nsg <= 0)
216 goto fail;
217 }
218
219 return icm;
220
221 fail:
222 mlx4_free_icm(dev, icm, coherent);
223 return NULL;
224 }
225
226 static int mlx4_MAP_ICM(struct mlx4_dev *dev, struct mlx4_icm *icm, u64 virt)
227 {
228 return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM, icm, virt);
229 }
230
231 static int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count)
232 {
233 return mlx4_cmd(dev, virt, page_count, 0, MLX4_CMD_UNMAP_ICM,
234 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
235 }
236
237 int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm)
238 {
239 return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM_AUX, icm, -1);
240 }
241
242 int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev)
243 {
244 return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_UNMAP_ICM_AUX,
245 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
246 }
247
248 int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj,
249 int gfp)
250 {
251 u32 i = (obj & (table->num_obj - 1)) /
252 (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
253 int ret = 0;
254
255 mutex_lock(&table->mutex);
256
257 if (table->icm[i]) {
258 ++table->icm[i]->refcount;
259 goto out;
260 }
261
262 table->icm[i] = mlx4_alloc_icm(dev, MLX4_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
263 (table->lowmem ? gfp : GFP_HIGHUSER) |
264 __GFP_NOWARN, table->coherent);
265 if (!table->icm[i]) {
266 ret = -ENOMEM;
267 goto out;
268 }
269
270 if (mlx4_MAP_ICM(dev, table->icm[i], table->virt +
271 (u64) i * MLX4_TABLE_CHUNK_SIZE)) {
272 mlx4_free_icm(dev, table->icm[i], table->coherent);
273 table->icm[i] = NULL;
274 ret = -ENOMEM;
275 goto out;
276 }
277
278 ++table->icm[i]->refcount;
279
280 out:
281 mutex_unlock(&table->mutex);
282 return ret;
283 }
284
285 void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj)
286 {
287 u32 i;
288 u64 offset;
289
290 i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
291
292 mutex_lock(&table->mutex);
293
294 if (--table->icm[i]->refcount == 0) {
295 offset = (u64) i * MLX4_TABLE_CHUNK_SIZE;
296 mlx4_UNMAP_ICM(dev, table->virt + offset,
297 MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
298 mlx4_free_icm(dev, table->icm[i], table->coherent);
299 table->icm[i] = NULL;
300 }
301
302 mutex_unlock(&table->mutex);
303 }
304
305 void *mlx4_table_find(struct mlx4_icm_table *table, u32 obj,
306 dma_addr_t *dma_handle)
307 {
308 int offset, dma_offset, i;
309 u64 idx;
310 struct mlx4_icm_chunk *chunk;
311 struct mlx4_icm *icm;
312 struct page *page = NULL;
313
314 if (!table->lowmem)
315 return NULL;
316
317 mutex_lock(&table->mutex);
318
319 idx = (u64) (obj & (table->num_obj - 1)) * table->obj_size;
320 icm = table->icm[idx / MLX4_TABLE_CHUNK_SIZE];
321 dma_offset = offset = idx % MLX4_TABLE_CHUNK_SIZE;
322
323 if (!icm)
324 goto out;
325
326 list_for_each_entry(chunk, &icm->chunk_list, list) {
327 for (i = 0; i < chunk->npages; ++i) {
328 if (dma_handle && dma_offset >= 0) {
329 if (sg_dma_len(&chunk->mem[i]) > dma_offset)
330 *dma_handle = sg_dma_address(&chunk->mem[i]) +
331 dma_offset;
332 dma_offset -= sg_dma_len(&chunk->mem[i]);
333 }
334 /*
335 * DMA mapping can merge pages but not split them,
336 * so if we found the page, dma_handle has already
337 * been assigned to.
338 */
339 if (chunk->mem[i].length > offset) {
340 page = sg_page(&chunk->mem[i]);
341 goto out;
342 }
343 offset -= chunk->mem[i].length;
344 }
345 }
346
347 out:
348 mutex_unlock(&table->mutex);
349 return page ? lowmem_page_address(page) + offset : NULL;
350 }
351
352 int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
353 u32 start, u32 end)
354 {
355 int inc = MLX4_TABLE_CHUNK_SIZE / table->obj_size;
356 int err;
357 u32 i;
358
359 for (i = start; i <= end; i += inc) {
360 err = mlx4_table_get(dev, table, i, GFP_KERNEL);
361 if (err)
362 goto fail;
363 }
364
365 return 0;
366
367 fail:
368 while (i > start) {
369 i -= inc;
370 mlx4_table_put(dev, table, i);
371 }
372
373 return err;
374 }
375
376 void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
377 u32 start, u32 end)
378 {
379 u32 i;
380
381 for (i = start; i <= end; i += MLX4_TABLE_CHUNK_SIZE / table->obj_size)
382 mlx4_table_put(dev, table, i);
383 }
384
385 int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table,
386 u64 virt, int obj_size, u32 nobj, int reserved,
387 int use_lowmem, int use_coherent)
388 {
389 int obj_per_chunk;
390 int num_icm;
391 unsigned chunk_size;
392 int i;
393 u64 size;
394
395 obj_per_chunk = MLX4_TABLE_CHUNK_SIZE / obj_size;
396 num_icm = (nobj + obj_per_chunk - 1) / obj_per_chunk;
397
398 table->icm = kcalloc(num_icm, sizeof *table->icm, GFP_KERNEL);
399 if (!table->icm)
400 return -ENOMEM;
401 table->virt = virt;
402 table->num_icm = num_icm;
403 table->num_obj = nobj;
404 table->obj_size = obj_size;
405 table->lowmem = use_lowmem;
406 table->coherent = use_coherent;
407 mutex_init(&table->mutex);
408
409 size = (u64) nobj * obj_size;
410 for (i = 0; i * MLX4_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) {
411 chunk_size = MLX4_TABLE_CHUNK_SIZE;
412 if ((i + 1) * MLX4_TABLE_CHUNK_SIZE > size)
413 chunk_size = PAGE_ALIGN(size -
414 i * MLX4_TABLE_CHUNK_SIZE);
415
416 table->icm[i] = mlx4_alloc_icm(dev, chunk_size >> PAGE_SHIFT,
417 (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
418 __GFP_NOWARN, use_coherent);
419 if (!table->icm[i])
420 goto err;
421 if (mlx4_MAP_ICM(dev, table->icm[i], virt + i * MLX4_TABLE_CHUNK_SIZE)) {
422 mlx4_free_icm(dev, table->icm[i], use_coherent);
423 table->icm[i] = NULL;
424 goto err;
425 }
426
427 /*
428 * Add a reference to this ICM chunk so that it never
429 * gets freed (since it contains reserved firmware objects).
430 */
431 ++table->icm[i]->refcount;
432 }
433
434 return 0;
435
436 err:
437 for (i = 0; i < num_icm; ++i)
438 if (table->icm[i]) {
439 mlx4_UNMAP_ICM(dev, virt + i * MLX4_TABLE_CHUNK_SIZE,
440 MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
441 mlx4_free_icm(dev, table->icm[i], use_coherent);
442 }
443
444 kfree(table->icm);
445
446 return -ENOMEM;
447 }
448
449 void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table)
450 {
451 int i;
452
453 for (i = 0; i < table->num_icm; ++i)
454 if (table->icm[i]) {
455 mlx4_UNMAP_ICM(dev, table->virt + i * MLX4_TABLE_CHUNK_SIZE,
456 MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
457 mlx4_free_icm(dev, table->icm[i], table->coherent);
458 }
459
460 kfree(table->icm);
461 }