drivers/net/ethernet/mellanox/mlx4/port.c

   1 /*
   2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <linux/errno.h>
  34 #include <linux/if_ether.h>
  35 #include <linux/if_vlan.h>
  36 #include <linux/export.h>
  37
  38 #include <linux/mlx4/cmd.h>
  39
  40 #include "mlx4.h"
  41
  42 #define MLX4_MAC_VALID          (1ull << 63)
  43
  44 #define MLX4_VLAN_VALID         (1u << 31)
  45 #define MLX4_VLAN_MASK          0xfff
  46
  47 #define MLX4_STATS_TRAFFIC_COUNTERS_MASK        0xfULL
  48 #define MLX4_STATS_TRAFFIC_DROPS_MASK           0xc0ULL
  49 #define MLX4_STATS_ERROR_COUNTERS_MASK          0x1ffc30ULL
  50 #define MLX4_STATS_PORT_COUNTERS_MASK           0x1fe00000ULL
  51
  52 void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table)
  53 {
  54         int i;
  55
  56         mutex_init(&table->mutex);
  57         for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
  58                 table->entries[i] = 0;
  59                 table->refs[i]   = 0;
  60         }
  61         table->max   = 1 << dev->caps.log_num_macs;
  62         table->total = 0;
  63 }
  64
  65 void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table)
  66 {
  67         int i;
  68
  69         mutex_init(&table->mutex);
  70         for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) {
  71                 table->entries[i] = 0;
  72                 table->refs[i]   = 0;
  73         }
  74         table->max   = (1 << dev->caps.log_num_vlans) - MLX4_VLAN_REGULAR;
  75         table->total = 0;
  76 }
  77
  78 static int validate_index(struct mlx4_dev *dev,
  79                           struct mlx4_mac_table *table, int index)
  80 {
  81         int err = 0;
  82
  83         if (index < 0 || index >= table->max || !table->entries[index]) {
  84                 mlx4_warn(dev, "No valid Mac entry for the given index\n");
  85                 err = -EINVAL;
  86         }
  87         return err;
  88 }
  89
  90 static int find_index(struct mlx4_dev *dev,
  91                       struct mlx4_mac_table *table, u64 mac)
  92 {
  93         int i;
  94
  95         for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
  96                 if ((mac & MLX4_MAC_MASK) ==
  97                     (MLX4_MAC_MASK & be64_to_cpu(table->entries[i])))
  98                         return i;
  99         }
 100         /* Mac not found */
 101         return -EINVAL;
 102 }
 103
 104 static int mlx4_set_port_mac_table(struct mlx4_dev *dev, u8 port,
 105                                    __be64 *entries)
 106 {
 107         struct mlx4_cmd_mailbox *mailbox;
 108         u32 in_mod;
 109         int err;
 110
 111         mailbox = mlx4_alloc_cmd_mailbox(dev);
 112         if (IS_ERR(mailbox))
 113                 return PTR_ERR(mailbox);
 114
 115         memcpy(mailbox->buf, entries, MLX4_MAC_TABLE_SIZE);
 116
 117         in_mod = MLX4_SET_PORT_MAC_TABLE << 8 | port;
 118
 119         err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
 120                        MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
 121
 122         mlx4_free_cmd_mailbox(dev, mailbox);
 123         return err;
 124 }
 125
 126 int __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac)
 127 {
 128         struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
 129         struct mlx4_mac_table *table = &info->mac_table;
 130         int i, err = 0;
 131         int free = -1;
 132
 133         mlx4_dbg(dev, "Registering MAC: 0x%llx for port %d\n",
 134                  (unsigned long long) mac, port);
 135
 136         mutex_lock(&table->mutex);
 137         for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
 138                 if (free < 0 && !table->entries[i]) {
 139                         free = i;
 140                         continue;
 141                 }
 142
 143                 if (mac == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) {
 144                         /* MAC already registered, increment ref count */
 145                         err = i;
 146                         ++table->refs[i];
 147                         goto out;
 148                 }
 149         }
 150
 151         mlx4_dbg(dev, "Free MAC index is %d\n", free);
 152
 153         if (table->total == table->max) {
 154                 /* No free mac entries */
 155                 err = -ENOSPC;
 156                 goto out;
 157         }
 158
 159         /* Register new MAC */
 160         table->entries[free] = cpu_to_be64(mac | MLX4_MAC_VALID);
 161
 162         err = mlx4_set_port_mac_table(dev, port, table->entries);
 163         if (unlikely(err)) {
 164                 mlx4_err(dev, "Failed adding MAC: 0x%llx\n",
 165                          (unsigned long long) mac);
 166                 table->entries[free] = 0;
 167                 goto out;
 168         }
 169         table->refs[free] = 1;
 170         err = free;
 171         ++table->total;
 172 out:
 173         mutex_unlock(&table->mutex);
 174         return err;
 175 }
 176 EXPORT_SYMBOL_GPL(__mlx4_register_mac);
 177
 178 int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac)
 179 {
 180         u64 out_param = 0;
 181         int err = -EINVAL;
 182
 183         if (mlx4_is_mfunc(dev)) {
 184                 if (!(dev->flags & MLX4_FLAG_OLD_REG_MAC)) {
 185                         err = mlx4_cmd_imm(dev, mac, &out_param,
 186                                            ((u32) port) << 8 | (u32) RES_MAC,
 187                                            RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES,
 188                                            MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
 189                 }
 190                 if (err && err == -EINVAL && mlx4_is_slave(dev)) {
 191                         /* retry using old REG_MAC format */
 192                         set_param_l(&out_param, port);
 193                         err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC,
 194                                            RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES,
 195                                            MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
 196                         if (!err)
 197                                 dev->flags |= MLX4_FLAG_OLD_REG_MAC;
 198                 }
 199                 if (err)
 200                         return err;
 201
 202                 return get_param_l(&out_param);
 203         }
 204         return __mlx4_register_mac(dev, port, mac);
 205 }
 206 EXPORT_SYMBOL_GPL(mlx4_register_mac);
 207
 208 int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port)
 209 {
 210         return dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] +
 211                         (port - 1) * (1 << dev->caps.log_num_macs);
 212 }
 213 EXPORT_SYMBOL_GPL(mlx4_get_base_qpn);
 214
 215 void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac)
 216 {
 217         struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
 218         struct mlx4_mac_table *table = &info->mac_table;
 219         int index;
 220
 221         mutex_lock(&table->mutex);
 222         index = find_index(dev, table, mac);
 223
 224         if (validate_index(dev, table, index))
 225                 goto out;
 226         if (--table->refs[index]) {
 227                 mlx4_dbg(dev, "Have more references for index %d,"
 228                          "no need to modify mac table\n", index);
 229                 goto out;
 230         }
 231
 232         table->entries[index] = 0;
 233         mlx4_set_port_mac_table(dev, port, table->entries);
 234         --table->total;
 235 out:
 236         mutex_unlock(&table->mutex);
 237 }
 238 EXPORT_SYMBOL_GPL(__mlx4_unregister_mac);
 239
 240 void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac)
 241 {
 242         u64 out_param = 0;
 243
 244         if (mlx4_is_mfunc(dev)) {
 245                 if (!(dev->flags & MLX4_FLAG_OLD_REG_MAC)) {
 246                         (void) mlx4_cmd_imm(dev, mac, &out_param,
 247                                             ((u32) port) << 8 | (u32) RES_MAC,
 248                                             RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES,
 249                                             MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
 250                 } else {
 251                         /* use old unregister mac format */
 252                         set_param_l(&out_param, port);
 253                         (void) mlx4_cmd_imm(dev, mac, &out_param, RES_MAC,
 254                                             RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES,
 255                                             MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
 256                 }
 257                 return;
 258         }
 259         __mlx4_unregister_mac(dev, port, mac);
 260         return;
 261 }
 262 EXPORT_SYMBOL_GPL(mlx4_unregister_mac);
 263
 264 int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac)
 265 {
 266         struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
 267         struct mlx4_mac_table *table = &info->mac_table;
 268         int index = qpn - info->base_qpn;
 269         int err = 0;
 270
 271         /* CX1 doesn't support multi-functions */
 272         mutex_lock(&table->mutex);
 273
 274         err = validate_index(dev, table, index);
 275         if (err)
 276                 goto out;
 277
 278         table->entries[index] = cpu_to_be64(new_mac | MLX4_MAC_VALID);
 279
 280         err = mlx4_set_port_mac_table(dev, port, table->entries);
 281         if (unlikely(err)) {
 282                 mlx4_err(dev, "Failed adding MAC: 0x%llx\n",
 283                          (unsigned long long) new_mac);
 284                 table->entries[index] = 0;
 285         }
 286 out:
 287         mutex_unlock(&table->mutex);
 288         return err;
 289 }
 290 EXPORT_SYMBOL_GPL(__mlx4_replace_mac);
 291
 292 static int mlx4_set_port_vlan_table(struct mlx4_dev *dev, u8 port,
 293                                     __be32 *entries)
 294 {
 295         struct mlx4_cmd_mailbox *mailbox;
 296         u32 in_mod;
 297         int err;
 298
 299         mailbox = mlx4_alloc_cmd_mailbox(dev);
 300         if (IS_ERR(mailbox))
 301                 return PTR_ERR(mailbox);
 302
 303         memcpy(mailbox->buf, entries, MLX4_VLAN_TABLE_SIZE);
 304         in_mod = MLX4_SET_PORT_VLAN_TABLE << 8 | port;
 305         err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
 306                        MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
 307
 308         mlx4_free_cmd_mailbox(dev, mailbox);
 309
 310         return err;
 311 }
 312
 313 int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx)
 314 {
 315         struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
 316         int i;
 317
 318         for (i = 0; i < MLX4_MAX_VLAN_NUM; ++i) {
 319                 if (table->refs[i] &&
 320                     (vid == (MLX4_VLAN_MASK &
 321                               be32_to_cpu(table->entries[i])))) {
 322                         /* VLAN already registered, increase reference count */
 323                         *idx = i;
 324                         return 0;
 325                 }
 326         }
 327
 328         return -ENOENT;
 329 }
 330 EXPORT_SYMBOL_GPL(mlx4_find_cached_vlan);
 331
 332 int __mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan,
 333                                 int *index)
 334 {
 335         struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
 336         int i, err = 0;
 337         int free = -1;
 338
 339         mutex_lock(&table->mutex);
 340
 341         if (table->total == table->max) {
 342                 /* No free vlan entries */
 343                 err = -ENOSPC;
 344                 goto out;
 345         }
 346
 347         for (i = MLX4_VLAN_REGULAR; i < MLX4_MAX_VLAN_NUM; i++) {
 348                 if (free < 0 && (table->refs[i] == 0)) {
 349                         free = i;
 350                         continue;
 351                 }
 352
 353                 if (table->refs[i] &&
 354                     (vlan == (MLX4_VLAN_MASK &
 355                               be32_to_cpu(table->entries[i])))) {
 356                         /* Vlan already registered, increase references count */
 357                         *index = i;
 358                         ++table->refs[i];
 359                         goto out;
 360                 }
 361         }
 362
 363         if (free < 0) {
 364                 err = -ENOMEM;
 365                 goto out;
 366         }
 367
 368         /* Register new VLAN */
 369         table->refs[free] = 1;
 370         table->entries[free] = cpu_to_be32(vlan | MLX4_VLAN_VALID);
 371
 372         err = mlx4_set_port_vlan_table(dev, port, table->entries);
 373         if (unlikely(err)) {
 374                 mlx4_warn(dev, "Failed adding vlan: %u\n", vlan);
 375                 table->refs[free] = 0;
 376                 table->entries[free] = 0;
 377                 goto out;
 378         }
 379
 380         *index = free;
 381         ++table->total;
 382 out:
 383         mutex_unlock(&table->mutex);
 384         return err;
 385 }
 386
 387 int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index)
 388 {
 389         u64 out_param = 0;
 390         int err;
 391
 392         if (vlan > 4095)
 393                 return -EINVAL;
 394
 395         if (mlx4_is_mfunc(dev)) {
 396                 err = mlx4_cmd_imm(dev, vlan, &out_param,
 397                                    ((u32) port) << 8 | (u32) RES_VLAN,
 398                                    RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES,
 399                                    MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
 400                 if (!err)
 401                         *index = get_param_l(&out_param);
 402
 403                 return err;
 404         }
 405         return __mlx4_register_vlan(dev, port, vlan, index);
 406 }
 407 EXPORT_SYMBOL_GPL(mlx4_register_vlan);
 408
 409 void __mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan)
 410 {
 411         struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
 412         int index;
 413
 414         mutex_lock(&table->mutex);
 415         if (mlx4_find_cached_vlan(dev, port, vlan, &index)) {
 416                 mlx4_warn(dev, "vlan 0x%x is not in the vlan table\n", vlan);
 417                 goto out;
 418         }
 419
 420         if (index < MLX4_VLAN_REGULAR) {
 421                 mlx4_warn(dev, "Trying to free special vlan index %d\n", index);
 422                 goto out;
 423         }
 424
 425         if (--table->refs[index]) {
 426                 mlx4_dbg(dev, "Have %d more references for index %d,"
 427                          "no need to modify vlan table\n", table->refs[index],
 428                          index);
 429                 goto out;
 430         }
 431         table->entries[index] = 0;
 432         mlx4_set_port_vlan_table(dev, port, table->entries);
 433         --table->total;
 434 out:
 435         mutex_unlock(&table->mutex);
 436 }
 437
 438 void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan)
 439 {
 440         u64 out_param = 0;
 441
 442         if (mlx4_is_mfunc(dev)) {
 443                 (void) mlx4_cmd_imm(dev, vlan, &out_param,
 444                                     ((u32) port) << 8 | (u32) RES_VLAN,
 445                                     RES_OP_RESERVE_AND_MAP,
 446                                     MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A,
 447                                     MLX4_CMD_WRAPPED);
 448                 return;
 449         }
 450         __mlx4_unregister_vlan(dev, port, vlan);
 451 }
 452 EXPORT_SYMBOL_GPL(mlx4_unregister_vlan);
 453
 454 int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps)
 455 {
 456         struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
 457         u8 *inbuf, *outbuf;
 458         int err;
 459
 460         inmailbox = mlx4_alloc_cmd_mailbox(dev);
 461         if (IS_ERR(inmailbox))
 462                 return PTR_ERR(inmailbox);
 463
 464         outmailbox = mlx4_alloc_cmd_mailbox(dev);
 465         if (IS_ERR(outmailbox)) {
 466                 mlx4_free_cmd_mailbox(dev, inmailbox);
 467                 return PTR_ERR(outmailbox);
 468         }
 469
 470         inbuf = inmailbox->buf;
 471         outbuf = outmailbox->buf;
 472         memset(inbuf, 0, 256);
 473         memset(outbuf, 0, 256);
 474         inbuf[0] = 1;
 475         inbuf[1] = 1;
 476         inbuf[2] = 1;
 477         inbuf[3] = 1;
 478         *(__be16 *) (&inbuf[16]) = cpu_to_be16(0x0015);
 479         *(__be32 *) (&inbuf[20]) = cpu_to_be32(port);
 480
 481         err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3,
 482                            MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
 483                            MLX4_CMD_NATIVE);
 484         if (!err)
 485                 *caps = *(__be32 *) (outbuf + 84);
 486         mlx4_free_cmd_mailbox(dev, inmailbox);
 487         mlx4_free_cmd_mailbox(dev, outmailbox);
 488         return err;
 489 }
 490
 491 static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod,
 492                                 u8 op_mod, struct mlx4_cmd_mailbox *inbox)
 493 {
 494         struct mlx4_priv *priv = mlx4_priv(dev);
 495         struct mlx4_port_info *port_info;
 496         struct mlx4_mfunc_master_ctx *master = &priv->mfunc.master;
 497         struct mlx4_slave_state *slave_st = &master->slave_state[slave];
 498         struct mlx4_set_port_rqp_calc_context *qpn_context;
 499         struct mlx4_set_port_general_context *gen_context;
 500         int reset_qkey_viols;
 501         int port;
 502         int is_eth;
 503         u32 in_modifier;
 504         u32 promisc;
 505         u16 mtu, prev_mtu;
 506         int err;
 507         int i;
 508         __be32 agg_cap_mask;
 509         __be32 slave_cap_mask;
 510         __be32 new_cap_mask;
 511
 512         port = in_mod & 0xff;
 513         in_modifier = in_mod >> 8;
 514         is_eth = op_mod;
 515         port_info = &priv->port[port];
 516
 517         /* Slaves cannot perform SET_PORT operations except changing MTU */
 518         if (is_eth) {
 519                 if (slave != dev->caps.function &&
 520                     in_modifier != MLX4_SET_PORT_GENERAL) {
 521                         mlx4_warn(dev, "denying SET_PORT for slave:%d\n",
 522                                         slave);
 523                         return -EINVAL;
 524                 }
 525                 switch (in_modifier) {
 526                 case MLX4_SET_PORT_RQP_CALC:
 527                         qpn_context = inbox->buf;
 528                         qpn_context->base_qpn =
 529                                 cpu_to_be32(port_info->base_qpn);
 530                         qpn_context->n_mac = 0x7;
 531                         promisc = be32_to_cpu(qpn_context->promisc) >>
 532                                 SET_PORT_PROMISC_SHIFT;
 533                         qpn_context->promisc = cpu_to_be32(
 534                                 promisc << SET_PORT_PROMISC_SHIFT |
 535                                 port_info->base_qpn);
 536                         promisc = be32_to_cpu(qpn_context->mcast) >>
 537                                 SET_PORT_MC_PROMISC_SHIFT;
 538                         qpn_context->mcast = cpu_to_be32(
 539                                 promisc << SET_PORT_MC_PROMISC_SHIFT |
 540                                 port_info->base_qpn);
 541                         break;
 542                 case MLX4_SET_PORT_GENERAL:
 543                         gen_context = inbox->buf;
 544                         /* Mtu is configured as the max MTU among all the
 545                          * the functions on the port. */
 546                         mtu = be16_to_cpu(gen_context->mtu);
 547                         mtu = min_t(int, mtu, dev->caps.eth_mtu_cap[port] +
 548                                     ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN);
 549                         prev_mtu = slave_st->mtu[port];
 550                         slave_st->mtu[port] = mtu;
 551                         if (mtu > master->max_mtu[port])
 552                                 master->max_mtu[port] = mtu;
 553                         if (mtu < prev_mtu && prev_mtu ==
 554                                                 master->max_mtu[port]) {
 555                                 slave_st->mtu[port] = mtu;
 556                                 master->max_mtu[port] = mtu;
 557                                 for (i = 0; i < dev->num_slaves; i++) {
 558                                         master->max_mtu[port] =
 559                                         max(master->max_mtu[port],
 560                                             master->slave_state[i].mtu[port]);
 561                                 }
 562                         }
 563
 564                         gen_context->mtu = cpu_to_be16(master->max_mtu[port]);
 565                         break;
 566                 }
 567                 return mlx4_cmd(dev, inbox->dma, in_mod, op_mod,
 568                                 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
 569                                 MLX4_CMD_NATIVE);
 570         }
 571
 572         /* For IB, we only consider:
 573          * - The capability mask, which is set to the aggregate of all
 574          *   slave function capabilities
 575          * - The QKey violatin counter - reset according to each request.
 576          */
 577
 578         if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
 579                 reset_qkey_viols = (*(u8 *) inbox->buf) & 0x40;
 580                 new_cap_mask = ((__be32 *) inbox->buf)[2];
 581         } else {
 582                 reset_qkey_viols = ((u8 *) inbox->buf)[3] & 0x1;
 583                 new_cap_mask = ((__be32 *) inbox->buf)[1];
 584         }
 585
 586         /* slave may not set the IS_SM capability for the port */
 587         if (slave != mlx4_master_func_num(dev) &&
 588             (be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_IS_SM))
 589                 return -EINVAL;
 590
 591         /* No DEV_MGMT in multifunc mode */
 592         if (mlx4_is_mfunc(dev) &&
 593             (be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_DEV_MGMT_SUP))
 594                 return -EINVAL;
 595
 596         agg_cap_mask = 0;
 597         slave_cap_mask =
 598                 priv->mfunc.master.slave_state[slave].ib_cap_mask[port];
 599         priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = new_cap_mask;
 600         for (i = 0; i < dev->num_slaves; i++)
 601                 agg_cap_mask |=
 602                         priv->mfunc.master.slave_state[i].ib_cap_mask[port];
 603
 604         /* only clear mailbox for guests.  Master may be setting
 605         * MTU or PKEY table size
 606         */
 607         if (slave != dev->caps.function)
 608                 memset(inbox->buf, 0, 256);
 609         if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
 610                 *(u8 *) inbox->buf         |= !!reset_qkey_viols << 6;
 611                 ((__be32 *) inbox->buf)[2] = agg_cap_mask;
 612         } else {
 613                 ((u8 *) inbox->buf)[3]     |= !!reset_qkey_viols;
 614                 ((__be32 *) inbox->buf)[1] = agg_cap_mask;
 615         }
 616
 617         err = mlx4_cmd(dev, inbox->dma, port, is_eth, MLX4_CMD_SET_PORT,
 618                        MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
 619         if (err)
 620                 priv->mfunc.master.slave_state[slave].ib_cap_mask[port] =
 621                         slave_cap_mask;
 622         return err;
 623 }
 624
 625 int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave,
 626                           struct mlx4_vhcr *vhcr,
 627                           struct mlx4_cmd_mailbox *inbox,
 628                           struct mlx4_cmd_mailbox *outbox,
 629                           struct mlx4_cmd_info *cmd)
 630 {
 631         return mlx4_common_set_port(dev, slave, vhcr->in_modifier,
 632                                     vhcr->op_modifier, inbox);
 633 }
 634
 635 /* bit locations for set port command with zero op modifier */
 636 enum {
 637         MLX4_SET_PORT_VL_CAP     = 4, /* bits 7:4 */
 638         MLX4_SET_PORT_MTU_CAP    = 12, /* bits 15:12 */
 639         MLX4_CHANGE_PORT_PKEY_TBL_SZ = 20,
 640         MLX4_CHANGE_PORT_VL_CAP  = 21,
 641         MLX4_CHANGE_PORT_MTU_CAP = 22,
 642 };
 643
 644 int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz)
 645 {
 646         struct mlx4_cmd_mailbox *mailbox;
 647         int err, vl_cap, pkey_tbl_flag = 0;
 648
 649         if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH)
 650                 return 0;
 651
 652         mailbox = mlx4_alloc_cmd_mailbox(dev);
 653         if (IS_ERR(mailbox))
 654                 return PTR_ERR(mailbox);
 655
 656         memset(mailbox->buf, 0, 256);
 657
 658         ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port];
 659
 660         if (pkey_tbl_sz >= 0 && mlx4_is_master(dev)) {
 661                 pkey_tbl_flag = 1;
 662                 ((__be16 *) mailbox->buf)[20] = cpu_to_be16(pkey_tbl_sz);
 663         }
 664
 665         /* IB VL CAP enum isn't used by the firmware, just numerical values */
 666         for (vl_cap = 8; vl_cap >= 1; vl_cap >>= 1) {
 667                 ((__be32 *) mailbox->buf)[0] = cpu_to_be32(
 668                         (1 << MLX4_CHANGE_PORT_MTU_CAP) |
 669                         (1 << MLX4_CHANGE_PORT_VL_CAP)  |
 670                         (pkey_tbl_flag << MLX4_CHANGE_PORT_PKEY_TBL_SZ) |
 671                         (dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) |
 672                         (vl_cap << MLX4_SET_PORT_VL_CAP));
 673                 err = mlx4_cmd(dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,
 674                                 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
 675                 if (err != -ENOMEM)
 676                         break;
 677         }
 678
 679         mlx4_free_cmd_mailbox(dev, mailbox);
 680         return err;
 681 }
 682
 683 int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
 684                           u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx)
 685 {
 686         struct mlx4_cmd_mailbox *mailbox;
 687         struct mlx4_set_port_general_context *context;
 688         int err;
 689         u32 in_mod;
 690
 691         mailbox = mlx4_alloc_cmd_mailbox(dev);
 692         if (IS_ERR(mailbox))
 693                 return PTR_ERR(mailbox);
 694         context = mailbox->buf;
 695         memset(context, 0, sizeof *context);
 696
 697         context->flags = SET_PORT_GEN_ALL_VALID;
 698         context->mtu = cpu_to_be16(mtu);
 699         context->pptx = (pptx * (!pfctx)) << 7;
 700         context->pfctx = pfctx;
 701         context->pprx = (pprx * (!pfcrx)) << 7;
 702         context->pfcrx = pfcrx;
 703
 704         in_mod = MLX4_SET_PORT_GENERAL << 8 | port;
 705         err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
 706                        MLX4_CMD_TIME_CLASS_B,  MLX4_CMD_WRAPPED);
 707
 708         mlx4_free_cmd_mailbox(dev, mailbox);
 709         return err;
 710 }
 711 EXPORT_SYMBOL(mlx4_SET_PORT_general);
 712
 713 int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
 714                            u8 promisc)
 715 {
 716         struct mlx4_cmd_mailbox *mailbox;
 717         struct mlx4_set_port_rqp_calc_context *context;
 718         int err;
 719         u32 in_mod;
 720         u32 m_promisc = (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) ?
 721                 MCAST_DIRECT : MCAST_DEFAULT;
 722
 723         if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
 724                 return 0;
 725
 726         mailbox = mlx4_alloc_cmd_mailbox(dev);
 727         if (IS_ERR(mailbox))
 728                 return PTR_ERR(mailbox);
 729         context = mailbox->buf;
 730         memset(context, 0, sizeof *context);
 731
 732         context->base_qpn = cpu_to_be32(base_qpn);
 733         context->n_mac = dev->caps.log_num_macs;
 734         context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT |
 735                                        base_qpn);
 736         context->mcast = cpu_to_be32(m_promisc << SET_PORT_MC_PROMISC_SHIFT |
 737                                      base_qpn);
 738         context->intra_no_vlan = 0;
 739         context->no_vlan = MLX4_NO_VLAN_IDX;
 740         context->intra_vlan_miss = 0;
 741         context->vlan_miss = MLX4_VLAN_MISS_IDX;
 742
 743         in_mod = MLX4_SET_PORT_RQP_CALC << 8 | port;
 744         err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
 745                        MLX4_CMD_TIME_CLASS_B,  MLX4_CMD_WRAPPED);
 746
 747         mlx4_free_cmd_mailbox(dev, mailbox);
 748         return err;
 749 }
 750 EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc);
 751
 752 int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc)
 753 {
 754         struct mlx4_cmd_mailbox *mailbox;
 755         struct mlx4_set_port_prio2tc_context *context;
 756         int err;
 757         u32 in_mod;
 758         int i;
 759
 760         mailbox = mlx4_alloc_cmd_mailbox(dev);
 761         if (IS_ERR(mailbox))
 762                 return PTR_ERR(mailbox);
 763         context = mailbox->buf;
 764         memset(context, 0, sizeof *context);
 765
 766         for (i = 0; i < MLX4_NUM_UP; i += 2)
 767                 context->prio2tc[i >> 1] = prio2tc[i] << 4 | prio2tc[i + 1];
 768
 769         in_mod = MLX4_SET_PORT_PRIO2TC << 8 | port;
 770         err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
 771                        MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
 772
 773         mlx4_free_cmd_mailbox(dev, mailbox);
 774         return err;
 775 }
 776 EXPORT_SYMBOL(mlx4_SET_PORT_PRIO2TC);
 777
 778 int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw,
 779                 u8 *pg, u16 *ratelimit)
 780 {
 781         struct mlx4_cmd_mailbox *mailbox;
 782         struct mlx4_set_port_scheduler_context *context;
 783         int err;
 784         u32 in_mod;
 785         int i;
 786
 787         mailbox = mlx4_alloc_cmd_mailbox(dev);
 788         if (IS_ERR(mailbox))
 789                 return PTR_ERR(mailbox);
 790         context = mailbox->buf;
 791         memset(context, 0, sizeof *context);
 792
 793         for (i = 0; i < MLX4_NUM_TC; i++) {
 794                 struct mlx4_port_scheduler_tc_cfg_be *tc = &context->tc[i];
 795                 u16 r = ratelimit && ratelimit[i] ? ratelimit[i] :
 796                         MLX4_RATELIMIT_DEFAULT;
 797
 798                 tc->pg = htons(pg[i]);
 799                 tc->bw_precentage = htons(tc_tx_bw[i]);
 800
 801                 tc->max_bw_units = htons(MLX4_RATELIMIT_UNITS);
 802                 tc->max_bw_value = htons(r);
 803         }
 804
 805         in_mod = MLX4_SET_PORT_SCHEDULER << 8 | port;
 806         err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
 807                        MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
 808
 809         mlx4_free_cmd_mailbox(dev, mailbox);
 810         return err;
 811 }
 812 EXPORT_SYMBOL(mlx4_SET_PORT_SCHEDULER);
 813
 814 int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave,
 815                                 struct mlx4_vhcr *vhcr,
 816                                 struct mlx4_cmd_mailbox *inbox,
 817                                 struct mlx4_cmd_mailbox *outbox,
 818                                 struct mlx4_cmd_info *cmd)
 819 {
 820         int err = 0;
 821
 822         return err;
 823 }
 824
 825 int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port,
 826                         u64 mac, u64 clear, u8 mode)
 827 {
 828         return mlx4_cmd(dev, (mac | (clear << 63)), port, mode,
 829                         MLX4_CMD_SET_MCAST_FLTR, MLX4_CMD_TIME_CLASS_B,
 830                         MLX4_CMD_WRAPPED);
 831 }
 832 EXPORT_SYMBOL(mlx4_SET_MCAST_FLTR);
 833
 834 int mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave,
 835                                struct mlx4_vhcr *vhcr,
 836                                struct mlx4_cmd_mailbox *inbox,
 837                                struct mlx4_cmd_mailbox *outbox,
 838                                struct mlx4_cmd_info *cmd)
 839 {
 840         int err = 0;
 841
 842         return err;
 843 }
 844
 845 int mlx4_common_dump_eth_stats(struct mlx4_dev *dev, int slave,
 846                                u32 in_mod, struct mlx4_cmd_mailbox *outbox)
 847 {
 848         return mlx4_cmd_box(dev, 0, outbox->dma, in_mod, 0,
 849                             MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B,
 850                             MLX4_CMD_NATIVE);
 851 }
 852
 853 int mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave,
 854                                 struct mlx4_vhcr *vhcr,
 855                                 struct mlx4_cmd_mailbox *inbox,
 856                                 struct mlx4_cmd_mailbox *outbox,
 857                                 struct mlx4_cmd_info *cmd)
 858 {
 859         if (slave != dev->caps.function)
 860                 return 0;
 861         return mlx4_common_dump_eth_stats(dev, slave,
 862                                           vhcr->in_modifier, outbox);
 863 }
 864
 865 void mlx4_set_stats_bitmap(struct mlx4_dev *dev, u64 *stats_bitmap)
 866 {
 867         if (!mlx4_is_mfunc(dev)) {
 868                 *stats_bitmap = 0;
 869                 return;
 870         }
 871
 872         *stats_bitmap = (MLX4_STATS_TRAFFIC_COUNTERS_MASK |
 873                          MLX4_STATS_TRAFFIC_DROPS_MASK |
 874                          MLX4_STATS_PORT_COUNTERS_MASK);
 875
 876         if (mlx4_is_master(dev))
 877                 *stats_bitmap |= MLX4_STATS_ERROR_COUNTERS_MASK;
 878 }
 879 EXPORT_SYMBOL(mlx4_set_stats_bitmap);