drivers/net/ethernet/mellanox/mlx5/core/en_common.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include "en.h"
  34
  35 /* mlx5e global resources should be placed in this file.
  36  * Global resources are common to all the netdevices crated on the same nic.
  37  */
  38
  39 int mlx5e_create_tir(struct mlx5_core_dev *mdev,
  40                      struct mlx5e_tir *tir, u32 *in, int inlen)
  41 {
  42         int err;
  43
  44         err = mlx5_core_create_tir(mdev, in, inlen, &tir->tirn);
  45         if (err)
  46                 return err;
  47
  48         list_add(&tir->list, &mdev->mlx5e_res.td.tirs_list);
  49
  50         return 0;
  51 }
  52
  53 void mlx5e_destroy_tir(struct mlx5_core_dev *mdev,
  54                        struct mlx5e_tir *tir)
  55 {
  56         mlx5_core_destroy_tir(mdev, tir->tirn);
  57         list_del(&tir->list);
  58 }
  59
  60 static int mlx5e_create_mkey(struct mlx5_core_dev *mdev, u32 pdn,
  61                              struct mlx5_core_mkey *mkey)
  62 {
  63         int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
  64         void *mkc;
  65         u32 *in;
  66         int err;
  67
  68         in = kvzalloc(inlen, GFP_KERNEL);
  69         if (!in)
  70                 return -ENOMEM;
  71
  72         mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
  73         MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_PA);
  74         MLX5_SET(mkc, mkc, lw, 1);
  75         MLX5_SET(mkc, mkc, lr, 1);
  76
  77         MLX5_SET(mkc, mkc, pd, pdn);
  78         MLX5_SET(mkc, mkc, length64, 1);
  79         MLX5_SET(mkc, mkc, qpn, 0xffffff);
  80
  81         err = mlx5_core_create_mkey(mdev, mkey, in, inlen);
  82
  83         kvfree(in);
  84         return err;
  85 }
  86
  87 int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev)
  88 {
  89         struct mlx5e_resources *res = &mdev->mlx5e_res;
  90         int err;
  91
  92         err = mlx5_core_alloc_pd(mdev, &res->pdn);
  93         if (err) {
  94                 mlx5_core_err(mdev, "alloc pd failed, %d\n", err);
  95                 return err;
  96         }
  97
  98         err = mlx5_core_alloc_transport_domain(mdev, &res->td.tdn);
  99         if (err) {
 100                 mlx5_core_err(mdev, "alloc td failed, %d\n", err);
 101                 goto err_dealloc_pd;
 102         }
 103
 104         err = mlx5e_create_mkey(mdev, res->pdn, &res->mkey);
 105         if (err) {
 106                 mlx5_core_err(mdev, "create mkey failed, %d\n", err);
 107                 goto err_dealloc_transport_domain;
 108         }
 109
 110         err = mlx5_alloc_bfreg(mdev, &res->bfreg, false, false);
 111         if (err) {
 112                 mlx5_core_err(mdev, "alloc bfreg failed, %d\n", err);
 113                 goto err_destroy_mkey;
 114         }
 115
 116         INIT_LIST_HEAD(&mdev->mlx5e_res.td.tirs_list);
 117
 118         return 0;
 119
 120 err_destroy_mkey:
 121         mlx5_core_destroy_mkey(mdev, &res->mkey);
 122 err_dealloc_transport_domain:
 123         mlx5_core_dealloc_transport_domain(mdev, res->td.tdn);
 124 err_dealloc_pd:
 125         mlx5_core_dealloc_pd(mdev, res->pdn);
 126         return err;
 127 }
 128
 129 void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev)
 130 {
 131         struct mlx5e_resources *res = &mdev->mlx5e_res;
 132
 133         mlx5_free_bfreg(mdev, &res->bfreg);
 134         mlx5_core_destroy_mkey(mdev, &res->mkey);
 135         mlx5_core_dealloc_transport_domain(mdev, res->td.tdn);
 136         mlx5_core_dealloc_pd(mdev, res->pdn);
 137         memset(res, 0, sizeof(*res));
 138 }
 139
 140 int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb)
 141 {
 142         struct mlx5_core_dev *mdev = priv->mdev;
 143         struct mlx5e_tir *tir;
 144         int err  = -ENOMEM;
 145         u32 tirn = 0;
 146         int inlen;
 147         void *in;
 148
 149         inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
 150         in = kvzalloc(inlen, GFP_KERNEL);
 151         if (!in)
 152                 goto out;
 153
 154         if (enable_uc_lb)
 155                 MLX5_SET(modify_tir_in, in, ctx.self_lb_block,
 156                          MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_);
 157
 158         MLX5_SET(modify_tir_in, in, bitmask.self_lb_en, 1);
 159
 160         list_for_each_entry(tir, &mdev->mlx5e_res.td.tirs_list, list) {
 161                 tirn = tir->tirn;
 162                 err = mlx5_core_modify_tir(mdev, tirn, in, inlen);
 163                 if (err)
 164                         goto out;
 165         }
 166
 167 out:
 168         kvfree(in);
 169         if (err)
 170                 netdev_err(priv->netdev, "refresh tir(0x%x) failed, %d\n", tirn, err);
 171
 172         return err;
 173 }
 174
 175 u8 mlx5e_params_calculate_tx_min_inline(struct mlx5_core_dev *mdev)
 176 {
 177         u8 min_inline_mode;
 178
 179         mlx5_query_min_inline(mdev, &min_inline_mode);
 180         if (min_inline_mode == MLX5_INLINE_MODE_NONE &&
 181             !MLX5_CAP_ETH(mdev, wqe_vlan_insert))
 182                 min_inline_mode = MLX5_INLINE_MODE_L2;
 183
 184         return min_inline_mode;
 185 }