2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include "en/xsk/umem.h"
36 #include "lib/clock.h"
38 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv
*priv
,
39 struct ethtool_drvinfo
*drvinfo
)
41 struct mlx5_core_dev
*mdev
= priv
->mdev
;
43 strlcpy(drvinfo
->driver
, DRIVER_NAME
, sizeof(drvinfo
->driver
));
44 strlcpy(drvinfo
->version
, DRIVER_VERSION
,
45 sizeof(drvinfo
->version
));
46 snprintf(drvinfo
->fw_version
, sizeof(drvinfo
->fw_version
),
48 fw_rev_maj(mdev
), fw_rev_min(mdev
), fw_rev_sub(mdev
),
50 strlcpy(drvinfo
->bus_info
, dev_name(mdev
->device
),
51 sizeof(drvinfo
->bus_info
));
54 static void mlx5e_get_drvinfo(struct net_device
*dev
,
55 struct ethtool_drvinfo
*drvinfo
)
57 struct mlx5e_priv
*priv
= netdev_priv(dev
);
59 mlx5e_ethtool_get_drvinfo(priv
, drvinfo
);
62 struct ptys2ethtool_config
{
63 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported
);
64 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised
);
68 struct ptys2ethtool_config ptys2legacy_ethtool_table
[MLX5E_LINK_MODES_NUMBER
];
70 struct ptys2ethtool_config ptys2ext_ethtool_table
[MLX5E_EXT_LINK_MODES_NUMBER
];
72 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, table, ...) \
74 struct ptys2ethtool_config *cfg; \
75 const unsigned int modes[] = { __VA_ARGS__ }; \
76 unsigned int i, bit, idx; \
77 cfg = &ptys2##table##_ethtool_table[reg_]; \
78 bitmap_zero(cfg->supported, \
79 __ETHTOOL_LINK_MODE_MASK_NBITS); \
80 bitmap_zero(cfg->advertised, \
81 __ETHTOOL_LINK_MODE_MASK_NBITS); \
82 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) { \
83 bit = modes[i] % 64; \
84 idx = modes[i] / 64; \
85 __set_bit(bit, &cfg->supported[idx]); \
86 __set_bit(bit, &cfg->advertised[idx]); \
90 void mlx5e_build_ptys2ethtool_map(void)
92 memset(ptys2legacy_ethtool_table
, 0, sizeof(ptys2legacy_ethtool_table
));
93 memset(ptys2ext_ethtool_table
, 0, sizeof(ptys2ext_ethtool_table
));
94 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII
, legacy
,
95 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT
);
96 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX
, legacy
,
97 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT
);
98 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4
, legacy
,
99 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT
);
100 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4
, legacy
,
101 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT
);
102 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR
, legacy
,
103 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT
);
104 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2
, legacy
,
105 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT
);
106 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4
, legacy
,
107 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT
);
108 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4
, legacy
,
109 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT
);
110 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4
, legacy
,
111 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT
);
112 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR
, legacy
,
113 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT
);
114 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR
, legacy
,
115 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT
);
116 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER
, legacy
,
117 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT
);
118 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4
, legacy
,
119 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT
);
120 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4
, legacy
,
121 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT
);
122 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2
, legacy
,
123 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT
);
124 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4
, legacy
,
125 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT
);
126 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4
, legacy
,
127 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT
);
128 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4
, legacy
,
129 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT
);
130 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4
, legacy
,
131 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT
);
132 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T
, legacy
,
133 ETHTOOL_LINK_MODE_10000baseT_Full_BIT
);
134 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR
, legacy
,
135 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT
);
136 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR
, legacy
,
137 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT
);
138 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR
, legacy
,
139 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT
);
140 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2
, legacy
,
141 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT
);
142 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2
, legacy
,
143 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT
);
144 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_SGMII_100M
, ext
,
145 ETHTOOL_LINK_MODE_100baseT_Full_BIT
);
146 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_X_SGMII
, ext
,
147 ETHTOOL_LINK_MODE_1000baseT_Full_BIT
,
148 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT
,
149 ETHTOOL_LINK_MODE_1000baseX_Full_BIT
);
150 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_5GBASE_R
, ext
,
151 ETHTOOL_LINK_MODE_5000baseT_Full_BIT
);
152 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_XFI_XAUI_1
, ext
,
153 ETHTOOL_LINK_MODE_10000baseT_Full_BIT
,
154 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT
,
155 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT
,
156 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT
,
157 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT
,
158 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT
,
159 ETHTOOL_LINK_MODE_10000baseER_Full_BIT
);
160 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_XLAUI_4_XLPPI_4
, ext
,
161 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT
,
162 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT
,
163 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT
,
164 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT
);
165 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GAUI_1_25GBASE_CR_KR
, ext
,
166 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT
,
167 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT
,
168 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT
);
169 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2
,
171 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT
,
172 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT
,
173 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT
);
174 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR
, ext
,
175 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT
,
176 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT
,
177 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT
,
178 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT
,
179 ETHTOOL_LINK_MODE_50000baseDR_Full_BIT
);
180 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_CAUI_4_100GBASE_CR4_KR4
, ext
,
181 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT
,
182 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT
,
183 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT
,
184 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT
);
185 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_2_100GBASE_CR2_KR2
, ext
,
186 ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT
,
187 ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT
,
188 ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT
,
189 ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT
,
190 ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT
);
191 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_4_200GBASE_CR4_KR4
, ext
,
192 ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT
,
193 ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT
,
194 ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT
,
195 ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT
,
196 ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT
);
199 static void mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev
*mdev
,
200 struct ptys2ethtool_config
**arr
,
203 bool ext
= MLX5_CAP_PCAM_FEATURE(mdev
, ptys_extended_ethernet
);
205 *arr
= ext
? ptys2ext_ethtool_table
: ptys2legacy_ethtool_table
;
206 *size
= ext
? ARRAY_SIZE(ptys2ext_ethtool_table
) :
207 ARRAY_SIZE(ptys2legacy_ethtool_table
);
210 typedef int (*mlx5e_pflag_handler
)(struct net_device
*netdev
, bool enable
);
213 char name
[ETH_GSTRING_LEN
];
214 mlx5e_pflag_handler handler
;
217 static const struct pflag_desc mlx5e_priv_flags
[MLX5E_NUM_PFLAGS
];
219 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv
*priv
, int sset
)
221 int i
, num_stats
= 0;
225 for (i
= 0; i
< mlx5e_num_stats_grps
; i
++)
226 num_stats
+= mlx5e_stats_grps
[i
].get_num_stats(priv
);
228 case ETH_SS_PRIV_FLAGS
:
229 return MLX5E_NUM_PFLAGS
;
231 return mlx5e_self_test_num(priv
);
238 static int mlx5e_get_sset_count(struct net_device
*dev
, int sset
)
240 struct mlx5e_priv
*priv
= netdev_priv(dev
);
242 return mlx5e_ethtool_get_sset_count(priv
, sset
);
245 static void mlx5e_fill_stats_strings(struct mlx5e_priv
*priv
, u8
*data
)
249 for (i
= 0; i
< mlx5e_num_stats_grps
; i
++)
250 idx
= mlx5e_stats_grps
[i
].fill_strings(priv
, data
, idx
);
253 void mlx5e_ethtool_get_strings(struct mlx5e_priv
*priv
, u32 stringset
, u8
*data
)
258 case ETH_SS_PRIV_FLAGS
:
259 for (i
= 0; i
< MLX5E_NUM_PFLAGS
; i
++)
260 strcpy(data
+ i
* ETH_GSTRING_LEN
,
261 mlx5e_priv_flags
[i
].name
);
265 for (i
= 0; i
< mlx5e_self_test_num(priv
); i
++)
266 strcpy(data
+ i
* ETH_GSTRING_LEN
,
267 mlx5e_self_tests
[i
]);
271 mlx5e_fill_stats_strings(priv
, data
);
276 static void mlx5e_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
278 struct mlx5e_priv
*priv
= netdev_priv(dev
);
280 mlx5e_ethtool_get_strings(priv
, stringset
, data
);
283 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv
*priv
,
284 struct ethtool_stats
*stats
, u64
*data
)
288 mutex_lock(&priv
->state_lock
);
289 mlx5e_update_stats(priv
);
290 mutex_unlock(&priv
->state_lock
);
292 for (i
= 0; i
< mlx5e_num_stats_grps
; i
++)
293 idx
= mlx5e_stats_grps
[i
].fill_stats(priv
, data
, idx
);
296 static void mlx5e_get_ethtool_stats(struct net_device
*dev
,
297 struct ethtool_stats
*stats
,
300 struct mlx5e_priv
*priv
= netdev_priv(dev
);
302 mlx5e_ethtool_get_ethtool_stats(priv
, stats
, data
);
305 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv
*priv
,
306 struct ethtool_ringparam
*param
)
308 param
->rx_max_pending
= 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE
;
309 param
->tx_max_pending
= 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE
;
310 param
->rx_pending
= 1 << priv
->channels
.params
.log_rq_mtu_frames
;
311 param
->tx_pending
= 1 << priv
->channels
.params
.log_sq_size
;
314 static void mlx5e_get_ringparam(struct net_device
*dev
,
315 struct ethtool_ringparam
*param
)
317 struct mlx5e_priv
*priv
= netdev_priv(dev
);
319 mlx5e_ethtool_get_ringparam(priv
, param
);
322 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv
*priv
,
323 struct ethtool_ringparam
*param
)
325 struct mlx5e_channels new_channels
= {};
330 if (param
->rx_jumbo_pending
) {
331 netdev_info(priv
->netdev
, "%s: rx_jumbo_pending not supported\n",
335 if (param
->rx_mini_pending
) {
336 netdev_info(priv
->netdev
, "%s: rx_mini_pending not supported\n",
341 if (param
->rx_pending
< (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE
)) {
342 netdev_info(priv
->netdev
, "%s: rx_pending (%d) < min (%d)\n",
343 __func__
, param
->rx_pending
,
344 1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE
);
348 if (param
->tx_pending
< (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE
)) {
349 netdev_info(priv
->netdev
, "%s: tx_pending (%d) < min (%d)\n",
350 __func__
, param
->tx_pending
,
351 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE
);
355 log_rq_size
= order_base_2(param
->rx_pending
);
356 log_sq_size
= order_base_2(param
->tx_pending
);
358 if (log_rq_size
== priv
->channels
.params
.log_rq_mtu_frames
&&
359 log_sq_size
== priv
->channels
.params
.log_sq_size
)
362 mutex_lock(&priv
->state_lock
);
364 new_channels
.params
= priv
->channels
.params
;
365 new_channels
.params
.log_rq_mtu_frames
= log_rq_size
;
366 new_channels
.params
.log_sq_size
= log_sq_size
;
368 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
369 priv
->channels
.params
= new_channels
.params
;
373 err
= mlx5e_safe_switch_channels(priv
, &new_channels
, NULL
);
376 mutex_unlock(&priv
->state_lock
);
381 static int mlx5e_set_ringparam(struct net_device
*dev
,
382 struct ethtool_ringparam
*param
)
384 struct mlx5e_priv
*priv
= netdev_priv(dev
);
386 return mlx5e_ethtool_set_ringparam(priv
, param
);
389 void mlx5e_ethtool_get_channels(struct mlx5e_priv
*priv
,
390 struct ethtool_channels
*ch
)
392 mutex_lock(&priv
->state_lock
);
394 ch
->max_combined
= priv
->max_nch
;
395 ch
->combined_count
= priv
->channels
.params
.num_channels
;
396 if (priv
->xsk
.refcnt
) {
397 /* The upper half are XSK queues. */
398 ch
->max_combined
*= 2;
399 ch
->combined_count
*= 2;
402 mutex_unlock(&priv
->state_lock
);
405 static void mlx5e_get_channels(struct net_device
*dev
,
406 struct ethtool_channels
*ch
)
408 struct mlx5e_priv
*priv
= netdev_priv(dev
);
410 mlx5e_ethtool_get_channels(priv
, ch
);
413 int mlx5e_ethtool_set_channels(struct mlx5e_priv
*priv
,
414 struct ethtool_channels
*ch
)
416 struct mlx5e_params
*cur_params
= &priv
->channels
.params
;
417 unsigned int count
= ch
->combined_count
;
418 struct mlx5e_channels new_channels
= {};
423 netdev_info(priv
->netdev
, "%s: combined_count=0 not supported\n",
428 if (cur_params
->num_channels
== count
)
431 mutex_lock(&priv
->state_lock
);
433 /* Don't allow changing the number of channels if there is an active
434 * XSK, because the numeration of the XSK and regular RQs will change.
436 if (priv
->xsk
.refcnt
) {
438 netdev_err(priv
->netdev
, "%s: AF_XDP is active, cannot change the number of channels\n",
443 new_channels
.params
= priv
->channels
.params
;
444 new_channels
.params
.num_channels
= count
;
446 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
447 *cur_params
= new_channels
.params
;
448 if (!netif_is_rxfh_configured(priv
->netdev
))
449 mlx5e_build_default_indir_rqt(priv
->rss_params
.indirection_rqt
,
450 MLX5E_INDIR_RQT_SIZE
, count
);
454 arfs_enabled
= priv
->netdev
->features
& NETIF_F_NTUPLE
;
456 mlx5e_arfs_disable(priv
);
458 if (!netif_is_rxfh_configured(priv
->netdev
))
459 mlx5e_build_default_indir_rqt(priv
->rss_params
.indirection_rqt
,
460 MLX5E_INDIR_RQT_SIZE
, count
);
462 /* Switch to new channels, set new parameters and close old ones */
463 err
= mlx5e_safe_switch_channels(priv
, &new_channels
, NULL
);
466 int err2
= mlx5e_arfs_enable(priv
);
469 netdev_err(priv
->netdev
, "%s: mlx5e_arfs_enable failed: %d\n",
474 mutex_unlock(&priv
->state_lock
);
479 static int mlx5e_set_channels(struct net_device
*dev
,
480 struct ethtool_channels
*ch
)
482 struct mlx5e_priv
*priv
= netdev_priv(dev
);
484 return mlx5e_ethtool_set_channels(priv
, ch
);
487 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv
*priv
,
488 struct ethtool_coalesce
*coal
)
490 struct dim_cq_moder
*rx_moder
, *tx_moder
;
492 if (!MLX5_CAP_GEN(priv
->mdev
, cq_moderation
))
495 rx_moder
= &priv
->channels
.params
.rx_cq_moderation
;
496 coal
->rx_coalesce_usecs
= rx_moder
->usec
;
497 coal
->rx_max_coalesced_frames
= rx_moder
->pkts
;
498 coal
->use_adaptive_rx_coalesce
= priv
->channels
.params
.rx_dim_enabled
;
500 tx_moder
= &priv
->channels
.params
.tx_cq_moderation
;
501 coal
->tx_coalesce_usecs
= tx_moder
->usec
;
502 coal
->tx_max_coalesced_frames
= tx_moder
->pkts
;
503 coal
->use_adaptive_tx_coalesce
= priv
->channels
.params
.tx_dim_enabled
;
508 static int mlx5e_get_coalesce(struct net_device
*netdev
,
509 struct ethtool_coalesce
*coal
)
511 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
513 return mlx5e_ethtool_get_coalesce(priv
, coal
);
516 #define MLX5E_MAX_COAL_TIME MLX5_MAX_CQ_PERIOD
517 #define MLX5E_MAX_COAL_FRAMES MLX5_MAX_CQ_COUNT
520 mlx5e_set_priv_channels_coalesce(struct mlx5e_priv
*priv
, struct ethtool_coalesce
*coal
)
522 struct mlx5_core_dev
*mdev
= priv
->mdev
;
526 for (i
= 0; i
< priv
->channels
.num
; ++i
) {
527 struct mlx5e_channel
*c
= priv
->channels
.c
[i
];
529 for (tc
= 0; tc
< c
->num_tc
; tc
++) {
530 mlx5_core_modify_cq_moderation(mdev
,
532 coal
->tx_coalesce_usecs
,
533 coal
->tx_max_coalesced_frames
);
536 mlx5_core_modify_cq_moderation(mdev
, &c
->rq
.cq
.mcq
,
537 coal
->rx_coalesce_usecs
,
538 coal
->rx_max_coalesced_frames
);
542 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv
*priv
,
543 struct ethtool_coalesce
*coal
)
545 struct dim_cq_moder
*rx_moder
, *tx_moder
;
546 struct mlx5_core_dev
*mdev
= priv
->mdev
;
547 struct mlx5e_channels new_channels
= {};
551 if (!MLX5_CAP_GEN(mdev
, cq_moderation
))
554 if (coal
->tx_coalesce_usecs
> MLX5E_MAX_COAL_TIME
||
555 coal
->rx_coalesce_usecs
> MLX5E_MAX_COAL_TIME
) {
556 netdev_info(priv
->netdev
, "%s: maximum coalesce time supported is %lu usecs\n",
557 __func__
, MLX5E_MAX_COAL_TIME
);
561 if (coal
->tx_max_coalesced_frames
> MLX5E_MAX_COAL_FRAMES
||
562 coal
->rx_max_coalesced_frames
> MLX5E_MAX_COAL_FRAMES
) {
563 netdev_info(priv
->netdev
, "%s: maximum coalesced frames supported is %lu\n",
564 __func__
, MLX5E_MAX_COAL_FRAMES
);
568 mutex_lock(&priv
->state_lock
);
569 new_channels
.params
= priv
->channels
.params
;
571 rx_moder
= &new_channels
.params
.rx_cq_moderation
;
572 rx_moder
->usec
= coal
->rx_coalesce_usecs
;
573 rx_moder
->pkts
= coal
->rx_max_coalesced_frames
;
574 new_channels
.params
.rx_dim_enabled
= !!coal
->use_adaptive_rx_coalesce
;
576 tx_moder
= &new_channels
.params
.tx_cq_moderation
;
577 tx_moder
->usec
= coal
->tx_coalesce_usecs
;
578 tx_moder
->pkts
= coal
->tx_max_coalesced_frames
;
579 new_channels
.params
.tx_dim_enabled
= !!coal
->use_adaptive_tx_coalesce
;
581 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
582 priv
->channels
.params
= new_channels
.params
;
587 reset
= (!!coal
->use_adaptive_rx_coalesce
!= priv
->channels
.params
.rx_dim_enabled
) ||
588 (!!coal
->use_adaptive_tx_coalesce
!= priv
->channels
.params
.tx_dim_enabled
);
591 mlx5e_set_priv_channels_coalesce(priv
, coal
);
592 priv
->channels
.params
= new_channels
.params
;
596 err
= mlx5e_safe_switch_channels(priv
, &new_channels
, NULL
);
599 mutex_unlock(&priv
->state_lock
);
603 static int mlx5e_set_coalesce(struct net_device
*netdev
,
604 struct ethtool_coalesce
*coal
)
606 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
608 return mlx5e_ethtool_set_coalesce(priv
, coal
);
611 static void ptys2ethtool_supported_link(struct mlx5_core_dev
*mdev
,
612 unsigned long *supported_modes
,
615 unsigned long proto_cap
= eth_proto_cap
;
616 struct ptys2ethtool_config
*table
;
620 mlx5e_ethtool_get_speed_arr(mdev
, &table
, &max_size
);
621 for_each_set_bit(proto
, &proto_cap
, max_size
)
622 bitmap_or(supported_modes
, supported_modes
,
623 table
[proto
].supported
,
624 __ETHTOOL_LINK_MODE_MASK_NBITS
);
627 static void ptys2ethtool_adver_link(unsigned long *advertising_modes
,
628 u32 eth_proto_cap
, bool ext
)
630 unsigned long proto_cap
= eth_proto_cap
;
631 struct ptys2ethtool_config
*table
;
635 table
= ext
? ptys2ext_ethtool_table
: ptys2legacy_ethtool_table
;
636 max_size
= ext
? ARRAY_SIZE(ptys2ext_ethtool_table
) :
637 ARRAY_SIZE(ptys2legacy_ethtool_table
);
639 for_each_set_bit(proto
, &proto_cap
, max_size
)
640 bitmap_or(advertising_modes
, advertising_modes
,
641 table
[proto
].advertised
,
642 __ETHTOOL_LINK_MODE_MASK_NBITS
);
645 static const u32 pplm_fec_2_ethtool
[] = {
646 [MLX5E_FEC_NOFEC
] = ETHTOOL_FEC_OFF
,
647 [MLX5E_FEC_FIRECODE
] = ETHTOOL_FEC_BASER
,
648 [MLX5E_FEC_RS_528_514
] = ETHTOOL_FEC_RS
,
651 static u32
pplm2ethtool_fec(u_long fec_mode
, unsigned long size
)
656 return ETHTOOL_FEC_AUTO
;
658 mode
= find_first_bit(&fec_mode
, size
);
660 if (mode
< ARRAY_SIZE(pplm_fec_2_ethtool
))
661 return pplm_fec_2_ethtool
[mode
];
666 /* we use ETHTOOL_FEC_* offset and apply it to ETHTOOL_LINK_MODE_FEC_*_BIT */
667 static u32
ethtool_fec2ethtool_caps(u_long ethtool_fec_code
)
671 offset
= find_first_bit(ðtool_fec_code
, sizeof(u32
));
672 offset
-= ETHTOOL_FEC_OFF_BIT
;
673 offset
+= ETHTOOL_LINK_MODE_FEC_NONE_BIT
;
678 static int get_fec_supported_advertised(struct mlx5_core_dev
*dev
,
679 struct ethtool_link_ksettings
*link_ksettings
)
687 err
= mlx5e_get_fec_caps(dev
, (u8
*)&fec_caps
);
689 return (err
== -EOPNOTSUPP
) ? 0 : err
;
691 err
= mlx5e_get_fec_mode(dev
, &active_fec
, NULL
);
695 for_each_set_bit(bitn
, &fec_caps
, ARRAY_SIZE(pplm_fec_2_ethtool
)) {
696 u_long ethtool_bitmask
= pplm_fec_2_ethtool
[bitn
];
698 offset
= ethtool_fec2ethtool_caps(ethtool_bitmask
);
699 __set_bit(offset
, link_ksettings
->link_modes
.supported
);
702 active_fec
= pplm2ethtool_fec(active_fec
, sizeof(u32
) * BITS_PER_BYTE
);
703 offset
= ethtool_fec2ethtool_caps(active_fec
);
704 __set_bit(offset
, link_ksettings
->link_modes
.advertising
);
709 static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings
*link_ksettings
,
713 if (!connector_type
|| connector_type
>= MLX5E_CONNECTOR_TYPE_NUMBER
) {
714 if (eth_proto_cap
& (MLX5E_PROT_MASK(MLX5E_10GBASE_CR
)
715 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR
)
716 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4
)
717 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4
)
718 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4
)
719 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII
))) {
720 ethtool_link_ksettings_add_link_mode(link_ksettings
,
723 ethtool_link_ksettings_add_link_mode(link_ksettings
,
728 if (eth_proto_cap
& (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4
)
729 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4
)
730 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR
)
731 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4
)
732 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX
))) {
733 ethtool_link_ksettings_add_link_mode(link_ksettings
,
736 ethtool_link_ksettings_add_link_mode(link_ksettings
,
743 switch (connector_type
) {
745 ethtool_link_ksettings_add_link_mode(link_ksettings
,
747 ethtool_link_ksettings_add_link_mode(link_ksettings
,
751 ethtool_link_ksettings_add_link_mode(link_ksettings
,
753 ethtool_link_ksettings_add_link_mode(link_ksettings
,
757 ethtool_link_ksettings_add_link_mode(link_ksettings
,
759 ethtool_link_ksettings_add_link_mode(link_ksettings
,
763 ethtool_link_ksettings_add_link_mode(link_ksettings
,
765 ethtool_link_ksettings_add_link_mode(link_ksettings
,
768 case MLX5E_PORT_FIBRE
:
769 ethtool_link_ksettings_add_link_mode(link_ksettings
,
771 ethtool_link_ksettings_add_link_mode(link_ksettings
,
775 ethtool_link_ksettings_add_link_mode(link_ksettings
,
776 supported
, Backplane
);
777 ethtool_link_ksettings_add_link_mode(link_ksettings
,
778 advertising
, Backplane
);
780 case MLX5E_PORT_NONE
:
781 case MLX5E_PORT_OTHER
:
787 static void get_speed_duplex(struct net_device
*netdev
,
788 u32 eth_proto_oper
, bool force_legacy
,
789 struct ethtool_link_ksettings
*link_ksettings
)
791 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
792 u32 speed
= SPEED_UNKNOWN
;
793 u8 duplex
= DUPLEX_UNKNOWN
;
795 if (!netif_carrier_ok(netdev
))
798 speed
= mlx5e_port_ptys2speed(priv
->mdev
, eth_proto_oper
, force_legacy
);
800 speed
= SPEED_UNKNOWN
;
804 duplex
= DUPLEX_FULL
;
807 link_ksettings
->base
.speed
= speed
;
808 link_ksettings
->base
.duplex
= duplex
;
811 static void get_supported(struct mlx5_core_dev
*mdev
, u32 eth_proto_cap
,
812 struct ethtool_link_ksettings
*link_ksettings
)
814 unsigned long *supported
= link_ksettings
->link_modes
.supported
;
815 ptys2ethtool_supported_link(mdev
, supported
, eth_proto_cap
);
817 ethtool_link_ksettings_add_link_mode(link_ksettings
, supported
, Pause
);
820 static void get_advertising(u32 eth_proto_cap
, u8 tx_pause
, u8 rx_pause
,
821 struct ethtool_link_ksettings
*link_ksettings
,
824 unsigned long *advertising
= link_ksettings
->link_modes
.advertising
;
825 ptys2ethtool_adver_link(advertising
, eth_proto_cap
, ext
);
828 ethtool_link_ksettings_add_link_mode(link_ksettings
, advertising
, Pause
);
829 if (tx_pause
^ rx_pause
)
830 ethtool_link_ksettings_add_link_mode(link_ksettings
, advertising
, Asym_Pause
);
833 static int ptys2connector_type
[MLX5E_CONNECTOR_TYPE_NUMBER
] = {
834 [MLX5E_PORT_UNKNOWN
] = PORT_OTHER
,
835 [MLX5E_PORT_NONE
] = PORT_NONE
,
836 [MLX5E_PORT_TP
] = PORT_TP
,
837 [MLX5E_PORT_AUI
] = PORT_AUI
,
838 [MLX5E_PORT_BNC
] = PORT_BNC
,
839 [MLX5E_PORT_MII
] = PORT_MII
,
840 [MLX5E_PORT_FIBRE
] = PORT_FIBRE
,
841 [MLX5E_PORT_DA
] = PORT_DA
,
842 [MLX5E_PORT_OTHER
] = PORT_OTHER
,
845 static u8
get_connector_port(u32 eth_proto
, u8 connector_type
)
847 if (connector_type
&& connector_type
< MLX5E_CONNECTOR_TYPE_NUMBER
)
848 return ptys2connector_type
[connector_type
];
851 (MLX5E_PROT_MASK(MLX5E_10GBASE_SR
) |
852 MLX5E_PROT_MASK(MLX5E_40GBASE_SR4
) |
853 MLX5E_PROT_MASK(MLX5E_100GBASE_SR4
) |
854 MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII
))) {
859 (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4
) |
860 MLX5E_PROT_MASK(MLX5E_10GBASE_CR
) |
861 MLX5E_PROT_MASK(MLX5E_100GBASE_CR4
))) {
866 (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4
) |
867 MLX5E_PROT_MASK(MLX5E_10GBASE_KR
) |
868 MLX5E_PROT_MASK(MLX5E_40GBASE_KR4
) |
869 MLX5E_PROT_MASK(MLX5E_100GBASE_KR4
))) {
876 static void get_lp_advertising(struct mlx5_core_dev
*mdev
, u32 eth_proto_lp
,
877 struct ethtool_link_ksettings
*link_ksettings
)
879 unsigned long *lp_advertising
= link_ksettings
->link_modes
.lp_advertising
;
880 bool ext
= MLX5_CAP_PCAM_FEATURE(mdev
, ptys_extended_ethernet
);
882 ptys2ethtool_adver_link(lp_advertising
, eth_proto_lp
, ext
);
885 int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv
*priv
,
886 struct ethtool_link_ksettings
*link_ksettings
)
888 struct mlx5_core_dev
*mdev
= priv
->mdev
;
889 u32 out
[MLX5_ST_SZ_DW(ptys_reg
)] = {0};
903 err
= mlx5_query_port_ptys(mdev
, out
, sizeof(out
), MLX5_PTYS_EN
, 1);
905 netdev_err(priv
->netdev
, "%s: query port ptys failed: %d\n",
909 ext
= MLX5_CAP_PCAM_FEATURE(mdev
, ptys_extended_ethernet
);
910 eth_proto_cap
= MLX5_GET_ETH_PROTO(ptys_reg
, out
, ext
,
911 eth_proto_capability
);
912 eth_proto_admin
= MLX5_GET_ETH_PROTO(ptys_reg
, out
, ext
,
914 /* Fields: eth_proto_admin and ext_eth_proto_admin are
915 * mutually exclusive. Hence try reading legacy advertising
916 * when extended advertising is zero.
917 * admin_ext indicates which proto_admin (ext vs. legacy)
918 * should be read and interpreted
921 if (ext
&& !eth_proto_admin
) {
922 eth_proto_admin
= MLX5_GET_ETH_PROTO(ptys_reg
, out
, false,
927 eth_proto_oper
= MLX5_GET_ETH_PROTO(ptys_reg
, out
, admin_ext
,
929 eth_proto_lp
= MLX5_GET(ptys_reg
, out
, eth_proto_lp_advertise
);
930 an_disable_admin
= MLX5_GET(ptys_reg
, out
, an_disable_admin
);
931 an_status
= MLX5_GET(ptys_reg
, out
, an_status
);
932 connector_type
= MLX5_GET(ptys_reg
, out
, connector_type
);
934 mlx5_query_port_pause(mdev
, &rx_pause
, &tx_pause
);
936 ethtool_link_ksettings_zero_link_mode(link_ksettings
, supported
);
937 ethtool_link_ksettings_zero_link_mode(link_ksettings
, advertising
);
939 get_supported(mdev
, eth_proto_cap
, link_ksettings
);
940 get_advertising(eth_proto_admin
, tx_pause
, rx_pause
, link_ksettings
,
942 get_speed_duplex(priv
->netdev
, eth_proto_oper
, !admin_ext
,
945 eth_proto_oper
= eth_proto_oper
? eth_proto_oper
: eth_proto_cap
;
947 link_ksettings
->base
.port
= get_connector_port(eth_proto_oper
,
949 ptys2ethtool_supported_advertised_port(link_ksettings
, eth_proto_admin
,
951 get_lp_advertising(mdev
, eth_proto_lp
, link_ksettings
);
953 if (an_status
== MLX5_AN_COMPLETE
)
954 ethtool_link_ksettings_add_link_mode(link_ksettings
,
955 lp_advertising
, Autoneg
);
957 link_ksettings
->base
.autoneg
= an_disable_admin
? AUTONEG_DISABLE
:
959 ethtool_link_ksettings_add_link_mode(link_ksettings
, supported
,
962 err
= get_fec_supported_advertised(mdev
, link_ksettings
);
964 netdev_dbg(priv
->netdev
, "%s: FEC caps query failed: %d\n",
966 err
= 0; /* don't fail caps query because of FEC error */
969 if (!an_disable_admin
)
970 ethtool_link_ksettings_add_link_mode(link_ksettings
,
971 advertising
, Autoneg
);
977 static int mlx5e_get_link_ksettings(struct net_device
*netdev
,
978 struct ethtool_link_ksettings
*link_ksettings
)
980 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
982 return mlx5e_ethtool_get_link_ksettings(priv
, link_ksettings
);
985 static u32
mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes
)
987 u32 i
, ptys_modes
= 0;
989 for (i
= 0; i
< MLX5E_LINK_MODES_NUMBER
; ++i
) {
990 if (*ptys2legacy_ethtool_table
[i
].advertised
== 0)
992 if (bitmap_intersects(ptys2legacy_ethtool_table
[i
].advertised
,
994 __ETHTOOL_LINK_MODE_MASK_NBITS
))
995 ptys_modes
|= MLX5E_PROT_MASK(i
);
1001 static u32
mlx5e_ethtool2ptys_ext_adver_link(const unsigned long *link_modes
)
1003 u32 i
, ptys_modes
= 0;
1004 unsigned long modes
[2];
1006 for (i
= 0; i
< MLX5E_EXT_LINK_MODES_NUMBER
; ++i
) {
1007 if (*ptys2ext_ethtool_table
[i
].advertised
== 0)
1009 memset(modes
, 0, sizeof(modes
));
1010 bitmap_and(modes
, ptys2ext_ethtool_table
[i
].advertised
,
1011 link_modes
, __ETHTOOL_LINK_MODE_MASK_NBITS
);
1013 if (modes
[0] == ptys2ext_ethtool_table
[i
].advertised
[0] &&
1014 modes
[1] == ptys2ext_ethtool_table
[i
].advertised
[1])
1015 ptys_modes
|= MLX5E_PROT_MASK(i
);
1020 static bool ext_link_mode_requested(const unsigned long *adver
)
1022 #define MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT ETHTOOL_LINK_MODE_50000baseKR_Full_BIT
1023 int size
= __ETHTOOL_LINK_MODE_MASK_NBITS
- MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT
;
1024 __ETHTOOL_DECLARE_LINK_MODE_MASK(modes
);
1026 bitmap_set(modes
, MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT
, size
);
1027 return bitmap_intersects(modes
, adver
, __ETHTOOL_LINK_MODE_MASK_NBITS
);
1030 static bool ext_speed_requested(u32 speed
)
1032 #define MLX5E_MAX_PTYS_LEGACY_SPEED 100000
1033 return !!(speed
> MLX5E_MAX_PTYS_LEGACY_SPEED
);
1036 static bool ext_requested(u8 autoneg
, const unsigned long *adver
, u32 speed
)
1038 bool ext_link_mode
= ext_link_mode_requested(adver
);
1039 bool ext_speed
= ext_speed_requested(speed
);
1041 return autoneg
== AUTONEG_ENABLE
? ext_link_mode
: ext_speed
;
1044 int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv
*priv
,
1045 const struct ethtool_link_ksettings
*link_ksettings
)
1047 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1048 struct mlx5e_port_eth_proto eproto
;
1049 const unsigned long *adver
;
1050 bool an_changes
= false;
1051 u8 an_disable_admin
;
1062 u32 (*ethtool2ptys_adver_func
)(const unsigned long *adver
);
1064 adver
= link_ksettings
->link_modes
.advertising
;
1065 autoneg
= link_ksettings
->base
.autoneg
;
1066 speed
= link_ksettings
->base
.speed
;
1068 ext
= ext_requested(autoneg
, adver
, speed
),
1069 ext_supported
= MLX5_CAP_PCAM_FEATURE(mdev
, ptys_extended_ethernet
);
1070 if (!ext_supported
&& ext
)
1073 ethtool2ptys_adver_func
= ext
? mlx5e_ethtool2ptys_ext_adver_link
:
1074 mlx5e_ethtool2ptys_adver_link
;
1075 err
= mlx5_port_query_eth_proto(mdev
, 1, ext
, &eproto
);
1077 netdev_err(priv
->netdev
, "%s: query port eth proto failed: %d\n",
1081 link_modes
= autoneg
== AUTONEG_ENABLE
? ethtool2ptys_adver_func(adver
) :
1082 mlx5e_port_speed2linkmodes(mdev
, speed
, !ext
);
1084 if ((link_modes
& MLX5E_PROT_MASK(MLX5E_56GBASE_R4
)) &&
1085 autoneg
!= AUTONEG_ENABLE
) {
1086 netdev_err(priv
->netdev
, "%s: 56G link speed requires autoneg enabled\n",
1092 link_modes
= link_modes
& eproto
.cap
;
1094 netdev_err(priv
->netdev
, "%s: Not supported link mode(s) requested",
1100 mlx5_port_query_eth_autoneg(mdev
, &an_status
, &an_disable_cap
,
1103 an_disable
= autoneg
== AUTONEG_DISABLE
;
1104 an_changes
= ((!an_disable
&& an_disable_admin
) ||
1105 (an_disable
&& !an_disable_admin
));
1107 if (!an_changes
&& link_modes
== eproto
.admin
)
1110 mlx5_port_set_eth_ptys(mdev
, an_disable
, link_modes
, ext
);
1111 mlx5_toggle_port_link(mdev
);
1117 static int mlx5e_set_link_ksettings(struct net_device
*netdev
,
1118 const struct ethtool_link_ksettings
*link_ksettings
)
1120 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1122 return mlx5e_ethtool_set_link_ksettings(priv
, link_ksettings
);
1125 u32
mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv
*priv
)
1127 return sizeof(priv
->rss_params
.toeplitz_hash_key
);
1130 static u32
mlx5e_get_rxfh_key_size(struct net_device
*netdev
)
1132 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1134 return mlx5e_ethtool_get_rxfh_key_size(priv
);
1137 u32
mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv
*priv
)
1139 return MLX5E_INDIR_RQT_SIZE
;
1142 static u32
mlx5e_get_rxfh_indir_size(struct net_device
*netdev
)
1144 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1146 return mlx5e_ethtool_get_rxfh_indir_size(priv
);
1149 static int mlx5e_get_rxfh(struct net_device
*netdev
, u32
*indir
, u8
*key
,
1152 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1153 struct mlx5e_rss_params
*rss
= &priv
->rss_params
;
1156 memcpy(indir
, rss
->indirection_rqt
,
1157 sizeof(rss
->indirection_rqt
));
1160 memcpy(key
, rss
->toeplitz_hash_key
,
1161 sizeof(rss
->toeplitz_hash_key
));
1164 *hfunc
= rss
->hfunc
;
1169 static int mlx5e_set_rxfh(struct net_device
*dev
, const u32
*indir
,
1170 const u8
*key
, const u8 hfunc
)
1172 struct mlx5e_priv
*priv
= netdev_priv(dev
);
1173 struct mlx5e_rss_params
*rss
= &priv
->rss_params
;
1174 int inlen
= MLX5_ST_SZ_BYTES(modify_tir_in
);
1175 bool hash_changed
= false;
1178 if ((hfunc
!= ETH_RSS_HASH_NO_CHANGE
) &&
1179 (hfunc
!= ETH_RSS_HASH_XOR
) &&
1180 (hfunc
!= ETH_RSS_HASH_TOP
))
1183 in
= kvzalloc(inlen
, GFP_KERNEL
);
1187 mutex_lock(&priv
->state_lock
);
1189 if (hfunc
!= ETH_RSS_HASH_NO_CHANGE
&& hfunc
!= rss
->hfunc
) {
1191 hash_changed
= true;
1195 memcpy(rss
->indirection_rqt
, indir
,
1196 sizeof(rss
->indirection_rqt
));
1198 if (test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
1199 u32 rqtn
= priv
->indir_rqt
.rqtn
;
1200 struct mlx5e_redirect_rqt_param rrp
= {
1204 .hfunc
= rss
->hfunc
,
1205 .channels
= &priv
->channels
,
1210 mlx5e_redirect_rqt(priv
, rqtn
, MLX5E_INDIR_RQT_SIZE
, rrp
);
1215 memcpy(rss
->toeplitz_hash_key
, key
,
1216 sizeof(rss
->toeplitz_hash_key
));
1217 hash_changed
= hash_changed
|| rss
->hfunc
== ETH_RSS_HASH_TOP
;
1221 mlx5e_modify_tirs_hash(priv
, in
, inlen
);
1223 mutex_unlock(&priv
->state_lock
);
1230 #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC 100
1231 #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC 8000
1232 #define MLX5E_PFC_PREVEN_MINOR_PRECENT 85
1233 #define MLX5E_PFC_PREVEN_TOUT_MIN_MSEC 80
1234 #define MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout) \
1235 max_t(u16, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC, \
1236 (critical_tout * MLX5E_PFC_PREVEN_MINOR_PRECENT) / 100)
1238 static int mlx5e_get_pfc_prevention_tout(struct net_device
*netdev
,
1239 u16
*pfc_prevention_tout
)
1241 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1242 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1244 if (!MLX5_CAP_PCAM_FEATURE((priv
)->mdev
, pfcc_mask
) ||
1245 !MLX5_CAP_DEBUG((priv
)->mdev
, stall_detect
))
1248 return mlx5_query_port_stall_watermark(mdev
, pfc_prevention_tout
, NULL
);
1251 static int mlx5e_set_pfc_prevention_tout(struct net_device
*netdev
,
1254 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1255 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1259 if (!MLX5_CAP_PCAM_FEATURE((priv
)->mdev
, pfcc_mask
) ||
1260 !MLX5_CAP_DEBUG((priv
)->mdev
, stall_detect
))
1263 critical_tout
= (pfc_preven
== PFC_STORM_PREVENTION_AUTO
) ?
1264 MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC
:
1267 if (critical_tout
!= PFC_STORM_PREVENTION_DISABLE
&&
1268 (critical_tout
> MLX5E_PFC_PREVEN_TOUT_MAX_MSEC
||
1269 critical_tout
< MLX5E_PFC_PREVEN_TOUT_MIN_MSEC
)) {
1270 netdev_info(netdev
, "%s: pfc prevention tout not in range (%d-%d)\n",
1271 __func__
, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC
,
1272 MLX5E_PFC_PREVEN_TOUT_MAX_MSEC
);
1276 minor
= MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout
);
1277 return mlx5_set_port_stall_watermark(mdev
, critical_tout
,
1281 static int mlx5e_get_tunable(struct net_device
*dev
,
1282 const struct ethtool_tunable
*tuna
,
1288 case ETHTOOL_PFC_PREVENTION_TOUT
:
1289 err
= mlx5e_get_pfc_prevention_tout(dev
, data
);
1299 static int mlx5e_set_tunable(struct net_device
*dev
,
1300 const struct ethtool_tunable
*tuna
,
1303 struct mlx5e_priv
*priv
= netdev_priv(dev
);
1306 mutex_lock(&priv
->state_lock
);
1309 case ETHTOOL_PFC_PREVENTION_TOUT
:
1310 err
= mlx5e_set_pfc_prevention_tout(dev
, *(u16
*)data
);
1317 mutex_unlock(&priv
->state_lock
);
1321 void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv
*priv
,
1322 struct ethtool_pauseparam
*pauseparam
)
1324 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1327 err
= mlx5_query_port_pause(mdev
, &pauseparam
->rx_pause
,
1328 &pauseparam
->tx_pause
);
1330 netdev_err(priv
->netdev
, "%s: mlx5_query_port_pause failed:0x%x\n",
1335 static void mlx5e_get_pauseparam(struct net_device
*netdev
,
1336 struct ethtool_pauseparam
*pauseparam
)
1338 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1340 mlx5e_ethtool_get_pauseparam(priv
, pauseparam
);
1343 int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv
*priv
,
1344 struct ethtool_pauseparam
*pauseparam
)
1346 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1349 if (!MLX5_CAP_GEN(mdev
, vport_group_manager
))
1352 if (pauseparam
->autoneg
)
1355 err
= mlx5_set_port_pause(mdev
,
1356 pauseparam
->rx_pause
? 1 : 0,
1357 pauseparam
->tx_pause
? 1 : 0);
1359 netdev_err(priv
->netdev
, "%s: mlx5_set_port_pause failed:0x%x\n",
1366 static int mlx5e_set_pauseparam(struct net_device
*netdev
,
1367 struct ethtool_pauseparam
*pauseparam
)
1369 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1371 return mlx5e_ethtool_set_pauseparam(priv
, pauseparam
);
1374 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv
*priv
,
1375 struct ethtool_ts_info
*info
)
1377 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1379 info
->phc_index
= mlx5_clock_get_ptp_index(mdev
);
1381 if (!MLX5_CAP_GEN(priv
->mdev
, device_frequency_khz
) ||
1382 info
->phc_index
== -1)
1385 info
->so_timestamping
= SOF_TIMESTAMPING_TX_HARDWARE
|
1386 SOF_TIMESTAMPING_RX_HARDWARE
|
1387 SOF_TIMESTAMPING_RAW_HARDWARE
;
1389 info
->tx_types
= BIT(HWTSTAMP_TX_OFF
) |
1390 BIT(HWTSTAMP_TX_ON
);
1392 info
->rx_filters
= BIT(HWTSTAMP_FILTER_NONE
) |
1393 BIT(HWTSTAMP_FILTER_ALL
);
1398 static int mlx5e_get_ts_info(struct net_device
*dev
,
1399 struct ethtool_ts_info
*info
)
1401 struct mlx5e_priv
*priv
= netdev_priv(dev
);
1403 return mlx5e_ethtool_get_ts_info(priv
, info
);
1406 static __u32
mlx5e_get_wol_supported(struct mlx5_core_dev
*mdev
)
1410 if (MLX5_CAP_GEN(mdev
, wol_g
))
1413 if (MLX5_CAP_GEN(mdev
, wol_s
))
1414 ret
|= WAKE_MAGICSECURE
;
1416 if (MLX5_CAP_GEN(mdev
, wol_a
))
1419 if (MLX5_CAP_GEN(mdev
, wol_b
))
1422 if (MLX5_CAP_GEN(mdev
, wol_m
))
1425 if (MLX5_CAP_GEN(mdev
, wol_u
))
1428 if (MLX5_CAP_GEN(mdev
, wol_p
))
1434 static __u32
mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode
)
1438 if (mode
& MLX5_WOL_MAGIC
)
1441 if (mode
& MLX5_WOL_SECURED_MAGIC
)
1442 ret
|= WAKE_MAGICSECURE
;
1444 if (mode
& MLX5_WOL_ARP
)
1447 if (mode
& MLX5_WOL_BROADCAST
)
1450 if (mode
& MLX5_WOL_MULTICAST
)
1453 if (mode
& MLX5_WOL_UNICAST
)
1456 if (mode
& MLX5_WOL_PHY_ACTIVITY
)
1462 static u8
mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode
)
1466 if (mode
& WAKE_MAGIC
)
1467 ret
|= MLX5_WOL_MAGIC
;
1469 if (mode
& WAKE_MAGICSECURE
)
1470 ret
|= MLX5_WOL_SECURED_MAGIC
;
1472 if (mode
& WAKE_ARP
)
1473 ret
|= MLX5_WOL_ARP
;
1475 if (mode
& WAKE_BCAST
)
1476 ret
|= MLX5_WOL_BROADCAST
;
1478 if (mode
& WAKE_MCAST
)
1479 ret
|= MLX5_WOL_MULTICAST
;
1481 if (mode
& WAKE_UCAST
)
1482 ret
|= MLX5_WOL_UNICAST
;
1484 if (mode
& WAKE_PHY
)
1485 ret
|= MLX5_WOL_PHY_ACTIVITY
;
1490 static void mlx5e_get_wol(struct net_device
*netdev
,
1491 struct ethtool_wolinfo
*wol
)
1493 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1494 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1498 memset(wol
, 0, sizeof(*wol
));
1500 wol
->supported
= mlx5e_get_wol_supported(mdev
);
1501 if (!wol
->supported
)
1504 err
= mlx5_query_port_wol(mdev
, &mlx5_wol_mode
);
1508 wol
->wolopts
= mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode
);
1511 static int mlx5e_set_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
1513 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1514 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1515 __u32 wol_supported
= mlx5e_get_wol_supported(mdev
);
1521 if (wol
->wolopts
& ~wol_supported
)
1524 mlx5_wol_mode
= mlx5e_refomrat_wol_mode_linux_to_mlx5(wol
->wolopts
);
1526 return mlx5_set_port_wol(mdev
, mlx5_wol_mode
);
1529 static int mlx5e_get_fecparam(struct net_device
*netdev
,
1530 struct ethtool_fecparam
*fecparam
)
1532 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1533 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1534 u8 fec_configured
= 0;
1538 err
= mlx5e_get_fec_mode(mdev
, &fec_active
, &fec_configured
);
1543 fecparam
->active_fec
= pplm2ethtool_fec((u_long
)fec_active
,
1544 sizeof(u32
) * BITS_PER_BYTE
);
1546 if (!fecparam
->active_fec
)
1549 fecparam
->fec
= pplm2ethtool_fec((u_long
)fec_configured
,
1550 sizeof(u8
) * BITS_PER_BYTE
);
1555 static int mlx5e_set_fecparam(struct net_device
*netdev
,
1556 struct ethtool_fecparam
*fecparam
)
1558 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1559 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1564 for (mode
= 0; mode
< ARRAY_SIZE(pplm_fec_2_ethtool
); mode
++) {
1565 if (!(pplm_fec_2_ethtool
[mode
] & fecparam
->fec
))
1567 fec_policy
|= (1 << mode
);
1571 err
= mlx5e_set_fec_mode(mdev
, fec_policy
);
1576 mlx5_toggle_port_link(mdev
);
1581 static u32
mlx5e_get_msglevel(struct net_device
*dev
)
1583 return ((struct mlx5e_priv
*)netdev_priv(dev
))->msglevel
;
1586 static void mlx5e_set_msglevel(struct net_device
*dev
, u32 val
)
1588 ((struct mlx5e_priv
*)netdev_priv(dev
))->msglevel
= val
;
1591 static int mlx5e_set_phys_id(struct net_device
*dev
,
1592 enum ethtool_phys_id_state state
)
1594 struct mlx5e_priv
*priv
= netdev_priv(dev
);
1595 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1596 u16 beacon_duration
;
1598 if (!MLX5_CAP_GEN(mdev
, beacon_led
))
1602 case ETHTOOL_ID_ACTIVE
:
1603 beacon_duration
= MLX5_BEACON_DURATION_INF
;
1605 case ETHTOOL_ID_INACTIVE
:
1606 beacon_duration
= MLX5_BEACON_DURATION_OFF
;
1612 return mlx5_set_port_beacon(mdev
, beacon_duration
);
1615 static int mlx5e_get_module_info(struct net_device
*netdev
,
1616 struct ethtool_modinfo
*modinfo
)
1618 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1619 struct mlx5_core_dev
*dev
= priv
->mdev
;
1623 size_read
= mlx5_query_module_eeprom(dev
, 0, 2, data
);
1627 /* data[0] = identifier byte */
1629 case MLX5_MODULE_ID_QSFP
:
1630 modinfo
->type
= ETH_MODULE_SFF_8436
;
1631 modinfo
->eeprom_len
= ETH_MODULE_SFF_8436_MAX_LEN
;
1633 case MLX5_MODULE_ID_QSFP_PLUS
:
1634 case MLX5_MODULE_ID_QSFP28
:
1635 /* data[1] = revision id */
1636 if (data
[0] == MLX5_MODULE_ID_QSFP28
|| data
[1] >= 0x3) {
1637 modinfo
->type
= ETH_MODULE_SFF_8636
;
1638 modinfo
->eeprom_len
= ETH_MODULE_SFF_8636_MAX_LEN
;
1640 modinfo
->type
= ETH_MODULE_SFF_8436
;
1641 modinfo
->eeprom_len
= ETH_MODULE_SFF_8436_MAX_LEN
;
1644 case MLX5_MODULE_ID_SFP
:
1645 modinfo
->type
= ETH_MODULE_SFF_8472
;
1646 modinfo
->eeprom_len
= MLX5_EEPROM_PAGE_LENGTH
;
1649 netdev_err(priv
->netdev
, "%s: cable type not recognized:0x%x\n",
1657 static int mlx5e_get_module_eeprom(struct net_device
*netdev
,
1658 struct ethtool_eeprom
*ee
,
1661 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1662 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1663 int offset
= ee
->offset
;
1670 memset(data
, 0, ee
->len
);
1672 while (i
< ee
->len
) {
1673 size_read
= mlx5_query_module_eeprom(mdev
, offset
, ee
->len
- i
,
1680 if (size_read
< 0) {
1681 netdev_err(priv
->netdev
, "%s: mlx5_query_eeprom failed:0x%x\n",
1682 __func__
, size_read
);
1687 offset
+= size_read
;
1693 int mlx5e_ethtool_flash_device(struct mlx5e_priv
*priv
,
1694 struct ethtool_flash
*flash
)
1696 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1697 struct net_device
*dev
= priv
->netdev
;
1698 const struct firmware
*fw
;
1701 if (flash
->region
!= ETHTOOL_FLASH_ALL_REGIONS
)
1704 err
= request_firmware_direct(&fw
, flash
->data
, &dev
->dev
);
1711 err
= mlx5_firmware_flash(mdev
, fw
, NULL
);
1712 release_firmware(fw
);
1719 static int mlx5e_flash_device(struct net_device
*dev
,
1720 struct ethtool_flash
*flash
)
1722 struct mlx5e_priv
*priv
= netdev_priv(dev
);
1724 return mlx5e_ethtool_flash_device(priv
, flash
);
1727 static int set_pflag_cqe_based_moder(struct net_device
*netdev
, bool enable
,
1730 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1731 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1732 struct mlx5e_channels new_channels
= {};
1734 u8 cq_period_mode
, current_cq_period_mode
;
1736 cq_period_mode
= enable
?
1737 MLX5_CQ_PERIOD_MODE_START_FROM_CQE
:
1738 MLX5_CQ_PERIOD_MODE_START_FROM_EQE
;
1739 current_cq_period_mode
= is_rx_cq
?
1740 priv
->channels
.params
.rx_cq_moderation
.cq_period_mode
:
1741 priv
->channels
.params
.tx_cq_moderation
.cq_period_mode
;
1742 mode_changed
= cq_period_mode
!= current_cq_period_mode
;
1744 if (cq_period_mode
== MLX5_CQ_PERIOD_MODE_START_FROM_CQE
&&
1745 !MLX5_CAP_GEN(mdev
, cq_period_start_from_cqe
))
1751 new_channels
.params
= priv
->channels
.params
;
1753 mlx5e_set_rx_cq_mode_params(&new_channels
.params
, cq_period_mode
);
1755 mlx5e_set_tx_cq_mode_params(&new_channels
.params
, cq_period_mode
);
1757 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
1758 priv
->channels
.params
= new_channels
.params
;
1762 return mlx5e_safe_switch_channels(priv
, &new_channels
, NULL
);
1765 static int set_pflag_tx_cqe_based_moder(struct net_device
*netdev
, bool enable
)
1767 return set_pflag_cqe_based_moder(netdev
, enable
, false);
1770 static int set_pflag_rx_cqe_based_moder(struct net_device
*netdev
, bool enable
)
1772 return set_pflag_cqe_based_moder(netdev
, enable
, true);
1775 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv
*priv
, bool new_val
)
1777 bool curr_val
= MLX5E_GET_PFLAG(&priv
->channels
.params
, MLX5E_PFLAG_RX_CQE_COMPRESS
);
1778 struct mlx5e_channels new_channels
= {};
1781 if (!MLX5_CAP_GEN(priv
->mdev
, cqe_compression
))
1782 return new_val
? -EOPNOTSUPP
: 0;
1784 if (curr_val
== new_val
)
1787 new_channels
.params
= priv
->channels
.params
;
1788 MLX5E_SET_PFLAG(&new_channels
.params
, MLX5E_PFLAG_RX_CQE_COMPRESS
, new_val
);
1790 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
1791 priv
->channels
.params
= new_channels
.params
;
1795 err
= mlx5e_safe_switch_channels(priv
, &new_channels
, NULL
);
1799 mlx5e_dbg(DRV
, priv
, "MLX5E: RxCqeCmprss was turned %s\n",
1800 MLX5E_GET_PFLAG(&priv
->channels
.params
,
1801 MLX5E_PFLAG_RX_CQE_COMPRESS
) ? "ON" : "OFF");
1806 static int set_pflag_rx_cqe_compress(struct net_device
*netdev
,
1809 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1810 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1812 if (!MLX5_CAP_GEN(mdev
, cqe_compression
))
1815 if (enable
&& priv
->tstamp
.rx_filter
!= HWTSTAMP_FILTER_NONE
) {
1816 netdev_err(netdev
, "Can't enable cqe compression while timestamping is enabled.\n");
1820 mlx5e_modify_rx_cqe_compression_locked(priv
, enable
);
1821 priv
->channels
.params
.rx_cqe_compress_def
= enable
;
1826 static int set_pflag_rx_striding_rq(struct net_device
*netdev
, bool enable
)
1828 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1829 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1830 struct mlx5e_channels new_channels
= {};
1833 if (!mlx5e_check_fragmented_striding_rq_cap(mdev
))
1835 if (!mlx5e_striding_rq_possible(mdev
, &priv
->channels
.params
))
1837 } else if (priv
->channels
.params
.lro_en
) {
1838 netdev_warn(netdev
, "Can't set legacy RQ with LRO, disable LRO first\n");
1842 new_channels
.params
= priv
->channels
.params
;
1844 MLX5E_SET_PFLAG(&new_channels
.params
, MLX5E_PFLAG_RX_STRIDING_RQ
, enable
);
1845 mlx5e_set_rq_type(mdev
, &new_channels
.params
);
1847 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
1848 priv
->channels
.params
= new_channels
.params
;
1852 return mlx5e_safe_switch_channels(priv
, &new_channels
, NULL
);
1855 static int set_pflag_rx_no_csum_complete(struct net_device
*netdev
, bool enable
)
1857 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1858 struct mlx5e_channels
*channels
= &priv
->channels
;
1859 struct mlx5e_channel
*c
;
1862 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
) ||
1863 priv
->channels
.params
.xdp_prog
)
1866 for (i
= 0; i
< channels
->num
; i
++) {
1869 __set_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE
, &c
->rq
.state
);
1871 __clear_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE
, &c
->rq
.state
);
1877 static int set_pflag_xdp_tx_mpwqe(struct net_device
*netdev
, bool enable
)
1879 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1880 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1881 struct mlx5e_channels new_channels
= {};
1884 if (enable
&& !MLX5_CAP_ETH(mdev
, enhanced_multi_pkt_send_wqe
))
1887 new_channels
.params
= priv
->channels
.params
;
1889 MLX5E_SET_PFLAG(&new_channels
.params
, MLX5E_PFLAG_XDP_TX_MPWQE
, enable
);
1891 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
1892 priv
->channels
.params
= new_channels
.params
;
1896 err
= mlx5e_safe_switch_channels(priv
, &new_channels
, NULL
);
1900 static const struct pflag_desc mlx5e_priv_flags
[MLX5E_NUM_PFLAGS
] = {
1901 { "rx_cqe_moder", set_pflag_rx_cqe_based_moder
},
1902 { "tx_cqe_moder", set_pflag_tx_cqe_based_moder
},
1903 { "rx_cqe_compress", set_pflag_rx_cqe_compress
},
1904 { "rx_striding_rq", set_pflag_rx_striding_rq
},
1905 { "rx_no_csum_complete", set_pflag_rx_no_csum_complete
},
1906 { "xdp_tx_mpwqe", set_pflag_xdp_tx_mpwqe
},
1909 static int mlx5e_handle_pflag(struct net_device
*netdev
,
1911 enum mlx5e_priv_flag flag
)
1913 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1914 bool enable
= !!(wanted_flags
& BIT(flag
));
1915 u32 changes
= wanted_flags
^ priv
->channels
.params
.pflags
;
1918 if (!(changes
& BIT(flag
)))
1921 err
= mlx5e_priv_flags
[flag
].handler(netdev
, enable
);
1923 netdev_err(netdev
, "%s private flag '%s' failed err %d\n",
1924 enable
? "Enable" : "Disable", mlx5e_priv_flags
[flag
].name
, err
);
1928 MLX5E_SET_PFLAG(&priv
->channels
.params
, flag
, enable
);
1932 static int mlx5e_set_priv_flags(struct net_device
*netdev
, u32 pflags
)
1934 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1935 enum mlx5e_priv_flag pflag
;
1938 mutex_lock(&priv
->state_lock
);
1940 for (pflag
= 0; pflag
< MLX5E_NUM_PFLAGS
; pflag
++) {
1941 err
= mlx5e_handle_pflag(netdev
, pflags
, pflag
);
1946 mutex_unlock(&priv
->state_lock
);
1948 /* Need to fix some features.. */
1949 netdev_update_features(netdev
);
1954 static u32
mlx5e_get_priv_flags(struct net_device
*netdev
)
1956 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1958 return priv
->channels
.params
.pflags
;
1961 #ifndef CONFIG_MLX5_EN_RXNFC
1962 /* When CONFIG_MLX5_EN_RXNFC=n we only support ETHTOOL_GRXRINGS
1963 * otherwise this function will be defined from en_fs_ethtool.c
1965 static int mlx5e_get_rxnfc(struct net_device
*dev
, struct ethtool_rxnfc
*info
, u32
*rule_locs
)
1967 struct mlx5e_priv
*priv
= netdev_priv(dev
);
1969 if (info
->cmd
!= ETHTOOL_GRXRINGS
)
1971 /* ring_count is needed by ethtool -x */
1972 info
->data
= priv
->channels
.params
.num_channels
;
1977 const struct ethtool_ops mlx5e_ethtool_ops
= {
1978 .get_drvinfo
= mlx5e_get_drvinfo
,
1979 .get_link
= ethtool_op_get_link
,
1980 .get_strings
= mlx5e_get_strings
,
1981 .get_sset_count
= mlx5e_get_sset_count
,
1982 .get_ethtool_stats
= mlx5e_get_ethtool_stats
,
1983 .get_ringparam
= mlx5e_get_ringparam
,
1984 .set_ringparam
= mlx5e_set_ringparam
,
1985 .get_channels
= mlx5e_get_channels
,
1986 .set_channels
= mlx5e_set_channels
,
1987 .get_coalesce
= mlx5e_get_coalesce
,
1988 .set_coalesce
= mlx5e_set_coalesce
,
1989 .get_link_ksettings
= mlx5e_get_link_ksettings
,
1990 .set_link_ksettings
= mlx5e_set_link_ksettings
,
1991 .get_rxfh_key_size
= mlx5e_get_rxfh_key_size
,
1992 .get_rxfh_indir_size
= mlx5e_get_rxfh_indir_size
,
1993 .get_rxfh
= mlx5e_get_rxfh
,
1994 .set_rxfh
= mlx5e_set_rxfh
,
1995 .get_rxnfc
= mlx5e_get_rxnfc
,
1996 #ifdef CONFIG_MLX5_EN_RXNFC
1997 .set_rxnfc
= mlx5e_set_rxnfc
,
1999 .get_tunable
= mlx5e_get_tunable
,
2000 .set_tunable
= mlx5e_set_tunable
,
2001 .get_pauseparam
= mlx5e_get_pauseparam
,
2002 .set_pauseparam
= mlx5e_set_pauseparam
,
2003 .get_ts_info
= mlx5e_get_ts_info
,
2004 .set_phys_id
= mlx5e_set_phys_id
,
2005 .get_wol
= mlx5e_get_wol
,
2006 .set_wol
= mlx5e_set_wol
,
2007 .get_module_info
= mlx5e_get_module_info
,
2008 .get_module_eeprom
= mlx5e_get_module_eeprom
,
2009 .flash_device
= mlx5e_flash_device
,
2010 .get_priv_flags
= mlx5e_get_priv_flags
,
2011 .set_priv_flags
= mlx5e_set_priv_flags
,
2012 .self_test
= mlx5e_self_test
,
2013 .get_msglevel
= mlx5e_get_msglevel
,
2014 .set_msglevel
= mlx5e_set_msglevel
,
2015 .get_fecparam
= mlx5e_get_fecparam
,
2016 .set_fecparam
= mlx5e_set_fecparam
,