2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include "lib/clock.h"
37 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv
*priv
,
38 struct ethtool_drvinfo
*drvinfo
)
40 struct mlx5_core_dev
*mdev
= priv
->mdev
;
42 strlcpy(drvinfo
->driver
, DRIVER_NAME
, sizeof(drvinfo
->driver
));
43 strlcpy(drvinfo
->version
, DRIVER_VERSION
,
44 sizeof(drvinfo
->version
));
45 snprintf(drvinfo
->fw_version
, sizeof(drvinfo
->fw_version
),
47 fw_rev_maj(mdev
), fw_rev_min(mdev
), fw_rev_sub(mdev
),
49 strlcpy(drvinfo
->bus_info
, pci_name(mdev
->pdev
),
50 sizeof(drvinfo
->bus_info
));
53 static void mlx5e_get_drvinfo(struct net_device
*dev
,
54 struct ethtool_drvinfo
*drvinfo
)
56 struct mlx5e_priv
*priv
= netdev_priv(dev
);
58 mlx5e_ethtool_get_drvinfo(priv
, drvinfo
);
61 struct ptys2ethtool_config
{
62 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported
);
63 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised
);
66 static struct ptys2ethtool_config ptys2ethtool_table
[MLX5E_LINK_MODES_NUMBER
];
68 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, ...) \
70 struct ptys2ethtool_config *cfg; \
71 const unsigned int modes[] = { __VA_ARGS__ }; \
73 cfg = &ptys2ethtool_table[reg_]; \
74 bitmap_zero(cfg->supported, \
75 __ETHTOOL_LINK_MODE_MASK_NBITS); \
76 bitmap_zero(cfg->advertised, \
77 __ETHTOOL_LINK_MODE_MASK_NBITS); \
78 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) { \
79 __set_bit(modes[i], cfg->supported); \
80 __set_bit(modes[i], cfg->advertised); \
84 void mlx5e_build_ptys2ethtool_map(void)
86 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII
,
87 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT
);
88 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX
,
89 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT
);
90 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4
,
91 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT
);
92 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4
,
93 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT
);
94 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR
,
95 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT
);
96 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2
,
97 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT
);
98 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4
,
99 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT
);
100 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4
,
101 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT
);
102 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4
,
103 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT
);
104 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR
,
105 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT
);
106 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR
,
107 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT
);
108 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER
,
109 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT
);
110 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4
,
111 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT
);
112 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4
,
113 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT
);
114 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2
,
115 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT
);
116 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4
,
117 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT
);
118 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4
,
119 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT
);
120 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4
,
121 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT
);
122 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4
,
123 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT
);
124 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T
,
125 ETHTOOL_LINK_MODE_10000baseT_Full_BIT
);
126 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR
,
127 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT
);
128 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR
,
129 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT
);
130 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR
,
131 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT
);
132 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2
,
133 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT
);
134 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2
,
135 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT
);
138 typedef int (*mlx5e_pflag_handler
)(struct net_device
*netdev
, bool enable
);
141 char name
[ETH_GSTRING_LEN
];
142 mlx5e_pflag_handler handler
;
145 static const struct pflag_desc mlx5e_priv_flags
[MLX5E_NUM_PFLAGS
];
147 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv
*priv
, int sset
)
149 int i
, num_stats
= 0;
153 for (i
= 0; i
< mlx5e_num_stats_grps
; i
++)
154 num_stats
+= mlx5e_stats_grps
[i
].get_num_stats(priv
);
156 case ETH_SS_PRIV_FLAGS
:
157 return MLX5E_NUM_PFLAGS
;
159 return mlx5e_self_test_num(priv
);
166 static int mlx5e_get_sset_count(struct net_device
*dev
, int sset
)
168 struct mlx5e_priv
*priv
= netdev_priv(dev
);
170 return mlx5e_ethtool_get_sset_count(priv
, sset
);
173 static void mlx5e_fill_stats_strings(struct mlx5e_priv
*priv
, u8
*data
)
177 for (i
= 0; i
< mlx5e_num_stats_grps
; i
++)
178 idx
= mlx5e_stats_grps
[i
].fill_strings(priv
, data
, idx
);
181 void mlx5e_ethtool_get_strings(struct mlx5e_priv
*priv
, u32 stringset
, u8
*data
)
186 case ETH_SS_PRIV_FLAGS
:
187 for (i
= 0; i
< MLX5E_NUM_PFLAGS
; i
++)
188 strcpy(data
+ i
* ETH_GSTRING_LEN
,
189 mlx5e_priv_flags
[i
].name
);
193 for (i
= 0; i
< mlx5e_self_test_num(priv
); i
++)
194 strcpy(data
+ i
* ETH_GSTRING_LEN
,
195 mlx5e_self_tests
[i
]);
199 mlx5e_fill_stats_strings(priv
, data
);
204 static void mlx5e_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
206 struct mlx5e_priv
*priv
= netdev_priv(dev
);
208 mlx5e_ethtool_get_strings(priv
, stringset
, data
);
211 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv
*priv
,
212 struct ethtool_stats
*stats
, u64
*data
)
216 mutex_lock(&priv
->state_lock
);
217 mlx5e_update_stats(priv
);
218 mutex_unlock(&priv
->state_lock
);
220 for (i
= 0; i
< mlx5e_num_stats_grps
; i
++)
221 idx
= mlx5e_stats_grps
[i
].fill_stats(priv
, data
, idx
);
224 static void mlx5e_get_ethtool_stats(struct net_device
*dev
,
225 struct ethtool_stats
*stats
,
228 struct mlx5e_priv
*priv
= netdev_priv(dev
);
230 mlx5e_ethtool_get_ethtool_stats(priv
, stats
, data
);
233 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv
*priv
,
234 struct ethtool_ringparam
*param
)
236 param
->rx_max_pending
= 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE
;
237 param
->tx_max_pending
= 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE
;
238 param
->rx_pending
= 1 << priv
->channels
.params
.log_rq_mtu_frames
;
239 param
->tx_pending
= 1 << priv
->channels
.params
.log_sq_size
;
242 static void mlx5e_get_ringparam(struct net_device
*dev
,
243 struct ethtool_ringparam
*param
)
245 struct mlx5e_priv
*priv
= netdev_priv(dev
);
247 mlx5e_ethtool_get_ringparam(priv
, param
);
250 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv
*priv
,
251 struct ethtool_ringparam
*param
)
253 struct mlx5e_channels new_channels
= {};
258 if (param
->rx_jumbo_pending
) {
259 netdev_info(priv
->netdev
, "%s: rx_jumbo_pending not supported\n",
263 if (param
->rx_mini_pending
) {
264 netdev_info(priv
->netdev
, "%s: rx_mini_pending not supported\n",
269 if (param
->rx_pending
< (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE
)) {
270 netdev_info(priv
->netdev
, "%s: rx_pending (%d) < min (%d)\n",
271 __func__
, param
->rx_pending
,
272 1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE
);
276 if (param
->tx_pending
< (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE
)) {
277 netdev_info(priv
->netdev
, "%s: tx_pending (%d) < min (%d)\n",
278 __func__
, param
->tx_pending
,
279 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE
);
283 log_rq_size
= order_base_2(param
->rx_pending
);
284 log_sq_size
= order_base_2(param
->tx_pending
);
286 if (log_rq_size
== priv
->channels
.params
.log_rq_mtu_frames
&&
287 log_sq_size
== priv
->channels
.params
.log_sq_size
)
290 mutex_lock(&priv
->state_lock
);
292 new_channels
.params
= priv
->channels
.params
;
293 new_channels
.params
.log_rq_mtu_frames
= log_rq_size
;
294 new_channels
.params
.log_sq_size
= log_sq_size
;
296 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
297 priv
->channels
.params
= new_channels
.params
;
301 err
= mlx5e_open_channels(priv
, &new_channels
);
305 mlx5e_switch_priv_channels(priv
, &new_channels
, NULL
);
308 mutex_unlock(&priv
->state_lock
);
313 static int mlx5e_set_ringparam(struct net_device
*dev
,
314 struct ethtool_ringparam
*param
)
316 struct mlx5e_priv
*priv
= netdev_priv(dev
);
318 return mlx5e_ethtool_set_ringparam(priv
, param
);
321 void mlx5e_ethtool_get_channels(struct mlx5e_priv
*priv
,
322 struct ethtool_channels
*ch
)
324 ch
->max_combined
= mlx5e_get_netdev_max_channels(priv
->netdev
);
325 ch
->combined_count
= priv
->channels
.params
.num_channels
;
328 static void mlx5e_get_channels(struct net_device
*dev
,
329 struct ethtool_channels
*ch
)
331 struct mlx5e_priv
*priv
= netdev_priv(dev
);
333 mlx5e_ethtool_get_channels(priv
, ch
);
336 int mlx5e_ethtool_set_channels(struct mlx5e_priv
*priv
,
337 struct ethtool_channels
*ch
)
339 unsigned int count
= ch
->combined_count
;
340 struct mlx5e_channels new_channels
= {};
345 netdev_info(priv
->netdev
, "%s: combined_count=0 not supported\n",
350 if (priv
->channels
.params
.num_channels
== count
)
353 mutex_lock(&priv
->state_lock
);
355 new_channels
.params
= priv
->channels
.params
;
356 new_channels
.params
.num_channels
= count
;
357 if (!netif_is_rxfh_configured(priv
->netdev
))
358 mlx5e_build_default_indir_rqt(priv
->rss_params
.indirection_rqt
,
359 MLX5E_INDIR_RQT_SIZE
, count
);
361 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
362 priv
->channels
.params
= new_channels
.params
;
366 /* Create fresh channels with new parameters */
367 err
= mlx5e_open_channels(priv
, &new_channels
);
371 arfs_enabled
= priv
->netdev
->features
& NETIF_F_NTUPLE
;
373 mlx5e_arfs_disable(priv
);
375 /* Switch to new channels, set new parameters and close old ones */
376 mlx5e_switch_priv_channels(priv
, &new_channels
, NULL
);
379 err
= mlx5e_arfs_enable(priv
);
381 netdev_err(priv
->netdev
, "%s: mlx5e_arfs_enable failed: %d\n",
386 mutex_unlock(&priv
->state_lock
);
391 static int mlx5e_set_channels(struct net_device
*dev
,
392 struct ethtool_channels
*ch
)
394 struct mlx5e_priv
*priv
= netdev_priv(dev
);
396 return mlx5e_ethtool_set_channels(priv
, ch
);
399 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv
*priv
,
400 struct ethtool_coalesce
*coal
)
402 struct net_dim_cq_moder
*rx_moder
, *tx_moder
;
404 if (!MLX5_CAP_GEN(priv
->mdev
, cq_moderation
))
407 rx_moder
= &priv
->channels
.params
.rx_cq_moderation
;
408 coal
->rx_coalesce_usecs
= rx_moder
->usec
;
409 coal
->rx_max_coalesced_frames
= rx_moder
->pkts
;
410 coal
->use_adaptive_rx_coalesce
= priv
->channels
.params
.rx_dim_enabled
;
412 tx_moder
= &priv
->channels
.params
.tx_cq_moderation
;
413 coal
->tx_coalesce_usecs
= tx_moder
->usec
;
414 coal
->tx_max_coalesced_frames
= tx_moder
->pkts
;
415 coal
->use_adaptive_tx_coalesce
= priv
->channels
.params
.tx_dim_enabled
;
420 static int mlx5e_get_coalesce(struct net_device
*netdev
,
421 struct ethtool_coalesce
*coal
)
423 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
425 return mlx5e_ethtool_get_coalesce(priv
, coal
);
428 #define MLX5E_MAX_COAL_TIME MLX5_MAX_CQ_PERIOD
429 #define MLX5E_MAX_COAL_FRAMES MLX5_MAX_CQ_COUNT
432 mlx5e_set_priv_channels_coalesce(struct mlx5e_priv
*priv
, struct ethtool_coalesce
*coal
)
434 struct mlx5_core_dev
*mdev
= priv
->mdev
;
438 for (i
= 0; i
< priv
->channels
.num
; ++i
) {
439 struct mlx5e_channel
*c
= priv
->channels
.c
[i
];
441 for (tc
= 0; tc
< c
->num_tc
; tc
++) {
442 mlx5_core_modify_cq_moderation(mdev
,
444 coal
->tx_coalesce_usecs
,
445 coal
->tx_max_coalesced_frames
);
448 mlx5_core_modify_cq_moderation(mdev
, &c
->rq
.cq
.mcq
,
449 coal
->rx_coalesce_usecs
,
450 coal
->rx_max_coalesced_frames
);
454 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv
*priv
,
455 struct ethtool_coalesce
*coal
)
457 struct net_dim_cq_moder
*rx_moder
, *tx_moder
;
458 struct mlx5_core_dev
*mdev
= priv
->mdev
;
459 struct mlx5e_channels new_channels
= {};
463 if (!MLX5_CAP_GEN(mdev
, cq_moderation
))
466 if (coal
->tx_coalesce_usecs
> MLX5E_MAX_COAL_TIME
||
467 coal
->rx_coalesce_usecs
> MLX5E_MAX_COAL_TIME
) {
468 netdev_info(priv
->netdev
, "%s: maximum coalesce time supported is %lu usecs\n",
469 __func__
, MLX5E_MAX_COAL_TIME
);
473 if (coal
->tx_max_coalesced_frames
> MLX5E_MAX_COAL_FRAMES
||
474 coal
->rx_max_coalesced_frames
> MLX5E_MAX_COAL_FRAMES
) {
475 netdev_info(priv
->netdev
, "%s: maximum coalesced frames supported is %lu\n",
476 __func__
, MLX5E_MAX_COAL_FRAMES
);
480 mutex_lock(&priv
->state_lock
);
481 new_channels
.params
= priv
->channels
.params
;
483 rx_moder
= &new_channels
.params
.rx_cq_moderation
;
484 rx_moder
->usec
= coal
->rx_coalesce_usecs
;
485 rx_moder
->pkts
= coal
->rx_max_coalesced_frames
;
486 new_channels
.params
.rx_dim_enabled
= !!coal
->use_adaptive_rx_coalesce
;
488 tx_moder
= &new_channels
.params
.tx_cq_moderation
;
489 tx_moder
->usec
= coal
->tx_coalesce_usecs
;
490 tx_moder
->pkts
= coal
->tx_max_coalesced_frames
;
491 new_channels
.params
.tx_dim_enabled
= !!coal
->use_adaptive_tx_coalesce
;
493 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
494 priv
->channels
.params
= new_channels
.params
;
499 reset
= (!!coal
->use_adaptive_rx_coalesce
!= priv
->channels
.params
.rx_dim_enabled
) ||
500 (!!coal
->use_adaptive_tx_coalesce
!= priv
->channels
.params
.tx_dim_enabled
);
503 mlx5e_set_priv_channels_coalesce(priv
, coal
);
504 priv
->channels
.params
= new_channels
.params
;
508 /* open fresh channels with new coal parameters */
509 err
= mlx5e_open_channels(priv
, &new_channels
);
513 mlx5e_switch_priv_channels(priv
, &new_channels
, NULL
);
516 mutex_unlock(&priv
->state_lock
);
520 static int mlx5e_set_coalesce(struct net_device
*netdev
,
521 struct ethtool_coalesce
*coal
)
523 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
525 return mlx5e_ethtool_set_coalesce(priv
, coal
);
528 static void ptys2ethtool_supported_link(unsigned long *supported_modes
,
531 unsigned long proto_cap
= eth_proto_cap
;
534 for_each_set_bit(proto
, &proto_cap
, MLX5E_LINK_MODES_NUMBER
)
535 bitmap_or(supported_modes
, supported_modes
,
536 ptys2ethtool_table
[proto
].supported
,
537 __ETHTOOL_LINK_MODE_MASK_NBITS
);
540 static void ptys2ethtool_adver_link(unsigned long *advertising_modes
,
543 unsigned long proto_cap
= eth_proto_cap
;
546 for_each_set_bit(proto
, &proto_cap
, MLX5E_LINK_MODES_NUMBER
)
547 bitmap_or(advertising_modes
, advertising_modes
,
548 ptys2ethtool_table
[proto
].advertised
,
549 __ETHTOOL_LINK_MODE_MASK_NBITS
);
552 static const u32 pplm_fec_2_ethtool
[] = {
553 [MLX5E_FEC_NOFEC
] = ETHTOOL_FEC_OFF
,
554 [MLX5E_FEC_FIRECODE
] = ETHTOOL_FEC_BASER
,
555 [MLX5E_FEC_RS_528_514
] = ETHTOOL_FEC_RS
,
558 static u32
pplm2ethtool_fec(u_long fec_mode
, unsigned long size
)
563 return ETHTOOL_FEC_AUTO
;
565 mode
= find_first_bit(&fec_mode
, size
);
567 if (mode
< ARRAY_SIZE(pplm_fec_2_ethtool
))
568 return pplm_fec_2_ethtool
[mode
];
573 /* we use ETHTOOL_FEC_* offset and apply it to ETHTOOL_LINK_MODE_FEC_*_BIT */
574 static u32
ethtool_fec2ethtool_caps(u_long ethtool_fec_code
)
578 offset
= find_first_bit(ðtool_fec_code
, sizeof(u32
));
579 offset
-= ETHTOOL_FEC_OFF_BIT
;
580 offset
+= ETHTOOL_LINK_MODE_FEC_NONE_BIT
;
585 static int get_fec_supported_advertised(struct mlx5_core_dev
*dev
,
586 struct ethtool_link_ksettings
*link_ksettings
)
594 err
= mlx5e_get_fec_caps(dev
, (u8
*)&fec_caps
);
596 return (err
== -EOPNOTSUPP
) ? 0 : err
;
598 err
= mlx5e_get_fec_mode(dev
, &active_fec
, NULL
);
602 for_each_set_bit(bitn
, &fec_caps
, ARRAY_SIZE(pplm_fec_2_ethtool
)) {
603 u_long ethtool_bitmask
= pplm_fec_2_ethtool
[bitn
];
605 offset
= ethtool_fec2ethtool_caps(ethtool_bitmask
);
606 __set_bit(offset
, link_ksettings
->link_modes
.supported
);
609 active_fec
= pplm2ethtool_fec(active_fec
, sizeof(u32
) * BITS_PER_BYTE
);
610 offset
= ethtool_fec2ethtool_caps(active_fec
);
611 __set_bit(offset
, link_ksettings
->link_modes
.advertising
);
616 static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings
*link_ksettings
,
620 if (!connector_type
|| connector_type
>= MLX5E_CONNECTOR_TYPE_NUMBER
) {
621 if (eth_proto_cap
& (MLX5E_PROT_MASK(MLX5E_10GBASE_CR
)
622 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR
)
623 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4
)
624 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4
)
625 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4
)
626 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII
))) {
627 ethtool_link_ksettings_add_link_mode(link_ksettings
,
630 ethtool_link_ksettings_add_link_mode(link_ksettings
,
635 if (eth_proto_cap
& (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4
)
636 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4
)
637 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR
)
638 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4
)
639 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX
))) {
640 ethtool_link_ksettings_add_link_mode(link_ksettings
,
643 ethtool_link_ksettings_add_link_mode(link_ksettings
,
650 switch (connector_type
) {
652 ethtool_link_ksettings_add_link_mode(link_ksettings
,
654 ethtool_link_ksettings_add_link_mode(link_ksettings
,
658 ethtool_link_ksettings_add_link_mode(link_ksettings
,
660 ethtool_link_ksettings_add_link_mode(link_ksettings
,
664 ethtool_link_ksettings_add_link_mode(link_ksettings
,
666 ethtool_link_ksettings_add_link_mode(link_ksettings
,
670 ethtool_link_ksettings_add_link_mode(link_ksettings
,
672 ethtool_link_ksettings_add_link_mode(link_ksettings
,
675 case MLX5E_PORT_FIBRE
:
676 ethtool_link_ksettings_add_link_mode(link_ksettings
,
678 ethtool_link_ksettings_add_link_mode(link_ksettings
,
682 ethtool_link_ksettings_add_link_mode(link_ksettings
,
683 supported
, Backplane
);
684 ethtool_link_ksettings_add_link_mode(link_ksettings
,
685 advertising
, Backplane
);
687 case MLX5E_PORT_NONE
:
688 case MLX5E_PORT_OTHER
:
694 static void get_speed_duplex(struct net_device
*netdev
,
696 struct ethtool_link_ksettings
*link_ksettings
)
698 u32 speed
= SPEED_UNKNOWN
;
699 u8 duplex
= DUPLEX_UNKNOWN
;
701 if (!netif_carrier_ok(netdev
))
704 speed
= mlx5e_port_ptys2speed(eth_proto_oper
);
706 speed
= SPEED_UNKNOWN
;
710 duplex
= DUPLEX_FULL
;
713 link_ksettings
->base
.speed
= speed
;
714 link_ksettings
->base
.duplex
= duplex
;
717 static void get_supported(u32 eth_proto_cap
,
718 struct ethtool_link_ksettings
*link_ksettings
)
720 unsigned long *supported
= link_ksettings
->link_modes
.supported
;
722 ptys2ethtool_supported_link(supported
, eth_proto_cap
);
723 ethtool_link_ksettings_add_link_mode(link_ksettings
, supported
, Pause
);
726 static void get_advertising(u32 eth_proto_cap
, u8 tx_pause
,
728 struct ethtool_link_ksettings
*link_ksettings
)
730 unsigned long *advertising
= link_ksettings
->link_modes
.advertising
;
732 ptys2ethtool_adver_link(advertising
, eth_proto_cap
);
734 ethtool_link_ksettings_add_link_mode(link_ksettings
, advertising
, Pause
);
735 if (tx_pause
^ rx_pause
)
736 ethtool_link_ksettings_add_link_mode(link_ksettings
, advertising
, Asym_Pause
);
739 static int ptys2connector_type
[MLX5E_CONNECTOR_TYPE_NUMBER
] = {
740 [MLX5E_PORT_UNKNOWN
] = PORT_OTHER
,
741 [MLX5E_PORT_NONE
] = PORT_NONE
,
742 [MLX5E_PORT_TP
] = PORT_TP
,
743 [MLX5E_PORT_AUI
] = PORT_AUI
,
744 [MLX5E_PORT_BNC
] = PORT_BNC
,
745 [MLX5E_PORT_MII
] = PORT_MII
,
746 [MLX5E_PORT_FIBRE
] = PORT_FIBRE
,
747 [MLX5E_PORT_DA
] = PORT_DA
,
748 [MLX5E_PORT_OTHER
] = PORT_OTHER
,
751 static u8
get_connector_port(u32 eth_proto
, u8 connector_type
)
753 if (connector_type
&& connector_type
< MLX5E_CONNECTOR_TYPE_NUMBER
)
754 return ptys2connector_type
[connector_type
];
757 (MLX5E_PROT_MASK(MLX5E_10GBASE_SR
) |
758 MLX5E_PROT_MASK(MLX5E_40GBASE_SR4
) |
759 MLX5E_PROT_MASK(MLX5E_100GBASE_SR4
) |
760 MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII
))) {
765 (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4
) |
766 MLX5E_PROT_MASK(MLX5E_10GBASE_CR
) |
767 MLX5E_PROT_MASK(MLX5E_100GBASE_CR4
))) {
772 (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4
) |
773 MLX5E_PROT_MASK(MLX5E_10GBASE_KR
) |
774 MLX5E_PROT_MASK(MLX5E_40GBASE_KR4
) |
775 MLX5E_PROT_MASK(MLX5E_100GBASE_KR4
))) {
782 static void get_lp_advertising(u32 eth_proto_lp
,
783 struct ethtool_link_ksettings
*link_ksettings
)
785 unsigned long *lp_advertising
= link_ksettings
->link_modes
.lp_advertising
;
787 ptys2ethtool_adver_link(lp_advertising
, eth_proto_lp
);
790 int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv
*priv
,
791 struct ethtool_link_ksettings
*link_ksettings
)
793 struct mlx5_core_dev
*mdev
= priv
->mdev
;
794 u32 out
[MLX5_ST_SZ_DW(ptys_reg
)] = {0};
806 err
= mlx5_query_port_ptys(mdev
, out
, sizeof(out
), MLX5_PTYS_EN
, 1);
808 netdev_err(priv
->netdev
, "%s: query port ptys failed: %d\n",
813 eth_proto_cap
= MLX5_GET(ptys_reg
, out
, eth_proto_capability
);
814 eth_proto_admin
= MLX5_GET(ptys_reg
, out
, eth_proto_admin
);
815 eth_proto_oper
= MLX5_GET(ptys_reg
, out
, eth_proto_oper
);
816 eth_proto_lp
= MLX5_GET(ptys_reg
, out
, eth_proto_lp_advertise
);
817 an_disable_admin
= MLX5_GET(ptys_reg
, out
, an_disable_admin
);
818 an_status
= MLX5_GET(ptys_reg
, out
, an_status
);
819 connector_type
= MLX5_GET(ptys_reg
, out
, connector_type
);
821 mlx5_query_port_pause(mdev
, &rx_pause
, &tx_pause
);
823 ethtool_link_ksettings_zero_link_mode(link_ksettings
, supported
);
824 ethtool_link_ksettings_zero_link_mode(link_ksettings
, advertising
);
826 get_supported(eth_proto_cap
, link_ksettings
);
827 get_advertising(eth_proto_admin
, tx_pause
, rx_pause
, link_ksettings
);
828 get_speed_duplex(priv
->netdev
, eth_proto_oper
, link_ksettings
);
830 eth_proto_oper
= eth_proto_oper
? eth_proto_oper
: eth_proto_cap
;
832 link_ksettings
->base
.port
= get_connector_port(eth_proto_oper
,
834 ptys2ethtool_supported_advertised_port(link_ksettings
, eth_proto_admin
,
836 get_lp_advertising(eth_proto_lp
, link_ksettings
);
838 if (an_status
== MLX5_AN_COMPLETE
)
839 ethtool_link_ksettings_add_link_mode(link_ksettings
,
840 lp_advertising
, Autoneg
);
842 link_ksettings
->base
.autoneg
= an_disable_admin
? AUTONEG_DISABLE
:
844 ethtool_link_ksettings_add_link_mode(link_ksettings
, supported
,
847 err
= get_fec_supported_advertised(mdev
, link_ksettings
);
849 netdev_dbg(priv
->netdev
, "%s: FEC caps query failed: %d\n",
851 err
= 0; /* don't fail caps query because of FEC error */
854 if (!an_disable_admin
)
855 ethtool_link_ksettings_add_link_mode(link_ksettings
,
856 advertising
, Autoneg
);
862 static int mlx5e_get_link_ksettings(struct net_device
*netdev
,
863 struct ethtool_link_ksettings
*link_ksettings
)
865 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
867 return mlx5e_ethtool_get_link_ksettings(priv
, link_ksettings
);
870 static u32
mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes
)
872 u32 i
, ptys_modes
= 0;
874 for (i
= 0; i
< MLX5E_LINK_MODES_NUMBER
; ++i
) {
875 if (bitmap_intersects(ptys2ethtool_table
[i
].advertised
,
877 __ETHTOOL_LINK_MODE_MASK_NBITS
))
878 ptys_modes
|= MLX5E_PROT_MASK(i
);
884 int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv
*priv
,
885 const struct ethtool_link_ksettings
*link_ksettings
)
887 struct mlx5_core_dev
*mdev
= priv
->mdev
;
888 u32 eth_proto_cap
, eth_proto_admin
;
889 bool an_changes
= false;
898 speed
= link_ksettings
->base
.speed
;
900 link_modes
= link_ksettings
->base
.autoneg
== AUTONEG_ENABLE
?
901 mlx5e_ethtool2ptys_adver_link(link_ksettings
->link_modes
.advertising
) :
902 mlx5e_port_speed2linkmodes(speed
);
904 err
= mlx5_query_port_proto_cap(mdev
, ð_proto_cap
, MLX5_PTYS_EN
);
906 netdev_err(priv
->netdev
, "%s: query port eth proto cap failed: %d\n",
911 link_modes
= link_modes
& eth_proto_cap
;
913 netdev_err(priv
->netdev
, "%s: Not supported link mode(s) requested",
919 err
= mlx5_query_port_proto_admin(mdev
, ð_proto_admin
, MLX5_PTYS_EN
);
921 netdev_err(priv
->netdev
, "%s: query port eth proto admin failed: %d\n",
926 mlx5_query_port_autoneg(mdev
, MLX5_PTYS_EN
, &an_status
,
927 &an_disable_cap
, &an_disable_admin
);
929 an_disable
= link_ksettings
->base
.autoneg
== AUTONEG_DISABLE
;
930 an_changes
= ((!an_disable
&& an_disable_admin
) ||
931 (an_disable
&& !an_disable_admin
));
933 if (!an_changes
&& link_modes
== eth_proto_admin
)
936 mlx5_set_port_ptys(mdev
, an_disable
, link_modes
, MLX5_PTYS_EN
);
937 mlx5_toggle_port_link(mdev
);
943 static int mlx5e_set_link_ksettings(struct net_device
*netdev
,
944 const struct ethtool_link_ksettings
*link_ksettings
)
946 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
948 return mlx5e_ethtool_set_link_ksettings(priv
, link_ksettings
);
951 u32
mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv
*priv
)
953 return sizeof(priv
->rss_params
.toeplitz_hash_key
);
956 static u32
mlx5e_get_rxfh_key_size(struct net_device
*netdev
)
958 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
960 return mlx5e_ethtool_get_rxfh_key_size(priv
);
963 u32
mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv
*priv
)
965 return MLX5E_INDIR_RQT_SIZE
;
968 static u32
mlx5e_get_rxfh_indir_size(struct net_device
*netdev
)
970 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
972 return mlx5e_ethtool_get_rxfh_indir_size(priv
);
975 static int mlx5e_get_rxfh(struct net_device
*netdev
, u32
*indir
, u8
*key
,
978 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
979 struct mlx5e_rss_params
*rss
= &priv
->rss_params
;
982 memcpy(indir
, rss
->indirection_rqt
,
983 sizeof(rss
->indirection_rqt
));
986 memcpy(key
, rss
->toeplitz_hash_key
,
987 sizeof(rss
->toeplitz_hash_key
));
995 static int mlx5e_set_rxfh(struct net_device
*dev
, const u32
*indir
,
996 const u8
*key
, const u8 hfunc
)
998 struct mlx5e_priv
*priv
= netdev_priv(dev
);
999 struct mlx5e_rss_params
*rss
= &priv
->rss_params
;
1000 int inlen
= MLX5_ST_SZ_BYTES(modify_tir_in
);
1001 bool hash_changed
= false;
1004 if ((hfunc
!= ETH_RSS_HASH_NO_CHANGE
) &&
1005 (hfunc
!= ETH_RSS_HASH_XOR
) &&
1006 (hfunc
!= ETH_RSS_HASH_TOP
))
1009 in
= kvzalloc(inlen
, GFP_KERNEL
);
1013 mutex_lock(&priv
->state_lock
);
1015 if (hfunc
!= ETH_RSS_HASH_NO_CHANGE
&& hfunc
!= rss
->hfunc
) {
1017 hash_changed
= true;
1021 memcpy(rss
->indirection_rqt
, indir
,
1022 sizeof(rss
->indirection_rqt
));
1024 if (test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
1025 u32 rqtn
= priv
->indir_rqt
.rqtn
;
1026 struct mlx5e_redirect_rqt_param rrp
= {
1030 .hfunc
= rss
->hfunc
,
1031 .channels
= &priv
->channels
,
1036 mlx5e_redirect_rqt(priv
, rqtn
, MLX5E_INDIR_RQT_SIZE
, rrp
);
1041 memcpy(rss
->toeplitz_hash_key
, key
,
1042 sizeof(rss
->toeplitz_hash_key
));
1043 hash_changed
= hash_changed
|| rss
->hfunc
== ETH_RSS_HASH_TOP
;
1047 mlx5e_modify_tirs_hash(priv
, in
, inlen
);
1049 mutex_unlock(&priv
->state_lock
);
1056 #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC 100
1057 #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC 8000
1058 #define MLX5E_PFC_PREVEN_MINOR_PRECENT 85
1059 #define MLX5E_PFC_PREVEN_TOUT_MIN_MSEC 80
1060 #define MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout) \
1061 max_t(u16, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC, \
1062 (critical_tout * MLX5E_PFC_PREVEN_MINOR_PRECENT) / 100)
1064 static int mlx5e_get_pfc_prevention_tout(struct net_device
*netdev
,
1065 u16
*pfc_prevention_tout
)
1067 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1068 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1070 if (!MLX5_CAP_PCAM_FEATURE((priv
)->mdev
, pfcc_mask
) ||
1071 !MLX5_CAP_DEBUG((priv
)->mdev
, stall_detect
))
1074 return mlx5_query_port_stall_watermark(mdev
, pfc_prevention_tout
, NULL
);
1077 static int mlx5e_set_pfc_prevention_tout(struct net_device
*netdev
,
1080 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1081 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1085 if (!MLX5_CAP_PCAM_FEATURE((priv
)->mdev
, pfcc_mask
) ||
1086 !MLX5_CAP_DEBUG((priv
)->mdev
, stall_detect
))
1089 critical_tout
= (pfc_preven
== PFC_STORM_PREVENTION_AUTO
) ?
1090 MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC
:
1093 if (critical_tout
!= PFC_STORM_PREVENTION_DISABLE
&&
1094 (critical_tout
> MLX5E_PFC_PREVEN_TOUT_MAX_MSEC
||
1095 critical_tout
< MLX5E_PFC_PREVEN_TOUT_MIN_MSEC
)) {
1096 netdev_info(netdev
, "%s: pfc prevention tout not in range (%d-%d)\n",
1097 __func__
, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC
,
1098 MLX5E_PFC_PREVEN_TOUT_MAX_MSEC
);
1102 minor
= MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout
);
1103 return mlx5_set_port_stall_watermark(mdev
, critical_tout
,
1107 static int mlx5e_get_tunable(struct net_device
*dev
,
1108 const struct ethtool_tunable
*tuna
,
1114 case ETHTOOL_PFC_PREVENTION_TOUT
:
1115 err
= mlx5e_get_pfc_prevention_tout(dev
, data
);
1125 static int mlx5e_set_tunable(struct net_device
*dev
,
1126 const struct ethtool_tunable
*tuna
,
1129 struct mlx5e_priv
*priv
= netdev_priv(dev
);
1132 mutex_lock(&priv
->state_lock
);
1135 case ETHTOOL_PFC_PREVENTION_TOUT
:
1136 err
= mlx5e_set_pfc_prevention_tout(dev
, *(u16
*)data
);
1143 mutex_unlock(&priv
->state_lock
);
1147 void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv
*priv
,
1148 struct ethtool_pauseparam
*pauseparam
)
1150 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1153 err
= mlx5_query_port_pause(mdev
, &pauseparam
->rx_pause
,
1154 &pauseparam
->tx_pause
);
1156 netdev_err(priv
->netdev
, "%s: mlx5_query_port_pause failed:0x%x\n",
1161 static void mlx5e_get_pauseparam(struct net_device
*netdev
,
1162 struct ethtool_pauseparam
*pauseparam
)
1164 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1166 mlx5e_ethtool_get_pauseparam(priv
, pauseparam
);
1169 int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv
*priv
,
1170 struct ethtool_pauseparam
*pauseparam
)
1172 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1175 if (pauseparam
->autoneg
)
1178 err
= mlx5_set_port_pause(mdev
,
1179 pauseparam
->rx_pause
? 1 : 0,
1180 pauseparam
->tx_pause
? 1 : 0);
1182 netdev_err(priv
->netdev
, "%s: mlx5_set_port_pause failed:0x%x\n",
1189 static int mlx5e_set_pauseparam(struct net_device
*netdev
,
1190 struct ethtool_pauseparam
*pauseparam
)
1192 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1194 return mlx5e_ethtool_set_pauseparam(priv
, pauseparam
);
1197 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv
*priv
,
1198 struct ethtool_ts_info
*info
)
1200 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1202 info
->phc_index
= mlx5_clock_get_ptp_index(mdev
);
1204 if (!MLX5_CAP_GEN(priv
->mdev
, device_frequency_khz
) ||
1205 info
->phc_index
== -1)
1208 info
->so_timestamping
= SOF_TIMESTAMPING_TX_HARDWARE
|
1209 SOF_TIMESTAMPING_RX_HARDWARE
|
1210 SOF_TIMESTAMPING_RAW_HARDWARE
;
1212 info
->tx_types
= BIT(HWTSTAMP_TX_OFF
) |
1213 BIT(HWTSTAMP_TX_ON
);
1215 info
->rx_filters
= BIT(HWTSTAMP_FILTER_NONE
) |
1216 BIT(HWTSTAMP_FILTER_ALL
);
1221 static int mlx5e_get_ts_info(struct net_device
*dev
,
1222 struct ethtool_ts_info
*info
)
1224 struct mlx5e_priv
*priv
= netdev_priv(dev
);
1226 return mlx5e_ethtool_get_ts_info(priv
, info
);
1229 static __u32
mlx5e_get_wol_supported(struct mlx5_core_dev
*mdev
)
1233 if (MLX5_CAP_GEN(mdev
, wol_g
))
1236 if (MLX5_CAP_GEN(mdev
, wol_s
))
1237 ret
|= WAKE_MAGICSECURE
;
1239 if (MLX5_CAP_GEN(mdev
, wol_a
))
1242 if (MLX5_CAP_GEN(mdev
, wol_b
))
1245 if (MLX5_CAP_GEN(mdev
, wol_m
))
1248 if (MLX5_CAP_GEN(mdev
, wol_u
))
1251 if (MLX5_CAP_GEN(mdev
, wol_p
))
1257 static __u32
mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode
)
1261 if (mode
& MLX5_WOL_MAGIC
)
1264 if (mode
& MLX5_WOL_SECURED_MAGIC
)
1265 ret
|= WAKE_MAGICSECURE
;
1267 if (mode
& MLX5_WOL_ARP
)
1270 if (mode
& MLX5_WOL_BROADCAST
)
1273 if (mode
& MLX5_WOL_MULTICAST
)
1276 if (mode
& MLX5_WOL_UNICAST
)
1279 if (mode
& MLX5_WOL_PHY_ACTIVITY
)
1285 static u8
mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode
)
1289 if (mode
& WAKE_MAGIC
)
1290 ret
|= MLX5_WOL_MAGIC
;
1292 if (mode
& WAKE_MAGICSECURE
)
1293 ret
|= MLX5_WOL_SECURED_MAGIC
;
1295 if (mode
& WAKE_ARP
)
1296 ret
|= MLX5_WOL_ARP
;
1298 if (mode
& WAKE_BCAST
)
1299 ret
|= MLX5_WOL_BROADCAST
;
1301 if (mode
& WAKE_MCAST
)
1302 ret
|= MLX5_WOL_MULTICAST
;
1304 if (mode
& WAKE_UCAST
)
1305 ret
|= MLX5_WOL_UNICAST
;
1307 if (mode
& WAKE_PHY
)
1308 ret
|= MLX5_WOL_PHY_ACTIVITY
;
1313 static void mlx5e_get_wol(struct net_device
*netdev
,
1314 struct ethtool_wolinfo
*wol
)
1316 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1317 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1321 memset(wol
, 0, sizeof(*wol
));
1323 wol
->supported
= mlx5e_get_wol_supported(mdev
);
1324 if (!wol
->supported
)
1327 err
= mlx5_query_port_wol(mdev
, &mlx5_wol_mode
);
1331 wol
->wolopts
= mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode
);
1334 static int mlx5e_set_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
1336 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1337 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1338 __u32 wol_supported
= mlx5e_get_wol_supported(mdev
);
1344 if (wol
->wolopts
& ~wol_supported
)
1347 mlx5_wol_mode
= mlx5e_refomrat_wol_mode_linux_to_mlx5(wol
->wolopts
);
1349 return mlx5_set_port_wol(mdev
, mlx5_wol_mode
);
1352 static int mlx5e_get_fecparam(struct net_device
*netdev
,
1353 struct ethtool_fecparam
*fecparam
)
1355 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1356 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1357 u8 fec_configured
= 0;
1361 err
= mlx5e_get_fec_mode(mdev
, &fec_active
, &fec_configured
);
1366 fecparam
->active_fec
= pplm2ethtool_fec((u_long
)fec_active
,
1367 sizeof(u32
) * BITS_PER_BYTE
);
1369 if (!fecparam
->active_fec
)
1372 fecparam
->fec
= pplm2ethtool_fec((u_long
)fec_configured
,
1373 sizeof(u8
) * BITS_PER_BYTE
);
1378 static int mlx5e_set_fecparam(struct net_device
*netdev
,
1379 struct ethtool_fecparam
*fecparam
)
1381 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1382 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1387 for (mode
= 0; mode
< ARRAY_SIZE(pplm_fec_2_ethtool
); mode
++) {
1388 if (!(pplm_fec_2_ethtool
[mode
] & fecparam
->fec
))
1390 fec_policy
|= (1 << mode
);
1394 err
= mlx5e_set_fec_mode(mdev
, fec_policy
);
1399 mlx5_toggle_port_link(mdev
);
1404 static u32
mlx5e_get_msglevel(struct net_device
*dev
)
1406 return ((struct mlx5e_priv
*)netdev_priv(dev
))->msglevel
;
1409 static void mlx5e_set_msglevel(struct net_device
*dev
, u32 val
)
1411 ((struct mlx5e_priv
*)netdev_priv(dev
))->msglevel
= val
;
1414 static int mlx5e_set_phys_id(struct net_device
*dev
,
1415 enum ethtool_phys_id_state state
)
1417 struct mlx5e_priv
*priv
= netdev_priv(dev
);
1418 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1419 u16 beacon_duration
;
1421 if (!MLX5_CAP_GEN(mdev
, beacon_led
))
1425 case ETHTOOL_ID_ACTIVE
:
1426 beacon_duration
= MLX5_BEACON_DURATION_INF
;
1428 case ETHTOOL_ID_INACTIVE
:
1429 beacon_duration
= MLX5_BEACON_DURATION_OFF
;
1435 return mlx5_set_port_beacon(mdev
, beacon_duration
);
1438 static int mlx5e_get_module_info(struct net_device
*netdev
,
1439 struct ethtool_modinfo
*modinfo
)
1441 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1442 struct mlx5_core_dev
*dev
= priv
->mdev
;
1446 size_read
= mlx5_query_module_eeprom(dev
, 0, 2, data
);
1450 /* data[0] = identifier byte */
1452 case MLX5_MODULE_ID_QSFP
:
1453 modinfo
->type
= ETH_MODULE_SFF_8436
;
1454 modinfo
->eeprom_len
= ETH_MODULE_SFF_8436_LEN
;
1456 case MLX5_MODULE_ID_QSFP_PLUS
:
1457 case MLX5_MODULE_ID_QSFP28
:
1458 /* data[1] = revision id */
1459 if (data
[0] == MLX5_MODULE_ID_QSFP28
|| data
[1] >= 0x3) {
1460 modinfo
->type
= ETH_MODULE_SFF_8636
;
1461 modinfo
->eeprom_len
= ETH_MODULE_SFF_8636_LEN
;
1463 modinfo
->type
= ETH_MODULE_SFF_8436
;
1464 modinfo
->eeprom_len
= ETH_MODULE_SFF_8436_LEN
;
1467 case MLX5_MODULE_ID_SFP
:
1468 modinfo
->type
= ETH_MODULE_SFF_8472
;
1469 modinfo
->eeprom_len
= ETH_MODULE_SFF_8472_LEN
;
1472 netdev_err(priv
->netdev
, "%s: cable type not recognized:0x%x\n",
1480 static int mlx5e_get_module_eeprom(struct net_device
*netdev
,
1481 struct ethtool_eeprom
*ee
,
1484 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1485 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1486 int offset
= ee
->offset
;
1493 memset(data
, 0, ee
->len
);
1495 while (i
< ee
->len
) {
1496 size_read
= mlx5_query_module_eeprom(mdev
, offset
, ee
->len
- i
,
1503 if (size_read
< 0) {
1504 netdev_err(priv
->netdev
, "%s: mlx5_query_eeprom failed:0x%x\n",
1505 __func__
, size_read
);
1510 offset
+= size_read
;
1516 static int set_pflag_cqe_based_moder(struct net_device
*netdev
, bool enable
,
1519 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1520 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1521 struct mlx5e_channels new_channels
= {};
1523 u8 cq_period_mode
, current_cq_period_mode
;
1526 cq_period_mode
= enable
?
1527 MLX5_CQ_PERIOD_MODE_START_FROM_CQE
:
1528 MLX5_CQ_PERIOD_MODE_START_FROM_EQE
;
1529 current_cq_period_mode
= is_rx_cq
?
1530 priv
->channels
.params
.rx_cq_moderation
.cq_period_mode
:
1531 priv
->channels
.params
.tx_cq_moderation
.cq_period_mode
;
1532 mode_changed
= cq_period_mode
!= current_cq_period_mode
;
1534 if (cq_period_mode
== MLX5_CQ_PERIOD_MODE_START_FROM_CQE
&&
1535 !MLX5_CAP_GEN(mdev
, cq_period_start_from_cqe
))
1541 new_channels
.params
= priv
->channels
.params
;
1543 mlx5e_set_rx_cq_mode_params(&new_channels
.params
, cq_period_mode
);
1545 mlx5e_set_tx_cq_mode_params(&new_channels
.params
, cq_period_mode
);
1547 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
1548 priv
->channels
.params
= new_channels
.params
;
1552 err
= mlx5e_open_channels(priv
, &new_channels
);
1556 mlx5e_switch_priv_channels(priv
, &new_channels
, NULL
);
1560 static int set_pflag_tx_cqe_based_moder(struct net_device
*netdev
, bool enable
)
1562 return set_pflag_cqe_based_moder(netdev
, enable
, false);
1565 static int set_pflag_rx_cqe_based_moder(struct net_device
*netdev
, bool enable
)
1567 return set_pflag_cqe_based_moder(netdev
, enable
, true);
1570 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv
*priv
, bool new_val
)
1572 bool curr_val
= MLX5E_GET_PFLAG(&priv
->channels
.params
, MLX5E_PFLAG_RX_CQE_COMPRESS
);
1573 struct mlx5e_channels new_channels
= {};
1576 if (!MLX5_CAP_GEN(priv
->mdev
, cqe_compression
))
1577 return new_val
? -EOPNOTSUPP
: 0;
1579 if (curr_val
== new_val
)
1582 new_channels
.params
= priv
->channels
.params
;
1583 MLX5E_SET_PFLAG(&new_channels
.params
, MLX5E_PFLAG_RX_CQE_COMPRESS
, new_val
);
1585 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
1586 priv
->channels
.params
= new_channels
.params
;
1590 err
= mlx5e_open_channels(priv
, &new_channels
);
1594 mlx5e_switch_priv_channels(priv
, &new_channels
, NULL
);
1595 mlx5e_dbg(DRV
, priv
, "MLX5E: RxCqeCmprss was turned %s\n",
1596 MLX5E_GET_PFLAG(&priv
->channels
.params
,
1597 MLX5E_PFLAG_RX_CQE_COMPRESS
) ? "ON" : "OFF");
1602 static int set_pflag_rx_cqe_compress(struct net_device
*netdev
,
1605 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1606 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1608 if (!MLX5_CAP_GEN(mdev
, cqe_compression
))
1611 if (enable
&& priv
->tstamp
.rx_filter
!= HWTSTAMP_FILTER_NONE
) {
1612 netdev_err(netdev
, "Can't enable cqe compression while timestamping is enabled.\n");
1616 mlx5e_modify_rx_cqe_compression_locked(priv
, enable
);
1617 priv
->channels
.params
.rx_cqe_compress_def
= enable
;
1622 static int set_pflag_rx_striding_rq(struct net_device
*netdev
, bool enable
)
1624 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1625 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1626 struct mlx5e_channels new_channels
= {};
1630 if (!mlx5e_check_fragmented_striding_rq_cap(mdev
))
1632 if (!mlx5e_striding_rq_possible(mdev
, &priv
->channels
.params
))
1634 } else if (priv
->channels
.params
.lro_en
) {
1635 netdev_warn(netdev
, "Can't set legacy RQ with LRO, disable LRO first\n");
1639 new_channels
.params
= priv
->channels
.params
;
1641 MLX5E_SET_PFLAG(&new_channels
.params
, MLX5E_PFLAG_RX_STRIDING_RQ
, enable
);
1642 mlx5e_set_rq_type(mdev
, &new_channels
.params
);
1644 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
1645 priv
->channels
.params
= new_channels
.params
;
1649 err
= mlx5e_open_channels(priv
, &new_channels
);
1653 mlx5e_switch_priv_channels(priv
, &new_channels
, NULL
);
1657 static int set_pflag_rx_no_csum_complete(struct net_device
*netdev
, bool enable
)
1659 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1660 struct mlx5e_channels
*channels
= &priv
->channels
;
1661 struct mlx5e_channel
*c
;
1664 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
))
1667 for (i
= 0; i
< channels
->num
; i
++) {
1670 __set_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE
, &c
->rq
.state
);
1672 __clear_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE
, &c
->rq
.state
);
1678 static int set_pflag_xdp_tx_mpwqe(struct net_device
*netdev
, bool enable
)
1680 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1681 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1682 struct mlx5e_channels new_channels
= {};
1685 if (enable
&& !MLX5_CAP_ETH(mdev
, enhanced_multi_pkt_send_wqe
))
1688 new_channels
.params
= priv
->channels
.params
;
1690 MLX5E_SET_PFLAG(&new_channels
.params
, MLX5E_PFLAG_XDP_TX_MPWQE
, enable
);
1692 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
1693 priv
->channels
.params
= new_channels
.params
;
1697 err
= mlx5e_open_channels(priv
, &new_channels
);
1701 mlx5e_switch_priv_channels(priv
, &new_channels
, NULL
);
1705 static const struct pflag_desc mlx5e_priv_flags
[MLX5E_NUM_PFLAGS
] = {
1706 { "rx_cqe_moder", set_pflag_rx_cqe_based_moder
},
1707 { "tx_cqe_moder", set_pflag_tx_cqe_based_moder
},
1708 { "rx_cqe_compress", set_pflag_rx_cqe_compress
},
1709 { "rx_striding_rq", set_pflag_rx_striding_rq
},
1710 { "rx_no_csum_complete", set_pflag_rx_no_csum_complete
},
1711 { "xdp_tx_mpwqe", set_pflag_xdp_tx_mpwqe
},
1714 static int mlx5e_handle_pflag(struct net_device
*netdev
,
1716 enum mlx5e_priv_flag flag
)
1718 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1719 bool enable
= !!(wanted_flags
& BIT(flag
));
1720 u32 changes
= wanted_flags
^ priv
->channels
.params
.pflags
;
1723 if (!(changes
& BIT(flag
)))
1726 err
= mlx5e_priv_flags
[flag
].handler(netdev
, enable
);
1728 netdev_err(netdev
, "%s private flag '%s' failed err %d\n",
1729 enable
? "Enable" : "Disable", mlx5e_priv_flags
[flag
].name
, err
);
1733 MLX5E_SET_PFLAG(&priv
->channels
.params
, flag
, enable
);
1737 static int mlx5e_set_priv_flags(struct net_device
*netdev
, u32 pflags
)
1739 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1740 enum mlx5e_priv_flag pflag
;
1743 mutex_lock(&priv
->state_lock
);
1745 for (pflag
= 0; pflag
< MLX5E_NUM_PFLAGS
; pflag
++) {
1746 err
= mlx5e_handle_pflag(netdev
, pflags
, pflag
);
1751 mutex_unlock(&priv
->state_lock
);
1753 /* Need to fix some features.. */
1754 netdev_update_features(netdev
);
1759 static u32
mlx5e_get_priv_flags(struct net_device
*netdev
)
1761 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1763 return priv
->channels
.params
.pflags
;
1766 int mlx5e_ethtool_flash_device(struct mlx5e_priv
*priv
,
1767 struct ethtool_flash
*flash
)
1769 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1770 struct net_device
*dev
= priv
->netdev
;
1771 const struct firmware
*fw
;
1774 if (flash
->region
!= ETHTOOL_FLASH_ALL_REGIONS
)
1777 err
= request_firmware_direct(&fw
, flash
->data
, &dev
->dev
);
1784 err
= mlx5_firmware_flash(mdev
, fw
);
1785 release_firmware(fw
);
1792 static int mlx5e_flash_device(struct net_device
*dev
,
1793 struct ethtool_flash
*flash
)
1795 struct mlx5e_priv
*priv
= netdev_priv(dev
);
1797 return mlx5e_ethtool_flash_device(priv
, flash
);
1800 const struct ethtool_ops mlx5e_ethtool_ops
= {
1801 .get_drvinfo
= mlx5e_get_drvinfo
,
1802 .get_link
= ethtool_op_get_link
,
1803 .get_strings
= mlx5e_get_strings
,
1804 .get_sset_count
= mlx5e_get_sset_count
,
1805 .get_ethtool_stats
= mlx5e_get_ethtool_stats
,
1806 .get_ringparam
= mlx5e_get_ringparam
,
1807 .set_ringparam
= mlx5e_set_ringparam
,
1808 .get_channels
= mlx5e_get_channels
,
1809 .set_channels
= mlx5e_set_channels
,
1810 .get_coalesce
= mlx5e_get_coalesce
,
1811 .set_coalesce
= mlx5e_set_coalesce
,
1812 .get_link_ksettings
= mlx5e_get_link_ksettings
,
1813 .set_link_ksettings
= mlx5e_set_link_ksettings
,
1814 .get_rxfh_key_size
= mlx5e_get_rxfh_key_size
,
1815 .get_rxfh_indir_size
= mlx5e_get_rxfh_indir_size
,
1816 .get_rxfh
= mlx5e_get_rxfh
,
1817 .set_rxfh
= mlx5e_set_rxfh
,
1818 #ifdef CONFIG_MLX5_EN_RXNFC
1819 .get_rxnfc
= mlx5e_get_rxnfc
,
1820 .set_rxnfc
= mlx5e_set_rxnfc
,
1822 .flash_device
= mlx5e_flash_device
,
1823 .get_tunable
= mlx5e_get_tunable
,
1824 .set_tunable
= mlx5e_set_tunable
,
1825 .get_pauseparam
= mlx5e_get_pauseparam
,
1826 .set_pauseparam
= mlx5e_set_pauseparam
,
1827 .get_ts_info
= mlx5e_get_ts_info
,
1828 .set_phys_id
= mlx5e_set_phys_id
,
1829 .get_wol
= mlx5e_get_wol
,
1830 .set_wol
= mlx5e_set_wol
,
1831 .get_module_info
= mlx5e_get_module_info
,
1832 .get_module_eeprom
= mlx5e_get_module_eeprom
,
1833 .get_priv_flags
= mlx5e_get_priv_flags
,
1834 .set_priv_flags
= mlx5e_set_priv_flags
,
1835 .self_test
= mlx5e_self_test
,
1836 .get_msglevel
= mlx5e_get_msglevel
,
1837 .set_msglevel
= mlx5e_set_msglevel
,
1838 .get_fecparam
= mlx5e_get_fecparam
,
1839 .set_fecparam
= mlx5e_set_fecparam
,