drivers/net/ethernet/mellanox/mlx5/core/en_stats.h

   1 /*
   2  * Copyright (c) 2015-2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 #ifndef __MLX5_EN_STATS_H__
  33 #define __MLX5_EN_STATS_H__
  34
  35 #define MLX5E_READ_CTR64_CPU(ptr, dsc, i) \
  36         (*(u64 *)((char *)ptr + dsc[i].offset))
  37 #define MLX5E_READ_CTR64_BE(ptr, dsc, i) \
  38         be64_to_cpu(*(__be64 *)((char *)ptr + dsc[i].offset))
  39 #define MLX5E_READ_CTR32_CPU(ptr, dsc, i) \
  40         (*(u32 *)((char *)ptr + dsc[i].offset))
  41 #define MLX5E_READ_CTR32_BE(ptr, dsc, i) \
  42         be64_to_cpu(*(__be32 *)((char *)ptr + dsc[i].offset))
  43
  44 #define MLX5E_DECLARE_STAT(type, fld) #fld, offsetof(type, fld)
  45 #define MLX5E_DECLARE_RX_STAT(type, fld) "rx%d_"#fld, offsetof(type, fld)
  46 #define MLX5E_DECLARE_TX_STAT(type, fld) "tx%d_"#fld, offsetof(type, fld)
  47
  48 struct counter_desc {
  49         char            format[ETH_GSTRING_LEN];
  50         int             offset; /* Byte offset */
  51 };
  52
  53 struct mlx5e_sw_stats {
  54         u64 rx_packets;
  55         u64 rx_bytes;
  56         u64 tx_packets;
  57         u64 tx_bytes;
  58         u64 tx_tso_packets;
  59         u64 tx_tso_bytes;
  60         u64 tx_tso_inner_packets;
  61         u64 tx_tso_inner_bytes;
  62         u64 rx_lro_packets;
  63         u64 rx_lro_bytes;
  64         u64 rx_csum_unnecessary;
  65         u64 rx_csum_none;
  66         u64 rx_csum_complete;
  67         u64 rx_csum_unnecessary_inner;
  68         u64 tx_csum_partial;
  69         u64 tx_csum_partial_inner;
  70         u64 tx_queue_stopped;
  71         u64 tx_queue_wake;
  72         u64 tx_queue_dropped;
  73         u64 rx_wqe_err;
  74         u64 rx_mpwqe_filler;
  75         u64 rx_mpwqe_frag;
  76         u64 rx_buff_alloc_err;
  77         u64 rx_cqe_compress_blks;
  78         u64 rx_cqe_compress_pkts;
  79
  80         /* Special handling counters */
  81         u64 link_down_events_phy;
  82 };
  83
  84 static const struct counter_desc sw_stats_desc[] = {
  85         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) },
  86         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) },
  87         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) },
  88         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) },
  89         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_packets) },
  90         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_bytes) },
  91         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_packets) },
  92         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_bytes) },
  93         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_packets) },
  94         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_bytes) },
  95         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary) },
  96         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_none) },
  97         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete) },
  98         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary_inner) },
  99         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial) },
 100         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial_inner) },
 101         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_stopped) },
 102         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_wake) },
 103         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_dropped) },
 104         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_wqe_err) },
 105         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_filler) },
 106         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_mpwqe_frag) },
 107         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_buff_alloc_err) },
 108         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_blks) },
 109         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_pkts) },
 110         { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, link_down_events_phy) },
 111 };
 112
 113 struct mlx5e_qcounter_stats {
 114         u32 rx_out_of_buffer;
 115 };
 116
 117 static const struct counter_desc q_stats_desc[] = {
 118         { MLX5E_DECLARE_STAT(struct mlx5e_qcounter_stats, rx_out_of_buffer) },
 119 };
 120
 121 #define VPORT_COUNTER_OFF(c) MLX5_BYTE_OFF(query_vport_counter_out, c)
 122 #define VPORT_COUNTER_GET(vstats, c) MLX5_GET64(query_vport_counter_out, \
 123                                                 vstats->query_vport_out, c)
 124
 125 struct mlx5e_vport_stats {
 126         __be64 query_vport_out[MLX5_ST_SZ_QW(query_vport_counter_out)];
 127 };
 128
 129 static const struct counter_desc vport_stats_desc[] = {
 130         { "rx_vport_unicast_packets",
 131                 VPORT_COUNTER_OFF(received_eth_unicast.packets) },
 132         { "rx_vport_unicast_bytes",
 133                 VPORT_COUNTER_OFF(received_eth_unicast.octets) },
 134         { "tx_vport_unicast_packets",
 135                 VPORT_COUNTER_OFF(transmitted_eth_unicast.packets) },
 136         { "tx_vport_unicast_bytes",
 137                 VPORT_COUNTER_OFF(transmitted_eth_unicast.octets) },
 138         { "rx_vport_multicast_packets",
 139                 VPORT_COUNTER_OFF(received_eth_multicast.packets) },
 140         { "rx_vport_multicast_bytes",
 141                 VPORT_COUNTER_OFF(received_eth_multicast.octets) },
 142         { "tx_vport_multicast_packets",
 143                 VPORT_COUNTER_OFF(transmitted_eth_multicast.packets) },
 144         { "tx_vport_multicast_bytes",
 145                 VPORT_COUNTER_OFF(transmitted_eth_multicast.octets) },
 146         { "rx_vport_broadcast_packets",
 147                 VPORT_COUNTER_OFF(received_eth_broadcast.packets) },
 148         { "rx_vport_broadcast_bytes",
 149                 VPORT_COUNTER_OFF(received_eth_broadcast.octets) },
 150         { "tx_vport_broadcast_packets",
 151                 VPORT_COUNTER_OFF(transmitted_eth_broadcast.packets) },
 152         { "tx_vport_broadcast_bytes",
 153                 VPORT_COUNTER_OFF(transmitted_eth_broadcast.octets) },
 154         { "rx_vport_rdma_unicast_packets",
 155                 VPORT_COUNTER_OFF(received_ib_unicast.packets) },
 156         { "rx_vport_rdma_unicast_bytes",
 157                 VPORT_COUNTER_OFF(received_ib_unicast.octets) },
 158         { "tx_vport_rdma_unicast_packets",
 159                 VPORT_COUNTER_OFF(transmitted_ib_unicast.packets) },
 160         { "tx_vport_rdma_unicast_bytes",
 161                 VPORT_COUNTER_OFF(transmitted_ib_unicast.octets) },
 162         { "rx_vport_rdma_multicast_packets",
 163                 VPORT_COUNTER_OFF(received_ib_multicast.packets) },
 164         { "rx_vport_rdma_multicast_bytes",
 165                 VPORT_COUNTER_OFF(received_ib_multicast.octets) },
 166         { "tx_vport_rdma_multicast_packets",
 167                 VPORT_COUNTER_OFF(transmitted_ib_multicast.packets) },
 168         { "tx_vport_rdma_multicast_bytes",
 169                 VPORT_COUNTER_OFF(transmitted_ib_multicast.octets) },
 170 };
 171
 172 #define PPORT_802_3_OFF(c) \
 173         MLX5_BYTE_OFF(ppcnt_reg, \
 174                       counter_set.eth_802_3_cntrs_grp_data_layout.c##_high)
 175 #define PPORT_802_3_GET(pstats, c) \
 176         MLX5_GET64(ppcnt_reg, pstats->IEEE_802_3_counters, \
 177                    counter_set.eth_802_3_cntrs_grp_data_layout.c##_high)
 178 #define PPORT_2863_OFF(c) \
 179         MLX5_BYTE_OFF(ppcnt_reg, \
 180                       counter_set.eth_2863_cntrs_grp_data_layout.c##_high)
 181 #define PPORT_2863_GET(pstats, c) \
 182         MLX5_GET64(ppcnt_reg, pstats->RFC_2863_counters, \
 183                    counter_set.eth_2863_cntrs_grp_data_layout.c##_high)
 184 #define PPORT_2819_OFF(c) \
 185         MLX5_BYTE_OFF(ppcnt_reg, \
 186                       counter_set.eth_2819_cntrs_grp_data_layout.c##_high)
 187 #define PPORT_2819_GET(pstats, c) \
 188         MLX5_GET64(ppcnt_reg, pstats->RFC_2819_counters, \
 189                    counter_set.eth_2819_cntrs_grp_data_layout.c##_high)
 190 #define PPORT_PER_PRIO_OFF(c) \
 191         MLX5_BYTE_OFF(ppcnt_reg, \
 192                       counter_set.eth_per_prio_grp_data_layout.c##_high)
 193 #define PPORT_PER_PRIO_GET(pstats, prio, c) \
 194         MLX5_GET64(ppcnt_reg, pstats->per_prio_counters[prio], \
 195                    counter_set.eth_per_prio_grp_data_layout.c##_high)
 196 #define NUM_PPORT_PRIO                          8
 197
 198 struct mlx5e_pport_stats {
 199         __be64 IEEE_802_3_counters[MLX5_ST_SZ_QW(ppcnt_reg)];
 200         __be64 RFC_2863_counters[MLX5_ST_SZ_QW(ppcnt_reg)];
 201         __be64 RFC_2819_counters[MLX5_ST_SZ_QW(ppcnt_reg)];
 202         __be64 per_prio_counters[NUM_PPORT_PRIO][MLX5_ST_SZ_QW(ppcnt_reg)];
 203         __be64 phy_counters[MLX5_ST_SZ_QW(ppcnt_reg)];
 204 };
 205
 206 static const struct counter_desc pport_802_3_stats_desc[] = {
 207         { "tx_packets_phy", PPORT_802_3_OFF(a_frames_transmitted_ok) },
 208         { "rx_packets_phy", PPORT_802_3_OFF(a_frames_received_ok) },
 209         { "rx_crc_errors_phy", PPORT_802_3_OFF(a_frame_check_sequence_errors) },
 210         { "tx_bytes_phy", PPORT_802_3_OFF(a_octets_transmitted_ok) },
 211         { "rx_bytes_phy", PPORT_802_3_OFF(a_octets_received_ok) },
 212         { "tx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_xmitted_ok) },
 213         { "tx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_xmitted_ok) },
 214         { "rx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_received_ok) },
 215         { "rx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_received_ok) },
 216         { "rx_in_range_len_errors_phy", PPORT_802_3_OFF(a_in_range_length_errors) },
 217         { "rx_out_of_range_len_phy", PPORT_802_3_OFF(a_out_of_range_length_field) },
 218         { "rx_oversize_pkts_phy", PPORT_802_3_OFF(a_frame_too_long_errors) },
 219         { "rx_symbol_err_phy", PPORT_802_3_OFF(a_symbol_error_during_carrier) },
 220         { "tx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_transmitted) },
 221         { "rx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_received) },
 222         { "rx_unsupported_op_phy", PPORT_802_3_OFF(a_unsupported_opcodes_received) },
 223         { "rx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_received) },
 224         { "tx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_transmitted) },
 225 };
 226
 227 static const struct counter_desc pport_2863_stats_desc[] = {
 228         { "rx_discards_phy", PPORT_2863_OFF(if_in_discards) },
 229         { "tx_discards_phy", PPORT_2863_OFF(if_out_discards) },
 230         { "tx_errors_phy", PPORT_2863_OFF(if_out_errors) },
 231 };
 232
 233 static const struct counter_desc pport_2819_stats_desc[] = {
 234         { "rx_undersize_pkts_phy", PPORT_2819_OFF(ether_stats_undersize_pkts) },
 235         { "rx_fragments_phy", PPORT_2819_OFF(ether_stats_fragments) },
 236         { "rx_jabbers_phy", PPORT_2819_OFF(ether_stats_jabbers) },
 237         { "rx_64_bytes_phy", PPORT_2819_OFF(ether_stats_pkts64octets) },
 238         { "rx_65_to_127_bytes_phy", PPORT_2819_OFF(ether_stats_pkts65to127octets) },
 239         { "rx_128_to_255_bytes_phy", PPORT_2819_OFF(ether_stats_pkts128to255octets) },
 240         { "rx_256_to_511_bytes_phy", PPORT_2819_OFF(ether_stats_pkts256to511octets) },
 241         { "rx_512_to_1023_bytes_phy", PPORT_2819_OFF(ether_stats_pkts512to1023octets) },
 242         { "rx_1024_to_1518_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1024to1518octets) },
 243         { "rx_1519_to_2047_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1519to2047octets) },
 244         { "rx_2048_to_4095_bytes_phy", PPORT_2819_OFF(ether_stats_pkts2048to4095octets) },
 245         { "rx_4096_to_8191_bytes_phy", PPORT_2819_OFF(ether_stats_pkts4096to8191octets) },
 246         { "rx_8192_to_10239_bytes_phy", PPORT_2819_OFF(ether_stats_pkts8192to10239octets) },
 247 };
 248
 249 static const struct counter_desc pport_per_prio_traffic_stats_desc[] = {
 250         { "rx_prio%d_bytes", PPORT_PER_PRIO_OFF(rx_octets) },
 251         { "rx_prio%d_packets", PPORT_PER_PRIO_OFF(rx_frames) },
 252         { "tx_prio%d_bytes", PPORT_PER_PRIO_OFF(tx_octets) },
 253         { "tx_prio%d_packets", PPORT_PER_PRIO_OFF(tx_frames) },
 254 };
 255
 256 static const struct counter_desc pport_per_prio_pfc_stats_desc[] = {
 257         /* %s is "global" or "prio{i}" */
 258         { "rx_%s_pause", PPORT_PER_PRIO_OFF(rx_pause) },
 259         { "rx_%s_pause_duration", PPORT_PER_PRIO_OFF(rx_pause_duration) },
 260         { "tx_%s_pause", PPORT_PER_PRIO_OFF(tx_pause) },
 261         { "tx_%s_pause_duration", PPORT_PER_PRIO_OFF(tx_pause_duration) },
 262         { "rx_%s_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition) },
 263 };
 264
 265 struct mlx5e_rq_stats {
 266         u64 packets;
 267         u64 bytes;
 268         u64 csum_complete;
 269         u64 csum_unnecessary_inner;
 270         u64 csum_none;
 271         u64 lro_packets;
 272         u64 lro_bytes;
 273         u64 wqe_err;
 274         u64 mpwqe_filler;
 275         u64 mpwqe_frag;
 276         u64 buff_alloc_err;
 277         u64 cqe_compress_blks;
 278         u64 cqe_compress_pkts;
 279 };
 280
 281 static const struct counter_desc rq_stats_desc[] = {
 282         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, packets) },
 283         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, bytes) },
 284         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_complete) },
 285         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary_inner) },
 286         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_none) },
 287         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_packets) },
 288         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_bytes) },
 289         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, wqe_err) },
 290         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_filler) },
 291         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_frag) },
 292         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, buff_alloc_err) },
 293         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_blks) },
 294         { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_pkts) },
 295 };
 296
 297 struct mlx5e_sq_stats {
 298         /* commonly accessed in data path */
 299         u64 packets;
 300         u64 bytes;
 301         u64 tso_packets;
 302         u64 tso_bytes;
 303         u64 tso_inner_packets;
 304         u64 tso_inner_bytes;
 305         u64 csum_partial_inner;
 306         u64 nop;
 307         /* less likely accessed in data path */
 308         u64 csum_none;
 309         u64 stopped;
 310         u64 wake;
 311         u64 dropped;
 312 };
 313
 314 static const struct counter_desc sq_stats_desc[] = {
 315         { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, packets) },
 316         { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, bytes) },
 317         { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_packets) },
 318         { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_bytes) },
 319         { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_packets) },
 320         { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_bytes) },
 321         { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_partial_inner) },
 322         { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, nop) },
 323         { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_none) },
 324         { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, stopped) },
 325         { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, wake) },
 326         { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, dropped) },
 327 };
 328
 329 #define NUM_SW_COUNTERS                 ARRAY_SIZE(sw_stats_desc)
 330 #define NUM_Q_COUNTERS                  ARRAY_SIZE(q_stats_desc)
 331 #define NUM_VPORT_COUNTERS              ARRAY_SIZE(vport_stats_desc)
 332 #define NUM_PPORT_802_3_COUNTERS        ARRAY_SIZE(pport_802_3_stats_desc)
 333 #define NUM_PPORT_2863_COUNTERS         ARRAY_SIZE(pport_2863_stats_desc)
 334 #define NUM_PPORT_2819_COUNTERS         ARRAY_SIZE(pport_2819_stats_desc)
 335 #define NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS \
 336         ARRAY_SIZE(pport_per_prio_traffic_stats_desc)
 337 #define NUM_PPORT_PER_PRIO_PFC_COUNTERS \
 338         ARRAY_SIZE(pport_per_prio_pfc_stats_desc)
 339 #define NUM_PPORT_COUNTERS              (NUM_PPORT_802_3_COUNTERS + \
 340                                          NUM_PPORT_2863_COUNTERS  + \
 341                                          NUM_PPORT_2819_COUNTERS  + \
 342                                          NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS * \
 343                                          NUM_PPORT_PRIO)
 344 #define NUM_RQ_STATS                    ARRAY_SIZE(rq_stats_desc)
 345 #define NUM_SQ_STATS                    ARRAY_SIZE(sq_stats_desc)
 346
 347 struct mlx5e_stats {
 348         struct mlx5e_sw_stats sw;
 349         struct mlx5e_qcounter_stats qcnt;
 350         struct mlx5e_vport_stats vport;
 351         struct mlx5e_pport_stats pport;
 352 };
 353
 354 #endif /* __MLX5_EN_STATS_H__ */