drivers/net/ethernet/mellanox/mlx5/core/eswitch.h

   1 /*
   2  * Copyright (c) 2015, Mellanox Technologies, Ltd.  All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #ifndef __MLX5_ESWITCH_H__
  34 #define __MLX5_ESWITCH_H__
  35
  36 #include <linux/if_ether.h>
  37 #include <linux/if_link.h>
  38 #include <net/devlink.h>
  39 #include <linux/mlx5/device.h>
  40 #include <linux/mlx5/eswitch.h>
  41 #include <linux/mlx5/vport.h>
  42 #include <linux/mlx5/fs.h>
  43 #include "lib/mpfs.h"
  44
  45 #ifdef CONFIG_MLX5_ESWITCH
  46
  47 #define MLX5_MAX_UC_PER_VPORT(dev) \
  48         (1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
  49
  50 #define MLX5_MAX_MC_PER_VPORT(dev) \
  51         (1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
  52
  53 #define MLX5_MIN_BW_SHARE 1
  54
  55 #define MLX5_RATE_TO_BW_SHARE(rate, divider, limit) \
  56         min_t(u32, max_t(u32, (rate) / (divider), MLX5_MIN_BW_SHARE), limit)
  57
  58 #define mlx5_esw_has_fwd_fdb(dev) \
  59         MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_to_table)
  60
  61 #define FDB_MAX_CHAIN 3
  62 #define FDB_SLOW_PATH_CHAIN (FDB_MAX_CHAIN + 1)
  63 #define FDB_MAX_PRIO 16
  64
  65 struct vport_ingress {
  66         struct mlx5_flow_table *acl;
  67         struct mlx5_flow_group *allow_untagged_spoofchk_grp;
  68         struct mlx5_flow_group *allow_spoofchk_only_grp;
  69         struct mlx5_flow_group *allow_untagged_only_grp;
  70         struct mlx5_flow_group *drop_grp;
  71         struct mlx5_flow_handle  *allow_rule;
  72         struct mlx5_flow_handle  *drop_rule;
  73         struct mlx5_fc           *drop_counter;
  74 };
  75
  76 struct vport_egress {
  77         struct mlx5_flow_table *acl;
  78         struct mlx5_flow_group *allowed_vlans_grp;
  79         struct mlx5_flow_group *drop_grp;
  80         struct mlx5_flow_handle  *allowed_vlan;
  81         struct mlx5_flow_handle  *drop_rule;
  82         struct mlx5_fc           *drop_counter;
  83 };
  84
  85 struct mlx5_vport_drop_stats {
  86         u64 rx_dropped;
  87         u64 tx_dropped;
  88 };
  89
  90 struct mlx5_vport_info {
  91         u8                      mac[ETH_ALEN];
  92         u16                     vlan;
  93         u8                      qos;
  94         u64                     node_guid;
  95         int                     link_state;
  96         u32                     min_rate;
  97         u32                     max_rate;
  98         bool                    spoofchk;
  99         bool                    trusted;
 100 };
 101
 102 struct mlx5_vport {
 103         struct mlx5_core_dev    *dev;
 104         int                     vport;
 105         struct hlist_head       uc_list[MLX5_L2_ADDR_HASH_SIZE];
 106         struct hlist_head       mc_list[MLX5_L2_ADDR_HASH_SIZE];
 107         struct mlx5_flow_handle *promisc_rule;
 108         struct mlx5_flow_handle *allmulti_rule;
 109         struct work_struct      vport_change_handler;
 110
 111         struct vport_ingress    ingress;
 112         struct vport_egress     egress;
 113
 114         struct mlx5_vport_info  info;
 115
 116         struct {
 117                 bool            enabled;
 118                 u32             esw_tsar_ix;
 119                 u32             bw_share;
 120         } qos;
 121
 122         bool                    enabled;
 123         u16                     enabled_events;
 124 };
 125
 126 enum offloads_fdb_flags {
 127         ESW_FDB_CHAINS_AND_PRIOS_SUPPORTED = BIT(0),
 128 };
 129
 130 extern const unsigned int ESW_POOLS[4];
 131
 132 #define PRIO_LEVELS 2
 133 struct mlx5_eswitch_fdb {
 134         union {
 135                 struct legacy_fdb {
 136                         struct mlx5_flow_table *fdb;
 137                         struct mlx5_flow_group *addr_grp;
 138                         struct mlx5_flow_group *allmulti_grp;
 139                         struct mlx5_flow_group *promisc_grp;
 140                         struct mlx5_flow_table *vepa_fdb;
 141                         struct mlx5_flow_handle *vepa_uplink_rule;
 142                         struct mlx5_flow_handle *vepa_star_rule;
 143                 } legacy;
 144
 145                 struct offloads_fdb {
 146                         struct mlx5_flow_table *slow_fdb;
 147                         struct mlx5_flow_group *send_to_vport_grp;
 148                         struct mlx5_flow_group *peer_miss_grp;
 149                         struct mlx5_flow_handle **peer_miss_rules;
 150                         struct mlx5_flow_group *miss_grp;
 151                         struct mlx5_flow_handle *miss_rule_uni;
 152                         struct mlx5_flow_handle *miss_rule_multi;
 153                         int vlan_push_pop_refcount;
 154
 155                         struct {
 156                                 struct mlx5_flow_table *fdb;
 157                                 u32 num_rules;
 158                         } fdb_prio[FDB_MAX_CHAIN + 1][FDB_MAX_PRIO + 1][PRIO_LEVELS];
 159                         /* Protects fdb_prio table */
 160                         struct mutex fdb_prio_lock;
 161
 162                         int fdb_left[ARRAY_SIZE(ESW_POOLS)];
 163                 } offloads;
 164         };
 165         u32 flags;
 166 };
 167
 168 struct mlx5_esw_offload {
 169         struct mlx5_flow_table *ft_offloads;
 170         struct mlx5_flow_group *vport_rx_group;
 171         struct mlx5_eswitch_rep *vport_reps;
 172         struct list_head peer_flows;
 173         struct mutex peer_mutex;
 174         DECLARE_HASHTABLE(encap_tbl, 8);
 175         DECLARE_HASHTABLE(mod_hdr_tbl, 8);
 176         DECLARE_HASHTABLE(termtbl_tbl, 8);
 177         struct mutex termtbl_mutex; /* protects termtbl hash */
 178         const struct mlx5_eswitch_rep_ops *rep_ops[NUM_REP_TYPES];
 179         u8 inline_mode;
 180         u64 num_flows;
 181         u8 encap;
 182 };
 183
 184 /* E-Switch MC FDB table hash node */
 185 struct esw_mc_addr { /* SRIOV only */
 186         struct l2addr_node     node;
 187         struct mlx5_flow_handle *uplink_rule; /* Forward to uplink rule */
 188         u32                    refcnt;
 189 };
 190
 191 struct mlx5_host_work {
 192         struct work_struct      work;
 193         struct mlx5_eswitch     *esw;
 194 };
 195
 196 struct mlx5_esw_functions {
 197         struct mlx5_nb          nb;
 198         u16                     num_vfs;
 199 };
 200
 201 struct mlx5_eswitch {
 202         struct mlx5_core_dev    *dev;
 203         struct mlx5_nb          nb;
 204         struct mlx5_eswitch_fdb fdb_table;
 205         struct hlist_head       mc_table[MLX5_L2_ADDR_HASH_SIZE];
 206         struct workqueue_struct *work_queue;
 207         struct mlx5_vport       *vports;
 208         int                     total_vports;
 209         int                     enabled_vports;
 210         /* Synchronize between vport change events
 211          * and async SRIOV admin state changes
 212          */
 213         struct mutex            state_lock;
 214         struct esw_mc_addr      mc_promisc;
 215
 216         struct {
 217                 bool            enabled;
 218                 u32             root_tsar_id;
 219         } qos;
 220
 221         struct mlx5_esw_offload offloads;
 222         int                     mode;
 223         int                     nvports;
 224         u16                     manager_vport;
 225         struct mlx5_esw_functions esw_funcs;
 226 };
 227
 228 void esw_offloads_cleanup(struct mlx5_eswitch *esw);
 229 int esw_offloads_init(struct mlx5_eswitch *esw, int vf_nvports,
 230                       int total_nvports);
 231 void esw_offloads_cleanup_reps(struct mlx5_eswitch *esw);
 232 int esw_offloads_init_reps(struct mlx5_eswitch *esw);
 233 void esw_vport_cleanup_ingress_rules(struct mlx5_eswitch *esw,
 234                                      struct mlx5_vport *vport);
 235 int esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw,
 236                                  struct mlx5_vport *vport);
 237 void esw_vport_cleanup_egress_rules(struct mlx5_eswitch *esw,
 238                                     struct mlx5_vport *vport);
 239 int esw_vport_enable_egress_acl(struct mlx5_eswitch *esw,
 240                                 struct mlx5_vport *vport);
 241 void esw_vport_disable_egress_acl(struct mlx5_eswitch *esw,
 242                                   struct mlx5_vport *vport);
 243 void esw_vport_disable_ingress_acl(struct mlx5_eswitch *esw,
 244                                    struct mlx5_vport *vport);
 245
 246 /* E-Switch API */
 247 int mlx5_eswitch_init(struct mlx5_core_dev *dev);
 248 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
 249 int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode);
 250 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw);
 251 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
 252                                u16 vport, u8 mac[ETH_ALEN]);
 253 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
 254                                  u16 vport, int link_state);
 255 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
 256                                 u16 vport, u16 vlan, u8 qos);
 257 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
 258                                     u16 vport, bool spoofchk);
 259 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
 260                                  u16 vport_num, bool setting);
 261 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport,
 262                                 u32 max_rate, u32 min_rate);
 263 int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting);
 264 int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting);
 265 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
 266                                   u16 vport, struct ifla_vf_info *ivi);
 267 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
 268                                  u16 vport,
 269                                  struct ifla_vf_stats *vf_stats);
 270 void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule);
 271
 272 struct mlx5_flow_spec;
 273 struct mlx5_esw_flow_attr;
 274 struct mlx5_termtbl_handle;
 275
 276 bool
 277 mlx5_eswitch_termtbl_required(struct mlx5_eswitch *esw,
 278                               struct mlx5_flow_act *flow_act,
 279                               struct mlx5_flow_spec *spec);
 280
 281 struct mlx5_flow_handle *
 282 mlx5_eswitch_add_termtbl_rule(struct mlx5_eswitch *esw,
 283                               struct mlx5_flow_table *ft,
 284                               struct mlx5_flow_spec *spec,
 285                               struct mlx5_esw_flow_attr *attr,
 286                               struct mlx5_flow_act *flow_act,
 287                               struct mlx5_flow_destination *dest,
 288                               int num_dest);
 289
 290 void
 291 mlx5_eswitch_termtbl_put(struct mlx5_eswitch *esw,
 292                          struct mlx5_termtbl_handle *tt);
 293
 294 struct mlx5_flow_handle *
 295 mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
 296                                 struct mlx5_flow_spec *spec,
 297                                 struct mlx5_esw_flow_attr *attr);
 298 struct mlx5_flow_handle *
 299 mlx5_eswitch_add_fwd_rule(struct mlx5_eswitch *esw,
 300                           struct mlx5_flow_spec *spec,
 301                           struct mlx5_esw_flow_attr *attr);
 302 void
 303 mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
 304                                 struct mlx5_flow_handle *rule,
 305                                 struct mlx5_esw_flow_attr *attr);
 306 void
 307 mlx5_eswitch_del_fwd_rule(struct mlx5_eswitch *esw,
 308                           struct mlx5_flow_handle *rule,
 309                           struct mlx5_esw_flow_attr *attr);
 310
 311 bool
 312 mlx5_eswitch_prios_supported(struct mlx5_eswitch *esw);
 313
 314 u16
 315 mlx5_eswitch_get_prio_range(struct mlx5_eswitch *esw);
 316
 317 u32
 318 mlx5_eswitch_get_chain_range(struct mlx5_eswitch *esw);
 319
 320 struct mlx5_flow_handle *
 321 mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport,
 322                                   struct mlx5_flow_destination *dest);
 323
 324 enum {
 325         SET_VLAN_STRIP  = BIT(0),
 326         SET_VLAN_INSERT = BIT(1)
 327 };
 328
 329 enum mlx5_flow_match_level {
 330         MLX5_MATCH_NONE = MLX5_INLINE_MODE_NONE,
 331         MLX5_MATCH_L2   = MLX5_INLINE_MODE_L2,
 332         MLX5_MATCH_L3   = MLX5_INLINE_MODE_IP,
 333         MLX5_MATCH_L4   = MLX5_INLINE_MODE_TCP_UDP,
 334 };
 335
 336 /* current maximum for flow based vport multicasting */
 337 #define MLX5_MAX_FLOW_FWD_VPORTS 2
 338
 339 enum {
 340         MLX5_ESW_DEST_ENCAP         = BIT(0),
 341         MLX5_ESW_DEST_ENCAP_VALID   = BIT(1),
 342 };
 343
 344 struct mlx5_esw_flow_attr {
 345         struct mlx5_eswitch_rep *in_rep;
 346         struct mlx5_core_dev    *in_mdev;
 347         struct mlx5_core_dev    *counter_dev;
 348
 349         int split_count;
 350         int out_count;
 351
 352         int     action;
 353         __be16  vlan_proto[MLX5_FS_VLAN_DEPTH];
 354         u16     vlan_vid[MLX5_FS_VLAN_DEPTH];
 355         u8      vlan_prio[MLX5_FS_VLAN_DEPTH];
 356         u8      total_vlan;
 357         bool    vlan_handled;
 358         struct {
 359                 u32 flags;
 360                 struct mlx5_eswitch_rep *rep;
 361                 struct mlx5_core_dev *mdev;
 362                 u32 encap_id;
 363                 struct mlx5_termtbl_handle *termtbl;
 364         } dests[MLX5_MAX_FLOW_FWD_VPORTS];
 365         u32     mod_hdr_id;
 366         u8      match_level;
 367         u8      tunnel_match_level;
 368         struct mlx5_fc *counter;
 369         u32     chain;
 370         u16     prio;
 371         u32     dest_chain;
 372         struct mlx5e_tc_flow_parse_attr *parse_attr;
 373 };
 374
 375 int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
 376                                   struct netlink_ext_ack *extack);
 377 int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode);
 378 int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode,
 379                                          struct netlink_ext_ack *extack);
 380 int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode);
 381 int mlx5_eswitch_inline_mode_get(struct mlx5_eswitch *esw, int nvfs, u8 *mode);
 382 int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink, u8 encap,
 383                                         struct netlink_ext_ack *extack);
 384 int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink, u8 *encap);
 385 void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type);
 386
 387 int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
 388                                  struct mlx5_esw_flow_attr *attr);
 389 int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
 390                                  struct mlx5_esw_flow_attr *attr);
 391 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
 392                                   u16 vport, u16 vlan, u8 qos, u8 set_flags);
 393
 394 static inline bool mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev *dev,
 395                                                        u8 vlan_depth)
 396 {
 397         bool ret = MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan) &&
 398                    MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan);
 399
 400         if (vlan_depth == 1)
 401                 return ret;
 402
 403         return  ret && MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan_2) &&
 404                 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan_2);
 405 }
 406
 407 bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0,
 408                          struct mlx5_core_dev *dev1);
 409 bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
 410                                struct mlx5_core_dev *dev1);
 411
 412 int mlx5_esw_query_functions(struct mlx5_core_dev *dev, u16 *num_vfs);
 413
 414 #define MLX5_DEBUG_ESWITCH_MASK BIT(3)
 415
 416 #define esw_info(__dev, format, ...)                    \
 417         dev_info((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
 418
 419 #define esw_warn(__dev, format, ...)                    \
 420         dev_warn((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
 421
 422 #define esw_debug(dev, format, ...)                             \
 423         mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
 424
 425 /* The returned number is valid only when the dev is eswitch manager. */
 426 static inline u16 mlx5_eswitch_manager_vport(struct mlx5_core_dev *dev)
 427 {
 428         return mlx5_core_is_ecpf_esw_manager(dev) ?
 429                 MLX5_VPORT_ECPF : MLX5_VPORT_PF;
 430 }
 431
 432 static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev)
 433 {
 434         /* Ideally device should have the functions changed supported
 435          * capability regardless of it being ECPF or PF wherever such
 436          * event should be processed such as on eswitch manager device.
 437          * However, some ECPF based device might not have this capability
 438          * set. Hence OR for ECPF check to cover such device.
 439          */
 440         return MLX5_CAP_ESW(dev, esw_functions_changed) ||
 441                mlx5_core_is_ecpf_esw_manager(dev);
 442 }
 443
 444 static inline int mlx5_eswitch_uplink_idx(struct mlx5_eswitch *esw)
 445 {
 446         /* Uplink always locate at the last element of the array.*/
 447         return esw->total_vports - 1;
 448 }
 449
 450 static inline int mlx5_eswitch_ecpf_idx(struct mlx5_eswitch *esw)
 451 {
 452         return esw->total_vports - 2;
 453 }
 454
 455 static inline int mlx5_eswitch_vport_num_to_index(struct mlx5_eswitch *esw,
 456                                                   u16 vport_num)
 457 {
 458         if (vport_num == MLX5_VPORT_ECPF) {
 459                 if (!mlx5_ecpf_vport_exists(esw->dev))
 460                         esw_warn(esw->dev, "ECPF vport doesn't exist!\n");
 461                 return mlx5_eswitch_ecpf_idx(esw);
 462         }
 463
 464         if (vport_num == MLX5_VPORT_UPLINK)
 465                 return mlx5_eswitch_uplink_idx(esw);
 466
 467         return vport_num;
 468 }
 469
 470 static inline u16 mlx5_eswitch_index_to_vport_num(struct mlx5_eswitch *esw,
 471                                                   int index)
 472 {
 473         if (index == mlx5_eswitch_ecpf_idx(esw) &&
 474             mlx5_ecpf_vport_exists(esw->dev))
 475                 return MLX5_VPORT_ECPF;
 476
 477         if (index == mlx5_eswitch_uplink_idx(esw))
 478                 return MLX5_VPORT_UPLINK;
 479
 480         return index;
 481 }
 482
 483 /* TODO: This mlx5e_tc function shouldn't be called by eswitch */
 484 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw);
 485
 486 /* The vport getter/iterator are only valid after esw->total_vports
 487  * and vport->vport are initialized in mlx5_eswitch_init.
 488  */
 489 #define mlx5_esw_for_all_vports(esw, i, vport)          \
 490         for ((i) = MLX5_VPORT_PF;                       \
 491              (vport) = &(esw)->vports[i],               \
 492              (i) < (esw)->total_vports; (i)++)
 493
 494 #define mlx5_esw_for_each_vf_vport(esw, i, vport, nvfs) \
 495         for ((i) = MLX5_VPORT_FIRST_VF;                 \
 496              (vport) = &(esw)->vports[(i)],             \
 497              (i) <= (nvfs); (i)++)
 498
 499 #define mlx5_esw_for_each_vf_vport_reverse(esw, i, vport, nvfs) \
 500         for ((i) = (nvfs);                                      \
 501              (vport) = &(esw)->vports[(i)],                     \
 502              (i) >= MLX5_VPORT_FIRST_VF; (i)--)
 503
 504 /* The rep getter/iterator are only valid after esw->total_vports
 505  * and vport->vport are initialized in mlx5_eswitch_init.
 506  */
 507 #define mlx5_esw_for_all_reps(esw, i, rep)                      \
 508         for ((i) = MLX5_VPORT_PF;                               \
 509              (rep) = &(esw)->offloads.vport_reps[i],            \
 510              (i) < (esw)->total_vports; (i)++)
 511
 512 #define mlx5_esw_for_each_vf_rep(esw, i, rep, nvfs)             \
 513         for ((i) = MLX5_VPORT_FIRST_VF;                         \
 514              (rep) = &(esw)->offloads.vport_reps[i],            \
 515              (i) <= (nvfs); (i)++)
 516
 517 #define mlx5_esw_for_each_vf_rep_reverse(esw, i, rep, nvfs)     \
 518         for ((i) = (nvfs);                                      \
 519              (rep) = &(esw)->offloads.vport_reps[i],            \
 520              (i) >= MLX5_VPORT_FIRST_VF; (i)--)
 521
 522 #define mlx5_esw_for_each_vf_vport_num(esw, vport, nvfs)        \
 523         for ((vport) = MLX5_VPORT_FIRST_VF; (vport) <= (nvfs); (vport)++)
 524
 525 #define mlx5_esw_for_each_vf_vport_num_reverse(esw, vport, nvfs)        \
 526         for ((vport) = (nvfs); (vport) >= MLX5_VPORT_FIRST_VF; (vport)--)
 527
 528 struct mlx5_vport *__must_check
 529 mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num);
 530
 531 #else  /* CONFIG_MLX5_ESWITCH */
 532 /* eswitch API stubs */
 533 static inline int  mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; }
 534 static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {}
 535 static inline int  mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode) { return 0; }
 536 static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw) {}
 537 static inline bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1) { return true; }
 538 static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }
 539
 540 #define FDB_MAX_CHAIN 1
 541 #define FDB_SLOW_PATH_CHAIN (FDB_MAX_CHAIN + 1)
 542 #define FDB_MAX_PRIO 1
 543
 544 #endif /* CONFIG_MLX5_ESWITCH */
 545
 546 #endif /* __MLX5_ESWITCH_H__ */