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[mirror_ubuntu-hirsute-kernel.git] / drivers / net / ethernet / mellanox / mlx5 / core / eswitch.h
1 /*
2 * Copyright (c) 2015, Mellanox Technologies, Ltd. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #ifndef __MLX5_ESWITCH_H__
34 #define __MLX5_ESWITCH_H__
35
36 #include <linux/if_ether.h>
37 #include <linux/if_link.h>
38 #include <linux/mlx5/device.h>
39
40 #define MLX5_MAX_UC_PER_VPORT(dev) \
41 (1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
42
43 #define MLX5_MAX_MC_PER_VPORT(dev) \
44 (1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
45
46 #define MLX5_L2_ADDR_HASH_SIZE (BIT(BITS_PER_BYTE))
47 #define MLX5_L2_ADDR_HASH(addr) (addr[5])
48
49 /* L2 -mac address based- hash helpers */
50 struct l2addr_node {
51 struct hlist_node hlist;
52 u8 addr[ETH_ALEN];
53 };
54
55 #define for_each_l2hash_node(hn, tmp, hash, i) \
56 for (i = 0; i < MLX5_L2_ADDR_HASH_SIZE; i++) \
57 hlist_for_each_entry_safe(hn, tmp, &hash[i], hlist)
58
59 #define l2addr_hash_find(hash, mac, type) ({ \
60 int ix = MLX5_L2_ADDR_HASH(mac); \
61 bool found = false; \
62 type *ptr = NULL; \
63 \
64 hlist_for_each_entry(ptr, &hash[ix], node.hlist) \
65 if (ether_addr_equal(ptr->node.addr, mac)) {\
66 found = true; \
67 break; \
68 } \
69 if (!found) \
70 ptr = NULL; \
71 ptr; \
72 })
73
74 #define l2addr_hash_add(hash, mac, type, gfp) ({ \
75 int ix = MLX5_L2_ADDR_HASH(mac); \
76 type *ptr = NULL; \
77 \
78 ptr = kzalloc(sizeof(type), gfp); \
79 if (ptr) { \
80 ether_addr_copy(ptr->node.addr, mac); \
81 hlist_add_head(&ptr->node.hlist, &hash[ix]);\
82 } \
83 ptr; \
84 })
85
86 #define l2addr_hash_del(ptr) ({ \
87 hlist_del(&ptr->node.hlist); \
88 kfree(ptr); \
89 })
90
91 struct vport_ingress {
92 struct mlx5_flow_table *acl;
93 struct mlx5_flow_group *allow_untagged_spoofchk_grp;
94 struct mlx5_flow_group *allow_spoofchk_only_grp;
95 struct mlx5_flow_group *allow_untagged_only_grp;
96 struct mlx5_flow_group *drop_grp;
97 struct mlx5_flow_rule *allow_rule;
98 struct mlx5_flow_rule *drop_rule;
99 };
100
101 struct vport_egress {
102 struct mlx5_flow_table *acl;
103 struct mlx5_flow_group *allowed_vlans_grp;
104 struct mlx5_flow_group *drop_grp;
105 struct mlx5_flow_rule *allowed_vlan;
106 struct mlx5_flow_rule *drop_rule;
107 };
108
109 struct mlx5_vport {
110 struct mlx5_core_dev *dev;
111 int vport;
112 struct hlist_head uc_list[MLX5_L2_ADDR_HASH_SIZE];
113 struct hlist_head mc_list[MLX5_L2_ADDR_HASH_SIZE];
114 struct mlx5_flow_rule *promisc_rule;
115 struct mlx5_flow_rule *allmulti_rule;
116 struct work_struct vport_change_handler;
117
118 struct vport_ingress ingress;
119 struct vport_egress egress;
120
121 u16 vlan;
122 u8 qos;
123 bool spoofchk;
124 bool trusted;
125 bool enabled;
126 u16 enabled_events;
127 };
128
129 struct mlx5_l2_table {
130 struct hlist_head l2_hash[MLX5_L2_ADDR_HASH_SIZE];
131 u32 size;
132 unsigned long *bitmap;
133 };
134
135 struct mlx5_eswitch_fdb {
136 void *fdb;
137 struct mlx5_flow_group *addr_grp;
138 struct mlx5_flow_group *allmulti_grp;
139 struct mlx5_flow_group *promisc_grp;
140 };
141
142 struct mlx5_eswitch {
143 struct mlx5_core_dev *dev;
144 struct mlx5_l2_table l2_table;
145 struct mlx5_eswitch_fdb fdb_table;
146 struct hlist_head mc_table[MLX5_L2_ADDR_HASH_SIZE];
147 struct workqueue_struct *work_queue;
148 struct mlx5_vport *vports;
149 int total_vports;
150 int enabled_vports;
151 /* Synchronize between vport change events
152 * and async SRIOV admin state changes
153 */
154 struct mutex state_lock;
155 struct esw_mc_addr *mc_promisc;
156 };
157
158 /* E-Switch API */
159 int mlx5_eswitch_init(struct mlx5_core_dev *dev);
160 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
161 void mlx5_eswitch_vport_event(struct mlx5_eswitch *esw, struct mlx5_eqe *eqe);
162 int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs);
163 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw);
164 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
165 int vport, u8 mac[ETH_ALEN]);
166 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
167 int vport, int link_state);
168 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
169 int vport, u16 vlan, u8 qos);
170 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
171 int vport, bool spoofchk);
172 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
173 int vport_num, bool setting);
174 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
175 int vport, struct ifla_vf_info *ivi);
176 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
177 int vport,
178 struct ifla_vf_stats *vf_stats);
179
180 #endif /* __MLX5_ESWITCH_H__ */