2 * Copyright (c) 2017, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <rdma/ib_verbs.h>
34 #include <linux/mlx5/fs.h>
38 #define IB_DEFAULT_Q_KEY 0xb1b
39 #define MLX5I_PARAMS_DEFAULT_LOG_RQ_SIZE 9
41 static int mlx5i_open(struct net_device
*netdev
);
42 static int mlx5i_close(struct net_device
*netdev
);
43 static int mlx5i_change_mtu(struct net_device
*netdev
, int new_mtu
);
45 static const struct net_device_ops mlx5i_netdev_ops
= {
46 .ndo_open
= mlx5i_open
,
47 .ndo_stop
= mlx5i_close
,
48 .ndo_init
= mlx5i_dev_init
,
49 .ndo_uninit
= mlx5i_dev_cleanup
,
50 .ndo_change_mtu
= mlx5i_change_mtu
,
51 .ndo_do_ioctl
= mlx5i_ioctl
,
54 /* IPoIB mlx5 netdev profile */
55 static void mlx5i_build_nic_params(struct mlx5_core_dev
*mdev
,
56 struct mlx5e_params
*params
)
58 /* Override RQ params as IPoIB supports only LINKED LIST RQ for now */
59 MLX5E_SET_PFLAG(params
, MLX5E_PFLAG_RX_STRIDING_RQ
, false);
60 mlx5e_set_rq_type(mdev
, params
);
61 mlx5e_init_rq_type_params(mdev
, params
);
63 /* RQ size in ipoib by default is 512 */
64 params
->log_rq_mtu_frames
= is_kdump_kernel() ?
65 MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE
:
66 MLX5I_PARAMS_DEFAULT_LOG_RQ_SIZE
;
68 params
->lro_en
= false;
69 params
->hard_mtu
= MLX5_IB_GRH_BYTES
+ MLX5_IPOIB_HARD_LEN
;
72 /* Called directly after IPoIB netdevice was created to initialize SW structs */
73 void mlx5i_init(struct mlx5_core_dev
*mdev
,
74 struct net_device
*netdev
,
75 const struct mlx5e_profile
*profile
,
78 struct mlx5e_priv
*priv
= mlx5i_epriv(netdev
);
82 priv
->netdev
= netdev
;
83 priv
->profile
= profile
;
85 mutex_init(&priv
->state_lock
);
87 mlx5e_build_nic_params(mdev
, &priv
->channels
.params
,
88 profile
->max_nch(mdev
), netdev
->mtu
);
89 mlx5i_build_nic_params(mdev
, &priv
->channels
.params
);
91 mlx5e_timestamp_init(priv
);
94 netdev
->hw_features
|= NETIF_F_SG
;
95 netdev
->hw_features
|= NETIF_F_IP_CSUM
;
96 netdev
->hw_features
|= NETIF_F_IPV6_CSUM
;
97 netdev
->hw_features
|= NETIF_F_GRO
;
98 netdev
->hw_features
|= NETIF_F_TSO
;
99 netdev
->hw_features
|= NETIF_F_TSO6
;
100 netdev
->hw_features
|= NETIF_F_RXCSUM
;
101 netdev
->hw_features
|= NETIF_F_RXHASH
;
103 netdev
->netdev_ops
= &mlx5i_netdev_ops
;
104 netdev
->ethtool_ops
= &mlx5i_ethtool_ops
;
107 /* Called directly before IPoIB netdevice is destroyed to cleanup SW structs */
108 static void mlx5i_cleanup(struct mlx5e_priv
*priv
)
113 int mlx5i_init_underlay_qp(struct mlx5e_priv
*priv
)
115 struct mlx5_core_dev
*mdev
= priv
->mdev
;
116 struct mlx5i_priv
*ipriv
= priv
->ppriv
;
117 struct mlx5_core_qp
*qp
= &ipriv
->qp
;
118 struct mlx5_qp_context
*context
;
122 context
= kzalloc(sizeof(*context
), GFP_KERNEL
);
126 context
->flags
= cpu_to_be32(MLX5_QP_PM_MIGRATED
<< 11);
127 context
->pri_path
.port
= 1;
128 context
->pri_path
.pkey_index
= cpu_to_be16(ipriv
->pkey_index
);
129 context
->qkey
= cpu_to_be32(IB_DEFAULT_Q_KEY
);
131 ret
= mlx5_core_qp_modify(mdev
, MLX5_CMD_OP_RST2INIT_QP
, 0, context
, qp
);
133 mlx5_core_err(mdev
, "Failed to modify qp RST2INIT, err: %d\n", ret
);
134 goto err_qp_modify_to_err
;
136 memset(context
, 0, sizeof(*context
));
138 ret
= mlx5_core_qp_modify(mdev
, MLX5_CMD_OP_INIT2RTR_QP
, 0, context
, qp
);
140 mlx5_core_err(mdev
, "Failed to modify qp INIT2RTR, err: %d\n", ret
);
141 goto err_qp_modify_to_err
;
144 ret
= mlx5_core_qp_modify(mdev
, MLX5_CMD_OP_RTR2RTS_QP
, 0, context
, qp
);
146 mlx5_core_err(mdev
, "Failed to modify qp RTR2RTS, err: %d\n", ret
);
147 goto err_qp_modify_to_err
;
153 err_qp_modify_to_err
:
154 mlx5_core_qp_modify(mdev
, MLX5_CMD_OP_2ERR_QP
, 0, &context
, qp
);
159 void mlx5i_uninit_underlay_qp(struct mlx5e_priv
*priv
)
161 struct mlx5i_priv
*ipriv
= priv
->ppriv
;
162 struct mlx5_core_dev
*mdev
= priv
->mdev
;
163 struct mlx5_qp_context context
;
166 err
= mlx5_core_qp_modify(mdev
, MLX5_CMD_OP_2RST_QP
, 0, &context
,
169 mlx5_core_err(mdev
, "Failed to modify qp 2RST, err: %d\n", err
);
172 #define MLX5_QP_ENHANCED_ULP_STATELESS_MODE 2
174 int mlx5i_create_underlay_qp(struct mlx5_core_dev
*mdev
, struct mlx5_core_qp
*qp
)
182 inlen
= MLX5_ST_SZ_BYTES(create_qp_in
);
183 in
= kvzalloc(inlen
, GFP_KERNEL
);
187 qpc
= MLX5_ADDR_OF(create_qp_in
, in
, qpc
);
188 MLX5_SET(qpc
, qpc
, st
, MLX5_QP_ST_UD
);
189 MLX5_SET(qpc
, qpc
, pm_state
, MLX5_QP_PM_MIGRATED
);
190 MLX5_SET(qpc
, qpc
, ulp_stateless_offload_mode
,
191 MLX5_QP_ENHANCED_ULP_STATELESS_MODE
);
193 addr_path
= MLX5_ADDR_OF(qpc
, qpc
, primary_address_path
);
194 MLX5_SET(ads
, addr_path
, vhca_port_num
, 1);
195 MLX5_SET(ads
, addr_path
, grh
, 1);
197 ret
= mlx5_core_create_qp(mdev
, qp
, in
, inlen
);
199 mlx5_core_err(mdev
, "Failed creating IPoIB QP err : %d\n", ret
);
208 void mlx5i_destroy_underlay_qp(struct mlx5_core_dev
*mdev
, struct mlx5_core_qp
*qp
)
210 mlx5_core_destroy_qp(mdev
, qp
);
213 static int mlx5i_init_tx(struct mlx5e_priv
*priv
)
215 struct mlx5i_priv
*ipriv
= priv
->ppriv
;
218 err
= mlx5i_create_underlay_qp(priv
->mdev
, &ipriv
->qp
);
220 mlx5_core_warn(priv
->mdev
, "create underlay QP failed, %d\n", err
);
224 err
= mlx5e_create_tis(priv
->mdev
, 0 /* tc */, ipriv
->qp
.qpn
, &priv
->tisn
[0]);
226 mlx5_core_warn(priv
->mdev
, "create tis failed, %d\n", err
);
227 goto err_destroy_underlay_qp
;
232 err_destroy_underlay_qp
:
233 mlx5i_destroy_underlay_qp(priv
->mdev
, &ipriv
->qp
);
237 static void mlx5i_cleanup_tx(struct mlx5e_priv
*priv
)
239 struct mlx5i_priv
*ipriv
= priv
->ppriv
;
241 mlx5e_destroy_tis(priv
->mdev
, priv
->tisn
[0]);
242 mlx5i_destroy_underlay_qp(priv
->mdev
, &ipriv
->qp
);
245 static int mlx5i_create_flow_steering(struct mlx5e_priv
*priv
)
247 struct ttc_params ttc_params
= {};
250 priv
->fs
.ns
= mlx5_get_flow_namespace(priv
->mdev
,
251 MLX5_FLOW_NAMESPACE_KERNEL
);
256 err
= mlx5e_arfs_create_tables(priv
);
258 netdev_err(priv
->netdev
, "Failed to create arfs tables, err=%d\n",
260 priv
->netdev
->hw_features
&= ~NETIF_F_NTUPLE
;
263 mlx5e_set_ttc_basic_params(priv
, &ttc_params
);
264 mlx5e_set_inner_ttc_ft_params(&ttc_params
);
265 for (tt
= 0; tt
< MLX5E_NUM_INDIR_TIRS
; tt
++)
266 ttc_params
.indir_tirn
[tt
] = priv
->inner_indir_tir
[tt
].tirn
;
268 err
= mlx5e_create_inner_ttc_table(priv
, &ttc_params
, &priv
->fs
.inner_ttc
);
270 netdev_err(priv
->netdev
, "Failed to create inner ttc table, err=%d\n",
272 goto err_destroy_arfs_tables
;
275 mlx5e_set_ttc_ft_params(&ttc_params
);
276 for (tt
= 0; tt
< MLX5E_NUM_INDIR_TIRS
; tt
++)
277 ttc_params
.indir_tirn
[tt
] = priv
->indir_tir
[tt
].tirn
;
279 err
= mlx5e_create_ttc_table(priv
, &ttc_params
, &priv
->fs
.ttc
);
281 netdev_err(priv
->netdev
, "Failed to create ttc table, err=%d\n",
283 goto err_destroy_inner_ttc_table
;
288 err_destroy_inner_ttc_table
:
289 mlx5e_destroy_inner_ttc_table(priv
, &priv
->fs
.inner_ttc
);
290 err_destroy_arfs_tables
:
291 mlx5e_arfs_destroy_tables(priv
);
296 static void mlx5i_destroy_flow_steering(struct mlx5e_priv
*priv
)
298 mlx5e_destroy_ttc_table(priv
, &priv
->fs
.ttc
);
299 mlx5e_destroy_inner_ttc_table(priv
, &priv
->fs
.inner_ttc
);
300 mlx5e_arfs_destroy_tables(priv
);
303 static int mlx5i_init_rx(struct mlx5e_priv
*priv
)
307 err
= mlx5e_create_indirect_rqt(priv
);
311 err
= mlx5e_create_direct_rqts(priv
);
313 goto err_destroy_indirect_rqts
;
315 err
= mlx5e_create_indirect_tirs(priv
);
317 goto err_destroy_direct_rqts
;
319 err
= mlx5e_create_direct_tirs(priv
);
321 goto err_destroy_indirect_tirs
;
323 err
= mlx5i_create_flow_steering(priv
);
325 goto err_destroy_direct_tirs
;
329 err_destroy_direct_tirs
:
330 mlx5e_destroy_direct_tirs(priv
);
331 err_destroy_indirect_tirs
:
332 mlx5e_destroy_indirect_tirs(priv
);
333 err_destroy_direct_rqts
:
334 mlx5e_destroy_direct_rqts(priv
);
335 err_destroy_indirect_rqts
:
336 mlx5e_destroy_rqt(priv
, &priv
->indir_rqt
);
340 static void mlx5i_cleanup_rx(struct mlx5e_priv
*priv
)
342 mlx5i_destroy_flow_steering(priv
);
343 mlx5e_destroy_direct_tirs(priv
);
344 mlx5e_destroy_indirect_tirs(priv
);
345 mlx5e_destroy_direct_rqts(priv
);
346 mlx5e_destroy_rqt(priv
, &priv
->indir_rqt
);
349 static const struct mlx5e_profile mlx5i_nic_profile
= {
351 .cleanup
= mlx5i_cleanup
,
352 .init_tx
= mlx5i_init_tx
,
353 .cleanup_tx
= mlx5i_cleanup_tx
,
354 .init_rx
= mlx5i_init_rx
,
355 .cleanup_rx
= mlx5i_cleanup_rx
,
356 .enable
= NULL
, /* mlx5i_enable */
357 .disable
= NULL
, /* mlx5i_disable */
358 .update_stats
= NULL
, /* mlx5i_update_stats */
359 .max_nch
= mlx5e_get_max_num_channels
,
360 .update_carrier
= NULL
, /* no HW update in IB link */
361 .rx_handlers
.handle_rx_cqe
= mlx5i_handle_rx_cqe
,
362 .rx_handlers
.handle_rx_cqe_mpwqe
= NULL
, /* Not supported */
363 .max_tc
= MLX5I_MAX_NUM_TC
,
366 /* mlx5i netdev NDos */
368 static int mlx5i_change_mtu(struct net_device
*netdev
, int new_mtu
)
370 struct mlx5e_priv
*priv
= mlx5i_epriv(netdev
);
371 struct mlx5e_channels new_channels
= {};
372 struct mlx5e_params
*params
;
375 mutex_lock(&priv
->state_lock
);
377 params
= &priv
->channels
.params
;
379 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
)) {
380 params
->sw_mtu
= new_mtu
;
381 netdev
->mtu
= params
->sw_mtu
;
385 new_channels
.params
= *params
;
386 new_channels
.params
.sw_mtu
= new_mtu
;
387 err
= mlx5e_open_channels(priv
, &new_channels
);
391 mlx5e_switch_priv_channels(priv
, &new_channels
, NULL
);
392 netdev
->mtu
= new_channels
.params
.sw_mtu
;
395 mutex_unlock(&priv
->state_lock
);
399 int mlx5i_dev_init(struct net_device
*dev
)
401 struct mlx5e_priv
*priv
= mlx5i_epriv(dev
);
402 struct mlx5i_priv
*ipriv
= priv
->ppriv
;
404 /* Set dev address using underlay QP */
405 dev
->dev_addr
[1] = (ipriv
->qp
.qpn
>> 16) & 0xff;
406 dev
->dev_addr
[2] = (ipriv
->qp
.qpn
>> 8) & 0xff;
407 dev
->dev_addr
[3] = (ipriv
->qp
.qpn
) & 0xff;
409 /* Add QPN to net-device mapping to HT */
410 mlx5i_pkey_add_qpn(dev
,ipriv
->qp
.qpn
);
415 int mlx5i_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
417 struct mlx5e_priv
*priv
= mlx5i_epriv(dev
);
421 return mlx5e_hwstamp_set(priv
, ifr
);
423 return mlx5e_hwstamp_get(priv
, ifr
);
429 void mlx5i_dev_cleanup(struct net_device
*dev
)
431 struct mlx5e_priv
*priv
= mlx5i_epriv(dev
);
432 struct mlx5i_priv
*ipriv
= priv
->ppriv
;
434 mlx5i_uninit_underlay_qp(priv
);
436 /* Delete QPN to net-device mapping from HT */
437 mlx5i_pkey_del_qpn(dev
, ipriv
->qp
.qpn
);
440 static int mlx5i_open(struct net_device
*netdev
)
442 struct mlx5e_priv
*epriv
= mlx5i_epriv(netdev
);
443 struct mlx5i_priv
*ipriv
= epriv
->ppriv
;
444 struct mlx5_core_dev
*mdev
= epriv
->mdev
;
447 mutex_lock(&epriv
->state_lock
);
449 set_bit(MLX5E_STATE_OPENED
, &epriv
->state
);
451 err
= mlx5i_init_underlay_qp(epriv
);
453 mlx5_core_warn(mdev
, "prepare underlay qp state failed, %d\n", err
);
454 goto err_clear_state_opened_flag
;
457 err
= mlx5_fs_add_rx_underlay_qpn(mdev
, ipriv
->qp
.qpn
);
459 mlx5_core_warn(mdev
, "attach underlay qp to ft failed, %d\n", err
);
463 err
= mlx5e_open_channels(epriv
, &epriv
->channels
);
465 goto err_remove_fs_underlay_qp
;
467 mlx5e_refresh_tirs(epriv
, false);
468 mlx5e_activate_priv_channels(epriv
);
470 mutex_unlock(&epriv
->state_lock
);
473 err_remove_fs_underlay_qp
:
474 mlx5_fs_remove_rx_underlay_qpn(mdev
, ipriv
->qp
.qpn
);
476 mlx5i_uninit_underlay_qp(epriv
);
477 err_clear_state_opened_flag
:
478 clear_bit(MLX5E_STATE_OPENED
, &epriv
->state
);
479 mutex_unlock(&epriv
->state_lock
);
483 static int mlx5i_close(struct net_device
*netdev
)
485 struct mlx5e_priv
*epriv
= mlx5i_epriv(netdev
);
486 struct mlx5i_priv
*ipriv
= epriv
->ppriv
;
487 struct mlx5_core_dev
*mdev
= epriv
->mdev
;
489 /* May already be CLOSED in case a previous configuration operation
490 * (e.g RX/TX queue size change) that involves close&open failed.
492 mutex_lock(&epriv
->state_lock
);
494 if (!test_bit(MLX5E_STATE_OPENED
, &epriv
->state
))
497 clear_bit(MLX5E_STATE_OPENED
, &epriv
->state
);
499 netif_carrier_off(epriv
->netdev
);
500 mlx5_fs_remove_rx_underlay_qpn(mdev
, ipriv
->qp
.qpn
);
501 mlx5i_uninit_underlay_qp(epriv
);
502 mlx5e_deactivate_priv_channels(epriv
);
503 mlx5e_close_channels(&epriv
->channels
);
505 mutex_unlock(&epriv
->state_lock
);
509 /* IPoIB RDMA netdev callbacks */
510 static int mlx5i_attach_mcast(struct net_device
*netdev
, struct ib_device
*hca
,
511 union ib_gid
*gid
, u16 lid
, int set_qkey
,
514 struct mlx5e_priv
*epriv
= mlx5i_epriv(netdev
);
515 struct mlx5_core_dev
*mdev
= epriv
->mdev
;
516 struct mlx5i_priv
*ipriv
= epriv
->ppriv
;
519 mlx5_core_dbg(mdev
, "attaching QPN 0x%x, MGID %pI6\n", ipriv
->qp
.qpn
, gid
->raw
);
520 err
= mlx5_core_attach_mcg(mdev
, gid
, ipriv
->qp
.qpn
);
522 mlx5_core_warn(mdev
, "failed attaching QPN 0x%x, MGID %pI6\n",
523 ipriv
->qp
.qpn
, gid
->raw
);
526 mlx5_core_dbg(mdev
, "%s setting qkey 0x%x\n",
534 static int mlx5i_detach_mcast(struct net_device
*netdev
, struct ib_device
*hca
,
535 union ib_gid
*gid
, u16 lid
)
537 struct mlx5e_priv
*epriv
= mlx5i_epriv(netdev
);
538 struct mlx5_core_dev
*mdev
= epriv
->mdev
;
539 struct mlx5i_priv
*ipriv
= epriv
->ppriv
;
542 mlx5_core_dbg(mdev
, "detaching QPN 0x%x, MGID %pI6\n", ipriv
->qp
.qpn
, gid
->raw
);
544 err
= mlx5_core_detach_mcg(mdev
, gid
, ipriv
->qp
.qpn
);
546 mlx5_core_dbg(mdev
, "failed detaching QPN 0x%x, MGID %pI6\n",
547 ipriv
->qp
.qpn
, gid
->raw
);
552 static int mlx5i_xmit(struct net_device
*dev
, struct sk_buff
*skb
,
553 struct ib_ah
*address
, u32 dqpn
)
555 struct mlx5e_priv
*epriv
= mlx5i_epriv(dev
);
556 struct mlx5e_txqsq
*sq
= epriv
->txq2sq
[skb_get_queue_mapping(skb
)];
557 struct mlx5_ib_ah
*mah
= to_mah(address
);
558 struct mlx5i_priv
*ipriv
= epriv
->ppriv
;
560 return mlx5i_sq_xmit(sq
, skb
, &mah
->av
, dqpn
, ipriv
->qkey
);
563 static void mlx5i_set_pkey_index(struct net_device
*netdev
, int id
)
565 struct mlx5i_priv
*ipriv
= netdev_priv(netdev
);
567 ipriv
->pkey_index
= (u16
)id
;
570 static int mlx5i_check_required_hca_cap(struct mlx5_core_dev
*mdev
)
572 if (MLX5_CAP_GEN(mdev
, port_type
) != MLX5_CAP_PORT_TYPE_IB
)
575 if (!MLX5_CAP_GEN(mdev
, ipoib_enhanced_offloads
)) {
576 mlx5_core_warn(mdev
, "IPoIB enhanced offloads are not supported\n");
583 struct net_device
*mlx5_rdma_netdev_alloc(struct mlx5_core_dev
*mdev
,
584 struct ib_device
*ibdev
,
586 void (*setup
)(struct net_device
*))
588 const struct mlx5e_profile
*profile
;
589 struct net_device
*netdev
;
590 struct mlx5i_priv
*ipriv
;
591 struct mlx5e_priv
*epriv
;
592 struct rdma_netdev
*rn
;
597 if (mlx5i_check_required_hca_cap(mdev
)) {
598 mlx5_core_warn(mdev
, "Accelerated mode is not supported\n");
599 return ERR_PTR(-EOPNOTSUPP
);
602 /* TODO: Need to find a better way to check if child device*/
603 sub_interface
= (mdev
->mlx5e_res
.pdn
!= 0);
606 profile
= mlx5i_pkey_get_profile();
608 profile
= &mlx5i_nic_profile
;
610 nch
= profile
->max_nch(mdev
);
612 netdev
= alloc_netdev_mqs(sizeof(struct mlx5i_priv
) + sizeof(struct mlx5e_priv
),
613 name
, NET_NAME_UNKNOWN
,
615 nch
* MLX5E_MAX_NUM_TC
,
618 mlx5_core_warn(mdev
, "alloc_netdev_mqs failed\n");
622 ipriv
= netdev_priv(netdev
);
623 epriv
= mlx5i_epriv(netdev
);
625 epriv
->wq
= create_singlethread_workqueue("mlx5i");
627 goto err_free_netdev
;
629 ipriv
->sub_interface
= sub_interface
;
630 if (!ipriv
->sub_interface
) {
631 err
= mlx5i_pkey_qpn_ht_init(netdev
);
633 mlx5_core_warn(mdev
, "allocate qpn_to_netdev ht failed\n");
637 /* This should only be called once per mdev */
638 err
= mlx5e_create_mdev_resources(mdev
);
643 profile
->init(mdev
, netdev
, profile
, ipriv
);
645 mlx5e_attach_netdev(epriv
);
646 netif_carrier_off(netdev
);
648 /* set rdma_netdev func pointers */
651 rn
->send
= mlx5i_xmit
;
652 rn
->attach_mcast
= mlx5i_attach_mcast
;
653 rn
->detach_mcast
= mlx5i_detach_mcast
;
654 rn
->set_id
= mlx5i_set_pkey_index
;
659 mlx5i_pkey_qpn_ht_cleanup(netdev
);
661 destroy_workqueue(epriv
->wq
);
667 EXPORT_SYMBOL(mlx5_rdma_netdev_alloc
);
669 void mlx5_rdma_netdev_free(struct net_device
*netdev
)
671 struct mlx5e_priv
*priv
= mlx5i_epriv(netdev
);
672 struct mlx5i_priv
*ipriv
= priv
->ppriv
;
673 const struct mlx5e_profile
*profile
= priv
->profile
;
675 mlx5e_detach_netdev(priv
);
676 profile
->cleanup(priv
);
677 destroy_workqueue(priv
->wq
);
679 if (!ipriv
->sub_interface
) {
680 mlx5i_pkey_qpn_ht_cleanup(netdev
);
681 mlx5e_destroy_mdev_resources(priv
->mdev
);
685 EXPORT_SYMBOL(mlx5_rdma_netdev_free
);