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[mirror_ubuntu-jammy-kernel.git] / drivers / net / ethernet / mellanox / mlx5 / core / ipoib / ipoib.c
1 /*
2 * Copyright (c) 2017, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include <rdma/ib_verbs.h>
34 #include <linux/mlx5/fs.h>
35 #include "en.h"
36 #include "ipoib.h"
37
38 #define IB_DEFAULT_Q_KEY 0xb1b
39 #define MLX5I_PARAMS_DEFAULT_LOG_RQ_SIZE 9
40
41 static int mlx5i_open(struct net_device *netdev);
42 static int mlx5i_close(struct net_device *netdev);
43 static int mlx5i_change_mtu(struct net_device *netdev, int new_mtu);
44 static int mlx5i_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
45
46 static const struct net_device_ops mlx5i_netdev_ops = {
47 .ndo_open = mlx5i_open,
48 .ndo_stop = mlx5i_close,
49 .ndo_init = mlx5i_dev_init,
50 .ndo_uninit = mlx5i_dev_cleanup,
51 .ndo_change_mtu = mlx5i_change_mtu,
52 .ndo_do_ioctl = mlx5i_ioctl,
53 };
54
55 /* IPoIB mlx5 netdev profile */
56 static void mlx5i_build_nic_params(struct mlx5_core_dev *mdev,
57 struct mlx5e_params *params)
58 {
59 /* Override RQ params as IPoIB supports only LINKED LIST RQ for now */
60 mlx5e_init_rq_type_params(mdev, params, MLX5_WQ_TYPE_LINKED_LIST);
61
62 /* RQ size in ipoib by default is 512 */
63 params->log_rq_size = is_kdump_kernel() ?
64 MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE :
65 MLX5I_PARAMS_DEFAULT_LOG_RQ_SIZE;
66
67 params->lro_en = false;
68 }
69
70 /* Called directly after IPoIB netdevice was created to initialize SW structs */
71 void mlx5i_init(struct mlx5_core_dev *mdev,
72 struct net_device *netdev,
73 const struct mlx5e_profile *profile,
74 void *ppriv)
75 {
76 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
77
78 /* priv init */
79 priv->mdev = mdev;
80 priv->netdev = netdev;
81 priv->profile = profile;
82 priv->ppriv = ppriv;
83 priv->hard_mtu = MLX5_IB_GRH_BYTES + MLX5_IPOIB_HARD_LEN;
84 mutex_init(&priv->state_lock);
85
86 mlx5e_build_nic_params(mdev, &priv->channels.params, profile->max_nch(mdev));
87 mlx5i_build_nic_params(mdev, &priv->channels.params);
88
89 /* netdev init */
90 netdev->hw_features |= NETIF_F_SG;
91 netdev->hw_features |= NETIF_F_IP_CSUM;
92 netdev->hw_features |= NETIF_F_IPV6_CSUM;
93 netdev->hw_features |= NETIF_F_GRO;
94 netdev->hw_features |= NETIF_F_TSO;
95 netdev->hw_features |= NETIF_F_TSO6;
96 netdev->hw_features |= NETIF_F_RXCSUM;
97 netdev->hw_features |= NETIF_F_RXHASH;
98
99 netdev->netdev_ops = &mlx5i_netdev_ops;
100 netdev->ethtool_ops = &mlx5i_ethtool_ops;
101 }
102
103 /* Called directly before IPoIB netdevice is destroyed to cleanup SW structs */
104 static void mlx5i_cleanup(struct mlx5e_priv *priv)
105 {
106 /* Do nothing .. */
107 }
108
109 int mlx5i_init_underlay_qp(struct mlx5e_priv *priv)
110 {
111 struct mlx5_core_dev *mdev = priv->mdev;
112 struct mlx5i_priv *ipriv = priv->ppriv;
113 struct mlx5_core_qp *qp = &ipriv->qp;
114 struct mlx5_qp_context *context;
115 int ret;
116
117 /* QP states */
118 context = kzalloc(sizeof(*context), GFP_KERNEL);
119 if (!context)
120 return -ENOMEM;
121
122 context->flags = cpu_to_be32(MLX5_QP_PM_MIGRATED << 11);
123 context->pri_path.port = 1;
124 context->pri_path.pkey_index = cpu_to_be16(ipriv->pkey_index);
125 context->qkey = cpu_to_be32(IB_DEFAULT_Q_KEY);
126
127 ret = mlx5_core_qp_modify(mdev, MLX5_CMD_OP_RST2INIT_QP, 0, context, qp);
128 if (ret) {
129 mlx5_core_err(mdev, "Failed to modify qp RST2INIT, err: %d\n", ret);
130 goto err_qp_modify_to_err;
131 }
132 memset(context, 0, sizeof(*context));
133
134 ret = mlx5_core_qp_modify(mdev, MLX5_CMD_OP_INIT2RTR_QP, 0, context, qp);
135 if (ret) {
136 mlx5_core_err(mdev, "Failed to modify qp INIT2RTR, err: %d\n", ret);
137 goto err_qp_modify_to_err;
138 }
139
140 ret = mlx5_core_qp_modify(mdev, MLX5_CMD_OP_RTR2RTS_QP, 0, context, qp);
141 if (ret) {
142 mlx5_core_err(mdev, "Failed to modify qp RTR2RTS, err: %d\n", ret);
143 goto err_qp_modify_to_err;
144 }
145
146 kfree(context);
147 return 0;
148
149 err_qp_modify_to_err:
150 mlx5_core_qp_modify(mdev, MLX5_CMD_OP_2ERR_QP, 0, &context, qp);
151 kfree(context);
152 return ret;
153 }
154
155 void mlx5i_uninit_underlay_qp(struct mlx5e_priv *priv)
156 {
157 struct mlx5i_priv *ipriv = priv->ppriv;
158 struct mlx5_core_dev *mdev = priv->mdev;
159 struct mlx5_qp_context context;
160 int err;
161
162 err = mlx5_core_qp_modify(mdev, MLX5_CMD_OP_2RST_QP, 0, &context,
163 &ipriv->qp);
164 if (err)
165 mlx5_core_err(mdev, "Failed to modify qp 2RST, err: %d\n", err);
166 }
167
168 #define MLX5_QP_ENHANCED_ULP_STATELESS_MODE 2
169
170 int mlx5i_create_underlay_qp(struct mlx5_core_dev *mdev, struct mlx5_core_qp *qp)
171 {
172 u32 *in = NULL;
173 void *addr_path;
174 int ret = 0;
175 int inlen;
176 void *qpc;
177
178 inlen = MLX5_ST_SZ_BYTES(create_qp_in);
179 in = kvzalloc(inlen, GFP_KERNEL);
180 if (!in)
181 return -ENOMEM;
182
183 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
184 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_UD);
185 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
186 MLX5_SET(qpc, qpc, ulp_stateless_offload_mode,
187 MLX5_QP_ENHANCED_ULP_STATELESS_MODE);
188
189 addr_path = MLX5_ADDR_OF(qpc, qpc, primary_address_path);
190 MLX5_SET(ads, addr_path, port, 1);
191 MLX5_SET(ads, addr_path, grh, 1);
192
193 ret = mlx5_core_create_qp(mdev, qp, in, inlen);
194 if (ret) {
195 mlx5_core_err(mdev, "Failed creating IPoIB QP err : %d\n", ret);
196 goto out;
197 }
198
199 out:
200 kvfree(in);
201 return ret;
202 }
203
204 void mlx5i_destroy_underlay_qp(struct mlx5_core_dev *mdev, struct mlx5_core_qp *qp)
205 {
206 mlx5_core_destroy_qp(mdev, qp);
207 }
208
209 static int mlx5i_init_tx(struct mlx5e_priv *priv)
210 {
211 struct mlx5i_priv *ipriv = priv->ppriv;
212 int err;
213
214 err = mlx5i_create_underlay_qp(priv->mdev, &ipriv->qp);
215 if (err) {
216 mlx5_core_warn(priv->mdev, "create underlay QP failed, %d\n", err);
217 return err;
218 }
219
220 err = mlx5e_create_tis(priv->mdev, 0 /* tc */, ipriv->qp.qpn, &priv->tisn[0]);
221 if (err) {
222 mlx5_core_warn(priv->mdev, "create tis failed, %d\n", err);
223 goto err_destroy_underlay_qp;
224 }
225
226 return 0;
227
228 err_destroy_underlay_qp:
229 mlx5i_destroy_underlay_qp(priv->mdev, &ipriv->qp);
230 return err;
231 }
232
233 static void mlx5i_cleanup_tx(struct mlx5e_priv *priv)
234 {
235 struct mlx5i_priv *ipriv = priv->ppriv;
236
237 mlx5e_destroy_tis(priv->mdev, priv->tisn[0]);
238 mlx5i_destroy_underlay_qp(priv->mdev, &ipriv->qp);
239 }
240
241 static int mlx5i_create_flow_steering(struct mlx5e_priv *priv)
242 {
243 int err;
244
245 priv->fs.ns = mlx5_get_flow_namespace(priv->mdev,
246 MLX5_FLOW_NAMESPACE_KERNEL);
247
248 if (!priv->fs.ns)
249 return -EINVAL;
250
251 err = mlx5e_arfs_create_tables(priv);
252 if (err) {
253 netdev_err(priv->netdev, "Failed to create arfs tables, err=%d\n",
254 err);
255 priv->netdev->hw_features &= ~NETIF_F_NTUPLE;
256 }
257
258 err = mlx5e_create_inner_ttc_table(priv);
259 if (err) {
260 netdev_err(priv->netdev, "Failed to create inner ttc table, err=%d\n",
261 err);
262 goto err_destroy_arfs_tables;
263 }
264
265 err = mlx5e_create_ttc_table(priv);
266 if (err) {
267 netdev_err(priv->netdev, "Failed to create ttc table, err=%d\n",
268 err);
269 goto err_destroy_inner_ttc_table;
270 }
271
272 return 0;
273
274 err_destroy_inner_ttc_table:
275 mlx5e_destroy_inner_ttc_table(priv);
276 err_destroy_arfs_tables:
277 mlx5e_arfs_destroy_tables(priv);
278
279 return err;
280 }
281
282 static void mlx5i_destroy_flow_steering(struct mlx5e_priv *priv)
283 {
284 mlx5e_destroy_ttc_table(priv);
285 mlx5e_destroy_inner_ttc_table(priv);
286 mlx5e_arfs_destroy_tables(priv);
287 }
288
289 static int mlx5i_init_rx(struct mlx5e_priv *priv)
290 {
291 int err;
292
293 err = mlx5e_create_indirect_rqt(priv);
294 if (err)
295 return err;
296
297 err = mlx5e_create_direct_rqts(priv);
298 if (err)
299 goto err_destroy_indirect_rqts;
300
301 err = mlx5e_create_indirect_tirs(priv);
302 if (err)
303 goto err_destroy_direct_rqts;
304
305 err = mlx5e_create_direct_tirs(priv);
306 if (err)
307 goto err_destroy_indirect_tirs;
308
309 err = mlx5i_create_flow_steering(priv);
310 if (err)
311 goto err_destroy_direct_tirs;
312
313 return 0;
314
315 err_destroy_direct_tirs:
316 mlx5e_destroy_direct_tirs(priv);
317 err_destroy_indirect_tirs:
318 mlx5e_destroy_indirect_tirs(priv);
319 err_destroy_direct_rqts:
320 mlx5e_destroy_direct_rqts(priv);
321 err_destroy_indirect_rqts:
322 mlx5e_destroy_rqt(priv, &priv->indir_rqt);
323 return err;
324 }
325
326 static void mlx5i_cleanup_rx(struct mlx5e_priv *priv)
327 {
328 mlx5i_destroy_flow_steering(priv);
329 mlx5e_destroy_direct_tirs(priv);
330 mlx5e_destroy_indirect_tirs(priv);
331 mlx5e_destroy_direct_rqts(priv);
332 mlx5e_destroy_rqt(priv, &priv->indir_rqt);
333 }
334
335 static const struct mlx5e_profile mlx5i_nic_profile = {
336 .init = mlx5i_init,
337 .cleanup = mlx5i_cleanup,
338 .init_tx = mlx5i_init_tx,
339 .cleanup_tx = mlx5i_cleanup_tx,
340 .init_rx = mlx5i_init_rx,
341 .cleanup_rx = mlx5i_cleanup_rx,
342 .enable = NULL, /* mlx5i_enable */
343 .disable = NULL, /* mlx5i_disable */
344 .update_stats = NULL, /* mlx5i_update_stats */
345 .max_nch = mlx5e_get_max_num_channels,
346 .update_carrier = NULL, /* no HW update in IB link */
347 .rx_handlers.handle_rx_cqe = mlx5i_handle_rx_cqe,
348 .rx_handlers.handle_rx_cqe_mpwqe = NULL, /* Not supported */
349 .max_tc = MLX5I_MAX_NUM_TC,
350 };
351
352 /* mlx5i netdev NDos */
353
354 static int mlx5i_change_mtu(struct net_device *netdev, int new_mtu)
355 {
356 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
357 struct mlx5e_channels new_channels = {};
358 int curr_mtu;
359 int err = 0;
360
361 mutex_lock(&priv->state_lock);
362
363 curr_mtu = netdev->mtu;
364 netdev->mtu = new_mtu;
365
366 if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
367 goto out;
368
369 new_channels.params = priv->channels.params;
370 err = mlx5e_open_channels(priv, &new_channels);
371 if (err) {
372 netdev->mtu = curr_mtu;
373 goto out;
374 }
375
376 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
377
378 out:
379 mutex_unlock(&priv->state_lock);
380 return err;
381 }
382
383 int mlx5i_dev_init(struct net_device *dev)
384 {
385 struct mlx5e_priv *priv = mlx5i_epriv(dev);
386 struct mlx5i_priv *ipriv = priv->ppriv;
387
388 /* Set dev address using underlay QP */
389 dev->dev_addr[1] = (ipriv->qp.qpn >> 16) & 0xff;
390 dev->dev_addr[2] = (ipriv->qp.qpn >> 8) & 0xff;
391 dev->dev_addr[3] = (ipriv->qp.qpn) & 0xff;
392
393 /* Add QPN to net-device mapping to HT */
394 mlx5i_pkey_add_qpn(dev ,ipriv->qp.qpn);
395
396 return 0;
397 }
398
399 static int mlx5i_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
400 {
401 struct mlx5e_priv *priv = mlx5i_epriv(dev);
402
403 switch (cmd) {
404 case SIOCSHWTSTAMP:
405 return mlx5e_hwstamp_set(priv, ifr);
406 case SIOCGHWTSTAMP:
407 return mlx5e_hwstamp_get(priv, ifr);
408 default:
409 return -EOPNOTSUPP;
410 }
411 }
412
413 void mlx5i_dev_cleanup(struct net_device *dev)
414 {
415 struct mlx5e_priv *priv = mlx5i_epriv(dev);
416 struct mlx5i_priv *ipriv = priv->ppriv;
417
418 mlx5i_uninit_underlay_qp(priv);
419
420 /* Delete QPN to net-device mapping from HT */
421 mlx5i_pkey_del_qpn(dev, ipriv->qp.qpn);
422 }
423
424 static int mlx5i_open(struct net_device *netdev)
425 {
426 struct mlx5e_priv *epriv = mlx5i_epriv(netdev);
427 struct mlx5i_priv *ipriv = epriv->ppriv;
428 struct mlx5_core_dev *mdev = epriv->mdev;
429 int err;
430
431 mutex_lock(&epriv->state_lock);
432
433 set_bit(MLX5E_STATE_OPENED, &epriv->state);
434
435 err = mlx5i_init_underlay_qp(epriv);
436 if (err) {
437 mlx5_core_warn(mdev, "prepare underlay qp state failed, %d\n", err);
438 goto err_clear_state_opened_flag;
439 }
440
441 err = mlx5_fs_add_rx_underlay_qpn(mdev, ipriv->qp.qpn);
442 if (err) {
443 mlx5_core_warn(mdev, "attach underlay qp to ft failed, %d\n", err);
444 goto err_reset_qp;
445 }
446
447 err = mlx5e_open_channels(epriv, &epriv->channels);
448 if (err)
449 goto err_remove_fs_underlay_qp;
450
451 mlx5e_refresh_tirs(epriv, false);
452 mlx5e_activate_priv_channels(epriv);
453 mlx5e_timestamp_set(epriv);
454
455 mutex_unlock(&epriv->state_lock);
456 return 0;
457
458 err_remove_fs_underlay_qp:
459 mlx5_fs_remove_rx_underlay_qpn(mdev, ipriv->qp.qpn);
460 err_reset_qp:
461 mlx5i_uninit_underlay_qp(epriv);
462 err_clear_state_opened_flag:
463 clear_bit(MLX5E_STATE_OPENED, &epriv->state);
464 mutex_unlock(&epriv->state_lock);
465 return err;
466 }
467
468 static int mlx5i_close(struct net_device *netdev)
469 {
470 struct mlx5e_priv *epriv = mlx5i_epriv(netdev);
471 struct mlx5i_priv *ipriv = epriv->ppriv;
472 struct mlx5_core_dev *mdev = epriv->mdev;
473
474 /* May already be CLOSED in case a previous configuration operation
475 * (e.g RX/TX queue size change) that involves close&open failed.
476 */
477 mutex_lock(&epriv->state_lock);
478
479 if (!test_bit(MLX5E_STATE_OPENED, &epriv->state))
480 goto unlock;
481
482 clear_bit(MLX5E_STATE_OPENED, &epriv->state);
483
484 netif_carrier_off(epriv->netdev);
485 mlx5_fs_remove_rx_underlay_qpn(mdev, ipriv->qp.qpn);
486 mlx5i_uninit_underlay_qp(epriv);
487 mlx5e_deactivate_priv_channels(epriv);
488 mlx5e_close_channels(&epriv->channels);;
489 unlock:
490 mutex_unlock(&epriv->state_lock);
491 return 0;
492 }
493
494 /* IPoIB RDMA netdev callbacks */
495 static int mlx5i_attach_mcast(struct net_device *netdev, struct ib_device *hca,
496 union ib_gid *gid, u16 lid, int set_qkey,
497 u32 qkey)
498 {
499 struct mlx5e_priv *epriv = mlx5i_epriv(netdev);
500 struct mlx5_core_dev *mdev = epriv->mdev;
501 struct mlx5i_priv *ipriv = epriv->ppriv;
502 int err;
503
504 mlx5_core_dbg(mdev, "attaching QPN 0x%x, MGID %pI6\n", ipriv->qp.qpn, gid->raw);
505 err = mlx5_core_attach_mcg(mdev, gid, ipriv->qp.qpn);
506 if (err)
507 mlx5_core_warn(mdev, "failed attaching QPN 0x%x, MGID %pI6\n",
508 ipriv->qp.qpn, gid->raw);
509
510 if (set_qkey) {
511 mlx5_core_dbg(mdev, "%s setting qkey 0x%x\n",
512 netdev->name, qkey);
513 ipriv->qkey = qkey;
514 }
515
516 return err;
517 }
518
519 static int mlx5i_detach_mcast(struct net_device *netdev, struct ib_device *hca,
520 union ib_gid *gid, u16 lid)
521 {
522 struct mlx5e_priv *epriv = mlx5i_epriv(netdev);
523 struct mlx5_core_dev *mdev = epriv->mdev;
524 struct mlx5i_priv *ipriv = epriv->ppriv;
525 int err;
526
527 mlx5_core_dbg(mdev, "detaching QPN 0x%x, MGID %pI6\n", ipriv->qp.qpn, gid->raw);
528
529 err = mlx5_core_detach_mcg(mdev, gid, ipriv->qp.qpn);
530 if (err)
531 mlx5_core_dbg(mdev, "failed dettaching QPN 0x%x, MGID %pI6\n",
532 ipriv->qp.qpn, gid->raw);
533
534 return err;
535 }
536
537 static int mlx5i_xmit(struct net_device *dev, struct sk_buff *skb,
538 struct ib_ah *address, u32 dqpn)
539 {
540 struct mlx5e_priv *epriv = mlx5i_epriv(dev);
541 struct mlx5e_txqsq *sq = epriv->txq2sq[skb_get_queue_mapping(skb)];
542 struct mlx5_ib_ah *mah = to_mah(address);
543 struct mlx5i_priv *ipriv = epriv->ppriv;
544
545 return mlx5i_sq_xmit(sq, skb, &mah->av, dqpn, ipriv->qkey);
546 }
547
548 static void mlx5i_set_pkey_index(struct net_device *netdev, int id)
549 {
550 struct mlx5i_priv *ipriv = netdev_priv(netdev);
551
552 ipriv->pkey_index = (u16)id;
553 }
554
555 static int mlx5i_check_required_hca_cap(struct mlx5_core_dev *mdev)
556 {
557 if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_IB)
558 return -EOPNOTSUPP;
559
560 if (!MLX5_CAP_GEN(mdev, ipoib_enhanced_offloads)) {
561 mlx5_core_warn(mdev, "IPoIB enhanced offloads are not supported\n");
562 return -EOPNOTSUPP;
563 }
564
565 return 0;
566 }
567
568 struct net_device *mlx5_rdma_netdev_alloc(struct mlx5_core_dev *mdev,
569 struct ib_device *ibdev,
570 const char *name,
571 void (*setup)(struct net_device *))
572 {
573 const struct mlx5e_profile *profile;
574 struct net_device *netdev;
575 struct mlx5i_priv *ipriv;
576 struct mlx5e_priv *epriv;
577 struct rdma_netdev *rn;
578 bool sub_interface;
579 int nch;
580 int err;
581
582 if (mlx5i_check_required_hca_cap(mdev)) {
583 mlx5_core_warn(mdev, "Accelerated mode is not supported\n");
584 return ERR_PTR(-EOPNOTSUPP);
585 }
586
587 /* TODO: Need to find a better way to check if child device*/
588 sub_interface = (mdev->mlx5e_res.pdn != 0);
589
590 if (sub_interface)
591 profile = mlx5i_pkey_get_profile();
592 else
593 profile = &mlx5i_nic_profile;
594
595 nch = profile->max_nch(mdev);
596
597 netdev = alloc_netdev_mqs(sizeof(struct mlx5i_priv) + sizeof(struct mlx5e_priv),
598 name, NET_NAME_UNKNOWN,
599 setup,
600 nch * MLX5E_MAX_NUM_TC,
601 nch);
602 if (!netdev) {
603 mlx5_core_warn(mdev, "alloc_netdev_mqs failed\n");
604 return NULL;
605 }
606
607 ipriv = netdev_priv(netdev);
608 epriv = mlx5i_epriv(netdev);
609
610 epriv->wq = create_singlethread_workqueue("mlx5i");
611 if (!epriv->wq)
612 goto err_free_netdev;
613
614 ipriv->sub_interface = sub_interface;
615 if (!ipriv->sub_interface) {
616 err = mlx5i_pkey_qpn_ht_init(netdev);
617 if (err) {
618 mlx5_core_warn(mdev, "allocate qpn_to_netdev ht failed\n");
619 goto destroy_wq;
620 }
621
622 /* This should only be called once per mdev */
623 err = mlx5e_create_mdev_resources(mdev);
624 if (err)
625 goto destroy_ht;
626 }
627
628 profile->init(mdev, netdev, profile, ipriv);
629
630 mlx5e_attach_netdev(epriv);
631 netif_carrier_off(netdev);
632
633 /* set rdma_netdev func pointers */
634 rn = &ipriv->rn;
635 rn->hca = ibdev;
636 rn->send = mlx5i_xmit;
637 rn->attach_mcast = mlx5i_attach_mcast;
638 rn->detach_mcast = mlx5i_detach_mcast;
639 rn->set_id = mlx5i_set_pkey_index;
640
641 return netdev;
642
643 destroy_ht:
644 mlx5i_pkey_qpn_ht_cleanup(netdev);
645 destroy_wq:
646 destroy_workqueue(epriv->wq);
647 err_free_netdev:
648 free_netdev(netdev);
649
650 return NULL;
651 }
652 EXPORT_SYMBOL(mlx5_rdma_netdev_alloc);
653
654 void mlx5_rdma_netdev_free(struct net_device *netdev)
655 {
656 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
657 struct mlx5i_priv *ipriv = priv->ppriv;
658 const struct mlx5e_profile *profile = priv->profile;
659
660 mlx5e_detach_netdev(priv);
661 profile->cleanup(priv);
662 destroy_workqueue(priv->wq);
663
664 if (!ipriv->sub_interface) {
665 mlx5i_pkey_qpn_ht_cleanup(netdev);
666 mlx5e_destroy_mdev_resources(priv->mdev);
667 }
668 free_netdev(netdev);
669 }
670 EXPORT_SYMBOL(mlx5_rdma_netdev_free);