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Merge branch 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[mirror_ubuntu-jammy-kernel.git] / drivers / net / ethernet / mellanox / mlx5 / core / ipoib / ipoib.c
1 /*
2 * Copyright (c) 2017, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include <rdma/ib_verbs.h>
34 #include <linux/mlx5/fs.h>
35 #include "en.h"
36 #include "ipoib.h"
37
38 #define IB_DEFAULT_Q_KEY 0xb1b
39 #define MLX5I_PARAMS_DEFAULT_LOG_RQ_SIZE 9
40
41 static int mlx5i_open(struct net_device *netdev);
42 static int mlx5i_close(struct net_device *netdev);
43 static int mlx5i_change_mtu(struct net_device *netdev, int new_mtu);
44 static int mlx5i_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
45
46 static const struct net_device_ops mlx5i_netdev_ops = {
47 .ndo_open = mlx5i_open,
48 .ndo_stop = mlx5i_close,
49 .ndo_init = mlx5i_dev_init,
50 .ndo_uninit = mlx5i_dev_cleanup,
51 .ndo_change_mtu = mlx5i_change_mtu,
52 .ndo_do_ioctl = mlx5i_ioctl,
53 };
54
55 /* IPoIB mlx5 netdev profile */
56 static void mlx5i_build_nic_params(struct mlx5_core_dev *mdev,
57 struct mlx5e_params *params)
58 {
59 /* Override RQ params as IPoIB supports only LINKED LIST RQ for now */
60 mlx5e_init_rq_type_params(mdev, params, MLX5_WQ_TYPE_LINKED_LIST);
61
62 /* RQ size in ipoib by default is 512 */
63 params->log_rq_size = is_kdump_kernel() ?
64 MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE :
65 MLX5I_PARAMS_DEFAULT_LOG_RQ_SIZE;
66
67 params->lro_en = false;
68 }
69
70 /* Called directly after IPoIB netdevice was created to initialize SW structs */
71 void mlx5i_init(struct mlx5_core_dev *mdev,
72 struct net_device *netdev,
73 const struct mlx5e_profile *profile,
74 void *ppriv)
75 {
76 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
77
78 /* priv init */
79 priv->mdev = mdev;
80 priv->netdev = netdev;
81 priv->profile = profile;
82 priv->ppriv = ppriv;
83 priv->hard_mtu = MLX5_IB_GRH_BYTES + MLX5_IPOIB_HARD_LEN;
84 mutex_init(&priv->state_lock);
85
86 mlx5e_build_nic_params(mdev, &priv->channels.params, profile->max_nch(mdev));
87 mlx5i_build_nic_params(mdev, &priv->channels.params);
88
89 mlx5e_timestamp_init(priv);
90
91 /* netdev init */
92 netdev->hw_features |= NETIF_F_SG;
93 netdev->hw_features |= NETIF_F_IP_CSUM;
94 netdev->hw_features |= NETIF_F_IPV6_CSUM;
95 netdev->hw_features |= NETIF_F_GRO;
96 netdev->hw_features |= NETIF_F_TSO;
97 netdev->hw_features |= NETIF_F_TSO6;
98 netdev->hw_features |= NETIF_F_RXCSUM;
99 netdev->hw_features |= NETIF_F_RXHASH;
100
101 netdev->netdev_ops = &mlx5i_netdev_ops;
102 netdev->ethtool_ops = &mlx5i_ethtool_ops;
103 }
104
105 /* Called directly before IPoIB netdevice is destroyed to cleanup SW structs */
106 static void mlx5i_cleanup(struct mlx5e_priv *priv)
107 {
108 /* Do nothing .. */
109 }
110
111 int mlx5i_init_underlay_qp(struct mlx5e_priv *priv)
112 {
113 struct mlx5_core_dev *mdev = priv->mdev;
114 struct mlx5i_priv *ipriv = priv->ppriv;
115 struct mlx5_core_qp *qp = &ipriv->qp;
116 struct mlx5_qp_context *context;
117 int ret;
118
119 /* QP states */
120 context = kzalloc(sizeof(*context), GFP_KERNEL);
121 if (!context)
122 return -ENOMEM;
123
124 context->flags = cpu_to_be32(MLX5_QP_PM_MIGRATED << 11);
125 context->pri_path.port = 1;
126 context->pri_path.pkey_index = cpu_to_be16(ipriv->pkey_index);
127 context->qkey = cpu_to_be32(IB_DEFAULT_Q_KEY);
128
129 ret = mlx5_core_qp_modify(mdev, MLX5_CMD_OP_RST2INIT_QP, 0, context, qp);
130 if (ret) {
131 mlx5_core_err(mdev, "Failed to modify qp RST2INIT, err: %d\n", ret);
132 goto err_qp_modify_to_err;
133 }
134 memset(context, 0, sizeof(*context));
135
136 ret = mlx5_core_qp_modify(mdev, MLX5_CMD_OP_INIT2RTR_QP, 0, context, qp);
137 if (ret) {
138 mlx5_core_err(mdev, "Failed to modify qp INIT2RTR, err: %d\n", ret);
139 goto err_qp_modify_to_err;
140 }
141
142 ret = mlx5_core_qp_modify(mdev, MLX5_CMD_OP_RTR2RTS_QP, 0, context, qp);
143 if (ret) {
144 mlx5_core_err(mdev, "Failed to modify qp RTR2RTS, err: %d\n", ret);
145 goto err_qp_modify_to_err;
146 }
147
148 kfree(context);
149 return 0;
150
151 err_qp_modify_to_err:
152 mlx5_core_qp_modify(mdev, MLX5_CMD_OP_2ERR_QP, 0, &context, qp);
153 kfree(context);
154 return ret;
155 }
156
157 void mlx5i_uninit_underlay_qp(struct mlx5e_priv *priv)
158 {
159 struct mlx5i_priv *ipriv = priv->ppriv;
160 struct mlx5_core_dev *mdev = priv->mdev;
161 struct mlx5_qp_context context;
162 int err;
163
164 err = mlx5_core_qp_modify(mdev, MLX5_CMD_OP_2RST_QP, 0, &context,
165 &ipriv->qp);
166 if (err)
167 mlx5_core_err(mdev, "Failed to modify qp 2RST, err: %d\n", err);
168 }
169
170 #define MLX5_QP_ENHANCED_ULP_STATELESS_MODE 2
171
172 int mlx5i_create_underlay_qp(struct mlx5_core_dev *mdev, struct mlx5_core_qp *qp)
173 {
174 u32 *in = NULL;
175 void *addr_path;
176 int ret = 0;
177 int inlen;
178 void *qpc;
179
180 inlen = MLX5_ST_SZ_BYTES(create_qp_in);
181 in = kvzalloc(inlen, GFP_KERNEL);
182 if (!in)
183 return -ENOMEM;
184
185 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
186 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_UD);
187 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
188 MLX5_SET(qpc, qpc, ulp_stateless_offload_mode,
189 MLX5_QP_ENHANCED_ULP_STATELESS_MODE);
190
191 addr_path = MLX5_ADDR_OF(qpc, qpc, primary_address_path);
192 MLX5_SET(ads, addr_path, port, 1);
193 MLX5_SET(ads, addr_path, grh, 1);
194
195 ret = mlx5_core_create_qp(mdev, qp, in, inlen);
196 if (ret) {
197 mlx5_core_err(mdev, "Failed creating IPoIB QP err : %d\n", ret);
198 goto out;
199 }
200
201 out:
202 kvfree(in);
203 return ret;
204 }
205
206 void mlx5i_destroy_underlay_qp(struct mlx5_core_dev *mdev, struct mlx5_core_qp *qp)
207 {
208 mlx5_core_destroy_qp(mdev, qp);
209 }
210
211 static int mlx5i_init_tx(struct mlx5e_priv *priv)
212 {
213 struct mlx5i_priv *ipriv = priv->ppriv;
214 int err;
215
216 err = mlx5i_create_underlay_qp(priv->mdev, &ipriv->qp);
217 if (err) {
218 mlx5_core_warn(priv->mdev, "create underlay QP failed, %d\n", err);
219 return err;
220 }
221
222 err = mlx5e_create_tis(priv->mdev, 0 /* tc */, ipriv->qp.qpn, &priv->tisn[0]);
223 if (err) {
224 mlx5_core_warn(priv->mdev, "create tis failed, %d\n", err);
225 goto err_destroy_underlay_qp;
226 }
227
228 return 0;
229
230 err_destroy_underlay_qp:
231 mlx5i_destroy_underlay_qp(priv->mdev, &ipriv->qp);
232 return err;
233 }
234
235 static void mlx5i_cleanup_tx(struct mlx5e_priv *priv)
236 {
237 struct mlx5i_priv *ipriv = priv->ppriv;
238
239 mlx5e_destroy_tis(priv->mdev, priv->tisn[0]);
240 mlx5i_destroy_underlay_qp(priv->mdev, &ipriv->qp);
241 }
242
243 static int mlx5i_create_flow_steering(struct mlx5e_priv *priv)
244 {
245 int err;
246
247 priv->fs.ns = mlx5_get_flow_namespace(priv->mdev,
248 MLX5_FLOW_NAMESPACE_KERNEL);
249
250 if (!priv->fs.ns)
251 return -EINVAL;
252
253 err = mlx5e_arfs_create_tables(priv);
254 if (err) {
255 netdev_err(priv->netdev, "Failed to create arfs tables, err=%d\n",
256 err);
257 priv->netdev->hw_features &= ~NETIF_F_NTUPLE;
258 }
259
260 err = mlx5e_create_inner_ttc_table(priv);
261 if (err) {
262 netdev_err(priv->netdev, "Failed to create inner ttc table, err=%d\n",
263 err);
264 goto err_destroy_arfs_tables;
265 }
266
267 err = mlx5e_create_ttc_table(priv);
268 if (err) {
269 netdev_err(priv->netdev, "Failed to create ttc table, err=%d\n",
270 err);
271 goto err_destroy_inner_ttc_table;
272 }
273
274 return 0;
275
276 err_destroy_inner_ttc_table:
277 mlx5e_destroy_inner_ttc_table(priv);
278 err_destroy_arfs_tables:
279 mlx5e_arfs_destroy_tables(priv);
280
281 return err;
282 }
283
284 static void mlx5i_destroy_flow_steering(struct mlx5e_priv *priv)
285 {
286 mlx5e_destroy_ttc_table(priv);
287 mlx5e_destroy_inner_ttc_table(priv);
288 mlx5e_arfs_destroy_tables(priv);
289 }
290
291 static int mlx5i_init_rx(struct mlx5e_priv *priv)
292 {
293 int err;
294
295 err = mlx5e_create_indirect_rqt(priv);
296 if (err)
297 return err;
298
299 err = mlx5e_create_direct_rqts(priv);
300 if (err)
301 goto err_destroy_indirect_rqts;
302
303 err = mlx5e_create_indirect_tirs(priv);
304 if (err)
305 goto err_destroy_direct_rqts;
306
307 err = mlx5e_create_direct_tirs(priv);
308 if (err)
309 goto err_destroy_indirect_tirs;
310
311 err = mlx5i_create_flow_steering(priv);
312 if (err)
313 goto err_destroy_direct_tirs;
314
315 return 0;
316
317 err_destroy_direct_tirs:
318 mlx5e_destroy_direct_tirs(priv);
319 err_destroy_indirect_tirs:
320 mlx5e_destroy_indirect_tirs(priv);
321 err_destroy_direct_rqts:
322 mlx5e_destroy_direct_rqts(priv);
323 err_destroy_indirect_rqts:
324 mlx5e_destroy_rqt(priv, &priv->indir_rqt);
325 return err;
326 }
327
328 static void mlx5i_cleanup_rx(struct mlx5e_priv *priv)
329 {
330 mlx5i_destroy_flow_steering(priv);
331 mlx5e_destroy_direct_tirs(priv);
332 mlx5e_destroy_indirect_tirs(priv);
333 mlx5e_destroy_direct_rqts(priv);
334 mlx5e_destroy_rqt(priv, &priv->indir_rqt);
335 }
336
337 static const struct mlx5e_profile mlx5i_nic_profile = {
338 .init = mlx5i_init,
339 .cleanup = mlx5i_cleanup,
340 .init_tx = mlx5i_init_tx,
341 .cleanup_tx = mlx5i_cleanup_tx,
342 .init_rx = mlx5i_init_rx,
343 .cleanup_rx = mlx5i_cleanup_rx,
344 .enable = NULL, /* mlx5i_enable */
345 .disable = NULL, /* mlx5i_disable */
346 .update_stats = NULL, /* mlx5i_update_stats */
347 .max_nch = mlx5e_get_max_num_channels,
348 .update_carrier = NULL, /* no HW update in IB link */
349 .rx_handlers.handle_rx_cqe = mlx5i_handle_rx_cqe,
350 .rx_handlers.handle_rx_cqe_mpwqe = NULL, /* Not supported */
351 .max_tc = MLX5I_MAX_NUM_TC,
352 };
353
354 /* mlx5i netdev NDos */
355
356 static int mlx5i_change_mtu(struct net_device *netdev, int new_mtu)
357 {
358 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
359 struct mlx5e_channels new_channels = {};
360 int curr_mtu;
361 int err = 0;
362
363 mutex_lock(&priv->state_lock);
364
365 curr_mtu = netdev->mtu;
366 netdev->mtu = new_mtu;
367
368 if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
369 goto out;
370
371 new_channels.params = priv->channels.params;
372 err = mlx5e_open_channels(priv, &new_channels);
373 if (err) {
374 netdev->mtu = curr_mtu;
375 goto out;
376 }
377
378 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
379
380 out:
381 mutex_unlock(&priv->state_lock);
382 return err;
383 }
384
385 int mlx5i_dev_init(struct net_device *dev)
386 {
387 struct mlx5e_priv *priv = mlx5i_epriv(dev);
388 struct mlx5i_priv *ipriv = priv->ppriv;
389
390 /* Set dev address using underlay QP */
391 dev->dev_addr[1] = (ipriv->qp.qpn >> 16) & 0xff;
392 dev->dev_addr[2] = (ipriv->qp.qpn >> 8) & 0xff;
393 dev->dev_addr[3] = (ipriv->qp.qpn) & 0xff;
394
395 /* Add QPN to net-device mapping to HT */
396 mlx5i_pkey_add_qpn(dev ,ipriv->qp.qpn);
397
398 return 0;
399 }
400
401 static int mlx5i_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
402 {
403 struct mlx5e_priv *priv = mlx5i_epriv(dev);
404
405 switch (cmd) {
406 case SIOCSHWTSTAMP:
407 return mlx5e_hwstamp_set(priv, ifr);
408 case SIOCGHWTSTAMP:
409 return mlx5e_hwstamp_get(priv, ifr);
410 default:
411 return -EOPNOTSUPP;
412 }
413 }
414
415 void mlx5i_dev_cleanup(struct net_device *dev)
416 {
417 struct mlx5e_priv *priv = mlx5i_epriv(dev);
418 struct mlx5i_priv *ipriv = priv->ppriv;
419
420 mlx5i_uninit_underlay_qp(priv);
421
422 /* Delete QPN to net-device mapping from HT */
423 mlx5i_pkey_del_qpn(dev, ipriv->qp.qpn);
424 }
425
426 static int mlx5i_open(struct net_device *netdev)
427 {
428 struct mlx5e_priv *epriv = mlx5i_epriv(netdev);
429 struct mlx5i_priv *ipriv = epriv->ppriv;
430 struct mlx5_core_dev *mdev = epriv->mdev;
431 int err;
432
433 mutex_lock(&epriv->state_lock);
434
435 set_bit(MLX5E_STATE_OPENED, &epriv->state);
436
437 err = mlx5i_init_underlay_qp(epriv);
438 if (err) {
439 mlx5_core_warn(mdev, "prepare underlay qp state failed, %d\n", err);
440 goto err_clear_state_opened_flag;
441 }
442
443 err = mlx5_fs_add_rx_underlay_qpn(mdev, ipriv->qp.qpn);
444 if (err) {
445 mlx5_core_warn(mdev, "attach underlay qp to ft failed, %d\n", err);
446 goto err_reset_qp;
447 }
448
449 err = mlx5e_open_channels(epriv, &epriv->channels);
450 if (err)
451 goto err_remove_fs_underlay_qp;
452
453 mlx5e_refresh_tirs(epriv, false);
454 mlx5e_activate_priv_channels(epriv);
455
456 mutex_unlock(&epriv->state_lock);
457 return 0;
458
459 err_remove_fs_underlay_qp:
460 mlx5_fs_remove_rx_underlay_qpn(mdev, ipriv->qp.qpn);
461 err_reset_qp:
462 mlx5i_uninit_underlay_qp(epriv);
463 err_clear_state_opened_flag:
464 clear_bit(MLX5E_STATE_OPENED, &epriv->state);
465 mutex_unlock(&epriv->state_lock);
466 return err;
467 }
468
469 static int mlx5i_close(struct net_device *netdev)
470 {
471 struct mlx5e_priv *epriv = mlx5i_epriv(netdev);
472 struct mlx5i_priv *ipriv = epriv->ppriv;
473 struct mlx5_core_dev *mdev = epriv->mdev;
474
475 /* May already be CLOSED in case a previous configuration operation
476 * (e.g RX/TX queue size change) that involves close&open failed.
477 */
478 mutex_lock(&epriv->state_lock);
479
480 if (!test_bit(MLX5E_STATE_OPENED, &epriv->state))
481 goto unlock;
482
483 clear_bit(MLX5E_STATE_OPENED, &epriv->state);
484
485 netif_carrier_off(epriv->netdev);
486 mlx5_fs_remove_rx_underlay_qpn(mdev, ipriv->qp.qpn);
487 mlx5i_uninit_underlay_qp(epriv);
488 mlx5e_deactivate_priv_channels(epriv);
489 mlx5e_close_channels(&epriv->channels);;
490 unlock:
491 mutex_unlock(&epriv->state_lock);
492 return 0;
493 }
494
495 /* IPoIB RDMA netdev callbacks */
496 static int mlx5i_attach_mcast(struct net_device *netdev, struct ib_device *hca,
497 union ib_gid *gid, u16 lid, int set_qkey,
498 u32 qkey)
499 {
500 struct mlx5e_priv *epriv = mlx5i_epriv(netdev);
501 struct mlx5_core_dev *mdev = epriv->mdev;
502 struct mlx5i_priv *ipriv = epriv->ppriv;
503 int err;
504
505 mlx5_core_dbg(mdev, "attaching QPN 0x%x, MGID %pI6\n", ipriv->qp.qpn, gid->raw);
506 err = mlx5_core_attach_mcg(mdev, gid, ipriv->qp.qpn);
507 if (err)
508 mlx5_core_warn(mdev, "failed attaching QPN 0x%x, MGID %pI6\n",
509 ipriv->qp.qpn, gid->raw);
510
511 if (set_qkey) {
512 mlx5_core_dbg(mdev, "%s setting qkey 0x%x\n",
513 netdev->name, qkey);
514 ipriv->qkey = qkey;
515 }
516
517 return err;
518 }
519
520 static int mlx5i_detach_mcast(struct net_device *netdev, struct ib_device *hca,
521 union ib_gid *gid, u16 lid)
522 {
523 struct mlx5e_priv *epriv = mlx5i_epriv(netdev);
524 struct mlx5_core_dev *mdev = epriv->mdev;
525 struct mlx5i_priv *ipriv = epriv->ppriv;
526 int err;
527
528 mlx5_core_dbg(mdev, "detaching QPN 0x%x, MGID %pI6\n", ipriv->qp.qpn, gid->raw);
529
530 err = mlx5_core_detach_mcg(mdev, gid, ipriv->qp.qpn);
531 if (err)
532 mlx5_core_dbg(mdev, "failed dettaching QPN 0x%x, MGID %pI6\n",
533 ipriv->qp.qpn, gid->raw);
534
535 return err;
536 }
537
538 static int mlx5i_xmit(struct net_device *dev, struct sk_buff *skb,
539 struct ib_ah *address, u32 dqpn)
540 {
541 struct mlx5e_priv *epriv = mlx5i_epriv(dev);
542 struct mlx5e_txqsq *sq = epriv->txq2sq[skb_get_queue_mapping(skb)];
543 struct mlx5_ib_ah *mah = to_mah(address);
544 struct mlx5i_priv *ipriv = epriv->ppriv;
545
546 return mlx5i_sq_xmit(sq, skb, &mah->av, dqpn, ipriv->qkey);
547 }
548
549 static void mlx5i_set_pkey_index(struct net_device *netdev, int id)
550 {
551 struct mlx5i_priv *ipriv = netdev_priv(netdev);
552
553 ipriv->pkey_index = (u16)id;
554 }
555
556 static int mlx5i_check_required_hca_cap(struct mlx5_core_dev *mdev)
557 {
558 if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_IB)
559 return -EOPNOTSUPP;
560
561 if (!MLX5_CAP_GEN(mdev, ipoib_enhanced_offloads)) {
562 mlx5_core_warn(mdev, "IPoIB enhanced offloads are not supported\n");
563 return -EOPNOTSUPP;
564 }
565
566 return 0;
567 }
568
569 struct net_device *mlx5_rdma_netdev_alloc(struct mlx5_core_dev *mdev,
570 struct ib_device *ibdev,
571 const char *name,
572 void (*setup)(struct net_device *))
573 {
574 const struct mlx5e_profile *profile;
575 struct net_device *netdev;
576 struct mlx5i_priv *ipriv;
577 struct mlx5e_priv *epriv;
578 struct rdma_netdev *rn;
579 bool sub_interface;
580 int nch;
581 int err;
582
583 if (mlx5i_check_required_hca_cap(mdev)) {
584 mlx5_core_warn(mdev, "Accelerated mode is not supported\n");
585 return ERR_PTR(-EOPNOTSUPP);
586 }
587
588 /* TODO: Need to find a better way to check if child device*/
589 sub_interface = (mdev->mlx5e_res.pdn != 0);
590
591 if (sub_interface)
592 profile = mlx5i_pkey_get_profile();
593 else
594 profile = &mlx5i_nic_profile;
595
596 nch = profile->max_nch(mdev);
597
598 netdev = alloc_netdev_mqs(sizeof(struct mlx5i_priv) + sizeof(struct mlx5e_priv),
599 name, NET_NAME_UNKNOWN,
600 setup,
601 nch * MLX5E_MAX_NUM_TC,
602 nch);
603 if (!netdev) {
604 mlx5_core_warn(mdev, "alloc_netdev_mqs failed\n");
605 return NULL;
606 }
607
608 ipriv = netdev_priv(netdev);
609 epriv = mlx5i_epriv(netdev);
610
611 epriv->wq = create_singlethread_workqueue("mlx5i");
612 if (!epriv->wq)
613 goto err_free_netdev;
614
615 ipriv->sub_interface = sub_interface;
616 if (!ipriv->sub_interface) {
617 err = mlx5i_pkey_qpn_ht_init(netdev);
618 if (err) {
619 mlx5_core_warn(mdev, "allocate qpn_to_netdev ht failed\n");
620 goto destroy_wq;
621 }
622
623 /* This should only be called once per mdev */
624 err = mlx5e_create_mdev_resources(mdev);
625 if (err)
626 goto destroy_ht;
627 }
628
629 profile->init(mdev, netdev, profile, ipriv);
630
631 mlx5e_attach_netdev(epriv);
632 netif_carrier_off(netdev);
633
634 /* set rdma_netdev func pointers */
635 rn = &ipriv->rn;
636 rn->hca = ibdev;
637 rn->send = mlx5i_xmit;
638 rn->attach_mcast = mlx5i_attach_mcast;
639 rn->detach_mcast = mlx5i_detach_mcast;
640 rn->set_id = mlx5i_set_pkey_index;
641
642 return netdev;
643
644 destroy_ht:
645 mlx5i_pkey_qpn_ht_cleanup(netdev);
646 destroy_wq:
647 destroy_workqueue(epriv->wq);
648 err_free_netdev:
649 free_netdev(netdev);
650
651 return NULL;
652 }
653 EXPORT_SYMBOL(mlx5_rdma_netdev_alloc);
654
655 void mlx5_rdma_netdev_free(struct net_device *netdev)
656 {
657 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
658 struct mlx5i_priv *ipriv = priv->ppriv;
659 const struct mlx5e_profile *profile = priv->profile;
660
661 mlx5e_detach_netdev(priv);
662 profile->cleanup(priv);
663 destroy_workqueue(priv->wq);
664
665 if (!ipriv->sub_interface) {
666 mlx5i_pkey_qpn_ht_cleanup(netdev);
667 mlx5e_destroy_mdev_resources(priv->mdev);
668 }
669 free_netdev(netdev);
670 }
671 EXPORT_SYMBOL(mlx5_rdma_netdev_free);