]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blob - drivers/net/ethernet/mellanox/mlx5/core/qp.c
Merge branch 'am335x-phy-fixes' into omap-for-v5.0/fixes-v2
[mirror_ubuntu-eoan-kernel.git] / drivers / net / ethernet / mellanox / mlx5 / core / qp.c
1 /*
2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include <linux/gfp.h>
34 #include <linux/export.h>
35 #include <linux/mlx5/cmd.h>
36 #include <linux/mlx5/qp.h>
37 #include <linux/mlx5/driver.h>
38 #include <linux/mlx5/transobj.h>
39
40 #include "mlx5_core.h"
41 #include "lib/eq.h"
42
43 static struct mlx5_core_rsc_common *
44 mlx5_get_rsc(struct mlx5_qp_table *table, u32 rsn)
45 {
46 struct mlx5_core_rsc_common *common;
47
48 spin_lock(&table->lock);
49
50 common = radix_tree_lookup(&table->tree, rsn);
51 if (common)
52 atomic_inc(&common->refcount);
53
54 spin_unlock(&table->lock);
55
56 return common;
57 }
58
59 void mlx5_core_put_rsc(struct mlx5_core_rsc_common *common)
60 {
61 if (atomic_dec_and_test(&common->refcount))
62 complete(&common->free);
63 }
64
65 static u64 qp_allowed_event_types(void)
66 {
67 u64 mask;
68
69 mask = BIT(MLX5_EVENT_TYPE_PATH_MIG) |
70 BIT(MLX5_EVENT_TYPE_COMM_EST) |
71 BIT(MLX5_EVENT_TYPE_SQ_DRAINED) |
72 BIT(MLX5_EVENT_TYPE_SRQ_LAST_WQE) |
73 BIT(MLX5_EVENT_TYPE_WQ_CATAS_ERROR) |
74 BIT(MLX5_EVENT_TYPE_PATH_MIG_FAILED) |
75 BIT(MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR) |
76 BIT(MLX5_EVENT_TYPE_WQ_ACCESS_ERROR);
77
78 return mask;
79 }
80
81 static u64 rq_allowed_event_types(void)
82 {
83 u64 mask;
84
85 mask = BIT(MLX5_EVENT_TYPE_SRQ_LAST_WQE) |
86 BIT(MLX5_EVENT_TYPE_WQ_CATAS_ERROR);
87
88 return mask;
89 }
90
91 static u64 sq_allowed_event_types(void)
92 {
93 return BIT(MLX5_EVENT_TYPE_WQ_CATAS_ERROR);
94 }
95
96 static u64 dct_allowed_event_types(void)
97 {
98 return BIT(MLX5_EVENT_TYPE_DCT_DRAINED);
99 }
100
101 static bool is_event_type_allowed(int rsc_type, int event_type)
102 {
103 switch (rsc_type) {
104 case MLX5_EVENT_QUEUE_TYPE_QP:
105 return BIT(event_type) & qp_allowed_event_types();
106 case MLX5_EVENT_QUEUE_TYPE_RQ:
107 return BIT(event_type) & rq_allowed_event_types();
108 case MLX5_EVENT_QUEUE_TYPE_SQ:
109 return BIT(event_type) & sq_allowed_event_types();
110 case MLX5_EVENT_QUEUE_TYPE_DCT:
111 return BIT(event_type) & dct_allowed_event_types();
112 default:
113 WARN(1, "Event arrived for unknown resource type");
114 return false;
115 }
116 }
117
118 static int rsc_event_notifier(struct notifier_block *nb,
119 unsigned long type, void *data)
120 {
121 struct mlx5_core_rsc_common *common;
122 struct mlx5_qp_table *table;
123 struct mlx5_core_dev *dev;
124 struct mlx5_core_dct *dct;
125 u8 event_type = (u8)type;
126 struct mlx5_core_qp *qp;
127 struct mlx5_priv *priv;
128 struct mlx5_eqe *eqe;
129 u32 rsn;
130
131 switch (event_type) {
132 case MLX5_EVENT_TYPE_DCT_DRAINED:
133 eqe = data;
134 rsn = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff;
135 rsn |= (MLX5_RES_DCT << MLX5_USER_INDEX_LEN);
136 break;
137 case MLX5_EVENT_TYPE_PATH_MIG:
138 case MLX5_EVENT_TYPE_COMM_EST:
139 case MLX5_EVENT_TYPE_SQ_DRAINED:
140 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
141 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
142 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
143 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
144 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
145 eqe = data;
146 rsn = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff;
147 rsn |= (eqe->data.qp_srq.type << MLX5_USER_INDEX_LEN);
148 break;
149 default:
150 return NOTIFY_DONE;
151 }
152
153 table = container_of(nb, struct mlx5_qp_table, nb);
154 priv = container_of(table, struct mlx5_priv, qp_table);
155 dev = container_of(priv, struct mlx5_core_dev, priv);
156
157 mlx5_core_dbg(dev, "event (%d) arrived on resource 0x%x\n", eqe->type, rsn);
158
159 common = mlx5_get_rsc(table, rsn);
160 if (!common) {
161 mlx5_core_warn(dev, "Async event for bogus resource 0x%x\n", rsn);
162 return NOTIFY_OK;
163 }
164
165 if (!is_event_type_allowed((rsn >> MLX5_USER_INDEX_LEN), event_type)) {
166 mlx5_core_warn(dev, "event 0x%.2x is not allowed on resource 0x%.8x\n",
167 event_type, rsn);
168 goto out;
169 }
170
171 switch (common->res) {
172 case MLX5_RES_QP:
173 case MLX5_RES_RQ:
174 case MLX5_RES_SQ:
175 qp = (struct mlx5_core_qp *)common;
176 qp->event(qp, event_type);
177 break;
178 case MLX5_RES_DCT:
179 dct = (struct mlx5_core_dct *)common;
180 if (event_type == MLX5_EVENT_TYPE_DCT_DRAINED)
181 complete(&dct->drained);
182 break;
183 default:
184 mlx5_core_warn(dev, "invalid resource type for 0x%x\n", rsn);
185 }
186 out:
187 mlx5_core_put_rsc(common);
188
189 return NOTIFY_OK;
190 }
191
192 static int create_resource_common(struct mlx5_core_dev *dev,
193 struct mlx5_core_qp *qp,
194 int rsc_type)
195 {
196 struct mlx5_qp_table *table = &dev->priv.qp_table;
197 int err;
198
199 qp->common.res = rsc_type;
200 spin_lock_irq(&table->lock);
201 err = radix_tree_insert(&table->tree,
202 qp->qpn | (rsc_type << MLX5_USER_INDEX_LEN),
203 qp);
204 spin_unlock_irq(&table->lock);
205 if (err)
206 return err;
207
208 atomic_set(&qp->common.refcount, 1);
209 init_completion(&qp->common.free);
210 qp->pid = current->pid;
211
212 return 0;
213 }
214
215 static void destroy_resource_common(struct mlx5_core_dev *dev,
216 struct mlx5_core_qp *qp)
217 {
218 struct mlx5_qp_table *table = &dev->priv.qp_table;
219 unsigned long flags;
220
221 spin_lock_irqsave(&table->lock, flags);
222 radix_tree_delete(&table->tree,
223 qp->qpn | (qp->common.res << MLX5_USER_INDEX_LEN));
224 spin_unlock_irqrestore(&table->lock, flags);
225 mlx5_core_put_rsc((struct mlx5_core_rsc_common *)qp);
226 wait_for_completion(&qp->common.free);
227 }
228
229 int mlx5_core_create_dct(struct mlx5_core_dev *dev,
230 struct mlx5_core_dct *dct,
231 u32 *in, int inlen)
232 {
233 u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0};
234 u32 din[MLX5_ST_SZ_DW(destroy_dct_in)] = {0};
235 u32 dout[MLX5_ST_SZ_DW(destroy_dct_out)] = {0};
236 struct mlx5_core_qp *qp = &dct->mqp;
237 int err;
238
239 init_completion(&dct->drained);
240 MLX5_SET(create_dct_in, in, opcode, MLX5_CMD_OP_CREATE_DCT);
241
242 err = mlx5_cmd_exec(dev, in, inlen, &out, sizeof(out));
243 if (err) {
244 mlx5_core_warn(dev, "create DCT failed, ret %d\n", err);
245 return err;
246 }
247
248 qp->qpn = MLX5_GET(create_dct_out, out, dctn);
249 qp->uid = MLX5_GET(create_dct_in, in, uid);
250 err = create_resource_common(dev, qp, MLX5_RES_DCT);
251 if (err)
252 goto err_cmd;
253
254 return 0;
255 err_cmd:
256 MLX5_SET(destroy_dct_in, din, opcode, MLX5_CMD_OP_DESTROY_DCT);
257 MLX5_SET(destroy_dct_in, din, dctn, qp->qpn);
258 MLX5_SET(destroy_dct_in, din, uid, qp->uid);
259 mlx5_cmd_exec(dev, (void *)&in, sizeof(din),
260 (void *)&out, sizeof(dout));
261 return err;
262 }
263 EXPORT_SYMBOL_GPL(mlx5_core_create_dct);
264
265 int mlx5_core_create_qp(struct mlx5_core_dev *dev,
266 struct mlx5_core_qp *qp,
267 u32 *in, int inlen)
268 {
269 u32 out[MLX5_ST_SZ_DW(create_qp_out)] = {0};
270 u32 dout[MLX5_ST_SZ_DW(destroy_qp_out)];
271 u32 din[MLX5_ST_SZ_DW(destroy_qp_in)];
272 int err;
273
274 MLX5_SET(create_qp_in, in, opcode, MLX5_CMD_OP_CREATE_QP);
275
276 err = mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
277 if (err)
278 return err;
279
280 qp->uid = MLX5_GET(create_qp_in, in, uid);
281 qp->qpn = MLX5_GET(create_qp_out, out, qpn);
282 mlx5_core_dbg(dev, "qpn = 0x%x\n", qp->qpn);
283
284 err = create_resource_common(dev, qp, MLX5_RES_QP);
285 if (err)
286 goto err_cmd;
287
288 err = mlx5_debug_qp_add(dev, qp);
289 if (err)
290 mlx5_core_dbg(dev, "failed adding QP 0x%x to debug file system\n",
291 qp->qpn);
292
293 atomic_inc(&dev->num_qps);
294
295 return 0;
296
297 err_cmd:
298 memset(din, 0, sizeof(din));
299 memset(dout, 0, sizeof(dout));
300 MLX5_SET(destroy_qp_in, din, opcode, MLX5_CMD_OP_DESTROY_QP);
301 MLX5_SET(destroy_qp_in, din, qpn, qp->qpn);
302 MLX5_SET(destroy_qp_in, din, uid, qp->uid);
303 mlx5_cmd_exec(dev, din, sizeof(din), dout, sizeof(dout));
304 return err;
305 }
306 EXPORT_SYMBOL_GPL(mlx5_core_create_qp);
307
308 static int mlx5_core_drain_dct(struct mlx5_core_dev *dev,
309 struct mlx5_core_dct *dct)
310 {
311 u32 out[MLX5_ST_SZ_DW(drain_dct_out)] = {0};
312 u32 in[MLX5_ST_SZ_DW(drain_dct_in)] = {0};
313 struct mlx5_core_qp *qp = &dct->mqp;
314
315 MLX5_SET(drain_dct_in, in, opcode, MLX5_CMD_OP_DRAIN_DCT);
316 MLX5_SET(drain_dct_in, in, dctn, qp->qpn);
317 MLX5_SET(drain_dct_in, in, uid, qp->uid);
318 return mlx5_cmd_exec(dev, (void *)&in, sizeof(in),
319 (void *)&out, sizeof(out));
320 }
321
322 int mlx5_core_destroy_dct(struct mlx5_core_dev *dev,
323 struct mlx5_core_dct *dct)
324 {
325 u32 out[MLX5_ST_SZ_DW(destroy_dct_out)] = {0};
326 u32 in[MLX5_ST_SZ_DW(destroy_dct_in)] = {0};
327 struct mlx5_core_qp *qp = &dct->mqp;
328 int err;
329
330 err = mlx5_core_drain_dct(dev, dct);
331 if (err) {
332 if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
333 goto destroy;
334 } else {
335 mlx5_core_warn(dev, "failed drain DCT 0x%x with error 0x%x\n", qp->qpn, err);
336 return err;
337 }
338 }
339 wait_for_completion(&dct->drained);
340 destroy:
341 destroy_resource_common(dev, &dct->mqp);
342 MLX5_SET(destroy_dct_in, in, opcode, MLX5_CMD_OP_DESTROY_DCT);
343 MLX5_SET(destroy_dct_in, in, dctn, qp->qpn);
344 MLX5_SET(destroy_dct_in, in, uid, qp->uid);
345 err = mlx5_cmd_exec(dev, (void *)&in, sizeof(in),
346 (void *)&out, sizeof(out));
347 return err;
348 }
349 EXPORT_SYMBOL_GPL(mlx5_core_destroy_dct);
350
351 int mlx5_core_destroy_qp(struct mlx5_core_dev *dev,
352 struct mlx5_core_qp *qp)
353 {
354 u32 out[MLX5_ST_SZ_DW(destroy_qp_out)] = {0};
355 u32 in[MLX5_ST_SZ_DW(destroy_qp_in)] = {0};
356 int err;
357
358 mlx5_debug_qp_remove(dev, qp);
359
360 destroy_resource_common(dev, qp);
361
362 MLX5_SET(destroy_qp_in, in, opcode, MLX5_CMD_OP_DESTROY_QP);
363 MLX5_SET(destroy_qp_in, in, qpn, qp->qpn);
364 MLX5_SET(destroy_qp_in, in, uid, qp->uid);
365 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
366 if (err)
367 return err;
368
369 atomic_dec(&dev->num_qps);
370 return 0;
371 }
372 EXPORT_SYMBOL_GPL(mlx5_core_destroy_qp);
373
374 int mlx5_core_set_delay_drop(struct mlx5_core_dev *dev,
375 u32 timeout_usec)
376 {
377 u32 out[MLX5_ST_SZ_DW(set_delay_drop_params_out)] = {0};
378 u32 in[MLX5_ST_SZ_DW(set_delay_drop_params_in)] = {0};
379
380 MLX5_SET(set_delay_drop_params_in, in, opcode,
381 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS);
382 MLX5_SET(set_delay_drop_params_in, in, delay_drop_timeout,
383 timeout_usec / 100);
384 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
385 }
386 EXPORT_SYMBOL_GPL(mlx5_core_set_delay_drop);
387
388 struct mbox_info {
389 u32 *in;
390 u32 *out;
391 int inlen;
392 int outlen;
393 };
394
395 static int mbox_alloc(struct mbox_info *mbox, int inlen, int outlen)
396 {
397 mbox->inlen = inlen;
398 mbox->outlen = outlen;
399 mbox->in = kzalloc(mbox->inlen, GFP_KERNEL);
400 mbox->out = kzalloc(mbox->outlen, GFP_KERNEL);
401 if (!mbox->in || !mbox->out) {
402 kfree(mbox->in);
403 kfree(mbox->out);
404 return -ENOMEM;
405 }
406
407 return 0;
408 }
409
410 static void mbox_free(struct mbox_info *mbox)
411 {
412 kfree(mbox->in);
413 kfree(mbox->out);
414 }
415
416 static int modify_qp_mbox_alloc(struct mlx5_core_dev *dev, u16 opcode, int qpn,
417 u32 opt_param_mask, void *qpc,
418 struct mbox_info *mbox, u16 uid)
419 {
420 mbox->out = NULL;
421 mbox->in = NULL;
422
423 #define MBOX_ALLOC(mbox, typ) \
424 mbox_alloc(mbox, MLX5_ST_SZ_BYTES(typ##_in), MLX5_ST_SZ_BYTES(typ##_out))
425
426 #define MOD_QP_IN_SET(typ, in, _opcode, _qpn, _uid) \
427 do { \
428 MLX5_SET(typ##_in, in, opcode, _opcode); \
429 MLX5_SET(typ##_in, in, qpn, _qpn); \
430 MLX5_SET(typ##_in, in, uid, _uid); \
431 } while (0)
432
433 #define MOD_QP_IN_SET_QPC(typ, in, _opcode, _qpn, _opt_p, _qpc, _uid) \
434 do { \
435 MOD_QP_IN_SET(typ, in, _opcode, _qpn, _uid); \
436 MLX5_SET(typ##_in, in, opt_param_mask, _opt_p); \
437 memcpy(MLX5_ADDR_OF(typ##_in, in, qpc), _qpc, \
438 MLX5_ST_SZ_BYTES(qpc)); \
439 } while (0)
440
441 switch (opcode) {
442 /* 2RST & 2ERR */
443 case MLX5_CMD_OP_2RST_QP:
444 if (MBOX_ALLOC(mbox, qp_2rst))
445 return -ENOMEM;
446 MOD_QP_IN_SET(qp_2rst, mbox->in, opcode, qpn, uid);
447 break;
448 case MLX5_CMD_OP_2ERR_QP:
449 if (MBOX_ALLOC(mbox, qp_2err))
450 return -ENOMEM;
451 MOD_QP_IN_SET(qp_2err, mbox->in, opcode, qpn, uid);
452 break;
453
454 /* MODIFY with QPC */
455 case MLX5_CMD_OP_RST2INIT_QP:
456 if (MBOX_ALLOC(mbox, rst2init_qp))
457 return -ENOMEM;
458 MOD_QP_IN_SET_QPC(rst2init_qp, mbox->in, opcode, qpn,
459 opt_param_mask, qpc, uid);
460 break;
461 case MLX5_CMD_OP_INIT2RTR_QP:
462 if (MBOX_ALLOC(mbox, init2rtr_qp))
463 return -ENOMEM;
464 MOD_QP_IN_SET_QPC(init2rtr_qp, mbox->in, opcode, qpn,
465 opt_param_mask, qpc, uid);
466 break;
467 case MLX5_CMD_OP_RTR2RTS_QP:
468 if (MBOX_ALLOC(mbox, rtr2rts_qp))
469 return -ENOMEM;
470 MOD_QP_IN_SET_QPC(rtr2rts_qp, mbox->in, opcode, qpn,
471 opt_param_mask, qpc, uid);
472 break;
473 case MLX5_CMD_OP_RTS2RTS_QP:
474 if (MBOX_ALLOC(mbox, rts2rts_qp))
475 return -ENOMEM;
476 MOD_QP_IN_SET_QPC(rts2rts_qp, mbox->in, opcode, qpn,
477 opt_param_mask, qpc, uid);
478 break;
479 case MLX5_CMD_OP_SQERR2RTS_QP:
480 if (MBOX_ALLOC(mbox, sqerr2rts_qp))
481 return -ENOMEM;
482 MOD_QP_IN_SET_QPC(sqerr2rts_qp, mbox->in, opcode, qpn,
483 opt_param_mask, qpc, uid);
484 break;
485 case MLX5_CMD_OP_INIT2INIT_QP:
486 if (MBOX_ALLOC(mbox, init2init_qp))
487 return -ENOMEM;
488 MOD_QP_IN_SET_QPC(init2init_qp, mbox->in, opcode, qpn,
489 opt_param_mask, qpc, uid);
490 break;
491 default:
492 mlx5_core_err(dev, "Unknown transition for modify QP: OP(0x%x) QPN(0x%x)\n",
493 opcode, qpn);
494 return -EINVAL;
495 }
496 return 0;
497 }
498
499 int mlx5_core_qp_modify(struct mlx5_core_dev *dev, u16 opcode,
500 u32 opt_param_mask, void *qpc,
501 struct mlx5_core_qp *qp)
502 {
503 struct mbox_info mbox;
504 int err;
505
506 err = modify_qp_mbox_alloc(dev, opcode, qp->qpn,
507 opt_param_mask, qpc, &mbox, qp->uid);
508 if (err)
509 return err;
510
511 err = mlx5_cmd_exec(dev, mbox.in, mbox.inlen, mbox.out, mbox.outlen);
512 mbox_free(&mbox);
513 return err;
514 }
515 EXPORT_SYMBOL_GPL(mlx5_core_qp_modify);
516
517 void mlx5_init_qp_table(struct mlx5_core_dev *dev)
518 {
519 struct mlx5_qp_table *table = &dev->priv.qp_table;
520
521 memset(table, 0, sizeof(*table));
522 spin_lock_init(&table->lock);
523 INIT_RADIX_TREE(&table->tree, GFP_ATOMIC);
524 mlx5_qp_debugfs_init(dev);
525
526 table->nb.notifier_call = rsc_event_notifier;
527 mlx5_notifier_register(dev, &table->nb);
528 }
529
530 void mlx5_cleanup_qp_table(struct mlx5_core_dev *dev)
531 {
532 struct mlx5_qp_table *table = &dev->priv.qp_table;
533
534 mlx5_notifier_unregister(dev, &table->nb);
535 mlx5_qp_debugfs_cleanup(dev);
536 }
537
538 int mlx5_core_qp_query(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp,
539 u32 *out, int outlen)
540 {
541 u32 in[MLX5_ST_SZ_DW(query_qp_in)] = {0};
542
543 MLX5_SET(query_qp_in, in, opcode, MLX5_CMD_OP_QUERY_QP);
544 MLX5_SET(query_qp_in, in, qpn, qp->qpn);
545 return mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
546 }
547 EXPORT_SYMBOL_GPL(mlx5_core_qp_query);
548
549 int mlx5_core_dct_query(struct mlx5_core_dev *dev, struct mlx5_core_dct *dct,
550 u32 *out, int outlen)
551 {
552 u32 in[MLX5_ST_SZ_DW(query_dct_in)] = {0};
553 struct mlx5_core_qp *qp = &dct->mqp;
554
555 MLX5_SET(query_dct_in, in, opcode, MLX5_CMD_OP_QUERY_DCT);
556 MLX5_SET(query_dct_in, in, dctn, qp->qpn);
557
558 return mlx5_cmd_exec(dev, (void *)&in, sizeof(in),
559 (void *)out, outlen);
560 }
561 EXPORT_SYMBOL_GPL(mlx5_core_dct_query);
562
563 int mlx5_core_xrcd_alloc(struct mlx5_core_dev *dev, u32 *xrcdn)
564 {
565 u32 out[MLX5_ST_SZ_DW(alloc_xrcd_out)] = {0};
566 u32 in[MLX5_ST_SZ_DW(alloc_xrcd_in)] = {0};
567 int err;
568
569 MLX5_SET(alloc_xrcd_in, in, opcode, MLX5_CMD_OP_ALLOC_XRCD);
570 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
571 if (!err)
572 *xrcdn = MLX5_GET(alloc_xrcd_out, out, xrcd);
573 return err;
574 }
575 EXPORT_SYMBOL_GPL(mlx5_core_xrcd_alloc);
576
577 int mlx5_core_xrcd_dealloc(struct mlx5_core_dev *dev, u32 xrcdn)
578 {
579 u32 out[MLX5_ST_SZ_DW(dealloc_xrcd_out)] = {0};
580 u32 in[MLX5_ST_SZ_DW(dealloc_xrcd_in)] = {0};
581
582 MLX5_SET(dealloc_xrcd_in, in, opcode, MLX5_CMD_OP_DEALLOC_XRCD);
583 MLX5_SET(dealloc_xrcd_in, in, xrcd, xrcdn);
584 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
585 }
586 EXPORT_SYMBOL_GPL(mlx5_core_xrcd_dealloc);
587
588 static void destroy_rq_tracked(struct mlx5_core_dev *dev, u32 rqn, u16 uid)
589 {
590 u32 in[MLX5_ST_SZ_DW(destroy_rq_in)] = {};
591 u32 out[MLX5_ST_SZ_DW(destroy_rq_out)] = {};
592
593 MLX5_SET(destroy_rq_in, in, opcode, MLX5_CMD_OP_DESTROY_RQ);
594 MLX5_SET(destroy_rq_in, in, rqn, rqn);
595 MLX5_SET(destroy_rq_in, in, uid, uid);
596 mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
597 }
598
599 int mlx5_core_create_rq_tracked(struct mlx5_core_dev *dev, u32 *in, int inlen,
600 struct mlx5_core_qp *rq)
601 {
602 int err;
603 u32 rqn;
604
605 err = mlx5_core_create_rq(dev, in, inlen, &rqn);
606 if (err)
607 return err;
608
609 rq->uid = MLX5_GET(create_rq_in, in, uid);
610 rq->qpn = rqn;
611 err = create_resource_common(dev, rq, MLX5_RES_RQ);
612 if (err)
613 goto err_destroy_rq;
614
615 return 0;
616
617 err_destroy_rq:
618 destroy_rq_tracked(dev, rq->qpn, rq->uid);
619
620 return err;
621 }
622 EXPORT_SYMBOL(mlx5_core_create_rq_tracked);
623
624 void mlx5_core_destroy_rq_tracked(struct mlx5_core_dev *dev,
625 struct mlx5_core_qp *rq)
626 {
627 destroy_resource_common(dev, rq);
628 destroy_rq_tracked(dev, rq->qpn, rq->uid);
629 }
630 EXPORT_SYMBOL(mlx5_core_destroy_rq_tracked);
631
632 static void destroy_sq_tracked(struct mlx5_core_dev *dev, u32 sqn, u16 uid)
633 {
634 u32 in[MLX5_ST_SZ_DW(destroy_sq_in)] = {};
635 u32 out[MLX5_ST_SZ_DW(destroy_sq_out)] = {};
636
637 MLX5_SET(destroy_sq_in, in, opcode, MLX5_CMD_OP_DESTROY_SQ);
638 MLX5_SET(destroy_sq_in, in, sqn, sqn);
639 MLX5_SET(destroy_sq_in, in, uid, uid);
640 mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
641 }
642
643 int mlx5_core_create_sq_tracked(struct mlx5_core_dev *dev, u32 *in, int inlen,
644 struct mlx5_core_qp *sq)
645 {
646 int err;
647 u32 sqn;
648
649 err = mlx5_core_create_sq(dev, in, inlen, &sqn);
650 if (err)
651 return err;
652
653 sq->uid = MLX5_GET(create_sq_in, in, uid);
654 sq->qpn = sqn;
655 err = create_resource_common(dev, sq, MLX5_RES_SQ);
656 if (err)
657 goto err_destroy_sq;
658
659 return 0;
660
661 err_destroy_sq:
662 destroy_sq_tracked(dev, sq->qpn, sq->uid);
663
664 return err;
665 }
666 EXPORT_SYMBOL(mlx5_core_create_sq_tracked);
667
668 void mlx5_core_destroy_sq_tracked(struct mlx5_core_dev *dev,
669 struct mlx5_core_qp *sq)
670 {
671 destroy_resource_common(dev, sq);
672 destroy_sq_tracked(dev, sq->qpn, sq->uid);
673 }
674 EXPORT_SYMBOL(mlx5_core_destroy_sq_tracked);
675
676 int mlx5_core_alloc_q_counter(struct mlx5_core_dev *dev, u16 *counter_id)
677 {
678 u32 in[MLX5_ST_SZ_DW(alloc_q_counter_in)] = {0};
679 u32 out[MLX5_ST_SZ_DW(alloc_q_counter_out)] = {0};
680 int err;
681
682 MLX5_SET(alloc_q_counter_in, in, opcode, MLX5_CMD_OP_ALLOC_Q_COUNTER);
683 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
684 if (!err)
685 *counter_id = MLX5_GET(alloc_q_counter_out, out,
686 counter_set_id);
687 return err;
688 }
689 EXPORT_SYMBOL_GPL(mlx5_core_alloc_q_counter);
690
691 int mlx5_core_dealloc_q_counter(struct mlx5_core_dev *dev, u16 counter_id)
692 {
693 u32 in[MLX5_ST_SZ_DW(dealloc_q_counter_in)] = {0};
694 u32 out[MLX5_ST_SZ_DW(dealloc_q_counter_out)] = {0};
695
696 MLX5_SET(dealloc_q_counter_in, in, opcode,
697 MLX5_CMD_OP_DEALLOC_Q_COUNTER);
698 MLX5_SET(dealloc_q_counter_in, in, counter_set_id, counter_id);
699 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
700 }
701 EXPORT_SYMBOL_GPL(mlx5_core_dealloc_q_counter);
702
703 int mlx5_core_query_q_counter(struct mlx5_core_dev *dev, u16 counter_id,
704 int reset, void *out, int out_size)
705 {
706 u32 in[MLX5_ST_SZ_DW(query_q_counter_in)] = {0};
707
708 MLX5_SET(query_q_counter_in, in, opcode, MLX5_CMD_OP_QUERY_Q_COUNTER);
709 MLX5_SET(query_q_counter_in, in, clear, reset);
710 MLX5_SET(query_q_counter_in, in, counter_set_id, counter_id);
711 return mlx5_cmd_exec(dev, in, sizeof(in), out, out_size);
712 }
713 EXPORT_SYMBOL_GPL(mlx5_core_query_q_counter);
714
715 struct mlx5_core_rsc_common *mlx5_core_res_hold(struct mlx5_core_dev *dev,
716 int res_num,
717 enum mlx5_res_type res_type)
718 {
719 u32 rsn = res_num | (res_type << MLX5_USER_INDEX_LEN);
720 struct mlx5_qp_table *table = &dev->priv.qp_table;
721
722 return mlx5_get_rsc(table, rsn);
723 }
724 EXPORT_SYMBOL_GPL(mlx5_core_res_hold);
725
726 void mlx5_core_res_put(struct mlx5_core_rsc_common *res)
727 {
728 mlx5_core_put_rsc(res);
729 }
730 EXPORT_SYMBOL_GPL(mlx5_core_res_put);