2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/gfp.h>
34 #include <linux/export.h>
35 #include <linux/mlx5/cmd.h>
36 #include <linux/mlx5/qp.h>
37 #include <linux/mlx5/driver.h>
38 #include <linux/mlx5/transobj.h>
40 #include "mlx5_core.h"
43 static int mlx5_core_drain_dct(struct mlx5_core_dev
*dev
,
44 struct mlx5_core_dct
*dct
);
46 static struct mlx5_core_rsc_common
*
47 mlx5_get_rsc(struct mlx5_qp_table
*table
, u32 rsn
)
49 struct mlx5_core_rsc_common
*common
;
52 spin_lock_irqsave(&table
->lock
, flags
);
54 common
= radix_tree_lookup(&table
->tree
, rsn
);
56 atomic_inc(&common
->refcount
);
58 spin_unlock_irqrestore(&table
->lock
, flags
);
63 void mlx5_core_put_rsc(struct mlx5_core_rsc_common
*common
)
65 if (atomic_dec_and_test(&common
->refcount
))
66 complete(&common
->free
);
69 static u64
qp_allowed_event_types(void)
73 mask
= BIT(MLX5_EVENT_TYPE_PATH_MIG
) |
74 BIT(MLX5_EVENT_TYPE_COMM_EST
) |
75 BIT(MLX5_EVENT_TYPE_SQ_DRAINED
) |
76 BIT(MLX5_EVENT_TYPE_SRQ_LAST_WQE
) |
77 BIT(MLX5_EVENT_TYPE_WQ_CATAS_ERROR
) |
78 BIT(MLX5_EVENT_TYPE_PATH_MIG_FAILED
) |
79 BIT(MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR
) |
80 BIT(MLX5_EVENT_TYPE_WQ_ACCESS_ERROR
);
85 static u64
rq_allowed_event_types(void)
89 mask
= BIT(MLX5_EVENT_TYPE_SRQ_LAST_WQE
) |
90 BIT(MLX5_EVENT_TYPE_WQ_CATAS_ERROR
);
95 static u64
sq_allowed_event_types(void)
97 return BIT(MLX5_EVENT_TYPE_WQ_CATAS_ERROR
);
100 static u64
dct_allowed_event_types(void)
102 return BIT(MLX5_EVENT_TYPE_DCT_DRAINED
);
105 static bool is_event_type_allowed(int rsc_type
, int event_type
)
108 case MLX5_EVENT_QUEUE_TYPE_QP
:
109 return BIT(event_type
) & qp_allowed_event_types();
110 case MLX5_EVENT_QUEUE_TYPE_RQ
:
111 return BIT(event_type
) & rq_allowed_event_types();
112 case MLX5_EVENT_QUEUE_TYPE_SQ
:
113 return BIT(event_type
) & sq_allowed_event_types();
114 case MLX5_EVENT_QUEUE_TYPE_DCT
:
115 return BIT(event_type
) & dct_allowed_event_types();
117 WARN(1, "Event arrived for unknown resource type");
122 static int rsc_event_notifier(struct notifier_block
*nb
,
123 unsigned long type
, void *data
)
125 struct mlx5_core_rsc_common
*common
;
126 struct mlx5_qp_table
*table
;
127 struct mlx5_core_dev
*dev
;
128 struct mlx5_core_dct
*dct
;
129 u8 event_type
= (u8
)type
;
130 struct mlx5_core_qp
*qp
;
131 struct mlx5_priv
*priv
;
132 struct mlx5_eqe
*eqe
;
135 switch (event_type
) {
136 case MLX5_EVENT_TYPE_DCT_DRAINED
:
138 rsn
= be32_to_cpu(eqe
->data
.dct
.dctn
) & 0xffffff;
139 rsn
|= (MLX5_RES_DCT
<< MLX5_USER_INDEX_LEN
);
141 case MLX5_EVENT_TYPE_PATH_MIG
:
142 case MLX5_EVENT_TYPE_COMM_EST
:
143 case MLX5_EVENT_TYPE_SQ_DRAINED
:
144 case MLX5_EVENT_TYPE_SRQ_LAST_WQE
:
145 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR
:
146 case MLX5_EVENT_TYPE_PATH_MIG_FAILED
:
147 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR
:
148 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR
:
150 rsn
= be32_to_cpu(eqe
->data
.qp_srq
.qp_srq_n
) & 0xffffff;
151 rsn
|= (eqe
->data
.qp_srq
.type
<< MLX5_USER_INDEX_LEN
);
157 table
= container_of(nb
, struct mlx5_qp_table
, nb
);
158 priv
= container_of(table
, struct mlx5_priv
, qp_table
);
159 dev
= container_of(priv
, struct mlx5_core_dev
, priv
);
161 mlx5_core_dbg(dev
, "event (%d) arrived on resource 0x%x\n", eqe
->type
, rsn
);
163 common
= mlx5_get_rsc(table
, rsn
);
165 mlx5_core_warn(dev
, "Async event for bogus resource 0x%x\n", rsn
);
169 if (!is_event_type_allowed((rsn
>> MLX5_USER_INDEX_LEN
), event_type
)) {
170 mlx5_core_warn(dev
, "event 0x%.2x is not allowed on resource 0x%.8x\n",
175 switch (common
->res
) {
179 qp
= (struct mlx5_core_qp
*)common
;
180 qp
->event(qp
, event_type
);
183 dct
= (struct mlx5_core_dct
*)common
;
184 if (event_type
== MLX5_EVENT_TYPE_DCT_DRAINED
)
185 complete(&dct
->drained
);
188 mlx5_core_warn(dev
, "invalid resource type for 0x%x\n", rsn
);
191 mlx5_core_put_rsc(common
);
196 static int create_resource_common(struct mlx5_core_dev
*dev
,
197 struct mlx5_core_qp
*qp
,
200 struct mlx5_qp_table
*table
= &dev
->priv
.qp_table
;
203 qp
->common
.res
= rsc_type
;
204 spin_lock_irq(&table
->lock
);
205 err
= radix_tree_insert(&table
->tree
,
206 qp
->qpn
| (rsc_type
<< MLX5_USER_INDEX_LEN
),
208 spin_unlock_irq(&table
->lock
);
212 atomic_set(&qp
->common
.refcount
, 1);
213 init_completion(&qp
->common
.free
);
214 qp
->pid
= current
->pid
;
219 static void destroy_resource_common(struct mlx5_core_dev
*dev
,
220 struct mlx5_core_qp
*qp
)
222 struct mlx5_qp_table
*table
= &dev
->priv
.qp_table
;
225 spin_lock_irqsave(&table
->lock
, flags
);
226 radix_tree_delete(&table
->tree
,
227 qp
->qpn
| (qp
->common
.res
<< MLX5_USER_INDEX_LEN
));
228 spin_unlock_irqrestore(&table
->lock
, flags
);
229 mlx5_core_put_rsc((struct mlx5_core_rsc_common
*)qp
);
230 wait_for_completion(&qp
->common
.free
);
233 static int _mlx5_core_destroy_dct(struct mlx5_core_dev
*dev
,
234 struct mlx5_core_dct
*dct
, bool need_cleanup
)
236 u32 out
[MLX5_ST_SZ_DW(destroy_dct_out
)] = {0};
237 u32 in
[MLX5_ST_SZ_DW(destroy_dct_in
)] = {0};
238 struct mlx5_core_qp
*qp
= &dct
->mqp
;
241 err
= mlx5_core_drain_dct(dev
, dct
);
243 if (dev
->state
== MLX5_DEVICE_STATE_INTERNAL_ERROR
) {
247 dev
, "failed drain DCT 0x%x with error 0x%x\n",
252 wait_for_completion(&dct
->drained
);
255 destroy_resource_common(dev
, &dct
->mqp
);
256 MLX5_SET(destroy_dct_in
, in
, opcode
, MLX5_CMD_OP_DESTROY_DCT
);
257 MLX5_SET(destroy_dct_in
, in
, dctn
, qp
->qpn
);
258 MLX5_SET(destroy_dct_in
, in
, uid
, qp
->uid
);
259 err
= mlx5_cmd_exec(dev
, (void *)&in
, sizeof(in
),
260 (void *)&out
, sizeof(out
));
264 int mlx5_core_create_dct(struct mlx5_core_dev
*dev
,
265 struct mlx5_core_dct
*dct
,
267 u32
*out
, int outlen
)
269 struct mlx5_core_qp
*qp
= &dct
->mqp
;
272 init_completion(&dct
->drained
);
273 MLX5_SET(create_dct_in
, in
, opcode
, MLX5_CMD_OP_CREATE_DCT
);
275 err
= mlx5_cmd_exec(dev
, in
, inlen
, out
, outlen
);
277 mlx5_core_warn(dev
, "create DCT failed, ret %d\n", err
);
281 qp
->qpn
= MLX5_GET(create_dct_out
, out
, dctn
);
282 qp
->uid
= MLX5_GET(create_dct_in
, in
, uid
);
283 err
= create_resource_common(dev
, qp
, MLX5_RES_DCT
);
289 _mlx5_core_destroy_dct(dev
, dct
, false);
292 EXPORT_SYMBOL_GPL(mlx5_core_create_dct
);
294 int mlx5_core_create_qp(struct mlx5_core_dev
*dev
,
295 struct mlx5_core_qp
*qp
,
298 u32 out
[MLX5_ST_SZ_DW(create_qp_out
)] = {0};
299 u32 dout
[MLX5_ST_SZ_DW(destroy_qp_out
)];
300 u32 din
[MLX5_ST_SZ_DW(destroy_qp_in
)];
303 MLX5_SET(create_qp_in
, in
, opcode
, MLX5_CMD_OP_CREATE_QP
);
305 err
= mlx5_cmd_exec(dev
, in
, inlen
, out
, sizeof(out
));
309 qp
->uid
= MLX5_GET(create_qp_in
, in
, uid
);
310 qp
->qpn
= MLX5_GET(create_qp_out
, out
, qpn
);
311 mlx5_core_dbg(dev
, "qpn = 0x%x\n", qp
->qpn
);
313 err
= create_resource_common(dev
, qp
, MLX5_RES_QP
);
317 err
= mlx5_debug_qp_add(dev
, qp
);
319 mlx5_core_dbg(dev
, "failed adding QP 0x%x to debug file system\n",
322 atomic_inc(&dev
->num_qps
);
327 memset(din
, 0, sizeof(din
));
328 memset(dout
, 0, sizeof(dout
));
329 MLX5_SET(destroy_qp_in
, din
, opcode
, MLX5_CMD_OP_DESTROY_QP
);
330 MLX5_SET(destroy_qp_in
, din
, qpn
, qp
->qpn
);
331 MLX5_SET(destroy_qp_in
, din
, uid
, qp
->uid
);
332 mlx5_cmd_exec(dev
, din
, sizeof(din
), dout
, sizeof(dout
));
335 EXPORT_SYMBOL_GPL(mlx5_core_create_qp
);
337 static int mlx5_core_drain_dct(struct mlx5_core_dev
*dev
,
338 struct mlx5_core_dct
*dct
)
340 u32 out
[MLX5_ST_SZ_DW(drain_dct_out
)] = {0};
341 u32 in
[MLX5_ST_SZ_DW(drain_dct_in
)] = {0};
342 struct mlx5_core_qp
*qp
= &dct
->mqp
;
344 MLX5_SET(drain_dct_in
, in
, opcode
, MLX5_CMD_OP_DRAIN_DCT
);
345 MLX5_SET(drain_dct_in
, in
, dctn
, qp
->qpn
);
346 MLX5_SET(drain_dct_in
, in
, uid
, qp
->uid
);
347 return mlx5_cmd_exec(dev
, (void *)&in
, sizeof(in
),
348 (void *)&out
, sizeof(out
));
351 int mlx5_core_destroy_dct(struct mlx5_core_dev
*dev
,
352 struct mlx5_core_dct
*dct
)
354 return _mlx5_core_destroy_dct(dev
, dct
, true);
356 EXPORT_SYMBOL_GPL(mlx5_core_destroy_dct
);
358 int mlx5_core_destroy_qp(struct mlx5_core_dev
*dev
,
359 struct mlx5_core_qp
*qp
)
361 u32 out
[MLX5_ST_SZ_DW(destroy_qp_out
)] = {0};
362 u32 in
[MLX5_ST_SZ_DW(destroy_qp_in
)] = {0};
365 mlx5_debug_qp_remove(dev
, qp
);
367 destroy_resource_common(dev
, qp
);
369 MLX5_SET(destroy_qp_in
, in
, opcode
, MLX5_CMD_OP_DESTROY_QP
);
370 MLX5_SET(destroy_qp_in
, in
, qpn
, qp
->qpn
);
371 MLX5_SET(destroy_qp_in
, in
, uid
, qp
->uid
);
372 err
= mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
376 atomic_dec(&dev
->num_qps
);
379 EXPORT_SYMBOL_GPL(mlx5_core_destroy_qp
);
381 int mlx5_core_set_delay_drop(struct mlx5_core_dev
*dev
,
384 u32 out
[MLX5_ST_SZ_DW(set_delay_drop_params_out
)] = {0};
385 u32 in
[MLX5_ST_SZ_DW(set_delay_drop_params_in
)] = {0};
387 MLX5_SET(set_delay_drop_params_in
, in
, opcode
,
388 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS
);
389 MLX5_SET(set_delay_drop_params_in
, in
, delay_drop_timeout
,
391 return mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
393 EXPORT_SYMBOL_GPL(mlx5_core_set_delay_drop
);
402 static int mbox_alloc(struct mbox_info
*mbox
, int inlen
, int outlen
)
405 mbox
->outlen
= outlen
;
406 mbox
->in
= kzalloc(mbox
->inlen
, GFP_KERNEL
);
407 mbox
->out
= kzalloc(mbox
->outlen
, GFP_KERNEL
);
408 if (!mbox
->in
|| !mbox
->out
) {
417 static void mbox_free(struct mbox_info
*mbox
)
423 static int modify_qp_mbox_alloc(struct mlx5_core_dev
*dev
, u16 opcode
, int qpn
,
424 u32 opt_param_mask
, void *qpc
,
425 struct mbox_info
*mbox
, u16 uid
)
430 #define MBOX_ALLOC(mbox, typ) \
431 mbox_alloc(mbox, MLX5_ST_SZ_BYTES(typ##_in), MLX5_ST_SZ_BYTES(typ##_out))
433 #define MOD_QP_IN_SET(typ, in, _opcode, _qpn, _uid) \
435 MLX5_SET(typ##_in, in, opcode, _opcode); \
436 MLX5_SET(typ##_in, in, qpn, _qpn); \
437 MLX5_SET(typ##_in, in, uid, _uid); \
440 #define MOD_QP_IN_SET_QPC(typ, in, _opcode, _qpn, _opt_p, _qpc, _uid) \
442 MOD_QP_IN_SET(typ, in, _opcode, _qpn, _uid); \
443 MLX5_SET(typ##_in, in, opt_param_mask, _opt_p); \
444 memcpy(MLX5_ADDR_OF(typ##_in, in, qpc), _qpc, \
445 MLX5_ST_SZ_BYTES(qpc)); \
450 case MLX5_CMD_OP_2RST_QP
:
451 if (MBOX_ALLOC(mbox
, qp_2rst
))
453 MOD_QP_IN_SET(qp_2rst
, mbox
->in
, opcode
, qpn
, uid
);
455 case MLX5_CMD_OP_2ERR_QP
:
456 if (MBOX_ALLOC(mbox
, qp_2err
))
458 MOD_QP_IN_SET(qp_2err
, mbox
->in
, opcode
, qpn
, uid
);
461 /* MODIFY with QPC */
462 case MLX5_CMD_OP_RST2INIT_QP
:
463 if (MBOX_ALLOC(mbox
, rst2init_qp
))
465 MOD_QP_IN_SET_QPC(rst2init_qp
, mbox
->in
, opcode
, qpn
,
466 opt_param_mask
, qpc
, uid
);
468 case MLX5_CMD_OP_INIT2RTR_QP
:
469 if (MBOX_ALLOC(mbox
, init2rtr_qp
))
471 MOD_QP_IN_SET_QPC(init2rtr_qp
, mbox
->in
, opcode
, qpn
,
472 opt_param_mask
, qpc
, uid
);
474 case MLX5_CMD_OP_RTR2RTS_QP
:
475 if (MBOX_ALLOC(mbox
, rtr2rts_qp
))
477 MOD_QP_IN_SET_QPC(rtr2rts_qp
, mbox
->in
, opcode
, qpn
,
478 opt_param_mask
, qpc
, uid
);
480 case MLX5_CMD_OP_RTS2RTS_QP
:
481 if (MBOX_ALLOC(mbox
, rts2rts_qp
))
483 MOD_QP_IN_SET_QPC(rts2rts_qp
, mbox
->in
, opcode
, qpn
,
484 opt_param_mask
, qpc
, uid
);
486 case MLX5_CMD_OP_SQERR2RTS_QP
:
487 if (MBOX_ALLOC(mbox
, sqerr2rts_qp
))
489 MOD_QP_IN_SET_QPC(sqerr2rts_qp
, mbox
->in
, opcode
, qpn
,
490 opt_param_mask
, qpc
, uid
);
492 case MLX5_CMD_OP_INIT2INIT_QP
:
493 if (MBOX_ALLOC(mbox
, init2init_qp
))
495 MOD_QP_IN_SET_QPC(init2init_qp
, mbox
->in
, opcode
, qpn
,
496 opt_param_mask
, qpc
, uid
);
499 mlx5_core_err(dev
, "Unknown transition for modify QP: OP(0x%x) QPN(0x%x)\n",
506 int mlx5_core_qp_modify(struct mlx5_core_dev
*dev
, u16 opcode
,
507 u32 opt_param_mask
, void *qpc
,
508 struct mlx5_core_qp
*qp
)
510 struct mbox_info mbox
;
513 err
= modify_qp_mbox_alloc(dev
, opcode
, qp
->qpn
,
514 opt_param_mask
, qpc
, &mbox
, qp
->uid
);
518 err
= mlx5_cmd_exec(dev
, mbox
.in
, mbox
.inlen
, mbox
.out
, mbox
.outlen
);
522 EXPORT_SYMBOL_GPL(mlx5_core_qp_modify
);
524 void mlx5_init_qp_table(struct mlx5_core_dev
*dev
)
526 struct mlx5_qp_table
*table
= &dev
->priv
.qp_table
;
528 memset(table
, 0, sizeof(*table
));
529 spin_lock_init(&table
->lock
);
530 INIT_RADIX_TREE(&table
->tree
, GFP_ATOMIC
);
531 mlx5_qp_debugfs_init(dev
);
533 table
->nb
.notifier_call
= rsc_event_notifier
;
534 mlx5_notifier_register(dev
, &table
->nb
);
537 void mlx5_cleanup_qp_table(struct mlx5_core_dev
*dev
)
539 struct mlx5_qp_table
*table
= &dev
->priv
.qp_table
;
541 mlx5_notifier_unregister(dev
, &table
->nb
);
542 mlx5_qp_debugfs_cleanup(dev
);
545 int mlx5_core_qp_query(struct mlx5_core_dev
*dev
, struct mlx5_core_qp
*qp
,
546 u32
*out
, int outlen
)
548 u32 in
[MLX5_ST_SZ_DW(query_qp_in
)] = {0};
550 MLX5_SET(query_qp_in
, in
, opcode
, MLX5_CMD_OP_QUERY_QP
);
551 MLX5_SET(query_qp_in
, in
, qpn
, qp
->qpn
);
552 return mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, outlen
);
554 EXPORT_SYMBOL_GPL(mlx5_core_qp_query
);
556 int mlx5_core_dct_query(struct mlx5_core_dev
*dev
, struct mlx5_core_dct
*dct
,
557 u32
*out
, int outlen
)
559 u32 in
[MLX5_ST_SZ_DW(query_dct_in
)] = {0};
560 struct mlx5_core_qp
*qp
= &dct
->mqp
;
562 MLX5_SET(query_dct_in
, in
, opcode
, MLX5_CMD_OP_QUERY_DCT
);
563 MLX5_SET(query_dct_in
, in
, dctn
, qp
->qpn
);
565 return mlx5_cmd_exec(dev
, (void *)&in
, sizeof(in
),
566 (void *)out
, outlen
);
568 EXPORT_SYMBOL_GPL(mlx5_core_dct_query
);
570 int mlx5_core_xrcd_alloc(struct mlx5_core_dev
*dev
, u32
*xrcdn
)
572 u32 out
[MLX5_ST_SZ_DW(alloc_xrcd_out
)] = {0};
573 u32 in
[MLX5_ST_SZ_DW(alloc_xrcd_in
)] = {0};
576 MLX5_SET(alloc_xrcd_in
, in
, opcode
, MLX5_CMD_OP_ALLOC_XRCD
);
577 err
= mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
579 *xrcdn
= MLX5_GET(alloc_xrcd_out
, out
, xrcd
);
582 EXPORT_SYMBOL_GPL(mlx5_core_xrcd_alloc
);
584 int mlx5_core_xrcd_dealloc(struct mlx5_core_dev
*dev
, u32 xrcdn
)
586 u32 out
[MLX5_ST_SZ_DW(dealloc_xrcd_out
)] = {0};
587 u32 in
[MLX5_ST_SZ_DW(dealloc_xrcd_in
)] = {0};
589 MLX5_SET(dealloc_xrcd_in
, in
, opcode
, MLX5_CMD_OP_DEALLOC_XRCD
);
590 MLX5_SET(dealloc_xrcd_in
, in
, xrcd
, xrcdn
);
591 return mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
593 EXPORT_SYMBOL_GPL(mlx5_core_xrcd_dealloc
);
595 static void destroy_rq_tracked(struct mlx5_core_dev
*dev
, u32 rqn
, u16 uid
)
597 u32 in
[MLX5_ST_SZ_DW(destroy_rq_in
)] = {};
598 u32 out
[MLX5_ST_SZ_DW(destroy_rq_out
)] = {};
600 MLX5_SET(destroy_rq_in
, in
, opcode
, MLX5_CMD_OP_DESTROY_RQ
);
601 MLX5_SET(destroy_rq_in
, in
, rqn
, rqn
);
602 MLX5_SET(destroy_rq_in
, in
, uid
, uid
);
603 mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
606 int mlx5_core_create_rq_tracked(struct mlx5_core_dev
*dev
, u32
*in
, int inlen
,
607 struct mlx5_core_qp
*rq
)
612 err
= mlx5_core_create_rq(dev
, in
, inlen
, &rqn
);
616 rq
->uid
= MLX5_GET(create_rq_in
, in
, uid
);
618 err
= create_resource_common(dev
, rq
, MLX5_RES_RQ
);
625 destroy_rq_tracked(dev
, rq
->qpn
, rq
->uid
);
629 EXPORT_SYMBOL(mlx5_core_create_rq_tracked
);
631 void mlx5_core_destroy_rq_tracked(struct mlx5_core_dev
*dev
,
632 struct mlx5_core_qp
*rq
)
634 destroy_resource_common(dev
, rq
);
635 destroy_rq_tracked(dev
, rq
->qpn
, rq
->uid
);
637 EXPORT_SYMBOL(mlx5_core_destroy_rq_tracked
);
639 static void destroy_sq_tracked(struct mlx5_core_dev
*dev
, u32 sqn
, u16 uid
)
641 u32 in
[MLX5_ST_SZ_DW(destroy_sq_in
)] = {};
642 u32 out
[MLX5_ST_SZ_DW(destroy_sq_out
)] = {};
644 MLX5_SET(destroy_sq_in
, in
, opcode
, MLX5_CMD_OP_DESTROY_SQ
);
645 MLX5_SET(destroy_sq_in
, in
, sqn
, sqn
);
646 MLX5_SET(destroy_sq_in
, in
, uid
, uid
);
647 mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
650 int mlx5_core_create_sq_tracked(struct mlx5_core_dev
*dev
, u32
*in
, int inlen
,
651 struct mlx5_core_qp
*sq
)
656 err
= mlx5_core_create_sq(dev
, in
, inlen
, &sqn
);
660 sq
->uid
= MLX5_GET(create_sq_in
, in
, uid
);
662 err
= create_resource_common(dev
, sq
, MLX5_RES_SQ
);
669 destroy_sq_tracked(dev
, sq
->qpn
, sq
->uid
);
673 EXPORT_SYMBOL(mlx5_core_create_sq_tracked
);
675 void mlx5_core_destroy_sq_tracked(struct mlx5_core_dev
*dev
,
676 struct mlx5_core_qp
*sq
)
678 destroy_resource_common(dev
, sq
);
679 destroy_sq_tracked(dev
, sq
->qpn
, sq
->uid
);
681 EXPORT_SYMBOL(mlx5_core_destroy_sq_tracked
);
683 int mlx5_core_alloc_q_counter(struct mlx5_core_dev
*dev
, u16
*counter_id
)
685 u32 in
[MLX5_ST_SZ_DW(alloc_q_counter_in
)] = {0};
686 u32 out
[MLX5_ST_SZ_DW(alloc_q_counter_out
)] = {0};
689 MLX5_SET(alloc_q_counter_in
, in
, opcode
, MLX5_CMD_OP_ALLOC_Q_COUNTER
);
690 err
= mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
692 *counter_id
= MLX5_GET(alloc_q_counter_out
, out
,
696 EXPORT_SYMBOL_GPL(mlx5_core_alloc_q_counter
);
698 int mlx5_core_dealloc_q_counter(struct mlx5_core_dev
*dev
, u16 counter_id
)
700 u32 in
[MLX5_ST_SZ_DW(dealloc_q_counter_in
)] = {0};
701 u32 out
[MLX5_ST_SZ_DW(dealloc_q_counter_out
)] = {0};
703 MLX5_SET(dealloc_q_counter_in
, in
, opcode
,
704 MLX5_CMD_OP_DEALLOC_Q_COUNTER
);
705 MLX5_SET(dealloc_q_counter_in
, in
, counter_set_id
, counter_id
);
706 return mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, sizeof(out
));
708 EXPORT_SYMBOL_GPL(mlx5_core_dealloc_q_counter
);
710 int mlx5_core_query_q_counter(struct mlx5_core_dev
*dev
, u16 counter_id
,
711 int reset
, void *out
, int out_size
)
713 u32 in
[MLX5_ST_SZ_DW(query_q_counter_in
)] = {0};
715 MLX5_SET(query_q_counter_in
, in
, opcode
, MLX5_CMD_OP_QUERY_Q_COUNTER
);
716 MLX5_SET(query_q_counter_in
, in
, clear
, reset
);
717 MLX5_SET(query_q_counter_in
, in
, counter_set_id
, counter_id
);
718 return mlx5_cmd_exec(dev
, in
, sizeof(in
), out
, out_size
);
720 EXPORT_SYMBOL_GPL(mlx5_core_query_q_counter
);
722 struct mlx5_core_rsc_common
*mlx5_core_res_hold(struct mlx5_core_dev
*dev
,
724 enum mlx5_res_type res_type
)
726 u32 rsn
= res_num
| (res_type
<< MLX5_USER_INDEX_LEN
);
727 struct mlx5_qp_table
*table
= &dev
->priv
.qp_table
;
729 return mlx5_get_rsc(table
, rsn
);
731 EXPORT_SYMBOL_GPL(mlx5_core_res_hold
);
733 void mlx5_core_res_put(struct mlx5_core_rsc_common
*res
)
735 mlx5_core_put_rsc(res
);
737 EXPORT_SYMBOL_GPL(mlx5_core_res_put
);