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[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / mellanox / mlxsw / spectrum.c
1 /*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/types.h>
40 #include <linux/pci.h>
41 #include <linux/netdevice.h>
42 #include <linux/etherdevice.h>
43 #include <linux/ethtool.h>
44 #include <linux/slab.h>
45 #include <linux/device.h>
46 #include <linux/skbuff.h>
47 #include <linux/if_vlan.h>
48 #include <linux/if_bridge.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/bitops.h>
52 #include <linux/list.h>
53 #include <linux/notifier.h>
54 #include <linux/dcbnl.h>
55 #include <linux/inetdevice.h>
56 #include <net/switchdev.h>
57 #include <net/pkt_cls.h>
58 #include <net/tc_act/tc_mirred.h>
59 #include <net/netevent.h>
60
61 #include "spectrum.h"
62 #include "pci.h"
63 #include "core.h"
64 #include "reg.h"
65 #include "port.h"
66 #include "trap.h"
67 #include "txheader.h"
68
69 static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
70 static const char mlxsw_sp_driver_version[] = "1.0";
71
72 /* tx_hdr_version
73 * Tx header version.
74 * Must be set to 1.
75 */
76 MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
77
78 /* tx_hdr_ctl
79 * Packet control type.
80 * 0 - Ethernet control (e.g. EMADs, LACP)
81 * 1 - Ethernet data
82 */
83 MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
84
85 /* tx_hdr_proto
86 * Packet protocol type. Must be set to 1 (Ethernet).
87 */
88 MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
89
90 /* tx_hdr_rx_is_router
91 * Packet is sent from the router. Valid for data packets only.
92 */
93 MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
94
95 /* tx_hdr_fid_valid
96 * Indicates if the 'fid' field is valid and should be used for
97 * forwarding lookup. Valid for data packets only.
98 */
99 MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
100
101 /* tx_hdr_swid
102 * Switch partition ID. Must be set to 0.
103 */
104 MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
105
106 /* tx_hdr_control_tclass
107 * Indicates if the packet should use the control TClass and not one
108 * of the data TClasses.
109 */
110 MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
111
112 /* tx_hdr_etclass
113 * Egress TClass to be used on the egress device on the egress port.
114 */
115 MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
116
117 /* tx_hdr_port_mid
118 * Destination local port for unicast packets.
119 * Destination multicast ID for multicast packets.
120 *
121 * Control packets are directed to a specific egress port, while data
122 * packets are transmitted through the CPU port (0) into the switch partition,
123 * where forwarding rules are applied.
124 */
125 MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
126
127 /* tx_hdr_fid
128 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
129 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
130 * Valid for data packets only.
131 */
132 MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
133
134 /* tx_hdr_type
135 * 0 - Data packets
136 * 6 - Control packets
137 */
138 MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
139
140 static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
141
142 static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
143 const struct mlxsw_tx_info *tx_info)
144 {
145 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
146
147 memset(txhdr, 0, MLXSW_TXHDR_LEN);
148
149 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
150 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
151 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
152 mlxsw_tx_hdr_swid_set(txhdr, 0);
153 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
154 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
155 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
156 }
157
158 static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
159 {
160 char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
161 int err;
162
163 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
164 if (err)
165 return err;
166 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
167 return 0;
168 }
169
170 static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
171 {
172 int i;
173
174 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
175 return -EIO;
176
177 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
178 MAX_SPAN);
179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189 }
190
191 static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192 {
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201 }
202
203 static struct mlxsw_sp_span_entry *
204 mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205 {
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
234 span_entry->ref_count = 1;
235 span_entry->local_port = local_port;
236 return span_entry;
237 }
238
239 static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241 {
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249 }
250
251 static struct mlxsw_sp_span_entry *
252 mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
253 {
254 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
255 int i;
256
257 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
258 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
259
260 if (curr->used && curr->local_port == port->local_port)
261 return curr;
262 }
263 return NULL;
264 }
265
266 static struct mlxsw_sp_span_entry
267 *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
268 {
269 struct mlxsw_sp_span_entry *span_entry;
270
271 span_entry = mlxsw_sp_span_entry_find(port);
272 if (span_entry) {
273 /* Already exists, just take a reference */
274 span_entry->ref_count++;
275 return span_entry;
276 }
277
278 return mlxsw_sp_span_entry_create(port);
279 }
280
281 static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
282 struct mlxsw_sp_span_entry *span_entry)
283 {
284 WARN_ON(!span_entry->ref_count);
285 if (--span_entry->ref_count == 0)
286 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
287 return 0;
288 }
289
290 static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
291 {
292 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
293 struct mlxsw_sp_span_inspected_port *p;
294 int i;
295
296 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
297 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
298
299 list_for_each_entry(p, &curr->bound_ports_list, list)
300 if (p->local_port == port->local_port &&
301 p->type == MLXSW_SP_SPAN_EGRESS)
302 return true;
303 }
304
305 return false;
306 }
307
308 static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
309 {
310 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
311 }
312
313 static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
314 {
315 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
316 char sbib_pl[MLXSW_REG_SBIB_LEN];
317 int err;
318
319 /* If port is egress mirrored, the shared buffer size should be
320 * updated according to the mtu value
321 */
322 if (mlxsw_sp_span_is_egress_mirror(port)) {
323 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
324 mlxsw_sp_span_mtu_to_buffsize(mtu));
325 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
326 if (err) {
327 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
328 return err;
329 }
330 }
331
332 return 0;
333 }
334
335 static struct mlxsw_sp_span_inspected_port *
336 mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
337 struct mlxsw_sp_span_entry *span_entry)
338 {
339 struct mlxsw_sp_span_inspected_port *p;
340
341 list_for_each_entry(p, &span_entry->bound_ports_list, list)
342 if (port->local_port == p->local_port)
343 return p;
344 return NULL;
345 }
346
347 static int
348 mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
349 struct mlxsw_sp_span_entry *span_entry,
350 enum mlxsw_sp_span_type type)
351 {
352 struct mlxsw_sp_span_inspected_port *inspected_port;
353 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
354 char mpar_pl[MLXSW_REG_MPAR_LEN];
355 char sbib_pl[MLXSW_REG_SBIB_LEN];
356 int pa_id = span_entry->id;
357 int err;
358
359 /* if it is an egress SPAN, bind a shared buffer to it */
360 if (type == MLXSW_SP_SPAN_EGRESS) {
361 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
362 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
363 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
364 if (err) {
365 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
366 return err;
367 }
368 }
369
370 /* bind the port to the SPAN entry */
371 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
372 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
373 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
374 if (err)
375 goto err_mpar_reg_write;
376
377 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
378 if (!inspected_port) {
379 err = -ENOMEM;
380 goto err_inspected_port_alloc;
381 }
382 inspected_port->local_port = port->local_port;
383 inspected_port->type = type;
384 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
385
386 return 0;
387
388 err_mpar_reg_write:
389 err_inspected_port_alloc:
390 if (type == MLXSW_SP_SPAN_EGRESS) {
391 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
392 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
393 }
394 return err;
395 }
396
397 static void
398 mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
399 struct mlxsw_sp_span_entry *span_entry,
400 enum mlxsw_sp_span_type type)
401 {
402 struct mlxsw_sp_span_inspected_port *inspected_port;
403 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
404 char mpar_pl[MLXSW_REG_MPAR_LEN];
405 char sbib_pl[MLXSW_REG_SBIB_LEN];
406 int pa_id = span_entry->id;
407
408 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
409 if (!inspected_port)
410 return;
411
412 /* remove the inspected port */
413 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
414 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
415 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
416
417 /* remove the SBIB buffer if it was egress SPAN */
418 if (type == MLXSW_SP_SPAN_EGRESS) {
419 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
420 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
421 }
422
423 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
424
425 list_del(&inspected_port->list);
426 kfree(inspected_port);
427 }
428
429 static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
430 struct mlxsw_sp_port *to,
431 enum mlxsw_sp_span_type type)
432 {
433 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
434 struct mlxsw_sp_span_entry *span_entry;
435 int err;
436
437 span_entry = mlxsw_sp_span_entry_get(to);
438 if (!span_entry)
439 return -ENOENT;
440
441 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
442 span_entry->id);
443
444 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
445 if (err)
446 goto err_port_bind;
447
448 return 0;
449
450 err_port_bind:
451 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
452 return err;
453 }
454
455 static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
456 struct mlxsw_sp_port *to,
457 enum mlxsw_sp_span_type type)
458 {
459 struct mlxsw_sp_span_entry *span_entry;
460
461 span_entry = mlxsw_sp_span_entry_find(to);
462 if (!span_entry) {
463 netdev_err(from->dev, "no span entry found\n");
464 return;
465 }
466
467 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
468 span_entry->id);
469 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
470 }
471
472 static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
473 bool is_up)
474 {
475 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
476 char paos_pl[MLXSW_REG_PAOS_LEN];
477
478 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
479 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
480 MLXSW_PORT_ADMIN_STATUS_DOWN);
481 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
482 }
483
484 static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
485 unsigned char *addr)
486 {
487 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
488 char ppad_pl[MLXSW_REG_PPAD_LEN];
489
490 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
491 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
492 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
493 }
494
495 static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
496 {
497 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
498 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
499
500 ether_addr_copy(addr, mlxsw_sp->base_mac);
501 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
502 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
503 }
504
505 static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
506 {
507 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
508 char pmtu_pl[MLXSW_REG_PMTU_LEN];
509 int max_mtu;
510 int err;
511
512 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
513 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
514 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
515 if (err)
516 return err;
517 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
518
519 if (mtu > max_mtu)
520 return -EINVAL;
521
522 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
523 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
524 }
525
526 static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
527 u8 swid)
528 {
529 char pspa_pl[MLXSW_REG_PSPA_LEN];
530
531 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
532 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
533 }
534
535 static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
536 {
537 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
538
539 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
540 swid);
541 }
542
543 static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
544 bool enable)
545 {
546 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
547 char svpe_pl[MLXSW_REG_SVPE_LEN];
548
549 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
550 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
551 }
552
553 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
554 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
555 u16 vid)
556 {
557 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
558 char svfa_pl[MLXSW_REG_SVFA_LEN];
559
560 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
561 fid, vid);
562 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
563 }
564
565 int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
566 u16 vid_begin, u16 vid_end,
567 bool learn_enable)
568 {
569 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
570 char *spvmlr_pl;
571 int err;
572
573 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
574 if (!spvmlr_pl)
575 return -ENOMEM;
576 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
577 vid_end, learn_enable);
578 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
579 kfree(spvmlr_pl);
580 return err;
581 }
582
583 static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
584 u16 vid, bool learn_enable)
585 {
586 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
587 learn_enable);
588 }
589
590 static int
591 mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
592 {
593 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
594 char sspr_pl[MLXSW_REG_SSPR_LEN];
595
596 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
597 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
598 }
599
600 static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
601 u8 local_port, u8 *p_module,
602 u8 *p_width, u8 *p_lane)
603 {
604 char pmlp_pl[MLXSW_REG_PMLP_LEN];
605 int err;
606
607 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
608 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
609 if (err)
610 return err;
611 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
612 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
613 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
614 return 0;
615 }
616
617 static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
618 u8 module, u8 width, u8 lane)
619 {
620 char pmlp_pl[MLXSW_REG_PMLP_LEN];
621 int i;
622
623 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
624 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
625 for (i = 0; i < width; i++) {
626 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
627 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
628 }
629
630 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
631 }
632
633 static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
634 {
635 char pmlp_pl[MLXSW_REG_PMLP_LEN];
636
637 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
638 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
639 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
640 }
641
642 static int mlxsw_sp_port_open(struct net_device *dev)
643 {
644 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
645 int err;
646
647 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
648 if (err)
649 return err;
650 netif_start_queue(dev);
651 return 0;
652 }
653
654 static int mlxsw_sp_port_stop(struct net_device *dev)
655 {
656 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
657
658 netif_stop_queue(dev);
659 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
660 }
661
662 static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
663 struct net_device *dev)
664 {
665 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
666 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
667 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
668 const struct mlxsw_tx_info tx_info = {
669 .local_port = mlxsw_sp_port->local_port,
670 .is_emad = false,
671 };
672 u64 len;
673 int err;
674
675 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
676 return NETDEV_TX_BUSY;
677
678 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
679 struct sk_buff *skb_orig = skb;
680
681 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
682 if (!skb) {
683 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
684 dev_kfree_skb_any(skb_orig);
685 return NETDEV_TX_OK;
686 }
687 dev_consume_skb_any(skb_orig);
688 }
689
690 if (eth_skb_pad(skb)) {
691 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
692 return NETDEV_TX_OK;
693 }
694
695 mlxsw_sp_txhdr_construct(skb, &tx_info);
696 /* TX header is consumed by HW on the way so we shouldn't count its
697 * bytes as being sent.
698 */
699 len = skb->len - MLXSW_TXHDR_LEN;
700
701 /* Due to a race we might fail here because of a full queue. In that
702 * unlikely case we simply drop the packet.
703 */
704 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
705
706 if (!err) {
707 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
708 u64_stats_update_begin(&pcpu_stats->syncp);
709 pcpu_stats->tx_packets++;
710 pcpu_stats->tx_bytes += len;
711 u64_stats_update_end(&pcpu_stats->syncp);
712 } else {
713 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
714 dev_kfree_skb_any(skb);
715 }
716 return NETDEV_TX_OK;
717 }
718
719 static void mlxsw_sp_set_rx_mode(struct net_device *dev)
720 {
721 }
722
723 static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
724 {
725 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
726 struct sockaddr *addr = p;
727 int err;
728
729 if (!is_valid_ether_addr(addr->sa_data))
730 return -EADDRNOTAVAIL;
731
732 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
733 if (err)
734 return err;
735 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
736 return 0;
737 }
738
739 static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
740 bool pause_en, bool pfc_en, u16 delay)
741 {
742 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
743
744 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
745 MLXSW_SP_PAUSE_DELAY;
746
747 if (pause_en || pfc_en)
748 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
749 pg_size + delay, pg_size);
750 else
751 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
752 }
753
754 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
755 u8 *prio_tc, bool pause_en,
756 struct ieee_pfc *my_pfc)
757 {
758 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
759 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
760 u16 delay = !!my_pfc ? my_pfc->delay : 0;
761 char pbmc_pl[MLXSW_REG_PBMC_LEN];
762 int i, j, err;
763
764 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
765 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
766 if (err)
767 return err;
768
769 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
770 bool configure = false;
771 bool pfc = false;
772
773 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
774 if (prio_tc[j] == i) {
775 pfc = pfc_en & BIT(j);
776 configure = true;
777 break;
778 }
779 }
780
781 if (!configure)
782 continue;
783 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
784 }
785
786 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
787 }
788
789 static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
790 int mtu, bool pause_en)
791 {
792 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
793 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
794 struct ieee_pfc *my_pfc;
795 u8 *prio_tc;
796
797 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
798 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
799
800 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
801 pause_en, my_pfc);
802 }
803
804 static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
805 {
806 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
807 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
808 int err;
809
810 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
811 if (err)
812 return err;
813 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
814 if (err)
815 goto err_span_port_mtu_update;
816 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
817 if (err)
818 goto err_port_mtu_set;
819 dev->mtu = mtu;
820 return 0;
821
822 err_port_mtu_set:
823 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
824 err_span_port_mtu_update:
825 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
826 return err;
827 }
828
829 static int
830 mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
831 struct rtnl_link_stats64 *stats)
832 {
833 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
834 struct mlxsw_sp_port_pcpu_stats *p;
835 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
836 u32 tx_dropped = 0;
837 unsigned int start;
838 int i;
839
840 for_each_possible_cpu(i) {
841 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
842 do {
843 start = u64_stats_fetch_begin_irq(&p->syncp);
844 rx_packets = p->rx_packets;
845 rx_bytes = p->rx_bytes;
846 tx_packets = p->tx_packets;
847 tx_bytes = p->tx_bytes;
848 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
849
850 stats->rx_packets += rx_packets;
851 stats->rx_bytes += rx_bytes;
852 stats->tx_packets += tx_packets;
853 stats->tx_bytes += tx_bytes;
854 /* tx_dropped is u32, updated without syncp protection. */
855 tx_dropped += p->tx_dropped;
856 }
857 stats->tx_dropped = tx_dropped;
858 return 0;
859 }
860
861 static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
862 {
863 switch (attr_id) {
864 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
865 return true;
866 }
867
868 return false;
869 }
870
871 static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
872 void *sp)
873 {
874 switch (attr_id) {
875 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
876 return mlxsw_sp_port_get_sw_stats64(dev, sp);
877 }
878
879 return -EINVAL;
880 }
881
882 static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
883 int prio, char *ppcnt_pl)
884 {
885 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
886 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
887
888 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
889 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
890 }
891
892 static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
893 struct rtnl_link_stats64 *stats)
894 {
895 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
896 int err;
897
898 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
899 0, ppcnt_pl);
900 if (err)
901 goto out;
902
903 stats->tx_packets =
904 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
905 stats->rx_packets =
906 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
907 stats->tx_bytes =
908 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
909 stats->rx_bytes =
910 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
911 stats->multicast =
912 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
913
914 stats->rx_crc_errors =
915 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
916 stats->rx_frame_errors =
917 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
918
919 stats->rx_length_errors = (
920 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
921 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
922 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
923
924 stats->rx_errors = (stats->rx_crc_errors +
925 stats->rx_frame_errors + stats->rx_length_errors);
926
927 out:
928 return err;
929 }
930
931 static void update_stats_cache(struct work_struct *work)
932 {
933 struct mlxsw_sp_port *mlxsw_sp_port =
934 container_of(work, struct mlxsw_sp_port,
935 hw_stats.update_dw.work);
936
937 if (!netif_carrier_ok(mlxsw_sp_port->dev))
938 goto out;
939
940 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
941 mlxsw_sp_port->hw_stats.cache);
942
943 out:
944 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
945 MLXSW_HW_STATS_UPDATE_TIME);
946 }
947
948 /* Return the stats from a cache that is updated periodically,
949 * as this function might get called in an atomic context.
950 */
951 static void
952 mlxsw_sp_port_get_stats64(struct net_device *dev,
953 struct rtnl_link_stats64 *stats)
954 {
955 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
956
957 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
958 }
959
960 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
961 u16 vid_end, bool is_member, bool untagged)
962 {
963 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
964 char *spvm_pl;
965 int err;
966
967 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
968 if (!spvm_pl)
969 return -ENOMEM;
970
971 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
972 vid_end, is_member, untagged);
973 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
974 kfree(spvm_pl);
975 return err;
976 }
977
978 static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
979 {
980 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
981 u16 vid, last_visited_vid;
982 int err;
983
984 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
985 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
986 vid);
987 if (err) {
988 last_visited_vid = vid;
989 goto err_port_vid_to_fid_set;
990 }
991 }
992
993 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
994 if (err) {
995 last_visited_vid = VLAN_N_VID;
996 goto err_port_vid_to_fid_set;
997 }
998
999 return 0;
1000
1001 err_port_vid_to_fid_set:
1002 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1003 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1004 vid);
1005 return err;
1006 }
1007
1008 static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1009 {
1010 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1011 u16 vid;
1012 int err;
1013
1014 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1015 if (err)
1016 return err;
1017
1018 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1019 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1020 vid, vid);
1021 if (err)
1022 return err;
1023 }
1024
1025 return 0;
1026 }
1027
1028 static struct mlxsw_sp_port *
1029 mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
1030 {
1031 struct mlxsw_sp_port *mlxsw_sp_vport;
1032
1033 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1034 if (!mlxsw_sp_vport)
1035 return NULL;
1036
1037 /* dev will be set correctly after the VLAN device is linked
1038 * with the real device. In case of bridge SELF invocation, dev
1039 * will remain as is.
1040 */
1041 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1042 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1043 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1044 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
1045 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1046 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
1047 mlxsw_sp_vport->vport.vid = vid;
1048
1049 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1050
1051 return mlxsw_sp_vport;
1052 }
1053
1054 static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1055 {
1056 list_del(&mlxsw_sp_vport->vport.list);
1057 kfree(mlxsw_sp_vport);
1058 }
1059
1060 static int mlxsw_sp_port_add_vid(struct net_device *dev,
1061 __be16 __always_unused proto, u16 vid)
1062 {
1063 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1064 struct mlxsw_sp_port *mlxsw_sp_vport;
1065 bool untagged = vid == 1;
1066 int err;
1067
1068 /* VLAN 0 is added to HW filter when device goes up, but it is
1069 * reserved in our case, so simply return.
1070 */
1071 if (!vid)
1072 return 0;
1073
1074 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
1075 return 0;
1076
1077 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
1078 if (!mlxsw_sp_vport)
1079 return -ENOMEM;
1080
1081 /* When adding the first VLAN interface on a bridged port we need to
1082 * transition all the active 802.1Q bridge VLANs to use explicit
1083 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1084 */
1085 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
1086 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
1087 if (err)
1088 goto err_port_vp_mode_trans;
1089 }
1090
1091 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
1092 if (err)
1093 goto err_port_add_vid;
1094
1095 return 0;
1096
1097 err_port_add_vid:
1098 if (list_is_singular(&mlxsw_sp_port->vports_list))
1099 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1100 err_port_vp_mode_trans:
1101 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1102 return err;
1103 }
1104
1105 static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1106 __be16 __always_unused proto, u16 vid)
1107 {
1108 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1109 struct mlxsw_sp_port *mlxsw_sp_vport;
1110 struct mlxsw_sp_fid *f;
1111
1112 /* VLAN 0 is removed from HW filter when device goes down, but
1113 * it is reserved in our case, so simply return.
1114 */
1115 if (!vid)
1116 return 0;
1117
1118 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
1119 if (WARN_ON(!mlxsw_sp_vport))
1120 return 0;
1121
1122 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
1123
1124 /* Drop FID reference. If this was the last reference the
1125 * resources will be freed.
1126 */
1127 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1128 if (f && !WARN_ON(!f->leave))
1129 f->leave(mlxsw_sp_vport);
1130
1131 /* When removing the last VLAN interface on a bridged port we need to
1132 * transition all active 802.1Q bridge VLANs to use VID to FID
1133 * mappings and set port's mode to VLAN mode.
1134 */
1135 if (list_is_singular(&mlxsw_sp_port->vports_list))
1136 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1137
1138 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1139
1140 return 0;
1141 }
1142
1143 static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1144 size_t len)
1145 {
1146 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1147 u8 module = mlxsw_sp_port->mapping.module;
1148 u8 width = mlxsw_sp_port->mapping.width;
1149 u8 lane = mlxsw_sp_port->mapping.lane;
1150 int err;
1151
1152 if (!mlxsw_sp_port->split)
1153 err = snprintf(name, len, "p%d", module + 1);
1154 else
1155 err = snprintf(name, len, "p%ds%d", module + 1,
1156 lane / width);
1157
1158 if (err >= len)
1159 return -EINVAL;
1160
1161 return 0;
1162 }
1163
1164 static struct mlxsw_sp_port_mall_tc_entry *
1165 mlxsw_sp_port_mall_tc_entry_find(struct mlxsw_sp_port *port,
1166 unsigned long cookie) {
1167 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1168
1169 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1170 if (mall_tc_entry->cookie == cookie)
1171 return mall_tc_entry;
1172
1173 return NULL;
1174 }
1175
1176 static int
1177 mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1178 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror,
1179 const struct tc_action *a,
1180 bool ingress)
1181 {
1182 struct net *net = dev_net(mlxsw_sp_port->dev);
1183 enum mlxsw_sp_span_type span_type;
1184 struct mlxsw_sp_port *to_port;
1185 struct net_device *to_dev;
1186 int ifindex;
1187
1188 ifindex = tcf_mirred_ifindex(a);
1189 to_dev = __dev_get_by_index(net, ifindex);
1190 if (!to_dev) {
1191 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1192 return -EINVAL;
1193 }
1194
1195 if (!mlxsw_sp_port_dev_check(to_dev)) {
1196 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1197 return -EOPNOTSUPP;
1198 }
1199 to_port = netdev_priv(to_dev);
1200
1201 mirror->to_local_port = to_port->local_port;
1202 mirror->ingress = ingress;
1203 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1204 return mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1205 }
1206
1207 static void
1208 mlxsw_sp_port_del_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1209 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror)
1210 {
1211 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1212 enum mlxsw_sp_span_type span_type;
1213 struct mlxsw_sp_port *to_port;
1214
1215 to_port = mlxsw_sp->ports[mirror->to_local_port];
1216 span_type = mirror->ingress ?
1217 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1218 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1219 }
1220
1221 static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1222 __be16 protocol,
1223 struct tc_cls_matchall_offload *cls,
1224 bool ingress)
1225 {
1226 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1227 const struct tc_action *a;
1228 LIST_HEAD(actions);
1229 int err;
1230
1231 if (!tc_single_action(cls->exts)) {
1232 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1233 return -EOPNOTSUPP;
1234 }
1235
1236 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1237 if (!mall_tc_entry)
1238 return -ENOMEM;
1239 mall_tc_entry->cookie = cls->cookie;
1240
1241 tcf_exts_to_list(cls->exts, &actions);
1242 a = list_first_entry(&actions, struct tc_action, list);
1243
1244 if (is_tcf_mirred_egress_mirror(a) && protocol == htons(ETH_P_ALL)) {
1245 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror;
1246
1247 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1248 mirror = &mall_tc_entry->mirror;
1249 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port,
1250 mirror, a, ingress);
1251 } else {
1252 err = -EOPNOTSUPP;
1253 }
1254
1255 if (err)
1256 goto err_add_action;
1257
1258 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1259 return 0;
1260
1261 err_add_action:
1262 kfree(mall_tc_entry);
1263 return err;
1264 }
1265
1266 static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1267 struct tc_cls_matchall_offload *cls)
1268 {
1269 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1270
1271 mall_tc_entry = mlxsw_sp_port_mall_tc_entry_find(mlxsw_sp_port,
1272 cls->cookie);
1273 if (!mall_tc_entry) {
1274 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1275 return;
1276 }
1277 list_del(&mall_tc_entry->list);
1278
1279 switch (mall_tc_entry->type) {
1280 case MLXSW_SP_PORT_MALL_MIRROR:
1281 mlxsw_sp_port_del_cls_matchall_mirror(mlxsw_sp_port,
1282 &mall_tc_entry->mirror);
1283 break;
1284 default:
1285 WARN_ON(1);
1286 }
1287
1288 kfree(mall_tc_entry);
1289 }
1290
1291 static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1292 __be16 proto, struct tc_to_netdev *tc)
1293 {
1294 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1295 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1296
1297 if (tc->type == TC_SETUP_MATCHALL) {
1298 switch (tc->cls_mall->command) {
1299 case TC_CLSMATCHALL_REPLACE:
1300 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1301 proto,
1302 tc->cls_mall,
1303 ingress);
1304 case TC_CLSMATCHALL_DESTROY:
1305 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1306 tc->cls_mall);
1307 return 0;
1308 default:
1309 return -EINVAL;
1310 }
1311 }
1312
1313 return -EOPNOTSUPP;
1314 }
1315
1316 static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1317 .ndo_open = mlxsw_sp_port_open,
1318 .ndo_stop = mlxsw_sp_port_stop,
1319 .ndo_start_xmit = mlxsw_sp_port_xmit,
1320 .ndo_setup_tc = mlxsw_sp_setup_tc,
1321 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
1322 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1323 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1324 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1325 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1326 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
1327 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1328 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
1329 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1330 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
1331 .ndo_fdb_add = switchdev_port_fdb_add,
1332 .ndo_fdb_del = switchdev_port_fdb_del,
1333 .ndo_fdb_dump = switchdev_port_fdb_dump,
1334 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1335 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1336 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
1337 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
1338 };
1339
1340 static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1341 struct ethtool_drvinfo *drvinfo)
1342 {
1343 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1344 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1345
1346 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1347 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1348 sizeof(drvinfo->version));
1349 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1350 "%d.%d.%d",
1351 mlxsw_sp->bus_info->fw_rev.major,
1352 mlxsw_sp->bus_info->fw_rev.minor,
1353 mlxsw_sp->bus_info->fw_rev.subminor);
1354 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1355 sizeof(drvinfo->bus_info));
1356 }
1357
1358 static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1359 struct ethtool_pauseparam *pause)
1360 {
1361 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1362
1363 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1364 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1365 }
1366
1367 static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1368 struct ethtool_pauseparam *pause)
1369 {
1370 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1371
1372 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1373 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1374 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1375
1376 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1377 pfcc_pl);
1378 }
1379
1380 static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1381 struct ethtool_pauseparam *pause)
1382 {
1383 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1384 bool pause_en = pause->tx_pause || pause->rx_pause;
1385 int err;
1386
1387 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1388 netdev_err(dev, "PFC already enabled on port\n");
1389 return -EINVAL;
1390 }
1391
1392 if (pause->autoneg) {
1393 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1394 return -EINVAL;
1395 }
1396
1397 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1398 if (err) {
1399 netdev_err(dev, "Failed to configure port's headroom\n");
1400 return err;
1401 }
1402
1403 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1404 if (err) {
1405 netdev_err(dev, "Failed to set PAUSE parameters\n");
1406 goto err_port_pause_configure;
1407 }
1408
1409 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1410 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1411
1412 return 0;
1413
1414 err_port_pause_configure:
1415 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1416 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1417 return err;
1418 }
1419
1420 struct mlxsw_sp_port_hw_stats {
1421 char str[ETH_GSTRING_LEN];
1422 u64 (*getter)(const char *payload);
1423 };
1424
1425 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
1426 {
1427 .str = "a_frames_transmitted_ok",
1428 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1429 },
1430 {
1431 .str = "a_frames_received_ok",
1432 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1433 },
1434 {
1435 .str = "a_frame_check_sequence_errors",
1436 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1437 },
1438 {
1439 .str = "a_alignment_errors",
1440 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1441 },
1442 {
1443 .str = "a_octets_transmitted_ok",
1444 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1445 },
1446 {
1447 .str = "a_octets_received_ok",
1448 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1449 },
1450 {
1451 .str = "a_multicast_frames_xmitted_ok",
1452 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1453 },
1454 {
1455 .str = "a_broadcast_frames_xmitted_ok",
1456 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1457 },
1458 {
1459 .str = "a_multicast_frames_received_ok",
1460 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1461 },
1462 {
1463 .str = "a_broadcast_frames_received_ok",
1464 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1465 },
1466 {
1467 .str = "a_in_range_length_errors",
1468 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1469 },
1470 {
1471 .str = "a_out_of_range_length_field",
1472 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1473 },
1474 {
1475 .str = "a_frame_too_long_errors",
1476 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1477 },
1478 {
1479 .str = "a_symbol_error_during_carrier",
1480 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1481 },
1482 {
1483 .str = "a_mac_control_frames_transmitted",
1484 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1485 },
1486 {
1487 .str = "a_mac_control_frames_received",
1488 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1489 },
1490 {
1491 .str = "a_unsupported_opcodes_received",
1492 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1493 },
1494 {
1495 .str = "a_pause_mac_ctrl_frames_received",
1496 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1497 },
1498 {
1499 .str = "a_pause_mac_ctrl_frames_xmitted",
1500 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1501 },
1502 };
1503
1504 #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1505
1506 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1507 {
1508 .str = "rx_octets_prio",
1509 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1510 },
1511 {
1512 .str = "rx_frames_prio",
1513 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1514 },
1515 {
1516 .str = "tx_octets_prio",
1517 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1518 },
1519 {
1520 .str = "tx_frames_prio",
1521 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1522 },
1523 {
1524 .str = "rx_pause_prio",
1525 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1526 },
1527 {
1528 .str = "rx_pause_duration_prio",
1529 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1530 },
1531 {
1532 .str = "tx_pause_prio",
1533 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1534 },
1535 {
1536 .str = "tx_pause_duration_prio",
1537 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1538 },
1539 };
1540
1541 #define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1542
1543 static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(const char *ppcnt_pl)
1544 {
1545 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1546
1547 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1548 }
1549
1550 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1551 {
1552 .str = "tc_transmit_queue_tc",
1553 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1554 },
1555 {
1556 .str = "tc_no_buffer_discard_uc_tc",
1557 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1558 },
1559 };
1560
1561 #define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1562
1563 #define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
1564 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1565 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
1566 IEEE_8021QAZ_MAX_TCS)
1567
1568 static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1569 {
1570 int i;
1571
1572 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1573 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1574 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1575 *p += ETH_GSTRING_LEN;
1576 }
1577 }
1578
1579 static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1580 {
1581 int i;
1582
1583 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1584 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1585 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1586 *p += ETH_GSTRING_LEN;
1587 }
1588 }
1589
1590 static void mlxsw_sp_port_get_strings(struct net_device *dev,
1591 u32 stringset, u8 *data)
1592 {
1593 u8 *p = data;
1594 int i;
1595
1596 switch (stringset) {
1597 case ETH_SS_STATS:
1598 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1599 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1600 ETH_GSTRING_LEN);
1601 p += ETH_GSTRING_LEN;
1602 }
1603
1604 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1605 mlxsw_sp_port_get_prio_strings(&p, i);
1606
1607 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1608 mlxsw_sp_port_get_tc_strings(&p, i);
1609
1610 break;
1611 }
1612 }
1613
1614 static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1615 enum ethtool_phys_id_state state)
1616 {
1617 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1618 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1619 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1620 bool active;
1621
1622 switch (state) {
1623 case ETHTOOL_ID_ACTIVE:
1624 active = true;
1625 break;
1626 case ETHTOOL_ID_INACTIVE:
1627 active = false;
1628 break;
1629 default:
1630 return -EOPNOTSUPP;
1631 }
1632
1633 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1634 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1635 }
1636
1637 static int
1638 mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1639 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1640 {
1641 switch (grp) {
1642 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1643 *p_hw_stats = mlxsw_sp_port_hw_stats;
1644 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1645 break;
1646 case MLXSW_REG_PPCNT_PRIO_CNT:
1647 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1648 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1649 break;
1650 case MLXSW_REG_PPCNT_TC_CNT:
1651 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1652 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1653 break;
1654 default:
1655 WARN_ON(1);
1656 return -EOPNOTSUPP;
1657 }
1658 return 0;
1659 }
1660
1661 static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1662 enum mlxsw_reg_ppcnt_grp grp, int prio,
1663 u64 *data, int data_index)
1664 {
1665 struct mlxsw_sp_port_hw_stats *hw_stats;
1666 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1667 int i, len;
1668 int err;
1669
1670 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1671 if (err)
1672 return;
1673 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
1674 for (i = 0; i < len; i++)
1675 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
1676 }
1677
1678 static void mlxsw_sp_port_get_stats(struct net_device *dev,
1679 struct ethtool_stats *stats, u64 *data)
1680 {
1681 int i, data_index = 0;
1682
1683 /* IEEE 802.3 Counters */
1684 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1685 data, data_index);
1686 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1687
1688 /* Per-Priority Counters */
1689 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1690 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1691 data, data_index);
1692 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1693 }
1694
1695 /* Per-TC Counters */
1696 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1697 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1698 data, data_index);
1699 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1700 }
1701 }
1702
1703 static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1704 {
1705 switch (sset) {
1706 case ETH_SS_STATS:
1707 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
1708 default:
1709 return -EOPNOTSUPP;
1710 }
1711 }
1712
1713 struct mlxsw_sp_port_link_mode {
1714 enum ethtool_link_mode_bit_indices mask_ethtool;
1715 u32 mask;
1716 u32 speed;
1717 };
1718
1719 static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1720 {
1721 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1722 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1723 .speed = SPEED_100,
1724 },
1725 {
1726 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1727 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1728 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1729 .speed = SPEED_1000,
1730 },
1731 {
1732 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1733 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1734 .speed = SPEED_10000,
1735 },
1736 {
1737 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1738 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1739 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1740 .speed = SPEED_10000,
1741 },
1742 {
1743 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1744 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1745 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1746 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1747 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1748 .speed = SPEED_10000,
1749 },
1750 {
1751 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1752 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1753 .speed = SPEED_20000,
1754 },
1755 {
1756 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1757 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1758 .speed = SPEED_40000,
1759 },
1760 {
1761 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1762 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1763 .speed = SPEED_40000,
1764 },
1765 {
1766 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1767 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1768 .speed = SPEED_40000,
1769 },
1770 {
1771 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1772 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1773 .speed = SPEED_40000,
1774 },
1775 {
1776 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1777 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1778 .speed = SPEED_25000,
1779 },
1780 {
1781 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1782 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1783 .speed = SPEED_25000,
1784 },
1785 {
1786 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1787 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1788 .speed = SPEED_25000,
1789 },
1790 {
1791 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1792 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1793 .speed = SPEED_25000,
1794 },
1795 {
1796 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1797 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1798 .speed = SPEED_50000,
1799 },
1800 {
1801 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1802 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1803 .speed = SPEED_50000,
1804 },
1805 {
1806 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1807 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1808 .speed = SPEED_50000,
1809 },
1810 {
1811 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1812 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1813 .speed = SPEED_56000,
1814 },
1815 {
1816 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1817 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1818 .speed = SPEED_56000,
1819 },
1820 {
1821 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1822 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1823 .speed = SPEED_56000,
1824 },
1825 {
1826 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1827 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1828 .speed = SPEED_56000,
1829 },
1830 {
1831 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1832 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1833 .speed = SPEED_100000,
1834 },
1835 {
1836 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1837 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1838 .speed = SPEED_100000,
1839 },
1840 {
1841 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1842 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1843 .speed = SPEED_100000,
1844 },
1845 {
1846 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1847 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1848 .speed = SPEED_100000,
1849 },
1850 };
1851
1852 #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1853
1854 static void
1855 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1856 struct ethtool_link_ksettings *cmd)
1857 {
1858 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1859 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1860 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1861 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1862 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1863 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1864 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
1865
1866 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1867 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1868 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1869 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1870 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1871 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
1872 }
1873
1874 static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
1875 {
1876 int i;
1877
1878 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1879 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1880 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1881 mode);
1882 }
1883 }
1884
1885 static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1886 struct ethtool_link_ksettings *cmd)
1887 {
1888 u32 speed = SPEED_UNKNOWN;
1889 u8 duplex = DUPLEX_UNKNOWN;
1890 int i;
1891
1892 if (!carrier_ok)
1893 goto out;
1894
1895 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1896 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1897 speed = mlxsw_sp_port_link_mode[i].speed;
1898 duplex = DUPLEX_FULL;
1899 break;
1900 }
1901 }
1902 out:
1903 cmd->base.speed = speed;
1904 cmd->base.duplex = duplex;
1905 }
1906
1907 static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1908 {
1909 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1910 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1911 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1912 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1913 return PORT_FIBRE;
1914
1915 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1916 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1917 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1918 return PORT_DA;
1919
1920 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1921 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1922 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1923 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1924 return PORT_NONE;
1925
1926 return PORT_OTHER;
1927 }
1928
1929 static u32
1930 mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
1931 {
1932 u32 ptys_proto = 0;
1933 int i;
1934
1935 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1936 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1937 cmd->link_modes.advertising))
1938 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1939 }
1940 return ptys_proto;
1941 }
1942
1943 static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1944 {
1945 u32 ptys_proto = 0;
1946 int i;
1947
1948 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1949 if (speed == mlxsw_sp_port_link_mode[i].speed)
1950 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1951 }
1952 return ptys_proto;
1953 }
1954
1955 static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1956 {
1957 u32 ptys_proto = 0;
1958 int i;
1959
1960 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1961 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1962 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1963 }
1964 return ptys_proto;
1965 }
1966
1967 static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
1968 struct ethtool_link_ksettings *cmd)
1969 {
1970 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
1971 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1972 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
1973
1974 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
1975 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
1976 }
1977
1978 static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
1979 struct ethtool_link_ksettings *cmd)
1980 {
1981 if (!autoneg)
1982 return;
1983
1984 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1985 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
1986 }
1987
1988 static void
1989 mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
1990 struct ethtool_link_ksettings *cmd)
1991 {
1992 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
1993 return;
1994
1995 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
1996 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
1997 }
1998
1999 static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
2000 struct ethtool_link_ksettings *cmd)
2001 {
2002 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
2003 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2004 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2005 char ptys_pl[MLXSW_REG_PTYS_LEN];
2006 u8 autoneg_status;
2007 bool autoneg;
2008 int err;
2009
2010 autoneg = mlxsw_sp_port->link.autoneg;
2011 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2012 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2013 if (err)
2014 return err;
2015 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2016 &eth_proto_oper);
2017
2018 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2019
2020 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2021
2022 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2023 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2024 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2025
2026 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2027 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2028 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2029 cmd);
2030
2031 return 0;
2032 }
2033
2034 static int
2035 mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2036 const struct ethtool_link_ksettings *cmd)
2037 {
2038 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2039 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2040 char ptys_pl[MLXSW_REG_PTYS_LEN];
2041 u32 eth_proto_cap, eth_proto_new;
2042 bool autoneg;
2043 int err;
2044
2045 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2046 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2047 if (err)
2048 return err;
2049 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
2050
2051 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2052 eth_proto_new = autoneg ?
2053 mlxsw_sp_to_ptys_advert_link(cmd) :
2054 mlxsw_sp_to_ptys_speed(cmd->base.speed);
2055
2056 eth_proto_new = eth_proto_new & eth_proto_cap;
2057 if (!eth_proto_new) {
2058 netdev_err(dev, "No supported speed requested\n");
2059 return -EINVAL;
2060 }
2061
2062 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2063 eth_proto_new);
2064 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2065 if (err)
2066 return err;
2067
2068 if (!netif_running(dev))
2069 return 0;
2070
2071 mlxsw_sp_port->link.autoneg = autoneg;
2072
2073 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2074 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
2075
2076 return 0;
2077 }
2078
2079 static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2080 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2081 .get_link = ethtool_op_get_link,
2082 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2083 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
2084 .get_strings = mlxsw_sp_port_get_strings,
2085 .set_phys_id = mlxsw_sp_port_set_phys_id,
2086 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2087 .get_sset_count = mlxsw_sp_port_get_sset_count,
2088 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2089 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
2090 };
2091
2092 static int
2093 mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2094 {
2095 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2096 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2097 char ptys_pl[MLXSW_REG_PTYS_LEN];
2098 u32 eth_proto_admin;
2099
2100 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
2101 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2102 eth_proto_admin);
2103 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2104 }
2105
2106 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2107 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2108 bool dwrr, u8 dwrr_weight)
2109 {
2110 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2111 char qeec_pl[MLXSW_REG_QEEC_LEN];
2112
2113 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2114 next_index);
2115 mlxsw_reg_qeec_de_set(qeec_pl, true);
2116 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2117 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2118 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2119 }
2120
2121 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2122 enum mlxsw_reg_qeec_hr hr, u8 index,
2123 u8 next_index, u32 maxrate)
2124 {
2125 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2126 char qeec_pl[MLXSW_REG_QEEC_LEN];
2127
2128 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2129 next_index);
2130 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2131 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2132 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2133 }
2134
2135 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2136 u8 switch_prio, u8 tclass)
2137 {
2138 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2139 char qtct_pl[MLXSW_REG_QTCT_LEN];
2140
2141 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2142 tclass);
2143 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2144 }
2145
2146 static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2147 {
2148 int err, i;
2149
2150 /* Setup the elements hierarcy, so that each TC is linked to
2151 * one subgroup, which are all member in the same group.
2152 */
2153 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2154 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2155 0);
2156 if (err)
2157 return err;
2158 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2159 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2160 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2161 0, false, 0);
2162 if (err)
2163 return err;
2164 }
2165 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2166 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2167 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2168 false, 0);
2169 if (err)
2170 return err;
2171 }
2172
2173 /* Make sure the max shaper is disabled in all hierarcies that
2174 * support it.
2175 */
2176 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2177 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2178 MLXSW_REG_QEEC_MAS_DIS);
2179 if (err)
2180 return err;
2181 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2182 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2183 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2184 i, 0,
2185 MLXSW_REG_QEEC_MAS_DIS);
2186 if (err)
2187 return err;
2188 }
2189 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2190 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2191 MLXSW_REG_QEEC_HIERARCY_TC,
2192 i, i,
2193 MLXSW_REG_QEEC_MAS_DIS);
2194 if (err)
2195 return err;
2196 }
2197
2198 /* Map all priorities to traffic class 0. */
2199 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2200 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2201 if (err)
2202 return err;
2203 }
2204
2205 return 0;
2206 }
2207
2208 static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2209 {
2210 mlxsw_sp_port->pvid = 1;
2211
2212 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2213 }
2214
2215 static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2216 {
2217 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2218 }
2219
2220 static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2221 bool split, u8 module, u8 width, u8 lane)
2222 {
2223 struct mlxsw_sp_port *mlxsw_sp_port;
2224 struct net_device *dev;
2225 size_t bytes;
2226 int err;
2227
2228 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2229 if (!dev)
2230 return -ENOMEM;
2231 SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
2232 mlxsw_sp_port = netdev_priv(dev);
2233 mlxsw_sp_port->dev = dev;
2234 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2235 mlxsw_sp_port->local_port = local_port;
2236 mlxsw_sp_port->split = split;
2237 mlxsw_sp_port->mapping.module = module;
2238 mlxsw_sp_port->mapping.width = width;
2239 mlxsw_sp_port->mapping.lane = lane;
2240 mlxsw_sp_port->link.autoneg = 1;
2241 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2242 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2243 if (!mlxsw_sp_port->active_vlans) {
2244 err = -ENOMEM;
2245 goto err_port_active_vlans_alloc;
2246 }
2247 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2248 if (!mlxsw_sp_port->untagged_vlans) {
2249 err = -ENOMEM;
2250 goto err_port_untagged_vlans_alloc;
2251 }
2252 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
2253 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
2254
2255 mlxsw_sp_port->pcpu_stats =
2256 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2257 if (!mlxsw_sp_port->pcpu_stats) {
2258 err = -ENOMEM;
2259 goto err_alloc_stats;
2260 }
2261
2262 mlxsw_sp_port->hw_stats.cache =
2263 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2264
2265 if (!mlxsw_sp_port->hw_stats.cache) {
2266 err = -ENOMEM;
2267 goto err_alloc_hw_stats;
2268 }
2269 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2270 &update_stats_cache);
2271
2272 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2273 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2274
2275 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2276 if (err) {
2277 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2278 mlxsw_sp_port->local_port);
2279 goto err_port_swid_set;
2280 }
2281
2282 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2283 if (err) {
2284 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2285 mlxsw_sp_port->local_port);
2286 goto err_dev_addr_init;
2287 }
2288
2289 netif_carrier_off(dev);
2290
2291 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
2292 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2293 dev->hw_features |= NETIF_F_HW_TC;
2294
2295 dev->min_mtu = 0;
2296 dev->max_mtu = ETH_MAX_MTU;
2297
2298 /* Each packet needs to have a Tx header (metadata) on top all other
2299 * headers.
2300 */
2301 dev->needed_headroom = MLXSW_TXHDR_LEN;
2302
2303 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2304 if (err) {
2305 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2306 mlxsw_sp_port->local_port);
2307 goto err_port_system_port_mapping_set;
2308 }
2309
2310 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2311 if (err) {
2312 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2313 mlxsw_sp_port->local_port);
2314 goto err_port_speed_by_width_set;
2315 }
2316
2317 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2318 if (err) {
2319 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2320 mlxsw_sp_port->local_port);
2321 goto err_port_mtu_set;
2322 }
2323
2324 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2325 if (err)
2326 goto err_port_admin_status_set;
2327
2328 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2329 if (err) {
2330 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2331 mlxsw_sp_port->local_port);
2332 goto err_port_buffers_init;
2333 }
2334
2335 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2336 if (err) {
2337 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2338 mlxsw_sp_port->local_port);
2339 goto err_port_ets_init;
2340 }
2341
2342 /* ETS and buffers must be initialized before DCB. */
2343 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2344 if (err) {
2345 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2346 mlxsw_sp_port->local_port);
2347 goto err_port_dcb_init;
2348 }
2349
2350 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2351 if (err) {
2352 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2353 mlxsw_sp_port->local_port);
2354 goto err_port_pvid_vport_create;
2355 }
2356
2357 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
2358 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
2359 err = register_netdev(dev);
2360 if (err) {
2361 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2362 mlxsw_sp_port->local_port);
2363 goto err_register_netdev;
2364 }
2365
2366 mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2367 mlxsw_sp_port, dev, mlxsw_sp_port->split,
2368 module);
2369 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
2370 return 0;
2371
2372 err_register_netdev:
2373 mlxsw_sp->ports[local_port] = NULL;
2374 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
2375 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2376 err_port_pvid_vport_create:
2377 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
2378 err_port_dcb_init:
2379 err_port_ets_init:
2380 err_port_buffers_init:
2381 err_port_admin_status_set:
2382 err_port_mtu_set:
2383 err_port_speed_by_width_set:
2384 err_port_system_port_mapping_set:
2385 err_dev_addr_init:
2386 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2387 err_port_swid_set:
2388 kfree(mlxsw_sp_port->hw_stats.cache);
2389 err_alloc_hw_stats:
2390 free_percpu(mlxsw_sp_port->pcpu_stats);
2391 err_alloc_stats:
2392 kfree(mlxsw_sp_port->untagged_vlans);
2393 err_port_untagged_vlans_alloc:
2394 kfree(mlxsw_sp_port->active_vlans);
2395 err_port_active_vlans_alloc:
2396 free_netdev(dev);
2397 return err;
2398 }
2399
2400 static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2401 bool split, u8 module, u8 width, u8 lane)
2402 {
2403 int err;
2404
2405 err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2406 if (err) {
2407 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2408 local_port);
2409 return err;
2410 }
2411 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, split,
2412 module, width, lane);
2413 if (err)
2414 goto err_port_create;
2415 return 0;
2416
2417 err_port_create:
2418 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2419 return err;
2420 }
2421
2422 static void __mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2423 {
2424 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2425
2426 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
2427 mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
2428 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
2429 mlxsw_sp->ports[local_port] = NULL;
2430 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
2431 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2432 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
2433 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2434 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
2435 kfree(mlxsw_sp_port->hw_stats.cache);
2436 free_percpu(mlxsw_sp_port->pcpu_stats);
2437 kfree(mlxsw_sp_port->untagged_vlans);
2438 kfree(mlxsw_sp_port->active_vlans);
2439 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
2440 free_netdev(mlxsw_sp_port->dev);
2441 }
2442
2443 static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2444 {
2445 __mlxsw_sp_port_remove(mlxsw_sp, local_port);
2446 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2447 }
2448
2449 static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2450 {
2451 return mlxsw_sp->ports[local_port] != NULL;
2452 }
2453
2454 static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2455 {
2456 int i;
2457
2458 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2459 if (mlxsw_sp_port_created(mlxsw_sp, i))
2460 mlxsw_sp_port_remove(mlxsw_sp, i);
2461 kfree(mlxsw_sp->ports);
2462 }
2463
2464 static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2465 {
2466 u8 module, width, lane;
2467 size_t alloc_size;
2468 int i;
2469 int err;
2470
2471 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2472 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2473 if (!mlxsw_sp->ports)
2474 return -ENOMEM;
2475
2476 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
2477 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
2478 &width, &lane);
2479 if (err)
2480 goto err_port_module_info_get;
2481 if (!width)
2482 continue;
2483 mlxsw_sp->port_to_module[i] = module;
2484 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
2485 module, width, lane);
2486 if (err)
2487 goto err_port_create;
2488 }
2489 return 0;
2490
2491 err_port_create:
2492 err_port_module_info_get:
2493 for (i--; i >= 1; i--)
2494 if (mlxsw_sp_port_created(mlxsw_sp, i))
2495 mlxsw_sp_port_remove(mlxsw_sp, i);
2496 kfree(mlxsw_sp->ports);
2497 return err;
2498 }
2499
2500 static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2501 {
2502 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2503
2504 return local_port - offset;
2505 }
2506
2507 static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2508 u8 module, unsigned int count)
2509 {
2510 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2511 int err, i;
2512
2513 for (i = 0; i < count; i++) {
2514 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2515 width, i * width);
2516 if (err)
2517 goto err_port_module_map;
2518 }
2519
2520 for (i = 0; i < count; i++) {
2521 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2522 if (err)
2523 goto err_port_swid_set;
2524 }
2525
2526 for (i = 0; i < count; i++) {
2527 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
2528 module, width, i * width);
2529 if (err)
2530 goto err_port_create;
2531 }
2532
2533 return 0;
2534
2535 err_port_create:
2536 for (i--; i >= 0; i--)
2537 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2538 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2539 i = count;
2540 err_port_swid_set:
2541 for (i--; i >= 0; i--)
2542 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2543 MLXSW_PORT_SWID_DISABLED_PORT);
2544 i = count;
2545 err_port_module_map:
2546 for (i--; i >= 0; i--)
2547 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2548 return err;
2549 }
2550
2551 static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2552 u8 base_port, unsigned int count)
2553 {
2554 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2555 int i;
2556
2557 /* Split by four means we need to re-create two ports, otherwise
2558 * only one.
2559 */
2560 count = count / 2;
2561
2562 for (i = 0; i < count; i++) {
2563 local_port = base_port + i * 2;
2564 module = mlxsw_sp->port_to_module[local_port];
2565
2566 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2567 0);
2568 }
2569
2570 for (i = 0; i < count; i++)
2571 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2572
2573 for (i = 0; i < count; i++) {
2574 local_port = base_port + i * 2;
2575 module = mlxsw_sp->port_to_module[local_port];
2576
2577 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
2578 width, 0);
2579 }
2580 }
2581
2582 static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2583 unsigned int count)
2584 {
2585 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2586 struct mlxsw_sp_port *mlxsw_sp_port;
2587 u8 module, cur_width, base_port;
2588 int i;
2589 int err;
2590
2591 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2592 if (!mlxsw_sp_port) {
2593 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2594 local_port);
2595 return -EINVAL;
2596 }
2597
2598 module = mlxsw_sp_port->mapping.module;
2599 cur_width = mlxsw_sp_port->mapping.width;
2600
2601 if (count != 2 && count != 4) {
2602 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2603 return -EINVAL;
2604 }
2605
2606 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2607 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2608 return -EINVAL;
2609 }
2610
2611 /* Make sure we have enough slave (even) ports for the split. */
2612 if (count == 2) {
2613 base_port = local_port;
2614 if (mlxsw_sp->ports[base_port + 1]) {
2615 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2616 return -EINVAL;
2617 }
2618 } else {
2619 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2620 if (mlxsw_sp->ports[base_port + 1] ||
2621 mlxsw_sp->ports[base_port + 3]) {
2622 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2623 return -EINVAL;
2624 }
2625 }
2626
2627 for (i = 0; i < count; i++)
2628 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2629 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2630
2631 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2632 if (err) {
2633 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2634 goto err_port_split_create;
2635 }
2636
2637 return 0;
2638
2639 err_port_split_create:
2640 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
2641 return err;
2642 }
2643
2644 static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
2645 {
2646 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2647 struct mlxsw_sp_port *mlxsw_sp_port;
2648 u8 cur_width, base_port;
2649 unsigned int count;
2650 int i;
2651
2652 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2653 if (!mlxsw_sp_port) {
2654 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2655 local_port);
2656 return -EINVAL;
2657 }
2658
2659 if (!mlxsw_sp_port->split) {
2660 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2661 return -EINVAL;
2662 }
2663
2664 cur_width = mlxsw_sp_port->mapping.width;
2665 count = cur_width == 1 ? 4 : 2;
2666
2667 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2668
2669 /* Determine which ports to remove. */
2670 if (count == 2 && local_port >= base_port + 2)
2671 base_port = base_port + 2;
2672
2673 for (i = 0; i < count; i++)
2674 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2675 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2676
2677 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
2678
2679 return 0;
2680 }
2681
2682 static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2683 char *pude_pl, void *priv)
2684 {
2685 struct mlxsw_sp *mlxsw_sp = priv;
2686 struct mlxsw_sp_port *mlxsw_sp_port;
2687 enum mlxsw_reg_pude_oper_status status;
2688 u8 local_port;
2689
2690 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2691 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2692 if (!mlxsw_sp_port)
2693 return;
2694
2695 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2696 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2697 netdev_info(mlxsw_sp_port->dev, "link up\n");
2698 netif_carrier_on(mlxsw_sp_port->dev);
2699 } else {
2700 netdev_info(mlxsw_sp_port->dev, "link down\n");
2701 netif_carrier_off(mlxsw_sp_port->dev);
2702 }
2703 }
2704
2705 static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
2706 u8 local_port, void *priv)
2707 {
2708 struct mlxsw_sp *mlxsw_sp = priv;
2709 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2710 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2711
2712 if (unlikely(!mlxsw_sp_port)) {
2713 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2714 local_port);
2715 return;
2716 }
2717
2718 skb->dev = mlxsw_sp_port->dev;
2719
2720 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2721 u64_stats_update_begin(&pcpu_stats->syncp);
2722 pcpu_stats->rx_packets++;
2723 pcpu_stats->rx_bytes += skb->len;
2724 u64_stats_update_end(&pcpu_stats->syncp);
2725
2726 skb->protocol = eth_type_trans(skb, skb->dev);
2727 netif_receive_skb(skb);
2728 }
2729
2730 static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2731 void *priv)
2732 {
2733 skb->offload_fwd_mark = 1;
2734 return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
2735 }
2736
2737 #define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
2738 MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \
2739 _is_ctrl, SP_##_trap_group, DISCARD)
2740
2741 #define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
2742 MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \
2743 _is_ctrl, SP_##_trap_group, DISCARD)
2744
2745 #define MLXSW_SP_EVENTL(_func, _trap_id) \
2746 MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
2747
2748 static const struct mlxsw_listener mlxsw_sp_listener[] = {
2749 /* Events */
2750 MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
2751 /* L2 traps */
2752 MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
2753 MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
2754 MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
2755 MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
2756 MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
2757 MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
2758 MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
2759 MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
2760 MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
2761 MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
2762 MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
2763 /* L3 traps */
2764 MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2765 MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2766 MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2767 MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, OSPF, false),
2768 MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
2769 MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
2770 MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),
2771 MLXSW_SP_RXL_NO_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),
2772 };
2773
2774 static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
2775 {
2776 char qpcr_pl[MLXSW_REG_QPCR_LEN];
2777 enum mlxsw_reg_qpcr_ir_units ir_units;
2778 int max_cpu_policers;
2779 bool is_bytes;
2780 u8 burst_size;
2781 u32 rate;
2782 int i, err;
2783
2784 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS))
2785 return -EIO;
2786
2787 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
2788
2789 ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
2790 for (i = 0; i < max_cpu_policers; i++) {
2791 is_bytes = false;
2792 switch (i) {
2793 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2794 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2795 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2796 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2797 rate = 128;
2798 burst_size = 7;
2799 break;
2800 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2801 rate = 16 * 1024;
2802 burst_size = 10;
2803 break;
2804 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2805 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2806 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2807 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2808 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2809 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2810 rate = 1024;
2811 burst_size = 7;
2812 break;
2813 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2814 is_bytes = true;
2815 rate = 4 * 1024;
2816 burst_size = 4;
2817 break;
2818 default:
2819 continue;
2820 }
2821
2822 mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
2823 burst_size);
2824 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
2825 if (err)
2826 return err;
2827 }
2828
2829 return 0;
2830 }
2831
2832 static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
2833 {
2834 char htgt_pl[MLXSW_REG_HTGT_LEN];
2835 enum mlxsw_reg_htgt_trap_group i;
2836 int max_cpu_policers;
2837 int max_trap_groups;
2838 u8 priority, tc;
2839 u16 policer_id;
2840 int err;
2841
2842 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
2843 return -EIO;
2844
2845 max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
2846 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
2847
2848 for (i = 0; i < max_trap_groups; i++) {
2849 policer_id = i;
2850 switch (i) {
2851 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2852 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2853 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2854 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2855 priority = 5;
2856 tc = 5;
2857 break;
2858 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2859 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2860 priority = 4;
2861 tc = 4;
2862 break;
2863 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2864 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2865 priority = 3;
2866 tc = 3;
2867 break;
2868 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2869 priority = 2;
2870 tc = 2;
2871 break;
2872 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2873 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2874 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2875 priority = 1;
2876 tc = 1;
2877 break;
2878 case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
2879 priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
2880 tc = MLXSW_REG_HTGT_DEFAULT_TC;
2881 policer_id = MLXSW_REG_HTGT_INVALID_POLICER;
2882 break;
2883 default:
2884 continue;
2885 }
2886
2887 if (max_cpu_policers <= policer_id &&
2888 policer_id != MLXSW_REG_HTGT_INVALID_POLICER)
2889 return -EIO;
2890
2891 mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc);
2892 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
2893 if (err)
2894 return err;
2895 }
2896
2897 return 0;
2898 }
2899
2900 static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2901 {
2902 int i;
2903 int err;
2904
2905 err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
2906 if (err)
2907 return err;
2908
2909 err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
2910 if (err)
2911 return err;
2912
2913 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
2914 err = mlxsw_core_trap_register(mlxsw_sp->core,
2915 &mlxsw_sp_listener[i],
2916 mlxsw_sp);
2917 if (err)
2918 goto err_listener_register;
2919
2920 }
2921 return 0;
2922
2923 err_listener_register:
2924 for (i--; i >= 0; i--) {
2925 mlxsw_core_trap_unregister(mlxsw_sp->core,
2926 &mlxsw_sp_listener[i],
2927 mlxsw_sp);
2928 }
2929 return err;
2930 }
2931
2932 static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2933 {
2934 int i;
2935
2936 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
2937 mlxsw_core_trap_unregister(mlxsw_sp->core,
2938 &mlxsw_sp_listener[i],
2939 mlxsw_sp);
2940 }
2941 }
2942
2943 static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2944 enum mlxsw_reg_sfgc_type type,
2945 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2946 {
2947 enum mlxsw_flood_table_type table_type;
2948 enum mlxsw_sp_flood_table flood_table;
2949 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2950
2951 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
2952 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
2953 else
2954 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
2955
2956 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2957 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2958 else
2959 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
2960
2961 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2962 flood_table);
2963 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2964 }
2965
2966 static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2967 {
2968 int type, err;
2969
2970 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2971 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2972 continue;
2973
2974 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2975 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2976 if (err)
2977 return err;
2978
2979 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2980 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2981 if (err)
2982 return err;
2983 }
2984
2985 return 0;
2986 }
2987
2988 static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2989 {
2990 char slcr_pl[MLXSW_REG_SLCR_LEN];
2991 int err;
2992
2993 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2994 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2995 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2996 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2997 MLXSW_REG_SLCR_LAG_HASH_SIP |
2998 MLXSW_REG_SLCR_LAG_HASH_DIP |
2999 MLXSW_REG_SLCR_LAG_HASH_SPORT |
3000 MLXSW_REG_SLCR_LAG_HASH_DPORT |
3001 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
3002 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
3003 if (err)
3004 return err;
3005
3006 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
3007 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
3008 return -EIO;
3009
3010 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
3011 sizeof(struct mlxsw_sp_upper),
3012 GFP_KERNEL);
3013 if (!mlxsw_sp->lags)
3014 return -ENOMEM;
3015
3016 return 0;
3017 }
3018
3019 static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
3020 {
3021 kfree(mlxsw_sp->lags);
3022 }
3023
3024 static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
3025 {
3026 char htgt_pl[MLXSW_REG_HTGT_LEN];
3027
3028 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
3029 MLXSW_REG_HTGT_INVALID_POLICER,
3030 MLXSW_REG_HTGT_DEFAULT_PRIORITY,
3031 MLXSW_REG_HTGT_DEFAULT_TC);
3032 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3033 }
3034
3035 static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
3036 const struct mlxsw_bus_info *mlxsw_bus_info)
3037 {
3038 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3039 int err;
3040
3041 mlxsw_sp->core = mlxsw_core;
3042 mlxsw_sp->bus_info = mlxsw_bus_info;
3043 INIT_LIST_HEAD(&mlxsw_sp->fids);
3044 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
3045 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
3046
3047 err = mlxsw_sp_base_mac_get(mlxsw_sp);
3048 if (err) {
3049 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
3050 return err;
3051 }
3052
3053 err = mlxsw_sp_traps_init(mlxsw_sp);
3054 if (err) {
3055 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
3056 return err;
3057 }
3058
3059 err = mlxsw_sp_flood_init(mlxsw_sp);
3060 if (err) {
3061 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
3062 goto err_flood_init;
3063 }
3064
3065 err = mlxsw_sp_buffers_init(mlxsw_sp);
3066 if (err) {
3067 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
3068 goto err_buffers_init;
3069 }
3070
3071 err = mlxsw_sp_lag_init(mlxsw_sp);
3072 if (err) {
3073 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3074 goto err_lag_init;
3075 }
3076
3077 err = mlxsw_sp_switchdev_init(mlxsw_sp);
3078 if (err) {
3079 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3080 goto err_switchdev_init;
3081 }
3082
3083 err = mlxsw_sp_router_init(mlxsw_sp);
3084 if (err) {
3085 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3086 goto err_router_init;
3087 }
3088
3089 err = mlxsw_sp_span_init(mlxsw_sp);
3090 if (err) {
3091 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3092 goto err_span_init;
3093 }
3094
3095 err = mlxsw_sp_ports_create(mlxsw_sp);
3096 if (err) {
3097 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3098 goto err_ports_create;
3099 }
3100
3101 return 0;
3102
3103 err_ports_create:
3104 mlxsw_sp_span_fini(mlxsw_sp);
3105 err_span_init:
3106 mlxsw_sp_router_fini(mlxsw_sp);
3107 err_router_init:
3108 mlxsw_sp_switchdev_fini(mlxsw_sp);
3109 err_switchdev_init:
3110 mlxsw_sp_lag_fini(mlxsw_sp);
3111 err_lag_init:
3112 mlxsw_sp_buffers_fini(mlxsw_sp);
3113 err_buffers_init:
3114 err_flood_init:
3115 mlxsw_sp_traps_fini(mlxsw_sp);
3116 return err;
3117 }
3118
3119 static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
3120 {
3121 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3122
3123 mlxsw_sp_ports_remove(mlxsw_sp);
3124 mlxsw_sp_span_fini(mlxsw_sp);
3125 mlxsw_sp_router_fini(mlxsw_sp);
3126 mlxsw_sp_switchdev_fini(mlxsw_sp);
3127 mlxsw_sp_lag_fini(mlxsw_sp);
3128 mlxsw_sp_buffers_fini(mlxsw_sp);
3129 mlxsw_sp_traps_fini(mlxsw_sp);
3130 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
3131 WARN_ON(!list_empty(&mlxsw_sp->fids));
3132 }
3133
3134 static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3135 .used_max_vepa_channels = 1,
3136 .max_vepa_channels = 0,
3137 .used_max_mid = 1,
3138 .max_mid = MLXSW_SP_MID_MAX,
3139 .used_max_pgt = 1,
3140 .max_pgt = 0,
3141 .used_flood_tables = 1,
3142 .used_flood_mode = 1,
3143 .flood_mode = 3,
3144 .max_fid_offset_flood_tables = 2,
3145 .fid_offset_flood_table_size = VLAN_N_VID - 1,
3146 .max_fid_flood_tables = 2,
3147 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
3148 .used_max_ib_mc = 1,
3149 .max_ib_mc = 0,
3150 .used_max_pkey = 1,
3151 .max_pkey = 0,
3152 .used_kvd_split_data = 1,
3153 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3154 .kvd_hash_single_parts = 2,
3155 .kvd_hash_double_parts = 1,
3156 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
3157 .swid_config = {
3158 {
3159 .used_type = 1,
3160 .type = MLXSW_PORT_SWID_TYPE_ETH,
3161 }
3162 },
3163 .resource_query_enable = 1,
3164 };
3165
3166 static struct mlxsw_driver mlxsw_sp_driver = {
3167 .kind = mlxsw_sp_driver_name,
3168 .priv_size = sizeof(struct mlxsw_sp),
3169 .init = mlxsw_sp_init,
3170 .fini = mlxsw_sp_fini,
3171 .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
3172 .port_split = mlxsw_sp_port_split,
3173 .port_unsplit = mlxsw_sp_port_unsplit,
3174 .sb_pool_get = mlxsw_sp_sb_pool_get,
3175 .sb_pool_set = mlxsw_sp_sb_pool_set,
3176 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3177 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3178 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3179 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3180 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3181 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3182 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3183 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3184 .txhdr_construct = mlxsw_sp_txhdr_construct,
3185 .txhdr_len = MLXSW_TXHDR_LEN,
3186 .profile = &mlxsw_sp_config_profile,
3187 };
3188
3189 static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3190 {
3191 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3192 }
3193
3194 static int mlxsw_lower_dev_walk(struct net_device *lower_dev, void *data)
3195 {
3196 struct mlxsw_sp_port **port = data;
3197 int ret = 0;
3198
3199 if (mlxsw_sp_port_dev_check(lower_dev)) {
3200 *port = netdev_priv(lower_dev);
3201 ret = 1;
3202 }
3203
3204 return ret;
3205 }
3206
3207 static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3208 {
3209 struct mlxsw_sp_port *port;
3210
3211 if (mlxsw_sp_port_dev_check(dev))
3212 return netdev_priv(dev);
3213
3214 port = NULL;
3215 netdev_walk_all_lower_dev(dev, mlxsw_lower_dev_walk, &port);
3216
3217 return port;
3218 }
3219
3220 static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3221 {
3222 struct mlxsw_sp_port *mlxsw_sp_port;
3223
3224 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3225 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3226 }
3227
3228 static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3229 {
3230 struct mlxsw_sp_port *port;
3231
3232 if (mlxsw_sp_port_dev_check(dev))
3233 return netdev_priv(dev);
3234
3235 port = NULL;
3236 netdev_walk_all_lower_dev_rcu(dev, mlxsw_lower_dev_walk, &port);
3237
3238 return port;
3239 }
3240
3241 struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3242 {
3243 struct mlxsw_sp_port *mlxsw_sp_port;
3244
3245 rcu_read_lock();
3246 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3247 if (mlxsw_sp_port)
3248 dev_hold(mlxsw_sp_port->dev);
3249 rcu_read_unlock();
3250 return mlxsw_sp_port;
3251 }
3252
3253 void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3254 {
3255 dev_put(mlxsw_sp_port->dev);
3256 }
3257
3258 static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3259 unsigned long event)
3260 {
3261 switch (event) {
3262 case NETDEV_UP:
3263 if (!r)
3264 return true;
3265 r->ref_count++;
3266 return false;
3267 case NETDEV_DOWN:
3268 if (r && --r->ref_count == 0)
3269 return true;
3270 /* It is possible we already removed the RIF ourselves
3271 * if it was assigned to a netdev that is now a bridge
3272 * or LAG slave.
3273 */
3274 return false;
3275 }
3276
3277 return false;
3278 }
3279
3280 static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3281 {
3282 int i;
3283
3284 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
3285 if (!mlxsw_sp->rifs[i])
3286 return i;
3287
3288 return MLXSW_SP_INVALID_RIF;
3289 }
3290
3291 static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3292 bool *p_lagged, u16 *p_system_port)
3293 {
3294 u8 local_port = mlxsw_sp_vport->local_port;
3295
3296 *p_lagged = mlxsw_sp_vport->lagged;
3297 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3298 }
3299
3300 static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3301 struct net_device *l3_dev, u16 rif,
3302 bool create)
3303 {
3304 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3305 bool lagged = mlxsw_sp_vport->lagged;
3306 char ritr_pl[MLXSW_REG_RITR_LEN];
3307 u16 system_port;
3308
3309 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3310 l3_dev->mtu, l3_dev->dev_addr);
3311
3312 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3313 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3314 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3315
3316 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3317 }
3318
3319 static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3320
3321 static struct mlxsw_sp_fid *
3322 mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3323 {
3324 struct mlxsw_sp_fid *f;
3325
3326 f = kzalloc(sizeof(*f), GFP_KERNEL);
3327 if (!f)
3328 return NULL;
3329
3330 f->leave = mlxsw_sp_vport_rif_sp_leave;
3331 f->ref_count = 0;
3332 f->dev = l3_dev;
3333 f->fid = fid;
3334
3335 return f;
3336 }
3337
3338 static struct mlxsw_sp_rif *
3339 mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3340 {
3341 struct mlxsw_sp_rif *r;
3342
3343 r = kzalloc(sizeof(*r), GFP_KERNEL);
3344 if (!r)
3345 return NULL;
3346
3347 ether_addr_copy(r->addr, l3_dev->dev_addr);
3348 r->mtu = l3_dev->mtu;
3349 r->ref_count = 1;
3350 r->dev = l3_dev;
3351 r->rif = rif;
3352 r->f = f;
3353
3354 return r;
3355 }
3356
3357 static struct mlxsw_sp_rif *
3358 mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3359 struct net_device *l3_dev)
3360 {
3361 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3362 struct mlxsw_sp_fid *f;
3363 struct mlxsw_sp_rif *r;
3364 u16 fid, rif;
3365 int err;
3366
3367 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3368 if (rif == MLXSW_SP_INVALID_RIF)
3369 return ERR_PTR(-ERANGE);
3370
3371 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3372 if (err)
3373 return ERR_PTR(err);
3374
3375 fid = mlxsw_sp_rif_sp_to_fid(rif);
3376 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3377 if (err)
3378 goto err_rif_fdb_op;
3379
3380 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3381 if (!f) {
3382 err = -ENOMEM;
3383 goto err_rfid_alloc;
3384 }
3385
3386 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3387 if (!r) {
3388 err = -ENOMEM;
3389 goto err_rif_alloc;
3390 }
3391
3392 f->r = r;
3393 mlxsw_sp->rifs[rif] = r;
3394
3395 return r;
3396
3397 err_rif_alloc:
3398 kfree(f);
3399 err_rfid_alloc:
3400 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3401 err_rif_fdb_op:
3402 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3403 return ERR_PTR(err);
3404 }
3405
3406 static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3407 struct mlxsw_sp_rif *r)
3408 {
3409 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3410 struct net_device *l3_dev = r->dev;
3411 struct mlxsw_sp_fid *f = r->f;
3412 u16 fid = f->fid;
3413 u16 rif = r->rif;
3414
3415 mlxsw_sp->rifs[rif] = NULL;
3416 f->r = NULL;
3417
3418 kfree(r);
3419
3420 kfree(f);
3421
3422 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3423
3424 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3425 }
3426
3427 static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3428 struct net_device *l3_dev)
3429 {
3430 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3431 struct mlxsw_sp_rif *r;
3432
3433 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3434 if (!r) {
3435 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3436 if (IS_ERR(r))
3437 return PTR_ERR(r);
3438 }
3439
3440 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3441 r->f->ref_count++;
3442
3443 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3444
3445 return 0;
3446 }
3447
3448 static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3449 {
3450 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3451
3452 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3453
3454 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3455 if (--f->ref_count == 0)
3456 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3457 }
3458
3459 static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3460 struct net_device *port_dev,
3461 unsigned long event, u16 vid)
3462 {
3463 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3464 struct mlxsw_sp_port *mlxsw_sp_vport;
3465
3466 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3467 if (WARN_ON(!mlxsw_sp_vport))
3468 return -EINVAL;
3469
3470 switch (event) {
3471 case NETDEV_UP:
3472 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3473 case NETDEV_DOWN:
3474 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3475 break;
3476 }
3477
3478 return 0;
3479 }
3480
3481 static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3482 unsigned long event)
3483 {
3484 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3485 return 0;
3486
3487 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3488 }
3489
3490 static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3491 struct net_device *lag_dev,
3492 unsigned long event, u16 vid)
3493 {
3494 struct net_device *port_dev;
3495 struct list_head *iter;
3496 int err;
3497
3498 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3499 if (mlxsw_sp_port_dev_check(port_dev)) {
3500 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3501 event, vid);
3502 if (err)
3503 return err;
3504 }
3505 }
3506
3507 return 0;
3508 }
3509
3510 static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3511 unsigned long event)
3512 {
3513 if (netif_is_bridge_port(lag_dev))
3514 return 0;
3515
3516 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3517 }
3518
3519 static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3520 struct net_device *l3_dev)
3521 {
3522 u16 fid;
3523
3524 if (is_vlan_dev(l3_dev))
3525 fid = vlan_dev_vlan_id(l3_dev);
3526 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3527 fid = 1;
3528 else
3529 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3530
3531 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3532 }
3533
3534 static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3535 {
3536 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3537 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3538 }
3539
3540 static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3541 {
3542 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3543 }
3544
3545 static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3546 bool set)
3547 {
3548 enum mlxsw_flood_table_type table_type;
3549 char *sftr_pl;
3550 u16 index;
3551 int err;
3552
3553 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3554 if (!sftr_pl)
3555 return -ENOMEM;
3556
3557 table_type = mlxsw_sp_flood_table_type_get(fid);
3558 index = mlxsw_sp_flood_table_index_get(fid);
3559 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3560 1, MLXSW_PORT_ROUTER_PORT, set);
3561 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3562
3563 kfree(sftr_pl);
3564 return err;
3565 }
3566
3567 static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3568 {
3569 if (mlxsw_sp_fid_is_vfid(fid))
3570 return MLXSW_REG_RITR_FID_IF;
3571 else
3572 return MLXSW_REG_RITR_VLAN_IF;
3573 }
3574
3575 static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3576 struct net_device *l3_dev,
3577 u16 fid, u16 rif,
3578 bool create)
3579 {
3580 enum mlxsw_reg_ritr_if_type rif_type;
3581 char ritr_pl[MLXSW_REG_RITR_LEN];
3582
3583 rif_type = mlxsw_sp_rif_type_get(fid);
3584 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3585 l3_dev->dev_addr);
3586 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3587
3588 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3589 }
3590
3591 static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3592 struct net_device *l3_dev,
3593 struct mlxsw_sp_fid *f)
3594 {
3595 struct mlxsw_sp_rif *r;
3596 u16 rif;
3597 int err;
3598
3599 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3600 if (rif == MLXSW_SP_INVALID_RIF)
3601 return -ERANGE;
3602
3603 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
3604 if (err)
3605 return err;
3606
3607 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3608 if (err)
3609 goto err_rif_bridge_op;
3610
3611 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3612 if (err)
3613 goto err_rif_fdb_op;
3614
3615 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3616 if (!r) {
3617 err = -ENOMEM;
3618 goto err_rif_alloc;
3619 }
3620
3621 f->r = r;
3622 mlxsw_sp->rifs[rif] = r;
3623
3624 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3625
3626 return 0;
3627
3628 err_rif_alloc:
3629 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3630 err_rif_fdb_op:
3631 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3632 err_rif_bridge_op:
3633 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3634 return err;
3635 }
3636
3637 void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3638 struct mlxsw_sp_rif *r)
3639 {
3640 struct net_device *l3_dev = r->dev;
3641 struct mlxsw_sp_fid *f = r->f;
3642 u16 rif = r->rif;
3643
3644 mlxsw_sp->rifs[rif] = NULL;
3645 f->r = NULL;
3646
3647 kfree(r);
3648
3649 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3650
3651 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3652
3653 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3654
3655 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3656 }
3657
3658 static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3659 struct net_device *br_dev,
3660 unsigned long event)
3661 {
3662 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3663 struct mlxsw_sp_fid *f;
3664
3665 /* FID can either be an actual FID if the L3 device is the
3666 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3667 * L3 device is a VLAN-unaware bridge and we get a vFID.
3668 */
3669 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3670 if (WARN_ON(!f))
3671 return -EINVAL;
3672
3673 switch (event) {
3674 case NETDEV_UP:
3675 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3676 case NETDEV_DOWN:
3677 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3678 break;
3679 }
3680
3681 return 0;
3682 }
3683
3684 static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3685 unsigned long event)
3686 {
3687 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
3688 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
3689 u16 vid = vlan_dev_vlan_id(vlan_dev);
3690
3691 if (mlxsw_sp_port_dev_check(real_dev))
3692 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3693 vid);
3694 else if (netif_is_lag_master(real_dev))
3695 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3696 vid);
3697 else if (netif_is_bridge_master(real_dev) &&
3698 mlxsw_sp->master_bridge.dev == real_dev)
3699 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3700 event);
3701
3702 return 0;
3703 }
3704
3705 static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3706 unsigned long event, void *ptr)
3707 {
3708 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3709 struct net_device *dev = ifa->ifa_dev->dev;
3710 struct mlxsw_sp *mlxsw_sp;
3711 struct mlxsw_sp_rif *r;
3712 int err = 0;
3713
3714 mlxsw_sp = mlxsw_sp_lower_get(dev);
3715 if (!mlxsw_sp)
3716 goto out;
3717
3718 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3719 if (!mlxsw_sp_rif_should_config(r, event))
3720 goto out;
3721
3722 if (mlxsw_sp_port_dev_check(dev))
3723 err = mlxsw_sp_inetaddr_port_event(dev, event);
3724 else if (netif_is_lag_master(dev))
3725 err = mlxsw_sp_inetaddr_lag_event(dev, event);
3726 else if (netif_is_bridge_master(dev))
3727 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
3728 else if (is_vlan_dev(dev))
3729 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3730
3731 out:
3732 return notifier_from_errno(err);
3733 }
3734
3735 static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3736 const char *mac, int mtu)
3737 {
3738 char ritr_pl[MLXSW_REG_RITR_LEN];
3739 int err;
3740
3741 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3742 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3743 if (err)
3744 return err;
3745
3746 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3747 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3748 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3749 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3750 }
3751
3752 static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3753 {
3754 struct mlxsw_sp *mlxsw_sp;
3755 struct mlxsw_sp_rif *r;
3756 int err;
3757
3758 mlxsw_sp = mlxsw_sp_lower_get(dev);
3759 if (!mlxsw_sp)
3760 return 0;
3761
3762 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3763 if (!r)
3764 return 0;
3765
3766 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3767 if (err)
3768 return err;
3769
3770 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3771 if (err)
3772 goto err_rif_edit;
3773
3774 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3775 if (err)
3776 goto err_rif_fdb_op;
3777
3778 ether_addr_copy(r->addr, dev->dev_addr);
3779 r->mtu = dev->mtu;
3780
3781 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3782
3783 return 0;
3784
3785 err_rif_fdb_op:
3786 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3787 err_rif_edit:
3788 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3789 return err;
3790 }
3791
3792 static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3793 u16 fid)
3794 {
3795 if (mlxsw_sp_fid_is_vfid(fid))
3796 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3797 else
3798 return test_bit(fid, lag_port->active_vlans);
3799 }
3800
3801 static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3802 u16 fid)
3803 {
3804 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3805 u8 local_port = mlxsw_sp_port->local_port;
3806 u16 lag_id = mlxsw_sp_port->lag_id;
3807 u64 max_lag_members;
3808 int i, count = 0;
3809
3810 if (!mlxsw_sp_port->lagged)
3811 return true;
3812
3813 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3814 MAX_LAG_MEMBERS);
3815 for (i = 0; i < max_lag_members; i++) {
3816 struct mlxsw_sp_port *lag_port;
3817
3818 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3819 if (!lag_port || lag_port->local_port == local_port)
3820 continue;
3821 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3822 count++;
3823 }
3824
3825 return !count;
3826 }
3827
3828 static int
3829 mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3830 u16 fid)
3831 {
3832 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3833 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3834
3835 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3836 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3837 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3838 mlxsw_sp_port->local_port);
3839
3840 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3841 mlxsw_sp_port->local_port, fid);
3842
3843 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3844 }
3845
3846 static int
3847 mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3848 u16 fid)
3849 {
3850 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3851 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3852
3853 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3854 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3855 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3856
3857 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3858 mlxsw_sp_port->lag_id, fid);
3859
3860 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3861 }
3862
3863 int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
3864 {
3865 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3866 return 0;
3867
3868 if (mlxsw_sp_port->lagged)
3869 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
3870 fid);
3871 else
3872 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
3873 }
3874
3875 static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3876 {
3877 struct mlxsw_sp_fid *f, *tmp;
3878
3879 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3880 if (--f->ref_count == 0)
3881 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3882 else
3883 WARN_ON_ONCE(1);
3884 }
3885
3886 static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3887 struct net_device *br_dev)
3888 {
3889 return !mlxsw_sp->master_bridge.dev ||
3890 mlxsw_sp->master_bridge.dev == br_dev;
3891 }
3892
3893 static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3894 struct net_device *br_dev)
3895 {
3896 mlxsw_sp->master_bridge.dev = br_dev;
3897 mlxsw_sp->master_bridge.ref_count++;
3898 }
3899
3900 static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3901 {
3902 if (--mlxsw_sp->master_bridge.ref_count == 0) {
3903 mlxsw_sp->master_bridge.dev = NULL;
3904 /* It's possible upper VLAN devices are still holding
3905 * references to underlying FIDs. Drop the reference
3906 * and release the resources if it was the last one.
3907 * If it wasn't, then something bad happened.
3908 */
3909 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3910 }
3911 }
3912
3913 static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3914 struct net_device *br_dev)
3915 {
3916 struct net_device *dev = mlxsw_sp_port->dev;
3917 int err;
3918
3919 /* When port is not bridged untagged packets are tagged with
3920 * PVID=VID=1, thereby creating an implicit VLAN interface in
3921 * the device. Remove it and let bridge code take care of its
3922 * own VLANs.
3923 */
3924 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
3925 if (err)
3926 return err;
3927
3928 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3929
3930 mlxsw_sp_port->learning = 1;
3931 mlxsw_sp_port->learning_sync = 1;
3932 mlxsw_sp_port->uc_flood = 1;
3933 mlxsw_sp_port->bridged = 1;
3934
3935 return 0;
3936 }
3937
3938 static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3939 {
3940 struct net_device *dev = mlxsw_sp_port->dev;
3941
3942 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3943
3944 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3945
3946 mlxsw_sp_port->learning = 0;
3947 mlxsw_sp_port->learning_sync = 0;
3948 mlxsw_sp_port->uc_flood = 0;
3949 mlxsw_sp_port->bridged = 0;
3950
3951 /* Add implicit VLAN interface in the device, so that untagged
3952 * packets will be classified to the default vFID.
3953 */
3954 mlxsw_sp_port_add_vid(dev, 0, 1);
3955 }
3956
3957 static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3958 {
3959 char sldr_pl[MLXSW_REG_SLDR_LEN];
3960
3961 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3962 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3963 }
3964
3965 static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3966 {
3967 char sldr_pl[MLXSW_REG_SLDR_LEN];
3968
3969 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3970 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3971 }
3972
3973 static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3974 u16 lag_id, u8 port_index)
3975 {
3976 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3977 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3978
3979 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3980 lag_id, port_index);
3981 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3982 }
3983
3984 static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3985 u16 lag_id)
3986 {
3987 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3988 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3989
3990 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3991 lag_id);
3992 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3993 }
3994
3995 static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3996 u16 lag_id)
3997 {
3998 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3999 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4000
4001 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
4002 lag_id);
4003 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4004 }
4005
4006 static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
4007 u16 lag_id)
4008 {
4009 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4010 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4011
4012 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
4013 lag_id);
4014 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4015 }
4016
4017 static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4018 struct net_device *lag_dev,
4019 u16 *p_lag_id)
4020 {
4021 struct mlxsw_sp_upper *lag;
4022 int free_lag_id = -1;
4023 u64 max_lag;
4024 int i;
4025
4026 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
4027 for (i = 0; i < max_lag; i++) {
4028 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
4029 if (lag->ref_count) {
4030 if (lag->dev == lag_dev) {
4031 *p_lag_id = i;
4032 return 0;
4033 }
4034 } else if (free_lag_id < 0) {
4035 free_lag_id = i;
4036 }
4037 }
4038 if (free_lag_id < 0)
4039 return -EBUSY;
4040 *p_lag_id = free_lag_id;
4041 return 0;
4042 }
4043
4044 static bool
4045 mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
4046 struct net_device *lag_dev,
4047 struct netdev_lag_upper_info *lag_upper_info)
4048 {
4049 u16 lag_id;
4050
4051 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
4052 return false;
4053 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
4054 return false;
4055 return true;
4056 }
4057
4058 static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4059 u16 lag_id, u8 *p_port_index)
4060 {
4061 u64 max_lag_members;
4062 int i;
4063
4064 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
4065 MAX_LAG_MEMBERS);
4066 for (i = 0; i < max_lag_members; i++) {
4067 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
4068 *p_port_index = i;
4069 return 0;
4070 }
4071 }
4072 return -EBUSY;
4073 }
4074
4075 static void
4076 mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4077 u16 lag_id)
4078 {
4079 struct mlxsw_sp_port *mlxsw_sp_vport;
4080 struct mlxsw_sp_fid *f;
4081
4082 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4083 if (WARN_ON(!mlxsw_sp_vport))
4084 return;
4085
4086 /* If vPort is assigned a RIF, then leave it since it's no
4087 * longer valid.
4088 */
4089 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4090 if (f)
4091 f->leave(mlxsw_sp_vport);
4092
4093 mlxsw_sp_vport->lag_id = lag_id;
4094 mlxsw_sp_vport->lagged = 1;
4095 }
4096
4097 static void
4098 mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4099 {
4100 struct mlxsw_sp_port *mlxsw_sp_vport;
4101 struct mlxsw_sp_fid *f;
4102
4103 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4104 if (WARN_ON(!mlxsw_sp_vport))
4105 return;
4106
4107 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4108 if (f)
4109 f->leave(mlxsw_sp_vport);
4110
4111 mlxsw_sp_vport->lagged = 0;
4112 }
4113
4114 static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4115 struct net_device *lag_dev)
4116 {
4117 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4118 struct mlxsw_sp_upper *lag;
4119 u16 lag_id;
4120 u8 port_index;
4121 int err;
4122
4123 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4124 if (err)
4125 return err;
4126 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4127 if (!lag->ref_count) {
4128 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4129 if (err)
4130 return err;
4131 lag->dev = lag_dev;
4132 }
4133
4134 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4135 if (err)
4136 return err;
4137 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4138 if (err)
4139 goto err_col_port_add;
4140 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4141 if (err)
4142 goto err_col_port_enable;
4143
4144 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4145 mlxsw_sp_port->local_port);
4146 mlxsw_sp_port->lag_id = lag_id;
4147 mlxsw_sp_port->lagged = 1;
4148 lag->ref_count++;
4149
4150 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4151
4152 return 0;
4153
4154 err_col_port_enable:
4155 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
4156 err_col_port_add:
4157 if (!lag->ref_count)
4158 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
4159 return err;
4160 }
4161
4162 static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4163 struct net_device *lag_dev)
4164 {
4165 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4166 u16 lag_id = mlxsw_sp_port->lag_id;
4167 struct mlxsw_sp_upper *lag;
4168
4169 if (!mlxsw_sp_port->lagged)
4170 return;
4171 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4172 WARN_ON(lag->ref_count == 0);
4173
4174 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4175 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
4176
4177 if (mlxsw_sp_port->bridged) {
4178 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
4179 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
4180 }
4181
4182 if (lag->ref_count == 1)
4183 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
4184
4185 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4186 mlxsw_sp_port->local_port);
4187 mlxsw_sp_port->lagged = 0;
4188 lag->ref_count--;
4189
4190 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
4191 }
4192
4193 static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4194 u16 lag_id)
4195 {
4196 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4197 char sldr_pl[MLXSW_REG_SLDR_LEN];
4198
4199 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4200 mlxsw_sp_port->local_port);
4201 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4202 }
4203
4204 static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4205 u16 lag_id)
4206 {
4207 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4208 char sldr_pl[MLXSW_REG_SLDR_LEN];
4209
4210 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4211 mlxsw_sp_port->local_port);
4212 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4213 }
4214
4215 static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4216 bool lag_tx_enabled)
4217 {
4218 if (lag_tx_enabled)
4219 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4220 mlxsw_sp_port->lag_id);
4221 else
4222 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4223 mlxsw_sp_port->lag_id);
4224 }
4225
4226 static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4227 struct netdev_lag_lower_state_info *info)
4228 {
4229 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4230 }
4231
4232 static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4233 struct net_device *vlan_dev)
4234 {
4235 struct mlxsw_sp_port *mlxsw_sp_vport;
4236 u16 vid = vlan_dev_vlan_id(vlan_dev);
4237
4238 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4239 if (WARN_ON(!mlxsw_sp_vport))
4240 return -EINVAL;
4241
4242 mlxsw_sp_vport->dev = vlan_dev;
4243
4244 return 0;
4245 }
4246
4247 static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4248 struct net_device *vlan_dev)
4249 {
4250 struct mlxsw_sp_port *mlxsw_sp_vport;
4251 u16 vid = vlan_dev_vlan_id(vlan_dev);
4252
4253 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4254 if (WARN_ON(!mlxsw_sp_vport))
4255 return;
4256
4257 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
4258 }
4259
4260 static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4261 unsigned long event, void *ptr)
4262 {
4263 struct netdev_notifier_changeupper_info *info;
4264 struct mlxsw_sp_port *mlxsw_sp_port;
4265 struct net_device *upper_dev;
4266 struct mlxsw_sp *mlxsw_sp;
4267 int err = 0;
4268
4269 mlxsw_sp_port = netdev_priv(dev);
4270 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4271 info = ptr;
4272
4273 switch (event) {
4274 case NETDEV_PRECHANGEUPPER:
4275 upper_dev = info->upper_dev;
4276 if (!is_vlan_dev(upper_dev) &&
4277 !netif_is_lag_master(upper_dev) &&
4278 !netif_is_bridge_master(upper_dev))
4279 return -EINVAL;
4280 if (!info->linking)
4281 break;
4282 /* HW limitation forbids to put ports to multiple bridges. */
4283 if (netif_is_bridge_master(upper_dev) &&
4284 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
4285 return -EINVAL;
4286 if (netif_is_lag_master(upper_dev) &&
4287 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4288 info->upper_info))
4289 return -EINVAL;
4290 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4291 return -EINVAL;
4292 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4293 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4294 return -EINVAL;
4295 break;
4296 case NETDEV_CHANGEUPPER:
4297 upper_dev = info->upper_dev;
4298 if (is_vlan_dev(upper_dev)) {
4299 if (info->linking)
4300 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4301 upper_dev);
4302 else
4303 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4304 upper_dev);
4305 } else if (netif_is_bridge_master(upper_dev)) {
4306 if (info->linking)
4307 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4308 upper_dev);
4309 else
4310 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
4311 } else if (netif_is_lag_master(upper_dev)) {
4312 if (info->linking)
4313 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4314 upper_dev);
4315 else
4316 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4317 upper_dev);
4318 } else {
4319 err = -EINVAL;
4320 WARN_ON(1);
4321 }
4322 break;
4323 }
4324
4325 return err;
4326 }
4327
4328 static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4329 unsigned long event, void *ptr)
4330 {
4331 struct netdev_notifier_changelowerstate_info *info;
4332 struct mlxsw_sp_port *mlxsw_sp_port;
4333 int err;
4334
4335 mlxsw_sp_port = netdev_priv(dev);
4336 info = ptr;
4337
4338 switch (event) {
4339 case NETDEV_CHANGELOWERSTATE:
4340 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4341 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4342 info->lower_state_info);
4343 if (err)
4344 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4345 }
4346 break;
4347 }
4348
4349 return 0;
4350 }
4351
4352 static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4353 unsigned long event, void *ptr)
4354 {
4355 switch (event) {
4356 case NETDEV_PRECHANGEUPPER:
4357 case NETDEV_CHANGEUPPER:
4358 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4359 case NETDEV_CHANGELOWERSTATE:
4360 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4361 }
4362
4363 return 0;
4364 }
4365
4366 static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4367 unsigned long event, void *ptr)
4368 {
4369 struct net_device *dev;
4370 struct list_head *iter;
4371 int ret;
4372
4373 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4374 if (mlxsw_sp_port_dev_check(dev)) {
4375 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4376 if (ret)
4377 return ret;
4378 }
4379 }
4380
4381 return 0;
4382 }
4383
4384 static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4385 struct net_device *vlan_dev)
4386 {
4387 u16 fid = vlan_dev_vlan_id(vlan_dev);
4388 struct mlxsw_sp_fid *f;
4389
4390 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4391 if (!f) {
4392 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4393 if (IS_ERR(f))
4394 return PTR_ERR(f);
4395 }
4396
4397 f->ref_count++;
4398
4399 return 0;
4400 }
4401
4402 static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4403 struct net_device *vlan_dev)
4404 {
4405 u16 fid = vlan_dev_vlan_id(vlan_dev);
4406 struct mlxsw_sp_fid *f;
4407
4408 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4409 if (f && f->r)
4410 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
4411 if (f && --f->ref_count == 0)
4412 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4413 }
4414
4415 static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4416 unsigned long event, void *ptr)
4417 {
4418 struct netdev_notifier_changeupper_info *info;
4419 struct net_device *upper_dev;
4420 struct mlxsw_sp *mlxsw_sp;
4421 int err;
4422
4423 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4424 if (!mlxsw_sp)
4425 return 0;
4426 if (br_dev != mlxsw_sp->master_bridge.dev)
4427 return 0;
4428
4429 info = ptr;
4430
4431 switch (event) {
4432 case NETDEV_CHANGEUPPER:
4433 upper_dev = info->upper_dev;
4434 if (!is_vlan_dev(upper_dev))
4435 break;
4436 if (info->linking) {
4437 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4438 upper_dev);
4439 if (err)
4440 return err;
4441 } else {
4442 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4443 }
4444 break;
4445 }
4446
4447 return 0;
4448 }
4449
4450 static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
4451 {
4452 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
4453 MLXSW_SP_VFID_MAX);
4454 }
4455
4456 static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4457 {
4458 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4459
4460 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4461 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
4462 }
4463
4464 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
4465
4466 static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4467 struct net_device *br_dev)
4468 {
4469 struct device *dev = mlxsw_sp->bus_info->dev;
4470 struct mlxsw_sp_fid *f;
4471 u16 vfid, fid;
4472 int err;
4473
4474 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
4475 if (vfid == MLXSW_SP_VFID_MAX) {
4476 dev_err(dev, "No available vFIDs\n");
4477 return ERR_PTR(-ERANGE);
4478 }
4479
4480 fid = mlxsw_sp_vfid_to_fid(vfid);
4481 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
4482 if (err) {
4483 dev_err(dev, "Failed to create FID=%d\n", fid);
4484 return ERR_PTR(err);
4485 }
4486
4487 f = kzalloc(sizeof(*f), GFP_KERNEL);
4488 if (!f)
4489 goto err_allocate_vfid;
4490
4491 f->leave = mlxsw_sp_vport_vfid_leave;
4492 f->fid = fid;
4493 f->dev = br_dev;
4494
4495 list_add(&f->list, &mlxsw_sp->vfids.list);
4496 set_bit(vfid, mlxsw_sp->vfids.mapped);
4497
4498 return f;
4499
4500 err_allocate_vfid:
4501 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
4502 return ERR_PTR(-ENOMEM);
4503 }
4504
4505 static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4506 struct mlxsw_sp_fid *f)
4507 {
4508 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
4509 u16 fid = f->fid;
4510
4511 clear_bit(vfid, mlxsw_sp->vfids.mapped);
4512 list_del(&f->list);
4513
4514 if (f->r)
4515 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
4516
4517 kfree(f);
4518
4519 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
4520 }
4521
4522 static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4523 bool valid)
4524 {
4525 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4526 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4527
4528 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4529 vid);
4530 }
4531
4532 static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4533 struct net_device *br_dev)
4534 {
4535 struct mlxsw_sp_fid *f;
4536 int err;
4537
4538 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
4539 if (!f) {
4540 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
4541 if (IS_ERR(f))
4542 return PTR_ERR(f);
4543 }
4544
4545 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4546 if (err)
4547 goto err_vport_flood_set;
4548
4549 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4550 if (err)
4551 goto err_vport_fid_map;
4552
4553 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
4554 f->ref_count++;
4555
4556 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4557
4558 return 0;
4559
4560 err_vport_fid_map:
4561 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4562 err_vport_flood_set:
4563 if (!f->ref_count)
4564 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
4565 return err;
4566 }
4567
4568 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
4569 {
4570 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4571
4572 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4573
4574 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4575
4576 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4577
4578 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4579
4580 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
4581 if (--f->ref_count == 0)
4582 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
4583 }
4584
4585 static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4586 struct net_device *br_dev)
4587 {
4588 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4589 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4590 struct net_device *dev = mlxsw_sp_vport->dev;
4591 int err;
4592
4593 if (f && !WARN_ON(!f->leave))
4594 f->leave(mlxsw_sp_vport);
4595
4596 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
4597 if (err) {
4598 netdev_err(dev, "Failed to join vFID\n");
4599 return err;
4600 }
4601
4602 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4603 if (err) {
4604 netdev_err(dev, "Failed to enable learning\n");
4605 goto err_port_vid_learning_set;
4606 }
4607
4608 mlxsw_sp_vport->learning = 1;
4609 mlxsw_sp_vport->learning_sync = 1;
4610 mlxsw_sp_vport->uc_flood = 1;
4611 mlxsw_sp_vport->bridged = 1;
4612
4613 return 0;
4614
4615 err_port_vid_learning_set:
4616 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
4617 return err;
4618 }
4619
4620 static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
4621 {
4622 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4623
4624 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4625
4626 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
4627
4628 mlxsw_sp_vport->learning = 0;
4629 mlxsw_sp_vport->learning_sync = 0;
4630 mlxsw_sp_vport->uc_flood = 0;
4631 mlxsw_sp_vport->bridged = 0;
4632 }
4633
4634 static bool
4635 mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4636 const struct net_device *br_dev)
4637 {
4638 struct mlxsw_sp_port *mlxsw_sp_vport;
4639
4640 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4641 vport.list) {
4642 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
4643
4644 if (dev && dev == br_dev)
4645 return false;
4646 }
4647
4648 return true;
4649 }
4650
4651 static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4652 unsigned long event, void *ptr,
4653 u16 vid)
4654 {
4655 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4656 struct netdev_notifier_changeupper_info *info = ptr;
4657 struct mlxsw_sp_port *mlxsw_sp_vport;
4658 struct net_device *upper_dev;
4659 int err = 0;
4660
4661 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4662
4663 switch (event) {
4664 case NETDEV_PRECHANGEUPPER:
4665 upper_dev = info->upper_dev;
4666 if (!netif_is_bridge_master(upper_dev))
4667 return -EINVAL;
4668 if (!info->linking)
4669 break;
4670 /* We can't have multiple VLAN interfaces configured on
4671 * the same port and being members in the same bridge.
4672 */
4673 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4674 upper_dev))
4675 return -EINVAL;
4676 break;
4677 case NETDEV_CHANGEUPPER:
4678 upper_dev = info->upper_dev;
4679 if (info->linking) {
4680 if (WARN_ON(!mlxsw_sp_vport))
4681 return -EINVAL;
4682 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4683 upper_dev);
4684 } else {
4685 if (!mlxsw_sp_vport)
4686 return 0;
4687 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
4688 }
4689 }
4690
4691 return err;
4692 }
4693
4694 static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4695 unsigned long event, void *ptr,
4696 u16 vid)
4697 {
4698 struct net_device *dev;
4699 struct list_head *iter;
4700 int ret;
4701
4702 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4703 if (mlxsw_sp_port_dev_check(dev)) {
4704 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4705 vid);
4706 if (ret)
4707 return ret;
4708 }
4709 }
4710
4711 return 0;
4712 }
4713
4714 static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4715 unsigned long event, void *ptr)
4716 {
4717 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4718 u16 vid = vlan_dev_vlan_id(vlan_dev);
4719
4720 if (mlxsw_sp_port_dev_check(real_dev))
4721 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4722 vid);
4723 else if (netif_is_lag_master(real_dev))
4724 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4725 vid);
4726
4727 return 0;
4728 }
4729
4730 static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4731 unsigned long event, void *ptr)
4732 {
4733 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
4734 int err = 0;
4735
4736 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4737 err = mlxsw_sp_netdevice_router_port_event(dev);
4738 else if (mlxsw_sp_port_dev_check(dev))
4739 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4740 else if (netif_is_lag_master(dev))
4741 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
4742 else if (netif_is_bridge_master(dev))
4743 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
4744 else if (is_vlan_dev(dev))
4745 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
4746
4747 return notifier_from_errno(err);
4748 }
4749
4750 static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4751 .notifier_call = mlxsw_sp_netdevice_event,
4752 };
4753
4754 static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4755 .notifier_call = mlxsw_sp_inetaddr_event,
4756 .priority = 10, /* Must be called before FIB notifier block */
4757 };
4758
4759 static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4760 .notifier_call = mlxsw_sp_router_netevent_event,
4761 };
4762
4763 static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4764 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4765 {0, },
4766 };
4767
4768 static struct pci_driver mlxsw_sp_pci_driver = {
4769 .name = mlxsw_sp_driver_name,
4770 .id_table = mlxsw_sp_pci_id_table,
4771 };
4772
4773 static int __init mlxsw_sp_module_init(void)
4774 {
4775 int err;
4776
4777 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4778 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4779 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4780
4781 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4782 if (err)
4783 goto err_core_driver_register;
4784
4785 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4786 if (err)
4787 goto err_pci_driver_register;
4788
4789 return 0;
4790
4791 err_pci_driver_register:
4792 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
4793 err_core_driver_register:
4794 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4795 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4796 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4797 return err;
4798 }
4799
4800 static void __exit mlxsw_sp_module_exit(void)
4801 {
4802 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
4803 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
4804 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4805 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4806 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4807 }
4808
4809 module_init(mlxsw_sp_module_init);
4810 module_exit(mlxsw_sp_module_exit);
4811
4812 MODULE_LICENSE("Dual BSD/GPL");
4813 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4814 MODULE_DESCRIPTION("Mellanox Spectrum driver");
4815 MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);
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