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[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / mellanox / mlxsw / spectrum.c
1 /*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/types.h>
40 #include <linux/netdevice.h>
41 #include <linux/etherdevice.h>
42 #include <linux/ethtool.h>
43 #include <linux/slab.h>
44 #include <linux/device.h>
45 #include <linux/skbuff.h>
46 #include <linux/if_vlan.h>
47 #include <linux/if_bridge.h>
48 #include <linux/workqueue.h>
49 #include <linux/jiffies.h>
50 #include <linux/bitops.h>
51 #include <linux/list.h>
52 #include <linux/notifier.h>
53 #include <linux/dcbnl.h>
54 #include <linux/inetdevice.h>
55 #include <net/switchdev.h>
56 #include <generated/utsrelease.h>
57 #include <net/pkt_cls.h>
58 #include <net/tc_act/tc_mirred.h>
59
60 #include "spectrum.h"
61 #include "core.h"
62 #include "reg.h"
63 #include "port.h"
64 #include "trap.h"
65 #include "txheader.h"
66
67 static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
68 static const char mlxsw_sp_driver_version[] = "1.0";
69
70 /* tx_hdr_version
71 * Tx header version.
72 * Must be set to 1.
73 */
74 MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
75
76 /* tx_hdr_ctl
77 * Packet control type.
78 * 0 - Ethernet control (e.g. EMADs, LACP)
79 * 1 - Ethernet data
80 */
81 MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
82
83 /* tx_hdr_proto
84 * Packet protocol type. Must be set to 1 (Ethernet).
85 */
86 MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
87
88 /* tx_hdr_rx_is_router
89 * Packet is sent from the router. Valid for data packets only.
90 */
91 MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
92
93 /* tx_hdr_fid_valid
94 * Indicates if the 'fid' field is valid and should be used for
95 * forwarding lookup. Valid for data packets only.
96 */
97 MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
98
99 /* tx_hdr_swid
100 * Switch partition ID. Must be set to 0.
101 */
102 MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
103
104 /* tx_hdr_control_tclass
105 * Indicates if the packet should use the control TClass and not one
106 * of the data TClasses.
107 */
108 MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
109
110 /* tx_hdr_etclass
111 * Egress TClass to be used on the egress device on the egress port.
112 */
113 MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
114
115 /* tx_hdr_port_mid
116 * Destination local port for unicast packets.
117 * Destination multicast ID for multicast packets.
118 *
119 * Control packets are directed to a specific egress port, while data
120 * packets are transmitted through the CPU port (0) into the switch partition,
121 * where forwarding rules are applied.
122 */
123 MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
124
125 /* tx_hdr_fid
126 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
127 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
128 * Valid for data packets only.
129 */
130 MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
131
132 /* tx_hdr_type
133 * 0 - Data packets
134 * 6 - Control packets
135 */
136 MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
137
138 static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
139
140 static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
141 const struct mlxsw_tx_info *tx_info)
142 {
143 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
144
145 memset(txhdr, 0, MLXSW_TXHDR_LEN);
146
147 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
148 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
149 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
150 mlxsw_tx_hdr_swid_set(txhdr, 0);
151 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
152 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
153 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
154 }
155
156 static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
157 {
158 char spad_pl[MLXSW_REG_SPAD_LEN];
159 int err;
160
161 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
162 if (err)
163 return err;
164 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
165 return 0;
166 }
167
168 static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
169 {
170 struct mlxsw_resources *resources;
171 int i;
172
173 resources = mlxsw_core_resources_get(mlxsw_sp->core);
174 if (!resources->max_span_valid)
175 return -EIO;
176
177 mlxsw_sp->span.entries_count = resources->max_span;
178 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
179 sizeof(struct mlxsw_sp_span_entry),
180 GFP_KERNEL);
181 if (!mlxsw_sp->span.entries)
182 return -ENOMEM;
183
184 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
185 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
186
187 return 0;
188 }
189
190 static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
191 {
192 int i;
193
194 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
195 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
196
197 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
198 }
199 kfree(mlxsw_sp->span.entries);
200 }
201
202 static struct mlxsw_sp_span_entry *
203 mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
204 {
205 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
206 struct mlxsw_sp_span_entry *span_entry;
207 char mpat_pl[MLXSW_REG_MPAT_LEN];
208 u8 local_port = port->local_port;
209 int index;
210 int i;
211 int err;
212
213 /* find a free entry to use */
214 index = -1;
215 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
216 if (!mlxsw_sp->span.entries[i].used) {
217 index = i;
218 span_entry = &mlxsw_sp->span.entries[i];
219 break;
220 }
221 }
222 if (index < 0)
223 return NULL;
224
225 /* create a new port analayzer entry for local_port */
226 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
227 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
228 if (err)
229 return NULL;
230
231 span_entry->used = true;
232 span_entry->id = index;
233 span_entry->ref_count = 0;
234 span_entry->local_port = local_port;
235 return span_entry;
236 }
237
238 static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
239 struct mlxsw_sp_span_entry *span_entry)
240 {
241 u8 local_port = span_entry->local_port;
242 char mpat_pl[MLXSW_REG_MPAT_LEN];
243 int pa_id = span_entry->id;
244
245 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
246 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
247 span_entry->used = false;
248 }
249
250 struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
251 {
252 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
253 int i;
254
255 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
256 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
257
258 if (curr->used && curr->local_port == port->local_port)
259 return curr;
260 }
261 return NULL;
262 }
263
264 struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
265 {
266 struct mlxsw_sp_span_entry *span_entry;
267
268 span_entry = mlxsw_sp_span_entry_find(port);
269 if (span_entry) {
270 span_entry->ref_count++;
271 return span_entry;
272 }
273
274 return mlxsw_sp_span_entry_create(port);
275 }
276
277 static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
278 struct mlxsw_sp_span_entry *span_entry)
279 {
280 if (--span_entry->ref_count == 0)
281 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
282 return 0;
283 }
284
285 static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
286 {
287 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
288 struct mlxsw_sp_span_inspected_port *p;
289 int i;
290
291 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
292 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
293
294 list_for_each_entry(p, &curr->bound_ports_list, list)
295 if (p->local_port == port->local_port &&
296 p->type == MLXSW_SP_SPAN_EGRESS)
297 return true;
298 }
299
300 return false;
301 }
302
303 static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
304 {
305 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
306 }
307
308 static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
309 {
310 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
311 char sbib_pl[MLXSW_REG_SBIB_LEN];
312 int err;
313
314 /* If port is egress mirrored, the shared buffer size should be
315 * updated according to the mtu value
316 */
317 if (mlxsw_sp_span_is_egress_mirror(port)) {
318 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
319 mlxsw_sp_span_mtu_to_buffsize(mtu));
320 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
321 if (err) {
322 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
323 return err;
324 }
325 }
326
327 return 0;
328 }
329
330 static struct mlxsw_sp_span_inspected_port *
331 mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
332 struct mlxsw_sp_span_entry *span_entry)
333 {
334 struct mlxsw_sp_span_inspected_port *p;
335
336 list_for_each_entry(p, &span_entry->bound_ports_list, list)
337 if (port->local_port == p->local_port)
338 return p;
339 return NULL;
340 }
341
342 static int
343 mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
344 struct mlxsw_sp_span_entry *span_entry,
345 enum mlxsw_sp_span_type type)
346 {
347 struct mlxsw_sp_span_inspected_port *inspected_port;
348 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
349 char mpar_pl[MLXSW_REG_MPAR_LEN];
350 char sbib_pl[MLXSW_REG_SBIB_LEN];
351 int pa_id = span_entry->id;
352 int err;
353
354 /* if it is an egress SPAN, bind a shared buffer to it */
355 if (type == MLXSW_SP_SPAN_EGRESS) {
356 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
357 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
358 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
359 if (err) {
360 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
361 return err;
362 }
363 }
364
365 /* bind the port to the SPAN entry */
366 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id);
367 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
368 if (err)
369 goto err_mpar_reg_write;
370
371 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
372 if (!inspected_port) {
373 err = -ENOMEM;
374 goto err_inspected_port_alloc;
375 }
376 inspected_port->local_port = port->local_port;
377 inspected_port->type = type;
378 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
379
380 return 0;
381
382 err_mpar_reg_write:
383 err_inspected_port_alloc:
384 if (type == MLXSW_SP_SPAN_EGRESS) {
385 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
386 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
387 }
388 return err;
389 }
390
391 static void
392 mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
393 struct mlxsw_sp_span_entry *span_entry,
394 enum mlxsw_sp_span_type type)
395 {
396 struct mlxsw_sp_span_inspected_port *inspected_port;
397 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
398 char mpar_pl[MLXSW_REG_MPAR_LEN];
399 char sbib_pl[MLXSW_REG_SBIB_LEN];
400 int pa_id = span_entry->id;
401
402 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
403 if (!inspected_port)
404 return;
405
406 /* remove the inspected port */
407 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id);
408 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
409
410 /* remove the SBIB buffer if it was egress SPAN */
411 if (type == MLXSW_SP_SPAN_EGRESS) {
412 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
413 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
414 }
415
416 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
417
418 list_del(&inspected_port->list);
419 kfree(inspected_port);
420 }
421
422 static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
423 struct mlxsw_sp_port *to,
424 enum mlxsw_sp_span_type type)
425 {
426 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
427 struct mlxsw_sp_span_entry *span_entry;
428 int err;
429
430 span_entry = mlxsw_sp_span_entry_get(to);
431 if (!span_entry)
432 return -ENOENT;
433
434 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
435 span_entry->id);
436
437 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
438 if (err)
439 goto err_port_bind;
440
441 return 0;
442
443 err_port_bind:
444 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
445 return err;
446 }
447
448 static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
449 struct mlxsw_sp_port *to,
450 enum mlxsw_sp_span_type type)
451 {
452 struct mlxsw_sp_span_entry *span_entry;
453
454 span_entry = mlxsw_sp_span_entry_find(to);
455 if (!span_entry) {
456 netdev_err(from->dev, "no span entry found\n");
457 return;
458 }
459
460 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
461 span_entry->id);
462 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
463 }
464
465 static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
466 bool is_up)
467 {
468 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
469 char paos_pl[MLXSW_REG_PAOS_LEN];
470
471 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
472 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
473 MLXSW_PORT_ADMIN_STATUS_DOWN);
474 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
475 }
476
477 static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
478 unsigned char *addr)
479 {
480 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
481 char ppad_pl[MLXSW_REG_PPAD_LEN];
482
483 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
484 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
485 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
486 }
487
488 static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
489 {
490 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
491 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
492
493 ether_addr_copy(addr, mlxsw_sp->base_mac);
494 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
495 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
496 }
497
498 static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
499 {
500 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
501 char pmtu_pl[MLXSW_REG_PMTU_LEN];
502 int max_mtu;
503 int err;
504
505 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
506 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
507 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
508 if (err)
509 return err;
510 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
511
512 if (mtu > max_mtu)
513 return -EINVAL;
514
515 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
516 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
517 }
518
519 static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
520 u8 swid)
521 {
522 char pspa_pl[MLXSW_REG_PSPA_LEN];
523
524 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
525 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
526 }
527
528 static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
529 {
530 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
531
532 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
533 swid);
534 }
535
536 static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
537 bool enable)
538 {
539 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
540 char svpe_pl[MLXSW_REG_SVPE_LEN];
541
542 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
543 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
544 }
545
546 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
547 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
548 u16 vid)
549 {
550 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
551 char svfa_pl[MLXSW_REG_SVFA_LEN];
552
553 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
554 fid, vid);
555 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
556 }
557
558 static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
559 u16 vid, bool learn_enable)
560 {
561 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
562 char *spvmlr_pl;
563 int err;
564
565 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
566 if (!spvmlr_pl)
567 return -ENOMEM;
568 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
569 learn_enable);
570 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
571 kfree(spvmlr_pl);
572 return err;
573 }
574
575 static int
576 mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
577 {
578 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
579 char sspr_pl[MLXSW_REG_SSPR_LEN];
580
581 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
582 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
583 }
584
585 static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
586 u8 local_port, u8 *p_module,
587 u8 *p_width, u8 *p_lane)
588 {
589 char pmlp_pl[MLXSW_REG_PMLP_LEN];
590 int err;
591
592 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
593 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
594 if (err)
595 return err;
596 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
597 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
598 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
599 return 0;
600 }
601
602 static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
603 u8 module, u8 width, u8 lane)
604 {
605 char pmlp_pl[MLXSW_REG_PMLP_LEN];
606 int i;
607
608 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
609 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
610 for (i = 0; i < width; i++) {
611 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
612 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
613 }
614
615 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
616 }
617
618 static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
619 {
620 char pmlp_pl[MLXSW_REG_PMLP_LEN];
621
622 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
623 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
625 }
626
627 static int mlxsw_sp_port_open(struct net_device *dev)
628 {
629 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
630 int err;
631
632 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
633 if (err)
634 return err;
635 netif_start_queue(dev);
636 return 0;
637 }
638
639 static int mlxsw_sp_port_stop(struct net_device *dev)
640 {
641 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
642
643 netif_stop_queue(dev);
644 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
645 }
646
647 static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
648 struct net_device *dev)
649 {
650 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
651 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
652 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
653 const struct mlxsw_tx_info tx_info = {
654 .local_port = mlxsw_sp_port->local_port,
655 .is_emad = false,
656 };
657 u64 len;
658 int err;
659
660 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
661 return NETDEV_TX_BUSY;
662
663 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
664 struct sk_buff *skb_orig = skb;
665
666 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
667 if (!skb) {
668 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
669 dev_kfree_skb_any(skb_orig);
670 return NETDEV_TX_OK;
671 }
672 }
673
674 if (eth_skb_pad(skb)) {
675 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
676 return NETDEV_TX_OK;
677 }
678
679 mlxsw_sp_txhdr_construct(skb, &tx_info);
680 /* TX header is consumed by HW on the way so we shouldn't count its
681 * bytes as being sent.
682 */
683 len = skb->len - MLXSW_TXHDR_LEN;
684
685 /* Due to a race we might fail here because of a full queue. In that
686 * unlikely case we simply drop the packet.
687 */
688 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
689
690 if (!err) {
691 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
692 u64_stats_update_begin(&pcpu_stats->syncp);
693 pcpu_stats->tx_packets++;
694 pcpu_stats->tx_bytes += len;
695 u64_stats_update_end(&pcpu_stats->syncp);
696 } else {
697 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
698 dev_kfree_skb_any(skb);
699 }
700 return NETDEV_TX_OK;
701 }
702
703 static void mlxsw_sp_set_rx_mode(struct net_device *dev)
704 {
705 }
706
707 static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
708 {
709 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
710 struct sockaddr *addr = p;
711 int err;
712
713 if (!is_valid_ether_addr(addr->sa_data))
714 return -EADDRNOTAVAIL;
715
716 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
717 if (err)
718 return err;
719 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
720 return 0;
721 }
722
723 static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
724 bool pause_en, bool pfc_en, u16 delay)
725 {
726 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
727
728 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
729 MLXSW_SP_PAUSE_DELAY;
730
731 if (pause_en || pfc_en)
732 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
733 pg_size + delay, pg_size);
734 else
735 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
736 }
737
738 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
739 u8 *prio_tc, bool pause_en,
740 struct ieee_pfc *my_pfc)
741 {
742 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
743 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
744 u16 delay = !!my_pfc ? my_pfc->delay : 0;
745 char pbmc_pl[MLXSW_REG_PBMC_LEN];
746 int i, j, err;
747
748 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
749 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
750 if (err)
751 return err;
752
753 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
754 bool configure = false;
755 bool pfc = false;
756
757 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
758 if (prio_tc[j] == i) {
759 pfc = pfc_en & BIT(j);
760 configure = true;
761 break;
762 }
763 }
764
765 if (!configure)
766 continue;
767 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
768 }
769
770 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
771 }
772
773 static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
774 int mtu, bool pause_en)
775 {
776 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
777 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
778 struct ieee_pfc *my_pfc;
779 u8 *prio_tc;
780
781 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
782 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
783
784 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
785 pause_en, my_pfc);
786 }
787
788 static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
789 {
790 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
791 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
792 int err;
793
794 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
795 if (err)
796 return err;
797 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
798 if (err)
799 goto err_span_port_mtu_update;
800 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
801 if (err)
802 goto err_port_mtu_set;
803 dev->mtu = mtu;
804 return 0;
805
806 err_port_mtu_set:
807 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
808 err_span_port_mtu_update:
809 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
810 return err;
811 }
812
813 static struct rtnl_link_stats64 *
814 mlxsw_sp_port_get_stats64(struct net_device *dev,
815 struct rtnl_link_stats64 *stats)
816 {
817 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
818 struct mlxsw_sp_port_pcpu_stats *p;
819 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
820 u32 tx_dropped = 0;
821 unsigned int start;
822 int i;
823
824 for_each_possible_cpu(i) {
825 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
826 do {
827 start = u64_stats_fetch_begin_irq(&p->syncp);
828 rx_packets = p->rx_packets;
829 rx_bytes = p->rx_bytes;
830 tx_packets = p->tx_packets;
831 tx_bytes = p->tx_bytes;
832 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
833
834 stats->rx_packets += rx_packets;
835 stats->rx_bytes += rx_bytes;
836 stats->tx_packets += tx_packets;
837 stats->tx_bytes += tx_bytes;
838 /* tx_dropped is u32, updated without syncp protection. */
839 tx_dropped += p->tx_dropped;
840 }
841 stats->tx_dropped = tx_dropped;
842 return stats;
843 }
844
845 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
846 u16 vid_end, bool is_member, bool untagged)
847 {
848 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
849 char *spvm_pl;
850 int err;
851
852 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
853 if (!spvm_pl)
854 return -ENOMEM;
855
856 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
857 vid_end, is_member, untagged);
858 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
859 kfree(spvm_pl);
860 return err;
861 }
862
863 static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
864 {
865 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
866 u16 vid, last_visited_vid;
867 int err;
868
869 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
870 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
871 vid);
872 if (err) {
873 last_visited_vid = vid;
874 goto err_port_vid_to_fid_set;
875 }
876 }
877
878 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
879 if (err) {
880 last_visited_vid = VLAN_N_VID;
881 goto err_port_vid_to_fid_set;
882 }
883
884 return 0;
885
886 err_port_vid_to_fid_set:
887 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
888 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
889 vid);
890 return err;
891 }
892
893 static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
894 {
895 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
896 u16 vid;
897 int err;
898
899 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
900 if (err)
901 return err;
902
903 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
904 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
905 vid, vid);
906 if (err)
907 return err;
908 }
909
910 return 0;
911 }
912
913 static struct mlxsw_sp_port *
914 mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
915 {
916 struct mlxsw_sp_port *mlxsw_sp_vport;
917
918 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
919 if (!mlxsw_sp_vport)
920 return NULL;
921
922 /* dev will be set correctly after the VLAN device is linked
923 * with the real device. In case of bridge SELF invocation, dev
924 * will remain as is.
925 */
926 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
927 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
928 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
929 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
930 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
931 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
932 mlxsw_sp_vport->vport.vid = vid;
933
934 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
935
936 return mlxsw_sp_vport;
937 }
938
939 static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
940 {
941 list_del(&mlxsw_sp_vport->vport.list);
942 kfree(mlxsw_sp_vport);
943 }
944
945 int mlxsw_sp_port_add_vid(struct net_device *dev, __be16 __always_unused proto,
946 u16 vid)
947 {
948 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
949 struct mlxsw_sp_port *mlxsw_sp_vport;
950 bool untagged = vid == 1;
951 int err;
952
953 /* VLAN 0 is added to HW filter when device goes up, but it is
954 * reserved in our case, so simply return.
955 */
956 if (!vid)
957 return 0;
958
959 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
960 return 0;
961
962 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
963 if (!mlxsw_sp_vport)
964 return -ENOMEM;
965
966 /* When adding the first VLAN interface on a bridged port we need to
967 * transition all the active 802.1Q bridge VLANs to use explicit
968 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
969 */
970 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
971 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
972 if (err)
973 goto err_port_vp_mode_trans;
974 }
975
976 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
977 if (err)
978 goto err_port_vid_learning_set;
979
980 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
981 if (err)
982 goto err_port_add_vid;
983
984 return 0;
985
986 err_port_add_vid:
987 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
988 err_port_vid_learning_set:
989 if (list_is_singular(&mlxsw_sp_port->vports_list))
990 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
991 err_port_vp_mode_trans:
992 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
993 return err;
994 }
995
996 static int mlxsw_sp_port_kill_vid(struct net_device *dev,
997 __be16 __always_unused proto, u16 vid)
998 {
999 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1000 struct mlxsw_sp_port *mlxsw_sp_vport;
1001 struct mlxsw_sp_fid *f;
1002
1003 /* VLAN 0 is removed from HW filter when device goes down, but
1004 * it is reserved in our case, so simply return.
1005 */
1006 if (!vid)
1007 return 0;
1008
1009 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
1010 if (WARN_ON(!mlxsw_sp_vport))
1011 return 0;
1012
1013 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
1014
1015 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
1016
1017 /* Drop FID reference. If this was the last reference the
1018 * resources will be freed.
1019 */
1020 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1021 if (f && !WARN_ON(!f->leave))
1022 f->leave(mlxsw_sp_vport);
1023
1024 /* When removing the last VLAN interface on a bridged port we need to
1025 * transition all active 802.1Q bridge VLANs to use VID to FID
1026 * mappings and set port's mode to VLAN mode.
1027 */
1028 if (list_is_singular(&mlxsw_sp_port->vports_list))
1029 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1030
1031 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1032
1033 return 0;
1034 }
1035
1036 static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1037 size_t len)
1038 {
1039 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1040 u8 module = mlxsw_sp_port->mapping.module;
1041 u8 width = mlxsw_sp_port->mapping.width;
1042 u8 lane = mlxsw_sp_port->mapping.lane;
1043 int err;
1044
1045 if (!mlxsw_sp_port->split)
1046 err = snprintf(name, len, "p%d", module + 1);
1047 else
1048 err = snprintf(name, len, "p%ds%d", module + 1,
1049 lane / width);
1050
1051 if (err >= len)
1052 return -EINVAL;
1053
1054 return 0;
1055 }
1056
1057 static struct mlxsw_sp_port_mall_tc_entry *
1058 mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1059 unsigned long cookie) {
1060 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1061
1062 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1063 if (mall_tc_entry->cookie == cookie)
1064 return mall_tc_entry;
1065
1066 return NULL;
1067 }
1068
1069 static int
1070 mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1071 struct tc_cls_matchall_offload *cls,
1072 const struct tc_action *a,
1073 bool ingress)
1074 {
1075 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1076 struct net *net = dev_net(mlxsw_sp_port->dev);
1077 enum mlxsw_sp_span_type span_type;
1078 struct mlxsw_sp_port *to_port;
1079 struct net_device *to_dev;
1080 int ifindex;
1081 int err;
1082
1083 ifindex = tcf_mirred_ifindex(a);
1084 to_dev = __dev_get_by_index(net, ifindex);
1085 if (!to_dev) {
1086 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1087 return -EINVAL;
1088 }
1089
1090 if (!mlxsw_sp_port_dev_check(to_dev)) {
1091 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1092 return -ENOTSUPP;
1093 }
1094 to_port = netdev_priv(to_dev);
1095
1096 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1097 if (!mall_tc_entry)
1098 return -ENOMEM;
1099
1100 mall_tc_entry->cookie = cls->cookie;
1101 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1102 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1103 mall_tc_entry->mirror.ingress = ingress;
1104 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1105
1106 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1107 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1108 if (err)
1109 goto err_mirror_add;
1110 return 0;
1111
1112 err_mirror_add:
1113 list_del(&mall_tc_entry->list);
1114 kfree(mall_tc_entry);
1115 return err;
1116 }
1117
1118 static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1119 __be16 protocol,
1120 struct tc_cls_matchall_offload *cls,
1121 bool ingress)
1122 {
1123 const struct tc_action *a;
1124 int err;
1125
1126 if (!tc_single_action(cls->exts)) {
1127 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1128 return -ENOTSUPP;
1129 }
1130
1131 tc_for_each_action(a, cls->exts) {
1132 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1133 return -ENOTSUPP;
1134
1135 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1136 a, ingress);
1137 if (err)
1138 return err;
1139 }
1140
1141 return 0;
1142 }
1143
1144 static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1145 struct tc_cls_matchall_offload *cls)
1146 {
1147 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1148 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1149 enum mlxsw_sp_span_type span_type;
1150 struct mlxsw_sp_port *to_port;
1151
1152 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1153 cls->cookie);
1154 if (!mall_tc_entry) {
1155 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1156 return;
1157 }
1158
1159 switch (mall_tc_entry->type) {
1160 case MLXSW_SP_PORT_MALL_MIRROR:
1161 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1162 span_type = mall_tc_entry->mirror.ingress ?
1163 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1164
1165 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1166 break;
1167 default:
1168 WARN_ON(1);
1169 }
1170
1171 list_del(&mall_tc_entry->list);
1172 kfree(mall_tc_entry);
1173 }
1174
1175 static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1176 __be16 proto, struct tc_to_netdev *tc)
1177 {
1178 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1179 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1180
1181 if (tc->type == TC_SETUP_MATCHALL) {
1182 switch (tc->cls_mall->command) {
1183 case TC_CLSMATCHALL_REPLACE:
1184 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1185 proto,
1186 tc->cls_mall,
1187 ingress);
1188 case TC_CLSMATCHALL_DESTROY:
1189 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1190 tc->cls_mall);
1191 return 0;
1192 default:
1193 return -EINVAL;
1194 }
1195 }
1196
1197 return -ENOTSUPP;
1198 }
1199
1200 static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1201 .ndo_open = mlxsw_sp_port_open,
1202 .ndo_stop = mlxsw_sp_port_stop,
1203 .ndo_start_xmit = mlxsw_sp_port_xmit,
1204 .ndo_setup_tc = mlxsw_sp_setup_tc,
1205 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
1206 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1207 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1208 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1209 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1210 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
1211 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1212 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
1213 .ndo_fdb_add = switchdev_port_fdb_add,
1214 .ndo_fdb_del = switchdev_port_fdb_del,
1215 .ndo_fdb_dump = switchdev_port_fdb_dump,
1216 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1217 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1218 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
1219 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
1220 };
1221
1222 static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1223 struct ethtool_drvinfo *drvinfo)
1224 {
1225 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1226 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1227
1228 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1229 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1230 sizeof(drvinfo->version));
1231 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1232 "%d.%d.%d",
1233 mlxsw_sp->bus_info->fw_rev.major,
1234 mlxsw_sp->bus_info->fw_rev.minor,
1235 mlxsw_sp->bus_info->fw_rev.subminor);
1236 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1237 sizeof(drvinfo->bus_info));
1238 }
1239
1240 static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1241 struct ethtool_pauseparam *pause)
1242 {
1243 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1244
1245 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1246 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1247 }
1248
1249 static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1250 struct ethtool_pauseparam *pause)
1251 {
1252 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1253
1254 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1255 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1256 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1257
1258 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1259 pfcc_pl);
1260 }
1261
1262 static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1263 struct ethtool_pauseparam *pause)
1264 {
1265 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1266 bool pause_en = pause->tx_pause || pause->rx_pause;
1267 int err;
1268
1269 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1270 netdev_err(dev, "PFC already enabled on port\n");
1271 return -EINVAL;
1272 }
1273
1274 if (pause->autoneg) {
1275 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1276 return -EINVAL;
1277 }
1278
1279 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1280 if (err) {
1281 netdev_err(dev, "Failed to configure port's headroom\n");
1282 return err;
1283 }
1284
1285 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1286 if (err) {
1287 netdev_err(dev, "Failed to set PAUSE parameters\n");
1288 goto err_port_pause_configure;
1289 }
1290
1291 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1292 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1293
1294 return 0;
1295
1296 err_port_pause_configure:
1297 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1298 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1299 return err;
1300 }
1301
1302 struct mlxsw_sp_port_hw_stats {
1303 char str[ETH_GSTRING_LEN];
1304 u64 (*getter)(char *payload);
1305 };
1306
1307 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
1308 {
1309 .str = "a_frames_transmitted_ok",
1310 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1311 },
1312 {
1313 .str = "a_frames_received_ok",
1314 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1315 },
1316 {
1317 .str = "a_frame_check_sequence_errors",
1318 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1319 },
1320 {
1321 .str = "a_alignment_errors",
1322 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1323 },
1324 {
1325 .str = "a_octets_transmitted_ok",
1326 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1327 },
1328 {
1329 .str = "a_octets_received_ok",
1330 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1331 },
1332 {
1333 .str = "a_multicast_frames_xmitted_ok",
1334 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1335 },
1336 {
1337 .str = "a_broadcast_frames_xmitted_ok",
1338 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1339 },
1340 {
1341 .str = "a_multicast_frames_received_ok",
1342 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1343 },
1344 {
1345 .str = "a_broadcast_frames_received_ok",
1346 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1347 },
1348 {
1349 .str = "a_in_range_length_errors",
1350 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1351 },
1352 {
1353 .str = "a_out_of_range_length_field",
1354 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1355 },
1356 {
1357 .str = "a_frame_too_long_errors",
1358 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1359 },
1360 {
1361 .str = "a_symbol_error_during_carrier",
1362 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1363 },
1364 {
1365 .str = "a_mac_control_frames_transmitted",
1366 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1367 },
1368 {
1369 .str = "a_mac_control_frames_received",
1370 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1371 },
1372 {
1373 .str = "a_unsupported_opcodes_received",
1374 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1375 },
1376 {
1377 .str = "a_pause_mac_ctrl_frames_received",
1378 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1379 },
1380 {
1381 .str = "a_pause_mac_ctrl_frames_xmitted",
1382 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1383 },
1384 };
1385
1386 #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1387
1388 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1389 {
1390 .str = "rx_octets_prio",
1391 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1392 },
1393 {
1394 .str = "rx_frames_prio",
1395 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1396 },
1397 {
1398 .str = "tx_octets_prio",
1399 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1400 },
1401 {
1402 .str = "tx_frames_prio",
1403 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1404 },
1405 {
1406 .str = "rx_pause_prio",
1407 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1408 },
1409 {
1410 .str = "rx_pause_duration_prio",
1411 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1412 },
1413 {
1414 .str = "tx_pause_prio",
1415 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1416 },
1417 {
1418 .str = "tx_pause_duration_prio",
1419 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1420 },
1421 };
1422
1423 #define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1424
1425 static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1426 {
1427 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1428
1429 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1430 }
1431
1432 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1433 {
1434 .str = "tc_transmit_queue_tc",
1435 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1436 },
1437 {
1438 .str = "tc_no_buffer_discard_uc_tc",
1439 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1440 },
1441 };
1442
1443 #define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1444
1445 #define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
1446 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1447 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
1448 IEEE_8021QAZ_MAX_TCS)
1449
1450 static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1451 {
1452 int i;
1453
1454 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1455 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1456 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1457 *p += ETH_GSTRING_LEN;
1458 }
1459 }
1460
1461 static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1462 {
1463 int i;
1464
1465 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1466 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1467 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1468 *p += ETH_GSTRING_LEN;
1469 }
1470 }
1471
1472 static void mlxsw_sp_port_get_strings(struct net_device *dev,
1473 u32 stringset, u8 *data)
1474 {
1475 u8 *p = data;
1476 int i;
1477
1478 switch (stringset) {
1479 case ETH_SS_STATS:
1480 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1481 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1482 ETH_GSTRING_LEN);
1483 p += ETH_GSTRING_LEN;
1484 }
1485
1486 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1487 mlxsw_sp_port_get_prio_strings(&p, i);
1488
1489 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1490 mlxsw_sp_port_get_tc_strings(&p, i);
1491
1492 break;
1493 }
1494 }
1495
1496 static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1497 enum ethtool_phys_id_state state)
1498 {
1499 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1500 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1501 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1502 bool active;
1503
1504 switch (state) {
1505 case ETHTOOL_ID_ACTIVE:
1506 active = true;
1507 break;
1508 case ETHTOOL_ID_INACTIVE:
1509 active = false;
1510 break;
1511 default:
1512 return -EOPNOTSUPP;
1513 }
1514
1515 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1516 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1517 }
1518
1519 static int
1520 mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1521 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1522 {
1523 switch (grp) {
1524 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1525 *p_hw_stats = mlxsw_sp_port_hw_stats;
1526 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1527 break;
1528 case MLXSW_REG_PPCNT_PRIO_CNT:
1529 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1530 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1531 break;
1532 case MLXSW_REG_PPCNT_TC_CNT:
1533 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1534 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1535 break;
1536 default:
1537 WARN_ON(1);
1538 return -ENOTSUPP;
1539 }
1540 return 0;
1541 }
1542
1543 static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1544 enum mlxsw_reg_ppcnt_grp grp, int prio,
1545 u64 *data, int data_index)
1546 {
1547 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1548 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1549 struct mlxsw_sp_port_hw_stats *hw_stats;
1550 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1551 int i, len;
1552 int err;
1553
1554 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1555 if (err)
1556 return;
1557 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
1558 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
1559 for (i = 0; i < len; i++)
1560 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1561 }
1562
1563 static void mlxsw_sp_port_get_stats(struct net_device *dev,
1564 struct ethtool_stats *stats, u64 *data)
1565 {
1566 int i, data_index = 0;
1567
1568 /* IEEE 802.3 Counters */
1569 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1570 data, data_index);
1571 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1572
1573 /* Per-Priority Counters */
1574 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1575 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1576 data, data_index);
1577 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1578 }
1579
1580 /* Per-TC Counters */
1581 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1582 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1583 data, data_index);
1584 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1585 }
1586 }
1587
1588 static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1589 {
1590 switch (sset) {
1591 case ETH_SS_STATS:
1592 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
1593 default:
1594 return -EOPNOTSUPP;
1595 }
1596 }
1597
1598 struct mlxsw_sp_port_link_mode {
1599 u32 mask;
1600 u32 supported;
1601 u32 advertised;
1602 u32 speed;
1603 };
1604
1605 static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1606 {
1607 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1608 .supported = SUPPORTED_100baseT_Full,
1609 .advertised = ADVERTISED_100baseT_Full,
1610 .speed = 100,
1611 },
1612 {
1613 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1614 .speed = 100,
1615 },
1616 {
1617 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1618 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1619 .supported = SUPPORTED_1000baseKX_Full,
1620 .advertised = ADVERTISED_1000baseKX_Full,
1621 .speed = 1000,
1622 },
1623 {
1624 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1625 .supported = SUPPORTED_10000baseT_Full,
1626 .advertised = ADVERTISED_10000baseT_Full,
1627 .speed = 10000,
1628 },
1629 {
1630 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1631 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1632 .supported = SUPPORTED_10000baseKX4_Full,
1633 .advertised = ADVERTISED_10000baseKX4_Full,
1634 .speed = 10000,
1635 },
1636 {
1637 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1638 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1639 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1640 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1641 .supported = SUPPORTED_10000baseKR_Full,
1642 .advertised = ADVERTISED_10000baseKR_Full,
1643 .speed = 10000,
1644 },
1645 {
1646 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1647 .supported = SUPPORTED_20000baseKR2_Full,
1648 .advertised = ADVERTISED_20000baseKR2_Full,
1649 .speed = 20000,
1650 },
1651 {
1652 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1653 .supported = SUPPORTED_40000baseCR4_Full,
1654 .advertised = ADVERTISED_40000baseCR4_Full,
1655 .speed = 40000,
1656 },
1657 {
1658 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1659 .supported = SUPPORTED_40000baseKR4_Full,
1660 .advertised = ADVERTISED_40000baseKR4_Full,
1661 .speed = 40000,
1662 },
1663 {
1664 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1665 .supported = SUPPORTED_40000baseSR4_Full,
1666 .advertised = ADVERTISED_40000baseSR4_Full,
1667 .speed = 40000,
1668 },
1669 {
1670 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1671 .supported = SUPPORTED_40000baseLR4_Full,
1672 .advertised = ADVERTISED_40000baseLR4_Full,
1673 .speed = 40000,
1674 },
1675 {
1676 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1677 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1678 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1679 .speed = 25000,
1680 },
1681 {
1682 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1683 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1684 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1685 .speed = 50000,
1686 },
1687 {
1688 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1689 .supported = SUPPORTED_56000baseKR4_Full,
1690 .advertised = ADVERTISED_56000baseKR4_Full,
1691 .speed = 56000,
1692 },
1693 {
1694 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1695 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1696 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1697 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1698 .speed = 100000,
1699 },
1700 };
1701
1702 #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1703
1704 static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1705 {
1706 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1707 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1708 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1709 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1710 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1711 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1712 return SUPPORTED_FIBRE;
1713
1714 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1715 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1716 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1717 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1718 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1719 return SUPPORTED_Backplane;
1720 return 0;
1721 }
1722
1723 static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1724 {
1725 u32 modes = 0;
1726 int i;
1727
1728 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1729 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1730 modes |= mlxsw_sp_port_link_mode[i].supported;
1731 }
1732 return modes;
1733 }
1734
1735 static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1736 {
1737 u32 modes = 0;
1738 int i;
1739
1740 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1741 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1742 modes |= mlxsw_sp_port_link_mode[i].advertised;
1743 }
1744 return modes;
1745 }
1746
1747 static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1748 struct ethtool_cmd *cmd)
1749 {
1750 u32 speed = SPEED_UNKNOWN;
1751 u8 duplex = DUPLEX_UNKNOWN;
1752 int i;
1753
1754 if (!carrier_ok)
1755 goto out;
1756
1757 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1758 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1759 speed = mlxsw_sp_port_link_mode[i].speed;
1760 duplex = DUPLEX_FULL;
1761 break;
1762 }
1763 }
1764 out:
1765 ethtool_cmd_speed_set(cmd, speed);
1766 cmd->duplex = duplex;
1767 }
1768
1769 static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1770 {
1771 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1772 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1773 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1774 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1775 return PORT_FIBRE;
1776
1777 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1778 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1779 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1780 return PORT_DA;
1781
1782 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1783 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1784 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1785 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1786 return PORT_NONE;
1787
1788 return PORT_OTHER;
1789 }
1790
1791 static int mlxsw_sp_port_get_settings(struct net_device *dev,
1792 struct ethtool_cmd *cmd)
1793 {
1794 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1795 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1796 char ptys_pl[MLXSW_REG_PTYS_LEN];
1797 u32 eth_proto_cap;
1798 u32 eth_proto_admin;
1799 u32 eth_proto_oper;
1800 int err;
1801
1802 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1803 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1804 if (err) {
1805 netdev_err(dev, "Failed to get proto");
1806 return err;
1807 }
1808 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1809 &eth_proto_admin, &eth_proto_oper);
1810
1811 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1812 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
1813 SUPPORTED_Pause | SUPPORTED_Asym_Pause |
1814 SUPPORTED_Autoneg;
1815 cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1816 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1817 eth_proto_oper, cmd);
1818
1819 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1820 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1821 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1822
1823 cmd->transceiver = XCVR_INTERNAL;
1824 return 0;
1825 }
1826
1827 static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1828 {
1829 u32 ptys_proto = 0;
1830 int i;
1831
1832 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1833 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1834 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1835 }
1836 return ptys_proto;
1837 }
1838
1839 static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1840 {
1841 u32 ptys_proto = 0;
1842 int i;
1843
1844 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1845 if (speed == mlxsw_sp_port_link_mode[i].speed)
1846 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1847 }
1848 return ptys_proto;
1849 }
1850
1851 static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1852 {
1853 u32 ptys_proto = 0;
1854 int i;
1855
1856 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1857 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1858 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1859 }
1860 return ptys_proto;
1861 }
1862
1863 static int mlxsw_sp_port_set_settings(struct net_device *dev,
1864 struct ethtool_cmd *cmd)
1865 {
1866 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1867 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1868 char ptys_pl[MLXSW_REG_PTYS_LEN];
1869 u32 speed;
1870 u32 eth_proto_new;
1871 u32 eth_proto_cap;
1872 u32 eth_proto_admin;
1873 int err;
1874
1875 speed = ethtool_cmd_speed(cmd);
1876
1877 eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1878 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1879 mlxsw_sp_to_ptys_speed(speed);
1880
1881 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1882 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1883 if (err) {
1884 netdev_err(dev, "Failed to get proto");
1885 return err;
1886 }
1887 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1888
1889 eth_proto_new = eth_proto_new & eth_proto_cap;
1890 if (!eth_proto_new) {
1891 netdev_err(dev, "Not supported proto admin requested");
1892 return -EINVAL;
1893 }
1894 if (eth_proto_new == eth_proto_admin)
1895 return 0;
1896
1897 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1898 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1899 if (err) {
1900 netdev_err(dev, "Failed to set proto admin");
1901 return err;
1902 }
1903
1904 if (!netif_running(dev))
1905 return 0;
1906
1907 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1908 if (err) {
1909 netdev_err(dev, "Failed to set admin status");
1910 return err;
1911 }
1912
1913 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1914 if (err) {
1915 netdev_err(dev, "Failed to set admin status");
1916 return err;
1917 }
1918
1919 return 0;
1920 }
1921
1922 static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1923 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1924 .get_link = ethtool_op_get_link,
1925 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
1926 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
1927 .get_strings = mlxsw_sp_port_get_strings,
1928 .set_phys_id = mlxsw_sp_port_set_phys_id,
1929 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1930 .get_sset_count = mlxsw_sp_port_get_sset_count,
1931 .get_settings = mlxsw_sp_port_get_settings,
1932 .set_settings = mlxsw_sp_port_set_settings,
1933 };
1934
1935 static int
1936 mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1937 {
1938 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1939 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1940 char ptys_pl[MLXSW_REG_PTYS_LEN];
1941 u32 eth_proto_admin;
1942
1943 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1944 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1945 eth_proto_admin);
1946 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1947 }
1948
1949 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1950 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1951 bool dwrr, u8 dwrr_weight)
1952 {
1953 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1954 char qeec_pl[MLXSW_REG_QEEC_LEN];
1955
1956 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1957 next_index);
1958 mlxsw_reg_qeec_de_set(qeec_pl, true);
1959 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1960 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1961 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1962 }
1963
1964 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1965 enum mlxsw_reg_qeec_hr hr, u8 index,
1966 u8 next_index, u32 maxrate)
1967 {
1968 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1969 char qeec_pl[MLXSW_REG_QEEC_LEN];
1970
1971 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1972 next_index);
1973 mlxsw_reg_qeec_mase_set(qeec_pl, true);
1974 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
1975 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1976 }
1977
1978 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
1979 u8 switch_prio, u8 tclass)
1980 {
1981 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1982 char qtct_pl[MLXSW_REG_QTCT_LEN];
1983
1984 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
1985 tclass);
1986 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
1987 }
1988
1989 static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
1990 {
1991 int err, i;
1992
1993 /* Setup the elements hierarcy, so that each TC is linked to
1994 * one subgroup, which are all member in the same group.
1995 */
1996 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1997 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
1998 0);
1999 if (err)
2000 return err;
2001 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2002 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2003 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2004 0, false, 0);
2005 if (err)
2006 return err;
2007 }
2008 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2009 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2010 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2011 false, 0);
2012 if (err)
2013 return err;
2014 }
2015
2016 /* Make sure the max shaper is disabled in all hierarcies that
2017 * support it.
2018 */
2019 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2020 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2021 MLXSW_REG_QEEC_MAS_DIS);
2022 if (err)
2023 return err;
2024 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2025 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2026 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2027 i, 0,
2028 MLXSW_REG_QEEC_MAS_DIS);
2029 if (err)
2030 return err;
2031 }
2032 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2033 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2034 MLXSW_REG_QEEC_HIERARCY_TC,
2035 i, i,
2036 MLXSW_REG_QEEC_MAS_DIS);
2037 if (err)
2038 return err;
2039 }
2040
2041 /* Map all priorities to traffic class 0. */
2042 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2043 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2044 if (err)
2045 return err;
2046 }
2047
2048 return 0;
2049 }
2050
2051 static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2052 bool split, u8 module, u8 width, u8 lane)
2053 {
2054 struct mlxsw_sp_port *mlxsw_sp_port;
2055 struct net_device *dev;
2056 size_t bytes;
2057 int err;
2058
2059 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2060 if (!dev)
2061 return -ENOMEM;
2062 mlxsw_sp_port = netdev_priv(dev);
2063 mlxsw_sp_port->dev = dev;
2064 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2065 mlxsw_sp_port->local_port = local_port;
2066 mlxsw_sp_port->split = split;
2067 mlxsw_sp_port->mapping.module = module;
2068 mlxsw_sp_port->mapping.width = width;
2069 mlxsw_sp_port->mapping.lane = lane;
2070 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2071 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2072 if (!mlxsw_sp_port->active_vlans) {
2073 err = -ENOMEM;
2074 goto err_port_active_vlans_alloc;
2075 }
2076 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2077 if (!mlxsw_sp_port->untagged_vlans) {
2078 err = -ENOMEM;
2079 goto err_port_untagged_vlans_alloc;
2080 }
2081 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
2082 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
2083
2084 mlxsw_sp_port->pcpu_stats =
2085 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2086 if (!mlxsw_sp_port->pcpu_stats) {
2087 err = -ENOMEM;
2088 goto err_alloc_stats;
2089 }
2090
2091 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2092 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2093
2094 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2095 if (err) {
2096 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2097 mlxsw_sp_port->local_port);
2098 goto err_dev_addr_init;
2099 }
2100
2101 netif_carrier_off(dev);
2102
2103 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
2104 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2105 dev->hw_features |= NETIF_F_HW_TC;
2106
2107 /* Each packet needs to have a Tx header (metadata) on top all other
2108 * headers.
2109 */
2110 dev->hard_header_len += MLXSW_TXHDR_LEN;
2111
2112 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2113 if (err) {
2114 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2115 mlxsw_sp_port->local_port);
2116 goto err_port_system_port_mapping_set;
2117 }
2118
2119 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2120 if (err) {
2121 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2122 mlxsw_sp_port->local_port);
2123 goto err_port_swid_set;
2124 }
2125
2126 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2127 if (err) {
2128 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2129 mlxsw_sp_port->local_port);
2130 goto err_port_speed_by_width_set;
2131 }
2132
2133 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2134 if (err) {
2135 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2136 mlxsw_sp_port->local_port);
2137 goto err_port_mtu_set;
2138 }
2139
2140 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2141 if (err)
2142 goto err_port_admin_status_set;
2143
2144 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2145 if (err) {
2146 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2147 mlxsw_sp_port->local_port);
2148 goto err_port_buffers_init;
2149 }
2150
2151 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2152 if (err) {
2153 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2154 mlxsw_sp_port->local_port);
2155 goto err_port_ets_init;
2156 }
2157
2158 /* ETS and buffers must be initialized before DCB. */
2159 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2160 if (err) {
2161 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2162 mlxsw_sp_port->local_port);
2163 goto err_port_dcb_init;
2164 }
2165
2166 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
2167 err = register_netdev(dev);
2168 if (err) {
2169 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2170 mlxsw_sp_port->local_port);
2171 goto err_register_netdev;
2172 }
2173
2174 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2175 mlxsw_sp_port->local_port, dev,
2176 mlxsw_sp_port->split, module);
2177 if (err) {
2178 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2179 mlxsw_sp_port->local_port);
2180 goto err_core_port_init;
2181 }
2182
2183 err = mlxsw_sp_port_vlan_init(mlxsw_sp_port);
2184 if (err)
2185 goto err_port_vlan_init;
2186
2187 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
2188 return 0;
2189
2190 err_port_vlan_init:
2191 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
2192 err_core_port_init:
2193 unregister_netdev(dev);
2194 err_register_netdev:
2195 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
2196 err_port_dcb_init:
2197 err_port_ets_init:
2198 err_port_buffers_init:
2199 err_port_admin_status_set:
2200 err_port_mtu_set:
2201 err_port_speed_by_width_set:
2202 err_port_swid_set:
2203 err_port_system_port_mapping_set:
2204 err_dev_addr_init:
2205 free_percpu(mlxsw_sp_port->pcpu_stats);
2206 err_alloc_stats:
2207 kfree(mlxsw_sp_port->untagged_vlans);
2208 err_port_untagged_vlans_alloc:
2209 kfree(mlxsw_sp_port->active_vlans);
2210 err_port_active_vlans_alloc:
2211 free_netdev(dev);
2212 return err;
2213 }
2214
2215 static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2216 {
2217 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2218
2219 if (!mlxsw_sp_port)
2220 return;
2221 mlxsw_sp->ports[local_port] = NULL;
2222 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
2223 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
2224 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
2225 mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2226 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
2227 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2228 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
2229 free_percpu(mlxsw_sp_port->pcpu_stats);
2230 kfree(mlxsw_sp_port->untagged_vlans);
2231 kfree(mlxsw_sp_port->active_vlans);
2232 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
2233 free_netdev(mlxsw_sp_port->dev);
2234 }
2235
2236 static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2237 {
2238 int i;
2239
2240 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2241 mlxsw_sp_port_remove(mlxsw_sp, i);
2242 kfree(mlxsw_sp->ports);
2243 }
2244
2245 static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2246 {
2247 u8 module, width, lane;
2248 size_t alloc_size;
2249 int i;
2250 int err;
2251
2252 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2253 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2254 if (!mlxsw_sp->ports)
2255 return -ENOMEM;
2256
2257 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
2258 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
2259 &width, &lane);
2260 if (err)
2261 goto err_port_module_info_get;
2262 if (!width)
2263 continue;
2264 mlxsw_sp->port_to_module[i] = module;
2265 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2266 lane);
2267 if (err)
2268 goto err_port_create;
2269 }
2270 return 0;
2271
2272 err_port_create:
2273 err_port_module_info_get:
2274 for (i--; i >= 1; i--)
2275 mlxsw_sp_port_remove(mlxsw_sp, i);
2276 kfree(mlxsw_sp->ports);
2277 return err;
2278 }
2279
2280 static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2281 {
2282 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2283
2284 return local_port - offset;
2285 }
2286
2287 static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2288 u8 module, unsigned int count)
2289 {
2290 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2291 int err, i;
2292
2293 for (i = 0; i < count; i++) {
2294 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2295 width, i * width);
2296 if (err)
2297 goto err_port_module_map;
2298 }
2299
2300 for (i = 0; i < count; i++) {
2301 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2302 if (err)
2303 goto err_port_swid_set;
2304 }
2305
2306 for (i = 0; i < count; i++) {
2307 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
2308 module, width, i * width);
2309 if (err)
2310 goto err_port_create;
2311 }
2312
2313 return 0;
2314
2315 err_port_create:
2316 for (i--; i >= 0; i--)
2317 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2318 i = count;
2319 err_port_swid_set:
2320 for (i--; i >= 0; i--)
2321 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2322 MLXSW_PORT_SWID_DISABLED_PORT);
2323 i = count;
2324 err_port_module_map:
2325 for (i--; i >= 0; i--)
2326 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2327 return err;
2328 }
2329
2330 static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2331 u8 base_port, unsigned int count)
2332 {
2333 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2334 int i;
2335
2336 /* Split by four means we need to re-create two ports, otherwise
2337 * only one.
2338 */
2339 count = count / 2;
2340
2341 for (i = 0; i < count; i++) {
2342 local_port = base_port + i * 2;
2343 module = mlxsw_sp->port_to_module[local_port];
2344
2345 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2346 0);
2347 }
2348
2349 for (i = 0; i < count; i++)
2350 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2351
2352 for (i = 0; i < count; i++) {
2353 local_port = base_port + i * 2;
2354 module = mlxsw_sp->port_to_module[local_port];
2355
2356 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
2357 width, 0);
2358 }
2359 }
2360
2361 static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2362 unsigned int count)
2363 {
2364 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2365 struct mlxsw_sp_port *mlxsw_sp_port;
2366 u8 module, cur_width, base_port;
2367 int i;
2368 int err;
2369
2370 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2371 if (!mlxsw_sp_port) {
2372 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2373 local_port);
2374 return -EINVAL;
2375 }
2376
2377 module = mlxsw_sp_port->mapping.module;
2378 cur_width = mlxsw_sp_port->mapping.width;
2379
2380 if (count != 2 && count != 4) {
2381 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2382 return -EINVAL;
2383 }
2384
2385 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2386 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2387 return -EINVAL;
2388 }
2389
2390 /* Make sure we have enough slave (even) ports for the split. */
2391 if (count == 2) {
2392 base_port = local_port;
2393 if (mlxsw_sp->ports[base_port + 1]) {
2394 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2395 return -EINVAL;
2396 }
2397 } else {
2398 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2399 if (mlxsw_sp->ports[base_port + 1] ||
2400 mlxsw_sp->ports[base_port + 3]) {
2401 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2402 return -EINVAL;
2403 }
2404 }
2405
2406 for (i = 0; i < count; i++)
2407 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2408
2409 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2410 if (err) {
2411 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2412 goto err_port_split_create;
2413 }
2414
2415 return 0;
2416
2417 err_port_split_create:
2418 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
2419 return err;
2420 }
2421
2422 static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
2423 {
2424 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2425 struct mlxsw_sp_port *mlxsw_sp_port;
2426 u8 cur_width, base_port;
2427 unsigned int count;
2428 int i;
2429
2430 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2431 if (!mlxsw_sp_port) {
2432 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2433 local_port);
2434 return -EINVAL;
2435 }
2436
2437 if (!mlxsw_sp_port->split) {
2438 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2439 return -EINVAL;
2440 }
2441
2442 cur_width = mlxsw_sp_port->mapping.width;
2443 count = cur_width == 1 ? 4 : 2;
2444
2445 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2446
2447 /* Determine which ports to remove. */
2448 if (count == 2 && local_port >= base_port + 2)
2449 base_port = base_port + 2;
2450
2451 for (i = 0; i < count; i++)
2452 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2453
2454 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
2455
2456 return 0;
2457 }
2458
2459 static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2460 char *pude_pl, void *priv)
2461 {
2462 struct mlxsw_sp *mlxsw_sp = priv;
2463 struct mlxsw_sp_port *mlxsw_sp_port;
2464 enum mlxsw_reg_pude_oper_status status;
2465 u8 local_port;
2466
2467 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2468 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2469 if (!mlxsw_sp_port)
2470 return;
2471
2472 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2473 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2474 netdev_info(mlxsw_sp_port->dev, "link up\n");
2475 netif_carrier_on(mlxsw_sp_port->dev);
2476 } else {
2477 netdev_info(mlxsw_sp_port->dev, "link down\n");
2478 netif_carrier_off(mlxsw_sp_port->dev);
2479 }
2480 }
2481
2482 static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2483 .func = mlxsw_sp_pude_event_func,
2484 .trap_id = MLXSW_TRAP_ID_PUDE,
2485 };
2486
2487 static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2488 enum mlxsw_event_trap_id trap_id)
2489 {
2490 struct mlxsw_event_listener *el;
2491 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2492 int err;
2493
2494 switch (trap_id) {
2495 case MLXSW_TRAP_ID_PUDE:
2496 el = &mlxsw_sp_pude_event;
2497 break;
2498 }
2499 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2500 if (err)
2501 return err;
2502
2503 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2504 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2505 if (err)
2506 goto err_event_trap_set;
2507
2508 return 0;
2509
2510 err_event_trap_set:
2511 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2512 return err;
2513 }
2514
2515 static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2516 enum mlxsw_event_trap_id trap_id)
2517 {
2518 struct mlxsw_event_listener *el;
2519
2520 switch (trap_id) {
2521 case MLXSW_TRAP_ID_PUDE:
2522 el = &mlxsw_sp_pude_event;
2523 break;
2524 }
2525 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2526 }
2527
2528 static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2529 void *priv)
2530 {
2531 struct mlxsw_sp *mlxsw_sp = priv;
2532 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2533 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2534
2535 if (unlikely(!mlxsw_sp_port)) {
2536 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2537 local_port);
2538 return;
2539 }
2540
2541 skb->dev = mlxsw_sp_port->dev;
2542
2543 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2544 u64_stats_update_begin(&pcpu_stats->syncp);
2545 pcpu_stats->rx_packets++;
2546 pcpu_stats->rx_bytes += skb->len;
2547 u64_stats_update_end(&pcpu_stats->syncp);
2548
2549 skb->protocol = eth_type_trans(skb, skb->dev);
2550 netif_receive_skb(skb);
2551 }
2552
2553 static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
2554 {
2555 .func = mlxsw_sp_rx_listener_func,
2556 .local_port = MLXSW_PORT_DONT_CARE,
2557 .trap_id = MLXSW_TRAP_ID_FDB_MC,
2558 },
2559 /* Traps for specific L2 packet types, not trapped as FDB MC */
2560 {
2561 .func = mlxsw_sp_rx_listener_func,
2562 .local_port = MLXSW_PORT_DONT_CARE,
2563 .trap_id = MLXSW_TRAP_ID_STP,
2564 },
2565 {
2566 .func = mlxsw_sp_rx_listener_func,
2567 .local_port = MLXSW_PORT_DONT_CARE,
2568 .trap_id = MLXSW_TRAP_ID_LACP,
2569 },
2570 {
2571 .func = mlxsw_sp_rx_listener_func,
2572 .local_port = MLXSW_PORT_DONT_CARE,
2573 .trap_id = MLXSW_TRAP_ID_EAPOL,
2574 },
2575 {
2576 .func = mlxsw_sp_rx_listener_func,
2577 .local_port = MLXSW_PORT_DONT_CARE,
2578 .trap_id = MLXSW_TRAP_ID_LLDP,
2579 },
2580 {
2581 .func = mlxsw_sp_rx_listener_func,
2582 .local_port = MLXSW_PORT_DONT_CARE,
2583 .trap_id = MLXSW_TRAP_ID_MMRP,
2584 },
2585 {
2586 .func = mlxsw_sp_rx_listener_func,
2587 .local_port = MLXSW_PORT_DONT_CARE,
2588 .trap_id = MLXSW_TRAP_ID_MVRP,
2589 },
2590 {
2591 .func = mlxsw_sp_rx_listener_func,
2592 .local_port = MLXSW_PORT_DONT_CARE,
2593 .trap_id = MLXSW_TRAP_ID_RPVST,
2594 },
2595 {
2596 .func = mlxsw_sp_rx_listener_func,
2597 .local_port = MLXSW_PORT_DONT_CARE,
2598 .trap_id = MLXSW_TRAP_ID_DHCP,
2599 },
2600 {
2601 .func = mlxsw_sp_rx_listener_func,
2602 .local_port = MLXSW_PORT_DONT_CARE,
2603 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
2604 },
2605 {
2606 .func = mlxsw_sp_rx_listener_func,
2607 .local_port = MLXSW_PORT_DONT_CARE,
2608 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
2609 },
2610 {
2611 .func = mlxsw_sp_rx_listener_func,
2612 .local_port = MLXSW_PORT_DONT_CARE,
2613 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
2614 },
2615 {
2616 .func = mlxsw_sp_rx_listener_func,
2617 .local_port = MLXSW_PORT_DONT_CARE,
2618 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
2619 },
2620 {
2621 .func = mlxsw_sp_rx_listener_func,
2622 .local_port = MLXSW_PORT_DONT_CARE,
2623 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
2624 },
2625 {
2626 .func = mlxsw_sp_rx_listener_func,
2627 .local_port = MLXSW_PORT_DONT_CARE,
2628 .trap_id = MLXSW_TRAP_ID_ARPBC,
2629 },
2630 {
2631 .func = mlxsw_sp_rx_listener_func,
2632 .local_port = MLXSW_PORT_DONT_CARE,
2633 .trap_id = MLXSW_TRAP_ID_ARPUC,
2634 },
2635 {
2636 .func = mlxsw_sp_rx_listener_func,
2637 .local_port = MLXSW_PORT_DONT_CARE,
2638 .trap_id = MLXSW_TRAP_ID_IP2ME,
2639 },
2640 {
2641 .func = mlxsw_sp_rx_listener_func,
2642 .local_port = MLXSW_PORT_DONT_CARE,
2643 .trap_id = MLXSW_TRAP_ID_RTR_INGRESS0,
2644 },
2645 {
2646 .func = mlxsw_sp_rx_listener_func,
2647 .local_port = MLXSW_PORT_DONT_CARE,
2648 .trap_id = MLXSW_TRAP_ID_HOST_MISS_IPV4,
2649 },
2650 };
2651
2652 static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2653 {
2654 char htgt_pl[MLXSW_REG_HTGT_LEN];
2655 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2656 int i;
2657 int err;
2658
2659 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2660 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2661 if (err)
2662 return err;
2663
2664 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2665 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2666 if (err)
2667 return err;
2668
2669 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2670 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2671 &mlxsw_sp_rx_listener[i],
2672 mlxsw_sp);
2673 if (err)
2674 goto err_rx_listener_register;
2675
2676 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
2677 mlxsw_sp_rx_listener[i].trap_id);
2678 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2679 if (err)
2680 goto err_rx_trap_set;
2681 }
2682 return 0;
2683
2684 err_rx_trap_set:
2685 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2686 &mlxsw_sp_rx_listener[i],
2687 mlxsw_sp);
2688 err_rx_listener_register:
2689 for (i--; i >= 0; i--) {
2690 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
2691 mlxsw_sp_rx_listener[i].trap_id);
2692 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2693
2694 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2695 &mlxsw_sp_rx_listener[i],
2696 mlxsw_sp);
2697 }
2698 return err;
2699 }
2700
2701 static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2702 {
2703 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2704 int i;
2705
2706 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2707 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
2708 mlxsw_sp_rx_listener[i].trap_id);
2709 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2710
2711 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2712 &mlxsw_sp_rx_listener[i],
2713 mlxsw_sp);
2714 }
2715 }
2716
2717 static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2718 enum mlxsw_reg_sfgc_type type,
2719 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2720 {
2721 enum mlxsw_flood_table_type table_type;
2722 enum mlxsw_sp_flood_table flood_table;
2723 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2724
2725 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
2726 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
2727 else
2728 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
2729
2730 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2731 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2732 else
2733 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
2734
2735 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2736 flood_table);
2737 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2738 }
2739
2740 static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2741 {
2742 int type, err;
2743
2744 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2745 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2746 continue;
2747
2748 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2749 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2750 if (err)
2751 return err;
2752
2753 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2754 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2755 if (err)
2756 return err;
2757 }
2758
2759 return 0;
2760 }
2761
2762 static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2763 {
2764 char slcr_pl[MLXSW_REG_SLCR_LEN];
2765
2766 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2767 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2768 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2769 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2770 MLXSW_REG_SLCR_LAG_HASH_SIP |
2771 MLXSW_REG_SLCR_LAG_HASH_DIP |
2772 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2773 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2774 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2775 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2776 }
2777
2778 static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
2779 const struct mlxsw_bus_info *mlxsw_bus_info)
2780 {
2781 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2782 int err;
2783
2784 mlxsw_sp->core = mlxsw_core;
2785 mlxsw_sp->bus_info = mlxsw_bus_info;
2786 INIT_LIST_HEAD(&mlxsw_sp->fids);
2787 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
2788 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
2789
2790 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2791 if (err) {
2792 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2793 return err;
2794 }
2795
2796 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2797 if (err) {
2798 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
2799 return err;
2800 }
2801
2802 err = mlxsw_sp_traps_init(mlxsw_sp);
2803 if (err) {
2804 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2805 goto err_rx_listener_register;
2806 }
2807
2808 err = mlxsw_sp_flood_init(mlxsw_sp);
2809 if (err) {
2810 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2811 goto err_flood_init;
2812 }
2813
2814 err = mlxsw_sp_buffers_init(mlxsw_sp);
2815 if (err) {
2816 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2817 goto err_buffers_init;
2818 }
2819
2820 err = mlxsw_sp_lag_init(mlxsw_sp);
2821 if (err) {
2822 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2823 goto err_lag_init;
2824 }
2825
2826 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2827 if (err) {
2828 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2829 goto err_switchdev_init;
2830 }
2831
2832 err = mlxsw_sp_router_init(mlxsw_sp);
2833 if (err) {
2834 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2835 goto err_router_init;
2836 }
2837
2838 err = mlxsw_sp_span_init(mlxsw_sp);
2839 if (err) {
2840 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2841 goto err_span_init;
2842 }
2843
2844 err = mlxsw_sp_ports_create(mlxsw_sp);
2845 if (err) {
2846 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2847 goto err_ports_create;
2848 }
2849
2850 return 0;
2851
2852 err_ports_create:
2853 mlxsw_sp_span_fini(mlxsw_sp);
2854 err_span_init:
2855 mlxsw_sp_router_fini(mlxsw_sp);
2856 err_router_init:
2857 mlxsw_sp_switchdev_fini(mlxsw_sp);
2858 err_switchdev_init:
2859 err_lag_init:
2860 mlxsw_sp_buffers_fini(mlxsw_sp);
2861 err_buffers_init:
2862 err_flood_init:
2863 mlxsw_sp_traps_fini(mlxsw_sp);
2864 err_rx_listener_register:
2865 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2866 return err;
2867 }
2868
2869 static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
2870 {
2871 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2872 int i;
2873
2874 mlxsw_sp_ports_remove(mlxsw_sp);
2875 mlxsw_sp_span_fini(mlxsw_sp);
2876 mlxsw_sp_router_fini(mlxsw_sp);
2877 mlxsw_sp_switchdev_fini(mlxsw_sp);
2878 mlxsw_sp_buffers_fini(mlxsw_sp);
2879 mlxsw_sp_traps_fini(mlxsw_sp);
2880 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2881 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
2882 WARN_ON(!list_empty(&mlxsw_sp->fids));
2883 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2884 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
2885 }
2886
2887 static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2888 .used_max_vepa_channels = 1,
2889 .max_vepa_channels = 0,
2890 .used_max_lag = 1,
2891 .max_lag = MLXSW_SP_LAG_MAX,
2892 .used_max_port_per_lag = 1,
2893 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
2894 .used_max_mid = 1,
2895 .max_mid = MLXSW_SP_MID_MAX,
2896 .used_max_pgt = 1,
2897 .max_pgt = 0,
2898 .used_max_system_port = 1,
2899 .max_system_port = 64,
2900 .used_max_vlan_groups = 1,
2901 .max_vlan_groups = 127,
2902 .used_max_regions = 1,
2903 .max_regions = 400,
2904 .used_flood_tables = 1,
2905 .used_flood_mode = 1,
2906 .flood_mode = 3,
2907 .max_fid_offset_flood_tables = 2,
2908 .fid_offset_flood_table_size = VLAN_N_VID - 1,
2909 .max_fid_flood_tables = 2,
2910 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
2911 .used_max_ib_mc = 1,
2912 .max_ib_mc = 0,
2913 .used_max_pkey = 1,
2914 .max_pkey = 0,
2915 .used_kvd_sizes = 1,
2916 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
2917 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
2918 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
2919 .swid_config = {
2920 {
2921 .used_type = 1,
2922 .type = MLXSW_PORT_SWID_TYPE_ETH,
2923 }
2924 },
2925 .resource_query_enable = 1,
2926 };
2927
2928 static struct mlxsw_driver mlxsw_sp_driver = {
2929 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2930 .owner = THIS_MODULE,
2931 .priv_size = sizeof(struct mlxsw_sp),
2932 .init = mlxsw_sp_init,
2933 .fini = mlxsw_sp_fini,
2934 .port_split = mlxsw_sp_port_split,
2935 .port_unsplit = mlxsw_sp_port_unsplit,
2936 .sb_pool_get = mlxsw_sp_sb_pool_get,
2937 .sb_pool_set = mlxsw_sp_sb_pool_set,
2938 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
2939 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
2940 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
2941 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
2942 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
2943 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
2944 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
2945 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
2946 .txhdr_construct = mlxsw_sp_txhdr_construct,
2947 .txhdr_len = MLXSW_TXHDR_LEN,
2948 .profile = &mlxsw_sp_config_profile,
2949 };
2950
2951 static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2952 {
2953 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2954 }
2955
2956 static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
2957 {
2958 struct net_device *lower_dev;
2959 struct list_head *iter;
2960
2961 if (mlxsw_sp_port_dev_check(dev))
2962 return netdev_priv(dev);
2963
2964 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
2965 if (mlxsw_sp_port_dev_check(lower_dev))
2966 return netdev_priv(lower_dev);
2967 }
2968 return NULL;
2969 }
2970
2971 static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
2972 {
2973 struct mlxsw_sp_port *mlxsw_sp_port;
2974
2975 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
2976 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
2977 }
2978
2979 static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
2980 {
2981 struct net_device *lower_dev;
2982 struct list_head *iter;
2983
2984 if (mlxsw_sp_port_dev_check(dev))
2985 return netdev_priv(dev);
2986
2987 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
2988 if (mlxsw_sp_port_dev_check(lower_dev))
2989 return netdev_priv(lower_dev);
2990 }
2991 return NULL;
2992 }
2993
2994 struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
2995 {
2996 struct mlxsw_sp_port *mlxsw_sp_port;
2997
2998 rcu_read_lock();
2999 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3000 if (mlxsw_sp_port)
3001 dev_hold(mlxsw_sp_port->dev);
3002 rcu_read_unlock();
3003 return mlxsw_sp_port;
3004 }
3005
3006 void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3007 {
3008 dev_put(mlxsw_sp_port->dev);
3009 }
3010
3011 static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3012 unsigned long event)
3013 {
3014 switch (event) {
3015 case NETDEV_UP:
3016 if (!r)
3017 return true;
3018 r->ref_count++;
3019 return false;
3020 case NETDEV_DOWN:
3021 if (r && --r->ref_count == 0)
3022 return true;
3023 /* It is possible we already removed the RIF ourselves
3024 * if it was assigned to a netdev that is now a bridge
3025 * or LAG slave.
3026 */
3027 return false;
3028 }
3029
3030 return false;
3031 }
3032
3033 static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3034 {
3035 int i;
3036
3037 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3038 if (!mlxsw_sp->rifs[i])
3039 return i;
3040
3041 return MLXSW_SP_RIF_MAX;
3042 }
3043
3044 static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3045 bool *p_lagged, u16 *p_system_port)
3046 {
3047 u8 local_port = mlxsw_sp_vport->local_port;
3048
3049 *p_lagged = mlxsw_sp_vport->lagged;
3050 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3051 }
3052
3053 static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3054 struct net_device *l3_dev, u16 rif,
3055 bool create)
3056 {
3057 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3058 bool lagged = mlxsw_sp_vport->lagged;
3059 char ritr_pl[MLXSW_REG_RITR_LEN];
3060 u16 system_port;
3061
3062 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3063 l3_dev->mtu, l3_dev->dev_addr);
3064
3065 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3066 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3067 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3068
3069 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3070 }
3071
3072 static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3073
3074 static struct mlxsw_sp_fid *
3075 mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3076 {
3077 struct mlxsw_sp_fid *f;
3078
3079 f = kzalloc(sizeof(*f), GFP_KERNEL);
3080 if (!f)
3081 return NULL;
3082
3083 f->leave = mlxsw_sp_vport_rif_sp_leave;
3084 f->ref_count = 0;
3085 f->dev = l3_dev;
3086 f->fid = fid;
3087
3088 return f;
3089 }
3090
3091 static struct mlxsw_sp_rif *
3092 mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3093 {
3094 struct mlxsw_sp_rif *r;
3095
3096 r = kzalloc(sizeof(*r), GFP_KERNEL);
3097 if (!r)
3098 return NULL;
3099
3100 ether_addr_copy(r->addr, l3_dev->dev_addr);
3101 r->mtu = l3_dev->mtu;
3102 r->ref_count = 1;
3103 r->dev = l3_dev;
3104 r->rif = rif;
3105 r->f = f;
3106
3107 return r;
3108 }
3109
3110 static struct mlxsw_sp_rif *
3111 mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3112 struct net_device *l3_dev)
3113 {
3114 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3115 struct mlxsw_sp_fid *f;
3116 struct mlxsw_sp_rif *r;
3117 u16 fid, rif;
3118 int err;
3119
3120 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3121 if (rif == MLXSW_SP_RIF_MAX)
3122 return ERR_PTR(-ERANGE);
3123
3124 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3125 if (err)
3126 return ERR_PTR(err);
3127
3128 fid = mlxsw_sp_rif_sp_to_fid(rif);
3129 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3130 if (err)
3131 goto err_rif_fdb_op;
3132
3133 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3134 if (!f) {
3135 err = -ENOMEM;
3136 goto err_rfid_alloc;
3137 }
3138
3139 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3140 if (!r) {
3141 err = -ENOMEM;
3142 goto err_rif_alloc;
3143 }
3144
3145 f->r = r;
3146 mlxsw_sp->rifs[rif] = r;
3147
3148 return r;
3149
3150 err_rif_alloc:
3151 kfree(f);
3152 err_rfid_alloc:
3153 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3154 err_rif_fdb_op:
3155 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3156 return ERR_PTR(err);
3157 }
3158
3159 static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3160 struct mlxsw_sp_rif *r)
3161 {
3162 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3163 struct net_device *l3_dev = r->dev;
3164 struct mlxsw_sp_fid *f = r->f;
3165 u16 fid = f->fid;
3166 u16 rif = r->rif;
3167
3168 mlxsw_sp->rifs[rif] = NULL;
3169 f->r = NULL;
3170
3171 kfree(r);
3172
3173 kfree(f);
3174
3175 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3176
3177 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3178 }
3179
3180 static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3181 struct net_device *l3_dev)
3182 {
3183 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3184 struct mlxsw_sp_rif *r;
3185
3186 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3187 if (!r) {
3188 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3189 if (IS_ERR(r))
3190 return PTR_ERR(r);
3191 }
3192
3193 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3194 r->f->ref_count++;
3195
3196 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3197
3198 return 0;
3199 }
3200
3201 static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3202 {
3203 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3204
3205 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3206
3207 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3208 if (--f->ref_count == 0)
3209 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3210 }
3211
3212 static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3213 struct net_device *port_dev,
3214 unsigned long event, u16 vid)
3215 {
3216 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3217 struct mlxsw_sp_port *mlxsw_sp_vport;
3218
3219 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3220 if (WARN_ON(!mlxsw_sp_vport))
3221 return -EINVAL;
3222
3223 switch (event) {
3224 case NETDEV_UP:
3225 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3226 case NETDEV_DOWN:
3227 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3228 break;
3229 }
3230
3231 return 0;
3232 }
3233
3234 static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3235 unsigned long event)
3236 {
3237 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3238 return 0;
3239
3240 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3241 }
3242
3243 static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3244 struct net_device *lag_dev,
3245 unsigned long event, u16 vid)
3246 {
3247 struct net_device *port_dev;
3248 struct list_head *iter;
3249 int err;
3250
3251 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3252 if (mlxsw_sp_port_dev_check(port_dev)) {
3253 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3254 event, vid);
3255 if (err)
3256 return err;
3257 }
3258 }
3259
3260 return 0;
3261 }
3262
3263 static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3264 unsigned long event)
3265 {
3266 if (netif_is_bridge_port(lag_dev))
3267 return 0;
3268
3269 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3270 }
3271
3272 static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3273 struct net_device *l3_dev)
3274 {
3275 u16 fid;
3276
3277 if (is_vlan_dev(l3_dev))
3278 fid = vlan_dev_vlan_id(l3_dev);
3279 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3280 fid = 1;
3281 else
3282 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3283
3284 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3285 }
3286
3287 static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3288 {
3289 if (mlxsw_sp_fid_is_vfid(fid))
3290 return MLXSW_REG_RITR_FID_IF;
3291 else
3292 return MLXSW_REG_RITR_VLAN_IF;
3293 }
3294
3295 static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3296 struct net_device *l3_dev,
3297 u16 fid, u16 rif,
3298 bool create)
3299 {
3300 enum mlxsw_reg_ritr_if_type rif_type;
3301 char ritr_pl[MLXSW_REG_RITR_LEN];
3302
3303 rif_type = mlxsw_sp_rif_type_get(fid);
3304 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3305 l3_dev->dev_addr);
3306 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3307
3308 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3309 }
3310
3311 static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3312 struct net_device *l3_dev,
3313 struct mlxsw_sp_fid *f)
3314 {
3315 struct mlxsw_sp_rif *r;
3316 u16 rif;
3317 int err;
3318
3319 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3320 if (rif == MLXSW_SP_RIF_MAX)
3321 return -ERANGE;
3322
3323 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3324 if (err)
3325 return err;
3326
3327 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3328 if (err)
3329 goto err_rif_fdb_op;
3330
3331 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3332 if (!r) {
3333 err = -ENOMEM;
3334 goto err_rif_alloc;
3335 }
3336
3337 f->r = r;
3338 mlxsw_sp->rifs[rif] = r;
3339
3340 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3341
3342 return 0;
3343
3344 err_rif_alloc:
3345 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3346 err_rif_fdb_op:
3347 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3348 return err;
3349 }
3350
3351 void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3352 struct mlxsw_sp_rif *r)
3353 {
3354 struct net_device *l3_dev = r->dev;
3355 struct mlxsw_sp_fid *f = r->f;
3356 u16 rif = r->rif;
3357
3358 mlxsw_sp->rifs[rif] = NULL;
3359 f->r = NULL;
3360
3361 kfree(r);
3362
3363 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3364
3365 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3366
3367 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3368 }
3369
3370 static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3371 struct net_device *br_dev,
3372 unsigned long event)
3373 {
3374 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3375 struct mlxsw_sp_fid *f;
3376
3377 /* FID can either be an actual FID if the L3 device is the
3378 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3379 * L3 device is a VLAN-unaware bridge and we get a vFID.
3380 */
3381 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3382 if (WARN_ON(!f))
3383 return -EINVAL;
3384
3385 switch (event) {
3386 case NETDEV_UP:
3387 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3388 case NETDEV_DOWN:
3389 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3390 break;
3391 }
3392
3393 return 0;
3394 }
3395
3396 static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3397 unsigned long event)
3398 {
3399 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
3400 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
3401 u16 vid = vlan_dev_vlan_id(vlan_dev);
3402
3403 if (mlxsw_sp_port_dev_check(real_dev))
3404 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3405 vid);
3406 else if (netif_is_lag_master(real_dev))
3407 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3408 vid);
3409 else if (netif_is_bridge_master(real_dev) &&
3410 mlxsw_sp->master_bridge.dev == real_dev)
3411 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3412 event);
3413
3414 return 0;
3415 }
3416
3417 static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3418 unsigned long event, void *ptr)
3419 {
3420 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3421 struct net_device *dev = ifa->ifa_dev->dev;
3422 struct mlxsw_sp *mlxsw_sp;
3423 struct mlxsw_sp_rif *r;
3424 int err = 0;
3425
3426 mlxsw_sp = mlxsw_sp_lower_get(dev);
3427 if (!mlxsw_sp)
3428 goto out;
3429
3430 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3431 if (!mlxsw_sp_rif_should_config(r, event))
3432 goto out;
3433
3434 if (mlxsw_sp_port_dev_check(dev))
3435 err = mlxsw_sp_inetaddr_port_event(dev, event);
3436 else if (netif_is_lag_master(dev))
3437 err = mlxsw_sp_inetaddr_lag_event(dev, event);
3438 else if (netif_is_bridge_master(dev))
3439 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
3440 else if (is_vlan_dev(dev))
3441 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3442
3443 out:
3444 return notifier_from_errno(err);
3445 }
3446
3447 static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3448 const char *mac, int mtu)
3449 {
3450 char ritr_pl[MLXSW_REG_RITR_LEN];
3451 int err;
3452
3453 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3454 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3455 if (err)
3456 return err;
3457
3458 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3459 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3460 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3461 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3462 }
3463
3464 static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3465 {
3466 struct mlxsw_sp *mlxsw_sp;
3467 struct mlxsw_sp_rif *r;
3468 int err;
3469
3470 mlxsw_sp = mlxsw_sp_lower_get(dev);
3471 if (!mlxsw_sp)
3472 return 0;
3473
3474 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3475 if (!r)
3476 return 0;
3477
3478 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3479 if (err)
3480 return err;
3481
3482 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3483 if (err)
3484 goto err_rif_edit;
3485
3486 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3487 if (err)
3488 goto err_rif_fdb_op;
3489
3490 ether_addr_copy(r->addr, dev->dev_addr);
3491 r->mtu = dev->mtu;
3492
3493 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3494
3495 return 0;
3496
3497 err_rif_fdb_op:
3498 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3499 err_rif_edit:
3500 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3501 return err;
3502 }
3503
3504 static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3505 u16 fid)
3506 {
3507 if (mlxsw_sp_fid_is_vfid(fid))
3508 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3509 else
3510 return test_bit(fid, lag_port->active_vlans);
3511 }
3512
3513 static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3514 u16 fid)
3515 {
3516 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3517 u8 local_port = mlxsw_sp_port->local_port;
3518 u16 lag_id = mlxsw_sp_port->lag_id;
3519 int i, count = 0;
3520
3521 if (!mlxsw_sp_port->lagged)
3522 return true;
3523
3524 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3525 struct mlxsw_sp_port *lag_port;
3526
3527 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3528 if (!lag_port || lag_port->local_port == local_port)
3529 continue;
3530 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3531 count++;
3532 }
3533
3534 return !count;
3535 }
3536
3537 static int
3538 mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3539 u16 fid)
3540 {
3541 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3542 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3543
3544 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3545 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3546 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3547 mlxsw_sp_port->local_port);
3548
3549 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3550 mlxsw_sp_port->local_port, fid);
3551
3552 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3553 }
3554
3555 static int
3556 mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3557 u16 fid)
3558 {
3559 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3560 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3561
3562 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3563 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3564 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3565
3566 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3567 mlxsw_sp_port->lag_id, fid);
3568
3569 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3570 }
3571
3572 int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
3573 {
3574 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3575 return 0;
3576
3577 if (mlxsw_sp_port->lagged)
3578 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
3579 fid);
3580 else
3581 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
3582 }
3583
3584 static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3585 {
3586 struct mlxsw_sp_fid *f, *tmp;
3587
3588 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3589 if (--f->ref_count == 0)
3590 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3591 else
3592 WARN_ON_ONCE(1);
3593 }
3594
3595 static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3596 struct net_device *br_dev)
3597 {
3598 return !mlxsw_sp->master_bridge.dev ||
3599 mlxsw_sp->master_bridge.dev == br_dev;
3600 }
3601
3602 static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3603 struct net_device *br_dev)
3604 {
3605 mlxsw_sp->master_bridge.dev = br_dev;
3606 mlxsw_sp->master_bridge.ref_count++;
3607 }
3608
3609 static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3610 {
3611 if (--mlxsw_sp->master_bridge.ref_count == 0) {
3612 mlxsw_sp->master_bridge.dev = NULL;
3613 /* It's possible upper VLAN devices are still holding
3614 * references to underlying FIDs. Drop the reference
3615 * and release the resources if it was the last one.
3616 * If it wasn't, then something bad happened.
3617 */
3618 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3619 }
3620 }
3621
3622 static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3623 struct net_device *br_dev)
3624 {
3625 struct net_device *dev = mlxsw_sp_port->dev;
3626 int err;
3627
3628 /* When port is not bridged untagged packets are tagged with
3629 * PVID=VID=1, thereby creating an implicit VLAN interface in
3630 * the device. Remove it and let bridge code take care of its
3631 * own VLANs.
3632 */
3633 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
3634 if (err)
3635 return err;
3636
3637 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3638
3639 mlxsw_sp_port->learning = 1;
3640 mlxsw_sp_port->learning_sync = 1;
3641 mlxsw_sp_port->uc_flood = 1;
3642 mlxsw_sp_port->bridged = 1;
3643
3644 return 0;
3645 }
3646
3647 static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3648 {
3649 struct net_device *dev = mlxsw_sp_port->dev;
3650
3651 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3652
3653 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3654
3655 mlxsw_sp_port->learning = 0;
3656 mlxsw_sp_port->learning_sync = 0;
3657 mlxsw_sp_port->uc_flood = 0;
3658 mlxsw_sp_port->bridged = 0;
3659
3660 /* Add implicit VLAN interface in the device, so that untagged
3661 * packets will be classified to the default vFID.
3662 */
3663 mlxsw_sp_port_add_vid(dev, 0, 1);
3664 }
3665
3666 static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3667 {
3668 char sldr_pl[MLXSW_REG_SLDR_LEN];
3669
3670 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3671 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3672 }
3673
3674 static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3675 {
3676 char sldr_pl[MLXSW_REG_SLDR_LEN];
3677
3678 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3679 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3680 }
3681
3682 static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3683 u16 lag_id, u8 port_index)
3684 {
3685 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3686 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3687
3688 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3689 lag_id, port_index);
3690 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3691 }
3692
3693 static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3694 u16 lag_id)
3695 {
3696 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3697 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3698
3699 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3700 lag_id);
3701 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3702 }
3703
3704 static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3705 u16 lag_id)
3706 {
3707 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3708 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3709
3710 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3711 lag_id);
3712 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3713 }
3714
3715 static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3716 u16 lag_id)
3717 {
3718 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3719 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3720
3721 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3722 lag_id);
3723 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3724 }
3725
3726 static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3727 struct net_device *lag_dev,
3728 u16 *p_lag_id)
3729 {
3730 struct mlxsw_sp_upper *lag;
3731 int free_lag_id = -1;
3732 int i;
3733
3734 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3735 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3736 if (lag->ref_count) {
3737 if (lag->dev == lag_dev) {
3738 *p_lag_id = i;
3739 return 0;
3740 }
3741 } else if (free_lag_id < 0) {
3742 free_lag_id = i;
3743 }
3744 }
3745 if (free_lag_id < 0)
3746 return -EBUSY;
3747 *p_lag_id = free_lag_id;
3748 return 0;
3749 }
3750
3751 static bool
3752 mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3753 struct net_device *lag_dev,
3754 struct netdev_lag_upper_info *lag_upper_info)
3755 {
3756 u16 lag_id;
3757
3758 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3759 return false;
3760 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3761 return false;
3762 return true;
3763 }
3764
3765 static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3766 u16 lag_id, u8 *p_port_index)
3767 {
3768 int i;
3769
3770 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3771 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3772 *p_port_index = i;
3773 return 0;
3774 }
3775 }
3776 return -EBUSY;
3777 }
3778
3779 static void
3780 mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3781 u16 lag_id)
3782 {
3783 struct mlxsw_sp_port *mlxsw_sp_vport;
3784 struct mlxsw_sp_fid *f;
3785
3786 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3787 if (WARN_ON(!mlxsw_sp_vport))
3788 return;
3789
3790 /* If vPort is assigned a RIF, then leave it since it's no
3791 * longer valid.
3792 */
3793 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3794 if (f)
3795 f->leave(mlxsw_sp_vport);
3796
3797 mlxsw_sp_vport->lag_id = lag_id;
3798 mlxsw_sp_vport->lagged = 1;
3799 }
3800
3801 static void
3802 mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3803 {
3804 struct mlxsw_sp_port *mlxsw_sp_vport;
3805 struct mlxsw_sp_fid *f;
3806
3807 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3808 if (WARN_ON(!mlxsw_sp_vport))
3809 return;
3810
3811 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3812 if (f)
3813 f->leave(mlxsw_sp_vport);
3814
3815 mlxsw_sp_vport->lagged = 0;
3816 }
3817
3818 static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3819 struct net_device *lag_dev)
3820 {
3821 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3822 struct mlxsw_sp_upper *lag;
3823 u16 lag_id;
3824 u8 port_index;
3825 int err;
3826
3827 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3828 if (err)
3829 return err;
3830 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3831 if (!lag->ref_count) {
3832 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3833 if (err)
3834 return err;
3835 lag->dev = lag_dev;
3836 }
3837
3838 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3839 if (err)
3840 return err;
3841 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3842 if (err)
3843 goto err_col_port_add;
3844 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3845 if (err)
3846 goto err_col_port_enable;
3847
3848 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3849 mlxsw_sp_port->local_port);
3850 mlxsw_sp_port->lag_id = lag_id;
3851 mlxsw_sp_port->lagged = 1;
3852 lag->ref_count++;
3853
3854 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
3855
3856 return 0;
3857
3858 err_col_port_enable:
3859 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
3860 err_col_port_add:
3861 if (!lag->ref_count)
3862 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
3863 return err;
3864 }
3865
3866 static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3867 struct net_device *lag_dev)
3868 {
3869 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3870 u16 lag_id = mlxsw_sp_port->lag_id;
3871 struct mlxsw_sp_upper *lag;
3872
3873 if (!mlxsw_sp_port->lagged)
3874 return;
3875 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3876 WARN_ON(lag->ref_count == 0);
3877
3878 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3879 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
3880
3881 if (mlxsw_sp_port->bridged) {
3882 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
3883 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
3884 }
3885
3886 if (lag->ref_count == 1)
3887 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
3888
3889 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3890 mlxsw_sp_port->local_port);
3891 mlxsw_sp_port->lagged = 0;
3892 lag->ref_count--;
3893
3894 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
3895 }
3896
3897 static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3898 u16 lag_id)
3899 {
3900 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3901 char sldr_pl[MLXSW_REG_SLDR_LEN];
3902
3903 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3904 mlxsw_sp_port->local_port);
3905 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3906 }
3907
3908 static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3909 u16 lag_id)
3910 {
3911 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3912 char sldr_pl[MLXSW_REG_SLDR_LEN];
3913
3914 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3915 mlxsw_sp_port->local_port);
3916 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3917 }
3918
3919 static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
3920 bool lag_tx_enabled)
3921 {
3922 if (lag_tx_enabled)
3923 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
3924 mlxsw_sp_port->lag_id);
3925 else
3926 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
3927 mlxsw_sp_port->lag_id);
3928 }
3929
3930 static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
3931 struct netdev_lag_lower_state_info *info)
3932 {
3933 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
3934 }
3935
3936 static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
3937 struct net_device *vlan_dev)
3938 {
3939 struct mlxsw_sp_port *mlxsw_sp_vport;
3940 u16 vid = vlan_dev_vlan_id(vlan_dev);
3941
3942 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3943 if (WARN_ON(!mlxsw_sp_vport))
3944 return -EINVAL;
3945
3946 mlxsw_sp_vport->dev = vlan_dev;
3947
3948 return 0;
3949 }
3950
3951 static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
3952 struct net_device *vlan_dev)
3953 {
3954 struct mlxsw_sp_port *mlxsw_sp_vport;
3955 u16 vid = vlan_dev_vlan_id(vlan_dev);
3956
3957 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3958 if (WARN_ON(!mlxsw_sp_vport))
3959 return;
3960
3961 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
3962 }
3963
3964 static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
3965 unsigned long event, void *ptr)
3966 {
3967 struct netdev_notifier_changeupper_info *info;
3968 struct mlxsw_sp_port *mlxsw_sp_port;
3969 struct net_device *upper_dev;
3970 struct mlxsw_sp *mlxsw_sp;
3971 int err = 0;
3972
3973 mlxsw_sp_port = netdev_priv(dev);
3974 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3975 info = ptr;
3976
3977 switch (event) {
3978 case NETDEV_PRECHANGEUPPER:
3979 upper_dev = info->upper_dev;
3980 if (!is_vlan_dev(upper_dev) &&
3981 !netif_is_lag_master(upper_dev) &&
3982 !netif_is_bridge_master(upper_dev))
3983 return -EINVAL;
3984 if (!info->linking)
3985 break;
3986 /* HW limitation forbids to put ports to multiple bridges. */
3987 if (netif_is_bridge_master(upper_dev) &&
3988 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
3989 return -EINVAL;
3990 if (netif_is_lag_master(upper_dev) &&
3991 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
3992 info->upper_info))
3993 return -EINVAL;
3994 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
3995 return -EINVAL;
3996 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
3997 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
3998 return -EINVAL;
3999 break;
4000 case NETDEV_CHANGEUPPER:
4001 upper_dev = info->upper_dev;
4002 if (is_vlan_dev(upper_dev)) {
4003 if (info->linking)
4004 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4005 upper_dev);
4006 else
4007 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4008 upper_dev);
4009 } else if (netif_is_bridge_master(upper_dev)) {
4010 if (info->linking)
4011 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4012 upper_dev);
4013 else
4014 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
4015 } else if (netif_is_lag_master(upper_dev)) {
4016 if (info->linking)
4017 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4018 upper_dev);
4019 else
4020 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4021 upper_dev);
4022 } else {
4023 err = -EINVAL;
4024 WARN_ON(1);
4025 }
4026 break;
4027 }
4028
4029 return err;
4030 }
4031
4032 static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4033 unsigned long event, void *ptr)
4034 {
4035 struct netdev_notifier_changelowerstate_info *info;
4036 struct mlxsw_sp_port *mlxsw_sp_port;
4037 int err;
4038
4039 mlxsw_sp_port = netdev_priv(dev);
4040 info = ptr;
4041
4042 switch (event) {
4043 case NETDEV_CHANGELOWERSTATE:
4044 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4045 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4046 info->lower_state_info);
4047 if (err)
4048 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4049 }
4050 break;
4051 }
4052
4053 return 0;
4054 }
4055
4056 static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4057 unsigned long event, void *ptr)
4058 {
4059 switch (event) {
4060 case NETDEV_PRECHANGEUPPER:
4061 case NETDEV_CHANGEUPPER:
4062 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4063 case NETDEV_CHANGELOWERSTATE:
4064 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4065 }
4066
4067 return 0;
4068 }
4069
4070 static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4071 unsigned long event, void *ptr)
4072 {
4073 struct net_device *dev;
4074 struct list_head *iter;
4075 int ret;
4076
4077 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4078 if (mlxsw_sp_port_dev_check(dev)) {
4079 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4080 if (ret)
4081 return ret;
4082 }
4083 }
4084
4085 return 0;
4086 }
4087
4088 static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4089 struct net_device *vlan_dev)
4090 {
4091 u16 fid = vlan_dev_vlan_id(vlan_dev);
4092 struct mlxsw_sp_fid *f;
4093
4094 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4095 if (!f) {
4096 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4097 if (IS_ERR(f))
4098 return PTR_ERR(f);
4099 }
4100
4101 f->ref_count++;
4102
4103 return 0;
4104 }
4105
4106 static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4107 struct net_device *vlan_dev)
4108 {
4109 u16 fid = vlan_dev_vlan_id(vlan_dev);
4110 struct mlxsw_sp_fid *f;
4111
4112 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4113 if (f && f->r)
4114 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
4115 if (f && --f->ref_count == 0)
4116 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4117 }
4118
4119 static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4120 unsigned long event, void *ptr)
4121 {
4122 struct netdev_notifier_changeupper_info *info;
4123 struct net_device *upper_dev;
4124 struct mlxsw_sp *mlxsw_sp;
4125 int err;
4126
4127 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4128 if (!mlxsw_sp)
4129 return 0;
4130 if (br_dev != mlxsw_sp->master_bridge.dev)
4131 return 0;
4132
4133 info = ptr;
4134
4135 switch (event) {
4136 case NETDEV_CHANGEUPPER:
4137 upper_dev = info->upper_dev;
4138 if (!is_vlan_dev(upper_dev))
4139 break;
4140 if (info->linking) {
4141 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4142 upper_dev);
4143 if (err)
4144 return err;
4145 } else {
4146 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4147 }
4148 break;
4149 }
4150
4151 return 0;
4152 }
4153
4154 static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
4155 {
4156 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
4157 MLXSW_SP_VFID_MAX);
4158 }
4159
4160 static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4161 {
4162 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4163
4164 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4165 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
4166 }
4167
4168 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
4169
4170 static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4171 struct net_device *br_dev)
4172 {
4173 struct device *dev = mlxsw_sp->bus_info->dev;
4174 struct mlxsw_sp_fid *f;
4175 u16 vfid, fid;
4176 int err;
4177
4178 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
4179 if (vfid == MLXSW_SP_VFID_MAX) {
4180 dev_err(dev, "No available vFIDs\n");
4181 return ERR_PTR(-ERANGE);
4182 }
4183
4184 fid = mlxsw_sp_vfid_to_fid(vfid);
4185 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
4186 if (err) {
4187 dev_err(dev, "Failed to create FID=%d\n", fid);
4188 return ERR_PTR(err);
4189 }
4190
4191 f = kzalloc(sizeof(*f), GFP_KERNEL);
4192 if (!f)
4193 goto err_allocate_vfid;
4194
4195 f->leave = mlxsw_sp_vport_vfid_leave;
4196 f->fid = fid;
4197 f->dev = br_dev;
4198
4199 list_add(&f->list, &mlxsw_sp->vfids.list);
4200 set_bit(vfid, mlxsw_sp->vfids.mapped);
4201
4202 return f;
4203
4204 err_allocate_vfid:
4205 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
4206 return ERR_PTR(-ENOMEM);
4207 }
4208
4209 static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4210 struct mlxsw_sp_fid *f)
4211 {
4212 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
4213 u16 fid = f->fid;
4214
4215 clear_bit(vfid, mlxsw_sp->vfids.mapped);
4216 list_del(&f->list);
4217
4218 if (f->r)
4219 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
4220
4221 kfree(f);
4222
4223 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
4224 }
4225
4226 static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4227 bool valid)
4228 {
4229 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4230 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4231
4232 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4233 vid);
4234 }
4235
4236 static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4237 struct net_device *br_dev)
4238 {
4239 struct mlxsw_sp_fid *f;
4240 int err;
4241
4242 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
4243 if (!f) {
4244 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
4245 if (IS_ERR(f))
4246 return PTR_ERR(f);
4247 }
4248
4249 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4250 if (err)
4251 goto err_vport_flood_set;
4252
4253 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4254 if (err)
4255 goto err_vport_fid_map;
4256
4257 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
4258 f->ref_count++;
4259
4260 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4261
4262 return 0;
4263
4264 err_vport_fid_map:
4265 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4266 err_vport_flood_set:
4267 if (!f->ref_count)
4268 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
4269 return err;
4270 }
4271
4272 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
4273 {
4274 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4275
4276 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4277
4278 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4279
4280 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4281
4282 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4283
4284 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
4285 if (--f->ref_count == 0)
4286 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
4287 }
4288
4289 static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4290 struct net_device *br_dev)
4291 {
4292 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4293 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4294 struct net_device *dev = mlxsw_sp_vport->dev;
4295 int err;
4296
4297 if (f && !WARN_ON(!f->leave))
4298 f->leave(mlxsw_sp_vport);
4299
4300 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
4301 if (err) {
4302 netdev_err(dev, "Failed to join vFID\n");
4303 return err;
4304 }
4305
4306 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4307 if (err) {
4308 netdev_err(dev, "Failed to enable learning\n");
4309 goto err_port_vid_learning_set;
4310 }
4311
4312 mlxsw_sp_vport->learning = 1;
4313 mlxsw_sp_vport->learning_sync = 1;
4314 mlxsw_sp_vport->uc_flood = 1;
4315 mlxsw_sp_vport->bridged = 1;
4316
4317 return 0;
4318
4319 err_port_vid_learning_set:
4320 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
4321 return err;
4322 }
4323
4324 static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
4325 {
4326 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4327
4328 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4329
4330 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
4331
4332 mlxsw_sp_vport->learning = 0;
4333 mlxsw_sp_vport->learning_sync = 0;
4334 mlxsw_sp_vport->uc_flood = 0;
4335 mlxsw_sp_vport->bridged = 0;
4336 }
4337
4338 static bool
4339 mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4340 const struct net_device *br_dev)
4341 {
4342 struct mlxsw_sp_port *mlxsw_sp_vport;
4343
4344 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4345 vport.list) {
4346 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
4347
4348 if (dev && dev == br_dev)
4349 return false;
4350 }
4351
4352 return true;
4353 }
4354
4355 static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4356 unsigned long event, void *ptr,
4357 u16 vid)
4358 {
4359 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4360 struct netdev_notifier_changeupper_info *info = ptr;
4361 struct mlxsw_sp_port *mlxsw_sp_vport;
4362 struct net_device *upper_dev;
4363 int err = 0;
4364
4365 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4366
4367 switch (event) {
4368 case NETDEV_PRECHANGEUPPER:
4369 upper_dev = info->upper_dev;
4370 if (!netif_is_bridge_master(upper_dev))
4371 return -EINVAL;
4372 if (!info->linking)
4373 break;
4374 /* We can't have multiple VLAN interfaces configured on
4375 * the same port and being members in the same bridge.
4376 */
4377 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4378 upper_dev))
4379 return -EINVAL;
4380 break;
4381 case NETDEV_CHANGEUPPER:
4382 upper_dev = info->upper_dev;
4383 if (info->linking) {
4384 if (WARN_ON(!mlxsw_sp_vport))
4385 return -EINVAL;
4386 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4387 upper_dev);
4388 } else {
4389 if (!mlxsw_sp_vport)
4390 return 0;
4391 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
4392 }
4393 }
4394
4395 return err;
4396 }
4397
4398 static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4399 unsigned long event, void *ptr,
4400 u16 vid)
4401 {
4402 struct net_device *dev;
4403 struct list_head *iter;
4404 int ret;
4405
4406 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4407 if (mlxsw_sp_port_dev_check(dev)) {
4408 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4409 vid);
4410 if (ret)
4411 return ret;
4412 }
4413 }
4414
4415 return 0;
4416 }
4417
4418 static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4419 unsigned long event, void *ptr)
4420 {
4421 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4422 u16 vid = vlan_dev_vlan_id(vlan_dev);
4423
4424 if (mlxsw_sp_port_dev_check(real_dev))
4425 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4426 vid);
4427 else if (netif_is_lag_master(real_dev))
4428 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4429 vid);
4430
4431 return 0;
4432 }
4433
4434 static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4435 unsigned long event, void *ptr)
4436 {
4437 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
4438 int err = 0;
4439
4440 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4441 err = mlxsw_sp_netdevice_router_port_event(dev);
4442 else if (mlxsw_sp_port_dev_check(dev))
4443 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4444 else if (netif_is_lag_master(dev))
4445 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
4446 else if (netif_is_bridge_master(dev))
4447 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
4448 else if (is_vlan_dev(dev))
4449 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
4450
4451 return notifier_from_errno(err);
4452 }
4453
4454 static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4455 .notifier_call = mlxsw_sp_netdevice_event,
4456 };
4457
4458 static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4459 .notifier_call = mlxsw_sp_inetaddr_event,
4460 .priority = 10, /* Must be called before FIB notifier block */
4461 };
4462
4463 static int __init mlxsw_sp_module_init(void)
4464 {
4465 int err;
4466
4467 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4468 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4469 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4470 if (err)
4471 goto err_core_driver_register;
4472 return 0;
4473
4474 err_core_driver_register:
4475 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4476 return err;
4477 }
4478
4479 static void __exit mlxsw_sp_module_exit(void)
4480 {
4481 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
4482 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4483 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4484 }
4485
4486 module_init(mlxsw_sp_module_init);
4487 module_exit(mlxsw_sp_module_exit);
4488
4489 MODULE_LICENSE("Dual BSD/GPL");
4490 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4491 MODULE_DESCRIPTION("Mellanox Spectrum driver");
4492 MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);
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