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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Header file for sonic.c
4 *
5 * (C) Waldorf Electronics, Germany
6 * Written by Andreas Busse
7 *
8 * NOTE: most of the structure definitions here are endian dependent.
9 * If you want to use this driver on big endian machines, the data
10 * and pad structure members must be exchanged. Also, the structures
11 * need to be changed accordingly to the bus size.
12 *
13 * 981229 MSch: did just that for the 68k Mac port (32 bit, big endian)
14 *
15 * 990611 David Huggins-Daines <dhd@debian.org>: This machine abstraction
16 * does not cope with 16-bit bus sizes very well. Therefore I have
17 * rewritten it with ugly macros and evil inlines.
18 *
19 * 050625 Finn Thain: introduced more 32-bit cards and dhd's support
20 * for 16-bit cards (from the mac68k project).
21 */
22
23 #ifndef SONIC_H
24 #define SONIC_H
25
26
27 /*
28 * SONIC register offsets
29 */
30
31 #define SONIC_CMD 0x00
32 #define SONIC_DCR 0x01
33 #define SONIC_RCR 0x02
34 #define SONIC_TCR 0x03
35 #define SONIC_IMR 0x04
36 #define SONIC_ISR 0x05
37
38 #define SONIC_UTDA 0x06
39 #define SONIC_CTDA 0x07
40
41 #define SONIC_URDA 0x0d
42 #define SONIC_CRDA 0x0e
43 #define SONIC_EOBC 0x13
44 #define SONIC_URRA 0x14
45 #define SONIC_RSA 0x15
46 #define SONIC_REA 0x16
47 #define SONIC_RRP 0x17
48 #define SONIC_RWP 0x18
49 #define SONIC_RSC 0x2b
50
51 #define SONIC_CEP 0x21
52 #define SONIC_CAP2 0x22
53 #define SONIC_CAP1 0x23
54 #define SONIC_CAP0 0x24
55 #define SONIC_CE 0x25
56 #define SONIC_CDP 0x26
57 #define SONIC_CDC 0x27
58
59 #define SONIC_WT0 0x29
60 #define SONIC_WT1 0x2a
61
62 #define SONIC_SR 0x28
63
64
65 /* test-only registers */
66
67 #define SONIC_TPS 0x08
68 #define SONIC_TFC 0x09
69 #define SONIC_TSA0 0x0a
70 #define SONIC_TSA1 0x0b
71 #define SONIC_TFS 0x0c
72
73 #define SONIC_CRBA0 0x0f
74 #define SONIC_CRBA1 0x10
75 #define SONIC_RBWC0 0x11
76 #define SONIC_RBWC1 0x12
77 #define SONIC_TTDA 0x20
78 #define SONIC_MDT 0x2f
79
80 #define SONIC_TRBA0 0x19
81 #define SONIC_TRBA1 0x1a
82 #define SONIC_TBWC0 0x1b
83 #define SONIC_TBWC1 0x1c
84 #define SONIC_LLFA 0x1f
85
86 #define SONIC_ADDR0 0x1d
87 #define SONIC_ADDR1 0x1e
88
89 /*
90 * Error counters
91 */
92
93 #define SONIC_CRCT 0x2c
94 #define SONIC_FAET 0x2d
95 #define SONIC_MPT 0x2e
96
97 #define SONIC_DCR2 0x3f
98
99 /*
100 * SONIC command bits
101 */
102
103 #define SONIC_CR_LCAM 0x0200
104 #define SONIC_CR_RRRA 0x0100
105 #define SONIC_CR_RST 0x0080
106 #define SONIC_CR_ST 0x0020
107 #define SONIC_CR_STP 0x0010
108 #define SONIC_CR_RXEN 0x0008
109 #define SONIC_CR_RXDIS 0x0004
110 #define SONIC_CR_TXP 0x0002
111 #define SONIC_CR_HTX 0x0001
112
113 /*
114 * SONIC data configuration bits
115 */
116
117 #define SONIC_DCR_EXBUS 0x8000
118 #define SONIC_DCR_LBR 0x2000
119 #define SONIC_DCR_PO1 0x1000
120 #define SONIC_DCR_PO0 0x0800
121 #define SONIC_DCR_SBUS 0x0400
122 #define SONIC_DCR_USR1 0x0200
123 #define SONIC_DCR_USR0 0x0100
124 #define SONIC_DCR_WC1 0x0080
125 #define SONIC_DCR_WC0 0x0040
126 #define SONIC_DCR_DW 0x0020
127 #define SONIC_DCR_BMS 0x0010
128 #define SONIC_DCR_RFT1 0x0008
129 #define SONIC_DCR_RFT0 0x0004
130 #define SONIC_DCR_TFT1 0x0002
131 #define SONIC_DCR_TFT0 0x0001
132
133 /*
134 * Constants for the SONIC receive control register.
135 */
136
137 #define SONIC_RCR_ERR 0x8000
138 #define SONIC_RCR_RNT 0x4000
139 #define SONIC_RCR_BRD 0x2000
140 #define SONIC_RCR_PRO 0x1000
141 #define SONIC_RCR_AMC 0x0800
142 #define SONIC_RCR_LB1 0x0400
143 #define SONIC_RCR_LB0 0x0200
144
145 #define SONIC_RCR_MC 0x0100
146 #define SONIC_RCR_BC 0x0080
147 #define SONIC_RCR_LPKT 0x0040
148 #define SONIC_RCR_CRS 0x0020
149 #define SONIC_RCR_COL 0x0010
150 #define SONIC_RCR_CRCR 0x0008
151 #define SONIC_RCR_FAER 0x0004
152 #define SONIC_RCR_LBK 0x0002
153 #define SONIC_RCR_PRX 0x0001
154
155 #define SONIC_RCR_LB_OFF 0
156 #define SONIC_RCR_LB_MAC SONIC_RCR_LB0
157 #define SONIC_RCR_LB_ENDEC SONIC_RCR_LB1
158 #define SONIC_RCR_LB_TRANS (SONIC_RCR_LB0 | SONIC_RCR_LB1)
159
160 /* default RCR setup */
161
162 #define SONIC_RCR_DEFAULT (SONIC_RCR_BRD)
163
164
165 /*
166 * SONIC Transmit Control register bits
167 */
168
169 #define SONIC_TCR_PINTR 0x8000
170 #define SONIC_TCR_POWC 0x4000
171 #define SONIC_TCR_CRCI 0x2000
172 #define SONIC_TCR_EXDIS 0x1000
173 #define SONIC_TCR_EXD 0x0400
174 #define SONIC_TCR_DEF 0x0200
175 #define SONIC_TCR_NCRS 0x0100
176 #define SONIC_TCR_CRLS 0x0080
177 #define SONIC_TCR_EXC 0x0040
178 #define SONIC_TCR_OWC 0x0020
179 #define SONIC_TCR_PMB 0x0008
180 #define SONIC_TCR_FU 0x0004
181 #define SONIC_TCR_BCM 0x0002
182 #define SONIC_TCR_PTX 0x0001
183
184 #define SONIC_TCR_DEFAULT 0x0000
185
186 /*
187 * Constants for the SONIC_INTERRUPT_MASK and
188 * SONIC_INTERRUPT_STATUS registers.
189 */
190
191 #define SONIC_INT_BR 0x4000
192 #define SONIC_INT_HBL 0x2000
193 #define SONIC_INT_LCD 0x1000
194 #define SONIC_INT_PINT 0x0800
195 #define SONIC_INT_PKTRX 0x0400
196 #define SONIC_INT_TXDN 0x0200
197 #define SONIC_INT_TXER 0x0100
198 #define SONIC_INT_TC 0x0080
199 #define SONIC_INT_RDE 0x0040
200 #define SONIC_INT_RBE 0x0020
201 #define SONIC_INT_RBAE 0x0010
202 #define SONIC_INT_CRC 0x0008
203 #define SONIC_INT_FAE 0x0004
204 #define SONIC_INT_MP 0x0002
205 #define SONIC_INT_RFO 0x0001
206
207
208 /*
209 * The interrupts we allow.
210 */
211
212 #define SONIC_IMR_DEFAULT ( SONIC_INT_BR | \
213 SONIC_INT_LCD | \
214 SONIC_INT_RFO | \
215 SONIC_INT_PKTRX | \
216 SONIC_INT_TXDN | \
217 SONIC_INT_TXER | \
218 SONIC_INT_RDE | \
219 SONIC_INT_RBAE | \
220 SONIC_INT_CRC | \
221 SONIC_INT_FAE | \
222 SONIC_INT_MP)
223
224
225 #define SONIC_EOL 0x0001
226 #define CAM_DESCRIPTORS 16
227
228 /* Offsets in the various DMA buffers accessed by the SONIC */
229
230 #define SONIC_BITMODE16 0
231 #define SONIC_BITMODE32 1
232 #define SONIC_BUS_SCALE(bitmode) ((bitmode) ? 4 : 2)
233 /* Note! These are all measured in bus-size units, so use SONIC_BUS_SCALE */
234 #define SIZEOF_SONIC_RR 4
235 #define SONIC_RR_BUFADR_L 0
236 #define SONIC_RR_BUFADR_H 1
237 #define SONIC_RR_BUFSIZE_L 2
238 #define SONIC_RR_BUFSIZE_H 3
239
240 #define SIZEOF_SONIC_RD 7
241 #define SONIC_RD_STATUS 0
242 #define SONIC_RD_PKTLEN 1
243 #define SONIC_RD_PKTPTR_L 2
244 #define SONIC_RD_PKTPTR_H 3
245 #define SONIC_RD_SEQNO 4
246 #define SONIC_RD_LINK 5
247 #define SONIC_RD_IN_USE 6
248
249 #define SIZEOF_SONIC_TD 8
250 #define SONIC_TD_STATUS 0
251 #define SONIC_TD_CONFIG 1
252 #define SONIC_TD_PKTSIZE 2
253 #define SONIC_TD_FRAG_COUNT 3
254 #define SONIC_TD_FRAG_PTR_L 4
255 #define SONIC_TD_FRAG_PTR_H 5
256 #define SONIC_TD_FRAG_SIZE 6
257 #define SONIC_TD_LINK 7
258
259 #define SIZEOF_SONIC_CD 4
260 #define SONIC_CD_ENTRY_POINTER 0
261 #define SONIC_CD_CAP0 1
262 #define SONIC_CD_CAP1 2
263 #define SONIC_CD_CAP2 3
264
265 #define SIZEOF_SONIC_CDA ((CAM_DESCRIPTORS * SIZEOF_SONIC_CD) + 1)
266 #define SONIC_CDA_CAM_ENABLE (CAM_DESCRIPTORS * SIZEOF_SONIC_CD)
267
268 /*
269 * Some tunables for the buffer areas. Power of 2 is required
270 * the current driver uses one receive buffer for each descriptor.
271 *
272 * MSch: use more buffer space for the slow m68k Macs!
273 */
274 #define SONIC_NUM_RRS 16 /* number of receive resources */
275 #define SONIC_NUM_RDS SONIC_NUM_RRS /* number of receive descriptors */
276 #define SONIC_NUM_TDS 16 /* number of transmit descriptors */
277
278 #define SONIC_RRS_MASK (SONIC_NUM_RRS - 1)
279 #define SONIC_RDS_MASK (SONIC_NUM_RDS - 1)
280 #define SONIC_TDS_MASK (SONIC_NUM_TDS - 1)
281
282 #define SONIC_RBSIZE 1520 /* size of one resource buffer */
283
284 /* Again, measured in bus size units! */
285 #define SIZEOF_SONIC_DESC (SIZEOF_SONIC_CDA \
286 + (SIZEOF_SONIC_TD * SONIC_NUM_TDS) \
287 + (SIZEOF_SONIC_RD * SONIC_NUM_RDS) \
288 + (SIZEOF_SONIC_RR * SONIC_NUM_RRS))
289
290 /* Information that need to be kept for each board. */
291 struct sonic_local {
292 /* Bus size. 0 == 16 bits, 1 == 32 bits. */
293 int dma_bitmode;
294 /* Register offset within the longword (independent of endianness,
295 and varies from one type of Macintosh SONIC to another
296 (Aarrgh)) */
297 int reg_offset;
298 void *descriptors;
299 /* Crud. These areas have to be within the same 64K. Therefore
300 we allocate a desriptors page, and point these to places within it. */
301 void *cda; /* CAM descriptor area */
302 void *tda; /* Transmit descriptor area */
303 void *rra; /* Receive resource area */
304 void *rda; /* Receive descriptor area */
305 struct sk_buff* volatile rx_skb[SONIC_NUM_RRS]; /* packets to be received */
306 struct sk_buff* volatile tx_skb[SONIC_NUM_TDS]; /* packets to be transmitted */
307 unsigned int tx_len[SONIC_NUM_TDS]; /* lengths of tx DMA mappings */
308 /* Logical DMA addresses on MIPS, bus addresses on m68k
309 * (so "laddr" is a bit misleading) */
310 dma_addr_t descriptors_laddr;
311 u32 cda_laddr; /* logical DMA address of CDA */
312 u32 tda_laddr; /* logical DMA address of TDA */
313 u32 rra_laddr; /* logical DMA address of RRA */
314 u32 rda_laddr; /* logical DMA address of RDA */
315 dma_addr_t rx_laddr[SONIC_NUM_RRS]; /* logical DMA addresses of rx skbuffs */
316 dma_addr_t tx_laddr[SONIC_NUM_TDS]; /* logical DMA addresses of tx skbuffs */
317 unsigned int rra_end;
318 unsigned int cur_rwp;
319 unsigned int cur_rx;
320 unsigned int cur_tx; /* first unacked transmit packet */
321 unsigned int eol_rx;
322 unsigned int eol_tx; /* last unacked transmit packet */
323 unsigned int next_tx; /* next free TD */
324 struct device *device; /* generic device */
325 struct net_device_stats stats;
326 spinlock_t lock;
327 };
328
329 #define TX_TIMEOUT (3 * HZ)
330
331 /* Index to functions, as function prototypes. */
332
333 static int sonic_open(struct net_device *dev);
334 static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev);
335 static irqreturn_t sonic_interrupt(int irq, void *dev_id);
336 static void sonic_rx(struct net_device *dev);
337 static int sonic_close(struct net_device *dev);
338 static struct net_device_stats *sonic_get_stats(struct net_device *dev);
339 static void sonic_multicast_list(struct net_device *dev);
340 static int sonic_init(struct net_device *dev);
341 static void sonic_tx_timeout(struct net_device *dev);
342
343 /* Internal inlines for reading/writing DMA buffers. Note that bus
344 size and endianness matter here, whereas they don't for registers,
345 as far as we can tell. */
346 /* OpenBSD calls this "SWO". I'd like to think that sonic_buf_put()
347 is a much better name. */
348 static inline void sonic_buf_put(u16 *base, int bitmode,
349 int offset, __u16 val)
350 {
351 if (bitmode)
352 #ifdef __BIG_ENDIAN
353 __raw_writew(val, base + (offset * 2) + 1);
354 #else
355 __raw_writew(val, base + (offset * 2) + 0);
356 #endif
357 else
358 __raw_writew(val, base + (offset * 1) + 0);
359 }
360
361 static inline __u16 sonic_buf_get(u16 *base, int bitmode,
362 int offset)
363 {
364 if (bitmode)
365 #ifdef __BIG_ENDIAN
366 return __raw_readw(base + (offset * 2) + 1);
367 #else
368 return __raw_readw(base + (offset * 2) + 0);
369 #endif
370 else
371 return __raw_readw(base + (offset * 1) + 0);
372 }
373
374 /* Inlines that you should actually use for reading/writing DMA buffers */
375 static inline void sonic_cda_put(struct net_device* dev, int entry,
376 int offset, __u16 val)
377 {
378 struct sonic_local *lp = netdev_priv(dev);
379 sonic_buf_put(lp->cda, lp->dma_bitmode,
380 (entry * SIZEOF_SONIC_CD) + offset, val);
381 }
382
383 static inline __u16 sonic_cda_get(struct net_device* dev, int entry,
384 int offset)
385 {
386 struct sonic_local *lp = netdev_priv(dev);
387 return sonic_buf_get(lp->cda, lp->dma_bitmode,
388 (entry * SIZEOF_SONIC_CD) + offset);
389 }
390
391 static inline void sonic_set_cam_enable(struct net_device* dev, __u16 val)
392 {
393 struct sonic_local *lp = netdev_priv(dev);
394 sonic_buf_put(lp->cda, lp->dma_bitmode, SONIC_CDA_CAM_ENABLE, val);
395 }
396
397 static inline __u16 sonic_get_cam_enable(struct net_device* dev)
398 {
399 struct sonic_local *lp = netdev_priv(dev);
400 return sonic_buf_get(lp->cda, lp->dma_bitmode, SONIC_CDA_CAM_ENABLE);
401 }
402
403 static inline void sonic_tda_put(struct net_device* dev, int entry,
404 int offset, __u16 val)
405 {
406 struct sonic_local *lp = netdev_priv(dev);
407 sonic_buf_put(lp->tda, lp->dma_bitmode,
408 (entry * SIZEOF_SONIC_TD) + offset, val);
409 }
410
411 static inline __u16 sonic_tda_get(struct net_device* dev, int entry,
412 int offset)
413 {
414 struct sonic_local *lp = netdev_priv(dev);
415 return sonic_buf_get(lp->tda, lp->dma_bitmode,
416 (entry * SIZEOF_SONIC_TD) + offset);
417 }
418
419 static inline void sonic_rda_put(struct net_device* dev, int entry,
420 int offset, __u16 val)
421 {
422 struct sonic_local *lp = netdev_priv(dev);
423 sonic_buf_put(lp->rda, lp->dma_bitmode,
424 (entry * SIZEOF_SONIC_RD) + offset, val);
425 }
426
427 static inline __u16 sonic_rda_get(struct net_device* dev, int entry,
428 int offset)
429 {
430 struct sonic_local *lp = netdev_priv(dev);
431 return sonic_buf_get(lp->rda, lp->dma_bitmode,
432 (entry * SIZEOF_SONIC_RD) + offset);
433 }
434
435 static inline void sonic_rra_put(struct net_device* dev, int entry,
436 int offset, __u16 val)
437 {
438 struct sonic_local *lp = netdev_priv(dev);
439 sonic_buf_put(lp->rra, lp->dma_bitmode,
440 (entry * SIZEOF_SONIC_RR) + offset, val);
441 }
442
443 static inline __u16 sonic_rra_get(struct net_device* dev, int entry,
444 int offset)
445 {
446 struct sonic_local *lp = netdev_priv(dev);
447 return sonic_buf_get(lp->rra, lp->dma_bitmode,
448 (entry * SIZEOF_SONIC_RR) + offset);
449 }
450
451 static const char version[] =
452 "sonic.c:v0.92 20.9.98 tsbogend@alpha.franken.de\n";
453
454 #endif /* SONIC_H */