drivers/net/ethernet/netronome/nfp/nfp_asm.c

   1 /*
   2  * Copyright (C) 2016-2017 Netronome Systems, Inc.
   3  *
   4  * This software is dual licensed under the GNU General License Version 2,
   5  * June 1991 as shown in the file COPYING in the top-level directory of this
   6  * source tree or the BSD 2-Clause License provided below.  You have the
   7  * option to license this software under the complete terms of either license.
   8  *
   9  * The BSD 2-Clause License:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      1. Redistributions of source code must retain the above
  16  *         copyright notice, this list of conditions and the following
  17  *         disclaimer.
  18  *
  19  *      2. Redistributions in binary form must reproduce the above
  20  *         copyright notice, this list of conditions and the following
  21  *         disclaimer in the documentation and/or other materials
  22  *         provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/bitops.h>
  35 #include <linux/errno.h>
  36 #include <linux/kernel.h>
  37 #include <linux/string.h>
  38 #include <linux/types.h>
  39
  40 #include "nfp_asm.h"
  41
  42 const struct cmd_tgt_act cmd_tgt_act[__CMD_TGT_MAP_SIZE] = {
  43         [CMD_TGT_WRITE8] =              { 0x00, 0x42 },
  44         [CMD_TGT_READ8] =               { 0x01, 0x43 },
  45         [CMD_TGT_READ32] =              { 0x00, 0x5c },
  46         [CMD_TGT_READ32_LE] =           { 0x01, 0x5c },
  47         [CMD_TGT_READ32_SWAP] =         { 0x02, 0x5c },
  48         [CMD_TGT_READ_LE] =             { 0x01, 0x40 },
  49         [CMD_TGT_READ_SWAP_LE] =        { 0x03, 0x40 },
  50 };
  51
  52 static u16 nfp_swreg_to_unreg(swreg reg, bool is_dst)
  53 {
  54         bool lm_id, lm_dec = false;
  55         u16 val = swreg_value(reg);
  56
  57         switch (swreg_type(reg)) {
  58         case NN_REG_GPR_A:
  59         case NN_REG_GPR_B:
  60         case NN_REG_GPR_BOTH:
  61                 return val;
  62         case NN_REG_NNR:
  63                 return UR_REG_NN | val;
  64         case NN_REG_XFER:
  65                 return UR_REG_XFR | val;
  66         case NN_REG_LMEM:
  67                 lm_id = swreg_lm_idx(reg);
  68
  69                 switch (swreg_lm_mode(reg)) {
  70                 case NN_LM_MOD_NONE:
  71                         if (val & ~UR_REG_LM_IDX_MAX) {
  72                                 pr_err("LM offset too large\n");
  73                                 return 0;
  74                         }
  75                         return UR_REG_LM | FIELD_PREP(UR_REG_LM_IDX, lm_id) |
  76                                 val;
  77                 case NN_LM_MOD_DEC:
  78                         lm_dec = true;
  79                         /* fall through */
  80                 case NN_LM_MOD_INC:
  81                         if (val) {
  82                                 pr_err("LM offset in inc/dev mode\n");
  83                                 return 0;
  84                         }
  85                         return UR_REG_LM | UR_REG_LM_POST_MOD |
  86                                 FIELD_PREP(UR_REG_LM_IDX, lm_id) |
  87                                 FIELD_PREP(UR_REG_LM_POST_MOD_DEC, lm_dec);
  88                 default:
  89                         pr_err("bad LM mode for unrestricted operands %d\n",
  90                                swreg_lm_mode(reg));
  91                         return 0;
  92                 }
  93         case NN_REG_IMM:
  94                 if (val & ~0xff) {
  95                         pr_err("immediate too large\n");
  96                         return 0;
  97                 }
  98                 return UR_REG_IMM_encode(val);
  99         case NN_REG_NONE:
 100                 return is_dst ? UR_REG_NO_DST : REG_NONE;
 101         }
 102
 103         pr_err("unrecognized reg encoding %08x\n", reg);
 104         return 0;
 105 }
 106
 107 int swreg_to_unrestricted(swreg dst, swreg lreg, swreg rreg,
 108                           struct nfp_insn_ur_regs *reg)
 109 {
 110         memset(reg, 0, sizeof(*reg));
 111
 112         /* Decode destination */
 113         if (swreg_type(dst) == NN_REG_IMM)
 114                 return -EFAULT;
 115
 116         if (swreg_type(dst) == NN_REG_GPR_B)
 117                 reg->dst_ab = ALU_DST_B;
 118         if (swreg_type(dst) == NN_REG_GPR_BOTH)
 119                 reg->wr_both = true;
 120         reg->dst = nfp_swreg_to_unreg(dst, true);
 121
 122         /* Decode source operands */
 123         if (swreg_type(lreg) == swreg_type(rreg))
 124                 return -EFAULT;
 125
 126         if (swreg_type(lreg) == NN_REG_GPR_B ||
 127             swreg_type(rreg) == NN_REG_GPR_A) {
 128                 reg->areg = nfp_swreg_to_unreg(rreg, false);
 129                 reg->breg = nfp_swreg_to_unreg(lreg, false);
 130                 reg->swap = true;
 131         } else {
 132                 reg->areg = nfp_swreg_to_unreg(lreg, false);
 133                 reg->breg = nfp_swreg_to_unreg(rreg, false);
 134         }
 135
 136         reg->dst_lmextn = swreg_lmextn(dst);
 137         reg->src_lmextn = swreg_lmextn(lreg) | swreg_lmextn(rreg);
 138
 139         return 0;
 140 }
 141
 142 static u16 nfp_swreg_to_rereg(swreg reg, bool is_dst, bool has_imm8, bool *i8)
 143 {
 144         u16 val = swreg_value(reg);
 145         bool lm_id;
 146
 147         switch (swreg_type(reg)) {
 148         case NN_REG_GPR_A:
 149         case NN_REG_GPR_B:
 150         case NN_REG_GPR_BOTH:
 151                 return val;
 152         case NN_REG_XFER:
 153                 return RE_REG_XFR | val;
 154         case NN_REG_LMEM:
 155                 lm_id = swreg_lm_idx(reg);
 156
 157                 if (swreg_lm_mode(reg) != NN_LM_MOD_NONE) {
 158                         pr_err("bad LM mode for restricted operands %d\n",
 159                                swreg_lm_mode(reg));
 160                         return 0;
 161                 }
 162
 163                 if (val & ~RE_REG_LM_IDX_MAX) {
 164                         pr_err("LM offset too large\n");
 165                         return 0;
 166                 }
 167
 168                 return RE_REG_LM | FIELD_PREP(RE_REG_LM_IDX, lm_id) | val;
 169         case NN_REG_IMM:
 170                 if (val & ~(0x7f | has_imm8 << 7)) {
 171                         pr_err("immediate too large\n");
 172                         return 0;
 173                 }
 174                 *i8 = val & 0x80;
 175                 return RE_REG_IMM_encode(val & 0x7f);
 176         case NN_REG_NONE:
 177                 return is_dst ? RE_REG_NO_DST : REG_NONE;
 178         case NN_REG_NNR:
 179                 pr_err("NNRs used with restricted encoding\n");
 180                 return 0;
 181         }
 182
 183         pr_err("unrecognized reg encoding\n");
 184         return 0;
 185 }
 186
 187 int swreg_to_restricted(swreg dst, swreg lreg, swreg rreg,
 188                         struct nfp_insn_re_regs *reg, bool has_imm8)
 189 {
 190         memset(reg, 0, sizeof(*reg));
 191
 192         /* Decode destination */
 193         if (swreg_type(dst) == NN_REG_IMM)
 194                 return -EFAULT;
 195
 196         if (swreg_type(dst) == NN_REG_GPR_B)
 197                 reg->dst_ab = ALU_DST_B;
 198         if (swreg_type(dst) == NN_REG_GPR_BOTH)
 199                 reg->wr_both = true;
 200         reg->dst = nfp_swreg_to_rereg(dst, true, false, NULL);
 201
 202         /* Decode source operands */
 203         if (swreg_type(lreg) == swreg_type(rreg))
 204                 return -EFAULT;
 205
 206         if (swreg_type(lreg) == NN_REG_GPR_B ||
 207             swreg_type(rreg) == NN_REG_GPR_A) {
 208                 reg->areg = nfp_swreg_to_rereg(rreg, false, has_imm8, &reg->i8);
 209                 reg->breg = nfp_swreg_to_rereg(lreg, false, has_imm8, &reg->i8);
 210                 reg->swap = true;
 211         } else {
 212                 reg->areg = nfp_swreg_to_rereg(lreg, false, has_imm8, &reg->i8);
 213                 reg->breg = nfp_swreg_to_rereg(rreg, false, has_imm8, &reg->i8);
 214         }
 215
 216         reg->dst_lmextn = swreg_lmextn(dst);
 217         reg->src_lmextn = swreg_lmextn(lreg) | swreg_lmextn(rreg);
 218
 219         return 0;
 220 }
 221
 222 #define NFP_USTORE_ECC_POLY_WORDS               7
 223 #define NFP_USTORE_OP_BITS                      45
 224
 225 static const u64 nfp_ustore_ecc_polynomials[NFP_USTORE_ECC_POLY_WORDS] = {
 226         0x0ff800007fffULL,
 227         0x11f801ff801fULL,
 228         0x1e387e0781e1ULL,
 229         0x17cb8e388e22ULL,
 230         0x1af5b2c93244ULL,
 231         0x1f56d5525488ULL,
 232         0x0daf69a46910ULL,
 233 };
 234
 235 static bool parity(u64 value)
 236 {
 237         return hweight64(value) & 1;
 238 }
 239
 240 int nfp_ustore_check_valid_no_ecc(u64 insn)
 241 {
 242         if (insn & ~GENMASK_ULL(NFP_USTORE_OP_BITS, 0))
 243                 return -EINVAL;
 244
 245         return 0;
 246 }
 247
 248 u64 nfp_ustore_calc_ecc_insn(u64 insn)
 249 {
 250         u8 ecc = 0;
 251         int i;
 252
 253         for (i = 0; i < NFP_USTORE_ECC_POLY_WORDS; i++)
 254                 ecc |= parity(nfp_ustore_ecc_polynomials[i] & insn) << i;
 255
 256         return insn | (u64)ecc << NFP_USTORE_OP_BITS;
 257 }