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1 /*
2 * Copyright (C) 2015-2017 Netronome Systems, Inc.
3 *
4 * This software is dual licensed under the GNU General License Version 2,
5 * June 1991 as shown in the file COPYING in the top-level directory of this
6 * source tree or the BSD 2-Clause License provided below. You have the
7 * option to license this software under the complete terms of either license.
8 *
9 * The BSD 2-Clause License:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * 2. Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34 /*
35 * nfp_net_main.c
36 * Netronome network device driver: Main entry point
37 * Authors: Jakub Kicinski <jakub.kicinski@netronome.com>
38 * Alejandro Lucero <alejandro.lucero@netronome.com>
39 * Jason McMullan <jason.mcmullan@netronome.com>
40 * Rolf Neugebauer <rolf.neugebauer@netronome.com>
41 */
42
43 #include <linux/etherdevice.h>
44 #include <linux/kernel.h>
45 #include <linux/init.h>
46 #include <linux/pci.h>
47 #include <linux/pci_regs.h>
48 #include <linux/msi.h>
49 #include <linux/random.h>
50
51 #include "nfpcore/nfp.h"
52 #include "nfpcore/nfp_cpp.h"
53 #include "nfpcore/nfp_nffw.h"
54 #include "nfpcore/nfp_nsp_eth.h"
55 #include "nfpcore/nfp6000_pcie.h"
56
57 #include "nfp_net_ctrl.h"
58 #include "nfp_net.h"
59 #include "nfp_main.h"
60
61 #define NFP_PF_CSR_SLICE_SIZE (32 * 1024)
62
63 static int nfp_is_ready(struct nfp_cpp *cpp)
64 {
65 const char *cp;
66 long state;
67 int err;
68
69 cp = nfp_hwinfo_lookup(cpp, "board.state");
70 if (!cp)
71 return 0;
72
73 err = kstrtol(cp, 0, &state);
74 if (err < 0)
75 return 0;
76
77 return state == 15;
78 }
79
80 /**
81 * nfp_net_map_area() - Help function to map an area
82 * @cpp: NFP CPP handler
83 * @name: Name for the area
84 * @target: CPP target
85 * @addr: CPP address
86 * @size: Size of the area
87 * @area: Area handle (returned).
88 *
89 * This function is primarily to simplify the code in the main probe
90 * function. To undo the effect of this functions call
91 * @nfp_cpp_area_release_free(*area);
92 *
93 * Return: Pointer to memory mapped area or ERR_PTR
94 */
95 static u8 __iomem *nfp_net_map_area(struct nfp_cpp *cpp,
96 const char *name, int isl, int target,
97 unsigned long long addr, unsigned long size,
98 struct nfp_cpp_area **area)
99 {
100 u8 __iomem *res;
101 u32 dest;
102 int err;
103
104 dest = NFP_CPP_ISLAND_ID(target, NFP_CPP_ACTION_RW, 0, isl);
105
106 *area = nfp_cpp_area_alloc_with_name(cpp, dest, name, addr, size);
107 if (!*area) {
108 err = -EIO;
109 goto err_area;
110 }
111
112 err = nfp_cpp_area_acquire(*area);
113 if (err < 0)
114 goto err_acquire;
115
116 res = nfp_cpp_area_iomem(*area);
117 if (!res) {
118 err = -EIO;
119 goto err_map;
120 }
121
122 return res;
123
124 err_map:
125 nfp_cpp_area_release(*area);
126 err_acquire:
127 nfp_cpp_area_free(*area);
128 err_area:
129 return (u8 __iomem *)ERR_PTR(err);
130 }
131
132 static void
133 nfp_net_get_mac_addr_hwinfo(struct nfp_net *nn, struct nfp_cpp *cpp,
134 unsigned int id)
135 {
136 u8 mac_addr[ETH_ALEN];
137 const char *mac_str;
138 char name[32];
139
140 snprintf(name, sizeof(name), "eth%d.mac", id);
141
142 mac_str = nfp_hwinfo_lookup(cpp, name);
143 if (!mac_str) {
144 dev_warn(&nn->pdev->dev,
145 "Can't lookup MAC address. Generate\n");
146 eth_hw_addr_random(nn->netdev);
147 return;
148 }
149
150 if (sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
151 &mac_addr[0], &mac_addr[1], &mac_addr[2],
152 &mac_addr[3], &mac_addr[4], &mac_addr[5]) != 6) {
153 dev_warn(&nn->pdev->dev,
154 "Can't parse MAC address (%s). Generate.\n", mac_str);
155 eth_hw_addr_random(nn->netdev);
156 return;
157 }
158
159 ether_addr_copy(nn->netdev->dev_addr, mac_addr);
160 ether_addr_copy(nn->netdev->perm_addr, mac_addr);
161 }
162
163 /**
164 * nfp_net_get_mac_addr() - Get the MAC address.
165 * @nn: NFP Network structure
166 * @pf: NFP PF device structure
167 * @id: NFP port id
168 *
169 * First try to get the MAC address from NSP ETH table. If that
170 * fails try HWInfo. As a last resort generate a random address.
171 */
172 static void
173 nfp_net_get_mac_addr(struct nfp_net *nn, struct nfp_pf *pf, unsigned int id)
174 {
175 int i;
176
177 for (i = 0; pf->eth_tbl && i < pf->eth_tbl->count; i++)
178 if (pf->eth_tbl->ports[i].eth_index == id) {
179 const u8 *mac_addr = pf->eth_tbl->ports[i].mac_addr;
180
181 nn->eth_port = &pf->eth_tbl->ports[i];
182
183 ether_addr_copy(nn->netdev->dev_addr, mac_addr);
184 ether_addr_copy(nn->netdev->perm_addr, mac_addr);
185 return;
186 }
187
188 nfp_net_get_mac_addr_hwinfo(nn, pf->cpp, id);
189 }
190
191 static unsigned int nfp_net_pf_get_num_ports(struct nfp_pf *pf)
192 {
193 char name[256];
194 u16 interface;
195 int pcie_pf;
196 int err = 0;
197 u64 val;
198
199 interface = nfp_cpp_interface(pf->cpp);
200 pcie_pf = NFP_CPP_INTERFACE_UNIT_of(interface);
201
202 snprintf(name, sizeof(name), "nfd_cfg_pf%d_num_ports", pcie_pf);
203
204 val = nfp_rtsym_read_le(pf->cpp, name, &err);
205 /* Default to one port */
206 if (err) {
207 if (err != -ENOENT)
208 nfp_err(pf->cpp, "Unable to read adapter port count\n");
209 val = 1;
210 }
211
212 return val;
213 }
214
215 static unsigned int
216 nfp_net_pf_total_qcs(struct nfp_pf *pf, void __iomem *ctrl_bar,
217 unsigned int stride, u32 start_off, u32 num_off)
218 {
219 unsigned int i, min_qc, max_qc;
220
221 min_qc = readl(ctrl_bar + start_off);
222 max_qc = min_qc;
223
224 for (i = 0; i < pf->num_ports; i++) {
225 /* To make our lives simpler only accept configuration where
226 * queues are allocated to PFs in order (queues of PFn all have
227 * indexes lower than PFn+1).
228 */
229 if (max_qc > readl(ctrl_bar + start_off))
230 return 0;
231
232 max_qc = readl(ctrl_bar + start_off);
233 max_qc += readl(ctrl_bar + num_off) * stride;
234 ctrl_bar += NFP_PF_CSR_SLICE_SIZE;
235 }
236
237 return max_qc - min_qc;
238 }
239
240 static u8 __iomem *nfp_net_pf_map_ctrl_bar(struct nfp_pf *pf)
241 {
242 const struct nfp_rtsym *ctrl_sym;
243 u8 __iomem *ctrl_bar;
244 char pf_symbol[256];
245 u16 interface;
246 int pcie_pf;
247
248 interface = nfp_cpp_interface(pf->cpp);
249 pcie_pf = NFP_CPP_INTERFACE_UNIT_of(interface);
250
251 snprintf(pf_symbol, sizeof(pf_symbol), "_pf%d_net_bar0", pcie_pf);
252
253 ctrl_sym = nfp_rtsym_lookup(pf->cpp, pf_symbol);
254 if (!ctrl_sym) {
255 dev_err(&pf->pdev->dev,
256 "Failed to find PF BAR0 symbol %s\n", pf_symbol);
257 return NULL;
258 }
259
260 if (ctrl_sym->size < pf->num_ports * NFP_PF_CSR_SLICE_SIZE) {
261 dev_err(&pf->pdev->dev,
262 "PF BAR0 too small to contain %d ports\n",
263 pf->num_ports);
264 return NULL;
265 }
266
267 ctrl_bar = nfp_net_map_area(pf->cpp, "net.ctrl",
268 ctrl_sym->domain, ctrl_sym->target,
269 ctrl_sym->addr, ctrl_sym->size,
270 &pf->ctrl_area);
271 if (IS_ERR(ctrl_bar)) {
272 dev_err(&pf->pdev->dev, "Failed to map PF BAR0: %ld\n",
273 PTR_ERR(ctrl_bar));
274 return NULL;
275 }
276
277 return ctrl_bar;
278 }
279
280 static void nfp_net_pf_free_netdevs(struct nfp_pf *pf)
281 {
282 struct nfp_net *nn;
283
284 while (!list_empty(&pf->ports)) {
285 nn = list_first_entry(&pf->ports, struct nfp_net, port_list);
286 list_del(&nn->port_list);
287
288 nfp_net_netdev_free(nn);
289 }
290 }
291
292 static struct nfp_net *
293 nfp_net_pf_alloc_port_netdev(struct nfp_pf *pf, void __iomem *ctrl_bar,
294 void __iomem *tx_bar, void __iomem *rx_bar,
295 int stride, struct nfp_net_fw_version *fw_ver)
296 {
297 u32 n_tx_rings, n_rx_rings;
298 struct nfp_net *nn;
299
300 n_tx_rings = readl(ctrl_bar + NFP_NET_CFG_MAX_TXRINGS);
301 n_rx_rings = readl(ctrl_bar + NFP_NET_CFG_MAX_RXRINGS);
302
303 /* Allocate and initialise the netdev */
304 nn = nfp_net_netdev_alloc(pf->pdev, n_tx_rings, n_rx_rings);
305 if (IS_ERR(nn))
306 return nn;
307
308 nn->cpp = pf->cpp;
309 nn->fw_ver = *fw_ver;
310 nn->ctrl_bar = ctrl_bar;
311 nn->tx_bar = tx_bar;
312 nn->rx_bar = rx_bar;
313 nn->is_vf = 0;
314 nn->stride_rx = stride;
315 nn->stride_tx = stride;
316
317 return nn;
318 }
319
320 static int
321 nfp_net_pf_init_port_netdev(struct nfp_pf *pf, struct nfp_net *nn,
322 unsigned int id)
323 {
324 int err;
325
326 /* Get MAC address */
327 nfp_net_get_mac_addr(nn, pf, id);
328
329 /* Get ME clock frequency from ctrl BAR
330 * XXX for now frequency is hardcoded until we figure out how
331 * to get the value from nfp-hwinfo into ctrl bar
332 */
333 nn->me_freq_mhz = 1200;
334
335 err = nfp_net_netdev_init(nn->netdev);
336 if (err)
337 return err;
338
339 nfp_net_debugfs_port_add(nn, pf->ddir, id);
340
341 nfp_net_info(nn);
342
343 return 0;
344 }
345
346 static int
347 nfp_net_pf_alloc_netdevs(struct nfp_pf *pf, void __iomem *ctrl_bar,
348 void __iomem *tx_bar, void __iomem *rx_bar,
349 int stride, struct nfp_net_fw_version *fw_ver)
350 {
351 u32 prev_tx_base, prev_rx_base, tgt_tx_base, tgt_rx_base;
352 struct nfp_net *nn;
353 unsigned int i;
354 int err;
355
356 prev_tx_base = readl(ctrl_bar + NFP_NET_CFG_START_TXQ);
357 prev_rx_base = readl(ctrl_bar + NFP_NET_CFG_START_RXQ);
358
359 for (i = 0; i < pf->num_ports; i++) {
360 tgt_tx_base = readl(ctrl_bar + NFP_NET_CFG_START_TXQ);
361 tgt_rx_base = readl(ctrl_bar + NFP_NET_CFG_START_RXQ);
362 tx_bar += (tgt_tx_base - prev_tx_base) * NFP_QCP_QUEUE_ADDR_SZ;
363 rx_bar += (tgt_rx_base - prev_rx_base) * NFP_QCP_QUEUE_ADDR_SZ;
364 prev_tx_base = tgt_tx_base;
365 prev_rx_base = tgt_rx_base;
366
367 nn = nfp_net_pf_alloc_port_netdev(pf, ctrl_bar, tx_bar, rx_bar,
368 stride, fw_ver);
369 if (IS_ERR(nn)) {
370 err = PTR_ERR(nn);
371 goto err_free_prev;
372 }
373 list_add_tail(&nn->port_list, &pf->ports);
374
375 ctrl_bar += NFP_PF_CSR_SLICE_SIZE;
376 }
377
378 return 0;
379
380 err_free_prev:
381 nfp_net_pf_free_netdevs(pf);
382 return err;
383 }
384
385 static int
386 nfp_net_pf_spawn_netdevs(struct nfp_pf *pf,
387 void __iomem *ctrl_bar, void __iomem *tx_bar,
388 void __iomem *rx_bar, int stride,
389 struct nfp_net_fw_version *fw_ver)
390 {
391 unsigned int id, wanted_irqs, num_irqs, ports_left, irqs_left;
392 struct nfp_net *nn;
393 int err;
394
395 /* Allocate the netdevs and do basic init */
396 err = nfp_net_pf_alloc_netdevs(pf, ctrl_bar, tx_bar, rx_bar,
397 stride, fw_ver);
398 if (err)
399 return err;
400
401 /* Get MSI-X vectors */
402 wanted_irqs = 0;
403 list_for_each_entry(nn, &pf->ports, port_list)
404 wanted_irqs += NFP_NET_NON_Q_VECTORS + nn->num_r_vecs;
405 pf->irq_entries = kcalloc(wanted_irqs, sizeof(*pf->irq_entries),
406 GFP_KERNEL);
407 if (!pf->irq_entries) {
408 err = -ENOMEM;
409 goto err_nn_free;
410 }
411
412 num_irqs = nfp_net_irqs_alloc(pf->pdev, pf->irq_entries,
413 NFP_NET_MIN_PORT_IRQS * pf->num_ports,
414 wanted_irqs);
415 if (!num_irqs) {
416 nn_warn(nn, "Unable to allocate MSI-X Vectors. Exiting\n");
417 err = -ENOMEM;
418 goto err_vec_free;
419 }
420
421 /* Distribute IRQs to ports */
422 irqs_left = num_irqs;
423 ports_left = pf->num_ports;
424 list_for_each_entry(nn, &pf->ports, port_list) {
425 unsigned int n;
426
427 n = DIV_ROUND_UP(irqs_left, ports_left);
428 nfp_net_irqs_assign(nn, &pf->irq_entries[num_irqs - irqs_left],
429 n);
430 irqs_left -= n;
431 ports_left--;
432 }
433
434 /* Finish netdev init and register */
435 id = 0;
436 list_for_each_entry(nn, &pf->ports, port_list) {
437 err = nfp_net_pf_init_port_netdev(pf, nn, id);
438 if (err)
439 goto err_prev_deinit;
440
441 id++;
442 }
443
444 return 0;
445
446 err_prev_deinit:
447 list_for_each_entry_continue_reverse(nn, &pf->ports, port_list) {
448 nfp_net_debugfs_dir_clean(&nn->debugfs_dir);
449 nfp_net_netdev_clean(nn->netdev);
450 }
451 nfp_net_irqs_disable(pf->pdev);
452 err_vec_free:
453 kfree(pf->irq_entries);
454 err_nn_free:
455 nfp_net_pf_free_netdevs(pf);
456 return err;
457 }
458
459 /*
460 * PCI device functions
461 */
462 int nfp_net_pci_probe(struct nfp_pf *pf)
463 {
464 u8 __iomem *ctrl_bar, *tx_bar, *rx_bar;
465 u32 total_tx_qcs, total_rx_qcs;
466 struct nfp_net_fw_version fw_ver;
467 u32 tx_area_sz, rx_area_sz;
468 u32 start_q;
469 int stride;
470 int err;
471
472 /* Verify that the board has completed initialization */
473 if (!nfp_is_ready(pf->cpp)) {
474 nfp_err(pf->cpp, "NFP is not ready for NIC operation.\n");
475 return -EINVAL;
476 }
477
478 pf->num_ports = nfp_net_pf_get_num_ports(pf);
479
480 ctrl_bar = nfp_net_pf_map_ctrl_bar(pf);
481 if (!ctrl_bar)
482 return pf->fw_loaded ? -EINVAL : -EPROBE_DEFER;
483
484 nfp_net_get_fw_version(&fw_ver, ctrl_bar);
485 if (fw_ver.resv || fw_ver.class != NFP_NET_CFG_VERSION_CLASS_GENERIC) {
486 nfp_err(pf->cpp, "Unknown Firmware ABI %d.%d.%d.%d\n",
487 fw_ver.resv, fw_ver.class, fw_ver.major, fw_ver.minor);
488 err = -EINVAL;
489 goto err_ctrl_unmap;
490 }
491
492 /* Determine stride */
493 if (nfp_net_fw_ver_eq(&fw_ver, 0, 0, 0, 1)) {
494 stride = 2;
495 nfp_warn(pf->cpp, "OBSOLETE Firmware detected - VF isolation not available\n");
496 } else {
497 switch (fw_ver.major) {
498 case 1 ... 4:
499 stride = 4;
500 break;
501 default:
502 nfp_err(pf->cpp, "Unsupported Firmware ABI %d.%d.%d.%d\n",
503 fw_ver.resv, fw_ver.class,
504 fw_ver.major, fw_ver.minor);
505 err = -EINVAL;
506 goto err_ctrl_unmap;
507 }
508 }
509
510 /* Find how many QC structs need to be mapped */
511 total_tx_qcs = nfp_net_pf_total_qcs(pf, ctrl_bar, stride,
512 NFP_NET_CFG_START_TXQ,
513 NFP_NET_CFG_MAX_TXRINGS);
514 total_rx_qcs = nfp_net_pf_total_qcs(pf, ctrl_bar, stride,
515 NFP_NET_CFG_START_RXQ,
516 NFP_NET_CFG_MAX_RXRINGS);
517 if (!total_tx_qcs || !total_rx_qcs) {
518 nfp_err(pf->cpp, "Invalid PF QC configuration [%d,%d]\n",
519 total_tx_qcs, total_rx_qcs);
520 err = -EINVAL;
521 goto err_ctrl_unmap;
522 }
523
524 tx_area_sz = NFP_QCP_QUEUE_ADDR_SZ * total_tx_qcs;
525 rx_area_sz = NFP_QCP_QUEUE_ADDR_SZ * total_rx_qcs;
526
527 /* Map TX queues */
528 start_q = readl(ctrl_bar + NFP_NET_CFG_START_TXQ);
529 tx_bar = nfp_net_map_area(pf->cpp, "net.tx", 0, 0,
530 NFP_PCIE_QUEUE(start_q),
531 tx_area_sz, &pf->tx_area);
532 if (IS_ERR(tx_bar)) {
533 nfp_err(pf->cpp, "Failed to map TX area.\n");
534 err = PTR_ERR(tx_bar);
535 goto err_ctrl_unmap;
536 }
537
538 /* Map RX queues */
539 start_q = readl(ctrl_bar + NFP_NET_CFG_START_RXQ);
540 rx_bar = nfp_net_map_area(pf->cpp, "net.rx", 0, 0,
541 NFP_PCIE_QUEUE(start_q),
542 rx_area_sz, &pf->rx_area);
543 if (IS_ERR(rx_bar)) {
544 nfp_err(pf->cpp, "Failed to map RX area.\n");
545 err = PTR_ERR(rx_bar);
546 goto err_unmap_tx;
547 }
548
549 pf->ddir = nfp_net_debugfs_device_add(pf->pdev);
550
551 err = nfp_net_pf_spawn_netdevs(pf, ctrl_bar, tx_bar, rx_bar,
552 stride, &fw_ver);
553 if (err)
554 goto err_clean_ddir;
555
556 return 0;
557
558 err_clean_ddir:
559 nfp_net_debugfs_dir_clean(&pf->ddir);
560 nfp_cpp_area_release_free(pf->rx_area);
561 err_unmap_tx:
562 nfp_cpp_area_release_free(pf->tx_area);
563 err_ctrl_unmap:
564 nfp_cpp_area_release_free(pf->ctrl_area);
565 return err;
566 }
567
568 void nfp_net_pci_remove(struct nfp_pf *pf)
569 {
570 struct nfp_net *nn;
571
572 list_for_each_entry(nn, &pf->ports, port_list) {
573 nfp_net_debugfs_dir_clean(&nn->debugfs_dir);
574
575 nfp_net_netdev_clean(nn->netdev);
576 }
577
578 nfp_net_pf_free_netdevs(pf);
579
580 nfp_net_debugfs_dir_clean(&pf->ddir);
581
582 nfp_net_irqs_disable(pf->pdev);
583 kfree(pf->irq_entries);
584
585 nfp_cpp_area_release_free(pf->rx_area);
586 nfp_cpp_area_release_free(pf->tx_area);
587 nfp_cpp_area_release_free(pf->ctrl_area);
588 }