1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006-2007 PA Semi, Inc
5 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
8 #include <linux/module.h>
10 #include <linux/slab.h>
11 #include <linux/interrupt.h>
12 #include <linux/dmaengine.h>
13 #include <linux/delay.h>
14 #include <linux/netdevice.h>
15 #include <linux/of_mdio.h>
16 #include <linux/etherdevice.h>
17 #include <asm/dma-mapping.h>
19 #include <linux/skbuff.h>
22 #include <net/checksum.h>
23 #include <linux/prefetch.h>
26 #include <asm/firmware.h>
27 #include <asm/pasemi_dma.h>
29 #include "pasemi_mac.h"
31 /* We have our own align, since ppc64 in general has it at 0 because
32 * of design flaws in some of the server bridge chips. However, for
33 * PWRficient doing the unaligned copies is more expensive than doing
34 * unaligned DMA, so make sure the data is aligned instead.
36 #define LOCAL_SKB_ALIGN 2
45 #define PE_MIN_MTU (ETH_ZLEN + ETH_HLEN)
46 #define PE_MAX_MTU 9000
47 #define PE_DEF_MTU ETH_DATA_LEN
49 #define DEFAULT_MSG_ENABLE \
59 MODULE_LICENSE("GPL");
60 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
61 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
63 static int debug
= -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
64 module_param(debug
, int, 0);
65 MODULE_PARM_DESC(debug
, "PA Semi MAC bitmapped debugging message enable value");
67 extern const struct ethtool_ops pasemi_mac_ethtool_ops
;
69 static int translation_enabled(void)
71 #if defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
74 return firmware_has_feature(FW_FEATURE_LPAR
);
78 static void write_iob_reg(unsigned int reg
, unsigned int val
)
80 pasemi_write_iob_reg(reg
, val
);
83 static unsigned int read_mac_reg(const struct pasemi_mac
*mac
, unsigned int reg
)
85 return pasemi_read_mac_reg(mac
->dma_if
, reg
);
88 static void write_mac_reg(const struct pasemi_mac
*mac
, unsigned int reg
,
91 pasemi_write_mac_reg(mac
->dma_if
, reg
, val
);
94 static unsigned int read_dma_reg(unsigned int reg
)
96 return pasemi_read_dma_reg(reg
);
99 static void write_dma_reg(unsigned int reg
, unsigned int val
)
101 pasemi_write_dma_reg(reg
, val
);
104 static struct pasemi_mac_rxring
*rx_ring(const struct pasemi_mac
*mac
)
109 static struct pasemi_mac_txring
*tx_ring(const struct pasemi_mac
*mac
)
114 static inline void prefetch_skb(const struct sk_buff
*skb
)
124 static int mac_to_intf(struct pasemi_mac
*mac
)
126 struct pci_dev
*pdev
= mac
->pdev
;
128 int nintf
, off
, i
, j
;
129 int devfn
= pdev
->devfn
;
131 tmp
= read_dma_reg(PAS_DMA_CAP_IFI
);
132 nintf
= (tmp
& PAS_DMA_CAP_IFI_NIN_M
) >> PAS_DMA_CAP_IFI_NIN_S
;
133 off
= (tmp
& PAS_DMA_CAP_IFI_IOFF_M
) >> PAS_DMA_CAP_IFI_IOFF_S
;
135 /* IOFF contains the offset to the registers containing the
136 * DMA interface-to-MAC-pci-id mappings, and NIN contains number
137 * of total interfaces. Each register contains 4 devfns.
138 * Just do a linear search until we find the devfn of the MAC
139 * we're trying to look up.
142 for (i
= 0; i
< (nintf
+3)/4; i
++) {
143 tmp
= read_dma_reg(off
+4*i
);
144 for (j
= 0; j
< 4; j
++) {
145 if (((tmp
>> (8*j
)) & 0xff) == devfn
)
152 static void pasemi_mac_intf_disable(struct pasemi_mac
*mac
)
156 flags
= read_mac_reg(mac
, PAS_MAC_CFG_PCFG
);
157 flags
&= ~PAS_MAC_CFG_PCFG_PE
;
158 write_mac_reg(mac
, PAS_MAC_CFG_PCFG
, flags
);
161 static void pasemi_mac_intf_enable(struct pasemi_mac
*mac
)
165 flags
= read_mac_reg(mac
, PAS_MAC_CFG_PCFG
);
166 flags
|= PAS_MAC_CFG_PCFG_PE
;
167 write_mac_reg(mac
, PAS_MAC_CFG_PCFG
, flags
);
170 static int pasemi_get_mac_addr(struct pasemi_mac
*mac
)
172 struct pci_dev
*pdev
= mac
->pdev
;
173 struct device_node
*dn
= pci_device_to_OF_node(pdev
);
180 "No device node for mac, not configuring\n");
184 maddr
= of_get_property(dn
, "local-mac-address", &len
);
186 if (maddr
&& len
== ETH_ALEN
) {
187 memcpy(mac
->mac_addr
, maddr
, ETH_ALEN
);
191 /* Some old versions of firmware mistakenly uses mac-address
192 * (and as a string) instead of a byte array in local-mac-address.
196 maddr
= of_get_property(dn
, "mac-address", NULL
);
200 "no mac address in device tree, not configuring\n");
204 if (!mac_pton(maddr
, addr
)) {
206 "can't parse mac address, not configuring\n");
210 memcpy(mac
->mac_addr
, addr
, ETH_ALEN
);
215 static int pasemi_mac_set_mac_addr(struct net_device
*dev
, void *p
)
217 struct pasemi_mac
*mac
= netdev_priv(dev
);
218 struct sockaddr
*addr
= p
;
219 unsigned int adr0
, adr1
;
221 if (!is_valid_ether_addr(addr
->sa_data
))
222 return -EADDRNOTAVAIL
;
224 memcpy(dev
->dev_addr
, addr
->sa_data
, dev
->addr_len
);
226 adr0
= dev
->dev_addr
[2] << 24 |
227 dev
->dev_addr
[3] << 16 |
228 dev
->dev_addr
[4] << 8 |
230 adr1
= read_mac_reg(mac
, PAS_MAC_CFG_ADR1
);
232 adr1
|= dev
->dev_addr
[0] << 8 | dev
->dev_addr
[1];
234 pasemi_mac_intf_disable(mac
);
235 write_mac_reg(mac
, PAS_MAC_CFG_ADR0
, adr0
);
236 write_mac_reg(mac
, PAS_MAC_CFG_ADR1
, adr1
);
237 pasemi_mac_intf_enable(mac
);
242 static int pasemi_mac_unmap_tx_skb(struct pasemi_mac
*mac
,
245 const dma_addr_t
*dmas
)
248 struct pci_dev
*pdev
= mac
->dma_pdev
;
250 dma_unmap_single(&pdev
->dev
, dmas
[0], skb_headlen(skb
), DMA_TO_DEVICE
);
252 for (f
= 0; f
< nfrags
; f
++) {
253 const skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[f
];
255 dma_unmap_page(&pdev
->dev
, dmas
[f
+ 1], skb_frag_size(frag
),
258 dev_kfree_skb_irq(skb
);
260 /* Freed descriptor slot + main SKB ptr + nfrags additional ptrs,
261 * aligned up to a power of 2
263 return (nfrags
+ 3) & ~1;
266 static struct pasemi_mac_csring
*pasemi_mac_setup_csring(struct pasemi_mac
*mac
)
268 struct pasemi_mac_csring
*ring
;
273 ring
= pasemi_dma_alloc_chan(TXCHAN
, sizeof(struct pasemi_mac_csring
),
274 offsetof(struct pasemi_mac_csring
, chan
));
277 dev_err(&mac
->pdev
->dev
, "Can't allocate checksum channel\n");
281 chno
= ring
->chan
.chno
;
283 ring
->size
= CS_RING_SIZE
;
284 ring
->next_to_fill
= 0;
286 /* Allocate descriptors */
287 if (pasemi_dma_alloc_ring(&ring
->chan
, CS_RING_SIZE
))
290 write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno
),
291 PAS_DMA_TXCHAN_BASEL_BRBL(ring
->chan
.ring_dma
));
292 val
= PAS_DMA_TXCHAN_BASEU_BRBH(ring
->chan
.ring_dma
>> 32);
293 val
|= PAS_DMA_TXCHAN_BASEU_SIZ(CS_RING_SIZE
>> 3);
295 write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno
), val
);
297 ring
->events
[0] = pasemi_dma_alloc_flag();
298 ring
->events
[1] = pasemi_dma_alloc_flag();
299 if (ring
->events
[0] < 0 || ring
->events
[1] < 0)
302 pasemi_dma_clear_flag(ring
->events
[0]);
303 pasemi_dma_clear_flag(ring
->events
[1]);
305 ring
->fun
= pasemi_dma_alloc_fun();
309 cfg
= PAS_DMA_TXCHAN_CFG_TY_FUNC
| PAS_DMA_TXCHAN_CFG_UP
|
310 PAS_DMA_TXCHAN_CFG_TATTR(ring
->fun
) |
311 PAS_DMA_TXCHAN_CFG_LPSQ
| PAS_DMA_TXCHAN_CFG_LPDQ
;
313 if (translation_enabled())
314 cfg
|= PAS_DMA_TXCHAN_CFG_TRD
| PAS_DMA_TXCHAN_CFG_TRR
;
316 write_dma_reg(PAS_DMA_TXCHAN_CFG(chno
), cfg
);
319 pasemi_dma_start_chan(&ring
->chan
, PAS_DMA_TXCHAN_TCMDSTA_SZ
|
320 PAS_DMA_TXCHAN_TCMDSTA_DB
|
321 PAS_DMA_TXCHAN_TCMDSTA_DE
|
322 PAS_DMA_TXCHAN_TCMDSTA_DA
);
328 if (ring
->events
[0] >= 0)
329 pasemi_dma_free_flag(ring
->events
[0]);
330 if (ring
->events
[1] >= 0)
331 pasemi_dma_free_flag(ring
->events
[1]);
332 pasemi_dma_free_ring(&ring
->chan
);
334 pasemi_dma_free_chan(&ring
->chan
);
340 static void pasemi_mac_setup_csrings(struct pasemi_mac
*mac
)
343 mac
->cs
[0] = pasemi_mac_setup_csring(mac
);
344 if (mac
->type
== MAC_TYPE_XAUI
)
345 mac
->cs
[1] = pasemi_mac_setup_csring(mac
);
349 for (i
= 0; i
< MAX_CS
; i
++)
354 static void pasemi_mac_free_csring(struct pasemi_mac_csring
*csring
)
356 pasemi_dma_stop_chan(&csring
->chan
);
357 pasemi_dma_free_flag(csring
->events
[0]);
358 pasemi_dma_free_flag(csring
->events
[1]);
359 pasemi_dma_free_ring(&csring
->chan
);
360 pasemi_dma_free_chan(&csring
->chan
);
361 pasemi_dma_free_fun(csring
->fun
);
364 static int pasemi_mac_setup_rx_resources(const struct net_device
*dev
)
366 struct pasemi_mac_rxring
*ring
;
367 struct pasemi_mac
*mac
= netdev_priv(dev
);
371 ring
= pasemi_dma_alloc_chan(RXCHAN
, sizeof(struct pasemi_mac_rxring
),
372 offsetof(struct pasemi_mac_rxring
, chan
));
375 dev_err(&mac
->pdev
->dev
, "Can't allocate RX channel\n");
378 chno
= ring
->chan
.chno
;
380 spin_lock_init(&ring
->lock
);
382 ring
->size
= RX_RING_SIZE
;
383 ring
->ring_info
= kcalloc(RX_RING_SIZE
,
384 sizeof(struct pasemi_mac_buffer
),
387 if (!ring
->ring_info
)
390 /* Allocate descriptors */
391 if (pasemi_dma_alloc_ring(&ring
->chan
, RX_RING_SIZE
))
394 ring
->buffers
= dma_alloc_coherent(&mac
->dma_pdev
->dev
,
395 RX_RING_SIZE
* sizeof(u64
),
396 &ring
->buf_dma
, GFP_KERNEL
);
400 write_dma_reg(PAS_DMA_RXCHAN_BASEL(chno
),
401 PAS_DMA_RXCHAN_BASEL_BRBL(ring
->chan
.ring_dma
));
403 write_dma_reg(PAS_DMA_RXCHAN_BASEU(chno
),
404 PAS_DMA_RXCHAN_BASEU_BRBH(ring
->chan
.ring_dma
>> 32) |
405 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE
>> 3));
407 cfg
= PAS_DMA_RXCHAN_CFG_HBU(2);
409 if (translation_enabled())
410 cfg
|= PAS_DMA_RXCHAN_CFG_CTR
;
412 write_dma_reg(PAS_DMA_RXCHAN_CFG(chno
), cfg
);
414 write_dma_reg(PAS_DMA_RXINT_BASEL(mac
->dma_if
),
415 PAS_DMA_RXINT_BASEL_BRBL(ring
->buf_dma
));
417 write_dma_reg(PAS_DMA_RXINT_BASEU(mac
->dma_if
),
418 PAS_DMA_RXINT_BASEU_BRBH(ring
->buf_dma
>> 32) |
419 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE
>> 3));
421 cfg
= PAS_DMA_RXINT_CFG_DHL(2) | PAS_DMA_RXINT_CFG_L2
|
422 PAS_DMA_RXINT_CFG_LW
| PAS_DMA_RXINT_CFG_RBP
|
423 PAS_DMA_RXINT_CFG_HEN
;
425 if (translation_enabled())
426 cfg
|= PAS_DMA_RXINT_CFG_ITRR
| PAS_DMA_RXINT_CFG_ITR
;
428 write_dma_reg(PAS_DMA_RXINT_CFG(mac
->dma_if
), cfg
);
430 ring
->next_to_fill
= 0;
431 ring
->next_to_clean
= 0;
438 kfree(ring
->ring_info
);
440 pasemi_dma_free_chan(&ring
->chan
);
445 static struct pasemi_mac_txring
*
446 pasemi_mac_setup_tx_resources(const struct net_device
*dev
)
448 struct pasemi_mac
*mac
= netdev_priv(dev
);
450 struct pasemi_mac_txring
*ring
;
454 ring
= pasemi_dma_alloc_chan(TXCHAN
, sizeof(struct pasemi_mac_txring
),
455 offsetof(struct pasemi_mac_txring
, chan
));
458 dev_err(&mac
->pdev
->dev
, "Can't allocate TX channel\n");
462 chno
= ring
->chan
.chno
;
464 spin_lock_init(&ring
->lock
);
466 ring
->size
= TX_RING_SIZE
;
467 ring
->ring_info
= kcalloc(TX_RING_SIZE
,
468 sizeof(struct pasemi_mac_buffer
),
470 if (!ring
->ring_info
)
473 /* Allocate descriptors */
474 if (pasemi_dma_alloc_ring(&ring
->chan
, TX_RING_SIZE
))
477 write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno
),
478 PAS_DMA_TXCHAN_BASEL_BRBL(ring
->chan
.ring_dma
));
479 val
= PAS_DMA_TXCHAN_BASEU_BRBH(ring
->chan
.ring_dma
>> 32);
480 val
|= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE
>> 3);
482 write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno
), val
);
484 cfg
= PAS_DMA_TXCHAN_CFG_TY_IFACE
|
485 PAS_DMA_TXCHAN_CFG_TATTR(mac
->dma_if
) |
486 PAS_DMA_TXCHAN_CFG_UP
|
487 PAS_DMA_TXCHAN_CFG_WT(4);
489 if (translation_enabled())
490 cfg
|= PAS_DMA_TXCHAN_CFG_TRD
| PAS_DMA_TXCHAN_CFG_TRR
;
492 write_dma_reg(PAS_DMA_TXCHAN_CFG(chno
), cfg
);
494 ring
->next_to_fill
= 0;
495 ring
->next_to_clean
= 0;
501 kfree(ring
->ring_info
);
503 pasemi_dma_free_chan(&ring
->chan
);
508 static void pasemi_mac_free_tx_resources(struct pasemi_mac
*mac
)
510 struct pasemi_mac_txring
*txring
= tx_ring(mac
);
512 struct pasemi_mac_buffer
*info
;
513 dma_addr_t dmas
[MAX_SKB_FRAGS
+1];
517 start
= txring
->next_to_clean
;
518 limit
= txring
->next_to_fill
;
520 /* Compensate for when fill has wrapped and clean has not */
522 limit
+= TX_RING_SIZE
;
524 for (i
= start
; i
< limit
; i
+= freed
) {
525 info
= &txring
->ring_info
[(i
+1) & (TX_RING_SIZE
-1)];
526 if (info
->dma
&& info
->skb
) {
527 nfrags
= skb_shinfo(info
->skb
)->nr_frags
;
528 for (j
= 0; j
<= nfrags
; j
++)
529 dmas
[j
] = txring
->ring_info
[(i
+1+j
) &
530 (TX_RING_SIZE
-1)].dma
;
531 freed
= pasemi_mac_unmap_tx_skb(mac
, nfrags
,
538 kfree(txring
->ring_info
);
539 pasemi_dma_free_chan(&txring
->chan
);
543 static void pasemi_mac_free_rx_buffers(struct pasemi_mac
*mac
)
545 struct pasemi_mac_rxring
*rx
= rx_ring(mac
);
547 struct pasemi_mac_buffer
*info
;
549 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
550 info
= &RX_DESC_INFO(rx
, i
);
551 if (info
->skb
&& info
->dma
) {
552 dma_unmap_single(&mac
->dma_pdev
->dev
, info
->dma
,
553 info
->skb
->len
, DMA_FROM_DEVICE
);
554 dev_kfree_skb_any(info
->skb
);
560 for (i
= 0; i
< RX_RING_SIZE
; i
++)
564 static void pasemi_mac_free_rx_resources(struct pasemi_mac
*mac
)
566 pasemi_mac_free_rx_buffers(mac
);
568 dma_free_coherent(&mac
->dma_pdev
->dev
, RX_RING_SIZE
* sizeof(u64
),
569 rx_ring(mac
)->buffers
, rx_ring(mac
)->buf_dma
);
571 kfree(rx_ring(mac
)->ring_info
);
572 pasemi_dma_free_chan(&rx_ring(mac
)->chan
);
576 static void pasemi_mac_replenish_rx_ring(struct net_device
*dev
,
579 const struct pasemi_mac
*mac
= netdev_priv(dev
);
580 struct pasemi_mac_rxring
*rx
= rx_ring(mac
);
586 fill
= rx_ring(mac
)->next_to_fill
;
587 for (count
= 0; count
< limit
; count
++) {
588 struct pasemi_mac_buffer
*info
= &RX_DESC_INFO(rx
, fill
);
589 u64
*buff
= &RX_BUFF(rx
, fill
);
596 skb
= netdev_alloc_skb(dev
, mac
->bufsz
);
597 skb_reserve(skb
, LOCAL_SKB_ALIGN
);
602 dma
= dma_map_single(&mac
->dma_pdev
->dev
, skb
->data
,
603 mac
->bufsz
- LOCAL_SKB_ALIGN
,
606 if (dma_mapping_error(&mac
->dma_pdev
->dev
, dma
)) {
607 dev_kfree_skb_irq(info
->skb
);
613 *buff
= XCT_RXB_LEN(mac
->bufsz
) | XCT_RXB_ADDR(dma
);
619 write_dma_reg(PAS_DMA_RXINT_INCR(mac
->dma_if
), count
);
621 rx_ring(mac
)->next_to_fill
= (rx_ring(mac
)->next_to_fill
+ count
) &
625 static void pasemi_mac_restart_rx_intr(const struct pasemi_mac
*mac
)
627 struct pasemi_mac_rxring
*rx
= rx_ring(mac
);
628 unsigned int reg
, pcnt
;
629 /* Re-enable packet count interrupts: finally
630 * ack the packet count interrupt we got in rx_intr.
633 pcnt
= *rx
->chan
.status
& PAS_STATUS_PCNT_M
;
635 reg
= PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt
) | PAS_IOB_DMA_RXCH_RESET_PINTC
;
637 if (*rx
->chan
.status
& PAS_STATUS_TIMER
)
638 reg
|= PAS_IOB_DMA_RXCH_RESET_TINTC
;
640 write_iob_reg(PAS_IOB_DMA_RXCH_RESET(mac
->rx
->chan
.chno
), reg
);
643 static void pasemi_mac_restart_tx_intr(const struct pasemi_mac
*mac
)
645 unsigned int reg
, pcnt
;
647 /* Re-enable packet count interrupts */
648 pcnt
= *tx_ring(mac
)->chan
.status
& PAS_STATUS_PCNT_M
;
650 reg
= PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt
) | PAS_IOB_DMA_TXCH_RESET_PINTC
;
652 write_iob_reg(PAS_IOB_DMA_TXCH_RESET(tx_ring(mac
)->chan
.chno
), reg
);
656 static inline void pasemi_mac_rx_error(const struct pasemi_mac
*mac
,
659 unsigned int rcmdsta
, ccmdsta
;
660 struct pasemi_dmachan
*chan
= &rx_ring(mac
)->chan
;
662 if (!netif_msg_rx_err(mac
))
665 rcmdsta
= read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac
->dma_if
));
666 ccmdsta
= read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(chan
->chno
));
668 printk(KERN_ERR
"pasemi_mac: rx error. macrx %016llx, rx status %llx\n",
669 macrx
, *chan
->status
);
671 printk(KERN_ERR
"pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
675 static inline void pasemi_mac_tx_error(const struct pasemi_mac
*mac
,
679 struct pasemi_dmachan
*chan
= &tx_ring(mac
)->chan
;
681 if (!netif_msg_tx_err(mac
))
684 cmdsta
= read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(chan
->chno
));
686 printk(KERN_ERR
"pasemi_mac: tx error. mactx 0x%016llx, "\
687 "tx status 0x%016llx\n", mactx
, *chan
->status
);
689 printk(KERN_ERR
"pasemi_mac: tcmdsta 0x%08x\n", cmdsta
);
692 static int pasemi_mac_clean_rx(struct pasemi_mac_rxring
*rx
,
695 const struct pasemi_dmachan
*chan
= &rx
->chan
;
696 struct pasemi_mac
*mac
= rx
->mac
;
697 struct pci_dev
*pdev
= mac
->dma_pdev
;
699 int count
, buf_index
, tot_bytes
, packets
;
700 struct pasemi_mac_buffer
*info
;
709 spin_lock(&rx
->lock
);
711 n
= rx
->next_to_clean
;
713 prefetch(&RX_DESC(rx
, n
));
715 for (count
= 0; count
< limit
; count
++) {
716 macrx
= RX_DESC(rx
, n
);
717 prefetch(&RX_DESC(rx
, n
+4));
719 if ((macrx
& XCT_MACRX_E
) ||
720 (*chan
->status
& PAS_STATUS_ERROR
))
721 pasemi_mac_rx_error(mac
, macrx
);
723 if (!(macrx
& XCT_MACRX_O
))
728 BUG_ON(!(macrx
& XCT_MACRX_RR_8BRES
));
730 eval
= (RX_DESC(rx
, n
+1) & XCT_RXRES_8B_EVAL_M
) >>
734 dma
= (RX_DESC(rx
, n
+2) & XCT_PTR_ADDR_M
);
735 info
= &RX_DESC_INFO(rx
, buf_index
);
741 len
= (macrx
& XCT_MACRX_LLEN_M
) >> XCT_MACRX_LLEN_S
;
743 dma_unmap_single(&pdev
->dev
, dma
,
744 mac
->bufsz
- LOCAL_SKB_ALIGN
,
747 if (macrx
& XCT_MACRX_CRC
) {
748 /* CRC error flagged */
749 mac
->netdev
->stats
.rx_errors
++;
750 mac
->netdev
->stats
.rx_crc_errors
++;
751 /* No need to free skb, it'll be reused */
758 if (likely((macrx
& XCT_MACRX_HTY_M
) == XCT_MACRX_HTY_IPV4_OK
)) {
759 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
760 skb
->csum
= (macrx
& XCT_MACRX_CSUM_M
) >>
763 skb_checksum_none_assert(skb
);
769 /* Don't include CRC */
772 skb
->protocol
= eth_type_trans(skb
, mac
->netdev
);
773 napi_gro_receive(&mac
->napi
, skb
);
777 RX_DESC(rx
, n
+1) = 0;
779 /* Need to zero it out since hardware doesn't, since the
780 * replenish loop uses it to tell when it's done.
782 RX_BUFF(rx
, buf_index
) = 0;
787 if (n
> RX_RING_SIZE
) {
788 /* Errata 5971 workaround: L2 target of headers */
789 write_iob_reg(PAS_IOB_COM_PKTHDRCNT
, 0);
790 n
&= (RX_RING_SIZE
-1);
793 rx_ring(mac
)->next_to_clean
= n
;
795 /* Increase is in number of 16-byte entries, and since each descriptor
796 * with an 8BRES takes up 3x8 bytes (padded to 4x8), increase with
799 write_dma_reg(PAS_DMA_RXCHAN_INCR(mac
->rx
->chan
.chno
), count
<< 1);
801 pasemi_mac_replenish_rx_ring(mac
->netdev
, count
);
803 mac
->netdev
->stats
.rx_bytes
+= tot_bytes
;
804 mac
->netdev
->stats
.rx_packets
+= packets
;
806 spin_unlock(&rx_ring(mac
)->lock
);
811 /* Can't make this too large or we blow the kernel stack limits */
812 #define TX_CLEAN_BATCHSIZE (128/MAX_SKB_FRAGS)
814 static int pasemi_mac_clean_tx(struct pasemi_mac_txring
*txring
)
816 struct pasemi_dmachan
*chan
= &txring
->chan
;
817 struct pasemi_mac
*mac
= txring
->mac
;
819 unsigned int start
, descr_count
, buf_count
, batch_limit
;
820 unsigned int ring_limit
;
821 unsigned int total_count
;
823 struct sk_buff
*skbs
[TX_CLEAN_BATCHSIZE
];
824 dma_addr_t dmas
[TX_CLEAN_BATCHSIZE
][MAX_SKB_FRAGS
+1];
825 int nf
[TX_CLEAN_BATCHSIZE
];
829 batch_limit
= TX_CLEAN_BATCHSIZE
;
831 spin_lock_irqsave(&txring
->lock
, flags
);
833 start
= txring
->next_to_clean
;
834 ring_limit
= txring
->next_to_fill
;
836 prefetch(&TX_DESC_INFO(txring
, start
+1).skb
);
838 /* Compensate for when fill has wrapped but clean has not */
839 if (start
> ring_limit
)
840 ring_limit
+= TX_RING_SIZE
;
846 descr_count
< batch_limit
&& i
< ring_limit
;
848 u64 mactx
= TX_DESC(txring
, i
);
851 if ((mactx
& XCT_MACTX_E
) ||
852 (*chan
->status
& PAS_STATUS_ERROR
))
853 pasemi_mac_tx_error(mac
, mactx
);
855 /* Skip over control descriptors */
856 if (!(mactx
& XCT_MACTX_LLEN_M
)) {
857 TX_DESC(txring
, i
) = 0;
858 TX_DESC(txring
, i
+1) = 0;
863 skb
= TX_DESC_INFO(txring
, i
+1).skb
;
864 nr_frags
= TX_DESC_INFO(txring
, i
).dma
;
866 if (unlikely(mactx
& XCT_MACTX_O
))
867 /* Not yet transmitted */
870 buf_count
= 2 + nr_frags
;
871 /* Since we always fill with an even number of entries, make
872 * sure we skip any unused one at the end as well.
877 for (j
= 0; j
<= nr_frags
; j
++)
878 dmas
[descr_count
][j
] = TX_DESC_INFO(txring
, i
+1+j
).dma
;
880 skbs
[descr_count
] = skb
;
881 nf
[descr_count
] = nr_frags
;
883 TX_DESC(txring
, i
) = 0;
884 TX_DESC(txring
, i
+1) = 0;
888 txring
->next_to_clean
= i
& (TX_RING_SIZE
-1);
890 spin_unlock_irqrestore(&txring
->lock
, flags
);
891 netif_wake_queue(mac
->netdev
);
893 for (i
= 0; i
< descr_count
; i
++)
894 pasemi_mac_unmap_tx_skb(mac
, nf
[i
], skbs
[i
], dmas
[i
]);
896 total_count
+= descr_count
;
898 /* If the batch was full, try to clean more */
899 if (descr_count
== batch_limit
)
906 static irqreturn_t
pasemi_mac_rx_intr(int irq
, void *data
)
908 const struct pasemi_mac_rxring
*rxring
= data
;
909 struct pasemi_mac
*mac
= rxring
->mac
;
910 const struct pasemi_dmachan
*chan
= &rxring
->chan
;
913 if (!(*chan
->status
& PAS_STATUS_CAUSE_M
))
916 /* Don't reset packet count so it won't fire again but clear
921 if (*chan
->status
& PAS_STATUS_SOFT
)
922 reg
|= PAS_IOB_DMA_RXCH_RESET_SINTC
;
923 if (*chan
->status
& PAS_STATUS_ERROR
)
924 reg
|= PAS_IOB_DMA_RXCH_RESET_DINTC
;
926 napi_schedule(&mac
->napi
);
928 write_iob_reg(PAS_IOB_DMA_RXCH_RESET(chan
->chno
), reg
);
933 #define TX_CLEAN_INTERVAL HZ
935 static void pasemi_mac_tx_timer(struct timer_list
*t
)
937 struct pasemi_mac_txring
*txring
= from_timer(txring
, t
, clean_timer
);
938 struct pasemi_mac
*mac
= txring
->mac
;
940 pasemi_mac_clean_tx(txring
);
942 mod_timer(&txring
->clean_timer
, jiffies
+ TX_CLEAN_INTERVAL
);
944 pasemi_mac_restart_tx_intr(mac
);
947 static irqreturn_t
pasemi_mac_tx_intr(int irq
, void *data
)
949 struct pasemi_mac_txring
*txring
= data
;
950 const struct pasemi_dmachan
*chan
= &txring
->chan
;
951 struct pasemi_mac
*mac
= txring
->mac
;
954 if (!(*chan
->status
& PAS_STATUS_CAUSE_M
))
959 if (*chan
->status
& PAS_STATUS_SOFT
)
960 reg
|= PAS_IOB_DMA_TXCH_RESET_SINTC
;
961 if (*chan
->status
& PAS_STATUS_ERROR
)
962 reg
|= PAS_IOB_DMA_TXCH_RESET_DINTC
;
964 mod_timer(&txring
->clean_timer
, jiffies
+ (TX_CLEAN_INTERVAL
)*2);
966 napi_schedule(&mac
->napi
);
969 write_iob_reg(PAS_IOB_DMA_TXCH_RESET(chan
->chno
), reg
);
974 static void pasemi_adjust_link(struct net_device
*dev
)
976 struct pasemi_mac
*mac
= netdev_priv(dev
);
979 unsigned int new_flags
;
981 if (!dev
->phydev
->link
) {
982 /* If no link, MAC speed settings don't matter. Just report
983 * link down and return.
985 if (mac
->link
&& netif_msg_link(mac
))
986 printk(KERN_INFO
"%s: Link is down.\n", dev
->name
);
988 netif_carrier_off(dev
);
989 pasemi_mac_intf_disable(mac
);
994 pasemi_mac_intf_enable(mac
);
995 netif_carrier_on(dev
);
998 flags
= read_mac_reg(mac
, PAS_MAC_CFG_PCFG
);
999 new_flags
= flags
& ~(PAS_MAC_CFG_PCFG_HD
| PAS_MAC_CFG_PCFG_SPD_M
|
1000 PAS_MAC_CFG_PCFG_TSR_M
);
1002 if (!dev
->phydev
->duplex
)
1003 new_flags
|= PAS_MAC_CFG_PCFG_HD
;
1005 switch (dev
->phydev
->speed
) {
1007 new_flags
|= PAS_MAC_CFG_PCFG_SPD_1G
|
1008 PAS_MAC_CFG_PCFG_TSR_1G
;
1011 new_flags
|= PAS_MAC_CFG_PCFG_SPD_100M
|
1012 PAS_MAC_CFG_PCFG_TSR_100M
;
1015 new_flags
|= PAS_MAC_CFG_PCFG_SPD_10M
|
1016 PAS_MAC_CFG_PCFG_TSR_10M
;
1019 printk("Unsupported speed %d\n", dev
->phydev
->speed
);
1022 /* Print on link or speed/duplex change */
1023 msg
= mac
->link
!= dev
->phydev
->link
|| flags
!= new_flags
;
1025 mac
->duplex
= dev
->phydev
->duplex
;
1026 mac
->speed
= dev
->phydev
->speed
;
1027 mac
->link
= dev
->phydev
->link
;
1029 if (new_flags
!= flags
)
1030 write_mac_reg(mac
, PAS_MAC_CFG_PCFG
, new_flags
);
1032 if (msg
&& netif_msg_link(mac
))
1033 printk(KERN_INFO
"%s: Link is up at %d Mbps, %s duplex.\n",
1034 dev
->name
, mac
->speed
, mac
->duplex
? "full" : "half");
1037 static int pasemi_mac_phy_init(struct net_device
*dev
)
1039 struct pasemi_mac
*mac
= netdev_priv(dev
);
1040 struct device_node
*dn
, *phy_dn
;
1041 struct phy_device
*phydev
;
1043 dn
= pci_device_to_OF_node(mac
->pdev
);
1044 phy_dn
= of_parse_phandle(dn
, "phy-handle", 0);
1050 phydev
= of_phy_connect(dev
, phy_dn
, &pasemi_adjust_link
, 0,
1051 PHY_INTERFACE_MODE_SGMII
);
1053 of_node_put(phy_dn
);
1055 printk(KERN_ERR
"%s: Could not attach to phy\n", dev
->name
);
1063 static int pasemi_mac_open(struct net_device
*dev
)
1065 struct pasemi_mac
*mac
= netdev_priv(dev
);
1069 flags
= PAS_MAC_CFG_TXP_FCE
| PAS_MAC_CFG_TXP_FPC(3) |
1070 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
1071 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
1073 write_mac_reg(mac
, PAS_MAC_CFG_TXP
, flags
);
1075 ret
= pasemi_mac_setup_rx_resources(dev
);
1077 goto out_rx_resources
;
1079 mac
->tx
= pasemi_mac_setup_tx_resources(dev
);
1086 /* We might already have allocated rings in case mtu was changed
1087 * before interface was brought up.
1089 if (dev
->mtu
> 1500 && !mac
->num_cs
) {
1090 pasemi_mac_setup_csrings(mac
);
1097 /* Zero out rmon counters */
1098 for (i
= 0; i
< 32; i
++)
1099 write_mac_reg(mac
, PAS_MAC_RMON(i
), 0);
1101 /* 0x3ff with 33MHz clock is about 31us */
1102 write_iob_reg(PAS_IOB_DMA_COM_TIMEOUTCFG
,
1103 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0x3ff));
1105 write_iob_reg(PAS_IOB_DMA_RXCH_CFG(mac
->rx
->chan
.chno
),
1106 PAS_IOB_DMA_RXCH_CFG_CNTTH(256));
1108 write_iob_reg(PAS_IOB_DMA_TXCH_CFG(mac
->tx
->chan
.chno
),
1109 PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
1111 write_mac_reg(mac
, PAS_MAC_IPC_CHNL
,
1112 PAS_MAC_IPC_CHNL_DCHNO(mac
->rx
->chan
.chno
) |
1113 PAS_MAC_IPC_CHNL_BCH(mac
->rx
->chan
.chno
));
1116 write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac
->dma_if
),
1117 PAS_DMA_RXINT_RCMDSTA_EN
|
1118 PAS_DMA_RXINT_RCMDSTA_DROPS_M
|
1119 PAS_DMA_RXINT_RCMDSTA_BP
|
1120 PAS_DMA_RXINT_RCMDSTA_OO
|
1121 PAS_DMA_RXINT_RCMDSTA_BT
);
1123 /* enable rx channel */
1124 pasemi_dma_start_chan(&rx_ring(mac
)->chan
, PAS_DMA_RXCHAN_CCMDSTA_DU
|
1125 PAS_DMA_RXCHAN_CCMDSTA_OD
|
1126 PAS_DMA_RXCHAN_CCMDSTA_FD
|
1127 PAS_DMA_RXCHAN_CCMDSTA_DT
);
1129 /* enable tx channel */
1130 pasemi_dma_start_chan(&tx_ring(mac
)->chan
, PAS_DMA_TXCHAN_TCMDSTA_SZ
|
1131 PAS_DMA_TXCHAN_TCMDSTA_DB
|
1132 PAS_DMA_TXCHAN_TCMDSTA_DE
|
1133 PAS_DMA_TXCHAN_TCMDSTA_DA
);
1135 pasemi_mac_replenish_rx_ring(dev
, RX_RING_SIZE
);
1137 write_dma_reg(PAS_DMA_RXCHAN_INCR(rx_ring(mac
)->chan
.chno
),
1140 /* Clear out any residual packet count state from firmware */
1141 pasemi_mac_restart_rx_intr(mac
);
1142 pasemi_mac_restart_tx_intr(mac
);
1144 flags
= PAS_MAC_CFG_PCFG_S1
| PAS_MAC_CFG_PCFG_PR
| PAS_MAC_CFG_PCFG_CE
;
1146 if (mac
->type
== MAC_TYPE_GMAC
)
1147 flags
|= PAS_MAC_CFG_PCFG_TSR_1G
| PAS_MAC_CFG_PCFG_SPD_1G
;
1149 flags
|= PAS_MAC_CFG_PCFG_TSR_10G
| PAS_MAC_CFG_PCFG_SPD_10G
;
1151 /* Enable interface in MAC */
1152 write_mac_reg(mac
, PAS_MAC_CFG_PCFG
, flags
);
1154 ret
= pasemi_mac_phy_init(dev
);
1156 /* Since we won't get link notification, just enable RX */
1157 pasemi_mac_intf_enable(mac
);
1158 if (mac
->type
== MAC_TYPE_GMAC
) {
1159 /* Warn for missing PHY on SGMII (1Gig) ports */
1160 dev_warn(&mac
->pdev
->dev
,
1161 "PHY init failed: %d.\n", ret
);
1162 dev_warn(&mac
->pdev
->dev
,
1163 "Defaulting to 1Gbit full duplex\n");
1167 netif_start_queue(dev
);
1168 napi_enable(&mac
->napi
);
1170 snprintf(mac
->tx_irq_name
, sizeof(mac
->tx_irq_name
), "%s tx",
1173 ret
= request_irq(mac
->tx
->chan
.irq
, pasemi_mac_tx_intr
, 0,
1174 mac
->tx_irq_name
, mac
->tx
);
1176 dev_err(&mac
->pdev
->dev
, "request_irq of irq %d failed: %d\n",
1177 mac
->tx
->chan
.irq
, ret
);
1181 snprintf(mac
->rx_irq_name
, sizeof(mac
->rx_irq_name
), "%s rx",
1184 ret
= request_irq(mac
->rx
->chan
.irq
, pasemi_mac_rx_intr
, 0,
1185 mac
->rx_irq_name
, mac
->rx
);
1187 dev_err(&mac
->pdev
->dev
, "request_irq of irq %d failed: %d\n",
1188 mac
->rx
->chan
.irq
, ret
);
1193 phy_start(dev
->phydev
);
1195 timer_setup(&mac
->tx
->clean_timer
, pasemi_mac_tx_timer
, 0);
1196 mod_timer(&mac
->tx
->clean_timer
, jiffies
+ HZ
);
1201 free_irq(mac
->tx
->chan
.irq
, mac
->tx
);
1203 napi_disable(&mac
->napi
);
1204 netif_stop_queue(dev
);
1207 pasemi_mac_free_tx_resources(mac
);
1208 pasemi_mac_free_rx_resources(mac
);
1214 #define MAX_RETRIES 5000
1216 static void pasemi_mac_pause_txchan(struct pasemi_mac
*mac
)
1218 unsigned int sta
, retries
;
1219 int txch
= tx_ring(mac
)->chan
.chno
;
1221 write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch
),
1222 PAS_DMA_TXCHAN_TCMDSTA_ST
);
1224 for (retries
= 0; retries
< MAX_RETRIES
; retries
++) {
1225 sta
= read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch
));
1226 if (!(sta
& PAS_DMA_TXCHAN_TCMDSTA_ACT
))
1231 if (sta
& PAS_DMA_TXCHAN_TCMDSTA_ACT
)
1232 dev_err(&mac
->dma_pdev
->dev
,
1233 "Failed to stop tx channel, tcmdsta %08x\n", sta
);
1235 write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch
), 0);
1238 static void pasemi_mac_pause_rxchan(struct pasemi_mac
*mac
)
1240 unsigned int sta
, retries
;
1241 int rxch
= rx_ring(mac
)->chan
.chno
;
1243 write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch
),
1244 PAS_DMA_RXCHAN_CCMDSTA_ST
);
1245 for (retries
= 0; retries
< MAX_RETRIES
; retries
++) {
1246 sta
= read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch
));
1247 if (!(sta
& PAS_DMA_RXCHAN_CCMDSTA_ACT
))
1252 if (sta
& PAS_DMA_RXCHAN_CCMDSTA_ACT
)
1253 dev_err(&mac
->dma_pdev
->dev
,
1254 "Failed to stop rx channel, ccmdsta 08%x\n", sta
);
1255 write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch
), 0);
1258 static void pasemi_mac_pause_rxint(struct pasemi_mac
*mac
)
1260 unsigned int sta
, retries
;
1262 write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac
->dma_if
),
1263 PAS_DMA_RXINT_RCMDSTA_ST
);
1264 for (retries
= 0; retries
< MAX_RETRIES
; retries
++) {
1265 sta
= read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac
->dma_if
));
1266 if (!(sta
& PAS_DMA_RXINT_RCMDSTA_ACT
))
1271 if (sta
& PAS_DMA_RXINT_RCMDSTA_ACT
)
1272 dev_err(&mac
->dma_pdev
->dev
,
1273 "Failed to stop rx interface, rcmdsta %08x\n", sta
);
1274 write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac
->dma_if
), 0);
1277 static int pasemi_mac_close(struct net_device
*dev
)
1279 struct pasemi_mac
*mac
= netdev_priv(dev
);
1283 rxch
= rx_ring(mac
)->chan
.chno
;
1284 txch
= tx_ring(mac
)->chan
.chno
;
1287 phy_stop(dev
->phydev
);
1288 phy_disconnect(dev
->phydev
);
1291 del_timer_sync(&mac
->tx
->clean_timer
);
1293 netif_stop_queue(dev
);
1294 napi_disable(&mac
->napi
);
1296 sta
= read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac
->dma_if
));
1297 if (sta
& (PAS_DMA_RXINT_RCMDSTA_BP
|
1298 PAS_DMA_RXINT_RCMDSTA_OO
|
1299 PAS_DMA_RXINT_RCMDSTA_BT
))
1300 printk(KERN_DEBUG
"pasemi_mac: rcmdsta error: 0x%08x\n", sta
);
1302 sta
= read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch
));
1303 if (sta
& (PAS_DMA_RXCHAN_CCMDSTA_DU
|
1304 PAS_DMA_RXCHAN_CCMDSTA_OD
|
1305 PAS_DMA_RXCHAN_CCMDSTA_FD
|
1306 PAS_DMA_RXCHAN_CCMDSTA_DT
))
1307 printk(KERN_DEBUG
"pasemi_mac: ccmdsta error: 0x%08x\n", sta
);
1309 sta
= read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch
));
1310 if (sta
& (PAS_DMA_TXCHAN_TCMDSTA_SZ
| PAS_DMA_TXCHAN_TCMDSTA_DB
|
1311 PAS_DMA_TXCHAN_TCMDSTA_DE
| PAS_DMA_TXCHAN_TCMDSTA_DA
))
1312 printk(KERN_DEBUG
"pasemi_mac: tcmdsta error: 0x%08x\n", sta
);
1314 /* Clean out any pending buffers */
1315 pasemi_mac_clean_tx(tx_ring(mac
));
1316 pasemi_mac_clean_rx(rx_ring(mac
), RX_RING_SIZE
);
1318 pasemi_mac_pause_txchan(mac
);
1319 pasemi_mac_pause_rxint(mac
);
1320 pasemi_mac_pause_rxchan(mac
);
1321 pasemi_mac_intf_disable(mac
);
1323 free_irq(mac
->tx
->chan
.irq
, mac
->tx
);
1324 free_irq(mac
->rx
->chan
.irq
, mac
->rx
);
1326 for (i
= 0; i
< mac
->num_cs
; i
++) {
1327 pasemi_mac_free_csring(mac
->cs
[i
]);
1333 /* Free resources */
1334 pasemi_mac_free_rx_resources(mac
);
1335 pasemi_mac_free_tx_resources(mac
);
1340 static void pasemi_mac_queue_csdesc(const struct sk_buff
*skb
,
1341 const dma_addr_t
*map
,
1342 const unsigned int *map_size
,
1343 struct pasemi_mac_txring
*txring
,
1344 struct pasemi_mac_csring
*csring
)
1348 const int nh_off
= skb_network_offset(skb
);
1349 const int nh_len
= skb_network_header_len(skb
);
1350 const int nfrags
= skb_shinfo(skb
)->nr_frags
;
1351 int cs_size
, i
, fill
, hdr
, evt
;
1354 fund
= XCT_FUN_ST
| XCT_FUN_RR_8BRES
|
1355 XCT_FUN_O
| XCT_FUN_FUN(csring
->fun
) |
1356 XCT_FUN_CRM_SIG
| XCT_FUN_LLEN(skb
->len
- nh_off
) |
1357 XCT_FUN_SHL(nh_len
>> 2) | XCT_FUN_SE
;
1359 switch (ip_hdr(skb
)->protocol
) {
1361 fund
|= XCT_FUN_SIG_TCP4
;
1362 /* TCP checksum is 16 bytes into the header */
1363 cs_dest
= map
[0] + skb_transport_offset(skb
) + 16;
1366 fund
|= XCT_FUN_SIG_UDP4
;
1367 /* UDP checksum is 6 bytes into the header */
1368 cs_dest
= map
[0] + skb_transport_offset(skb
) + 6;
1374 /* Do the checksum offloaded */
1375 fill
= csring
->next_to_fill
;
1378 CS_DESC(csring
, fill
++) = fund
;
1379 /* Room for 8BRES. Checksum result is really 2 bytes into it */
1380 csdma
= csring
->chan
.ring_dma
+ (fill
& (CS_RING_SIZE
-1)) * 8 + 2;
1381 CS_DESC(csring
, fill
++) = 0;
1383 CS_DESC(csring
, fill
) = XCT_PTR_LEN(map_size
[0]-nh_off
) | XCT_PTR_ADDR(map
[0]+nh_off
);
1384 for (i
= 1; i
<= nfrags
; i
++)
1385 CS_DESC(csring
, fill
+i
) = XCT_PTR_LEN(map_size
[i
]) | XCT_PTR_ADDR(map
[i
]);
1391 /* Copy the result into the TCP packet */
1392 CS_DESC(csring
, fill
++) = XCT_FUN_O
| XCT_FUN_FUN(csring
->fun
) |
1393 XCT_FUN_LLEN(2) | XCT_FUN_SE
;
1394 CS_DESC(csring
, fill
++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(cs_dest
) | XCT_PTR_T
;
1395 CS_DESC(csring
, fill
++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(csdma
);
1398 evt
= !csring
->last_event
;
1399 csring
->last_event
= evt
;
1401 /* Event handshaking with MAC TX */
1402 CS_DESC(csring
, fill
++) = CTRL_CMD_T
| CTRL_CMD_META_EVT
| CTRL_CMD_O
|
1403 CTRL_CMD_ETYPE_SET
| CTRL_CMD_REG(csring
->events
[evt
]);
1404 CS_DESC(csring
, fill
++) = 0;
1405 CS_DESC(csring
, fill
++) = CTRL_CMD_T
| CTRL_CMD_META_EVT
| CTRL_CMD_O
|
1406 CTRL_CMD_ETYPE_WCLR
| CTRL_CMD_REG(csring
->events
[!evt
]);
1407 CS_DESC(csring
, fill
++) = 0;
1408 csring
->next_to_fill
= fill
& (CS_RING_SIZE
-1);
1410 cs_size
= fill
- hdr
;
1411 write_dma_reg(PAS_DMA_TXCHAN_INCR(csring
->chan
.chno
), (cs_size
) >> 1);
1413 /* TX-side event handshaking */
1414 fill
= txring
->next_to_fill
;
1415 TX_DESC(txring
, fill
++) = CTRL_CMD_T
| CTRL_CMD_META_EVT
| CTRL_CMD_O
|
1416 CTRL_CMD_ETYPE_WSET
| CTRL_CMD_REG(csring
->events
[evt
]);
1417 TX_DESC(txring
, fill
++) = 0;
1418 TX_DESC(txring
, fill
++) = CTRL_CMD_T
| CTRL_CMD_META_EVT
| CTRL_CMD_O
|
1419 CTRL_CMD_ETYPE_CLR
| CTRL_CMD_REG(csring
->events
[!evt
]);
1420 TX_DESC(txring
, fill
++) = 0;
1421 txring
->next_to_fill
= fill
;
1423 write_dma_reg(PAS_DMA_TXCHAN_INCR(txring
->chan
.chno
), 2);
1426 static int pasemi_mac_start_tx(struct sk_buff
*skb
, struct net_device
*dev
)
1428 struct pasemi_mac
* const mac
= netdev_priv(dev
);
1429 struct pasemi_mac_txring
* const txring
= tx_ring(mac
);
1430 struct pasemi_mac_csring
*csring
;
1433 dma_addr_t map
[MAX_SKB_FRAGS
+1];
1434 unsigned int map_size
[MAX_SKB_FRAGS
+1];
1435 unsigned long flags
;
1438 const int nh_off
= skb_network_offset(skb
);
1439 const int nh_len
= skb_network_header_len(skb
);
1441 prefetch(&txring
->ring_info
);
1443 dflags
= XCT_MACTX_O
| XCT_MACTX_ST
| XCT_MACTX_CRC_PAD
;
1445 nfrags
= skb_shinfo(skb
)->nr_frags
;
1447 map
[0] = dma_map_single(&mac
->dma_pdev
->dev
, skb
->data
,
1448 skb_headlen(skb
), DMA_TO_DEVICE
);
1449 map_size
[0] = skb_headlen(skb
);
1450 if (dma_mapping_error(&mac
->dma_pdev
->dev
, map
[0]))
1451 goto out_err_nolock
;
1453 for (i
= 0; i
< nfrags
; i
++) {
1454 skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[i
];
1456 map
[i
+ 1] = skb_frag_dma_map(&mac
->dma_pdev
->dev
, frag
, 0,
1457 skb_frag_size(frag
), DMA_TO_DEVICE
);
1458 map_size
[i
+1] = skb_frag_size(frag
);
1459 if (dma_mapping_error(&mac
->dma_pdev
->dev
, map
[i
+ 1])) {
1461 goto out_err_nolock
;
1465 if (skb
->ip_summed
== CHECKSUM_PARTIAL
&& skb
->len
<= 1540) {
1466 switch (ip_hdr(skb
)->protocol
) {
1468 dflags
|= XCT_MACTX_CSUM_TCP
;
1469 dflags
|= XCT_MACTX_IPH(nh_len
>> 2);
1470 dflags
|= XCT_MACTX_IPO(nh_off
);
1473 dflags
|= XCT_MACTX_CSUM_UDP
;
1474 dflags
|= XCT_MACTX_IPH(nh_len
>> 2);
1475 dflags
|= XCT_MACTX_IPO(nh_off
);
1482 mactx
= dflags
| XCT_MACTX_LLEN(skb
->len
);
1484 spin_lock_irqsave(&txring
->lock
, flags
);
1486 /* Avoid stepping on the same cache line that the DMA controller
1487 * is currently about to send, so leave at least 8 words available.
1488 * Total free space needed is mactx + fragments + 8
1490 if (RING_AVAIL(txring
) < nfrags
+ 14) {
1491 /* no room -- stop the queue and wait for tx intr */
1492 netif_stop_queue(dev
);
1496 /* Queue up checksum + event descriptors, if needed */
1497 if (mac
->num_cs
&& skb
->ip_summed
== CHECKSUM_PARTIAL
&& skb
->len
> 1540) {
1498 csring
= mac
->cs
[mac
->last_cs
];
1499 mac
->last_cs
= (mac
->last_cs
+ 1) % mac
->num_cs
;
1501 pasemi_mac_queue_csdesc(skb
, map
, map_size
, txring
, csring
);
1504 fill
= txring
->next_to_fill
;
1505 TX_DESC(txring
, fill
) = mactx
;
1506 TX_DESC_INFO(txring
, fill
).dma
= nfrags
;
1508 TX_DESC_INFO(txring
, fill
).skb
= skb
;
1509 for (i
= 0; i
<= nfrags
; i
++) {
1510 TX_DESC(txring
, fill
+i
) =
1511 XCT_PTR_LEN(map_size
[i
]) | XCT_PTR_ADDR(map
[i
]);
1512 TX_DESC_INFO(txring
, fill
+i
).dma
= map
[i
];
1515 /* We have to add an even number of 8-byte entries to the ring
1516 * even if the last one is unused. That means always an odd number
1517 * of pointers + one mactx descriptor.
1522 txring
->next_to_fill
= (fill
+ nfrags
+ 1) & (TX_RING_SIZE
-1);
1524 dev
->stats
.tx_packets
++;
1525 dev
->stats
.tx_bytes
+= skb
->len
;
1527 spin_unlock_irqrestore(&txring
->lock
, flags
);
1529 write_dma_reg(PAS_DMA_TXCHAN_INCR(txring
->chan
.chno
), (nfrags
+2) >> 1);
1531 return NETDEV_TX_OK
;
1534 spin_unlock_irqrestore(&txring
->lock
, flags
);
1537 dma_unmap_single(&mac
->dma_pdev
->dev
, map
[nfrags
],
1538 map_size
[nfrags
], DMA_TO_DEVICE
);
1540 return NETDEV_TX_BUSY
;
1543 static void pasemi_mac_set_rx_mode(struct net_device
*dev
)
1545 const struct pasemi_mac
*mac
= netdev_priv(dev
);
1548 flags
= read_mac_reg(mac
, PAS_MAC_CFG_PCFG
);
1550 /* Set promiscuous */
1551 if (dev
->flags
& IFF_PROMISC
)
1552 flags
|= PAS_MAC_CFG_PCFG_PR
;
1554 flags
&= ~PAS_MAC_CFG_PCFG_PR
;
1556 write_mac_reg(mac
, PAS_MAC_CFG_PCFG
, flags
);
1560 static int pasemi_mac_poll(struct napi_struct
*napi
, int budget
)
1562 struct pasemi_mac
*mac
= container_of(napi
, struct pasemi_mac
, napi
);
1565 pasemi_mac_clean_tx(tx_ring(mac
));
1566 pkts
= pasemi_mac_clean_rx(rx_ring(mac
), budget
);
1567 if (pkts
< budget
) {
1568 /* all done, no more packets present */
1569 napi_complete_done(napi
, pkts
);
1571 pasemi_mac_restart_rx_intr(mac
);
1572 pasemi_mac_restart_tx_intr(mac
);
1577 #ifdef CONFIG_NET_POLL_CONTROLLER
1579 * Polling 'interrupt' - used by things like netconsole to send skbs
1580 * without having to re-enable interrupts. It's not called while
1581 * the interrupt routine is executing.
1583 static void pasemi_mac_netpoll(struct net_device
*dev
)
1585 const struct pasemi_mac
*mac
= netdev_priv(dev
);
1587 disable_irq(mac
->tx
->chan
.irq
);
1588 pasemi_mac_tx_intr(mac
->tx
->chan
.irq
, mac
->tx
);
1589 enable_irq(mac
->tx
->chan
.irq
);
1591 disable_irq(mac
->rx
->chan
.irq
);
1592 pasemi_mac_rx_intr(mac
->rx
->chan
.irq
, mac
->rx
);
1593 enable_irq(mac
->rx
->chan
.irq
);
1597 static int pasemi_mac_change_mtu(struct net_device
*dev
, int new_mtu
)
1599 struct pasemi_mac
*mac
= netdev_priv(dev
);
1601 unsigned int rcmdsta
= 0;
1605 running
= netif_running(dev
);
1608 /* Need to stop the interface, clean out all already
1609 * received buffers, free all unused buffers on the RX
1610 * interface ring, then finally re-fill the rx ring with
1611 * the new-size buffers and restart.
1614 napi_disable(&mac
->napi
);
1615 netif_tx_disable(dev
);
1616 pasemi_mac_intf_disable(mac
);
1618 rcmdsta
= read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac
->dma_if
));
1619 pasemi_mac_pause_rxint(mac
);
1620 pasemi_mac_clean_rx(rx_ring(mac
), RX_RING_SIZE
);
1621 pasemi_mac_free_rx_buffers(mac
);
1625 /* Setup checksum channels if large MTU and none already allocated */
1626 if (new_mtu
> PE_DEF_MTU
&& !mac
->num_cs
) {
1627 pasemi_mac_setup_csrings(mac
);
1634 /* Change maxf, i.e. what size frames are accepted.
1635 * Need room for ethernet header and CRC word
1637 reg
= read_mac_reg(mac
, PAS_MAC_CFG_MACCFG
);
1638 reg
&= ~PAS_MAC_CFG_MACCFG_MAXF_M
;
1639 reg
|= PAS_MAC_CFG_MACCFG_MAXF(new_mtu
+ ETH_HLEN
+ 4);
1640 write_mac_reg(mac
, PAS_MAC_CFG_MACCFG
, reg
);
1643 /* MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1644 mac
->bufsz
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ LOCAL_SKB_ALIGN
+ 128;
1648 write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac
->dma_if
),
1649 rcmdsta
| PAS_DMA_RXINT_RCMDSTA_EN
);
1651 rx_ring(mac
)->next_to_fill
= 0;
1652 pasemi_mac_replenish_rx_ring(dev
, RX_RING_SIZE
-1);
1654 napi_enable(&mac
->napi
);
1655 netif_start_queue(dev
);
1656 pasemi_mac_intf_enable(mac
);
1662 static const struct net_device_ops pasemi_netdev_ops
= {
1663 .ndo_open
= pasemi_mac_open
,
1664 .ndo_stop
= pasemi_mac_close
,
1665 .ndo_start_xmit
= pasemi_mac_start_tx
,
1666 .ndo_set_rx_mode
= pasemi_mac_set_rx_mode
,
1667 .ndo_set_mac_address
= pasemi_mac_set_mac_addr
,
1668 .ndo_change_mtu
= pasemi_mac_change_mtu
,
1669 .ndo_validate_addr
= eth_validate_addr
,
1670 #ifdef CONFIG_NET_POLL_CONTROLLER
1671 .ndo_poll_controller
= pasemi_mac_netpoll
,
1676 pasemi_mac_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1678 struct net_device
*dev
;
1679 struct pasemi_mac
*mac
;
1682 err
= pci_enable_device(pdev
);
1686 dev
= alloc_etherdev(sizeof(struct pasemi_mac
));
1689 goto out_disable_device
;
1692 pci_set_drvdata(pdev
, dev
);
1693 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1695 mac
= netdev_priv(dev
);
1700 netif_napi_add(dev
, &mac
->napi
, pasemi_mac_poll
, 64);
1702 dev
->features
= NETIF_F_IP_CSUM
| NETIF_F_LLTX
| NETIF_F_SG
|
1703 NETIF_F_HIGHDMA
| NETIF_F_GSO
;
1705 mac
->dma_pdev
= pci_get_device(PCI_VENDOR_ID_PASEMI
, 0xa007, NULL
);
1706 if (!mac
->dma_pdev
) {
1707 dev_err(&mac
->pdev
->dev
, "Can't find DMA Controller\n");
1711 dma_set_mask(&mac
->dma_pdev
->dev
, DMA_BIT_MASK(64));
1713 mac
->iob_pdev
= pci_get_device(PCI_VENDOR_ID_PASEMI
, 0xa001, NULL
);
1714 if (!mac
->iob_pdev
) {
1715 dev_err(&mac
->pdev
->dev
, "Can't find I/O Bridge\n");
1720 /* get mac addr from device tree */
1721 if (pasemi_get_mac_addr(mac
) || !is_valid_ether_addr(mac
->mac_addr
)) {
1725 memcpy(dev
->dev_addr
, mac
->mac_addr
, sizeof(mac
->mac_addr
));
1727 ret
= mac_to_intf(mac
);
1729 dev_err(&mac
->pdev
->dev
, "Can't map DMA interface\n");
1735 switch (pdev
->device
) {
1737 mac
->type
= MAC_TYPE_GMAC
;
1740 mac
->type
= MAC_TYPE_XAUI
;
1747 dev
->netdev_ops
= &pasemi_netdev_ops
;
1748 dev
->mtu
= PE_DEF_MTU
;
1750 /* MTU range: 64 - 9000 */
1751 dev
->min_mtu
= PE_MIN_MTU
;
1752 dev
->max_mtu
= PE_MAX_MTU
;
1754 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1755 mac
->bufsz
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ LOCAL_SKB_ALIGN
+ 128;
1757 dev
->ethtool_ops
= &pasemi_mac_ethtool_ops
;
1762 mac
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
1764 /* Enable most messages by default */
1765 mac
->msg_enable
= (NETIF_MSG_IFUP
<< 1 ) - 1;
1767 err
= register_netdev(dev
);
1770 dev_err(&mac
->pdev
->dev
, "register_netdev failed with error %d\n",
1773 } else if (netif_msg_probe(mac
)) {
1774 printk(KERN_INFO
"%s: PA Semi %s: intf %d, hw addr %pM\n",
1775 dev
->name
, mac
->type
== MAC_TYPE_GMAC
? "GMAC" : "XAUI",
1776 mac
->dma_if
, dev
->dev_addr
);
1782 pci_dev_put(mac
->iob_pdev
);
1783 pci_dev_put(mac
->dma_pdev
);
1787 pci_disable_device(pdev
);
1792 static void pasemi_mac_remove(struct pci_dev
*pdev
)
1794 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1795 struct pasemi_mac
*mac
;
1800 mac
= netdev_priv(netdev
);
1802 unregister_netdev(netdev
);
1804 pci_disable_device(pdev
);
1805 pci_dev_put(mac
->dma_pdev
);
1806 pci_dev_put(mac
->iob_pdev
);
1808 pasemi_dma_free_chan(&mac
->tx
->chan
);
1809 pasemi_dma_free_chan(&mac
->rx
->chan
);
1811 free_netdev(netdev
);
1814 static const struct pci_device_id pasemi_mac_pci_tbl
[] = {
1815 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI
, 0xa005) },
1816 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI
, 0xa006) },
1820 MODULE_DEVICE_TABLE(pci
, pasemi_mac_pci_tbl
);
1822 static struct pci_driver pasemi_mac_driver
= {
1823 .name
= "pasemi_mac",
1824 .id_table
= pasemi_mac_pci_tbl
,
1825 .probe
= pasemi_mac_probe
,
1826 .remove
= pasemi_mac_remove
,
1829 static void __exit
pasemi_mac_cleanup_module(void)
1831 pci_unregister_driver(&pasemi_mac_driver
);
1834 static int pasemi_mac_init_module(void)
1838 err
= pasemi_dma_init();
1842 return pci_register_driver(&pasemi_mac_driver
);
1845 module_init(pasemi_mac_init_module
);
1846 module_exit(pasemi_mac_cleanup_module
);