]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blob - drivers/net/ethernet/pensando/ionic/ionic_main.c
cfb90bf605fe7a416017067cba4b53a6d49b5f62
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / ethernet / pensando / ionic / ionic_main.c
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
3
4 #include <linux/printk.h>
5 #include <linux/dynamic_debug.h>
6 #include <linux/module.h>
7 #include <linux/netdevice.h>
8 #include <linux/utsname.h>
9 #include <generated/utsrelease.h>
10
11 #include "ionic.h"
12 #include "ionic_bus.h"
13 #include "ionic_lif.h"
14 #include "ionic_debugfs.h"
15
16 MODULE_DESCRIPTION(IONIC_DRV_DESCRIPTION);
17 MODULE_AUTHOR("Pensando Systems, Inc");
18 MODULE_LICENSE("GPL");
19
20 static const char *ionic_error_to_str(enum ionic_status_code code)
21 {
22 switch (code) {
23 case IONIC_RC_SUCCESS:
24 return "IONIC_RC_SUCCESS";
25 case IONIC_RC_EVERSION:
26 return "IONIC_RC_EVERSION";
27 case IONIC_RC_EOPCODE:
28 return "IONIC_RC_EOPCODE";
29 case IONIC_RC_EIO:
30 return "IONIC_RC_EIO";
31 case IONIC_RC_EPERM:
32 return "IONIC_RC_EPERM";
33 case IONIC_RC_EQID:
34 return "IONIC_RC_EQID";
35 case IONIC_RC_EQTYPE:
36 return "IONIC_RC_EQTYPE";
37 case IONIC_RC_ENOENT:
38 return "IONIC_RC_ENOENT";
39 case IONIC_RC_EINTR:
40 return "IONIC_RC_EINTR";
41 case IONIC_RC_EAGAIN:
42 return "IONIC_RC_EAGAIN";
43 case IONIC_RC_ENOMEM:
44 return "IONIC_RC_ENOMEM";
45 case IONIC_RC_EFAULT:
46 return "IONIC_RC_EFAULT";
47 case IONIC_RC_EBUSY:
48 return "IONIC_RC_EBUSY";
49 case IONIC_RC_EEXIST:
50 return "IONIC_RC_EEXIST";
51 case IONIC_RC_EINVAL:
52 return "IONIC_RC_EINVAL";
53 case IONIC_RC_ENOSPC:
54 return "IONIC_RC_ENOSPC";
55 case IONIC_RC_ERANGE:
56 return "IONIC_RC_ERANGE";
57 case IONIC_RC_BAD_ADDR:
58 return "IONIC_RC_BAD_ADDR";
59 case IONIC_RC_DEV_CMD:
60 return "IONIC_RC_DEV_CMD";
61 case IONIC_RC_ENOSUPP:
62 return "IONIC_RC_ENOSUPP";
63 case IONIC_RC_ERROR:
64 return "IONIC_RC_ERROR";
65 case IONIC_RC_ERDMA:
66 return "IONIC_RC_ERDMA";
67 default:
68 return "IONIC_RC_UNKNOWN";
69 }
70 }
71
72 static int ionic_error_to_errno(enum ionic_status_code code)
73 {
74 switch (code) {
75 case IONIC_RC_SUCCESS:
76 return 0;
77 case IONIC_RC_EVERSION:
78 case IONIC_RC_EQTYPE:
79 case IONIC_RC_EQID:
80 case IONIC_RC_EINVAL:
81 case IONIC_RC_ENOSUPP:
82 return -EINVAL;
83 case IONIC_RC_EPERM:
84 return -EPERM;
85 case IONIC_RC_ENOENT:
86 return -ENOENT;
87 case IONIC_RC_EAGAIN:
88 return -EAGAIN;
89 case IONIC_RC_ENOMEM:
90 return -ENOMEM;
91 case IONIC_RC_EFAULT:
92 return -EFAULT;
93 case IONIC_RC_EBUSY:
94 return -EBUSY;
95 case IONIC_RC_EEXIST:
96 return -EEXIST;
97 case IONIC_RC_ENOSPC:
98 return -ENOSPC;
99 case IONIC_RC_ERANGE:
100 return -ERANGE;
101 case IONIC_RC_BAD_ADDR:
102 return -EFAULT;
103 case IONIC_RC_EOPCODE:
104 case IONIC_RC_EINTR:
105 case IONIC_RC_DEV_CMD:
106 case IONIC_RC_ERROR:
107 case IONIC_RC_ERDMA:
108 case IONIC_RC_EIO:
109 default:
110 return -EIO;
111 }
112 }
113
114 static const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
115 {
116 switch (opcode) {
117 case IONIC_CMD_NOP:
118 return "IONIC_CMD_NOP";
119 case IONIC_CMD_INIT:
120 return "IONIC_CMD_INIT";
121 case IONIC_CMD_RESET:
122 return "IONIC_CMD_RESET";
123 case IONIC_CMD_IDENTIFY:
124 return "IONIC_CMD_IDENTIFY";
125 case IONIC_CMD_GETATTR:
126 return "IONIC_CMD_GETATTR";
127 case IONIC_CMD_SETATTR:
128 return "IONIC_CMD_SETATTR";
129 case IONIC_CMD_PORT_IDENTIFY:
130 return "IONIC_CMD_PORT_IDENTIFY";
131 case IONIC_CMD_PORT_INIT:
132 return "IONIC_CMD_PORT_INIT";
133 case IONIC_CMD_PORT_RESET:
134 return "IONIC_CMD_PORT_RESET";
135 case IONIC_CMD_PORT_GETATTR:
136 return "IONIC_CMD_PORT_GETATTR";
137 case IONIC_CMD_PORT_SETATTR:
138 return "IONIC_CMD_PORT_SETATTR";
139 case IONIC_CMD_LIF_INIT:
140 return "IONIC_CMD_LIF_INIT";
141 case IONIC_CMD_LIF_RESET:
142 return "IONIC_CMD_LIF_RESET";
143 case IONIC_CMD_LIF_IDENTIFY:
144 return "IONIC_CMD_LIF_IDENTIFY";
145 case IONIC_CMD_LIF_SETATTR:
146 return "IONIC_CMD_LIF_SETATTR";
147 case IONIC_CMD_LIF_GETATTR:
148 return "IONIC_CMD_LIF_GETATTR";
149 case IONIC_CMD_RX_MODE_SET:
150 return "IONIC_CMD_RX_MODE_SET";
151 case IONIC_CMD_RX_FILTER_ADD:
152 return "IONIC_CMD_RX_FILTER_ADD";
153 case IONIC_CMD_RX_FILTER_DEL:
154 return "IONIC_CMD_RX_FILTER_DEL";
155 case IONIC_CMD_Q_IDENTIFY:
156 return "IONIC_CMD_Q_IDENTIFY";
157 case IONIC_CMD_Q_INIT:
158 return "IONIC_CMD_Q_INIT";
159 case IONIC_CMD_Q_CONTROL:
160 return "IONIC_CMD_Q_CONTROL";
161 case IONIC_CMD_RDMA_RESET_LIF:
162 return "IONIC_CMD_RDMA_RESET_LIF";
163 case IONIC_CMD_RDMA_CREATE_EQ:
164 return "IONIC_CMD_RDMA_CREATE_EQ";
165 case IONIC_CMD_RDMA_CREATE_CQ:
166 return "IONIC_CMD_RDMA_CREATE_CQ";
167 case IONIC_CMD_RDMA_CREATE_ADMINQ:
168 return "IONIC_CMD_RDMA_CREATE_ADMINQ";
169 case IONIC_CMD_FW_DOWNLOAD:
170 return "IONIC_CMD_FW_DOWNLOAD";
171 case IONIC_CMD_FW_CONTROL:
172 return "IONIC_CMD_FW_CONTROL";
173 case IONIC_CMD_VF_GETATTR:
174 return "IONIC_CMD_VF_GETATTR";
175 case IONIC_CMD_VF_SETATTR:
176 return "IONIC_CMD_VF_SETATTR";
177 default:
178 return "DEVCMD_UNKNOWN";
179 }
180 }
181
182 static void ionic_adminq_flush(struct ionic_lif *lif)
183 {
184 struct ionic_queue *q = &lif->adminqcq->q;
185 struct ionic_desc_info *desc_info;
186
187 spin_lock(&lif->adminq_lock);
188
189 while (q->tail_idx != q->head_idx) {
190 desc_info = &q->info[q->tail_idx];
191 memset(desc_info->desc, 0, sizeof(union ionic_adminq_cmd));
192 desc_info->cb = NULL;
193 desc_info->cb_arg = NULL;
194 q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);
195 }
196 spin_unlock(&lif->adminq_lock);
197 }
198
199 static int ionic_adminq_check_err(struct ionic_lif *lif,
200 struct ionic_admin_ctx *ctx,
201 bool timeout)
202 {
203 struct net_device *netdev = lif->netdev;
204 const char *opcode_str;
205 const char *status_str;
206 int err = 0;
207
208 if (ctx->comp.comp.status || timeout) {
209 opcode_str = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
210 status_str = ionic_error_to_str(ctx->comp.comp.status);
211 err = timeout ? -ETIMEDOUT :
212 ionic_error_to_errno(ctx->comp.comp.status);
213
214 netdev_err(netdev, "%s (%d) failed: %s (%d)\n",
215 opcode_str, ctx->cmd.cmd.opcode,
216 timeout ? "TIMEOUT" : status_str, err);
217
218 if (timeout)
219 ionic_adminq_flush(lif);
220 }
221
222 return err;
223 }
224
225 static void ionic_adminq_cb(struct ionic_queue *q,
226 struct ionic_desc_info *desc_info,
227 struct ionic_cq_info *cq_info, void *cb_arg)
228 {
229 struct ionic_admin_ctx *ctx = cb_arg;
230 struct ionic_admin_comp *comp;
231 struct device *dev;
232
233 if (!ctx)
234 return;
235
236 comp = cq_info->cq_desc;
237 dev = &q->lif->netdev->dev;
238
239 memcpy(&ctx->comp, comp, sizeof(*comp));
240
241 dev_dbg(dev, "comp admin queue command:\n");
242 dynamic_hex_dump("comp ", DUMP_PREFIX_OFFSET, 16, 1,
243 &ctx->comp, sizeof(ctx->comp), true);
244
245 complete_all(&ctx->work);
246 }
247
248 static int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
249 {
250 struct ionic_desc_info *desc_info;
251 struct ionic_queue *q;
252 int err = 0;
253
254 WARN_ON(in_interrupt());
255
256 if (!lif->adminqcq)
257 return -EIO;
258
259 q = &lif->adminqcq->q;
260
261 spin_lock(&lif->adminq_lock);
262 if (!ionic_q_has_space(q, 1)) {
263 err = -ENOSPC;
264 goto err_out;
265 }
266
267 err = ionic_heartbeat_check(lif->ionic);
268 if (err)
269 goto err_out;
270
271 desc_info = &q->info[q->head_idx];
272 memcpy(desc_info->desc, &ctx->cmd, sizeof(ctx->cmd));
273
274 dev_dbg(&lif->netdev->dev, "post admin queue command:\n");
275 dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1,
276 &ctx->cmd, sizeof(ctx->cmd), true);
277
278 ionic_q_post(q, true, ionic_adminq_cb, ctx);
279
280 err_out:
281 spin_unlock(&lif->adminq_lock);
282
283 return err;
284 }
285
286 int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
287 {
288 struct net_device *netdev = lif->netdev;
289 unsigned long remaining;
290 const char *name;
291 int err;
292
293 err = ionic_adminq_post(lif, ctx);
294 if (err) {
295 if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state)) {
296 name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
297 netdev_err(netdev, "Posting of %s (%d) failed: %d\n",
298 name, ctx->cmd.cmd.opcode, err);
299 }
300 return err;
301 }
302
303 remaining = wait_for_completion_timeout(&ctx->work,
304 HZ * (ulong)DEVCMD_TIMEOUT);
305 return ionic_adminq_check_err(lif, ctx, (remaining == 0));
306 }
307
308 static void ionic_dev_cmd_clean(struct ionic *ionic)
309 {
310 union ionic_dev_cmd_regs *regs = ionic->idev.dev_cmd_regs;
311
312 iowrite32(0, &regs->doorbell);
313 memset_io(&regs->cmd, 0, sizeof(regs->cmd));
314 }
315
316 int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds)
317 {
318 struct ionic_dev *idev = &ionic->idev;
319 unsigned long start_time;
320 unsigned long max_wait;
321 unsigned long duration;
322 int opcode;
323 int hb = 0;
324 int done;
325 int err;
326
327 WARN_ON(in_interrupt());
328
329 /* Wait for dev cmd to complete, retrying if we get EAGAIN,
330 * but don't wait any longer than max_seconds.
331 */
332 max_wait = jiffies + (max_seconds * HZ);
333 try_again:
334 start_time = jiffies;
335 do {
336 done = ionic_dev_cmd_done(idev);
337 if (done)
338 break;
339 msleep(5);
340 hb = ionic_heartbeat_check(ionic);
341 } while (!done && !hb && time_before(jiffies, max_wait));
342 duration = jiffies - start_time;
343
344 opcode = idev->dev_cmd_regs->cmd.cmd.opcode;
345 dev_dbg(ionic->dev, "DEVCMD %s (%d) done=%d took %ld secs (%ld jiffies)\n",
346 ionic_opcode_to_str(opcode), opcode,
347 done, duration / HZ, duration);
348
349 if (!done && hb) {
350 /* It is possible (but unlikely) that FW was busy and missed a
351 * heartbeat check but is still alive and will process this
352 * request, so don't clean the dev_cmd in this case.
353 */
354 dev_warn(ionic->dev, "DEVCMD %s (%d) failed - FW halted\n",
355 ionic_opcode_to_str(opcode), opcode);
356 return -ENXIO;
357 }
358
359 if (!done && !time_before(jiffies, max_wait)) {
360 ionic_dev_cmd_clean(ionic);
361 dev_warn(ionic->dev, "DEVCMD %s (%d) timeout after %ld secs\n",
362 ionic_opcode_to_str(opcode), opcode, max_seconds);
363 return -ETIMEDOUT;
364 }
365
366 err = ionic_dev_cmd_status(&ionic->idev);
367 if (err) {
368 if (err == IONIC_RC_EAGAIN && !time_after(jiffies, max_wait)) {
369 dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) retrying...\n",
370 ionic_opcode_to_str(opcode), opcode,
371 ionic_error_to_str(err), err);
372
373 msleep(1000);
374 iowrite32(0, &idev->dev_cmd_regs->done);
375 iowrite32(1, &idev->dev_cmd_regs->doorbell);
376 goto try_again;
377 }
378
379 dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) failed\n",
380 ionic_opcode_to_str(opcode), opcode,
381 ionic_error_to_str(err), err);
382
383 return ionic_error_to_errno(err);
384 }
385
386 return 0;
387 }
388
389 int ionic_setup(struct ionic *ionic)
390 {
391 int err;
392
393 err = ionic_dev_setup(ionic);
394 if (err)
395 return err;
396 ionic_reset(ionic);
397
398 return 0;
399 }
400
401 int ionic_identify(struct ionic *ionic)
402 {
403 struct ionic_identity *ident = &ionic->ident;
404 struct ionic_dev *idev = &ionic->idev;
405 size_t sz;
406 int err;
407
408 memset(ident, 0, sizeof(*ident));
409
410 ident->drv.os_type = cpu_to_le32(IONIC_OS_TYPE_LINUX);
411 strncpy(ident->drv.driver_ver_str, UTS_RELEASE,
412 sizeof(ident->drv.driver_ver_str) - 1);
413
414 mutex_lock(&ionic->dev_cmd_lock);
415
416 sz = min(sizeof(ident->drv), sizeof(idev->dev_cmd_regs->data));
417 memcpy_toio(&idev->dev_cmd_regs->data, &ident->drv, sz);
418
419 ionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1);
420 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
421 if (!err) {
422 sz = min(sizeof(ident->dev), sizeof(idev->dev_cmd_regs->data));
423 memcpy_fromio(&ident->dev, &idev->dev_cmd_regs->data, sz);
424 }
425
426 mutex_unlock(&ionic->dev_cmd_lock);
427
428 if (err)
429 goto err_out_unmap;
430
431 ionic_debugfs_add_ident(ionic);
432
433 return 0;
434
435 err_out_unmap:
436 return err;
437 }
438
439 int ionic_init(struct ionic *ionic)
440 {
441 struct ionic_dev *idev = &ionic->idev;
442 int err;
443
444 mutex_lock(&ionic->dev_cmd_lock);
445 ionic_dev_cmd_init(idev);
446 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
447 mutex_unlock(&ionic->dev_cmd_lock);
448
449 return err;
450 }
451
452 int ionic_reset(struct ionic *ionic)
453 {
454 struct ionic_dev *idev = &ionic->idev;
455 int err;
456
457 mutex_lock(&ionic->dev_cmd_lock);
458 ionic_dev_cmd_reset(idev);
459 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
460 mutex_unlock(&ionic->dev_cmd_lock);
461
462 return err;
463 }
464
465 int ionic_port_identify(struct ionic *ionic)
466 {
467 struct ionic_identity *ident = &ionic->ident;
468 struct ionic_dev *idev = &ionic->idev;
469 size_t sz;
470 int err;
471
472 mutex_lock(&ionic->dev_cmd_lock);
473
474 ionic_dev_cmd_port_identify(idev);
475 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
476 if (!err) {
477 sz = min(sizeof(ident->port), sizeof(idev->dev_cmd_regs->data));
478 memcpy_fromio(&ident->port, &idev->dev_cmd_regs->data, sz);
479 }
480
481 mutex_unlock(&ionic->dev_cmd_lock);
482
483 return err;
484 }
485
486 int ionic_port_init(struct ionic *ionic)
487 {
488 struct ionic_identity *ident = &ionic->ident;
489 struct ionic_dev *idev = &ionic->idev;
490 size_t sz;
491 int err;
492
493 if (!idev->port_info) {
494 idev->port_info_sz = ALIGN(sizeof(*idev->port_info), PAGE_SIZE);
495 idev->port_info = dma_alloc_coherent(ionic->dev,
496 idev->port_info_sz,
497 &idev->port_info_pa,
498 GFP_KERNEL);
499 if (!idev->port_info) {
500 dev_err(ionic->dev, "Failed to allocate port info\n");
501 return -ENOMEM;
502 }
503 }
504
505 sz = min(sizeof(ident->port.config), sizeof(idev->dev_cmd_regs->data));
506
507 mutex_lock(&ionic->dev_cmd_lock);
508
509 memcpy_toio(&idev->dev_cmd_regs->data, &ident->port.config, sz);
510 ionic_dev_cmd_port_init(idev);
511 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
512
513 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
514 (void)ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
515
516 mutex_unlock(&ionic->dev_cmd_lock);
517 if (err) {
518 dev_err(ionic->dev, "Failed to init port\n");
519 dma_free_coherent(ionic->dev, idev->port_info_sz,
520 idev->port_info, idev->port_info_pa);
521 idev->port_info = NULL;
522 idev->port_info_pa = 0;
523 }
524
525 return err;
526 }
527
528 int ionic_port_reset(struct ionic *ionic)
529 {
530 struct ionic_dev *idev = &ionic->idev;
531 int err;
532
533 if (!idev->port_info)
534 return 0;
535
536 mutex_lock(&ionic->dev_cmd_lock);
537 ionic_dev_cmd_port_reset(idev);
538 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
539 mutex_unlock(&ionic->dev_cmd_lock);
540
541 dma_free_coherent(ionic->dev, idev->port_info_sz,
542 idev->port_info, idev->port_info_pa);
543
544 idev->port_info = NULL;
545 idev->port_info_pa = 0;
546
547 if (err)
548 dev_err(ionic->dev, "Failed to reset port\n");
549
550 return err;
551 }
552
553 static int __init ionic_init_module(void)
554 {
555 ionic_debugfs_create();
556 return ionic_bus_register_driver();
557 }
558
559 static void __exit ionic_cleanup_module(void)
560 {
561 ionic_bus_unregister_driver();
562 ionic_debugfs_destroy();
563
564 pr_info("%s removed\n", IONIC_DRV_NAME);
565 }
566
567 module_init(ionic_init_module);
568 module_exit(ionic_cleanup_module);