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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / qlogic / qed / qed_dcbx.c
1 /* QLogic qed NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include <linux/types.h>
34 #include <asm/byteorder.h>
35 #include <linux/bitops.h>
36 #include <linux/dcbnl.h>
37 #include <linux/errno.h>
38 #include <linux/kernel.h>
39 #include <linux/slab.h>
40 #include <linux/string.h>
41 #include "qed.h"
42 #include "qed_cxt.h"
43 #include "qed_dcbx.h"
44 #include "qed_hsi.h"
45 #include "qed_sp.h"
46 #include "qed_sriov.h"
47 #ifdef CONFIG_DCB
48 #include <linux/qed/qed_eth_if.h>
49 #endif
50
51 #define QED_DCBX_MAX_MIB_READ_TRY (100)
52 #define QED_ETH_TYPE_DEFAULT (0)
53 #define QED_ETH_TYPE_ROCE (0x8915)
54 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7)
55 #define QED_ETH_TYPE_FCOE (0x8906)
56 #define QED_TCP_PORT_ISCSI (0xCBC)
57
58 #define QED_DCBX_INVALID_PRIORITY 0xFF
59
60 /* Get Traffic Class from priority traffic class table, 4 bits represent
61 * the traffic class corresponding to the priority.
62 */
63 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \
64 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
65
66 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = {
67 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_DEFAULT},
68 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_DEFAULT},
69 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_DEFAULT},
70 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_DEFAULT},
71 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH}
72 };
73
74 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap)
75 {
76 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
77 DCBX_APP_SF_ETHTYPE);
78 }
79
80 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
81 {
82 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
83
84 /* Old MFW */
85 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
86 return qed_dcbx_app_ethtype(app_info_bitmap);
87
88 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE);
89 }
90
91 static bool qed_dcbx_app_port(u32 app_info_bitmap)
92 {
93 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
94 DCBX_APP_SF_PORT);
95 }
96
97 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
98 {
99 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
100
101 /* Old MFW */
102 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
103 return qed_dcbx_app_port(app_info_bitmap);
104
105 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT);
106 }
107
108 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
109 {
110 bool ethtype;
111
112 if (ieee)
113 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap);
114 else
115 ethtype = qed_dcbx_app_ethtype(app_info_bitmap);
116
117 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT));
118 }
119
120 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
121 {
122 bool port;
123
124 if (ieee)
125 port = qed_dcbx_ieee_app_port(app_info_bitmap,
126 DCBX_APP_SF_IEEE_TCP_PORT);
127 else
128 port = qed_dcbx_app_port(app_info_bitmap);
129
130 return !!(port && (proto_id == QED_TCP_PORT_ISCSI));
131 }
132
133 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
134 {
135 bool ethtype;
136
137 if (ieee)
138 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap);
139 else
140 ethtype = qed_dcbx_app_ethtype(app_info_bitmap);
141
142 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE));
143 }
144
145 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
146 {
147 bool ethtype;
148
149 if (ieee)
150 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap);
151 else
152 ethtype = qed_dcbx_app_ethtype(app_info_bitmap);
153
154 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE));
155 }
156
157 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
158 {
159 bool port;
160
161 if (ieee)
162 port = qed_dcbx_ieee_app_port(app_info_bitmap,
163 DCBX_APP_SF_IEEE_UDP_PORT);
164 else
165 port = qed_dcbx_app_port(app_info_bitmap);
166
167 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2));
168 }
169
170 static void
171 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data)
172 {
173 enum dcbx_protocol_type id;
174 int i;
175
176 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n",
177 p_data->dcbx_enabled);
178
179 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) {
180 id = qed_dcbx_app_update[i].id;
181
182 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
183 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n",
184 qed_dcbx_app_update[i].name, p_data->arr[id].update,
185 p_data->arr[id].enable, p_data->arr[id].priority,
186 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc);
187 }
188 }
189
190 static void
191 qed_dcbx_set_params(struct qed_dcbx_results *p_data,
192 struct qed_hw_info *p_info,
193 bool enable,
194 bool update,
195 u8 prio,
196 u8 tc,
197 enum dcbx_protocol_type type,
198 enum qed_pci_personality personality)
199 {
200 /* PF update ramrod data */
201 p_data->arr[type].update = update;
202 p_data->arr[type].enable = enable;
203 p_data->arr[type].priority = prio;
204 p_data->arr[type].tc = tc;
205
206 /* QM reconf data */
207 if (p_info->personality == personality)
208 p_info->offload_tc = tc;
209 }
210
211 /* Update app protocol data and hw_info fields with the TLV info */
212 static void
213 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data,
214 struct qed_hwfn *p_hwfn,
215 bool enable,
216 bool update,
217 u8 prio, u8 tc, enum dcbx_protocol_type type)
218 {
219 struct qed_hw_info *p_info = &p_hwfn->hw_info;
220 enum qed_pci_personality personality;
221 enum dcbx_protocol_type id;
222 char *name;
223 int i;
224
225 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) {
226 id = qed_dcbx_app_update[i].id;
227
228 if (type != id)
229 continue;
230
231 personality = qed_dcbx_app_update[i].personality;
232 name = qed_dcbx_app_update[i].name;
233
234 qed_dcbx_set_params(p_data, p_info, enable, update,
235 prio, tc, type, personality);
236 }
237 }
238
239 static bool
240 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn,
241 u32 app_prio_bitmap,
242 u16 id, enum dcbx_protocol_type *type, bool ieee)
243 {
244 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) {
245 *type = DCBX_PROTOCOL_FCOE;
246 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) {
247 *type = DCBX_PROTOCOL_ROCE;
248 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) {
249 *type = DCBX_PROTOCOL_ISCSI;
250 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) {
251 *type = DCBX_PROTOCOL_ETH;
252 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) {
253 *type = DCBX_PROTOCOL_ROCE_V2;
254 } else {
255 *type = DCBX_MAX_PROTOCOL_TYPE;
256 DP_ERR(p_hwfn,
257 "No action required, App TLV id = 0x%x app_prio_bitmap = 0x%x\n",
258 id, app_prio_bitmap);
259 return false;
260 }
261
262 return true;
263 }
264
265 /* Parse app TLV's to update TC information in hw_info structure for
266 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
267 */
268 static int
269 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn,
270 struct qed_dcbx_results *p_data,
271 struct dcbx_app_priority_entry *p_tbl,
272 u32 pri_tc_tbl, int count, u8 dcbx_version)
273 {
274 u8 tc, priority_map;
275 enum dcbx_protocol_type type;
276 bool enable, ieee;
277 u16 protocol_id;
278 int priority;
279 int i;
280
281 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count);
282
283 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
284 /* Parse APP TLV */
285 for (i = 0; i < count; i++) {
286 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry,
287 DCBX_APP_PROTOCOL_ID);
288 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry,
289 DCBX_APP_PRI_MAP);
290 priority = ffs(priority_map) - 1;
291 if (priority < 0) {
292 DP_ERR(p_hwfn, "Invalid priority\n");
293 return -EINVAL;
294 }
295
296 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority);
297 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
298 protocol_id, &type, ieee)) {
299 /* ETH always have the enable bit reset, as it gets
300 * vlan information per packet. For other protocols,
301 * should be set according to the dcbx_enabled
302 * indication, but we only got here if there was an
303 * app tlv for the protocol, so dcbx must be enabled.
304 */
305 enable = !(type == DCBX_PROTOCOL_ETH);
306
307 qed_dcbx_update_app_info(p_data, p_hwfn, enable, true,
308 priority, tc, type);
309 }
310 }
311
312 /* If RoCE-V2 TLV is not detected, driver need to use RoCE app
313 * data for RoCE-v2 not the default app data.
314 */
315 if (!p_data->arr[DCBX_PROTOCOL_ROCE_V2].update &&
316 p_data->arr[DCBX_PROTOCOL_ROCE].update) {
317 tc = p_data->arr[DCBX_PROTOCOL_ROCE].tc;
318 priority = p_data->arr[DCBX_PROTOCOL_ROCE].priority;
319 qed_dcbx_update_app_info(p_data, p_hwfn, true, true,
320 priority, tc, DCBX_PROTOCOL_ROCE_V2);
321 }
322
323 /* Update ramrod protocol data and hw_info fields
324 * with default info when corresponding APP TLV's are not detected.
325 * The enabled field has a different logic for ethernet as only for
326 * ethernet dcb should disabled by default, as the information arrives
327 * from the OS (unless an explicit app tlv was present).
328 */
329 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
330 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
331 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
332 if (p_data->arr[type].update)
333 continue;
334
335 enable = !(type == DCBX_PROTOCOL_ETH);
336 qed_dcbx_update_app_info(p_data, p_hwfn, enable, true,
337 priority, tc, type);
338 }
339
340 return 0;
341 }
342
343 /* Parse app TLV's to update TC information in hw_info structure for
344 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
345 */
346 static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn)
347 {
348 struct dcbx_app_priority_feature *p_app;
349 struct dcbx_app_priority_entry *p_tbl;
350 struct qed_dcbx_results data = { 0 };
351 struct dcbx_ets_feature *p_ets;
352 struct qed_hw_info *p_info;
353 u32 pri_tc_tbl, flags;
354 u8 dcbx_version;
355 int num_entries;
356 int rc = 0;
357
358 flags = p_hwfn->p_dcbx_info->operational.flags;
359 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION);
360
361 p_app = &p_hwfn->p_dcbx_info->operational.features.app;
362 p_tbl = p_app->app_pri_tbl;
363
364 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
365 pri_tc_tbl = p_ets->pri_tc_tbl[0];
366
367 p_info = &p_hwfn->hw_info;
368 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
369
370 rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
371 num_entries, dcbx_version);
372 if (rc)
373 return rc;
374
375 p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags,
376 DCBX_ETS_MAX_TCS);
377 p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC);
378 data.pf_id = p_hwfn->rel_pf_id;
379 data.dcbx_enabled = !!dcbx_version;
380
381 qed_dcbx_dp_protocol(p_hwfn, &data);
382
383 memcpy(&p_hwfn->p_dcbx_info->results, &data,
384 sizeof(struct qed_dcbx_results));
385
386 return 0;
387 }
388
389 static int
390 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn,
391 struct qed_ptt *p_ptt,
392 struct qed_dcbx_mib_meta_data *p_data,
393 enum qed_mib_read_type type)
394 {
395 u32 prefix_seq_num, suffix_seq_num;
396 int read_count = 0;
397 int rc = 0;
398
399 /* The data is considered to be valid only if both sequence numbers are
400 * the same.
401 */
402 do {
403 if (type == QED_DCBX_REMOTE_LLDP_MIB) {
404 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
405 p_data->addr, p_data->size);
406 prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
407 suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
408 } else {
409 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib,
410 p_data->addr, p_data->size);
411 prefix_seq_num = p_data->mib->prefix_seq_num;
412 suffix_seq_num = p_data->mib->suffix_seq_num;
413 }
414 read_count++;
415
416 DP_VERBOSE(p_hwfn,
417 QED_MSG_DCB,
418 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
419 type, read_count, prefix_seq_num, suffix_seq_num);
420 } while ((prefix_seq_num != suffix_seq_num) &&
421 (read_count < QED_DCBX_MAX_MIB_READ_TRY));
422
423 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) {
424 DP_ERR(p_hwfn,
425 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
426 type, read_count, prefix_seq_num, suffix_seq_num);
427 rc = -EIO;
428 }
429
430 return rc;
431 }
432
433 static void
434 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn,
435 struct qed_dcbx_app_prio *p_prio,
436 struct qed_dcbx_results *p_results)
437 {
438 u8 val;
439
440 p_prio->roce = QED_DCBX_INVALID_PRIORITY;
441 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY;
442 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY;
443 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY;
444
445 if (p_results->arr[DCBX_PROTOCOL_ROCE].update &&
446 p_results->arr[DCBX_PROTOCOL_ROCE].enable)
447 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority;
448
449 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update &&
450 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) {
451 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority;
452 p_prio->roce_v2 = val;
453 }
454
455 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update &&
456 p_results->arr[DCBX_PROTOCOL_ISCSI].enable)
457 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority;
458
459 if (p_results->arr[DCBX_PROTOCOL_FCOE].update &&
460 p_results->arr[DCBX_PROTOCOL_FCOE].enable)
461 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority;
462
463 if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
464 p_results->arr[DCBX_PROTOCOL_ETH].enable)
465 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
466
467 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
468 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n",
469 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe,
470 p_prio->eth);
471 }
472
473 static void
474 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn,
475 struct dcbx_app_priority_feature *p_app,
476 struct dcbx_app_priority_entry *p_tbl,
477 struct qed_dcbx_params *p_params, bool ieee)
478 {
479 struct qed_app_entry *entry;
480 u8 pri_map;
481 int i;
482
483 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags,
484 DCBX_APP_WILLING);
485 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED);
486 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR);
487 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags,
488 DCBX_APP_NUM_ENTRIES);
489 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
490 entry = &p_params->app_entry[i];
491 if (ieee) {
492 u8 sf_ieee;
493 u32 val;
494
495 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry,
496 DCBX_APP_SF_IEEE);
497 switch (sf_ieee) {
498 case DCBX_APP_SF_IEEE_RESERVED:
499 /* Old MFW */
500 val = QED_MFW_GET_FIELD(p_tbl[i].entry,
501 DCBX_APP_SF);
502 entry->sf_ieee = val ?
503 QED_DCBX_SF_IEEE_TCP_UDP_PORT :
504 QED_DCBX_SF_IEEE_ETHTYPE;
505 break;
506 case DCBX_APP_SF_IEEE_ETHTYPE:
507 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE;
508 break;
509 case DCBX_APP_SF_IEEE_TCP_PORT:
510 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT;
511 break;
512 case DCBX_APP_SF_IEEE_UDP_PORT:
513 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT;
514 break;
515 case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
516 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT;
517 break;
518 }
519 } else {
520 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry,
521 DCBX_APP_SF));
522 }
523
524 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
525 entry->prio = ffs(pri_map) - 1;
526 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry,
527 DCBX_APP_PROTOCOL_ID);
528 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
529 entry->proto_id,
530 &entry->proto_type, ieee);
531 }
532
533 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
534 "APP params: willing %d, valid %d error = %d\n",
535 p_params->app_willing, p_params->app_valid,
536 p_params->app_error);
537 }
538
539 static void
540 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn,
541 u32 pfc, struct qed_dcbx_params *p_params)
542 {
543 u8 pfc_map;
544
545 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING);
546 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS);
547 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED);
548 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
549 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
550 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
551 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
552 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
553 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
554 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
555 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
556 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
557
558 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
559 "PFC params: willing %d, pfc_bitmap %d\n",
560 p_params->pfc.willing, pfc_map);
561 }
562
563 static void
564 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn,
565 struct dcbx_ets_feature *p_ets,
566 struct qed_dcbx_params *p_params)
567 {
568 u32 bw_map[2], tsa_map[2], pri_map;
569 int i;
570
571 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags,
572 DCBX_ETS_WILLING);
573 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags,
574 DCBX_ETS_ENABLED);
575 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS);
576 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags,
577 DCBX_ETS_MAX_TCS);
578 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
579 "ETS params: willing %d, ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n",
580 p_params->ets_willing,
581 p_params->ets_cbs,
582 p_ets->pri_tc_tbl[0], p_params->max_ets_tc);
583
584 if (p_params->ets_enabled && !p_params->max_ets_tc) {
585 p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES;
586 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
587 "ETS params: max_ets_tc is forced to %d\n",
588 p_params->max_ets_tc);
589 }
590
591 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are
592 * encoded in a type u32 array of size 2.
593 */
594 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]);
595 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]);
596 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]);
597 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]);
598 pri_map = p_ets->pri_tc_tbl[0];
599 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
600 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
601 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
602 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i);
603 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
604 "elem %d bw_tbl %x tsa_tbl %x\n",
605 i, p_params->ets_tc_bw_tbl[i],
606 p_params->ets_tc_tsa_tbl[i]);
607 }
608 }
609
610 static void
611 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn,
612 struct dcbx_app_priority_feature *p_app,
613 struct dcbx_app_priority_entry *p_tbl,
614 struct dcbx_ets_feature *p_ets,
615 u32 pfc, struct qed_dcbx_params *p_params, bool ieee)
616 {
617 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
618 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
619 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
620 }
621
622 static void
623 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn,
624 struct qed_ptt *p_ptt, struct qed_dcbx_get *params)
625 {
626 struct dcbx_features *p_feat;
627
628 p_feat = &p_hwfn->p_dcbx_info->local_admin.features;
629 qed_dcbx_get_common_params(p_hwfn, &p_feat->app,
630 p_feat->app.app_pri_tbl, &p_feat->ets,
631 p_feat->pfc, &params->local.params, false);
632 params->local.valid = true;
633 }
634
635 static void
636 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn,
637 struct qed_ptt *p_ptt, struct qed_dcbx_get *params)
638 {
639 struct dcbx_features *p_feat;
640
641 p_feat = &p_hwfn->p_dcbx_info->remote.features;
642 qed_dcbx_get_common_params(p_hwfn, &p_feat->app,
643 p_feat->app.app_pri_tbl, &p_feat->ets,
644 p_feat->pfc, &params->remote.params, false);
645 params->remote.valid = true;
646 }
647
648 static void
649 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn,
650 struct qed_ptt *p_ptt,
651 struct qed_dcbx_get *params)
652 {
653 struct qed_dcbx_operational_params *p_operational;
654 struct qed_dcbx_results *p_results;
655 struct dcbx_features *p_feat;
656 bool enabled, err;
657 u32 flags;
658 bool val;
659
660 flags = p_hwfn->p_dcbx_info->operational.flags;
661
662 /* If DCBx version is non zero, then negotiation
663 * was successfuly performed
664 */
665 p_operational = &params->operational;
666 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) !=
667 DCBX_CONFIG_VERSION_DISABLED);
668 if (!enabled) {
669 p_operational->enabled = enabled;
670 p_operational->valid = false;
671 return;
672 }
673
674 p_feat = &p_hwfn->p_dcbx_info->operational.features;
675 p_results = &p_hwfn->p_dcbx_info->results;
676
677 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
678 DCBX_CONFIG_VERSION_IEEE);
679 p_operational->ieee = val;
680 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
681 DCBX_CONFIG_VERSION_CEE);
682 p_operational->cee = val;
683
684 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Version support: ieee %d, cee %d\n",
685 p_operational->ieee, p_operational->cee);
686
687 qed_dcbx_get_common_params(p_hwfn, &p_feat->app,
688 p_feat->app.app_pri_tbl, &p_feat->ets,
689 p_feat->pfc, &params->operational.params,
690 p_operational->ieee);
691 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results);
692 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR);
693 p_operational->err = err;
694 p_operational->enabled = enabled;
695 p_operational->valid = true;
696 }
697
698 static void
699 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn,
700 struct qed_ptt *p_ptt,
701 struct qed_dcbx_get *params)
702 {
703 struct lldp_config_params_s *p_local;
704
705 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE];
706
707 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id,
708 ARRAY_SIZE(p_local->local_chassis_id));
709 memcpy(params->lldp_local.local_port_id, p_local->local_port_id,
710 ARRAY_SIZE(p_local->local_port_id));
711 }
712
713 static void
714 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn,
715 struct qed_ptt *p_ptt,
716 struct qed_dcbx_get *params)
717 {
718 struct lldp_status_params_s *p_remote;
719
720 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE];
721
722 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id,
723 ARRAY_SIZE(p_remote->peer_chassis_id));
724 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id,
725 ARRAY_SIZE(p_remote->peer_port_id));
726 }
727
728 static int
729 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
730 struct qed_dcbx_get *p_params,
731 enum qed_mib_read_type type)
732 {
733 switch (type) {
734 case QED_DCBX_REMOTE_MIB:
735 qed_dcbx_get_remote_params(p_hwfn, p_ptt, p_params);
736 break;
737 case QED_DCBX_LOCAL_MIB:
738 qed_dcbx_get_local_params(p_hwfn, p_ptt, p_params);
739 break;
740 case QED_DCBX_OPERATIONAL_MIB:
741 qed_dcbx_get_operational_params(p_hwfn, p_ptt, p_params);
742 break;
743 case QED_DCBX_REMOTE_LLDP_MIB:
744 qed_dcbx_get_remote_lldp_params(p_hwfn, p_ptt, p_params);
745 break;
746 case QED_DCBX_LOCAL_LLDP_MIB:
747 qed_dcbx_get_local_lldp_params(p_hwfn, p_ptt, p_params);
748 break;
749 default:
750 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
751 return -EINVAL;
752 }
753
754 return 0;
755 }
756
757 static int
758 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
759 {
760 struct qed_dcbx_mib_meta_data data;
761 int rc = 0;
762
763 memset(&data, 0, sizeof(data));
764 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
765 lldp_config_params);
766 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
767 data.size = sizeof(struct lldp_config_params_s);
768 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
769
770 return rc;
771 }
772
773 static int
774 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn,
775 struct qed_ptt *p_ptt,
776 enum qed_mib_read_type type)
777 {
778 struct qed_dcbx_mib_meta_data data;
779 int rc = 0;
780
781 memset(&data, 0, sizeof(data));
782 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
783 lldp_status_params);
784 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
785 data.size = sizeof(struct lldp_status_params_s);
786 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
787
788 return rc;
789 }
790
791 static int
792 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn,
793 struct qed_ptt *p_ptt,
794 enum qed_mib_read_type type)
795 {
796 struct qed_dcbx_mib_meta_data data;
797 int rc = 0;
798
799 memset(&data, 0, sizeof(data));
800 data.addr = p_hwfn->mcp_info->port_addr +
801 offsetof(struct public_port, operational_dcbx_mib);
802 data.mib = &p_hwfn->p_dcbx_info->operational;
803 data.size = sizeof(struct dcbx_mib);
804 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
805
806 return rc;
807 }
808
809 static int
810 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn,
811 struct qed_ptt *p_ptt, enum qed_mib_read_type type)
812 {
813 struct qed_dcbx_mib_meta_data data;
814 int rc = 0;
815
816 memset(&data, 0, sizeof(data));
817 data.addr = p_hwfn->mcp_info->port_addr +
818 offsetof(struct public_port, remote_dcbx_mib);
819 data.mib = &p_hwfn->p_dcbx_info->remote;
820 data.size = sizeof(struct dcbx_mib);
821 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
822
823 return rc;
824 }
825
826 static int
827 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
828 {
829 struct qed_dcbx_mib_meta_data data;
830 int rc = 0;
831
832 memset(&data, 0, sizeof(data));
833 data.addr = p_hwfn->mcp_info->port_addr +
834 offsetof(struct public_port, local_admin_dcbx_mib);
835 data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
836 data.size = sizeof(struct dcbx_local_params);
837 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size);
838
839 return rc;
840 }
841
842 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn,
843 struct qed_ptt *p_ptt, enum qed_mib_read_type type)
844 {
845 int rc = -EINVAL;
846
847 switch (type) {
848 case QED_DCBX_OPERATIONAL_MIB:
849 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
850 break;
851 case QED_DCBX_REMOTE_MIB:
852 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
853 break;
854 case QED_DCBX_LOCAL_MIB:
855 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt);
856 break;
857 case QED_DCBX_REMOTE_LLDP_MIB:
858 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
859 break;
860 case QED_DCBX_LOCAL_LLDP_MIB:
861 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
862 break;
863 default:
864 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
865 }
866
867 return rc;
868 }
869
870 void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type)
871 {
872 struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common;
873 void *cookie = hwfn->cdev->ops_cookie;
874
875 if (cookie && op->dcbx_aen)
876 op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type);
877 }
878
879 /* Read updated MIB.
880 * Reconfigure QM and invoke PF update ramrod command if operational MIB
881 * change is detected.
882 */
883 int
884 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn,
885 struct qed_ptt *p_ptt, enum qed_mib_read_type type)
886 {
887 int rc = 0;
888
889 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type);
890 if (rc)
891 return rc;
892
893 if (type == QED_DCBX_OPERATIONAL_MIB) {
894 rc = qed_dcbx_process_mib_info(p_hwfn);
895 if (!rc) {
896 /* reconfigure tcs of QM queues according
897 * to negotiation results
898 */
899 qed_qm_reconf(p_hwfn, p_ptt);
900
901 /* update storm FW with negotiation results */
902 qed_sp_pf_update(p_hwfn);
903 }
904 }
905 qed_dcbx_get_params(p_hwfn, p_ptt, &p_hwfn->p_dcbx_info->get, type);
906 qed_dcbx_aen(p_hwfn, type);
907
908 return rc;
909 }
910
911 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn)
912 {
913 int rc = 0;
914
915 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL);
916 if (!p_hwfn->p_dcbx_info)
917 rc = -ENOMEM;
918
919 return rc;
920 }
921
922 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn,
923 struct qed_dcbx_info *p_dcbx_info)
924 {
925 kfree(p_hwfn->p_dcbx_info);
926 }
927
928 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
929 struct qed_dcbx_results *p_src,
930 enum dcbx_protocol_type type)
931 {
932 p_data->dcb_enable_flag = p_src->arr[type].enable;
933 p_data->dcb_priority = p_src->arr[type].priority;
934 p_data->dcb_tc = p_src->arr[type].tc;
935 }
936
937 /* Set pf update ramrod command params */
938 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src,
939 struct pf_update_ramrod_data *p_dest)
940 {
941 struct protocol_dcb_data *p_dcb_data;
942 bool update_flag = false;
943
944 p_dest->pf_id = p_src->pf_id;
945
946 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update;
947 p_dest->update_fcoe_dcb_data_flag = update_flag;
948
949 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update;
950 p_dest->update_roce_dcb_data_flag = update_flag;
951 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update;
952 p_dest->update_roce_dcb_data_flag = update_flag;
953
954 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update;
955 p_dest->update_iscsi_dcb_data_flag = update_flag;
956 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
957 p_dest->update_eth_dcb_data_flag = update_flag;
958
959 p_dcb_data = &p_dest->fcoe_dcb_data;
960 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE);
961 p_dcb_data = &p_dest->roce_dcb_data;
962
963 if (p_src->arr[DCBX_PROTOCOL_ROCE].update)
964 qed_dcbx_update_protocol_data(p_dcb_data, p_src,
965 DCBX_PROTOCOL_ROCE);
966 if (p_src->arr[DCBX_PROTOCOL_ROCE_V2].update)
967 qed_dcbx_update_protocol_data(p_dcb_data, p_src,
968 DCBX_PROTOCOL_ROCE_V2);
969
970 p_dcb_data = &p_dest->iscsi_dcb_data;
971 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI);
972 p_dcb_data = &p_dest->eth_dcb_data;
973 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
974 }
975
976 #ifdef CONFIG_DCB
977 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn,
978 struct qed_dcbx_get *p_get,
979 enum qed_mib_read_type type)
980 {
981 struct qed_ptt *p_ptt;
982 int rc;
983
984 if (IS_VF(p_hwfn->cdev))
985 return -EINVAL;
986
987 p_ptt = qed_ptt_acquire(p_hwfn);
988 if (!p_ptt)
989 return -EBUSY;
990
991 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type);
992 if (rc)
993 goto out;
994
995 rc = qed_dcbx_get_params(p_hwfn, p_ptt, p_get, type);
996
997 out:
998 qed_ptt_release(p_hwfn, p_ptt);
999 return rc;
1000 }
1001
1002 static void
1003 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn,
1004 u32 *pfc, struct qed_dcbx_params *p_params)
1005 {
1006 u8 pfc_map = 0;
1007 int i;
1008
1009 *pfc &= ~DCBX_PFC_ERROR_MASK;
1010
1011 if (p_params->pfc.willing)
1012 *pfc |= DCBX_PFC_WILLING_MASK;
1013 else
1014 *pfc &= ~DCBX_PFC_WILLING_MASK;
1015
1016 if (p_params->pfc.enabled)
1017 *pfc |= DCBX_PFC_ENABLED_MASK;
1018 else
1019 *pfc &= ~DCBX_PFC_ENABLED_MASK;
1020
1021 *pfc &= ~DCBX_PFC_CAPS_MASK;
1022 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT;
1023
1024 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
1025 if (p_params->pfc.prio[i])
1026 pfc_map |= BIT(i);
1027
1028 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK;
1029 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT);
1030
1031 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc);
1032 }
1033
1034 static void
1035 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn,
1036 struct dcbx_ets_feature *p_ets,
1037 struct qed_dcbx_params *p_params)
1038 {
1039 u8 *bw_map, *tsa_map;
1040 u32 val;
1041 int i;
1042
1043 if (p_params->ets_willing)
1044 p_ets->flags |= DCBX_ETS_WILLING_MASK;
1045 else
1046 p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
1047
1048 if (p_params->ets_cbs)
1049 p_ets->flags |= DCBX_ETS_CBS_MASK;
1050 else
1051 p_ets->flags &= ~DCBX_ETS_CBS_MASK;
1052
1053 if (p_params->ets_enabled)
1054 p_ets->flags |= DCBX_ETS_ENABLED_MASK;
1055 else
1056 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
1057
1058 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
1059 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT;
1060
1061 bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
1062 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
1063 p_ets->pri_tc_tbl[0] = 0;
1064 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
1065 bw_map[i] = p_params->ets_tc_bw_tbl[i];
1066 tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
1067 /* Copy the priority value to the corresponding 4 bits in the
1068 * traffic class table.
1069 */
1070 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
1071 p_ets->pri_tc_tbl[0] |= val;
1072 }
1073 for (i = 0; i < 2; i++) {
1074 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]);
1075 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]);
1076 }
1077 }
1078
1079 static void
1080 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn,
1081 struct dcbx_app_priority_feature *p_app,
1082 struct qed_dcbx_params *p_params, bool ieee)
1083 {
1084 u32 *entry;
1085 int i;
1086
1087 if (p_params->app_willing)
1088 p_app->flags |= DCBX_APP_WILLING_MASK;
1089 else
1090 p_app->flags &= ~DCBX_APP_WILLING_MASK;
1091
1092 if (p_params->app_valid)
1093 p_app->flags |= DCBX_APP_ENABLED_MASK;
1094 else
1095 p_app->flags &= ~DCBX_APP_ENABLED_MASK;
1096
1097 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
1098 p_app->flags |= (u32)p_params->num_app_entries <<
1099 DCBX_APP_NUM_ENTRIES_SHIFT;
1100
1101 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
1102 entry = &p_app->app_pri_tbl[i].entry;
1103 *entry = 0;
1104 if (ieee) {
1105 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK);
1106 switch (p_params->app_entry[i].sf_ieee) {
1107 case QED_DCBX_SF_IEEE_ETHTYPE:
1108 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
1109 DCBX_APP_SF_IEEE_SHIFT);
1110 *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
1111 DCBX_APP_SF_SHIFT);
1112 break;
1113 case QED_DCBX_SF_IEEE_TCP_PORT:
1114 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
1115 DCBX_APP_SF_IEEE_SHIFT);
1116 *entry |= ((u32)DCBX_APP_SF_PORT <<
1117 DCBX_APP_SF_SHIFT);
1118 break;
1119 case QED_DCBX_SF_IEEE_UDP_PORT:
1120 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
1121 DCBX_APP_SF_IEEE_SHIFT);
1122 *entry |= ((u32)DCBX_APP_SF_PORT <<
1123 DCBX_APP_SF_SHIFT);
1124 break;
1125 case QED_DCBX_SF_IEEE_TCP_UDP_PORT:
1126 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
1127 DCBX_APP_SF_IEEE_SHIFT);
1128 *entry |= ((u32)DCBX_APP_SF_PORT <<
1129 DCBX_APP_SF_SHIFT);
1130 break;
1131 }
1132 } else {
1133 *entry &= ~DCBX_APP_SF_MASK;
1134 if (p_params->app_entry[i].ethtype)
1135 *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
1136 DCBX_APP_SF_SHIFT);
1137 else
1138 *entry |= ((u32)DCBX_APP_SF_PORT <<
1139 DCBX_APP_SF_SHIFT);
1140 }
1141
1142 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
1143 *entry |= ((u32)p_params->app_entry[i].proto_id <<
1144 DCBX_APP_PROTOCOL_ID_SHIFT);
1145 *entry &= ~DCBX_APP_PRI_MAP_MASK;
1146 *entry |= ((u32)(p_params->app_entry[i].prio) <<
1147 DCBX_APP_PRI_MAP_SHIFT);
1148 }
1149 }
1150
1151 static void
1152 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn,
1153 struct dcbx_local_params *local_admin,
1154 struct qed_dcbx_set *params)
1155 {
1156 bool ieee = false;
1157
1158 local_admin->flags = 0;
1159 memcpy(&local_admin->features,
1160 &p_hwfn->p_dcbx_info->operational.features,
1161 sizeof(local_admin->features));
1162
1163 if (params->enabled) {
1164 local_admin->config = params->ver_num;
1165 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
1166 } else {
1167 local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
1168 }
1169
1170 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG)
1171 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
1172 &params->config.params);
1173
1174 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG)
1175 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
1176 &params->config.params);
1177
1178 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG)
1179 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
1180 &params->config.params, ieee);
1181 }
1182
1183 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
1184 struct qed_dcbx_set *params, bool hw_commit)
1185 {
1186 struct dcbx_local_params local_admin;
1187 struct qed_dcbx_mib_meta_data data;
1188 u32 resp = 0, param = 0;
1189 int rc = 0;
1190
1191 if (!hw_commit) {
1192 memcpy(&p_hwfn->p_dcbx_info->set, params,
1193 sizeof(struct qed_dcbx_set));
1194 return 0;
1195 }
1196
1197 /* clear set-parmas cache */
1198 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set));
1199
1200 memset(&local_admin, 0, sizeof(local_admin));
1201 qed_dcbx_set_local_params(p_hwfn, &local_admin, params);
1202
1203 data.addr = p_hwfn->mcp_info->port_addr +
1204 offsetof(struct public_port, local_admin_dcbx_mib);
1205 data.local_admin = &local_admin;
1206 data.size = sizeof(struct dcbx_local_params);
1207 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
1208
1209 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
1210 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, &param);
1211 if (rc)
1212 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n");
1213
1214 return rc;
1215 }
1216
1217 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn,
1218 struct qed_dcbx_set *params)
1219 {
1220 struct qed_dcbx_get *dcbx_info;
1221 int rc;
1222
1223 if (p_hwfn->p_dcbx_info->set.config.valid) {
1224 memcpy(params, &p_hwfn->p_dcbx_info->set,
1225 sizeof(struct qed_dcbx_set));
1226 return 0;
1227 }
1228
1229 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL);
1230 if (!dcbx_info)
1231 return -ENOMEM;
1232
1233 memset(dcbx_info, 0, sizeof(*dcbx_info));
1234 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB);
1235 if (rc) {
1236 kfree(dcbx_info);
1237 return rc;
1238 }
1239
1240 p_hwfn->p_dcbx_info->set.override_flags = 0;
1241 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
1242 if (dcbx_info->operational.cee)
1243 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
1244 if (dcbx_info->operational.ieee)
1245 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
1246
1247 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
1248 memcpy(&p_hwfn->p_dcbx_info->set.config.params,
1249 &dcbx_info->operational.params,
1250 sizeof(struct qed_dcbx_admin_params));
1251 p_hwfn->p_dcbx_info->set.config.valid = true;
1252
1253 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set));
1254
1255 kfree(dcbx_info);
1256
1257 return 0;
1258 }
1259
1260 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn,
1261 enum qed_mib_read_type type)
1262 {
1263 struct qed_dcbx_get *dcbx_info;
1264
1265 dcbx_info = kmalloc(sizeof(*dcbx_info), GFP_ATOMIC);
1266 if (!dcbx_info)
1267 return NULL;
1268
1269 memset(dcbx_info, 0, sizeof(*dcbx_info));
1270 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) {
1271 kfree(dcbx_info);
1272 return NULL;
1273 }
1274
1275 if ((type == QED_DCBX_OPERATIONAL_MIB) &&
1276 !dcbx_info->operational.enabled) {
1277 DP_INFO(hwfn, "DCBX is not enabled/operational\n");
1278 kfree(dcbx_info);
1279 return NULL;
1280 }
1281
1282 return dcbx_info;
1283 }
1284
1285 static u8 qed_dcbnl_getstate(struct qed_dev *cdev)
1286 {
1287 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1288 struct qed_dcbx_get *dcbx_info;
1289 bool enabled;
1290
1291 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1292 if (!dcbx_info)
1293 return 0;
1294
1295 enabled = dcbx_info->operational.enabled;
1296 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled);
1297 kfree(dcbx_info);
1298
1299 return enabled;
1300 }
1301
1302 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state)
1303 {
1304 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1305 struct qed_dcbx_set dcbx_set;
1306 struct qed_ptt *ptt;
1307 int rc;
1308
1309 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state);
1310
1311 memset(&dcbx_set, 0, sizeof(dcbx_set));
1312 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1313 if (rc)
1314 return 1;
1315
1316 dcbx_set.enabled = !!state;
1317
1318 ptt = qed_ptt_acquire(hwfn);
1319 if (!ptt)
1320 return 1;
1321
1322 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1323
1324 qed_ptt_release(hwfn, ptt);
1325
1326 return rc ? 1 : 0;
1327 }
1328
1329 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type,
1330 u8 *pgid, u8 *bw_pct, u8 *up_map)
1331 {
1332 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1333 struct qed_dcbx_get *dcbx_info;
1334
1335 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc);
1336 *prio_type = *pgid = *bw_pct = *up_map = 0;
1337 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) {
1338 DP_INFO(hwfn, "Invalid tc %d\n", tc);
1339 return;
1340 }
1341
1342 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1343 if (!dcbx_info)
1344 return;
1345
1346 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc];
1347 kfree(dcbx_info);
1348 }
1349
1350 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct)
1351 {
1352 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1353 struct qed_dcbx_get *dcbx_info;
1354
1355 *bw_pct = 0;
1356 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid);
1357 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) {
1358 DP_INFO(hwfn, "Invalid pgid %d\n", pgid);
1359 return;
1360 }
1361
1362 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1363 if (!dcbx_info)
1364 return;
1365
1366 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid];
1367 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct);
1368 kfree(dcbx_info);
1369 }
1370
1371 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio,
1372 u8 *bwg_id, u8 *bw_pct, u8 *up_map)
1373 {
1374 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
1375 *prio = *bwg_id = *bw_pct = *up_map = 0;
1376 }
1377
1378 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev,
1379 int bwg_id, u8 *bw_pct)
1380 {
1381 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
1382 *bw_pct = 0;
1383 }
1384
1385 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev,
1386 int priority, u8 *setting)
1387 {
1388 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1389 struct qed_dcbx_get *dcbx_info;
1390
1391 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority);
1392 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) {
1393 DP_INFO(hwfn, "Invalid priority %d\n", priority);
1394 return;
1395 }
1396
1397 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1398 if (!dcbx_info)
1399 return;
1400
1401 *setting = dcbx_info->operational.params.pfc.prio[priority];
1402 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting);
1403 kfree(dcbx_info);
1404 }
1405
1406 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting)
1407 {
1408 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1409 struct qed_dcbx_set dcbx_set;
1410 struct qed_ptt *ptt;
1411 int rc;
1412
1413 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n",
1414 priority, setting);
1415 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) {
1416 DP_INFO(hwfn, "Invalid priority %d\n", priority);
1417 return;
1418 }
1419
1420 memset(&dcbx_set, 0, sizeof(dcbx_set));
1421 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1422 if (rc)
1423 return;
1424
1425 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
1426 dcbx_set.config.params.pfc.prio[priority] = !!setting;
1427
1428 ptt = qed_ptt_acquire(hwfn);
1429 if (!ptt)
1430 return;
1431
1432 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1433
1434 qed_ptt_release(hwfn, ptt);
1435 }
1436
1437 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap)
1438 {
1439 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1440 struct qed_dcbx_get *dcbx_info;
1441 int rc = 0;
1442
1443 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid);
1444 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1445 if (!dcbx_info)
1446 return 1;
1447
1448 switch (capid) {
1449 case DCB_CAP_ATTR_PG:
1450 case DCB_CAP_ATTR_PFC:
1451 case DCB_CAP_ATTR_UP2TC:
1452 case DCB_CAP_ATTR_GSP:
1453 *cap = true;
1454 break;
1455 case DCB_CAP_ATTR_PG_TCS:
1456 case DCB_CAP_ATTR_PFC_TCS:
1457 *cap = 0x80;
1458 break;
1459 case DCB_CAP_ATTR_DCBX:
1460 *cap = (DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE |
1461 DCB_CAP_DCBX_VER_IEEE);
1462 break;
1463 default:
1464 *cap = false;
1465 rc = 1;
1466 }
1467
1468 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap);
1469 kfree(dcbx_info);
1470
1471 return rc;
1472 }
1473
1474 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num)
1475 {
1476 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1477 struct qed_dcbx_get *dcbx_info;
1478 int rc = 0;
1479
1480 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid);
1481 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1482 if (!dcbx_info)
1483 return -EINVAL;
1484
1485 switch (tcid) {
1486 case DCB_NUMTCS_ATTR_PG:
1487 *num = dcbx_info->operational.params.max_ets_tc;
1488 break;
1489 case DCB_NUMTCS_ATTR_PFC:
1490 *num = dcbx_info->operational.params.pfc.max_tc;
1491 break;
1492 default:
1493 rc = -EINVAL;
1494 }
1495
1496 kfree(dcbx_info);
1497 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num);
1498
1499 return rc;
1500 }
1501
1502 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev)
1503 {
1504 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1505 struct qed_dcbx_get *dcbx_info;
1506 bool enabled;
1507
1508 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1509 if (!dcbx_info)
1510 return 0;
1511
1512 enabled = dcbx_info->operational.params.pfc.enabled;
1513 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled);
1514 kfree(dcbx_info);
1515
1516 return enabled;
1517 }
1518
1519 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev)
1520 {
1521 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1522 struct qed_dcbx_get *dcbx_info;
1523 u8 mode = 0;
1524
1525 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1526 if (!dcbx_info)
1527 return 0;
1528
1529 if (dcbx_info->operational.enabled)
1530 mode |= DCB_CAP_DCBX_LLD_MANAGED;
1531 if (dcbx_info->operational.ieee)
1532 mode |= DCB_CAP_DCBX_VER_IEEE;
1533 if (dcbx_info->operational.cee)
1534 mode |= DCB_CAP_DCBX_VER_CEE;
1535
1536 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode);
1537 kfree(dcbx_info);
1538
1539 return mode;
1540 }
1541
1542 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev,
1543 int tc,
1544 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map)
1545 {
1546 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1547 struct qed_dcbx_set dcbx_set;
1548 struct qed_ptt *ptt;
1549 int rc;
1550
1551 DP_VERBOSE(hwfn, QED_MSG_DCB,
1552 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n",
1553 tc, pri_type, pgid, bw_pct, up_map);
1554
1555 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) {
1556 DP_INFO(hwfn, "Invalid tc %d\n", tc);
1557 return;
1558 }
1559
1560 memset(&dcbx_set, 0, sizeof(dcbx_set));
1561 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1562 if (rc)
1563 return;
1564
1565 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
1566 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid;
1567
1568 ptt = qed_ptt_acquire(hwfn);
1569 if (!ptt)
1570 return;
1571
1572 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1573
1574 qed_ptt_release(hwfn, ptt);
1575 }
1576
1577 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio,
1578 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map)
1579 {
1580 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
1581 }
1582
1583 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct)
1584 {
1585 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1586 struct qed_dcbx_set dcbx_set;
1587 struct qed_ptt *ptt;
1588 int rc;
1589
1590 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct);
1591 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) {
1592 DP_INFO(hwfn, "Invalid pgid %d\n", pgid);
1593 return;
1594 }
1595
1596 memset(&dcbx_set, 0, sizeof(dcbx_set));
1597 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1598 if (rc)
1599 return;
1600
1601 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
1602 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct;
1603
1604 ptt = qed_ptt_acquire(hwfn);
1605 if (!ptt)
1606 return;
1607
1608 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1609
1610 qed_ptt_release(hwfn, ptt);
1611 }
1612
1613 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct)
1614 {
1615 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
1616 }
1617
1618 static u8 qed_dcbnl_setall(struct qed_dev *cdev)
1619 {
1620 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1621 struct qed_dcbx_set dcbx_set;
1622 struct qed_ptt *ptt;
1623 int rc;
1624
1625 memset(&dcbx_set, 0, sizeof(dcbx_set));
1626 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1627 if (rc)
1628 return 1;
1629
1630 ptt = qed_ptt_acquire(hwfn);
1631 if (!ptt)
1632 return 1;
1633
1634 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1);
1635
1636 qed_ptt_release(hwfn, ptt);
1637
1638 return rc;
1639 }
1640
1641 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num)
1642 {
1643 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1644 struct qed_dcbx_set dcbx_set;
1645 struct qed_ptt *ptt;
1646 int rc;
1647
1648 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num);
1649 memset(&dcbx_set, 0, sizeof(dcbx_set));
1650 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1651 if (rc)
1652 return 1;
1653
1654 switch (tcid) {
1655 case DCB_NUMTCS_ATTR_PG:
1656 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
1657 dcbx_set.config.params.max_ets_tc = num;
1658 break;
1659 case DCB_NUMTCS_ATTR_PFC:
1660 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
1661 dcbx_set.config.params.pfc.max_tc = num;
1662 break;
1663 default:
1664 DP_INFO(hwfn, "Invalid tcid %d\n", tcid);
1665 return -EINVAL;
1666 }
1667
1668 ptt = qed_ptt_acquire(hwfn);
1669 if (!ptt)
1670 return -EINVAL;
1671
1672 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1673
1674 qed_ptt_release(hwfn, ptt);
1675
1676 return 0;
1677 }
1678
1679 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state)
1680 {
1681 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1682 struct qed_dcbx_set dcbx_set;
1683 struct qed_ptt *ptt;
1684 int rc;
1685
1686 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state);
1687
1688 memset(&dcbx_set, 0, sizeof(dcbx_set));
1689 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1690 if (rc)
1691 return;
1692
1693 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
1694 dcbx_set.config.params.pfc.enabled = !!state;
1695
1696 ptt = qed_ptt_acquire(hwfn);
1697 if (!ptt)
1698 return;
1699
1700 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1701
1702 qed_ptt_release(hwfn, ptt);
1703 }
1704
1705 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval)
1706 {
1707 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1708 struct qed_dcbx_get *dcbx_info;
1709 struct qed_app_entry *entry;
1710 bool ethtype;
1711 u8 prio = 0;
1712 int i;
1713
1714 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1715 if (!dcbx_info)
1716 return -EINVAL;
1717
1718 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE);
1719 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
1720 entry = &dcbx_info->operational.params.app_entry[i];
1721 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) {
1722 prio = entry->prio;
1723 break;
1724 }
1725 }
1726
1727 if (i == QED_DCBX_MAX_APP_PROTOCOL) {
1728 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval);
1729 kfree(dcbx_info);
1730 return -EINVAL;
1731 }
1732
1733 kfree(dcbx_info);
1734
1735 return prio;
1736 }
1737
1738 static int qed_dcbnl_setapp(struct qed_dev *cdev,
1739 u8 idtype, u16 idval, u8 pri_map)
1740 {
1741 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1742 struct qed_dcbx_set dcbx_set;
1743 struct qed_app_entry *entry;
1744 struct qed_ptt *ptt;
1745 bool ethtype;
1746 int rc, i;
1747
1748 memset(&dcbx_set, 0, sizeof(dcbx_set));
1749 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1750 if (rc)
1751 return -EINVAL;
1752
1753 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE);
1754 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
1755 entry = &dcbx_set.config.params.app_entry[i];
1756 if ((entry->ethtype == ethtype) && (entry->proto_id == idval))
1757 break;
1758 /* First empty slot */
1759 if (!entry->proto_id) {
1760 dcbx_set.config.params.num_app_entries++;
1761 break;
1762 }
1763 }
1764
1765 if (i == QED_DCBX_MAX_APP_PROTOCOL) {
1766 DP_ERR(cdev, "App table is full\n");
1767 return -EBUSY;
1768 }
1769
1770 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG;
1771 dcbx_set.config.params.app_entry[i].ethtype = ethtype;
1772 dcbx_set.config.params.app_entry[i].proto_id = idval;
1773 dcbx_set.config.params.app_entry[i].prio = pri_map;
1774
1775 ptt = qed_ptt_acquire(hwfn);
1776 if (!ptt)
1777 return -EBUSY;
1778
1779 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1780
1781 qed_ptt_release(hwfn, ptt);
1782
1783 return rc;
1784 }
1785
1786 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode)
1787 {
1788 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1789 struct qed_dcbx_set dcbx_set;
1790 struct qed_ptt *ptt;
1791 int rc;
1792
1793 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode);
1794
1795 if (!(mode & DCB_CAP_DCBX_VER_IEEE) && !(mode & DCB_CAP_DCBX_VER_CEE)) {
1796 DP_INFO(hwfn, "Allowed mode is cee, ieee or both\n");
1797 return 1;
1798 }
1799
1800 memset(&dcbx_set, 0, sizeof(dcbx_set));
1801 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1802 if (rc)
1803 return 1;
1804
1805 dcbx_set.ver_num = 0;
1806 if (mode & DCB_CAP_DCBX_VER_CEE) {
1807 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE;
1808 dcbx_set.enabled = true;
1809 }
1810
1811 if (mode & DCB_CAP_DCBX_VER_IEEE) {
1812 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
1813 dcbx_set.enabled = true;
1814 }
1815
1816 ptt = qed_ptt_acquire(hwfn);
1817 if (!ptt)
1818 return 1;
1819
1820 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1821
1822 qed_ptt_release(hwfn, ptt);
1823
1824 return 0;
1825 }
1826
1827 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags)
1828 {
1829 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1830 struct qed_dcbx_get *dcbx_info;
1831
1832 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid);
1833 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1834 if (!dcbx_info)
1835 return 1;
1836
1837 *flags = 0;
1838 switch (featid) {
1839 case DCB_FEATCFG_ATTR_PG:
1840 if (dcbx_info->operational.params.ets_enabled)
1841 *flags = DCB_FEATCFG_ENABLE;
1842 else
1843 *flags = DCB_FEATCFG_ERROR;
1844 break;
1845 case DCB_FEATCFG_ATTR_PFC:
1846 if (dcbx_info->operational.params.pfc.enabled)
1847 *flags = DCB_FEATCFG_ENABLE;
1848 else
1849 *flags = DCB_FEATCFG_ERROR;
1850 break;
1851 case DCB_FEATCFG_ATTR_APP:
1852 if (dcbx_info->operational.params.app_valid)
1853 *flags = DCB_FEATCFG_ENABLE;
1854 else
1855 *flags = DCB_FEATCFG_ERROR;
1856 break;
1857 default:
1858 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid);
1859 kfree(dcbx_info);
1860 return 1;
1861 }
1862
1863 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags);
1864 kfree(dcbx_info);
1865
1866 return 0;
1867 }
1868
1869 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags)
1870 {
1871 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1872 struct qed_dcbx_set dcbx_set;
1873 bool enabled, willing;
1874 struct qed_ptt *ptt;
1875 int rc;
1876
1877 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n",
1878 featid, flags);
1879 memset(&dcbx_set, 0, sizeof(dcbx_set));
1880 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1881 if (rc)
1882 return 1;
1883
1884 enabled = !!(flags & DCB_FEATCFG_ENABLE);
1885 willing = !!(flags & DCB_FEATCFG_WILLING);
1886 switch (featid) {
1887 case DCB_FEATCFG_ATTR_PG:
1888 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
1889 dcbx_set.config.params.ets_enabled = enabled;
1890 dcbx_set.config.params.ets_willing = willing;
1891 break;
1892 case DCB_FEATCFG_ATTR_PFC:
1893 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
1894 dcbx_set.config.params.pfc.enabled = enabled;
1895 dcbx_set.config.params.pfc.willing = willing;
1896 break;
1897 case DCB_FEATCFG_ATTR_APP:
1898 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG;
1899 dcbx_set.config.params.app_willing = willing;
1900 break;
1901 default:
1902 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid);
1903 return 1;
1904 }
1905
1906 ptt = qed_ptt_acquire(hwfn);
1907 if (!ptt)
1908 return 1;
1909
1910 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1911
1912 qed_ptt_release(hwfn, ptt);
1913
1914 return 0;
1915 }
1916
1917 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev,
1918 struct dcb_peer_app_info *info,
1919 u16 *app_count)
1920 {
1921 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1922 struct qed_dcbx_get *dcbx_info;
1923
1924 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
1925 if (!dcbx_info)
1926 return -EINVAL;
1927
1928 info->willing = dcbx_info->remote.params.app_willing;
1929 info->error = dcbx_info->remote.params.app_error;
1930 *app_count = dcbx_info->remote.params.num_app_entries;
1931 kfree(dcbx_info);
1932
1933 return 0;
1934 }
1935
1936 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev,
1937 struct dcb_app *table)
1938 {
1939 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1940 struct qed_dcbx_get *dcbx_info;
1941 int i;
1942
1943 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
1944 if (!dcbx_info)
1945 return -EINVAL;
1946
1947 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) {
1948 if (dcbx_info->remote.params.app_entry[i].ethtype)
1949 table[i].selector = DCB_APP_IDTYPE_ETHTYPE;
1950 else
1951 table[i].selector = DCB_APP_IDTYPE_PORTNUM;
1952 table[i].priority = dcbx_info->remote.params.app_entry[i].prio;
1953 table[i].protocol =
1954 dcbx_info->remote.params.app_entry[i].proto_id;
1955 }
1956
1957 kfree(dcbx_info);
1958
1959 return 0;
1960 }
1961
1962 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc)
1963 {
1964 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1965 struct qed_dcbx_get *dcbx_info;
1966 int i;
1967
1968 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
1969 if (!dcbx_info)
1970 return -EINVAL;
1971
1972 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
1973 if (dcbx_info->remote.params.pfc.prio[i])
1974 pfc->pfc_en |= BIT(i);
1975
1976 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc;
1977 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n",
1978 pfc->pfc_en, pfc->tcs_supported);
1979 kfree(dcbx_info);
1980
1981 return 0;
1982 }
1983
1984 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg)
1985 {
1986 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1987 struct qed_dcbx_get *dcbx_info;
1988 int i;
1989
1990 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
1991 if (!dcbx_info)
1992 return -EINVAL;
1993
1994 pg->willing = dcbx_info->remote.params.ets_willing;
1995 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
1996 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i];
1997 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i];
1998 }
1999
2000 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing);
2001 kfree(dcbx_info);
2002
2003 return 0;
2004 }
2005
2006 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev,
2007 struct ieee_pfc *pfc, bool remote)
2008 {
2009 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2010 struct qed_dcbx_params *params;
2011 struct qed_dcbx_get *dcbx_info;
2012 int rc, i;
2013
2014 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
2015 if (!dcbx_info)
2016 return -EINVAL;
2017
2018 if (!dcbx_info->operational.ieee) {
2019 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
2020 kfree(dcbx_info);
2021 return -EINVAL;
2022 }
2023
2024 if (remote) {
2025 memset(dcbx_info, 0, sizeof(*dcbx_info));
2026 rc = qed_dcbx_query_params(hwfn, dcbx_info,
2027 QED_DCBX_REMOTE_MIB);
2028 if (rc) {
2029 kfree(dcbx_info);
2030 return -EINVAL;
2031 }
2032
2033 params = &dcbx_info->remote.params;
2034 } else {
2035 params = &dcbx_info->operational.params;
2036 }
2037
2038 pfc->pfc_cap = params->pfc.max_tc;
2039 pfc->pfc_en = 0;
2040 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
2041 if (params->pfc.prio[i])
2042 pfc->pfc_en |= BIT(i);
2043
2044 kfree(dcbx_info);
2045
2046 return 0;
2047 }
2048
2049 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc)
2050 {
2051 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false);
2052 }
2053
2054 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc)
2055 {
2056 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2057 struct qed_dcbx_get *dcbx_info;
2058 struct qed_dcbx_set dcbx_set;
2059 struct qed_ptt *ptt;
2060 int rc, i;
2061
2062 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
2063 if (!dcbx_info)
2064 return -EINVAL;
2065
2066 if (!dcbx_info->operational.ieee) {
2067 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
2068 kfree(dcbx_info);
2069 return -EINVAL;
2070 }
2071
2072 kfree(dcbx_info);
2073
2074 memset(&dcbx_set, 0, sizeof(dcbx_set));
2075 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
2076 if (rc)
2077 return -EINVAL;
2078
2079 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
2080 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
2081 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i));
2082
2083 dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap;
2084
2085 ptt = qed_ptt_acquire(hwfn);
2086 if (!ptt)
2087 return -EINVAL;
2088
2089 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
2090
2091 qed_ptt_release(hwfn, ptt);
2092
2093 return rc;
2094 }
2095
2096 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev,
2097 struct ieee_ets *ets, bool remote)
2098 {
2099 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2100 struct qed_dcbx_get *dcbx_info;
2101 struct qed_dcbx_params *params;
2102 int rc;
2103
2104 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
2105 if (!dcbx_info)
2106 return -EINVAL;
2107
2108 if (!dcbx_info->operational.ieee) {
2109 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
2110 kfree(dcbx_info);
2111 return -EINVAL;
2112 }
2113
2114 if (remote) {
2115 memset(dcbx_info, 0, sizeof(*dcbx_info));
2116 rc = qed_dcbx_query_params(hwfn, dcbx_info,
2117 QED_DCBX_REMOTE_MIB);
2118 if (rc) {
2119 kfree(dcbx_info);
2120 return -EINVAL;
2121 }
2122
2123 params = &dcbx_info->remote.params;
2124 } else {
2125 params = &dcbx_info->operational.params;
2126 }
2127
2128 ets->ets_cap = params->max_ets_tc;
2129 ets->willing = params->ets_willing;
2130 ets->cbs = params->ets_cbs;
2131 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw));
2132 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa));
2133 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc));
2134 kfree(dcbx_info);
2135
2136 return 0;
2137 }
2138
2139 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets)
2140 {
2141 return qed_dcbnl_get_ieee_ets(cdev, ets, false);
2142 }
2143
2144 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets)
2145 {
2146 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2147 struct qed_dcbx_get *dcbx_info;
2148 struct qed_dcbx_set dcbx_set;
2149 struct qed_ptt *ptt;
2150 int rc;
2151
2152 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
2153 if (!dcbx_info)
2154 return -EINVAL;
2155
2156 if (!dcbx_info->operational.ieee) {
2157 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
2158 kfree(dcbx_info);
2159 return -EINVAL;
2160 }
2161
2162 kfree(dcbx_info);
2163
2164 memset(&dcbx_set, 0, sizeof(dcbx_set));
2165 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
2166 if (rc)
2167 return -EINVAL;
2168
2169 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
2170 dcbx_set.config.params.max_ets_tc = ets->ets_cap;
2171 dcbx_set.config.params.ets_willing = ets->willing;
2172 dcbx_set.config.params.ets_cbs = ets->cbs;
2173 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw,
2174 sizeof(ets->tc_tx_bw));
2175 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa,
2176 sizeof(ets->tc_tsa));
2177 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc,
2178 sizeof(ets->prio_tc));
2179
2180 ptt = qed_ptt_acquire(hwfn);
2181 if (!ptt)
2182 return -EINVAL;
2183
2184 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
2185
2186 qed_ptt_release(hwfn, ptt);
2187
2188 return rc;
2189 }
2190
2191 static int
2192 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets)
2193 {
2194 return qed_dcbnl_get_ieee_ets(cdev, ets, true);
2195 }
2196
2197 static int
2198 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc)
2199 {
2200 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true);
2201 }
2202
2203 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app)
2204 {
2205 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2206 struct qed_dcbx_get *dcbx_info;
2207 struct qed_app_entry *entry;
2208 bool ethtype;
2209 u8 prio = 0;
2210 int i;
2211
2212 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
2213 if (!dcbx_info)
2214 return -EINVAL;
2215
2216 if (!dcbx_info->operational.ieee) {
2217 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
2218 kfree(dcbx_info);
2219 return -EINVAL;
2220 }
2221
2222 /* ieee defines the selector field value for ethertype to be 1 */
2223 ethtype = !!((app->selector - 1) == DCB_APP_IDTYPE_ETHTYPE);
2224 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
2225 entry = &dcbx_info->operational.params.app_entry[i];
2226 if ((entry->ethtype == ethtype) &&
2227 (entry->proto_id == app->protocol)) {
2228 prio = entry->prio;
2229 break;
2230 }
2231 }
2232
2233 if (i == QED_DCBX_MAX_APP_PROTOCOL) {
2234 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector,
2235 app->protocol);
2236 kfree(dcbx_info);
2237 return -EINVAL;
2238 }
2239
2240 app->priority = ffs(prio) - 1;
2241
2242 kfree(dcbx_info);
2243
2244 return 0;
2245 }
2246
2247 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app)
2248 {
2249 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2250 struct qed_dcbx_get *dcbx_info;
2251 struct qed_dcbx_set dcbx_set;
2252 struct qed_app_entry *entry;
2253 struct qed_ptt *ptt;
2254 bool ethtype;
2255 int rc, i;
2256
2257 if (app->priority < 0 || app->priority >= QED_MAX_PFC_PRIORITIES) {
2258 DP_INFO(hwfn, "Invalid priority %d\n", app->priority);
2259 return -EINVAL;
2260 }
2261
2262 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
2263 if (!dcbx_info)
2264 return -EINVAL;
2265
2266 if (!dcbx_info->operational.ieee) {
2267 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
2268 kfree(dcbx_info);
2269 return -EINVAL;
2270 }
2271
2272 kfree(dcbx_info);
2273
2274 memset(&dcbx_set, 0, sizeof(dcbx_set));
2275 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
2276 if (rc)
2277 return -EINVAL;
2278
2279 /* ieee defines the selector field value for ethertype to be 1 */
2280 ethtype = !!((app->selector - 1) == DCB_APP_IDTYPE_ETHTYPE);
2281 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
2282 entry = &dcbx_set.config.params.app_entry[i];
2283 if ((entry->ethtype == ethtype) &&
2284 (entry->proto_id == app->protocol))
2285 break;
2286 /* First empty slot */
2287 if (!entry->proto_id) {
2288 dcbx_set.config.params.num_app_entries++;
2289 break;
2290 }
2291 }
2292
2293 if (i == QED_DCBX_MAX_APP_PROTOCOL) {
2294 DP_ERR(cdev, "App table is full\n");
2295 return -EBUSY;
2296 }
2297
2298 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG;
2299 dcbx_set.config.params.app_entry[i].ethtype = ethtype;
2300 dcbx_set.config.params.app_entry[i].proto_id = app->protocol;
2301 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority);
2302
2303 ptt = qed_ptt_acquire(hwfn);
2304 if (!ptt)
2305 return -EBUSY;
2306
2307 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
2308
2309 qed_ptt_release(hwfn, ptt);
2310
2311 return rc;
2312 }
2313
2314 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = {
2315 .getstate = qed_dcbnl_getstate,
2316 .setstate = qed_dcbnl_setstate,
2317 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx,
2318 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx,
2319 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx,
2320 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx,
2321 .getpfccfg = qed_dcbnl_getpfccfg,
2322 .setpfccfg = qed_dcbnl_setpfccfg,
2323 .getcap = qed_dcbnl_getcap,
2324 .getnumtcs = qed_dcbnl_getnumtcs,
2325 .getpfcstate = qed_dcbnl_getpfcstate,
2326 .getdcbx = qed_dcbnl_getdcbx,
2327 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx,
2328 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx,
2329 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx,
2330 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx,
2331 .setall = qed_dcbnl_setall,
2332 .setnumtcs = qed_dcbnl_setnumtcs,
2333 .setpfcstate = qed_dcbnl_setpfcstate,
2334 .setapp = qed_dcbnl_setapp,
2335 .setdcbx = qed_dcbnl_setdcbx,
2336 .setfeatcfg = qed_dcbnl_setfeatcfg,
2337 .getfeatcfg = qed_dcbnl_getfeatcfg,
2338 .getapp = qed_dcbnl_getapp,
2339 .peer_getappinfo = qed_dcbnl_peer_getappinfo,
2340 .peer_getapptable = qed_dcbnl_peer_getapptable,
2341 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc,
2342 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg,
2343 .ieee_getpfc = qed_dcbnl_ieee_getpfc,
2344 .ieee_setpfc = qed_dcbnl_ieee_setpfc,
2345 .ieee_getets = qed_dcbnl_ieee_getets,
2346 .ieee_setets = qed_dcbnl_ieee_setets,
2347 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc,
2348 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets,
2349 .ieee_getapp = qed_dcbnl_ieee_getapp,
2350 .ieee_setapp = qed_dcbnl_ieee_setapp,
2351 };
2352
2353 #endif
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