]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - drivers/net/ethernet/sfc/efx.c
projects / mirror_ubuntu-zesty-kernel.git / blob
? search:


5a5dcad8c49acd121b251558fc0a14d2023c0f6e
[mirror_ubuntu-zesty-kernel.git] / drivers / net / ethernet / sfc / efx.c
1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
26 #include "efx.h"
27 #include "nic.h"
28 #include "selftest.h"
29 #include "sriov.h"
30
31 #include "mcdi.h"
32 #include "workarounds.h"
33
34 /**************************************************************************
35 *
36 * Type name strings
37 *
38 **************************************************************************
39 */
40
41 /* Loopback mode names (see LOOPBACK_MODE()) */
42 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
43 const char *const efx_loopback_mode_names[] = {
44 [LOOPBACK_NONE] = "NONE",
45 [LOOPBACK_DATA] = "DATAPATH",
46 [LOOPBACK_GMAC] = "GMAC",
47 [LOOPBACK_XGMII] = "XGMII",
48 [LOOPBACK_XGXS] = "XGXS",
49 [LOOPBACK_XAUI] = "XAUI",
50 [LOOPBACK_GMII] = "GMII",
51 [LOOPBACK_SGMII] = "SGMII",
52 [LOOPBACK_XGBR] = "XGBR",
53 [LOOPBACK_XFI] = "XFI",
54 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
55 [LOOPBACK_GMII_FAR] = "GMII_FAR",
56 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
57 [LOOPBACK_XFI_FAR] = "XFI_FAR",
58 [LOOPBACK_GPHY] = "GPHY",
59 [LOOPBACK_PHYXS] = "PHYXS",
60 [LOOPBACK_PCS] = "PCS",
61 [LOOPBACK_PMAPMD] = "PMA/PMD",
62 [LOOPBACK_XPORT] = "XPORT",
63 [LOOPBACK_XGMII_WS] = "XGMII_WS",
64 [LOOPBACK_XAUI_WS] = "XAUI_WS",
65 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
66 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
67 [LOOPBACK_GMII_WS] = "GMII_WS",
68 [LOOPBACK_XFI_WS] = "XFI_WS",
69 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
70 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 };
72
73 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
74 const char *const efx_reset_type_names[] = {
75 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
76 [RESET_TYPE_ALL] = "ALL",
77 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
78 [RESET_TYPE_WORLD] = "WORLD",
79 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
80 [RESET_TYPE_DATAPATH] = "DATAPATH",
81 [RESET_TYPE_MC_BIST] = "MC_BIST",
82 [RESET_TYPE_DISABLE] = "DISABLE",
83 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
84 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
85 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
86 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
87 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
88 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
89 };
90
91 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
92 * queued onto this work queue. This is not a per-nic work queue, because
93 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
94 */
95 static struct workqueue_struct *reset_workqueue;
96
97 /* How often and how many times to poll for a reset while waiting for a
98 * BIST that another function started to complete.
99 */
100 #define BIST_WAIT_DELAY_MS 100
101 #define BIST_WAIT_DELAY_COUNT 100
102
103 /**************************************************************************
104 *
105 * Configurable values
106 *
107 *************************************************************************/
108
109 /*
110 * Use separate channels for TX and RX events
111 *
112 * Set this to 1 to use separate channels for TX and RX. It allows us
113 * to control interrupt affinity separately for TX and RX.
114 *
115 * This is only used in MSI-X interrupt mode
116 */
117 bool efx_separate_tx_channels;
118 module_param(efx_separate_tx_channels, bool, 0444);
119 MODULE_PARM_DESC(efx_separate_tx_channels,
120 "Use separate channels for TX and RX");
121
122 /* This is the weight assigned to each of the (per-channel) virtual
123 * NAPI devices.
124 */
125 static int napi_weight = 64;
126
127 /* This is the time (in jiffies) between invocations of the hardware
128 * monitor.
129 * On Falcon-based NICs, this will:
130 * - Check the on-board hardware monitor;
131 * - Poll the link state and reconfigure the hardware as necessary.
132 * On Siena-based NICs for power systems with EEH support, this will give EEH a
133 * chance to start.
134 */
135 static unsigned int efx_monitor_interval = 1 * HZ;
136
137 /* Initial interrupt moderation settings. They can be modified after
138 * module load with ethtool.
139 *
140 * The default for RX should strike a balance between increasing the
141 * round-trip latency and reducing overhead.
142 */
143 static unsigned int rx_irq_mod_usec = 60;
144
145 /* Initial interrupt moderation settings. They can be modified after
146 * module load with ethtool.
147 *
148 * This default is chosen to ensure that a 10G link does not go idle
149 * while a TX queue is stopped after it has become full. A queue is
150 * restarted when it drops below half full. The time this takes (assuming
151 * worst case 3 descriptors per packet and 1024 descriptors) is
152 * 512 / 3 * 1.2 = 205 usec.
153 */
154 static unsigned int tx_irq_mod_usec = 150;
155
156 /* This is the first interrupt mode to try out of:
157 * 0 => MSI-X
158 * 1 => MSI
159 * 2 => legacy
160 */
161 static unsigned int interrupt_mode;
162
163 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
164 * i.e. the number of CPUs among which we may distribute simultaneous
165 * interrupt handling.
166 *
167 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
168 * The default (0) means to assign an interrupt to each core.
169 */
170 static unsigned int rss_cpus;
171 module_param(rss_cpus, uint, 0444);
172 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
173
174 static bool phy_flash_cfg;
175 module_param(phy_flash_cfg, bool, 0644);
176 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
177
178 static unsigned irq_adapt_low_thresh = 8000;
179 module_param(irq_adapt_low_thresh, uint, 0644);
180 MODULE_PARM_DESC(irq_adapt_low_thresh,
181 "Threshold score for reducing IRQ moderation");
182
183 static unsigned irq_adapt_high_thresh = 16000;
184 module_param(irq_adapt_high_thresh, uint, 0644);
185 MODULE_PARM_DESC(irq_adapt_high_thresh,
186 "Threshold score for increasing IRQ moderation");
187
188 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
189 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
190 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
191 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
192 module_param(debug, uint, 0);
193 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
194
195 /**************************************************************************
196 *
197 * Utility functions and prototypes
198 *
199 *************************************************************************/
200
201 static int efx_soft_enable_interrupts(struct efx_nic *efx);
202 static void efx_soft_disable_interrupts(struct efx_nic *efx);
203 static void efx_remove_channel(struct efx_channel *channel);
204 static void efx_remove_channels(struct efx_nic *efx);
205 static const struct efx_channel_type efx_default_channel_type;
206 static void efx_remove_port(struct efx_nic *efx);
207 static void efx_init_napi_channel(struct efx_channel *channel);
208 static void efx_fini_napi(struct efx_nic *efx);
209 static void efx_fini_napi_channel(struct efx_channel *channel);
210 static void efx_fini_struct(struct efx_nic *efx);
211 static void efx_start_all(struct efx_nic *efx);
212 static void efx_stop_all(struct efx_nic *efx);
213
214 #define EFX_ASSERT_RESET_SERIALISED(efx) \
215 do { \
216 if ((efx->state == STATE_READY) || \
217 (efx->state == STATE_RECOVERY) || \
218 (efx->state == STATE_DISABLED)) \
219 ASSERT_RTNL(); \
220 } while (0)
221
222 static int efx_check_disabled(struct efx_nic *efx)
223 {
224 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
225 netif_err(efx, drv, efx->net_dev,
226 "device is disabled due to earlier errors\n");
227 return -EIO;
228 }
229 return 0;
230 }
231
232 /**************************************************************************
233 *
234 * Event queue processing
235 *
236 *************************************************************************/
237
238 /* Process channel's event queue
239 *
240 * This function is responsible for processing the event queue of a
241 * single channel. The caller must guarantee that this function will
242 * never be concurrently called more than once on the same channel,
243 * though different channels may be being processed concurrently.
244 */
245 static int efx_process_channel(struct efx_channel *channel, int budget)
246 {
247 struct efx_tx_queue *tx_queue;
248 int spent;
249
250 if (unlikely(!channel->enabled))
251 return 0;
252
253 efx_for_each_channel_tx_queue(tx_queue, channel) {
254 tx_queue->pkts_compl = 0;
255 tx_queue->bytes_compl = 0;
256 }
257
258 spent = efx_nic_process_eventq(channel, budget);
259 if (spent && efx_channel_has_rx_queue(channel)) {
260 struct efx_rx_queue *rx_queue =
261 efx_channel_get_rx_queue(channel);
262
263 efx_rx_flush_packet(channel);
264 efx_fast_push_rx_descriptors(rx_queue, true);
265 }
266
267 /* Update BQL */
268 efx_for_each_channel_tx_queue(tx_queue, channel) {
269 if (tx_queue->bytes_compl) {
270 netdev_tx_completed_queue(tx_queue->core_txq,
271 tx_queue->pkts_compl, tx_queue->bytes_compl);
272 }
273 }
274
275 return spent;
276 }
277
278 /* NAPI poll handler
279 *
280 * NAPI guarantees serialisation of polls of the same device, which
281 * provides the guarantee required by efx_process_channel().
282 */
283 static void efx_update_irq_mod(struct efx_nic *efx, struct efx_channel *channel)
284 {
285 int step = efx->irq_mod_step_us;
286
287 if (channel->irq_mod_score < irq_adapt_low_thresh) {
288 if (channel->irq_moderation_us > step) {
289 channel->irq_moderation_us -= step;
290 efx->type->push_irq_moderation(channel);
291 }
292 } else if (channel->irq_mod_score > irq_adapt_high_thresh) {
293 if (channel->irq_moderation_us <
294 efx->irq_rx_moderation_us) {
295 channel->irq_moderation_us += step;
296 efx->type->push_irq_moderation(channel);
297 }
298 }
299
300 channel->irq_count = 0;
301 channel->irq_mod_score = 0;
302 }
303
304 static int efx_poll(struct napi_struct *napi, int budget)
305 {
306 struct efx_channel *channel =
307 container_of(napi, struct efx_channel, napi_str);
308 struct efx_nic *efx = channel->efx;
309 int spent;
310
311 if (!efx_channel_lock_napi(channel))
312 return budget;
313
314 netif_vdbg(efx, intr, efx->net_dev,
315 "channel %d NAPI poll executing on CPU %d\n",
316 channel->channel, raw_smp_processor_id());
317
318 spent = efx_process_channel(channel, budget);
319
320 if (spent < budget) {
321 if (efx_channel_has_rx_queue(channel) &&
322 efx->irq_rx_adaptive &&
323 unlikely(++channel->irq_count == 1000)) {
324 efx_update_irq_mod(efx, channel);
325 }
326
327 efx_filter_rfs_expire(channel);
328
329 /* There is no race here; although napi_disable() will
330 * only wait for napi_complete(), this isn't a problem
331 * since efx_nic_eventq_read_ack() will have no effect if
332 * interrupts have already been disabled.
333 */
334 napi_complete(napi);
335 efx_nic_eventq_read_ack(channel);
336 }
337
338 efx_channel_unlock_napi(channel);
339 return spent;
340 }
341
342 /* Create event queue
343 * Event queue memory allocations are done only once. If the channel
344 * is reset, the memory buffer will be reused; this guards against
345 * errors during channel reset and also simplifies interrupt handling.
346 */
347 static int efx_probe_eventq(struct efx_channel *channel)
348 {
349 struct efx_nic *efx = channel->efx;
350 unsigned long entries;
351
352 netif_dbg(efx, probe, efx->net_dev,
353 "chan %d create event queue\n", channel->channel);
354
355 /* Build an event queue with room for one event per tx and rx buffer,
356 * plus some extra for link state events and MCDI completions. */
357 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
358 EFX_WARN_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
359 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
360
361 return efx_nic_probe_eventq(channel);
362 }
363
364 /* Prepare channel's event queue */
365 static int efx_init_eventq(struct efx_channel *channel)
366 {
367 struct efx_nic *efx = channel->efx;
368 int rc;
369
370 EFX_WARN_ON_PARANOID(channel->eventq_init);
371
372 netif_dbg(efx, drv, efx->net_dev,
373 "chan %d init event queue\n", channel->channel);
374
375 rc = efx_nic_init_eventq(channel);
376 if (rc == 0) {
377 efx->type->push_irq_moderation(channel);
378 channel->eventq_read_ptr = 0;
379 channel->eventq_init = true;
380 }
381 return rc;
382 }
383
384 /* Enable event queue processing and NAPI */
385 void efx_start_eventq(struct efx_channel *channel)
386 {
387 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
388 "chan %d start event queue\n", channel->channel);
389
390 /* Make sure the NAPI handler sees the enabled flag set */
391 channel->enabled = true;
392 smp_wmb();
393
394 efx_channel_enable(channel);
395 napi_enable(&channel->napi_str);
396 efx_nic_eventq_read_ack(channel);
397 }
398
399 /* Disable event queue processing and NAPI */
400 void efx_stop_eventq(struct efx_channel *channel)
401 {
402 if (!channel->enabled)
403 return;
404
405 napi_disable(&channel->napi_str);
406 while (!efx_channel_disable(channel))
407 usleep_range(1000, 20000);
408 channel->enabled = false;
409 }
410
411 static void efx_fini_eventq(struct efx_channel *channel)
412 {
413 if (!channel->eventq_init)
414 return;
415
416 netif_dbg(channel->efx, drv, channel->efx->net_dev,
417 "chan %d fini event queue\n", channel->channel);
418
419 efx_nic_fini_eventq(channel);
420 channel->eventq_init = false;
421 }
422
423 static void efx_remove_eventq(struct efx_channel *channel)
424 {
425 netif_dbg(channel->efx, drv, channel->efx->net_dev,
426 "chan %d remove event queue\n", channel->channel);
427
428 efx_nic_remove_eventq(channel);
429 }
430
431 /**************************************************************************
432 *
433 * Channel handling
434 *
435 *************************************************************************/
436
437 /* Allocate and initialise a channel structure. */
438 static struct efx_channel *
439 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
440 {
441 struct efx_channel *channel;
442 struct efx_rx_queue *rx_queue;
443 struct efx_tx_queue *tx_queue;
444 int j;
445
446 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
447 if (!channel)
448 return NULL;
449
450 channel->efx = efx;
451 channel->channel = i;
452 channel->type = &efx_default_channel_type;
453
454 for (j = 0; j < EFX_TXQ_TYPES; j++) {
455 tx_queue = &channel->tx_queue[j];
456 tx_queue->efx = efx;
457 tx_queue->queue = i * EFX_TXQ_TYPES + j;
458 tx_queue->channel = channel;
459 }
460
461 rx_queue = &channel->rx_queue;
462 rx_queue->efx = efx;
463 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
464 (unsigned long)rx_queue);
465
466 return channel;
467 }
468
469 /* Allocate and initialise a channel structure, copying parameters
470 * (but not resources) from an old channel structure.
471 */
472 static struct efx_channel *
473 efx_copy_channel(const struct efx_channel *old_channel)
474 {
475 struct efx_channel *channel;
476 struct efx_rx_queue *rx_queue;
477 struct efx_tx_queue *tx_queue;
478 int j;
479
480 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
481 if (!channel)
482 return NULL;
483
484 *channel = *old_channel;
485
486 channel->napi_dev = NULL;
487 INIT_HLIST_NODE(&channel->napi_str.napi_hash_node);
488 channel->napi_str.napi_id = 0;
489 channel->napi_str.state = 0;
490 memset(&channel->eventq, 0, sizeof(channel->eventq));
491
492 for (j = 0; j < EFX_TXQ_TYPES; j++) {
493 tx_queue = &channel->tx_queue[j];
494 if (tx_queue->channel)
495 tx_queue->channel = channel;
496 tx_queue->buffer = NULL;
497 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
498 }
499
500 rx_queue = &channel->rx_queue;
501 rx_queue->buffer = NULL;
502 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
503 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
504 (unsigned long)rx_queue);
505
506 return channel;
507 }
508
509 static int efx_probe_channel(struct efx_channel *channel)
510 {
511 struct efx_tx_queue *tx_queue;
512 struct efx_rx_queue *rx_queue;
513 int rc;
514
515 netif_dbg(channel->efx, probe, channel->efx->net_dev,
516 "creating channel %d\n", channel->channel);
517
518 rc = channel->type->pre_probe(channel);
519 if (rc)
520 goto fail;
521
522 rc = efx_probe_eventq(channel);
523 if (rc)
524 goto fail;
525
526 efx_for_each_channel_tx_queue(tx_queue, channel) {
527 rc = efx_probe_tx_queue(tx_queue);
528 if (rc)
529 goto fail;
530 }
531
532 efx_for_each_channel_rx_queue(rx_queue, channel) {
533 rc = efx_probe_rx_queue(rx_queue);
534 if (rc)
535 goto fail;
536 }
537
538 return 0;
539
540 fail:
541 efx_remove_channel(channel);
542 return rc;
543 }
544
545 static void
546 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
547 {
548 struct efx_nic *efx = channel->efx;
549 const char *type;
550 int number;
551
552 number = channel->channel;
553 if (efx->tx_channel_offset == 0) {
554 type = "";
555 } else if (channel->channel < efx->tx_channel_offset) {
556 type = "-rx";
557 } else {
558 type = "-tx";
559 number -= efx->tx_channel_offset;
560 }
561 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
562 }
563
564 static void efx_set_channel_names(struct efx_nic *efx)
565 {
566 struct efx_channel *channel;
567
568 efx_for_each_channel(channel, efx)
569 channel->type->get_name(channel,
570 efx->msi_context[channel->channel].name,
571 sizeof(efx->msi_context[0].name));
572 }
573
574 static int efx_probe_channels(struct efx_nic *efx)
575 {
576 struct efx_channel *channel;
577 int rc;
578
579 /* Restart special buffer allocation */
580 efx->next_buffer_table = 0;
581
582 /* Probe channels in reverse, so that any 'extra' channels
583 * use the start of the buffer table. This allows the traffic
584 * channels to be resized without moving them or wasting the
585 * entries before them.
586 */
587 efx_for_each_channel_rev(channel, efx) {
588 rc = efx_probe_channel(channel);
589 if (rc) {
590 netif_err(efx, probe, efx->net_dev,
591 "failed to create channel %d\n",
592 channel->channel);
593 goto fail;
594 }
595 }
596 efx_set_channel_names(efx);
597
598 return 0;
599
600 fail:
601 efx_remove_channels(efx);
602 return rc;
603 }
604
605 /* Channels are shutdown and reinitialised whilst the NIC is running
606 * to propagate configuration changes (mtu, checksum offload), or
607 * to clear hardware error conditions
608 */
609 static void efx_start_datapath(struct efx_nic *efx)
610 {
611 netdev_features_t old_features = efx->net_dev->features;
612 bool old_rx_scatter = efx->rx_scatter;
613 struct efx_tx_queue *tx_queue;
614 struct efx_rx_queue *rx_queue;
615 struct efx_channel *channel;
616 size_t rx_buf_len;
617
618 /* Calculate the rx buffer allocation parameters required to
619 * support the current MTU, including padding for header
620 * alignment and overruns.
621 */
622 efx->rx_dma_len = (efx->rx_prefix_size +
623 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
624 efx->type->rx_buffer_padding);
625 rx_buf_len = (sizeof(struct efx_rx_page_state) +
626 efx->rx_ip_align + efx->rx_dma_len);
627 if (rx_buf_len <= PAGE_SIZE) {
628 efx->rx_scatter = efx->type->always_rx_scatter;
629 efx->rx_buffer_order = 0;
630 } else if (efx->type->can_rx_scatter) {
631 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
632 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
633 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
634 EFX_RX_BUF_ALIGNMENT) >
635 PAGE_SIZE);
636 efx->rx_scatter = true;
637 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
638 efx->rx_buffer_order = 0;
639 } else {
640 efx->rx_scatter = false;
641 efx->rx_buffer_order = get_order(rx_buf_len);
642 }
643
644 efx_rx_config_page_split(efx);
645 if (efx->rx_buffer_order)
646 netif_dbg(efx, drv, efx->net_dev,
647 "RX buf len=%u; page order=%u batch=%u\n",
648 efx->rx_dma_len, efx->rx_buffer_order,
649 efx->rx_pages_per_batch);
650 else
651 netif_dbg(efx, drv, efx->net_dev,
652 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
653 efx->rx_dma_len, efx->rx_page_buf_step,
654 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
655
656 /* Restore previously fixed features in hw_features and remove
657 * features which are fixed now
658 */
659 efx->net_dev->hw_features |= efx->net_dev->features;
660 efx->net_dev->hw_features &= ~efx->fixed_features;
661 efx->net_dev->features |= efx->fixed_features;
662 if (efx->net_dev->features != old_features)
663 netdev_features_change(efx->net_dev);
664
665 /* RX filters may also have scatter-enabled flags */
666 if (efx->rx_scatter != old_rx_scatter)
667 efx->type->filter_update_rx_scatter(efx);
668
669 /* We must keep at least one descriptor in a TX ring empty.
670 * We could avoid this when the queue size does not exactly
671 * match the hardware ring size, but it's not that important.
672 * Therefore we stop the queue when one more skb might fill
673 * the ring completely. We wake it when half way back to
674 * empty.
675 */
676 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
677 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
678
679 /* Initialise the channels */
680 efx_for_each_channel(channel, efx) {
681 efx_for_each_channel_tx_queue(tx_queue, channel) {
682 efx_init_tx_queue(tx_queue);
683 atomic_inc(&efx->active_queues);
684 }
685
686 efx_for_each_channel_rx_queue(rx_queue, channel) {
687 efx_init_rx_queue(rx_queue);
688 atomic_inc(&efx->active_queues);
689 efx_stop_eventq(channel);
690 efx_fast_push_rx_descriptors(rx_queue, false);
691 efx_start_eventq(channel);
692 }
693
694 WARN_ON(channel->rx_pkt_n_frags);
695 }
696
697 efx_ptp_start_datapath(efx);
698
699 if (netif_device_present(efx->net_dev))
700 netif_tx_wake_all_queues(efx->net_dev);
701 }
702
703 static void efx_stop_datapath(struct efx_nic *efx)
704 {
705 struct efx_channel *channel;
706 struct efx_tx_queue *tx_queue;
707 struct efx_rx_queue *rx_queue;
708 int rc;
709
710 EFX_ASSERT_RESET_SERIALISED(efx);
711 BUG_ON(efx->port_enabled);
712
713 efx_ptp_stop_datapath(efx);
714
715 /* Stop RX refill */
716 efx_for_each_channel(channel, efx) {
717 efx_for_each_channel_rx_queue(rx_queue, channel)
718 rx_queue->refill_enabled = false;
719 }
720
721 efx_for_each_channel(channel, efx) {
722 /* RX packet processing is pipelined, so wait for the
723 * NAPI handler to complete. At least event queue 0
724 * might be kept active by non-data events, so don't
725 * use napi_synchronize() but actually disable NAPI
726 * temporarily.
727 */
728 if (efx_channel_has_rx_queue(channel)) {
729 efx_stop_eventq(channel);
730 efx_start_eventq(channel);
731 }
732 }
733
734 rc = efx->type->fini_dmaq(efx);
735 if (rc) {
736 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
737 } else {
738 netif_dbg(efx, drv, efx->net_dev,
739 "successfully flushed all queues\n");
740 }
741
742 efx_for_each_channel(channel, efx) {
743 efx_for_each_channel_rx_queue(rx_queue, channel)
744 efx_fini_rx_queue(rx_queue);
745 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
746 efx_fini_tx_queue(tx_queue);
747 }
748 }
749
750 static void efx_remove_channel(struct efx_channel *channel)
751 {
752 struct efx_tx_queue *tx_queue;
753 struct efx_rx_queue *rx_queue;
754
755 netif_dbg(channel->efx, drv, channel->efx->net_dev,
756 "destroy chan %d\n", channel->channel);
757
758 efx_for_each_channel_rx_queue(rx_queue, channel)
759 efx_remove_rx_queue(rx_queue);
760 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
761 efx_remove_tx_queue(tx_queue);
762 efx_remove_eventq(channel);
763 channel->type->post_remove(channel);
764 }
765
766 static void efx_remove_channels(struct efx_nic *efx)
767 {
768 struct efx_channel *channel;
769
770 efx_for_each_channel(channel, efx)
771 efx_remove_channel(channel);
772 }
773
774 int
775 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
776 {
777 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
778 u32 old_rxq_entries, old_txq_entries;
779 unsigned i, next_buffer_table = 0;
780 int rc, rc2;
781
782 rc = efx_check_disabled(efx);
783 if (rc)
784 return rc;
785
786 /* Not all channels should be reallocated. We must avoid
787 * reallocating their buffer table entries.
788 */
789 efx_for_each_channel(channel, efx) {
790 struct efx_rx_queue *rx_queue;
791 struct efx_tx_queue *tx_queue;
792
793 if (channel->type->copy)
794 continue;
795 next_buffer_table = max(next_buffer_table,
796 channel->eventq.index +
797 channel->eventq.entries);
798 efx_for_each_channel_rx_queue(rx_queue, channel)
799 next_buffer_table = max(next_buffer_table,
800 rx_queue->rxd.index +
801 rx_queue->rxd.entries);
802 efx_for_each_channel_tx_queue(tx_queue, channel)
803 next_buffer_table = max(next_buffer_table,
804 tx_queue->txd.index +
805 tx_queue->txd.entries);
806 }
807
808 efx_device_detach_sync(efx);
809 efx_stop_all(efx);
810 efx_soft_disable_interrupts(efx);
811
812 /* Clone channels (where possible) */
813 memset(other_channel, 0, sizeof(other_channel));
814 for (i = 0; i < efx->n_channels; i++) {
815 channel = efx->channel[i];
816 if (channel->type->copy)
817 channel = channel->type->copy(channel);
818 if (!channel) {
819 rc = -ENOMEM;
820 goto out;
821 }
822 other_channel[i] = channel;
823 }
824
825 /* Swap entry counts and channel pointers */
826 old_rxq_entries = efx->rxq_entries;
827 old_txq_entries = efx->txq_entries;
828 efx->rxq_entries = rxq_entries;
829 efx->txq_entries = txq_entries;
830 for (i = 0; i < efx->n_channels; i++) {
831 channel = efx->channel[i];
832 efx->channel[i] = other_channel[i];
833 other_channel[i] = channel;
834 }
835
836 /* Restart buffer table allocation */
837 efx->next_buffer_table = next_buffer_table;
838
839 for (i = 0; i < efx->n_channels; i++) {
840 channel = efx->channel[i];
841 if (!channel->type->copy)
842 continue;
843 rc = efx_probe_channel(channel);
844 if (rc)
845 goto rollback;
846 efx_init_napi_channel(efx->channel[i]);
847 }
848
849 out:
850 /* Destroy unused channel structures */
851 for (i = 0; i < efx->n_channels; i++) {
852 channel = other_channel[i];
853 if (channel && channel->type->copy) {
854 efx_fini_napi_channel(channel);
855 efx_remove_channel(channel);
856 kfree(channel);
857 }
858 }
859
860 rc2 = efx_soft_enable_interrupts(efx);
861 if (rc2) {
862 rc = rc ? rc : rc2;
863 netif_err(efx, drv, efx->net_dev,
864 "unable to restart interrupts on channel reallocation\n");
865 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
866 } else {
867 efx_start_all(efx);
868 netif_device_attach(efx->net_dev);
869 }
870 return rc;
871
872 rollback:
873 /* Swap back */
874 efx->rxq_entries = old_rxq_entries;
875 efx->txq_entries = old_txq_entries;
876 for (i = 0; i < efx->n_channels; i++) {
877 channel = efx->channel[i];
878 efx->channel[i] = other_channel[i];
879 other_channel[i] = channel;
880 }
881 goto out;
882 }
883
884 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
885 {
886 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
887 }
888
889 static const struct efx_channel_type efx_default_channel_type = {
890 .pre_probe = efx_channel_dummy_op_int,
891 .post_remove = efx_channel_dummy_op_void,
892 .get_name = efx_get_channel_name,
893 .copy = efx_copy_channel,
894 .keep_eventq = false,
895 };
896
897 int efx_channel_dummy_op_int(struct efx_channel *channel)
898 {
899 return 0;
900 }
901
902 void efx_channel_dummy_op_void(struct efx_channel *channel)
903 {
904 }
905
906 /**************************************************************************
907 *
908 * Port handling
909 *
910 **************************************************************************/
911
912 /* This ensures that the kernel is kept informed (via
913 * netif_carrier_on/off) of the link status, and also maintains the
914 * link status's stop on the port's TX queue.
915 */
916 void efx_link_status_changed(struct efx_nic *efx)
917 {
918 struct efx_link_state *link_state = &efx->link_state;
919
920 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
921 * that no events are triggered between unregister_netdev() and the
922 * driver unloading. A more general condition is that NETDEV_CHANGE
923 * can only be generated between NETDEV_UP and NETDEV_DOWN */
924 if (!netif_running(efx->net_dev))
925 return;
926
927 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
928 efx->n_link_state_changes++;
929
930 if (link_state->up)
931 netif_carrier_on(efx->net_dev);
932 else
933 netif_carrier_off(efx->net_dev);
934 }
935
936 /* Status message for kernel log */
937 if (link_state->up)
938 netif_info(efx, link, efx->net_dev,
939 "link up at %uMbps %s-duplex (MTU %d)\n",
940 link_state->speed, link_state->fd ? "full" : "half",
941 efx->net_dev->mtu);
942 else
943 netif_info(efx, link, efx->net_dev, "link down\n");
944 }
945
946 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
947 {
948 efx->link_advertising = advertising;
949 if (advertising) {
950 if (advertising & ADVERTISED_Pause)
951 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
952 else
953 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
954 if (advertising & ADVERTISED_Asym_Pause)
955 efx->wanted_fc ^= EFX_FC_TX;
956 }
957 }
958
959 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
960 {
961 efx->wanted_fc = wanted_fc;
962 if (efx->link_advertising) {
963 if (wanted_fc & EFX_FC_RX)
964 efx->link_advertising |= (ADVERTISED_Pause |
965 ADVERTISED_Asym_Pause);
966 else
967 efx->link_advertising &= ~(ADVERTISED_Pause |
968 ADVERTISED_Asym_Pause);
969 if (wanted_fc & EFX_FC_TX)
970 efx->link_advertising ^= ADVERTISED_Asym_Pause;
971 }
972 }
973
974 static void efx_fini_port(struct efx_nic *efx);
975
976 /* We assume that efx->type->reconfigure_mac will always try to sync RX
977 * filters and therefore needs to read-lock the filter table against freeing
978 */
979 void efx_mac_reconfigure(struct efx_nic *efx)
980 {
981 down_read(&efx->filter_sem);
982 efx->type->reconfigure_mac(efx);
983 up_read(&efx->filter_sem);
984 }
985
986 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
987 * the MAC appropriately. All other PHY configuration changes are pushed
988 * through phy_op->set_settings(), and pushed asynchronously to the MAC
989 * through efx_monitor().
990 *
991 * Callers must hold the mac_lock
992 */
993 int __efx_reconfigure_port(struct efx_nic *efx)
994 {
995 enum efx_phy_mode phy_mode;
996 int rc;
997
998 WARN_ON(!mutex_is_locked(&efx->mac_lock));
999
1000 /* Disable PHY transmit in mac level loopbacks */
1001 phy_mode = efx->phy_mode;
1002 if (LOOPBACK_INTERNAL(efx))
1003 efx->phy_mode |= PHY_MODE_TX_DISABLED;
1004 else
1005 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
1006
1007 rc = efx->type->reconfigure_port(efx);
1008
1009 if (rc)
1010 efx->phy_mode = phy_mode;
1011
1012 return rc;
1013 }
1014
1015 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
1016 * disabled. */
1017 int efx_reconfigure_port(struct efx_nic *efx)
1018 {
1019 int rc;
1020
1021 EFX_ASSERT_RESET_SERIALISED(efx);
1022
1023 mutex_lock(&efx->mac_lock);
1024 rc = __efx_reconfigure_port(efx);
1025 mutex_unlock(&efx->mac_lock);
1026
1027 return rc;
1028 }
1029
1030 /* Asynchronous work item for changing MAC promiscuity and multicast
1031 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
1032 * MAC directly. */
1033 static void efx_mac_work(struct work_struct *data)
1034 {
1035 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
1036
1037 mutex_lock(&efx->mac_lock);
1038 if (efx->port_enabled)
1039 efx_mac_reconfigure(efx);
1040 mutex_unlock(&efx->mac_lock);
1041 }
1042
1043 static int efx_probe_port(struct efx_nic *efx)
1044 {
1045 int rc;
1046
1047 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1048
1049 if (phy_flash_cfg)
1050 efx->phy_mode = PHY_MODE_SPECIAL;
1051
1052 /* Connect up MAC/PHY operations table */
1053 rc = efx->type->probe_port(efx);
1054 if (rc)
1055 return rc;
1056
1057 /* Initialise MAC address to permanent address */
1058 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1059
1060 return 0;
1061 }
1062
1063 static int efx_init_port(struct efx_nic *efx)
1064 {
1065 int rc;
1066
1067 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1068
1069 mutex_lock(&efx->mac_lock);
1070
1071 rc = efx->phy_op->init(efx);
1072 if (rc)
1073 goto fail1;
1074
1075 efx->port_initialized = true;
1076
1077 /* Reconfigure the MAC before creating dma queues (required for
1078 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1079 efx_mac_reconfigure(efx);
1080
1081 /* Ensure the PHY advertises the correct flow control settings */
1082 rc = efx->phy_op->reconfigure(efx);
1083 if (rc && rc != -EPERM)
1084 goto fail2;
1085
1086 mutex_unlock(&efx->mac_lock);
1087 return 0;
1088
1089 fail2:
1090 efx->phy_op->fini(efx);
1091 fail1:
1092 mutex_unlock(&efx->mac_lock);
1093 return rc;
1094 }
1095
1096 static void efx_start_port(struct efx_nic *efx)
1097 {
1098 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1099 BUG_ON(efx->port_enabled);
1100
1101 mutex_lock(&efx->mac_lock);
1102 efx->port_enabled = true;
1103
1104 /* Ensure MAC ingress/egress is enabled */
1105 efx_mac_reconfigure(efx);
1106
1107 mutex_unlock(&efx->mac_lock);
1108 }
1109
1110 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1111 * and the async self-test, wait for them to finish and prevent them
1112 * being scheduled again. This doesn't cover online resets, which
1113 * should only be cancelled when removing the device.
1114 */
1115 static void efx_stop_port(struct efx_nic *efx)
1116 {
1117 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1118
1119 EFX_ASSERT_RESET_SERIALISED(efx);
1120
1121 mutex_lock(&efx->mac_lock);
1122 efx->port_enabled = false;
1123 mutex_unlock(&efx->mac_lock);
1124
1125 /* Serialise against efx_set_multicast_list() */
1126 netif_addr_lock_bh(efx->net_dev);
1127 netif_addr_unlock_bh(efx->net_dev);
1128
1129 cancel_delayed_work_sync(&efx->monitor_work);
1130 efx_selftest_async_cancel(efx);
1131 cancel_work_sync(&efx->mac_work);
1132 }
1133
1134 static void efx_fini_port(struct efx_nic *efx)
1135 {
1136 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1137
1138 if (!efx->port_initialized)
1139 return;
1140
1141 efx->phy_op->fini(efx);
1142 efx->port_initialized = false;
1143
1144 efx->link_state.up = false;
1145 efx_link_status_changed(efx);
1146 }
1147
1148 static void efx_remove_port(struct efx_nic *efx)
1149 {
1150 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1151
1152 efx->type->remove_port(efx);
1153 }
1154
1155 /**************************************************************************
1156 *
1157 * NIC handling
1158 *
1159 **************************************************************************/
1160
1161 static LIST_HEAD(efx_primary_list);
1162 static LIST_HEAD(efx_unassociated_list);
1163
1164 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right)
1165 {
1166 return left->type == right->type &&
1167 left->vpd_sn && right->vpd_sn &&
1168 !strcmp(left->vpd_sn, right->vpd_sn);
1169 }
1170
1171 static void efx_associate(struct efx_nic *efx)
1172 {
1173 struct efx_nic *other, *next;
1174
1175 if (efx->primary == efx) {
1176 /* Adding primary function; look for secondaries */
1177
1178 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1179 list_add_tail(&efx->node, &efx_primary_list);
1180
1181 list_for_each_entry_safe(other, next, &efx_unassociated_list,
1182 node) {
1183 if (efx_same_controller(efx, other)) {
1184 list_del(&other->node);
1185 netif_dbg(other, probe, other->net_dev,
1186 "moving to secondary list of %s %s\n",
1187 pci_name(efx->pci_dev),
1188 efx->net_dev->name);
1189 list_add_tail(&other->node,
1190 &efx->secondary_list);
1191 other->primary = efx;
1192 }
1193 }
1194 } else {
1195 /* Adding secondary function; look for primary */
1196
1197 list_for_each_entry(other, &efx_primary_list, node) {
1198 if (efx_same_controller(efx, other)) {
1199 netif_dbg(efx, probe, efx->net_dev,
1200 "adding to secondary list of %s %s\n",
1201 pci_name(other->pci_dev),
1202 other->net_dev->name);
1203 list_add_tail(&efx->node,
1204 &other->secondary_list);
1205 efx->primary = other;
1206 return;
1207 }
1208 }
1209
1210 netif_dbg(efx, probe, efx->net_dev,
1211 "adding to unassociated list\n");
1212 list_add_tail(&efx->node, &efx_unassociated_list);
1213 }
1214 }
1215
1216 static void efx_dissociate(struct efx_nic *efx)
1217 {
1218 struct efx_nic *other, *next;
1219
1220 list_del(&efx->node);
1221 efx->primary = NULL;
1222
1223 list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1224 list_del(&other->node);
1225 netif_dbg(other, probe, other->net_dev,
1226 "moving to unassociated list\n");
1227 list_add_tail(&other->node, &efx_unassociated_list);
1228 other->primary = NULL;
1229 }
1230 }
1231
1232 /* This configures the PCI device to enable I/O and DMA. */
1233 static int efx_init_io(struct efx_nic *efx)
1234 {
1235 struct pci_dev *pci_dev = efx->pci_dev;
1236 dma_addr_t dma_mask = efx->type->max_dma_mask;
1237 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1238 int rc, bar;
1239
1240 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1241
1242 bar = efx->type->mem_bar;
1243
1244 rc = pci_enable_device(pci_dev);
1245 if (rc) {
1246 netif_err(efx, probe, efx->net_dev,
1247 "failed to enable PCI device\n");
1248 goto fail1;
1249 }
1250
1251 pci_set_master(pci_dev);
1252
1253 /* Set the PCI DMA mask. Try all possibilities from our
1254 * genuine mask down to 32 bits, because some architectures
1255 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1256 * masks event though they reject 46 bit masks.
1257 */
1258 while (dma_mask > 0x7fffffffUL) {
1259 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1260 if (rc == 0)
1261 break;
1262 dma_mask >>= 1;
1263 }
1264 if (rc) {
1265 netif_err(efx, probe, efx->net_dev,
1266 "could not find a suitable DMA mask\n");
1267 goto fail2;
1268 }
1269 netif_dbg(efx, probe, efx->net_dev,
1270 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1271
1272 efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1273 rc = pci_request_region(pci_dev, bar, "sfc");
1274 if (rc) {
1275 netif_err(efx, probe, efx->net_dev,
1276 "request for memory BAR failed\n");
1277 rc = -EIO;
1278 goto fail3;
1279 }
1280 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1281 if (!efx->membase) {
1282 netif_err(efx, probe, efx->net_dev,
1283 "could not map memory BAR at %llx+%x\n",
1284 (unsigned long long)efx->membase_phys, mem_map_size);
1285 rc = -ENOMEM;
1286 goto fail4;
1287 }
1288 netif_dbg(efx, probe, efx->net_dev,
1289 "memory BAR at %llx+%x (virtual %p)\n",
1290 (unsigned long long)efx->membase_phys, mem_map_size,
1291 efx->membase);
1292
1293 return 0;
1294
1295 fail4:
1296 pci_release_region(efx->pci_dev, bar);
1297 fail3:
1298 efx->membase_phys = 0;
1299 fail2:
1300 pci_disable_device(efx->pci_dev);
1301 fail1:
1302 return rc;
1303 }
1304
1305 static void efx_fini_io(struct efx_nic *efx)
1306 {
1307 int bar;
1308
1309 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1310
1311 if (efx->membase) {
1312 iounmap(efx->membase);
1313 efx->membase = NULL;
1314 }
1315
1316 if (efx->membase_phys) {
1317 bar = efx->type->mem_bar;
1318 pci_release_region(efx->pci_dev, bar);
1319 efx->membase_phys = 0;
1320 }
1321
1322 /* Don't disable bus-mastering if VFs are assigned */
1323 if (!pci_vfs_assigned(efx->pci_dev))
1324 pci_disable_device(efx->pci_dev);
1325 }
1326
1327 void efx_set_default_rx_indir_table(struct efx_nic *efx)
1328 {
1329 size_t i;
1330
1331 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1332 efx->rx_indir_table[i] =
1333 ethtool_rxfh_indir_default(i, efx->rss_spread);
1334 }
1335
1336 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1337 {
1338 cpumask_var_t thread_mask;
1339 unsigned int count;
1340 int cpu;
1341
1342 if (rss_cpus) {
1343 count = rss_cpus;
1344 } else {
1345 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1346 netif_warn(efx, probe, efx->net_dev,
1347 "RSS disabled due to allocation failure\n");
1348 return 1;
1349 }
1350
1351 count = 0;
1352 for_each_online_cpu(cpu) {
1353 if (!cpumask_test_cpu(cpu, thread_mask)) {
1354 ++count;
1355 cpumask_or(thread_mask, thread_mask,
1356 topology_sibling_cpumask(cpu));
1357 }
1358 }
1359
1360 free_cpumask_var(thread_mask);
1361 }
1362
1363 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1364 * table entries that are inaccessible to VFs
1365 */
1366 #ifdef CONFIG_SFC_SRIOV
1367 if (efx->type->sriov_wanted) {
1368 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1369 count > efx_vf_size(efx)) {
1370 netif_warn(efx, probe, efx->net_dev,
1371 "Reducing number of RSS channels from %u to %u for "
1372 "VF support. Increase vf-msix-limit to use more "
1373 "channels on the PF.\n",
1374 count, efx_vf_size(efx));
1375 count = efx_vf_size(efx);
1376 }
1377 }
1378 #endif
1379
1380 return count;
1381 }
1382
1383 /* Probe the number and type of interrupts we are able to obtain, and
1384 * the resulting numbers of channels and RX queues.
1385 */
1386 static int efx_probe_interrupts(struct efx_nic *efx)
1387 {
1388 unsigned int extra_channels = 0;
1389 unsigned int i, j;
1390 int rc;
1391
1392 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1393 if (efx->extra_channel_type[i])
1394 ++extra_channels;
1395
1396 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1397 struct msix_entry xentries[EFX_MAX_CHANNELS];
1398 unsigned int n_channels;
1399
1400 n_channels = efx_wanted_parallelism(efx);
1401 if (efx_separate_tx_channels)
1402 n_channels *= 2;
1403 n_channels += extra_channels;
1404 n_channels = min(n_channels, efx->max_channels);
1405
1406 for (i = 0; i < n_channels; i++)
1407 xentries[i].entry = i;
1408 rc = pci_enable_msix_range(efx->pci_dev,
1409 xentries, 1, n_channels);
1410 if (rc < 0) {
1411 /* Fall back to single channel MSI */
1412 efx->interrupt_mode = EFX_INT_MODE_MSI;
1413 netif_err(efx, drv, efx->net_dev,
1414 "could not enable MSI-X\n");
1415 } else if (rc < n_channels) {
1416 netif_err(efx, drv, efx->net_dev,
1417 "WARNING: Insufficient MSI-X vectors"
1418 " available (%d < %u).\n", rc, n_channels);
1419 netif_err(efx, drv, efx->net_dev,
1420 "WARNING: Performance may be reduced.\n");
1421 n_channels = rc;
1422 }
1423
1424 if (rc > 0) {
1425 efx->n_channels = n_channels;
1426 if (n_channels > extra_channels)
1427 n_channels -= extra_channels;
1428 if (efx_separate_tx_channels) {
1429 efx->n_tx_channels = min(max(n_channels / 2,
1430 1U),
1431 efx->max_tx_channels);
1432 efx->n_rx_channels = max(n_channels -
1433 efx->n_tx_channels,
1434 1U);
1435 } else {
1436 efx->n_tx_channels = min(n_channels,
1437 efx->max_tx_channels);
1438 efx->n_rx_channels = n_channels;
1439 }
1440 for (i = 0; i < efx->n_channels; i++)
1441 efx_get_channel(efx, i)->irq =
1442 xentries[i].vector;
1443 }
1444 }
1445
1446 /* Try single interrupt MSI */
1447 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1448 efx->n_channels = 1;
1449 efx->n_rx_channels = 1;
1450 efx->n_tx_channels = 1;
1451 rc = pci_enable_msi(efx->pci_dev);
1452 if (rc == 0) {
1453 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1454 } else {
1455 netif_err(efx, drv, efx->net_dev,
1456 "could not enable MSI\n");
1457 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1458 }
1459 }
1460
1461 /* Assume legacy interrupts */
1462 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1463 efx->n_channels = 1 + (efx_separate_tx_channels ? 1 : 0);
1464 efx->n_rx_channels = 1;
1465 efx->n_tx_channels = 1;
1466 efx->legacy_irq = efx->pci_dev->irq;
1467 }
1468
1469 /* Assign extra channels if possible */
1470 j = efx->n_channels;
1471 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1472 if (!efx->extra_channel_type[i])
1473 continue;
1474 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1475 efx->n_channels <= extra_channels) {
1476 efx->extra_channel_type[i]->handle_no_channel(efx);
1477 } else {
1478 --j;
1479 efx_get_channel(efx, j)->type =
1480 efx->extra_channel_type[i];
1481 }
1482 }
1483
1484 /* RSS might be usable on VFs even if it is disabled on the PF */
1485 #ifdef CONFIG_SFC_SRIOV
1486 if (efx->type->sriov_wanted) {
1487 efx->rss_spread = ((efx->n_rx_channels > 1 ||
1488 !efx->type->sriov_wanted(efx)) ?
1489 efx->n_rx_channels : efx_vf_size(efx));
1490 return 0;
1491 }
1492 #endif
1493 efx->rss_spread = efx->n_rx_channels;
1494
1495 return 0;
1496 }
1497
1498 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1499 {
1500 struct efx_channel *channel, *end_channel;
1501 int rc;
1502
1503 BUG_ON(efx->state == STATE_DISABLED);
1504
1505 efx->irq_soft_enabled = true;
1506 smp_wmb();
1507
1508 efx_for_each_channel(channel, efx) {
1509 if (!channel->type->keep_eventq) {
1510 rc = efx_init_eventq(channel);
1511 if (rc)
1512 goto fail;
1513 }
1514 efx_start_eventq(channel);
1515 }
1516
1517 efx_mcdi_mode_event(efx);
1518
1519 return 0;
1520 fail:
1521 end_channel = channel;
1522 efx_for_each_channel(channel, efx) {
1523 if (channel == end_channel)
1524 break;
1525 efx_stop_eventq(channel);
1526 if (!channel->type->keep_eventq)
1527 efx_fini_eventq(channel);
1528 }
1529
1530 return rc;
1531 }
1532
1533 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1534 {
1535 struct efx_channel *channel;
1536
1537 if (efx->state == STATE_DISABLED)
1538 return;
1539
1540 efx_mcdi_mode_poll(efx);
1541
1542 efx->irq_soft_enabled = false;
1543 smp_wmb();
1544
1545 if (efx->legacy_irq)
1546 synchronize_irq(efx->legacy_irq);
1547
1548 efx_for_each_channel(channel, efx) {
1549 if (channel->irq)
1550 synchronize_irq(channel->irq);
1551
1552 efx_stop_eventq(channel);
1553 if (!channel->type->keep_eventq)
1554 efx_fini_eventq(channel);
1555 }
1556
1557 /* Flush the asynchronous MCDI request queue */
1558 efx_mcdi_flush_async(efx);
1559 }
1560
1561 static int efx_enable_interrupts(struct efx_nic *efx)
1562 {
1563 struct efx_channel *channel, *end_channel;
1564 int rc;
1565
1566 BUG_ON(efx->state == STATE_DISABLED);
1567
1568 if (efx->eeh_disabled_legacy_irq) {
1569 enable_irq(efx->legacy_irq);
1570 efx->eeh_disabled_legacy_irq = false;
1571 }
1572
1573 efx->type->irq_enable_master(efx);
1574
1575 efx_for_each_channel(channel, efx) {
1576 if (channel->type->keep_eventq) {
1577 rc = efx_init_eventq(channel);
1578 if (rc)
1579 goto fail;
1580 }
1581 }
1582
1583 rc = efx_soft_enable_interrupts(efx);
1584 if (rc)
1585 goto fail;
1586
1587 return 0;
1588
1589 fail:
1590 end_channel = channel;
1591 efx_for_each_channel(channel, efx) {
1592 if (channel == end_channel)
1593 break;
1594 if (channel->type->keep_eventq)
1595 efx_fini_eventq(channel);
1596 }
1597
1598 efx->type->irq_disable_non_ev(efx);
1599
1600 return rc;
1601 }
1602
1603 static void efx_disable_interrupts(struct efx_nic *efx)
1604 {
1605 struct efx_channel *channel;
1606
1607 efx_soft_disable_interrupts(efx);
1608
1609 efx_for_each_channel(channel, efx) {
1610 if (channel->type->keep_eventq)
1611 efx_fini_eventq(channel);
1612 }
1613
1614 efx->type->irq_disable_non_ev(efx);
1615 }
1616
1617 static void efx_remove_interrupts(struct efx_nic *efx)
1618 {
1619 struct efx_channel *channel;
1620
1621 /* Remove MSI/MSI-X interrupts */
1622 efx_for_each_channel(channel, efx)
1623 channel->irq = 0;
1624 pci_disable_msi(efx->pci_dev);
1625 pci_disable_msix(efx->pci_dev);
1626
1627 /* Remove legacy interrupt */
1628 efx->legacy_irq = 0;
1629 }
1630
1631 static void efx_set_channels(struct efx_nic *efx)
1632 {
1633 struct efx_channel *channel;
1634 struct efx_tx_queue *tx_queue;
1635
1636 efx->tx_channel_offset =
1637 efx_separate_tx_channels ?
1638 efx->n_channels - efx->n_tx_channels : 0;
1639
1640 /* We need to mark which channels really have RX and TX
1641 * queues, and adjust the TX queue numbers if we have separate
1642 * RX-only and TX-only channels.
1643 */
1644 efx_for_each_channel(channel, efx) {
1645 if (channel->channel < efx->n_rx_channels)
1646 channel->rx_queue.core_index = channel->channel;
1647 else
1648 channel->rx_queue.core_index = -1;
1649
1650 efx_for_each_channel_tx_queue(tx_queue, channel)
1651 tx_queue->queue -= (efx->tx_channel_offset *
1652 EFX_TXQ_TYPES);
1653 }
1654 }
1655
1656 static int efx_probe_nic(struct efx_nic *efx)
1657 {
1658 int rc;
1659
1660 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1661
1662 /* Carry out hardware-type specific initialisation */
1663 rc = efx->type->probe(efx);
1664 if (rc)
1665 return rc;
1666
1667 do {
1668 if (!efx->max_channels || !efx->max_tx_channels) {
1669 netif_err(efx, drv, efx->net_dev,
1670 "Insufficient resources to allocate"
1671 " any channels\n");
1672 rc = -ENOSPC;
1673 goto fail1;
1674 }
1675
1676 /* Determine the number of channels and queues by trying
1677 * to hook in MSI-X interrupts.
1678 */
1679 rc = efx_probe_interrupts(efx);
1680 if (rc)
1681 goto fail1;
1682
1683 efx_set_channels(efx);
1684
1685 /* dimension_resources can fail with EAGAIN */
1686 rc = efx->type->dimension_resources(efx);
1687 if (rc != 0 && rc != -EAGAIN)
1688 goto fail2;
1689
1690 if (rc == -EAGAIN)
1691 /* try again with new max_channels */
1692 efx_remove_interrupts(efx);
1693
1694 } while (rc == -EAGAIN);
1695
1696 if (efx->n_channels > 1)
1697 netdev_rss_key_fill(&efx->rx_hash_key,
1698 sizeof(efx->rx_hash_key));
1699 efx_set_default_rx_indir_table(efx);
1700
1701 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1702 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1703
1704 /* Initialise the interrupt moderation settings */
1705 efx->irq_mod_step_us = DIV_ROUND_UP(efx->timer_quantum_ns, 1000);
1706 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1707 true);
1708
1709 return 0;
1710
1711 fail2:
1712 efx_remove_interrupts(efx);
1713 fail1:
1714 efx->type->remove(efx);
1715 return rc;
1716 }
1717
1718 static void efx_remove_nic(struct efx_nic *efx)
1719 {
1720 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1721
1722 efx_remove_interrupts(efx);
1723 efx->type->remove(efx);
1724 }
1725
1726 static int efx_probe_filters(struct efx_nic *efx)
1727 {
1728 int rc;
1729
1730 spin_lock_init(&efx->filter_lock);
1731 init_rwsem(&efx->filter_sem);
1732 mutex_lock(&efx->mac_lock);
1733 down_write(&efx->filter_sem);
1734 rc = efx->type->filter_table_probe(efx);
1735 if (rc)
1736 goto out_unlock;
1737
1738 #ifdef CONFIG_RFS_ACCEL
1739 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1740 struct efx_channel *channel;
1741 int i, success = 1;
1742
1743 efx_for_each_channel(channel, efx) {
1744 channel->rps_flow_id =
1745 kcalloc(efx->type->max_rx_ip_filters,
1746 sizeof(*channel->rps_flow_id),
1747 GFP_KERNEL);
1748 if (!channel->rps_flow_id)
1749 success = 0;
1750 else
1751 for (i = 0;
1752 i < efx->type->max_rx_ip_filters;
1753 ++i)
1754 channel->rps_flow_id[i] =
1755 RPS_FLOW_ID_INVALID;
1756 }
1757
1758 if (!success) {
1759 efx_for_each_channel(channel, efx)
1760 kfree(channel->rps_flow_id);
1761 efx->type->filter_table_remove(efx);
1762 rc = -ENOMEM;
1763 goto out_unlock;
1764 }
1765
1766 efx->rps_expire_index = efx->rps_expire_channel = 0;
1767 }
1768 #endif
1769 out_unlock:
1770 up_write(&efx->filter_sem);
1771 mutex_unlock(&efx->mac_lock);
1772 return rc;
1773 }
1774
1775 static void efx_remove_filters(struct efx_nic *efx)
1776 {
1777 #ifdef CONFIG_RFS_ACCEL
1778 struct efx_channel *channel;
1779
1780 efx_for_each_channel(channel, efx)
1781 kfree(channel->rps_flow_id);
1782 #endif
1783 down_write(&efx->filter_sem);
1784 efx->type->filter_table_remove(efx);
1785 up_write(&efx->filter_sem);
1786 }
1787
1788 static void efx_restore_filters(struct efx_nic *efx)
1789 {
1790 down_read(&efx->filter_sem);
1791 efx->type->filter_table_restore(efx);
1792 up_read(&efx->filter_sem);
1793 }
1794
1795 /**************************************************************************
1796 *
1797 * NIC startup/shutdown
1798 *
1799 *************************************************************************/
1800
1801 static int efx_probe_all(struct efx_nic *efx)
1802 {
1803 int rc;
1804
1805 rc = efx_probe_nic(efx);
1806 if (rc) {
1807 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1808 goto fail1;
1809 }
1810
1811 rc = efx_probe_port(efx);
1812 if (rc) {
1813 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1814 goto fail2;
1815 }
1816
1817 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1818 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1819 rc = -EINVAL;
1820 goto fail3;
1821 }
1822 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1823
1824 #ifdef CONFIG_SFC_SRIOV
1825 rc = efx->type->vswitching_probe(efx);
1826 if (rc) /* not fatal; the PF will still work fine */
1827 netif_warn(efx, probe, efx->net_dev,
1828 "failed to setup vswitching rc=%d;"
1829 " VFs may not function\n", rc);
1830 #endif
1831
1832 rc = efx_probe_filters(efx);
1833 if (rc) {
1834 netif_err(efx, probe, efx->net_dev,
1835 "failed to create filter tables\n");
1836 goto fail4;
1837 }
1838
1839 rc = efx_probe_channels(efx);
1840 if (rc)
1841 goto fail5;
1842
1843 return 0;
1844
1845 fail5:
1846 efx_remove_filters(efx);
1847 fail4:
1848 #ifdef CONFIG_SFC_SRIOV
1849 efx->type->vswitching_remove(efx);
1850 #endif
1851 fail3:
1852 efx_remove_port(efx);
1853 fail2:
1854 efx_remove_nic(efx);
1855 fail1:
1856 return rc;
1857 }
1858
1859 /* If the interface is supposed to be running but is not, start
1860 * the hardware and software data path, regular activity for the port
1861 * (MAC statistics, link polling, etc.) and schedule the port to be
1862 * reconfigured. Interrupts must already be enabled. This function
1863 * is safe to call multiple times, so long as the NIC is not disabled.
1864 * Requires the RTNL lock.
1865 */
1866 static void efx_start_all(struct efx_nic *efx)
1867 {
1868 EFX_ASSERT_RESET_SERIALISED(efx);
1869 BUG_ON(efx->state == STATE_DISABLED);
1870
1871 /* Check that it is appropriate to restart the interface. All
1872 * of these flags are safe to read under just the rtnl lock */
1873 if (efx->port_enabled || !netif_running(efx->net_dev) ||
1874 efx->reset_pending)
1875 return;
1876
1877 efx_start_port(efx);
1878 efx_start_datapath(efx);
1879
1880 /* Start the hardware monitor if there is one */
1881 if (efx->type->monitor != NULL)
1882 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1883 efx_monitor_interval);
1884
1885 /* Link state detection is normally event-driven; we have
1886 * to poll now because we could have missed a change
1887 */
1888 mutex_lock(&efx->mac_lock);
1889 if (efx->phy_op->poll(efx))
1890 efx_link_status_changed(efx);
1891 mutex_unlock(&efx->mac_lock);
1892
1893 efx->type->start_stats(efx);
1894 efx->type->pull_stats(efx);
1895 spin_lock_bh(&efx->stats_lock);
1896 efx->type->update_stats(efx, NULL, NULL);
1897 spin_unlock_bh(&efx->stats_lock);
1898 }
1899
1900 /* Quiesce the hardware and software data path, and regular activity
1901 * for the port without bringing the link down. Safe to call multiple
1902 * times with the NIC in almost any state, but interrupts should be
1903 * enabled. Requires the RTNL lock.
1904 */
1905 static void efx_stop_all(struct efx_nic *efx)
1906 {
1907 EFX_ASSERT_RESET_SERIALISED(efx);
1908
1909 /* port_enabled can be read safely under the rtnl lock */
1910 if (!efx->port_enabled)
1911 return;
1912
1913 /* update stats before we go down so we can accurately count
1914 * rx_nodesc_drops
1915 */
1916 efx->type->pull_stats(efx);
1917 spin_lock_bh(&efx->stats_lock);
1918 efx->type->update_stats(efx, NULL, NULL);
1919 spin_unlock_bh(&efx->stats_lock);
1920 efx->type->stop_stats(efx);
1921 efx_stop_port(efx);
1922
1923 /* Stop the kernel transmit interface. This is only valid if
1924 * the device is stopped or detached; otherwise the watchdog
1925 * may fire immediately.
1926 */
1927 WARN_ON(netif_running(efx->net_dev) &&
1928 netif_device_present(efx->net_dev));
1929 netif_tx_disable(efx->net_dev);
1930
1931 efx_stop_datapath(efx);
1932 }
1933
1934 static void efx_remove_all(struct efx_nic *efx)
1935 {
1936 efx_remove_channels(efx);
1937 efx_remove_filters(efx);
1938 #ifdef CONFIG_SFC_SRIOV
1939 efx->type->vswitching_remove(efx);
1940 #endif
1941 efx_remove_port(efx);
1942 efx_remove_nic(efx);
1943 }
1944
1945 /**************************************************************************
1946 *
1947 * Interrupt moderation
1948 *
1949 **************************************************************************/
1950 unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs)
1951 {
1952 if (usecs == 0)
1953 return 0;
1954 if (usecs * 1000 < efx->timer_quantum_ns)
1955 return 1; /* never round down to 0 */
1956 return usecs * 1000 / efx->timer_quantum_ns;
1957 }
1958
1959 unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks)
1960 {
1961 /* We must round up when converting ticks to microseconds
1962 * because we round down when converting the other way.
1963 */
1964 return DIV_ROUND_UP(ticks * efx->timer_quantum_ns, 1000);
1965 }
1966
1967 /* Set interrupt moderation parameters */
1968 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1969 unsigned int rx_usecs, bool rx_adaptive,
1970 bool rx_may_override_tx)
1971 {
1972 struct efx_channel *channel;
1973 unsigned int timer_max_us;
1974
1975 EFX_ASSERT_RESET_SERIALISED(efx);
1976
1977 timer_max_us = efx->timer_max_ns / 1000;
1978
1979 if (tx_usecs > timer_max_us || rx_usecs > timer_max_us)
1980 return -EINVAL;
1981
1982 if (tx_usecs != rx_usecs && efx->tx_channel_offset == 0 &&
1983 !rx_may_override_tx) {
1984 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1985 "RX and TX IRQ moderation must be equal\n");
1986 return -EINVAL;
1987 }
1988
1989 efx->irq_rx_adaptive = rx_adaptive;
1990 efx->irq_rx_moderation_us = rx_usecs;
1991 efx_for_each_channel(channel, efx) {
1992 if (efx_channel_has_rx_queue(channel))
1993 channel->irq_moderation_us = rx_usecs;
1994 else if (efx_channel_has_tx_queues(channel))
1995 channel->irq_moderation_us = tx_usecs;
1996 }
1997
1998 return 0;
1999 }
2000
2001 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
2002 unsigned int *rx_usecs, bool *rx_adaptive)
2003 {
2004 *rx_adaptive = efx->irq_rx_adaptive;
2005 *rx_usecs = efx->irq_rx_moderation_us;
2006
2007 /* If channels are shared between RX and TX, so is IRQ
2008 * moderation. Otherwise, IRQ moderation is the same for all
2009 * TX channels and is not adaptive.
2010 */
2011 if (efx->tx_channel_offset == 0) {
2012 *tx_usecs = *rx_usecs;
2013 } else {
2014 struct efx_channel *tx_channel;
2015
2016 tx_channel = efx->channel[efx->tx_channel_offset];
2017 *tx_usecs = tx_channel->irq_moderation_us;
2018 }
2019 }
2020
2021 /**************************************************************************
2022 *
2023 * Hardware monitor
2024 *
2025 **************************************************************************/
2026
2027 /* Run periodically off the general workqueue */
2028 static void efx_monitor(struct work_struct *data)
2029 {
2030 struct efx_nic *efx = container_of(data, struct efx_nic,
2031 monitor_work.work);
2032
2033 netif_vdbg(efx, timer, efx->net_dev,
2034 "hardware monitor executing on CPU %d\n",
2035 raw_smp_processor_id());
2036 BUG_ON(efx->type->monitor == NULL);
2037
2038 /* If the mac_lock is already held then it is likely a port
2039 * reconfiguration is already in place, which will likely do
2040 * most of the work of monitor() anyway. */
2041 if (mutex_trylock(&efx->mac_lock)) {
2042 if (efx->port_enabled)
2043 efx->type->monitor(efx);
2044 mutex_unlock(&efx->mac_lock);
2045 }
2046
2047 queue_delayed_work(efx->workqueue, &efx->monitor_work,
2048 efx_monitor_interval);
2049 }
2050
2051 /**************************************************************************
2052 *
2053 * ioctls
2054 *
2055 *************************************************************************/
2056
2057 /* Net device ioctl
2058 * Context: process, rtnl_lock() held.
2059 */
2060 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
2061 {
2062 struct efx_nic *efx = netdev_priv(net_dev);
2063 struct mii_ioctl_data *data = if_mii(ifr);
2064
2065 if (cmd == SIOCSHWTSTAMP)
2066 return efx_ptp_set_ts_config(efx, ifr);
2067 if (cmd == SIOCGHWTSTAMP)
2068 return efx_ptp_get_ts_config(efx, ifr);
2069
2070 /* Convert phy_id from older PRTAD/DEVAD format */
2071 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
2072 (data->phy_id & 0xfc00) == 0x0400)
2073 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
2074
2075 return mdio_mii_ioctl(&efx->mdio, data, cmd);
2076 }
2077
2078 /**************************************************************************
2079 *
2080 * NAPI interface
2081 *
2082 **************************************************************************/
2083
2084 static void efx_init_napi_channel(struct efx_channel *channel)
2085 {
2086 struct efx_nic *efx = channel->efx;
2087
2088 channel->napi_dev = efx->net_dev;
2089 netif_napi_add(channel->napi_dev, &channel->napi_str,
2090 efx_poll, napi_weight);
2091 efx_channel_busy_poll_init(channel);
2092 }
2093
2094 static void efx_init_napi(struct efx_nic *efx)
2095 {
2096 struct efx_channel *channel;
2097
2098 efx_for_each_channel(channel, efx)
2099 efx_init_napi_channel(channel);
2100 }
2101
2102 static void efx_fini_napi_channel(struct efx_channel *channel)
2103 {
2104 if (channel->napi_dev)
2105 netif_napi_del(&channel->napi_str);
2106
2107 channel->napi_dev = NULL;
2108 }
2109
2110 static void efx_fini_napi(struct efx_nic *efx)
2111 {
2112 struct efx_channel *channel;
2113
2114 efx_for_each_channel(channel, efx)
2115 efx_fini_napi_channel(channel);
2116 }
2117
2118 /**************************************************************************
2119 *
2120 * Kernel netpoll interface
2121 *
2122 *************************************************************************/
2123
2124 #ifdef CONFIG_NET_POLL_CONTROLLER
2125
2126 /* Although in the common case interrupts will be disabled, this is not
2127 * guaranteed. However, all our work happens inside the NAPI callback,
2128 * so no locking is required.
2129 */
2130 static void efx_netpoll(struct net_device *net_dev)
2131 {
2132 struct efx_nic *efx = netdev_priv(net_dev);
2133 struct efx_channel *channel;
2134
2135 efx_for_each_channel(channel, efx)
2136 efx_schedule_channel(channel);
2137 }
2138
2139 #endif
2140
2141 #ifdef CONFIG_NET_RX_BUSY_POLL
2142 static int efx_busy_poll(struct napi_struct *napi)
2143 {
2144 struct efx_channel *channel =
2145 container_of(napi, struct efx_channel, napi_str);
2146 struct efx_nic *efx = channel->efx;
2147 int budget = 4;
2148 int old_rx_packets, rx_packets;
2149
2150 if (!netif_running(efx->net_dev))
2151 return LL_FLUSH_FAILED;
2152
2153 if (!efx_channel_try_lock_poll(channel))
2154 return LL_FLUSH_BUSY;
2155
2156 old_rx_packets = channel->rx_queue.rx_packets;
2157 efx_process_channel(channel, budget);
2158
2159 rx_packets = channel->rx_queue.rx_packets - old_rx_packets;
2160
2161 /* There is no race condition with NAPI here.
2162 * NAPI will automatically be rescheduled if it yielded during busy
2163 * polling, because it was not able to take the lock and thus returned
2164 * the full budget.
2165 */
2166 efx_channel_unlock_poll(channel);
2167
2168 return rx_packets;
2169 }
2170 #endif
2171
2172 /**************************************************************************
2173 *
2174 * Kernel net device interface
2175 *
2176 *************************************************************************/
2177
2178 /* Context: process, rtnl_lock() held. */
2179 int efx_net_open(struct net_device *net_dev)
2180 {
2181 struct efx_nic *efx = netdev_priv(net_dev);
2182 int rc;
2183
2184 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2185 raw_smp_processor_id());
2186
2187 rc = efx_check_disabled(efx);
2188 if (rc)
2189 return rc;
2190 if (efx->phy_mode & PHY_MODE_SPECIAL)
2191 return -EBUSY;
2192 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
2193 return -EIO;
2194
2195 /* Notify the kernel of the link state polled during driver load,
2196 * before the monitor starts running */
2197 efx_link_status_changed(efx);
2198
2199 efx_start_all(efx);
2200 efx_selftest_async_start(efx);
2201 return 0;
2202 }
2203
2204 /* Context: process, rtnl_lock() held.
2205 * Note that the kernel will ignore our return code; this method
2206 * should really be a void.
2207 */
2208 int efx_net_stop(struct net_device *net_dev)
2209 {
2210 struct efx_nic *efx = netdev_priv(net_dev);
2211
2212 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2213 raw_smp_processor_id());
2214
2215 /* Stop the device and flush all the channels */
2216 efx_stop_all(efx);
2217
2218 return 0;
2219 }
2220
2221 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
2222 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
2223 struct rtnl_link_stats64 *stats)
2224 {
2225 struct efx_nic *efx = netdev_priv(net_dev);
2226
2227 spin_lock_bh(&efx->stats_lock);
2228 efx->type->update_stats(efx, NULL, stats);
2229 spin_unlock_bh(&efx->stats_lock);
2230
2231 return stats;
2232 }
2233
2234 /* Context: netif_tx_lock held, BHs disabled. */
2235 static void efx_watchdog(struct net_device *net_dev)
2236 {
2237 struct efx_nic *efx = netdev_priv(net_dev);
2238
2239 netif_err(efx, tx_err, efx->net_dev,
2240 "TX stuck with port_enabled=%d: resetting channels\n",
2241 efx->port_enabled);
2242
2243 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2244 }
2245
2246
2247 /* Context: process, rtnl_lock() held. */
2248 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2249 {
2250 struct efx_nic *efx = netdev_priv(net_dev);
2251 int rc;
2252
2253 rc = efx_check_disabled(efx);
2254 if (rc)
2255 return rc;
2256
2257 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2258
2259 efx_device_detach_sync(efx);
2260 efx_stop_all(efx);
2261
2262 mutex_lock(&efx->mac_lock);
2263 net_dev->mtu = new_mtu;
2264 efx_mac_reconfigure(efx);
2265 mutex_unlock(&efx->mac_lock);
2266
2267 efx_start_all(efx);
2268 netif_device_attach(efx->net_dev);
2269 return 0;
2270 }
2271
2272 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2273 {
2274 struct efx_nic *efx = netdev_priv(net_dev);
2275 struct sockaddr *addr = data;
2276 u8 *new_addr = addr->sa_data;
2277 u8 old_addr[6];
2278 int rc;
2279
2280 if (!is_valid_ether_addr(new_addr)) {
2281 netif_err(efx, drv, efx->net_dev,
2282 "invalid ethernet MAC address requested: %pM\n",
2283 new_addr);
2284 return -EADDRNOTAVAIL;
2285 }
2286
2287 /* save old address */
2288 ether_addr_copy(old_addr, net_dev->dev_addr);
2289 ether_addr_copy(net_dev->dev_addr, new_addr);
2290 if (efx->type->set_mac_address) {
2291 rc = efx->type->set_mac_address(efx);
2292 if (rc) {
2293 ether_addr_copy(net_dev->dev_addr, old_addr);
2294 return rc;
2295 }
2296 }
2297
2298 /* Reconfigure the MAC */
2299 mutex_lock(&efx->mac_lock);
2300 efx_mac_reconfigure(efx);
2301 mutex_unlock(&efx->mac_lock);
2302
2303 return 0;
2304 }
2305
2306 /* Context: netif_addr_lock held, BHs disabled. */
2307 static void efx_set_rx_mode(struct net_device *net_dev)
2308 {
2309 struct efx_nic *efx = netdev_priv(net_dev);
2310
2311 if (efx->port_enabled)
2312 queue_work(efx->workqueue, &efx->mac_work);
2313 /* Otherwise efx_start_port() will do this */
2314 }
2315
2316 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2317 {
2318 struct efx_nic *efx = netdev_priv(net_dev);
2319 int rc;
2320
2321 /* If disabling RX n-tuple filtering, clear existing filters */
2322 if (net_dev->features & ~data & NETIF_F_NTUPLE) {
2323 rc = efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2324 if (rc)
2325 return rc;
2326 }
2327
2328 /* If Rx VLAN filter is changed, update filters via mac_reconfigure */
2329 if ((net_dev->features ^ data) & NETIF_F_HW_VLAN_CTAG_FILTER) {
2330 /* efx_set_rx_mode() will schedule MAC work to update filters
2331 * when a new features are finally set in net_dev.
2332 */
2333 efx_set_rx_mode(net_dev);
2334 }
2335
2336 return 0;
2337 }
2338
2339 static int efx_vlan_rx_add_vid(struct net_device *net_dev, __be16 proto, u16 vid)
2340 {
2341 struct efx_nic *efx = netdev_priv(net_dev);
2342
2343 if (efx->type->vlan_rx_add_vid)
2344 return efx->type->vlan_rx_add_vid(efx, proto, vid);
2345 else
2346 return -EOPNOTSUPP;
2347 }
2348
2349 static int efx_vlan_rx_kill_vid(struct net_device *net_dev, __be16 proto, u16 vid)
2350 {
2351 struct efx_nic *efx = netdev_priv(net_dev);
2352
2353 if (efx->type->vlan_rx_kill_vid)
2354 return efx->type->vlan_rx_kill_vid(efx, proto, vid);
2355 else
2356 return -EOPNOTSUPP;
2357 }
2358
2359 static const struct net_device_ops efx_netdev_ops = {
2360 .ndo_open = efx_net_open,
2361 .ndo_stop = efx_net_stop,
2362 .ndo_get_stats64 = efx_net_stats,
2363 .ndo_tx_timeout = efx_watchdog,
2364 .ndo_start_xmit = efx_hard_start_xmit,
2365 .ndo_validate_addr = eth_validate_addr,
2366 .ndo_do_ioctl = efx_ioctl,
2367 .ndo_change_mtu = efx_change_mtu,
2368 .ndo_set_mac_address = efx_set_mac_address,
2369 .ndo_set_rx_mode = efx_set_rx_mode,
2370 .ndo_set_features = efx_set_features,
2371 .ndo_vlan_rx_add_vid = efx_vlan_rx_add_vid,
2372 .ndo_vlan_rx_kill_vid = efx_vlan_rx_kill_vid,
2373 #ifdef CONFIG_SFC_SRIOV
2374 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2375 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2376 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2377 .ndo_get_vf_config = efx_sriov_get_vf_config,
2378 .ndo_set_vf_link_state = efx_sriov_set_vf_link_state,
2379 .ndo_get_phys_port_id = efx_sriov_get_phys_port_id,
2380 #endif
2381 #ifdef CONFIG_NET_POLL_CONTROLLER
2382 .ndo_poll_controller = efx_netpoll,
2383 #endif
2384 .ndo_setup_tc = efx_setup_tc,
2385 #ifdef CONFIG_NET_RX_BUSY_POLL
2386 .ndo_busy_poll = efx_busy_poll,
2387 #endif
2388 #ifdef CONFIG_RFS_ACCEL
2389 .ndo_rx_flow_steer = efx_filter_rfs,
2390 #endif
2391 };
2392
2393 static void efx_update_name(struct efx_nic *efx)
2394 {
2395 strcpy(efx->name, efx->net_dev->name);
2396 efx_mtd_rename(efx);
2397 efx_set_channel_names(efx);
2398 }
2399
2400 static int efx_netdev_event(struct notifier_block *this,
2401 unsigned long event, void *ptr)
2402 {
2403 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2404
2405 if ((net_dev->netdev_ops == &efx_netdev_ops) &&
2406 event == NETDEV_CHANGENAME)
2407 efx_update_name(netdev_priv(net_dev));
2408
2409 return NOTIFY_DONE;
2410 }
2411
2412 static struct notifier_block efx_netdev_notifier = {
2413 .notifier_call = efx_netdev_event,
2414 };
2415
2416 static ssize_t
2417 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2418 {
2419 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2420 return sprintf(buf, "%d\n", efx->phy_type);
2421 }
2422 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2423
2424 #ifdef CONFIG_SFC_MCDI_LOGGING
2425 static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr,
2426 char *buf)
2427 {
2428 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2429 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2430
2431 return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled);
2432 }
2433 static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr,
2434 const char *buf, size_t count)
2435 {
2436 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2437 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2438 bool enable = count > 0 && *buf != '0';
2439
2440 mcdi->logging_enabled = enable;
2441 return count;
2442 }
2443 static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log);
2444 #endif
2445
2446 static int efx_register_netdev(struct efx_nic *efx)
2447 {
2448 struct net_device *net_dev = efx->net_dev;
2449 struct efx_channel *channel;
2450 int rc;
2451
2452 net_dev->watchdog_timeo = 5 * HZ;
2453 net_dev->irq = efx->pci_dev->irq;
2454 net_dev->netdev_ops = &efx_netdev_ops;
2455 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0)
2456 net_dev->priv_flags |= IFF_UNICAST_FLT;
2457 net_dev->ethtool_ops = &efx_ethtool_ops;
2458 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2459 net_dev->min_mtu = EFX_MIN_MTU;
2460 net_dev->max_mtu = EFX_MAX_MTU;
2461
2462 rtnl_lock();
2463
2464 /* Enable resets to be scheduled and check whether any were
2465 * already requested. If so, the NIC is probably hosed so we
2466 * abort.
2467 */
2468 efx->state = STATE_READY;
2469 smp_mb(); /* ensure we change state before checking reset_pending */
2470 if (efx->reset_pending) {
2471 netif_err(efx, probe, efx->net_dev,
2472 "aborting probe due to scheduled reset\n");
2473 rc = -EIO;
2474 goto fail_locked;
2475 }
2476
2477 rc = dev_alloc_name(net_dev, net_dev->name);
2478 if (rc < 0)
2479 goto fail_locked;
2480 efx_update_name(efx);
2481
2482 /* Always start with carrier off; PHY events will detect the link */
2483 netif_carrier_off(net_dev);
2484
2485 rc = register_netdevice(net_dev);
2486 if (rc)
2487 goto fail_locked;
2488
2489 efx_for_each_channel(channel, efx) {
2490 struct efx_tx_queue *tx_queue;
2491 efx_for_each_channel_tx_queue(tx_queue, channel)
2492 efx_init_tx_queue_core_txq(tx_queue);
2493 }
2494
2495 efx_associate(efx);
2496
2497 rtnl_unlock();
2498
2499 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2500 if (rc) {
2501 netif_err(efx, drv, efx->net_dev,
2502 "failed to init net dev attributes\n");
2503 goto fail_registered;
2504 }
2505 #ifdef CONFIG_SFC_MCDI_LOGGING
2506 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2507 if (rc) {
2508 netif_err(efx, drv, efx->net_dev,
2509 "failed to init net dev attributes\n");
2510 goto fail_attr_mcdi_logging;
2511 }
2512 #endif
2513
2514 return 0;
2515
2516 #ifdef CONFIG_SFC_MCDI_LOGGING
2517 fail_attr_mcdi_logging:
2518 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2519 #endif
2520 fail_registered:
2521 rtnl_lock();
2522 efx_dissociate(efx);
2523 unregister_netdevice(net_dev);
2524 fail_locked:
2525 efx->state = STATE_UNINIT;
2526 rtnl_unlock();
2527 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2528 return rc;
2529 }
2530
2531 static void efx_unregister_netdev(struct efx_nic *efx)
2532 {
2533 if (!efx->net_dev)
2534 return;
2535
2536 BUG_ON(netdev_priv(efx->net_dev) != efx);
2537
2538 if (efx_dev_registered(efx)) {
2539 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2540 #ifdef CONFIG_SFC_MCDI_LOGGING
2541 device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2542 #endif
2543 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2544 unregister_netdev(efx->net_dev);
2545 }
2546 }
2547
2548 /**************************************************************************
2549 *
2550 * Device reset and suspend
2551 *
2552 **************************************************************************/
2553
2554 /* Tears down the entire software state and most of the hardware state
2555 * before reset. */
2556 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2557 {
2558 EFX_ASSERT_RESET_SERIALISED(efx);
2559
2560 if (method == RESET_TYPE_MCDI_TIMEOUT)
2561 efx->type->prepare_flr(efx);
2562
2563 efx_stop_all(efx);
2564 efx_disable_interrupts(efx);
2565
2566 mutex_lock(&efx->mac_lock);
2567 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2568 method != RESET_TYPE_DATAPATH)
2569 efx->phy_op->fini(efx);
2570 efx->type->fini(efx);
2571 }
2572
2573 /* This function will always ensure that the locks acquired in
2574 * efx_reset_down() are released. A failure return code indicates
2575 * that we were unable to reinitialise the hardware, and the
2576 * driver should be disabled. If ok is false, then the rx and tx
2577 * engines are not restarted, pending a RESET_DISABLE. */
2578 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2579 {
2580 int rc;
2581
2582 EFX_ASSERT_RESET_SERIALISED(efx);
2583
2584 if (method == RESET_TYPE_MCDI_TIMEOUT)
2585 efx->type->finish_flr(efx);
2586
2587 /* Ensure that SRAM is initialised even if we're disabling the device */
2588 rc = efx->type->init(efx);
2589 if (rc) {
2590 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2591 goto fail;
2592 }
2593
2594 if (!ok)
2595 goto fail;
2596
2597 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2598 method != RESET_TYPE_DATAPATH) {
2599 rc = efx->phy_op->init(efx);
2600 if (rc)
2601 goto fail;
2602 rc = efx->phy_op->reconfigure(efx);
2603 if (rc && rc != -EPERM)
2604 netif_err(efx, drv, efx->net_dev,
2605 "could not restore PHY settings\n");
2606 }
2607
2608 rc = efx_enable_interrupts(efx);
2609 if (rc)
2610 goto fail;
2611
2612 #ifdef CONFIG_SFC_SRIOV
2613 rc = efx->type->vswitching_restore(efx);
2614 if (rc) /* not fatal; the PF will still work fine */
2615 netif_warn(efx, probe, efx->net_dev,
2616 "failed to restore vswitching rc=%d;"
2617 " VFs may not function\n", rc);
2618 #endif
2619
2620 down_read(&efx->filter_sem);
2621 efx_restore_filters(efx);
2622 up_read(&efx->filter_sem);
2623 if (efx->type->sriov_reset)
2624 efx->type->sriov_reset(efx);
2625
2626 mutex_unlock(&efx->mac_lock);
2627
2628 efx_start_all(efx);
2629
2630 return 0;
2631
2632 fail:
2633 efx->port_initialized = false;
2634
2635 mutex_unlock(&efx->mac_lock);
2636
2637 return rc;
2638 }
2639
2640 /* Reset the NIC using the specified method. Note that the reset may
2641 * fail, in which case the card will be left in an unusable state.
2642 *
2643 * Caller must hold the rtnl_lock.
2644 */
2645 int efx_reset(struct efx_nic *efx, enum reset_type method)
2646 {
2647 int rc, rc2;
2648 bool disabled;
2649
2650 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2651 RESET_TYPE(method));
2652
2653 efx_device_detach_sync(efx);
2654 efx_reset_down(efx, method);
2655
2656 rc = efx->type->reset(efx, method);
2657 if (rc) {
2658 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2659 goto out;
2660 }
2661
2662 /* Clear flags for the scopes we covered. We assume the NIC and
2663 * driver are now quiescent so that there is no race here.
2664 */
2665 if (method < RESET_TYPE_MAX_METHOD)
2666 efx->reset_pending &= -(1 << (method + 1));
2667 else /* it doesn't fit into the well-ordered scope hierarchy */
2668 __clear_bit(method, &efx->reset_pending);
2669
2670 /* Reinitialise bus-mastering, which may have been turned off before
2671 * the reset was scheduled. This is still appropriate, even in the
2672 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2673 * can respond to requests. */
2674 pci_set_master(efx->pci_dev);
2675
2676 out:
2677 /* Leave device stopped if necessary */
2678 disabled = rc ||
2679 method == RESET_TYPE_DISABLE ||
2680 method == RESET_TYPE_RECOVER_OR_DISABLE;
2681 rc2 = efx_reset_up(efx, method, !disabled);
2682 if (rc2) {
2683 disabled = true;
2684 if (!rc)
2685 rc = rc2;
2686 }
2687
2688 if (disabled) {
2689 dev_close(efx->net_dev);
2690 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2691 efx->state = STATE_DISABLED;
2692 } else {
2693 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2694 netif_device_attach(efx->net_dev);
2695 }
2696 return rc;
2697 }
2698
2699 /* Try recovery mechanisms.
2700 * For now only EEH is supported.
2701 * Returns 0 if the recovery mechanisms are unsuccessful.
2702 * Returns a non-zero value otherwise.
2703 */
2704 int efx_try_recovery(struct efx_nic *efx)
2705 {
2706 #ifdef CONFIG_EEH
2707 /* A PCI error can occur and not be seen by EEH because nothing
2708 * happens on the PCI bus. In this case the driver may fail and
2709 * schedule a 'recover or reset', leading to this recovery handler.
2710 * Manually call the eeh failure check function.
2711 */
2712 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
2713 if (eeh_dev_check_failure(eehdev)) {
2714 /* The EEH mechanisms will handle the error and reset the
2715 * device if necessary.
2716 */
2717 return 1;
2718 }
2719 #endif
2720 return 0;
2721 }
2722
2723 static void efx_wait_for_bist_end(struct efx_nic *efx)
2724 {
2725 int i;
2726
2727 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2728 if (efx_mcdi_poll_reboot(efx))
2729 goto out;
2730 msleep(BIST_WAIT_DELAY_MS);
2731 }
2732
2733 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2734 out:
2735 /* Either way unset the BIST flag. If we found no reboot we probably
2736 * won't recover, but we should try.
2737 */
2738 efx->mc_bist_for_other_fn = false;
2739 }
2740
2741 /* The worker thread exists so that code that cannot sleep can
2742 * schedule a reset for later.
2743 */
2744 static void efx_reset_work(struct work_struct *data)
2745 {
2746 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2747 unsigned long pending;
2748 enum reset_type method;
2749
2750 pending = ACCESS_ONCE(efx->reset_pending);
2751 method = fls(pending) - 1;
2752
2753 if (method == RESET_TYPE_MC_BIST)
2754 efx_wait_for_bist_end(efx);
2755
2756 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2757 method == RESET_TYPE_RECOVER_OR_ALL) &&
2758 efx_try_recovery(efx))
2759 return;
2760
2761 if (!pending)
2762 return;
2763
2764 rtnl_lock();
2765
2766 /* We checked the state in efx_schedule_reset() but it may
2767 * have changed by now. Now that we have the RTNL lock,
2768 * it cannot change again.
2769 */
2770 if (efx->state == STATE_READY)
2771 (void)efx_reset(efx, method);
2772
2773 rtnl_unlock();
2774 }
2775
2776 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2777 {
2778 enum reset_type method;
2779
2780 if (efx->state == STATE_RECOVERY) {
2781 netif_dbg(efx, drv, efx->net_dev,
2782 "recovering: skip scheduling %s reset\n",
2783 RESET_TYPE(type));
2784 return;
2785 }
2786
2787 switch (type) {
2788 case RESET_TYPE_INVISIBLE:
2789 case RESET_TYPE_ALL:
2790 case RESET_TYPE_RECOVER_OR_ALL:
2791 case RESET_TYPE_WORLD:
2792 case RESET_TYPE_DISABLE:
2793 case RESET_TYPE_RECOVER_OR_DISABLE:
2794 case RESET_TYPE_DATAPATH:
2795 case RESET_TYPE_MC_BIST:
2796 case RESET_TYPE_MCDI_TIMEOUT:
2797 method = type;
2798 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2799 RESET_TYPE(method));
2800 break;
2801 default:
2802 method = efx->type->map_reset_reason(type);
2803 netif_dbg(efx, drv, efx->net_dev,
2804 "scheduling %s reset for %s\n",
2805 RESET_TYPE(method), RESET_TYPE(type));
2806 break;
2807 }
2808
2809 set_bit(method, &efx->reset_pending);
2810 smp_mb(); /* ensure we change reset_pending before checking state */
2811
2812 /* If we're not READY then just leave the flags set as the cue
2813 * to abort probing or reschedule the reset later.
2814 */
2815 if (ACCESS_ONCE(efx->state) != STATE_READY)
2816 return;
2817
2818 /* efx_process_channel() will no longer read events once a
2819 * reset is scheduled. So switch back to poll'd MCDI completions. */
2820 efx_mcdi_mode_poll(efx);
2821
2822 queue_work(reset_workqueue, &efx->reset_work);
2823 }
2824
2825 /**************************************************************************
2826 *
2827 * List of NICs we support
2828 *
2829 **************************************************************************/
2830
2831 /* PCI device ID table */
2832 static const struct pci_device_id efx_pci_table[] = {
2833 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2834 .driver_data = (unsigned long) &siena_a0_nic_type},
2835 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2836 .driver_data = (unsigned long) &siena_a0_nic_type},
2837 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2838 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2839 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */
2840 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2841 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */
2842 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2843 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1923), /* SFC9140 VF */
2844 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2845 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0a03), /* SFC9220 PF */
2846 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2847 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1a03), /* SFC9220 VF */
2848 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2849 {0} /* end of list */
2850 };
2851
2852 /**************************************************************************
2853 *
2854 * Dummy PHY/MAC operations
2855 *
2856 * Can be used for some unimplemented operations
2857 * Needed so all function pointers are valid and do not have to be tested
2858 * before use
2859 *
2860 **************************************************************************/
2861 int efx_port_dummy_op_int(struct efx_nic *efx)
2862 {
2863 return 0;
2864 }
2865 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2866
2867 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2868 {
2869 return false;
2870 }
2871
2872 static const struct efx_phy_operations efx_dummy_phy_operations = {
2873 .init = efx_port_dummy_op_int,
2874 .reconfigure = efx_port_dummy_op_int,
2875 .poll = efx_port_dummy_op_poll,
2876 .fini = efx_port_dummy_op_void,
2877 };
2878
2879 /**************************************************************************
2880 *
2881 * Data housekeeping
2882 *
2883 **************************************************************************/
2884
2885 /* This zeroes out and then fills in the invariants in a struct
2886 * efx_nic (including all sub-structures).
2887 */
2888 static int efx_init_struct(struct efx_nic *efx,
2889 struct pci_dev *pci_dev, struct net_device *net_dev)
2890 {
2891 int i;
2892
2893 /* Initialise common structures */
2894 INIT_LIST_HEAD(&efx->node);
2895 INIT_LIST_HEAD(&efx->secondary_list);
2896 spin_lock_init(&efx->biu_lock);
2897 #ifdef CONFIG_SFC_MTD
2898 INIT_LIST_HEAD(&efx->mtd_list);
2899 #endif
2900 INIT_WORK(&efx->reset_work, efx_reset_work);
2901 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2902 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2903 efx->pci_dev = pci_dev;
2904 efx->msg_enable = debug;
2905 efx->state = STATE_UNINIT;
2906 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2907
2908 efx->net_dev = net_dev;
2909 efx->rx_prefix_size = efx->type->rx_prefix_size;
2910 efx->rx_ip_align =
2911 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2912 efx->rx_packet_hash_offset =
2913 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2914 efx->rx_packet_ts_offset =
2915 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
2916 spin_lock_init(&efx->stats_lock);
2917 mutex_init(&efx->mac_lock);
2918 efx->phy_op = &efx_dummy_phy_operations;
2919 efx->mdio.dev = net_dev;
2920 INIT_WORK(&efx->mac_work, efx_mac_work);
2921 init_waitqueue_head(&efx->flush_wq);
2922
2923 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2924 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2925 if (!efx->channel[i])
2926 goto fail;
2927 efx->msi_context[i].efx = efx;
2928 efx->msi_context[i].index = i;
2929 }
2930
2931 /* Higher numbered interrupt modes are less capable! */
2932 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2933 interrupt_mode);
2934
2935 /* Would be good to use the net_dev name, but we're too early */
2936 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2937 pci_name(pci_dev));
2938 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2939 if (!efx->workqueue)
2940 goto fail;
2941
2942 return 0;
2943
2944 fail:
2945 efx_fini_struct(efx);
2946 return -ENOMEM;
2947 }
2948
2949 static void efx_fini_struct(struct efx_nic *efx)
2950 {
2951 int i;
2952
2953 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2954 kfree(efx->channel[i]);
2955
2956 kfree(efx->vpd_sn);
2957
2958 if (efx->workqueue) {
2959 destroy_workqueue(efx->workqueue);
2960 efx->workqueue = NULL;
2961 }
2962 }
2963
2964 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats)
2965 {
2966 u64 n_rx_nodesc_trunc = 0;
2967 struct efx_channel *channel;
2968
2969 efx_for_each_channel(channel, efx)
2970 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
2971 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
2972 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
2973 }
2974
2975 /**************************************************************************
2976 *
2977 * PCI interface
2978 *
2979 **************************************************************************/
2980
2981 /* Main body of final NIC shutdown code
2982 * This is called only at module unload (or hotplug removal).
2983 */
2984 static void efx_pci_remove_main(struct efx_nic *efx)
2985 {
2986 /* Flush reset_work. It can no longer be scheduled since we
2987 * are not READY.
2988 */
2989 BUG_ON(efx->state == STATE_READY);
2990 cancel_work_sync(&efx->reset_work);
2991
2992 efx_disable_interrupts(efx);
2993 efx_nic_fini_interrupt(efx);
2994 efx_fini_port(efx);
2995 efx->type->fini(efx);
2996 efx_fini_napi(efx);
2997 efx_remove_all(efx);
2998 }
2999
3000 /* Final NIC shutdown
3001 * This is called only at module unload (or hotplug removal). A PF can call
3002 * this on its VFs to ensure they are unbound first.
3003 */
3004 static void efx_pci_remove(struct pci_dev *pci_dev)
3005 {
3006 struct efx_nic *efx;
3007
3008 efx = pci_get_drvdata(pci_dev);
3009 if (!efx)
3010 return;
3011
3012 /* Mark the NIC as fini, then stop the interface */
3013 rtnl_lock();
3014 efx_dissociate(efx);
3015 dev_close(efx->net_dev);
3016 efx_disable_interrupts(efx);
3017 efx->state = STATE_UNINIT;
3018 rtnl_unlock();
3019
3020 if (efx->type->sriov_fini)
3021 efx->type->sriov_fini(efx);
3022
3023 efx_unregister_netdev(efx);
3024
3025 efx_mtd_remove(efx);
3026
3027 efx_pci_remove_main(efx);
3028
3029 efx_fini_io(efx);
3030 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
3031
3032 efx_fini_struct(efx);
3033 free_netdev(efx->net_dev);
3034
3035 pci_disable_pcie_error_reporting(pci_dev);
3036 };
3037
3038 /* NIC VPD information
3039 * Called during probe to display the part number of the
3040 * installed NIC. VPD is potentially very large but this should
3041 * always appear within the first 512 bytes.
3042 */
3043 #define SFC_VPD_LEN 512
3044 static void efx_probe_vpd_strings(struct efx_nic *efx)
3045 {
3046 struct pci_dev *dev = efx->pci_dev;
3047 char vpd_data[SFC_VPD_LEN];
3048 ssize_t vpd_size;
3049 int ro_start, ro_size, i, j;
3050
3051 /* Get the vpd data from the device */
3052 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
3053 if (vpd_size <= 0) {
3054 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
3055 return;
3056 }
3057
3058 /* Get the Read only section */
3059 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
3060 if (ro_start < 0) {
3061 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
3062 return;
3063 }
3064
3065 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
3066 j = ro_size;
3067 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3068 if (i + j > vpd_size)
3069 j = vpd_size - i;
3070
3071 /* Get the Part number */
3072 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
3073 if (i < 0) {
3074 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
3075 return;
3076 }
3077
3078 j = pci_vpd_info_field_size(&vpd_data[i]);
3079 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3080 if (i + j > vpd_size) {
3081 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
3082 return;
3083 }
3084
3085 netif_info(efx, drv, efx->net_dev,
3086 "Part Number : %.*s\n", j, &vpd_data[i]);
3087
3088 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3089 j = ro_size;
3090 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
3091 if (i < 0) {
3092 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
3093 return;
3094 }
3095
3096 j = pci_vpd_info_field_size(&vpd_data[i]);
3097 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3098 if (i + j > vpd_size) {
3099 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
3100 return;
3101 }
3102
3103 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
3104 if (!efx->vpd_sn)
3105 return;
3106
3107 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
3108 }
3109
3110
3111 /* Main body of NIC initialisation
3112 * This is called at module load (or hotplug insertion, theoretically).
3113 */
3114 static int efx_pci_probe_main(struct efx_nic *efx)
3115 {
3116 int rc;
3117
3118 /* Do start-of-day initialisation */
3119 rc = efx_probe_all(efx);
3120 if (rc)
3121 goto fail1;
3122
3123 efx_init_napi(efx);
3124
3125 rc = efx->type->init(efx);
3126 if (rc) {
3127 netif_err(efx, probe, efx->net_dev,
3128 "failed to initialise NIC\n");
3129 goto fail3;
3130 }
3131
3132 rc = efx_init_port(efx);
3133 if (rc) {
3134 netif_err(efx, probe, efx->net_dev,
3135 "failed to initialise port\n");
3136 goto fail4;
3137 }
3138
3139 rc = efx_nic_init_interrupt(efx);
3140 if (rc)
3141 goto fail5;
3142 rc = efx_enable_interrupts(efx);
3143 if (rc)
3144 goto fail6;
3145
3146 return 0;
3147
3148 fail6:
3149 efx_nic_fini_interrupt(efx);
3150 fail5:
3151 efx_fini_port(efx);
3152 fail4:
3153 efx->type->fini(efx);
3154 fail3:
3155 efx_fini_napi(efx);
3156 efx_remove_all(efx);
3157 fail1:
3158 return rc;
3159 }
3160
3161 /* NIC initialisation
3162 *
3163 * This is called at module load (or hotplug insertion,
3164 * theoretically). It sets up PCI mappings, resets the NIC,
3165 * sets up and registers the network devices with the kernel and hooks
3166 * the interrupt service routine. It does not prepare the device for
3167 * transmission; this is left to the first time one of the network
3168 * interfaces is brought up (i.e. efx_net_open).
3169 */
3170 static int efx_pci_probe(struct pci_dev *pci_dev,
3171 const struct pci_device_id *entry)
3172 {
3173 struct net_device *net_dev;
3174 struct efx_nic *efx;
3175 int rc;
3176
3177 /* Allocate and initialise a struct net_device and struct efx_nic */
3178 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
3179 EFX_MAX_RX_QUEUES);
3180 if (!net_dev)
3181 return -ENOMEM;
3182 efx = netdev_priv(net_dev);
3183 efx->type = (const struct efx_nic_type *) entry->driver_data;
3184 efx->fixed_features |= NETIF_F_HIGHDMA;
3185
3186 pci_set_drvdata(pci_dev, efx);
3187 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
3188 rc = efx_init_struct(efx, pci_dev, net_dev);
3189 if (rc)
3190 goto fail1;
3191
3192 netif_info(efx, probe, efx->net_dev,
3193 "Solarflare NIC detected\n");
3194
3195 if (!efx->type->is_vf)
3196 efx_probe_vpd_strings(efx);
3197
3198 /* Set up basic I/O (BAR mappings etc) */
3199 rc = efx_init_io(efx);
3200 if (rc)
3201 goto fail2;
3202
3203 rc = efx_pci_probe_main(efx);
3204 if (rc)
3205 goto fail3;
3206
3207 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
3208 NETIF_F_TSO | NETIF_F_RXCSUM);
3209 if (efx->type->offload_features & (NETIF_F_IPV6_CSUM | NETIF_F_HW_CSUM))
3210 net_dev->features |= NETIF_F_TSO6;
3211 /* Check whether device supports TSO */
3212 if (!efx->type->tso_versions || !efx->type->tso_versions(efx))
3213 net_dev->features &= ~NETIF_F_ALL_TSO;
3214 /* Mask for features that also apply to VLAN devices */
3215 net_dev->vlan_features |= (NETIF_F_HW_CSUM | NETIF_F_SG |
3216 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
3217 NETIF_F_RXCSUM);
3218
3219 net_dev->hw_features = net_dev->features & ~efx->fixed_features;
3220
3221 /* Disable VLAN filtering by default. It may be enforced if
3222 * the feature is fixed (i.e. VLAN filters are required to
3223 * receive VLAN tagged packets due to vPort restrictions).
3224 */
3225 net_dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
3226 net_dev->features |= efx->fixed_features;
3227
3228 rc = efx_register_netdev(efx);
3229 if (rc)
3230 goto fail4;
3231
3232 if (efx->type->sriov_init) {
3233 rc = efx->type->sriov_init(efx);
3234 if (rc)
3235 netif_err(efx, probe, efx->net_dev,
3236 "SR-IOV can't be enabled rc %d\n", rc);
3237 }
3238
3239 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
3240
3241 /* Try to create MTDs, but allow this to fail */
3242 rtnl_lock();
3243 rc = efx_mtd_probe(efx);
3244 rtnl_unlock();
3245 if (rc && rc != -EPERM)
3246 netif_warn(efx, probe, efx->net_dev,
3247 "failed to create MTDs (%d)\n", rc);
3248
3249 rc = pci_enable_pcie_error_reporting(pci_dev);
3250 if (rc && rc != -EINVAL)
3251 netif_notice(efx, probe, efx->net_dev,
3252 "PCIE error reporting unavailable (%d).\n",
3253 rc);
3254
3255 return 0;
3256
3257 fail4:
3258 efx_pci_remove_main(efx);
3259 fail3:
3260 efx_fini_io(efx);
3261 fail2:
3262 efx_fini_struct(efx);
3263 fail1:
3264 WARN_ON(rc > 0);
3265 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
3266 free_netdev(net_dev);
3267 return rc;
3268 }
3269
3270 /* efx_pci_sriov_configure returns the actual number of Virtual Functions
3271 * enabled on success
3272 */
3273 #ifdef CONFIG_SFC_SRIOV
3274 static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
3275 {
3276 int rc;
3277 struct efx_nic *efx = pci_get_drvdata(dev);
3278
3279 if (efx->type->sriov_configure) {
3280 rc = efx->type->sriov_configure(efx, num_vfs);
3281 if (rc)
3282 return rc;
3283 else
3284 return num_vfs;
3285 } else
3286 return -EOPNOTSUPP;
3287 }
3288 #endif
3289
3290 static int efx_pm_freeze(struct device *dev)
3291 {
3292 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3293
3294 rtnl_lock();
3295
3296 if (efx->state != STATE_DISABLED) {
3297 efx->state = STATE_UNINIT;
3298
3299 efx_device_detach_sync(efx);
3300
3301 efx_stop_all(efx);
3302 efx_disable_interrupts(efx);
3303 }
3304
3305 rtnl_unlock();
3306
3307 return 0;
3308 }
3309
3310 static int efx_pm_thaw(struct device *dev)
3311 {
3312 int rc;
3313 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3314
3315 rtnl_lock();
3316
3317 if (efx->state != STATE_DISABLED) {
3318 rc = efx_enable_interrupts(efx);
3319 if (rc)
3320 goto fail;
3321
3322 mutex_lock(&efx->mac_lock);
3323 efx->phy_op->reconfigure(efx);
3324 mutex_unlock(&efx->mac_lock);
3325
3326 efx_start_all(efx);
3327
3328 netif_device_attach(efx->net_dev);
3329
3330 efx->state = STATE_READY;
3331
3332 efx->type->resume_wol(efx);
3333 }
3334
3335 rtnl_unlock();
3336
3337 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
3338 queue_work(reset_workqueue, &efx->reset_work);
3339
3340 return 0;
3341
3342 fail:
3343 rtnl_unlock();
3344
3345 return rc;
3346 }
3347
3348 static int efx_pm_poweroff(struct device *dev)
3349 {
3350 struct pci_dev *pci_dev = to_pci_dev(dev);
3351 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3352
3353 efx->type->fini(efx);
3354
3355 efx->reset_pending = 0;
3356
3357 pci_save_state(pci_dev);
3358 return pci_set_power_state(pci_dev, PCI_D3hot);
3359 }
3360
3361 /* Used for both resume and restore */
3362 static int efx_pm_resume(struct device *dev)
3363 {
3364 struct pci_dev *pci_dev = to_pci_dev(dev);
3365 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3366 int rc;
3367
3368 rc = pci_set_power_state(pci_dev, PCI_D0);
3369 if (rc)
3370 return rc;
3371 pci_restore_state(pci_dev);
3372 rc = pci_enable_device(pci_dev);
3373 if (rc)
3374 return rc;
3375 pci_set_master(efx->pci_dev);
3376 rc = efx->type->reset(efx, RESET_TYPE_ALL);
3377 if (rc)
3378 return rc;
3379 rc = efx->type->init(efx);
3380 if (rc)
3381 return rc;
3382 rc = efx_pm_thaw(dev);
3383 return rc;
3384 }
3385
3386 static int efx_pm_suspend(struct device *dev)
3387 {
3388 int rc;
3389
3390 efx_pm_freeze(dev);
3391 rc = efx_pm_poweroff(dev);
3392 if (rc)
3393 efx_pm_resume(dev);
3394 return rc;
3395 }
3396
3397 static const struct dev_pm_ops efx_pm_ops = {
3398 .suspend = efx_pm_suspend,
3399 .resume = efx_pm_resume,
3400 .freeze = efx_pm_freeze,
3401 .thaw = efx_pm_thaw,
3402 .poweroff = efx_pm_poweroff,
3403 .restore = efx_pm_resume,
3404 };
3405
3406 /* A PCI error affecting this device was detected.
3407 * At this point MMIO and DMA may be disabled.
3408 * Stop the software path and request a slot reset.
3409 */
3410 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3411 enum pci_channel_state state)
3412 {
3413 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3414 struct efx_nic *efx = pci_get_drvdata(pdev);
3415
3416 if (state == pci_channel_io_perm_failure)
3417 return PCI_ERS_RESULT_DISCONNECT;
3418
3419 rtnl_lock();
3420
3421 if (efx->state != STATE_DISABLED) {
3422 efx->state = STATE_RECOVERY;
3423 efx->reset_pending = 0;
3424
3425 efx_device_detach_sync(efx);
3426
3427 efx_stop_all(efx);
3428 efx_disable_interrupts(efx);
3429
3430 status = PCI_ERS_RESULT_NEED_RESET;
3431 } else {
3432 /* If the interface is disabled we don't want to do anything
3433 * with it.
3434 */
3435 status = PCI_ERS_RESULT_RECOVERED;
3436 }
3437
3438 rtnl_unlock();
3439
3440 pci_disable_device(pdev);
3441
3442 return status;
3443 }
3444
3445 /* Fake a successful reset, which will be performed later in efx_io_resume. */
3446 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3447 {
3448 struct efx_nic *efx = pci_get_drvdata(pdev);
3449 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3450 int rc;
3451
3452 if (pci_enable_device(pdev)) {
3453 netif_err(efx, hw, efx->net_dev,
3454 "Cannot re-enable PCI device after reset.\n");
3455 status = PCI_ERS_RESULT_DISCONNECT;
3456 }
3457
3458 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3459 if (rc) {
3460 netif_err(efx, hw, efx->net_dev,
3461 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3462 /* Non-fatal error. Continue. */
3463 }
3464
3465 return status;
3466 }
3467
3468 /* Perform the actual reset and resume I/O operations. */
3469 static void efx_io_resume(struct pci_dev *pdev)
3470 {
3471 struct efx_nic *efx = pci_get_drvdata(pdev);
3472 int rc;
3473
3474 rtnl_lock();
3475
3476 if (efx->state == STATE_DISABLED)
3477 goto out;
3478
3479 rc = efx_reset(efx, RESET_TYPE_ALL);
3480 if (rc) {
3481 netif_err(efx, hw, efx->net_dev,
3482 "efx_reset failed after PCI error (%d)\n", rc);
3483 } else {
3484 efx->state = STATE_READY;
3485 netif_dbg(efx, hw, efx->net_dev,
3486 "Done resetting and resuming IO after PCI error.\n");
3487 }
3488
3489 out:
3490 rtnl_unlock();
3491 }
3492
3493 /* For simplicity and reliability, we always require a slot reset and try to
3494 * reset the hardware when a pci error affecting the device is detected.
3495 * We leave both the link_reset and mmio_enabled callback unimplemented:
3496 * with our request for slot reset the mmio_enabled callback will never be
3497 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3498 */
3499 static const struct pci_error_handlers efx_err_handlers = {
3500 .error_detected = efx_io_error_detected,
3501 .slot_reset = efx_io_slot_reset,
3502 .resume = efx_io_resume,
3503 };
3504
3505 static struct pci_driver efx_pci_driver = {
3506 .name = KBUILD_MODNAME,
3507 .id_table = efx_pci_table,
3508 .probe = efx_pci_probe,
3509 .remove = efx_pci_remove,
3510 .driver.pm = &efx_pm_ops,
3511 .err_handler = &efx_err_handlers,
3512 #ifdef CONFIG_SFC_SRIOV
3513 .sriov_configure = efx_pci_sriov_configure,
3514 #endif
3515 };
3516
3517 /**************************************************************************
3518 *
3519 * Kernel module interface
3520 *
3521 *************************************************************************/
3522
3523 module_param(interrupt_mode, uint, 0444);
3524 MODULE_PARM_DESC(interrupt_mode,
3525 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3526
3527 static int __init efx_init_module(void)
3528 {
3529 int rc;
3530
3531 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3532
3533 rc = register_netdevice_notifier(&efx_netdev_notifier);
3534 if (rc)
3535 goto err_notifier;
3536
3537 #ifdef CONFIG_SFC_SRIOV
3538 rc = efx_init_sriov();
3539 if (rc)
3540 goto err_sriov;
3541 #endif
3542
3543 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3544 if (!reset_workqueue) {
3545 rc = -ENOMEM;
3546 goto err_reset;
3547 }
3548
3549 rc = pci_register_driver(&efx_pci_driver);
3550 if (rc < 0)
3551 goto err_pci;
3552
3553 return 0;
3554
3555 err_pci:
3556 destroy_workqueue(reset_workqueue);
3557 err_reset:
3558 #ifdef CONFIG_SFC_SRIOV
3559 efx_fini_sriov();
3560 err_sriov:
3561 #endif
3562 unregister_netdevice_notifier(&efx_netdev_notifier);
3563 err_notifier:
3564 return rc;
3565 }
3566
3567 static void __exit efx_exit_module(void)
3568 {
3569 printk(KERN_INFO "Solarflare NET driver unloading\n");
3570
3571 pci_unregister_driver(&efx_pci_driver);
3572 destroy_workqueue(reset_workqueue);
3573 #ifdef CONFIG_SFC_SRIOV
3574 efx_fini_sriov();
3575 #endif
3576 unregister_netdevice_notifier(&efx_netdev_notifier);
3577
3578 }
3579
3580 module_init(efx_init_module);
3581 module_exit(efx_exit_module);
3582
3583 MODULE_AUTHOR("Solarflare Communications and "
3584 "Michael Brown <mbrown@fensystems.co.uk>");
3585 MODULE_DESCRIPTION("Solarflare network driver");
3586 MODULE_LICENSE("GPL");
3587 MODULE_DEVICE_TABLE(pci, efx_pci_table);
ubuntu-zesty-kernel mirror