1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /****************************************************************************
3 * Driver for Solarflare network controllers and boards
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
8 /* Common definitions for all Efx net driver code */
10 #ifndef EFX_NET_DRIVER_H
11 #define EFX_NET_DRIVER_H
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/ethtool.h>
16 #include <linux/if_vlan.h>
17 #include <linux/timer.h>
18 #include <linux/mdio.h>
19 #include <linux/list.h>
20 #include <linux/pci.h>
21 #include <linux/device.h>
22 #include <linux/highmem.h>
23 #include <linux/workqueue.h>
24 #include <linux/mutex.h>
25 #include <linux/rwsem.h>
26 #include <linux/vmalloc.h>
27 #include <linux/mtd/mtd.h>
28 #include <net/busy_poll.h>
35 /**************************************************************************
39 **************************************************************************/
41 #define EFX_DRIVER_VERSION "4.1"
44 #define EFX_WARN_ON_ONCE_PARANOID(x) WARN_ON_ONCE(x)
45 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
47 #define EFX_WARN_ON_ONCE_PARANOID(x) do {} while (0)
48 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
51 /**************************************************************************
55 **************************************************************************/
57 #define EFX_MAX_CHANNELS 32U
58 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
59 #define EFX_EXTRA_CHANNEL_IOV 0
60 #define EFX_EXTRA_CHANNEL_PTP 1
61 #define EFX_MAX_EXTRA_CHANNELS 2U
63 /* Checksum generation is a per-queue option in hardware, so each
64 * queue visible to the networking core is backed by two hardware TX
66 #define EFX_MAX_TX_TC 2
67 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
68 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
69 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
70 #define EFX_TXQ_TYPES 4
71 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
73 /* Maximum possible MTU the driver supports */
74 #define EFX_MAX_MTU (9 * 1024)
76 /* Minimum MTU, from RFC791 (IP) */
77 #define EFX_MIN_MTU 68
79 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
80 * and should be a multiple of the cache line size.
82 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
84 /* If possible, we should ensure cache line alignment at start and end
85 * of every buffer. Otherwise, we just need to ensure 4-byte
86 * alignment of the network header.
89 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES
91 #define EFX_RX_BUF_ALIGNMENT 4
94 /* Non-standard XDP_PACKET_HEADROOM and tailroom to satisfy XDP_REDIRECT and
95 * still fit two standard MTU size packets into a single 4K page.
97 #define EFX_XDP_HEADROOM 128
98 #define EFX_XDP_TAILROOM SKB_DATA_ALIGN(sizeof(struct skb_shared_info))
100 /* Forward declare Precision Time Protocol (PTP) support structure. */
102 struct hwtstamp_config
;
104 struct efx_self_tests
;
107 * struct efx_buffer - A general-purpose DMA buffer
108 * @addr: host base address of the buffer
109 * @dma_addr: DMA base address of the buffer
110 * @len: Buffer length, in bytes
112 * The NIC uses these buffers for its interrupt status registers and
122 * struct efx_special_buffer - DMA buffer entered into buffer table
123 * @buf: Standard &struct efx_buffer
124 * @index: Buffer index within controller;s buffer table
125 * @entries: Number of buffer table entries
127 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE.
128 * Event and descriptor rings are addressed via one or more buffer
129 * table entries (and so can be physically non-contiguous, although we
130 * currently do not take advantage of that). On Falcon and Siena we
131 * have to take care of allocating and initialising the entries
132 * ourselves. On later hardware this is managed by the firmware and
133 * @index and @entries are left as 0.
135 struct efx_special_buffer
{
136 struct efx_buffer buf
;
138 unsigned int entries
;
142 * struct efx_tx_buffer - buffer state for a TX descriptor
143 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
144 * freed when descriptor completes
145 * @xdpf: When @flags & %EFX_TX_BUF_XDP, the XDP frame information; its @data
146 * member is the associated buffer to drop a page reference on.
147 * @option: When @flags & %EFX_TX_BUF_OPTION, an EF10-specific option
149 * @dma_addr: DMA address of the fragment.
150 * @flags: Flags for allocation and DMA mapping type
151 * @len: Length of this fragment.
152 * This field is zero when the queue slot is empty.
153 * @unmap_len: Length of this fragment to unmap
154 * @dma_offset: Offset of @dma_addr from the address of the backing DMA mapping.
155 * Only valid if @unmap_len != 0.
157 struct efx_tx_buffer
{
159 const struct sk_buff
*skb
;
160 struct xdp_frame
*xdpf
;
163 efx_qword_t option
; /* EF10 */
166 unsigned short flags
;
168 unsigned short unmap_len
;
169 unsigned short dma_offset
;
171 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */
172 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */
173 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */
174 #define EFX_TX_BUF_OPTION 0x10 /* empty buffer for option descriptor */
175 #define EFX_TX_BUF_XDP 0x20 /* buffer was sent with XDP */
176 #define EFX_TX_BUF_TSO_V3 0x40 /* empty buffer for a TSO_V3 descriptor */
179 * struct efx_tx_queue - An Efx TX queue
181 * This is a ring buffer of TX fragments.
182 * Since the TX completion path always executes on the same
183 * CPU and the xmit path can operate on different CPUs,
184 * performance is increased by ensuring that the completion
185 * path and the xmit path operate on different cache lines.
186 * This is particularly important if the xmit path is always
187 * executing on one CPU which is different from the completion
188 * path. There is also a cache line for members which are
189 * read but not written on the fast path.
191 * @efx: The associated Efx NIC
192 * @queue: DMA queue number
193 * @label: Label for TX completion events.
194 * Is our index within @channel->tx_queue array.
195 * @tso_version: Version of TSO in use for this queue.
196 * @channel: The associated channel
197 * @core_txq: The networking core TX queue structure
198 * @buffer: The software buffer ring
199 * @cb_page: Array of pages of copy buffers. Carved up according to
200 * %EFX_TX_CB_ORDER into %EFX_TX_CB_SIZE-sized chunks.
201 * @txd: The hardware descriptor ring
202 * @ptr_mask: The size of the ring minus 1.
203 * @piobuf: PIO buffer region for this TX queue (shared with its partner).
204 * Size of the region is efx_piobuf_size.
205 * @piobuf_offset: Buffer offset to be specified in PIO descriptors
206 * @initialised: Has hardware queue been initialised?
207 * @timestamping: Is timestamping enabled for this channel?
208 * @xdp_tx: Is this an XDP tx queue?
209 * @handle_tso: TSO xmit preparation handler. Sets up the TSO metadata and
210 * may also map tx data, depending on the nature of the TSO implementation.
211 * @read_count: Current read pointer.
212 * This is the number of buffers that have been removed from both rings.
213 * @old_write_count: The value of @write_count when last checked.
214 * This is here for performance reasons. The xmit path will
215 * only get the up-to-date value of @write_count if this
216 * variable indicates that the queue is empty. This is to
217 * avoid cache-line ping-pong between the xmit path and the
219 * @merge_events: Number of TX merged completion events
220 * @completed_timestamp_major: Top part of the most recent tx timestamp.
221 * @completed_timestamp_minor: Low part of the most recent tx timestamp.
222 * @insert_count: Current insert pointer
223 * This is the number of buffers that have been added to the
225 * @write_count: Current write pointer
226 * This is the number of buffers that have been added to the
228 * @packet_write_count: Completable write pointer
229 * This is the write pointer of the last packet written.
230 * Normally this will equal @write_count, but as option descriptors
231 * don't produce completion events, they won't update this.
232 * Filled in iff @efx->type->option_descriptors; only used for PIO.
233 * Thus, this is written and used on EF10, and neither on farch.
234 * @old_read_count: The value of read_count when last checked.
235 * This is here for performance reasons. The xmit path will
236 * only get the up-to-date value of read_count if this
237 * variable indicates that the queue is full. This is to
238 * avoid cache-line ping-pong between the xmit path and the
240 * @tso_bursts: Number of times TSO xmit invoked by kernel
241 * @tso_long_headers: Number of packets with headers too long for standard
243 * @tso_packets: Number of packets via the TSO xmit path
244 * @tso_fallbacks: Number of times TSO fallback used
245 * @pushes: Number of times the TX push feature has been used
246 * @pio_packets: Number of times the TX PIO feature has been used
247 * @xmit_more_available: Are any packets waiting to be pushed to the NIC
248 * @cb_packets: Number of times the TX copybreak feature has been used
249 * @notify_count: Count of notified descriptors to the NIC
250 * @empty_read_count: If the completion path has seen the queue as empty
251 * and the transmission path has not yet checked this, the value of
252 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
254 struct efx_tx_queue
{
255 /* Members which don't change on the fast path */
256 struct efx_nic
*efx ____cacheline_aligned_in_smp
;
259 unsigned int tso_version
;
260 struct efx_channel
*channel
;
261 struct netdev_queue
*core_txq
;
262 struct efx_tx_buffer
*buffer
;
263 struct efx_buffer
*cb_page
;
264 struct efx_special_buffer txd
;
265 unsigned int ptr_mask
;
266 void __iomem
*piobuf
;
267 unsigned int piobuf_offset
;
272 /* Function pointers used in the fast path. */
273 int (*handle_tso
)(struct efx_tx_queue
*, struct sk_buff
*, bool *);
275 /* Members used mainly on the completion path */
276 unsigned int read_count ____cacheline_aligned_in_smp
;
277 unsigned int old_write_count
;
278 unsigned int merge_events
;
279 unsigned int bytes_compl
;
280 unsigned int pkts_compl
;
281 u32 completed_timestamp_major
;
282 u32 completed_timestamp_minor
;
284 /* Members used only on the xmit path */
285 unsigned int insert_count ____cacheline_aligned_in_smp
;
286 unsigned int write_count
;
287 unsigned int packet_write_count
;
288 unsigned int old_read_count
;
289 unsigned int tso_bursts
;
290 unsigned int tso_long_headers
;
291 unsigned int tso_packets
;
292 unsigned int tso_fallbacks
;
294 unsigned int pio_packets
;
295 bool xmit_more_available
;
296 unsigned int cb_packets
;
297 unsigned int notify_count
;
298 /* Statistics to supplement MAC stats */
299 unsigned long tx_packets
;
301 /* Members shared between paths and sometimes updated */
302 unsigned int empty_read_count ____cacheline_aligned_in_smp
;
303 #define EFX_EMPTY_COUNT_VALID 0x80000000
304 atomic_t flush_outstanding
;
307 #define EFX_TX_CB_ORDER 7
308 #define EFX_TX_CB_SIZE (1 << EFX_TX_CB_ORDER) - NET_IP_ALIGN
311 * struct efx_rx_buffer - An Efx RX data buffer
312 * @dma_addr: DMA base address of the buffer
313 * @page: The associated page buffer.
314 * Will be %NULL if the buffer slot is currently free.
315 * @page_offset: If pending: offset in @page of DMA base address.
316 * If completed: offset in @page of Ethernet header.
317 * @len: If pending: length for DMA descriptor.
318 * If completed: received length, excluding hash prefix.
319 * @flags: Flags for buffer and packet state. These are only set on the
320 * first buffer of a scattered packet.
322 struct efx_rx_buffer
{
329 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001
330 #define EFX_RX_PKT_CSUMMED 0x0002
331 #define EFX_RX_PKT_DISCARD 0x0004
332 #define EFX_RX_PKT_TCP 0x0040
333 #define EFX_RX_PKT_PREFIX_LEN 0x0080 /* length is in prefix only */
334 #define EFX_RX_PKT_CSUM_LEVEL 0x0200
337 * struct efx_rx_page_state - Page-based rx buffer state
339 * Inserted at the start of every page allocated for receive buffers.
340 * Used to facilitate sharing dma mappings between recycled rx buffers
341 * and those passed up to the kernel.
343 * @dma_addr: The dma address of this page.
345 struct efx_rx_page_state
{
348 unsigned int __pad
[] ____cacheline_aligned
;
352 * struct efx_rx_queue - An Efx RX queue
353 * @efx: The associated Efx NIC
354 * @core_index: Index of network core RX queue. Will be >= 0 iff this
355 * is associated with a real RX queue.
356 * @buffer: The software buffer ring
357 * @rxd: The hardware descriptor ring
358 * @ptr_mask: The size of the ring minus 1.
359 * @refill_enabled: Enable refill whenever fill level is low
360 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
361 * @rxq_flush_pending.
362 * @added_count: Number of buffers added to the receive queue.
363 * @notified_count: Number of buffers given to NIC (<= @added_count).
364 * @removed_count: Number of buffers removed from the receive queue.
365 * @scatter_n: Used by NIC specific receive code.
366 * @scatter_len: Used by NIC specific receive code.
367 * @page_ring: The ring to store DMA mapped pages for reuse.
368 * @page_add: Counter to calculate the write pointer for the recycle ring.
369 * @page_remove: Counter to calculate the read pointer for the recycle ring.
370 * @page_recycle_count: The number of pages that have been recycled.
371 * @page_recycle_failed: The number of pages that couldn't be recycled because
372 * the kernel still held a reference to them.
373 * @page_recycle_full: The number of pages that were released because the
374 * recycle ring was full.
375 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
376 * @max_fill: RX descriptor maximum fill level (<= ring size)
377 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
379 * @min_fill: RX descriptor minimum non-zero fill level.
380 * This records the minimum fill level observed when a ring
381 * refill was triggered.
382 * @recycle_count: RX buffer recycle counter.
383 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
384 * @xdp_rxq_info: XDP specific RX queue information.
385 * @xdp_rxq_info_valid: Is xdp_rxq_info valid data?.
387 struct efx_rx_queue
{
390 struct efx_rx_buffer
*buffer
;
391 struct efx_special_buffer rxd
;
392 unsigned int ptr_mask
;
396 unsigned int added_count
;
397 unsigned int notified_count
;
398 unsigned int removed_count
;
399 unsigned int scatter_n
;
400 unsigned int scatter_len
;
401 struct page
**page_ring
;
402 unsigned int page_add
;
403 unsigned int page_remove
;
404 unsigned int page_recycle_count
;
405 unsigned int page_recycle_failed
;
406 unsigned int page_recycle_full
;
407 unsigned int page_ptr_mask
;
408 unsigned int max_fill
;
409 unsigned int fast_fill_trigger
;
410 unsigned int min_fill
;
411 unsigned int min_overfill
;
412 unsigned int recycle_count
;
413 struct timer_list slow_fill
;
414 unsigned int slow_fill_count
;
415 /* Statistics to supplement MAC stats */
416 unsigned long rx_packets
;
417 struct xdp_rxq_info xdp_rxq_info
;
418 bool xdp_rxq_info_valid
;
421 enum efx_sync_events_state
{
422 SYNC_EVENTS_DISABLED
= 0,
423 SYNC_EVENTS_QUIESCENT
,
424 SYNC_EVENTS_REQUESTED
,
429 * struct efx_channel - An Efx channel
431 * A channel comprises an event queue, at least one TX queue, at least
432 * one RX queue, and an associated tasklet for processing the event
435 * @efx: Associated Efx NIC
436 * @channel: Channel instance number
437 * @type: Channel type definition
438 * @eventq_init: Event queue initialised flag
439 * @enabled: Channel enabled indicator
440 * @irq: IRQ number (MSI and MSI-X only)
441 * @irq_moderation_us: IRQ moderation value (in microseconds)
442 * @napi_dev: Net device used with NAPI
443 * @napi_str: NAPI control structure
444 * @state: state for NAPI vs busy polling
445 * @state_lock: lock protecting @state
446 * @eventq: Event queue buffer
447 * @eventq_mask: Event queue pointer mask
448 * @eventq_read_ptr: Event queue read pointer
449 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
450 * @irq_count: Number of IRQs since last adaptive moderation decision
451 * @irq_mod_score: IRQ moderation score
452 * @rfs_filter_count: number of accelerated RFS filters currently in place;
453 * equals the count of @rps_flow_id slots filled
454 * @rfs_last_expiry: value of jiffies last time some accelerated RFS filters
455 * were checked for expiry
456 * @rfs_expire_index: next accelerated RFS filter ID to check for expiry
457 * @n_rfs_succeeded: number of successful accelerated RFS filter insertions
458 * @n_rfs_failed; number of failed accelerated RFS filter insertions
459 * @filter_work: Work item for efx_filter_rfs_expire()
460 * @rps_flow_id: Flow IDs of filters allocated for accelerated RFS,
461 * indexed by filter ID
462 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
463 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
464 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
465 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
466 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
467 * @n_rx_overlength: Count of RX_OVERLENGTH errors
468 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
469 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
470 * lack of descriptors
471 * @n_rx_merge_events: Number of RX merged completion events
472 * @n_rx_merge_packets: Number of RX packets completed by merged events
473 * @n_rx_xdp_drops: Count of RX packets intentionally dropped due to XDP
474 * @n_rx_xdp_bad_drops: Count of RX packets dropped due to XDP errors
475 * @n_rx_xdp_tx: Count of RX packets retransmitted due to XDP
476 * @n_rx_xdp_redirect: Count of RX packets redirected to a different NIC by XDP
477 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by
478 * __efx_rx_packet(), or zero if there is none
479 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered
480 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0
481 * @rx_list: list of SKBs from current RX, awaiting processing
482 * @rx_queue: RX queue for this channel
483 * @tx_queue: TX queues for this channel
484 * @sync_events_state: Current state of sync events on this channel
485 * @sync_timestamp_major: Major part of the last ptp sync event
486 * @sync_timestamp_minor: Minor part of the last ptp sync event
491 const struct efx_channel_type
*type
;
495 unsigned int irq_moderation_us
;
496 struct net_device
*napi_dev
;
497 struct napi_struct napi_str
;
498 #ifdef CONFIG_NET_RX_BUSY_POLL
499 unsigned long busy_poll_state
;
501 struct efx_special_buffer eventq
;
502 unsigned int eventq_mask
;
503 unsigned int eventq_read_ptr
;
506 unsigned int irq_count
;
507 unsigned int irq_mod_score
;
508 #ifdef CONFIG_RFS_ACCEL
509 unsigned int rfs_filter_count
;
510 unsigned int rfs_last_expiry
;
511 unsigned int rfs_expire_index
;
512 unsigned int n_rfs_succeeded
;
513 unsigned int n_rfs_failed
;
514 struct delayed_work filter_work
;
515 #define RPS_FLOW_ID_INVALID 0xFFFFFFFF
519 unsigned int n_rx_tobe_disc
;
520 unsigned int n_rx_ip_hdr_chksum_err
;
521 unsigned int n_rx_tcp_udp_chksum_err
;
522 unsigned int n_rx_outer_ip_hdr_chksum_err
;
523 unsigned int n_rx_outer_tcp_udp_chksum_err
;
524 unsigned int n_rx_inner_ip_hdr_chksum_err
;
525 unsigned int n_rx_inner_tcp_udp_chksum_err
;
526 unsigned int n_rx_eth_crc_err
;
527 unsigned int n_rx_mcast_mismatch
;
528 unsigned int n_rx_frm_trunc
;
529 unsigned int n_rx_overlength
;
530 unsigned int n_skbuff_leaks
;
531 unsigned int n_rx_nodesc_trunc
;
532 unsigned int n_rx_merge_events
;
533 unsigned int n_rx_merge_packets
;
534 unsigned int n_rx_xdp_drops
;
535 unsigned int n_rx_xdp_bad_drops
;
536 unsigned int n_rx_xdp_tx
;
537 unsigned int n_rx_xdp_redirect
;
539 unsigned int rx_pkt_n_frags
;
540 unsigned int rx_pkt_index
;
542 struct list_head
*rx_list
;
544 struct efx_rx_queue rx_queue
;
545 struct efx_tx_queue tx_queue
[EFX_TXQ_TYPES
];
547 enum efx_sync_events_state sync_events_state
;
548 u32 sync_timestamp_major
;
549 u32 sync_timestamp_minor
;
553 * struct efx_msi_context - Context for each MSI
554 * @efx: The associated NIC
555 * @index: Index of the channel/IRQ
556 * @name: Name of the channel/IRQ
558 * Unlike &struct efx_channel, this is never reallocated and is always
559 * safe for the IRQ handler to access.
561 struct efx_msi_context
{
564 char name
[IFNAMSIZ
+ 6];
568 * struct efx_channel_type - distinguishes traffic and extra channels
569 * @handle_no_channel: Handle failure to allocate an extra channel
570 * @pre_probe: Set up extra state prior to initialisation
571 * @post_remove: Tear down extra state after finalisation, if allocated.
572 * May be called on channels that have not been probed.
573 * @get_name: Generate the channel's name (used for its IRQ handler)
574 * @copy: Copy the channel state prior to reallocation. May be %NULL if
575 * reallocation is not supported.
576 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
577 * @want_txqs: Determine whether this channel should have TX queues
578 * created. If %NULL, TX queues are not created.
579 * @keep_eventq: Flag for whether event queue should be kept initialised
580 * while the device is stopped
581 * @want_pio: Flag for whether PIO buffers should be linked to this
582 * channel's TX queues.
584 struct efx_channel_type
{
585 void (*handle_no_channel
)(struct efx_nic
*);
586 int (*pre_probe
)(struct efx_channel
*);
587 void (*post_remove
)(struct efx_channel
*);
588 void (*get_name
)(struct efx_channel
*, char *buf
, size_t len
);
589 struct efx_channel
*(*copy
)(const struct efx_channel
*);
590 bool (*receive_skb
)(struct efx_channel
*, struct sk_buff
*);
591 bool (*want_txqs
)(struct efx_channel
*);
602 #define STRING_TABLE_LOOKUP(val, member) \
603 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
605 extern const char *const efx_loopback_mode_names
[];
606 extern const unsigned int efx_loopback_mode_max
;
607 #define LOOPBACK_MODE(efx) \
608 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
610 extern const char *const efx_reset_type_names
[];
611 extern const unsigned int efx_reset_type_max
;
612 #define RESET_TYPE(type) \
613 STRING_TABLE_LOOKUP(type, efx_reset_type)
616 /* Be careful if altering to correct macro below */
617 EFX_INT_MODE_MSIX
= 0,
618 EFX_INT_MODE_MSI
= 1,
619 EFX_INT_MODE_LEGACY
= 2,
620 EFX_INT_MODE_MAX
/* Insert any new items before this */
622 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
625 STATE_UNINIT
= 0, /* device being probed/removed or is frozen */
626 STATE_READY
= 1, /* hardware ready and netdev registered */
627 STATE_DISABLED
= 2, /* device disabled due to hardware errors */
628 STATE_RECOVERY
= 3, /* device recovering from PCI error */
631 /* Forward declaration */
634 /* Pseudo bit-mask flow control field */
635 #define EFX_FC_RX FLOW_CTRL_RX
636 #define EFX_FC_TX FLOW_CTRL_TX
637 #define EFX_FC_AUTO 4
640 * struct efx_link_state - Current state of the link
642 * @fd: Link is full-duplex
643 * @fc: Actual flow control flags
644 * @speed: Link speed (Mbps)
646 struct efx_link_state
{
653 static inline bool efx_link_state_equal(const struct efx_link_state
*left
,
654 const struct efx_link_state
*right
)
656 return left
->up
== right
->up
&& left
->fd
== right
->fd
&&
657 left
->fc
== right
->fc
&& left
->speed
== right
->speed
;
661 * struct efx_phy_operations - Efx PHY operations table
662 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
663 * efx->loopback_modes.
664 * @init: Initialise PHY
665 * @fini: Shut down PHY
666 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
667 * @poll: Update @link_state and report whether it changed.
668 * Serialised by the mac_lock.
669 * @get_link_ksettings: Get ethtool settings. Serialised by the mac_lock.
670 * @set_link_ksettings: Set ethtool settings. Serialised by the mac_lock.
671 * @get_fecparam: Get Forward Error Correction settings. Serialised by mac_lock.
672 * @set_fecparam: Set Forward Error Correction settings. Serialised by mac_lock.
673 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
674 * (only needed where AN bit is set in mmds)
675 * @test_alive: Test that PHY is 'alive' (online)
676 * @test_name: Get the name of a PHY-specific test/result
677 * @run_tests: Run tests and record results as appropriate (offline).
678 * Flags are the ethtool tests flags.
680 struct efx_phy_operations
{
681 int (*probe
) (struct efx_nic
*efx
);
682 int (*init
) (struct efx_nic
*efx
);
683 void (*fini
) (struct efx_nic
*efx
);
684 void (*remove
) (struct efx_nic
*efx
);
685 int (*reconfigure
) (struct efx_nic
*efx
);
686 bool (*poll
) (struct efx_nic
*efx
);
687 void (*get_link_ksettings
)(struct efx_nic
*efx
,
688 struct ethtool_link_ksettings
*cmd
);
689 int (*set_link_ksettings
)(struct efx_nic
*efx
,
690 const struct ethtool_link_ksettings
*cmd
);
691 int (*get_fecparam
)(struct efx_nic
*efx
, struct ethtool_fecparam
*fec
);
692 int (*set_fecparam
)(struct efx_nic
*efx
,
693 const struct ethtool_fecparam
*fec
);
694 void (*set_npage_adv
) (struct efx_nic
*efx
, u32
);
695 int (*test_alive
) (struct efx_nic
*efx
);
696 const char *(*test_name
) (struct efx_nic
*efx
, unsigned int index
);
697 int (*run_tests
) (struct efx_nic
*efx
, int *results
, unsigned flags
);
698 int (*get_module_eeprom
) (struct efx_nic
*efx
,
699 struct ethtool_eeprom
*ee
,
701 int (*get_module_info
) (struct efx_nic
*efx
,
702 struct ethtool_modinfo
*modinfo
);
706 * enum efx_phy_mode - PHY operating mode flags
707 * @PHY_MODE_NORMAL: on and should pass traffic
708 * @PHY_MODE_TX_DISABLED: on with TX disabled
709 * @PHY_MODE_LOW_POWER: set to low power through MDIO
710 * @PHY_MODE_OFF: switched off through external control
711 * @PHY_MODE_SPECIAL: on but will not pass traffic
715 PHY_MODE_TX_DISABLED
= 1,
716 PHY_MODE_LOW_POWER
= 2,
718 PHY_MODE_SPECIAL
= 8,
721 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode
)
723 return !!(mode
& ~PHY_MODE_TX_DISABLED
);
727 * struct efx_hw_stat_desc - Description of a hardware statistic
728 * @name: Name of the statistic as visible through ethtool, or %NULL if
729 * it should not be exposed
730 * @dma_width: Width in bits (0 for non-DMA statistics)
731 * @offset: Offset within stats (ignored for non-DMA statistics)
733 struct efx_hw_stat_desc
{
739 /* Number of bits used in a multicast filter hash address */
740 #define EFX_MCAST_HASH_BITS 8
742 /* Number of (single-bit) entries in a multicast filter hash */
743 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
745 /* An Efx multicast filter hash */
746 union efx_multicast_hash
{
747 u8 byte
[EFX_MCAST_HASH_ENTRIES
/ 8];
748 efx_oword_t oword
[EFX_MCAST_HASH_ENTRIES
/ sizeof(efx_oword_t
) / 8];
753 /* The reserved RSS context value */
754 #define EFX_MCDI_RSS_CONTEXT_INVALID 0xffffffff
756 * struct efx_rss_context - A user-defined RSS context for filtering
757 * @list: node of linked list on which this struct is stored
758 * @context_id: the RSS_CONTEXT_ID returned by MC firmware, or
759 * %EFX_MCDI_RSS_CONTEXT_INVALID if this context is not present on the NIC.
760 * For Siena, 0 if RSS is active, else %EFX_MCDI_RSS_CONTEXT_INVALID.
761 * @user_id: the rss_context ID exposed to userspace over ethtool.
762 * @rx_hash_udp_4tuple: UDP 4-tuple hashing enabled
763 * @rx_hash_key: Toeplitz hash key for this RSS context
764 * @indir_table: Indirection table for this RSS context
766 struct efx_rss_context
{
767 struct list_head list
;
770 bool rx_hash_udp_4tuple
;
772 u32 rx_indir_table
[128];
775 #ifdef CONFIG_RFS_ACCEL
776 /* Order of these is important, since filter_id >= %EFX_ARFS_FILTER_ID_PENDING
777 * is used to test if filter does or will exist.
779 #define EFX_ARFS_FILTER_ID_PENDING -1
780 #define EFX_ARFS_FILTER_ID_ERROR -2
781 #define EFX_ARFS_FILTER_ID_REMOVING -3
783 * struct efx_arfs_rule - record of an ARFS filter and its IDs
784 * @node: linkage into hash table
785 * @spec: details of the filter (used as key for hash table). Use efx->type to
786 * determine which member to use.
787 * @rxq_index: channel to which the filter will steer traffic.
788 * @arfs_id: filter ID which was returned to ARFS
789 * @filter_id: index in software filter table. May be
790 * %EFX_ARFS_FILTER_ID_PENDING if filter was not inserted yet,
791 * %EFX_ARFS_FILTER_ID_ERROR if filter insertion failed, or
792 * %EFX_ARFS_FILTER_ID_REMOVING if expiry is currently removing the filter.
794 struct efx_arfs_rule
{
795 struct hlist_node node
;
796 struct efx_filter_spec spec
;
802 /* Size chosen so that the table is one page (4kB) */
803 #define EFX_ARFS_HASH_TABLE_SIZE 512
806 * struct efx_async_filter_insertion - Request to asynchronously insert a filter
807 * @net_dev: Reference to the netdevice
808 * @spec: The filter to insert
809 * @work: Workitem for this request
810 * @rxq_index: Identifies the channel for which this request was made
811 * @flow_id: Identifies the kernel-side flow for which this request was made
813 struct efx_async_filter_insertion
{
814 struct net_device
*net_dev
;
815 struct efx_filter_spec spec
;
816 struct work_struct work
;
821 /* Maximum number of ARFS workitems that may be in flight on an efx_nic */
822 #define EFX_RPS_MAX_IN_FLIGHT 8
823 #endif /* CONFIG_RFS_ACCEL */
826 * struct efx_nic - an Efx NIC
827 * @name: Device name (net device name or bus id before net device registered)
828 * @pci_dev: The PCI device
829 * @node: List node for maintaning primary/secondary function lists
830 * @primary: &struct efx_nic instance for the primary function of this
831 * controller. May be the same structure, and may be %NULL if no
832 * primary function is bound. Serialised by rtnl_lock.
833 * @secondary_list: List of &struct efx_nic instances for the secondary PCI
834 * functions of the controller, if this is for the primary function.
835 * Serialised by rtnl_lock.
836 * @type: Controller type attributes
837 * @legacy_irq: IRQ number
838 * @workqueue: Workqueue for port reconfigures and the HW monitor.
839 * Work items do not hold and must not acquire RTNL.
840 * @workqueue_name: Name of workqueue
841 * @reset_work: Scheduled reset workitem
842 * @membase_phys: Memory BAR value as physical address
843 * @membase: Memory BAR value
844 * @vi_stride: step between per-VI registers / memory regions
845 * @interrupt_mode: Interrupt mode
846 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
847 * @timer_max_ns: Interrupt timer maximum value, in nanoseconds
848 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
849 * @irq_rx_mod_step_us: Step size for IRQ moderation for RX event queues
850 * @irq_rx_moderation_us: IRQ moderation time for RX event queues
851 * @msg_enable: Log message enable flags
852 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock.
853 * @reset_pending: Bitmask for pending resets
854 * @tx_queue: TX DMA queues
855 * @rx_queue: RX DMA queues
857 * @msi_context: Context for each MSI
858 * @extra_channel_types: Types of extra (non-traffic) channels that
859 * should be allocated for this NIC
860 * @xdp_tx_queue_count: Number of entries in %xdp_tx_queues.
861 * @xdp_tx_queues: Array of pointers to tx queues used for XDP transmit.
862 * @rxq_entries: Size of receive queues requested by user.
863 * @txq_entries: Size of transmit queues requested by user.
864 * @txq_stop_thresh: TX queue fill level at or above which we stop it.
865 * @txq_wake_thresh: TX queue fill level at or below which we wake it.
866 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
867 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
868 * @sram_lim_qw: Qword address limit of SRAM
869 * @next_buffer_table: First available buffer table id
870 * @n_channels: Number of channels in use
871 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
872 * @n_tx_channels: Number of channels used for TX
873 * @n_extra_tx_channels: Number of extra channels with TX queues
874 * @tx_queues_per_channel: number of TX queues probed on each channel
875 * @n_xdp_channels: Number of channels used for XDP TX
876 * @xdp_channel_offset: Offset of zeroth channel used for XPD TX.
877 * @xdp_tx_per_channel: Max number of TX queues on an XDP TX channel.
878 * @rx_ip_align: RX DMA address offset to have IP header aligned in
879 * in accordance with NET_IP_ALIGN
880 * @rx_dma_len: Current maximum RX DMA length
881 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
882 * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
883 * for use in sk_buff::truesize
884 * @rx_prefix_size: Size of RX prefix before packet data
885 * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data
886 * (valid only if @rx_prefix_size != 0; always negative)
887 * @rx_packet_len_offset: Offset of RX packet length from start of packet data
888 * (valid only for NICs that set %EFX_RX_PKT_PREFIX_LEN; always negative)
889 * @rx_packet_ts_offset: Offset of timestamp from start of packet data
890 * (valid only if channel->sync_timestamps_enabled; always negative)
891 * @rx_scatter: Scatter mode enabled for receives
892 * @rss_context: Main RSS context. Its @list member is the head of the list of
893 * RSS contexts created by user requests
894 * @rss_lock: Protects custom RSS context software state in @rss_context.list
895 * @vport_id: The function's vport ID, only relevant for PFs
896 * @int_error_count: Number of internal errors seen recently
897 * @int_error_expire: Time at which error count will be expired
898 * @must_realloc_vis: Flag: VIs have yet to be reallocated after MC reboot
899 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will
900 * acknowledge but do nothing else.
901 * @irq_status: Interrupt status buffer
902 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
903 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
904 * @selftest_work: Work item for asynchronous self-test
905 * @mtd_list: List of MTDs attached to the NIC
906 * @nic_data: Hardware dependent state
907 * @mcdi: Management-Controller-to-Driver Interface state
908 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
909 * efx_monitor() and efx_reconfigure_port()
910 * @port_enabled: Port enabled indicator.
911 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
912 * efx_mac_work() with kernel interfaces. Safe to read under any
913 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
914 * be held to modify it.
915 * @port_initialized: Port initialized?
916 * @net_dev: Operating system network device. Consider holding the rtnl lock
917 * @fixed_features: Features which cannot be turned off
918 * @num_mac_stats: Number of MAC stats reported by firmware (MAC_STATS_NUM_STATS
919 * field of %MC_CMD_GET_CAPABILITIES_V4 response, or %MC_CMD_MAC_NSTATS)
920 * @stats_buffer: DMA buffer for statistics
921 * @phy_type: PHY type
922 * @phy_op: PHY interface
923 * @phy_data: PHY private data (including PHY-specific stats)
924 * @mdio: PHY MDIO interface
925 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
926 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
927 * @link_advertising: Autonegotiation advertising flags
928 * @fec_config: Forward Error Correction configuration flags. For bit positions
929 * see &enum ethtool_fec_config_bits.
930 * @link_state: Current state of the link
931 * @n_link_state_changes: Number of times the link has changed state
932 * @unicast_filter: Flag for Falcon-arch simple unicast filter.
933 * Protected by @mac_lock.
934 * @multicast_hash: Multicast hash table for Falcon-arch.
935 * Protected by @mac_lock.
936 * @wanted_fc: Wanted flow control flags
937 * @fc_disable: When non-zero flow control is disabled. Typically used to
938 * ensure that network back pressure doesn't delay dma queue flushes.
939 * Serialised by the rtnl lock.
940 * @mac_work: Work item for changing MAC promiscuity and multicast hash
941 * @loopback_mode: Loopback status
942 * @loopback_modes: Supported loopback mode bitmask
943 * @loopback_selftest: Offline self-test private state
944 * @xdp_prog: Current XDP programme for this interface
945 * @filter_sem: Filter table rw_semaphore, protects existence of @filter_state
946 * @filter_state: Architecture-dependent filter table state
947 * @rps_mutex: Protects RPS state of all channels
948 * @rps_slot_map: bitmap of in-flight entries in @rps_slot
949 * @rps_slot: array of ARFS insertion requests for efx_filter_rfs_work()
950 * @rps_hash_lock: Protects ARFS filter mapping state (@rps_hash_table and
952 * @rps_hash_table: Mapping between ARFS filters and their various IDs
953 * @rps_next_id: next arfs_id for an ARFS filter
954 * @active_queues: Count of RX and TX queues that haven't been flushed and drained.
955 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
956 * Decremented when the efx_flush_rx_queue() is called.
957 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
958 * completed (either success or failure). Not used when MCDI is used to
959 * flush receive queues.
960 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
961 * @vf_count: Number of VFs intended to be enabled.
962 * @vf_init_count: Number of VFs that have been fully initialised.
963 * @vi_scale: log2 number of vnics per VF.
964 * @ptp_data: PTP state data
965 * @ptp_warned: has this NIC seen and warned about unexpected PTP events?
966 * @vpd_sn: Serial number read from VPD
967 * @xdp_rxq_info_failed: Have any of the rx queues failed to initialise their
968 * xdp_rxq_info structures?
969 * @netdev_notifier: Netdevice notifier.
970 * @mem_bar: The BAR that is mapped into membase.
971 * @reg_base: Offset from the start of the bar to the function control window.
972 * @monitor_work: Hardware monitor workitem
973 * @biu_lock: BIU (bus interface unit) lock
974 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
975 * field is used by efx_test_interrupts() to verify that an
976 * interrupt has occurred.
977 * @stats_lock: Statistics update lock. Must be held when calling
978 * efx_nic_type::{update,start,stop}_stats.
979 * @n_rx_noskb_drops: Count of RX packets dropped due to failure to allocate an skb
981 * This is stored in the private area of the &struct net_device.
984 /* The following fields should be written very rarely */
987 struct list_head node
;
988 struct efx_nic
*primary
;
989 struct list_head secondary_list
;
990 struct pci_dev
*pci_dev
;
991 unsigned int port_num
;
992 const struct efx_nic_type
*type
;
994 bool eeh_disabled_legacy_irq
;
995 struct workqueue_struct
*workqueue
;
996 char workqueue_name
[16];
997 struct work_struct reset_work
;
998 resource_size_t membase_phys
;
999 void __iomem
*membase
;
1001 unsigned int vi_stride
;
1003 enum efx_int_mode interrupt_mode
;
1004 unsigned int timer_quantum_ns
;
1005 unsigned int timer_max_ns
;
1006 bool irq_rx_adaptive
;
1007 unsigned int irq_mod_step_us
;
1008 unsigned int irq_rx_moderation_us
;
1011 enum nic_state state
;
1012 unsigned long reset_pending
;
1014 struct efx_channel
*channel
[EFX_MAX_CHANNELS
];
1015 struct efx_msi_context msi_context
[EFX_MAX_CHANNELS
];
1016 const struct efx_channel_type
*
1017 extra_channel_type
[EFX_MAX_EXTRA_CHANNELS
];
1019 unsigned int xdp_tx_queue_count
;
1020 struct efx_tx_queue
**xdp_tx_queues
;
1022 unsigned rxq_entries
;
1023 unsigned txq_entries
;
1024 unsigned int txq_stop_thresh
;
1025 unsigned int txq_wake_thresh
;
1027 unsigned tx_dc_base
;
1028 unsigned rx_dc_base
;
1029 unsigned sram_lim_qw
;
1030 unsigned next_buffer_table
;
1032 unsigned int max_channels
;
1033 unsigned int max_vis
;
1034 unsigned int max_tx_channels
;
1035 unsigned n_channels
;
1036 unsigned n_rx_channels
;
1037 unsigned rss_spread
;
1038 unsigned tx_channel_offset
;
1039 unsigned n_tx_channels
;
1040 unsigned n_extra_tx_channels
;
1041 unsigned int tx_queues_per_channel
;
1042 unsigned int n_xdp_channels
;
1043 unsigned int xdp_channel_offset
;
1044 unsigned int xdp_tx_per_channel
;
1045 unsigned int rx_ip_align
;
1046 unsigned int rx_dma_len
;
1047 unsigned int rx_buffer_order
;
1048 unsigned int rx_buffer_truesize
;
1049 unsigned int rx_page_buf_step
;
1050 unsigned int rx_bufs_per_page
;
1051 unsigned int rx_pages_per_batch
;
1052 unsigned int rx_prefix_size
;
1053 int rx_packet_hash_offset
;
1054 int rx_packet_len_offset
;
1055 int rx_packet_ts_offset
;
1057 struct efx_rss_context rss_context
;
1058 struct mutex rss_lock
;
1061 unsigned int_error_count
;
1062 unsigned long int_error_expire
;
1064 bool must_realloc_vis
;
1065 bool irq_soft_enabled
;
1066 struct efx_buffer irq_status
;
1067 unsigned irq_zero_count
;
1069 struct delayed_work selftest_work
;
1071 #ifdef CONFIG_SFC_MTD
1072 struct list_head mtd_list
;
1076 struct efx_mcdi_data
*mcdi
;
1078 struct mutex mac_lock
;
1079 struct work_struct mac_work
;
1082 bool mc_bist_for_other_fn
;
1083 bool port_initialized
;
1084 struct net_device
*net_dev
;
1086 netdev_features_t fixed_features
;
1089 struct efx_buffer stats_buffer
;
1090 u64 rx_nodesc_drops_total
;
1091 u64 rx_nodesc_drops_while_down
;
1092 bool rx_nodesc_drops_prev_state
;
1094 unsigned int phy_type
;
1095 const struct efx_phy_operations
*phy_op
;
1097 struct mdio_if_info mdio
;
1098 unsigned int mdio_bus
;
1099 enum efx_phy_mode phy_mode
;
1101 __ETHTOOL_DECLARE_LINK_MODE_MASK(link_advertising
);
1103 struct efx_link_state link_state
;
1104 unsigned int n_link_state_changes
;
1106 bool unicast_filter
;
1107 union efx_multicast_hash multicast_hash
;
1109 unsigned fc_disable
;
1112 enum efx_loopback_mode loopback_mode
;
1115 void *loopback_selftest
;
1116 /* We access loopback_selftest immediately before running XDP,
1117 * so we want them next to each other.
1119 struct bpf_prog __rcu
*xdp_prog
;
1121 struct rw_semaphore filter_sem
;
1123 #ifdef CONFIG_RFS_ACCEL
1124 struct mutex rps_mutex
;
1125 unsigned long rps_slot_map
;
1126 struct efx_async_filter_insertion rps_slot
[EFX_RPS_MAX_IN_FLIGHT
];
1127 spinlock_t rps_hash_lock
;
1128 struct hlist_head
*rps_hash_table
;
1132 atomic_t active_queues
;
1133 atomic_t rxq_flush_pending
;
1134 atomic_t rxq_flush_outstanding
;
1135 wait_queue_head_t flush_wq
;
1137 #ifdef CONFIG_SFC_SRIOV
1139 unsigned vf_init_count
;
1143 struct efx_ptp_data
*ptp_data
;
1147 bool xdp_rxq_info_failed
;
1149 struct notifier_block netdev_notifier
;
1151 unsigned int mem_bar
;
1154 /* The following fields may be written more often */
1156 struct delayed_work monitor_work ____cacheline_aligned_in_smp
;
1157 spinlock_t biu_lock
;
1159 spinlock_t stats_lock
;
1160 atomic_t n_rx_noskb_drops
;
1163 static inline int efx_dev_registered(struct efx_nic
*efx
)
1165 return efx
->net_dev
->reg_state
== NETREG_REGISTERED
;
1168 static inline unsigned int efx_port_num(struct efx_nic
*efx
)
1170 return efx
->port_num
;
1173 struct efx_mtd_partition
{
1174 struct list_head node
;
1175 struct mtd_info mtd
;
1176 const char *dev_type_name
;
1177 const char *type_name
;
1178 char name
[IFNAMSIZ
+ 20];
1181 struct efx_udp_tunnel
{
1182 #define TUNNEL_ENCAP_UDP_PORT_ENTRY_INVALID 0xffff
1183 u16 type
; /* TUNNEL_ENCAP_UDP_PORT_ENTRY_foo, see mcdi_pcol.h */
1188 * struct efx_nic_type - Efx device type definition
1189 * @mem_bar: Get the memory BAR
1190 * @mem_map_size: Get memory BAR mapped size
1191 * @probe: Probe the controller
1192 * @remove: Free resources allocated by probe()
1193 * @init: Initialise the controller
1194 * @dimension_resources: Dimension controller resources (buffer table,
1195 * and VIs once the available interrupt resources are clear)
1196 * @fini: Shut down the controller
1197 * @monitor: Periodic function for polling link state and hardware monitor
1198 * @map_reset_reason: Map ethtool reset reason to a reset method
1199 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
1200 * @reset: Reset the controller hardware and possibly the PHY. This will
1201 * be called while the controller is uninitialised.
1202 * @probe_port: Probe the MAC and PHY
1203 * @remove_port: Free resources allocated by probe_port()
1204 * @handle_global_event: Handle a "global" event (may be %NULL)
1205 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues)
1206 * @prepare_flush: Prepare the hardware for flushing the DMA queues
1207 * (for Falcon architecture)
1208 * @finish_flush: Clean up after flushing the DMA queues (for Falcon
1210 * @prepare_flr: Prepare for an FLR
1211 * @finish_flr: Clean up after an FLR
1212 * @describe_stats: Describe statistics for ethtool
1213 * @update_stats: Update statistics not provided by event handling.
1214 * Either argument may be %NULL.
1215 * @start_stats: Start the regular fetching of statistics
1216 * @pull_stats: Pull stats from the NIC and wait until they arrive.
1217 * @stop_stats: Stop the regular fetching of statistics
1218 * @set_id_led: Set state of identifying LED or revert to automatic function
1219 * @push_irq_moderation: Apply interrupt moderation value
1220 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
1221 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL)
1222 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings
1223 * to the hardware. Serialised by the mac_lock.
1224 * @check_mac_fault: Check MAC fault state. True if fault present.
1225 * @get_wol: Get WoL configuration from driver state
1226 * @set_wol: Push WoL configuration to the NIC
1227 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
1228 * @test_chip: Test registers. May use efx_farch_test_registers(), and is
1229 * expected to reset the NIC.
1230 * @test_nvram: Test validity of NVRAM contents
1231 * @mcdi_request: Send an MCDI request with the given header and SDU.
1232 * The SDU length may be any value from 0 up to the protocol-
1233 * defined maximum, but its buffer will be padded to a multiple
1235 * @mcdi_poll_response: Test whether an MCDI response is available.
1236 * @mcdi_read_response: Read the MCDI response PDU. The offset will
1237 * be a multiple of 4. The length may not be, but the buffer
1238 * will be padded so it is safe to round up.
1239 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so,
1240 * return an appropriate error code for aborting any current
1241 * request; otherwise return 0.
1242 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must
1243 * be separately enabled after this.
1244 * @irq_test_generate: Generate a test IRQ
1245 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event
1246 * queue must be separately disabled before this.
1247 * @irq_handle_msi: Handle MSI for a channel. The @dev_id argument is
1248 * a pointer to the &struct efx_msi_context for the channel.
1249 * @irq_handle_legacy: Handle legacy interrupt. The @dev_id argument
1250 * is a pointer to the &struct efx_nic.
1251 * @tx_probe: Allocate resources for TX queue
1252 * @tx_init: Initialise TX queue on the NIC
1253 * @tx_remove: Free resources for TX queue
1254 * @tx_write: Write TX descriptors and doorbell
1255 * @tx_enqueue: Add an SKB to TX queue
1256 * @rx_push_rss_config: Write RSS hash key and indirection table to the NIC
1257 * @rx_pull_rss_config: Read RSS hash key and indirection table back from the NIC
1258 * @rx_push_rss_context_config: Write RSS hash key and indirection table for
1259 * user RSS context to the NIC
1260 * @rx_pull_rss_context_config: Read RSS hash key and indirection table for user
1261 * RSS context back from the NIC
1262 * @rx_probe: Allocate resources for RX queue
1263 * @rx_init: Initialise RX queue on the NIC
1264 * @rx_remove: Free resources for RX queue
1265 * @rx_write: Write RX descriptors and doorbell
1266 * @rx_defer_refill: Generate a refill reminder event
1267 * @rx_packet: Receive the queued RX buffer on a channel
1268 * @ev_probe: Allocate resources for event queue
1269 * @ev_init: Initialise event queue on the NIC
1270 * @ev_fini: Deinitialise event queue on the NIC
1271 * @ev_remove: Free resources for event queue
1272 * @ev_process: Process events for a queue, up to the given NAPI quota
1273 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ
1274 * @ev_test_generate: Generate a test event
1275 * @filter_table_probe: Probe filter capabilities and set up filter software state
1276 * @filter_table_restore: Restore filters removed from hardware
1277 * @filter_table_remove: Remove filters from hardware and tear down software state
1278 * @filter_update_rx_scatter: Update filters after change to rx scatter setting
1279 * @filter_insert: add or replace a filter
1280 * @filter_remove_safe: remove a filter by ID, carefully
1281 * @filter_get_safe: retrieve a filter by ID, carefully
1282 * @filter_clear_rx: Remove all RX filters whose priority is less than or
1283 * equal to the given priority and is not %EFX_FILTER_PRI_AUTO
1284 * @filter_count_rx_used: Get the number of filters in use at a given priority
1285 * @filter_get_rx_id_limit: Get maximum value of a filter id, plus 1
1286 * @filter_get_rx_ids: Get list of RX filters at a given priority
1287 * @filter_rfs_expire_one: Consider expiring a filter inserted for RFS.
1288 * This must check whether the specified table entry is used by RFS
1289 * and that rps_may_expire_flow() returns true for it.
1290 * @mtd_probe: Probe and add MTD partitions associated with this net device,
1291 * using efx_mtd_add()
1292 * @mtd_rename: Set an MTD partition name using the net device name
1293 * @mtd_read: Read from an MTD partition
1294 * @mtd_erase: Erase part of an MTD partition
1295 * @mtd_write: Write to an MTD partition
1296 * @mtd_sync: Wait for write-back to complete on MTD partition. This
1297 * also notifies the driver that a writer has finished using this
1299 * @ptp_write_host_time: Send host time to MC as part of sync protocol
1300 * @ptp_set_ts_sync_events: Enable or disable sync events for inline RX
1301 * timestamping, possibly only temporarily for the purposes of a reset.
1302 * @ptp_set_ts_config: Set hardware timestamp configuration. The flags
1303 * and tx_type will already have been validated but this operation
1304 * must validate and update rx_filter.
1305 * @get_phys_port_id: Get the underlying physical port id.
1306 * @set_mac_address: Set the MAC address of the device
1307 * @tso_versions: Returns mask of firmware-assisted TSO versions supported.
1308 * If %NULL, then device does not support any TSO version.
1309 * @udp_tnl_push_ports: Push the list of UDP tunnel ports to the NIC if required.
1310 * @udp_tnl_has_port: Check if a port has been added as UDP tunnel
1311 * @print_additional_fwver: Dump NIC-specific additional FW version info
1312 * @sensor_event: Handle a sensor event from MCDI
1313 * @revision: Hardware architecture revision
1314 * @txd_ptr_tbl_base: TX descriptor ring base address
1315 * @rxd_ptr_tbl_base: RX descriptor ring base address
1316 * @buf_tbl_base: Buffer table base address
1317 * @evq_ptr_tbl_base: Event queue pointer table base address
1318 * @evq_rptr_tbl_base: Event queue read-pointer table base address
1319 * @max_dma_mask: Maximum possible DMA mask
1320 * @rx_prefix_size: Size of RX prefix before packet data
1321 * @rx_hash_offset: Offset of RX flow hash within prefix
1322 * @rx_ts_offset: Offset of timestamp within prefix
1323 * @rx_buffer_padding: Size of padding at end of RX packet
1324 * @can_rx_scatter: NIC is able to scatter packets to multiple buffers
1325 * @always_rx_scatter: NIC will always scatter packets to multiple buffers
1326 * @option_descriptors: NIC supports TX option descriptors
1327 * @min_interrupt_mode: Lowest capability interrupt mode supported
1328 * from &enum efx_int_mode.
1329 * @timer_period_max: Maximum period of interrupt timer (in ticks)
1330 * @offload_features: net_device feature flags for protocol offload
1331 * features implemented in hardware
1332 * @mcdi_max_ver: Maximum MCDI version supported
1333 * @hwtstamp_filters: Mask of hardware timestamp filter types supported
1335 struct efx_nic_type
{
1337 unsigned int (*mem_bar
)(struct efx_nic
*efx
);
1338 unsigned int (*mem_map_size
)(struct efx_nic
*efx
);
1339 int (*probe
)(struct efx_nic
*efx
);
1340 void (*remove
)(struct efx_nic
*efx
);
1341 int (*init
)(struct efx_nic
*efx
);
1342 int (*dimension_resources
)(struct efx_nic
*efx
);
1343 void (*fini
)(struct efx_nic
*efx
);
1344 void (*monitor
)(struct efx_nic
*efx
);
1345 enum reset_type (*map_reset_reason
)(enum reset_type reason
);
1346 int (*map_reset_flags
)(u32
*flags
);
1347 int (*reset
)(struct efx_nic
*efx
, enum reset_type method
);
1348 int (*probe_port
)(struct efx_nic
*efx
);
1349 void (*remove_port
)(struct efx_nic
*efx
);
1350 bool (*handle_global_event
)(struct efx_channel
*channel
, efx_qword_t
*);
1351 int (*fini_dmaq
)(struct efx_nic
*efx
);
1352 void (*prepare_flush
)(struct efx_nic
*efx
);
1353 void (*finish_flush
)(struct efx_nic
*efx
);
1354 void (*prepare_flr
)(struct efx_nic
*efx
);
1355 void (*finish_flr
)(struct efx_nic
*efx
);
1356 size_t (*describe_stats
)(struct efx_nic
*efx
, u8
*names
);
1357 size_t (*update_stats
)(struct efx_nic
*efx
, u64
*full_stats
,
1358 struct rtnl_link_stats64
*core_stats
);
1359 void (*start_stats
)(struct efx_nic
*efx
);
1360 void (*pull_stats
)(struct efx_nic
*efx
);
1361 void (*stop_stats
)(struct efx_nic
*efx
);
1362 void (*set_id_led
)(struct efx_nic
*efx
, enum efx_led_mode mode
);
1363 void (*push_irq_moderation
)(struct efx_channel
*channel
);
1364 int (*reconfigure_port
)(struct efx_nic
*efx
);
1365 void (*prepare_enable_fc_tx
)(struct efx_nic
*efx
);
1366 int (*reconfigure_mac
)(struct efx_nic
*efx
, bool mtu_only
);
1367 bool (*check_mac_fault
)(struct efx_nic
*efx
);
1368 void (*get_wol
)(struct efx_nic
*efx
, struct ethtool_wolinfo
*wol
);
1369 int (*set_wol
)(struct efx_nic
*efx
, u32 type
);
1370 void (*resume_wol
)(struct efx_nic
*efx
);
1371 unsigned int (*check_caps
)(const struct efx_nic
*efx
,
1374 int (*test_chip
)(struct efx_nic
*efx
, struct efx_self_tests
*tests
);
1375 int (*test_nvram
)(struct efx_nic
*efx
);
1376 void (*mcdi_request
)(struct efx_nic
*efx
,
1377 const efx_dword_t
*hdr
, size_t hdr_len
,
1378 const efx_dword_t
*sdu
, size_t sdu_len
);
1379 bool (*mcdi_poll_response
)(struct efx_nic
*efx
);
1380 void (*mcdi_read_response
)(struct efx_nic
*efx
, efx_dword_t
*pdu
,
1381 size_t pdu_offset
, size_t pdu_len
);
1382 int (*mcdi_poll_reboot
)(struct efx_nic
*efx
);
1383 void (*mcdi_reboot_detected
)(struct efx_nic
*efx
);
1384 void (*irq_enable_master
)(struct efx_nic
*efx
);
1385 int (*irq_test_generate
)(struct efx_nic
*efx
);
1386 void (*irq_disable_non_ev
)(struct efx_nic
*efx
);
1387 irqreturn_t (*irq_handle_msi
)(int irq
, void *dev_id
);
1388 irqreturn_t (*irq_handle_legacy
)(int irq
, void *dev_id
);
1389 int (*tx_probe
)(struct efx_tx_queue
*tx_queue
);
1390 void (*tx_init
)(struct efx_tx_queue
*tx_queue
);
1391 void (*tx_remove
)(struct efx_tx_queue
*tx_queue
);
1392 void (*tx_write
)(struct efx_tx_queue
*tx_queue
);
1393 netdev_tx_t (*tx_enqueue
)(struct efx_tx_queue
*tx_queue
, struct sk_buff
*skb
);
1394 unsigned int (*tx_limit_len
)(struct efx_tx_queue
*tx_queue
,
1395 dma_addr_t dma_addr
, unsigned int len
);
1396 int (*rx_push_rss_config
)(struct efx_nic
*efx
, bool user
,
1397 const u32
*rx_indir_table
, const u8
*key
);
1398 int (*rx_pull_rss_config
)(struct efx_nic
*efx
);
1399 int (*rx_push_rss_context_config
)(struct efx_nic
*efx
,
1400 struct efx_rss_context
*ctx
,
1401 const u32
*rx_indir_table
,
1403 int (*rx_pull_rss_context_config
)(struct efx_nic
*efx
,
1404 struct efx_rss_context
*ctx
);
1405 void (*rx_restore_rss_contexts
)(struct efx_nic
*efx
);
1406 int (*rx_probe
)(struct efx_rx_queue
*rx_queue
);
1407 void (*rx_init
)(struct efx_rx_queue
*rx_queue
);
1408 void (*rx_remove
)(struct efx_rx_queue
*rx_queue
);
1409 void (*rx_write
)(struct efx_rx_queue
*rx_queue
);
1410 void (*rx_defer_refill
)(struct efx_rx_queue
*rx_queue
);
1411 void (*rx_packet
)(struct efx_channel
*channel
);
1412 int (*ev_probe
)(struct efx_channel
*channel
);
1413 int (*ev_init
)(struct efx_channel
*channel
);
1414 void (*ev_fini
)(struct efx_channel
*channel
);
1415 void (*ev_remove
)(struct efx_channel
*channel
);
1416 int (*ev_process
)(struct efx_channel
*channel
, int quota
);
1417 void (*ev_read_ack
)(struct efx_channel
*channel
);
1418 void (*ev_test_generate
)(struct efx_channel
*channel
);
1419 int (*filter_table_probe
)(struct efx_nic
*efx
);
1420 void (*filter_table_restore
)(struct efx_nic
*efx
);
1421 void (*filter_table_remove
)(struct efx_nic
*efx
);
1422 void (*filter_update_rx_scatter
)(struct efx_nic
*efx
);
1423 s32 (*filter_insert
)(struct efx_nic
*efx
,
1424 struct efx_filter_spec
*spec
, bool replace
);
1425 int (*filter_remove_safe
)(struct efx_nic
*efx
,
1426 enum efx_filter_priority priority
,
1428 int (*filter_get_safe
)(struct efx_nic
*efx
,
1429 enum efx_filter_priority priority
,
1430 u32 filter_id
, struct efx_filter_spec
*);
1431 int (*filter_clear_rx
)(struct efx_nic
*efx
,
1432 enum efx_filter_priority priority
);
1433 u32 (*filter_count_rx_used
)(struct efx_nic
*efx
,
1434 enum efx_filter_priority priority
);
1435 u32 (*filter_get_rx_id_limit
)(struct efx_nic
*efx
);
1436 s32 (*filter_get_rx_ids
)(struct efx_nic
*efx
,
1437 enum efx_filter_priority priority
,
1438 u32
*buf
, u32 size
);
1439 #ifdef CONFIG_RFS_ACCEL
1440 bool (*filter_rfs_expire_one
)(struct efx_nic
*efx
, u32 flow_id
,
1441 unsigned int index
);
1443 #ifdef CONFIG_SFC_MTD
1444 int (*mtd_probe
)(struct efx_nic
*efx
);
1445 void (*mtd_rename
)(struct efx_mtd_partition
*part
);
1446 int (*mtd_read
)(struct mtd_info
*mtd
, loff_t start
, size_t len
,
1447 size_t *retlen
, u8
*buffer
);
1448 int (*mtd_erase
)(struct mtd_info
*mtd
, loff_t start
, size_t len
);
1449 int (*mtd_write
)(struct mtd_info
*mtd
, loff_t start
, size_t len
,
1450 size_t *retlen
, const u8
*buffer
);
1451 int (*mtd_sync
)(struct mtd_info
*mtd
);
1453 void (*ptp_write_host_time
)(struct efx_nic
*efx
, u32 host_time
);
1454 int (*ptp_set_ts_sync_events
)(struct efx_nic
*efx
, bool en
, bool temp
);
1455 int (*ptp_set_ts_config
)(struct efx_nic
*efx
,
1456 struct hwtstamp_config
*init
);
1457 int (*sriov_configure
)(struct efx_nic
*efx
, int num_vfs
);
1458 int (*vlan_rx_add_vid
)(struct efx_nic
*efx
, __be16 proto
, u16 vid
);
1459 int (*vlan_rx_kill_vid
)(struct efx_nic
*efx
, __be16 proto
, u16 vid
);
1460 int (*get_phys_port_id
)(struct efx_nic
*efx
,
1461 struct netdev_phys_item_id
*ppid
);
1462 int (*sriov_init
)(struct efx_nic
*efx
);
1463 void (*sriov_fini
)(struct efx_nic
*efx
);
1464 bool (*sriov_wanted
)(struct efx_nic
*efx
);
1465 void (*sriov_reset
)(struct efx_nic
*efx
);
1466 void (*sriov_flr
)(struct efx_nic
*efx
, unsigned vf_i
);
1467 int (*sriov_set_vf_mac
)(struct efx_nic
*efx
, int vf_i
, u8
*mac
);
1468 int (*sriov_set_vf_vlan
)(struct efx_nic
*efx
, int vf_i
, u16 vlan
,
1470 int (*sriov_set_vf_spoofchk
)(struct efx_nic
*efx
, int vf_i
,
1472 int (*sriov_get_vf_config
)(struct efx_nic
*efx
, int vf_i
,
1473 struct ifla_vf_info
*ivi
);
1474 int (*sriov_set_vf_link_state
)(struct efx_nic
*efx
, int vf_i
,
1476 int (*vswitching_probe
)(struct efx_nic
*efx
);
1477 int (*vswitching_restore
)(struct efx_nic
*efx
);
1478 void (*vswitching_remove
)(struct efx_nic
*efx
);
1479 int (*get_mac_address
)(struct efx_nic
*efx
, unsigned char *perm_addr
);
1480 int (*set_mac_address
)(struct efx_nic
*efx
);
1481 u32 (*tso_versions
)(struct efx_nic
*efx
);
1482 int (*udp_tnl_push_ports
)(struct efx_nic
*efx
);
1483 bool (*udp_tnl_has_port
)(struct efx_nic
*efx
, __be16 port
);
1484 size_t (*print_additional_fwver
)(struct efx_nic
*efx
, char *buf
,
1486 void (*sensor_event
)(struct efx_nic
*efx
, efx_qword_t
*ev
);
1489 unsigned int txd_ptr_tbl_base
;
1490 unsigned int rxd_ptr_tbl_base
;
1491 unsigned int buf_tbl_base
;
1492 unsigned int evq_ptr_tbl_base
;
1493 unsigned int evq_rptr_tbl_base
;
1495 unsigned int rx_prefix_size
;
1496 unsigned int rx_hash_offset
;
1497 unsigned int rx_ts_offset
;
1498 unsigned int rx_buffer_padding
;
1499 bool can_rx_scatter
;
1500 bool always_rx_scatter
;
1501 bool option_descriptors
;
1502 unsigned int min_interrupt_mode
;
1503 unsigned int timer_period_max
;
1504 netdev_features_t offload_features
;
1506 unsigned int max_rx_ip_filters
;
1507 u32 hwtstamp_filters
;
1508 unsigned int rx_hash_key_size
;
1511 /**************************************************************************
1513 * Prototypes and inline functions
1515 *************************************************************************/
1517 static inline struct efx_channel
*
1518 efx_get_channel(struct efx_nic
*efx
, unsigned index
)
1520 EFX_WARN_ON_ONCE_PARANOID(index
>= efx
->n_channels
);
1521 return efx
->channel
[index
];
1524 /* Iterate over all used channels */
1525 #define efx_for_each_channel(_channel, _efx) \
1526 for (_channel = (_efx)->channel[0]; \
1528 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1529 (_efx)->channel[_channel->channel + 1] : NULL)
1531 /* Iterate over all used channels in reverse */
1532 #define efx_for_each_channel_rev(_channel, _efx) \
1533 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1535 _channel = _channel->channel ? \
1536 (_efx)->channel[_channel->channel - 1] : NULL)
1538 static inline struct efx_channel
*
1539 efx_get_tx_channel(struct efx_nic
*efx
, unsigned int index
)
1541 EFX_WARN_ON_ONCE_PARANOID(index
>= efx
->n_tx_channels
);
1542 return efx
->channel
[efx
->tx_channel_offset
+ index
];
1545 static inline struct efx_tx_queue
*
1546 efx_get_tx_queue(struct efx_nic
*efx
, unsigned index
, unsigned type
)
1548 EFX_WARN_ON_ONCE_PARANOID(index
>= efx
->n_tx_channels
||
1549 type
>= efx
->tx_queues_per_channel
);
1550 return &efx
->channel
[efx
->tx_channel_offset
+ index
]->tx_queue
[type
];
1553 static inline struct efx_channel
*
1554 efx_get_xdp_channel(struct efx_nic
*efx
, unsigned int index
)
1556 EFX_WARN_ON_ONCE_PARANOID(index
>= efx
->n_xdp_channels
);
1557 return efx
->channel
[efx
->xdp_channel_offset
+ index
];
1560 static inline bool efx_channel_is_xdp_tx(struct efx_channel
*channel
)
1562 return channel
->channel
- channel
->efx
->xdp_channel_offset
<
1563 channel
->efx
->n_xdp_channels
;
1566 static inline bool efx_channel_has_tx_queues(struct efx_channel
*channel
)
1571 static inline unsigned int efx_channel_num_tx_queues(struct efx_channel
*channel
)
1573 if (efx_channel_is_xdp_tx(channel
))
1574 return channel
->efx
->xdp_tx_per_channel
;
1575 return channel
->efx
->tx_queues_per_channel
;
1578 static inline struct efx_tx_queue
*
1579 efx_channel_get_tx_queue(struct efx_channel
*channel
, unsigned type
)
1581 EFX_WARN_ON_ONCE_PARANOID(type
>= efx_channel_num_tx_queues(channel
));
1582 return &channel
->tx_queue
[type
];
1585 /* Iterate over all TX queues belonging to a channel */
1586 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
1587 if (!efx_channel_has_tx_queues(_channel)) \
1590 for (_tx_queue = (_channel)->tx_queue; \
1591 _tx_queue < (_channel)->tx_queue + \
1592 efx_channel_num_tx_queues(_channel); \
1595 static inline bool efx_channel_has_rx_queue(struct efx_channel
*channel
)
1597 return channel
->rx_queue
.core_index
>= 0;
1600 static inline struct efx_rx_queue
*
1601 efx_channel_get_rx_queue(struct efx_channel
*channel
)
1603 EFX_WARN_ON_ONCE_PARANOID(!efx_channel_has_rx_queue(channel
));
1604 return &channel
->rx_queue
;
1607 /* Iterate over all RX queues belonging to a channel */
1608 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
1609 if (!efx_channel_has_rx_queue(_channel)) \
1612 for (_rx_queue = &(_channel)->rx_queue; \
1616 static inline struct efx_channel
*
1617 efx_rx_queue_channel(struct efx_rx_queue
*rx_queue
)
1619 return container_of(rx_queue
, struct efx_channel
, rx_queue
);
1622 static inline int efx_rx_queue_index(struct efx_rx_queue
*rx_queue
)
1624 return efx_rx_queue_channel(rx_queue
)->channel
;
1627 /* Returns a pointer to the specified receive buffer in the RX
1630 static inline struct efx_rx_buffer
*efx_rx_buffer(struct efx_rx_queue
*rx_queue
,
1633 return &rx_queue
->buffer
[index
];
1636 static inline struct efx_rx_buffer
*
1637 efx_rx_buf_next(struct efx_rx_queue
*rx_queue
, struct efx_rx_buffer
*rx_buf
)
1639 if (unlikely(rx_buf
== efx_rx_buffer(rx_queue
, rx_queue
->ptr_mask
)))
1640 return efx_rx_buffer(rx_queue
, 0);
1646 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1648 * This calculates the maximum frame length that will be used for a
1649 * given MTU. The frame length will be equal to the MTU plus a
1650 * constant amount of header space and padding. This is the quantity
1651 * that the net driver will program into the MAC as the maximum frame
1654 * The 10G MAC requires 8-byte alignment on the frame
1655 * length, so we round up to the nearest 8.
1657 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1658 * XGMII cycle). If the frame length reaches the maximum value in the
1659 * same cycle, the XMAC can miss the IPG altogether. We work around
1660 * this by adding a further 16 bytes.
1662 #define EFX_FRAME_PAD 16
1663 #define EFX_MAX_FRAME_LEN(mtu) \
1664 (ALIGN(((mtu) + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN + EFX_FRAME_PAD), 8))
1666 static inline bool efx_xmit_with_hwtstamp(struct sk_buff
*skb
)
1668 return skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
;
1670 static inline void efx_xmit_hwtstamp_pending(struct sk_buff
*skb
)
1672 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
1675 /* Get the max fill level of the TX queues on this channel */
1676 static inline unsigned int
1677 efx_channel_tx_fill_level(struct efx_channel
*channel
)
1679 struct efx_tx_queue
*tx_queue
;
1680 unsigned int fill_level
= 0;
1682 /* This function is currently only used by EF100, which maybe
1683 * could do something simpler and just compute the fill level
1684 * of the single TXQ that's really in use.
1686 efx_for_each_channel_tx_queue(tx_queue
, channel
)
1687 fill_level
= max(fill_level
,
1688 tx_queue
->insert_count
- tx_queue
->read_count
);
1693 /* Get all supported features.
1694 * If a feature is not fixed, it is present in hw_features.
1695 * If a feature is fixed, it does not present in hw_features, but
1696 * always in features.
1698 static inline netdev_features_t
efx_supported_features(const struct efx_nic
*efx
)
1700 const struct net_device
*net_dev
= efx
->net_dev
;
1702 return net_dev
->features
| net_dev
->hw_features
;
1705 /* Get the current TX queue insert index. */
1706 static inline unsigned int
1707 efx_tx_queue_get_insert_index(const struct efx_tx_queue
*tx_queue
)
1709 return tx_queue
->insert_count
& tx_queue
->ptr_mask
;
1712 /* Get a TX buffer. */
1713 static inline struct efx_tx_buffer
*
1714 __efx_tx_queue_get_insert_buffer(const struct efx_tx_queue
*tx_queue
)
1716 return &tx_queue
->buffer
[efx_tx_queue_get_insert_index(tx_queue
)];
1719 /* Get a TX buffer, checking it's not currently in use. */
1720 static inline struct efx_tx_buffer
*
1721 efx_tx_queue_get_insert_buffer(const struct efx_tx_queue
*tx_queue
)
1723 struct efx_tx_buffer
*buffer
=
1724 __efx_tx_queue_get_insert_buffer(tx_queue
);
1726 EFX_WARN_ON_ONCE_PARANOID(buffer
->len
);
1727 EFX_WARN_ON_ONCE_PARANOID(buffer
->flags
);
1728 EFX_WARN_ON_ONCE_PARANOID(buffer
->unmap_len
);
1733 #endif /* EFX_NET_DRIVER_H */