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Replace <asm/uaccess.h> with <linux/uaccess.h> globally
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / ethernet / sis / sis900.c
1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.10 Apr. 2 2006
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50 */
51
52 #include <linux/module.h>
53 #include <linux/moduleparam.h>
54 #include <linux/kernel.h>
55 #include <linux/sched.h>
56 #include <linux/string.h>
57 #include <linux/timer.h>
58 #include <linux/errno.h>
59 #include <linux/ioport.h>
60 #include <linux/slab.h>
61 #include <linux/interrupt.h>
62 #include <linux/pci.h>
63 #include <linux/netdevice.h>
64 #include <linux/init.h>
65 #include <linux/mii.h>
66 #include <linux/etherdevice.h>
67 #include <linux/skbuff.h>
68 #include <linux/delay.h>
69 #include <linux/ethtool.h>
70 #include <linux/crc32.h>
71 #include <linux/bitops.h>
72 #include <linux/dma-mapping.h>
73
74 #include <asm/processor.h> /* Processor type for cache alignment. */
75 #include <asm/io.h>
76 #include <asm/irq.h>
77 #include <linux/uaccess.h> /* User space memory access functions */
78
79 #include "sis900.h"
80
81 #define SIS900_MODULE_NAME "sis900"
82 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
83
84 static const char version[] =
85 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
86
87 static int max_interrupt_work = 40;
88 static int multicast_filter_limit = 128;
89
90 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
91
92 #define SIS900_DEF_MSG \
93 (NETIF_MSG_DRV | \
94 NETIF_MSG_LINK | \
95 NETIF_MSG_RX_ERR | \
96 NETIF_MSG_TX_ERR)
97
98 /* Time in jiffies before concluding the transmitter is hung. */
99 #define TX_TIMEOUT (4*HZ)
100
101 enum {
102 SIS_900 = 0,
103 SIS_7016
104 };
105 static const char * card_names[] = {
106 "SiS 900 PCI Fast Ethernet",
107 "SiS 7016 PCI Fast Ethernet"
108 };
109
110 static const struct pci_device_id sis900_pci_tbl[] = {
111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
113 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
114 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
115 {0,}
116 };
117 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
118
119 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
120
121 static const struct mii_chip_info {
122 const char * name;
123 u16 phy_id0;
124 u16 phy_id1;
125 u8 phy_types;
126 #define HOME 0x0001
127 #define LAN 0x0002
128 #define MIX 0x0003
129 #define UNKNOWN 0x0
130 } mii_chip_table[] = {
131 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
132 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
133 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
134 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
135 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
136 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
137 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
138 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
139 { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
140 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
141 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
142 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
143 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
144 {NULL,},
145 };
146
147 struct mii_phy {
148 struct mii_phy * next;
149 int phy_addr;
150 u16 phy_id0;
151 u16 phy_id1;
152 u16 status;
153 u8 phy_types;
154 };
155
156 typedef struct _BufferDesc {
157 u32 link;
158 u32 cmdsts;
159 u32 bufptr;
160 } BufferDesc;
161
162 struct sis900_private {
163 struct pci_dev * pci_dev;
164
165 spinlock_t lock;
166
167 struct mii_phy * mii;
168 struct mii_phy * first_mii; /* record the first mii structure */
169 unsigned int cur_phy;
170 struct mii_if_info mii_info;
171
172 void __iomem *ioaddr;
173
174 struct timer_list timer; /* Link status detection timer. */
175 u8 autong_complete; /* 1: auto-negotiate complete */
176
177 u32 msg_enable;
178
179 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
180 unsigned int cur_tx, dirty_tx;
181
182 /* The saved address of a sent/receive-in-place packet buffer */
183 struct sk_buff *tx_skbuff[NUM_TX_DESC];
184 struct sk_buff *rx_skbuff[NUM_RX_DESC];
185 BufferDesc *tx_ring;
186 BufferDesc *rx_ring;
187
188 dma_addr_t tx_ring_dma;
189 dma_addr_t rx_ring_dma;
190
191 unsigned int tx_full; /* The Tx queue is full. */
192 u8 host_bridge_rev;
193 u8 chipset_rev;
194 };
195
196 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
197 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
198 MODULE_LICENSE("GPL");
199
200 module_param(multicast_filter_limit, int, 0444);
201 module_param(max_interrupt_work, int, 0444);
202 module_param(sis900_debug, int, 0444);
203 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
204 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
205 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
206
207 #define sw32(reg, val) iowrite32(val, ioaddr + (reg))
208 #define sw8(reg, val) iowrite8(val, ioaddr + (reg))
209 #define sr32(reg) ioread32(ioaddr + (reg))
210 #define sr16(reg) ioread16(ioaddr + (reg))
211
212 #ifdef CONFIG_NET_POLL_CONTROLLER
213 static void sis900_poll(struct net_device *dev);
214 #endif
215 static int sis900_open(struct net_device *net_dev);
216 static int sis900_mii_probe (struct net_device * net_dev);
217 static void sis900_init_rxfilter (struct net_device * net_dev);
218 static u16 read_eeprom(void __iomem *ioaddr, int location);
219 static int mdio_read(struct net_device *net_dev, int phy_id, int location);
220 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
221 static void sis900_timer(unsigned long data);
222 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
223 static void sis900_tx_timeout(struct net_device *net_dev);
224 static void sis900_init_tx_ring(struct net_device *net_dev);
225 static void sis900_init_rx_ring(struct net_device *net_dev);
226 static netdev_tx_t sis900_start_xmit(struct sk_buff *skb,
227 struct net_device *net_dev);
228 static int sis900_rx(struct net_device *net_dev);
229 static void sis900_finish_xmit (struct net_device *net_dev);
230 static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
231 static int sis900_close(struct net_device *net_dev);
232 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
233 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
234 static void set_rx_mode(struct net_device *net_dev);
235 static void sis900_reset(struct net_device *net_dev);
236 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
237 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
238 static u16 sis900_default_phy(struct net_device * net_dev);
239 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
240 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
241 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
242 static void sis900_set_mode(struct sis900_private *, int speed, int duplex);
243 static const struct ethtool_ops sis900_ethtool_ops;
244
245 /**
246 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
247 * @pci_dev: the sis900 pci device
248 * @net_dev: the net device to get address for
249 *
250 * Older SiS900 and friends, use EEPROM to store MAC address.
251 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
252 */
253
254 static int sis900_get_mac_addr(struct pci_dev *pci_dev,
255 struct net_device *net_dev)
256 {
257 struct sis900_private *sis_priv = netdev_priv(net_dev);
258 void __iomem *ioaddr = sis_priv->ioaddr;
259 u16 signature;
260 int i;
261
262 /* check to see if we have sane EEPROM */
263 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
264 if (signature == 0xffff || signature == 0x0000) {
265 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
266 pci_name(pci_dev), signature);
267 return 0;
268 }
269
270 /* get MAC address from EEPROM */
271 for (i = 0; i < 3; i++)
272 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
273
274 return 1;
275 }
276
277 /**
278 * sis630e_get_mac_addr - Get MAC address for SiS630E model
279 * @pci_dev: the sis900 pci device
280 * @net_dev: the net device to get address for
281 *
282 * SiS630E model, use APC CMOS RAM to store MAC address.
283 * APC CMOS RAM is accessed through ISA bridge.
284 * MAC address is read into @net_dev->dev_addr.
285 */
286
287 static int sis630e_get_mac_addr(struct pci_dev *pci_dev,
288 struct net_device *net_dev)
289 {
290 struct pci_dev *isa_bridge = NULL;
291 u8 reg;
292 int i;
293
294 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
295 if (!isa_bridge)
296 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
297 if (!isa_bridge) {
298 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
299 pci_name(pci_dev));
300 return 0;
301 }
302 pci_read_config_byte(isa_bridge, 0x48, &reg);
303 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
304
305 for (i = 0; i < 6; i++) {
306 outb(0x09 + i, 0x70);
307 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
308 }
309
310 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
311 pci_dev_put(isa_bridge);
312
313 return 1;
314 }
315
316
317 /**
318 * sis635_get_mac_addr - Get MAC address for SIS635 model
319 * @pci_dev: the sis900 pci device
320 * @net_dev: the net device to get address for
321 *
322 * SiS635 model, set MAC Reload Bit to load Mac address from APC
323 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
324 * @net_dev->dev_addr.
325 */
326
327 static int sis635_get_mac_addr(struct pci_dev *pci_dev,
328 struct net_device *net_dev)
329 {
330 struct sis900_private *sis_priv = netdev_priv(net_dev);
331 void __iomem *ioaddr = sis_priv->ioaddr;
332 u32 rfcrSave;
333 u32 i;
334
335 rfcrSave = sr32(rfcr);
336
337 sw32(cr, rfcrSave | RELOAD);
338 sw32(cr, 0);
339
340 /* disable packet filtering before setting filter */
341 sw32(rfcr, rfcrSave & ~RFEN);
342
343 /* load MAC addr to filter data register */
344 for (i = 0 ; i < 3 ; i++) {
345 sw32(rfcr, (i << RFADDR_shift));
346 *( ((u16 *)net_dev->dev_addr) + i) = sr16(rfdr);
347 }
348
349 /* enable packet filtering */
350 sw32(rfcr, rfcrSave | RFEN);
351
352 return 1;
353 }
354
355 /**
356 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
357 * @pci_dev: the sis900 pci device
358 * @net_dev: the net device to get address for
359 *
360 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
361 * is shared by
362 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
363 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
364 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
365 * EEDONE signal to refuse EEPROM access by LAN.
366 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
367 * The signature field in SiS962 or SiS963 spec is meaningless.
368 * MAC address is read into @net_dev->dev_addr.
369 */
370
371 static int sis96x_get_mac_addr(struct pci_dev *pci_dev,
372 struct net_device *net_dev)
373 {
374 struct sis900_private *sis_priv = netdev_priv(net_dev);
375 void __iomem *ioaddr = sis_priv->ioaddr;
376 int wait, rc = 0;
377
378 sw32(mear, EEREQ);
379 for (wait = 0; wait < 2000; wait++) {
380 if (sr32(mear) & EEGNT) {
381 u16 *mac = (u16 *)net_dev->dev_addr;
382 int i;
383
384 /* get MAC address from EEPROM */
385 for (i = 0; i < 3; i++)
386 mac[i] = read_eeprom(ioaddr, i + EEPROMMACAddr);
387
388 rc = 1;
389 break;
390 }
391 udelay(1);
392 }
393 sw32(mear, EEDONE);
394 return rc;
395 }
396
397 static const struct net_device_ops sis900_netdev_ops = {
398 .ndo_open = sis900_open,
399 .ndo_stop = sis900_close,
400 .ndo_start_xmit = sis900_start_xmit,
401 .ndo_set_config = sis900_set_config,
402 .ndo_set_rx_mode = set_rx_mode,
403 .ndo_validate_addr = eth_validate_addr,
404 .ndo_set_mac_address = eth_mac_addr,
405 .ndo_do_ioctl = mii_ioctl,
406 .ndo_tx_timeout = sis900_tx_timeout,
407 #ifdef CONFIG_NET_POLL_CONTROLLER
408 .ndo_poll_controller = sis900_poll,
409 #endif
410 };
411
412 /**
413 * sis900_probe - Probe for sis900 device
414 * @pci_dev: the sis900 pci device
415 * @pci_id: the pci device ID
416 *
417 * Check and probe sis900 net device for @pci_dev.
418 * Get mac address according to the chip revision,
419 * and assign SiS900-specific entries in the device structure.
420 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
421 */
422
423 static int sis900_probe(struct pci_dev *pci_dev,
424 const struct pci_device_id *pci_id)
425 {
426 struct sis900_private *sis_priv;
427 struct net_device *net_dev;
428 struct pci_dev *dev;
429 dma_addr_t ring_dma;
430 void *ring_space;
431 void __iomem *ioaddr;
432 int i, ret;
433 const char *card_name = card_names[pci_id->driver_data];
434 const char *dev_name = pci_name(pci_dev);
435
436 /* when built into the kernel, we only print version if device is found */
437 #ifndef MODULE
438 static int printed_version;
439 if (!printed_version++)
440 printk(version);
441 #endif
442
443 /* setup various bits in PCI command register */
444 ret = pci_enable_device(pci_dev);
445 if(ret) return ret;
446
447 i = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
448 if(i){
449 printk(KERN_ERR "sis900.c: architecture does not support "
450 "32bit PCI busmaster DMA\n");
451 return i;
452 }
453
454 pci_set_master(pci_dev);
455
456 net_dev = alloc_etherdev(sizeof(struct sis900_private));
457 if (!net_dev)
458 return -ENOMEM;
459 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
460
461 /* We do a request_region() to register /proc/ioports info. */
462 ret = pci_request_regions(pci_dev, "sis900");
463 if (ret)
464 goto err_out;
465
466 /* IO region. */
467 ioaddr = pci_iomap(pci_dev, 0, 0);
468 if (!ioaddr) {
469 ret = -ENOMEM;
470 goto err_out_cleardev;
471 }
472
473 sis_priv = netdev_priv(net_dev);
474 sis_priv->ioaddr = ioaddr;
475 sis_priv->pci_dev = pci_dev;
476 spin_lock_init(&sis_priv->lock);
477
478 pci_set_drvdata(pci_dev, net_dev);
479
480 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
481 if (!ring_space) {
482 ret = -ENOMEM;
483 goto err_out_unmap;
484 }
485 sis_priv->tx_ring = ring_space;
486 sis_priv->tx_ring_dma = ring_dma;
487
488 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
489 if (!ring_space) {
490 ret = -ENOMEM;
491 goto err_unmap_tx;
492 }
493 sis_priv->rx_ring = ring_space;
494 sis_priv->rx_ring_dma = ring_dma;
495
496 /* The SiS900-specific entries in the device structure. */
497 net_dev->netdev_ops = &sis900_netdev_ops;
498 net_dev->watchdog_timeo = TX_TIMEOUT;
499 net_dev->ethtool_ops = &sis900_ethtool_ops;
500
501 if (sis900_debug > 0)
502 sis_priv->msg_enable = sis900_debug;
503 else
504 sis_priv->msg_enable = SIS900_DEF_MSG;
505
506 sis_priv->mii_info.dev = net_dev;
507 sis_priv->mii_info.mdio_read = mdio_read;
508 sis_priv->mii_info.mdio_write = mdio_write;
509 sis_priv->mii_info.phy_id_mask = 0x1f;
510 sis_priv->mii_info.reg_num_mask = 0x1f;
511
512 /* Get Mac address according to the chip revision */
513 sis_priv->chipset_rev = pci_dev->revision;
514 if(netif_msg_probe(sis_priv))
515 printk(KERN_DEBUG "%s: detected revision %2.2x, "
516 "trying to get MAC address...\n",
517 dev_name, sis_priv->chipset_rev);
518
519 ret = 0;
520 if (sis_priv->chipset_rev == SIS630E_900_REV)
521 ret = sis630e_get_mac_addr(pci_dev, net_dev);
522 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
523 ret = sis635_get_mac_addr(pci_dev, net_dev);
524 else if (sis_priv->chipset_rev == SIS96x_900_REV)
525 ret = sis96x_get_mac_addr(pci_dev, net_dev);
526 else
527 ret = sis900_get_mac_addr(pci_dev, net_dev);
528
529 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) {
530 eth_hw_addr_random(net_dev);
531 printk(KERN_WARNING "%s: Unreadable or invalid MAC address,"
532 "using random generated one\n", dev_name);
533 }
534
535 /* 630ET : set the mii access mode as software-mode */
536 if (sis_priv->chipset_rev == SIS630ET_900_REV)
537 sw32(cr, ACCESSMODE | sr32(cr));
538
539 /* probe for mii transceiver */
540 if (sis900_mii_probe(net_dev) == 0) {
541 printk(KERN_WARNING "%s: Error probing MII device.\n",
542 dev_name);
543 ret = -ENODEV;
544 goto err_unmap_rx;
545 }
546
547 /* save our host bridge revision */
548 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
549 if (dev) {
550 sis_priv->host_bridge_rev = dev->revision;
551 pci_dev_put(dev);
552 }
553
554 ret = register_netdev(net_dev);
555 if (ret)
556 goto err_unmap_rx;
557
558 /* print some information about our NIC */
559 printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n",
560 net_dev->name, card_name, ioaddr, pci_dev->irq,
561 net_dev->dev_addr);
562
563 /* Detect Wake on Lan support */
564 ret = (sr32(CFGPMC) & PMESP) >> 27;
565 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
566 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
567
568 return 0;
569
570 err_unmap_rx:
571 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
572 sis_priv->rx_ring_dma);
573 err_unmap_tx:
574 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
575 sis_priv->tx_ring_dma);
576 err_out_unmap:
577 pci_iounmap(pci_dev, ioaddr);
578 err_out_cleardev:
579 pci_release_regions(pci_dev);
580 err_out:
581 free_netdev(net_dev);
582 return ret;
583 }
584
585 /**
586 * sis900_mii_probe - Probe MII PHY for sis900
587 * @net_dev: the net device to probe for
588 *
589 * Search for total of 32 possible mii phy addresses.
590 * Identify and set current phy if found one,
591 * return error if it failed to found.
592 */
593
594 static int sis900_mii_probe(struct net_device *net_dev)
595 {
596 struct sis900_private *sis_priv = netdev_priv(net_dev);
597 const char *dev_name = pci_name(sis_priv->pci_dev);
598 u16 poll_bit = MII_STAT_LINK, status = 0;
599 unsigned long timeout = jiffies + 5 * HZ;
600 int phy_addr;
601
602 sis_priv->mii = NULL;
603
604 /* search for total of 32 possible mii phy addresses */
605 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
606 struct mii_phy * mii_phy = NULL;
607 u16 mii_status;
608 int i;
609
610 mii_phy = NULL;
611 for(i = 0; i < 2; i++)
612 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
613
614 if (mii_status == 0xffff || mii_status == 0x0000) {
615 if (netif_msg_probe(sis_priv))
616 printk(KERN_DEBUG "%s: MII at address %d"
617 " not accessible\n",
618 dev_name, phy_addr);
619 continue;
620 }
621
622 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
623 mii_phy = sis_priv->first_mii;
624 while (mii_phy) {
625 struct mii_phy *phy;
626 phy = mii_phy;
627 mii_phy = mii_phy->next;
628 kfree(phy);
629 }
630 return 0;
631 }
632
633 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
634 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
635 mii_phy->phy_addr = phy_addr;
636 mii_phy->status = mii_status;
637 mii_phy->next = sis_priv->mii;
638 sis_priv->mii = mii_phy;
639 sis_priv->first_mii = mii_phy;
640
641 for (i = 0; mii_chip_table[i].phy_id1; i++)
642 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
643 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
644 mii_phy->phy_types = mii_chip_table[i].phy_types;
645 if (mii_chip_table[i].phy_types == MIX)
646 mii_phy->phy_types =
647 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
648 printk(KERN_INFO "%s: %s transceiver found "
649 "at address %d.\n",
650 dev_name,
651 mii_chip_table[i].name,
652 phy_addr);
653 break;
654 }
655
656 if( !mii_chip_table[i].phy_id1 ) {
657 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
658 dev_name, phy_addr);
659 mii_phy->phy_types = UNKNOWN;
660 }
661 }
662
663 if (sis_priv->mii == NULL) {
664 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
665 return 0;
666 }
667
668 /* select default PHY for mac */
669 sis_priv->mii = NULL;
670 sis900_default_phy( net_dev );
671
672 /* Reset phy if default phy is internal sis900 */
673 if ((sis_priv->mii->phy_id0 == 0x001D) &&
674 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
675 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
676
677 /* workaround for ICS1893 PHY */
678 if ((sis_priv->mii->phy_id0 == 0x0015) &&
679 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
680 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
681
682 if(status & MII_STAT_LINK){
683 while (poll_bit) {
684 yield();
685
686 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
687 if (time_after_eq(jiffies, timeout)) {
688 printk(KERN_WARNING "%s: reset phy and link down now\n",
689 dev_name);
690 return -ETIME;
691 }
692 }
693 }
694
695 if (sis_priv->chipset_rev == SIS630E_900_REV) {
696 /* SiS 630E has some bugs on default value of PHY registers */
697 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
698 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
699 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
700 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
701 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
702 }
703
704 if (sis_priv->mii->status & MII_STAT_LINK)
705 netif_carrier_on(net_dev);
706 else
707 netif_carrier_off(net_dev);
708
709 return 1;
710 }
711
712 /**
713 * sis900_default_phy - Select default PHY for sis900 mac.
714 * @net_dev: the net device to probe for
715 *
716 * Select first detected PHY with link as default.
717 * If no one is link on, select PHY whose types is HOME as default.
718 * If HOME doesn't exist, select LAN.
719 */
720
721 static u16 sis900_default_phy(struct net_device * net_dev)
722 {
723 struct sis900_private *sis_priv = netdev_priv(net_dev);
724 struct mii_phy *phy = NULL, *phy_home = NULL,
725 *default_phy = NULL, *phy_lan = NULL;
726 u16 status;
727
728 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
729 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
730 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
731
732 /* Link ON & Not select default PHY & not ghost PHY */
733 if ((status & MII_STAT_LINK) && !default_phy &&
734 (phy->phy_types != UNKNOWN))
735 default_phy = phy;
736 else {
737 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
738 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
739 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
740 if (phy->phy_types == HOME)
741 phy_home = phy;
742 else if(phy->phy_types == LAN)
743 phy_lan = phy;
744 }
745 }
746
747 if (!default_phy && phy_home)
748 default_phy = phy_home;
749 else if (!default_phy && phy_lan)
750 default_phy = phy_lan;
751 else if (!default_phy)
752 default_phy = sis_priv->first_mii;
753
754 if (sis_priv->mii != default_phy) {
755 sis_priv->mii = default_phy;
756 sis_priv->cur_phy = default_phy->phy_addr;
757 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
758 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
759 }
760
761 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
762
763 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
764 status &= (~MII_CNTL_ISOLATE);
765
766 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
767 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
768 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
769
770 return status;
771 }
772
773
774 /**
775 * sis900_set_capability - set the media capability of network adapter.
776 * @net_dev : the net device to probe for
777 * @phy : default PHY
778 *
779 * Set the media capability of network adapter according to
780 * mii status register. It's necessary before auto-negotiate.
781 */
782
783 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
784 {
785 u16 cap;
786 u16 status;
787
788 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
789 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
790
791 cap = MII_NWAY_CSMA_CD |
792 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
793 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
794 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
795 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
796
797 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
798 }
799
800
801 /* Delay between EEPROM clock transitions. */
802 #define eeprom_delay() sr32(mear)
803
804 /**
805 * read_eeprom - Read Serial EEPROM
806 * @ioaddr: base i/o address
807 * @location: the EEPROM location to read
808 *
809 * Read Serial EEPROM through EEPROM Access Register.
810 * Note that location is in word (16 bits) unit
811 */
812
813 static u16 read_eeprom(void __iomem *ioaddr, int location)
814 {
815 u32 read_cmd = location | EEread;
816 int i;
817 u16 retval = 0;
818
819 sw32(mear, 0);
820 eeprom_delay();
821 sw32(mear, EECS);
822 eeprom_delay();
823
824 /* Shift the read command (9) bits out. */
825 for (i = 8; i >= 0; i--) {
826 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
827
828 sw32(mear, dataval);
829 eeprom_delay();
830 sw32(mear, dataval | EECLK);
831 eeprom_delay();
832 }
833 sw32(mear, EECS);
834 eeprom_delay();
835
836 /* read the 16-bits data in */
837 for (i = 16; i > 0; i--) {
838 sw32(mear, EECS);
839 eeprom_delay();
840 sw32(mear, EECS | EECLK);
841 eeprom_delay();
842 retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0);
843 eeprom_delay();
844 }
845
846 /* Terminate the EEPROM access. */
847 sw32(mear, 0);
848 eeprom_delay();
849
850 return retval;
851 }
852
853 /* Read and write the MII management registers using software-generated
854 serial MDIO protocol. Note that the command bits and data bits are
855 send out separately */
856 #define mdio_delay() sr32(mear)
857
858 static void mdio_idle(struct sis900_private *sp)
859 {
860 void __iomem *ioaddr = sp->ioaddr;
861
862 sw32(mear, MDIO | MDDIR);
863 mdio_delay();
864 sw32(mear, MDIO | MDDIR | MDC);
865 }
866
867 /* Synchronize the MII management interface by shifting 32 one bits out. */
868 static void mdio_reset(struct sis900_private *sp)
869 {
870 void __iomem *ioaddr = sp->ioaddr;
871 int i;
872
873 for (i = 31; i >= 0; i--) {
874 sw32(mear, MDDIR | MDIO);
875 mdio_delay();
876 sw32(mear, MDDIR | MDIO | MDC);
877 mdio_delay();
878 }
879 }
880
881 /**
882 * mdio_read - read MII PHY register
883 * @net_dev: the net device to read
884 * @phy_id: the phy address to read
885 * @location: the phy regiester id to read
886 *
887 * Read MII registers through MDIO and MDC
888 * using MDIO management frame structure and protocol(defined by ISO/IEC).
889 * Please see SiS7014 or ICS spec
890 */
891
892 static int mdio_read(struct net_device *net_dev, int phy_id, int location)
893 {
894 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
895 struct sis900_private *sp = netdev_priv(net_dev);
896 void __iomem *ioaddr = sp->ioaddr;
897 u16 retval = 0;
898 int i;
899
900 mdio_reset(sp);
901 mdio_idle(sp);
902
903 for (i = 15; i >= 0; i--) {
904 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
905
906 sw32(mear, dataval);
907 mdio_delay();
908 sw32(mear, dataval | MDC);
909 mdio_delay();
910 }
911
912 /* Read the 16 data bits. */
913 for (i = 16; i > 0; i--) {
914 sw32(mear, 0);
915 mdio_delay();
916 retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0);
917 sw32(mear, MDC);
918 mdio_delay();
919 }
920 sw32(mear, 0x00);
921
922 return retval;
923 }
924
925 /**
926 * mdio_write - write MII PHY register
927 * @net_dev: the net device to write
928 * @phy_id: the phy address to write
929 * @location: the phy regiester id to write
930 * @value: the register value to write with
931 *
932 * Write MII registers with @value through MDIO and MDC
933 * using MDIO management frame structure and protocol(defined by ISO/IEC)
934 * please see SiS7014 or ICS spec
935 */
936
937 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
938 int value)
939 {
940 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
941 struct sis900_private *sp = netdev_priv(net_dev);
942 void __iomem *ioaddr = sp->ioaddr;
943 int i;
944
945 mdio_reset(sp);
946 mdio_idle(sp);
947
948 /* Shift the command bits out. */
949 for (i = 15; i >= 0; i--) {
950 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
951
952 sw8(mear, dataval);
953 mdio_delay();
954 sw8(mear, dataval | MDC);
955 mdio_delay();
956 }
957 mdio_delay();
958
959 /* Shift the value bits out. */
960 for (i = 15; i >= 0; i--) {
961 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
962
963 sw32(mear, dataval);
964 mdio_delay();
965 sw32(mear, dataval | MDC);
966 mdio_delay();
967 }
968 mdio_delay();
969
970 /* Clear out extra bits. */
971 for (i = 2; i > 0; i--) {
972 sw8(mear, 0);
973 mdio_delay();
974 sw8(mear, MDC);
975 mdio_delay();
976 }
977 sw32(mear, 0x00);
978 }
979
980
981 /**
982 * sis900_reset_phy - reset sis900 mii phy.
983 * @net_dev: the net device to write
984 * @phy_addr: default phy address
985 *
986 * Some specific phy can't work properly without reset.
987 * This function will be called during initialization and
988 * link status change from ON to DOWN.
989 */
990
991 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
992 {
993 int i;
994 u16 status;
995
996 for (i = 0; i < 2; i++)
997 status = mdio_read(net_dev, phy_addr, MII_STATUS);
998
999 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
1000
1001 return status;
1002 }
1003
1004 #ifdef CONFIG_NET_POLL_CONTROLLER
1005 /*
1006 * Polling 'interrupt' - used by things like netconsole to send skbs
1007 * without having to re-enable interrupts. It's not called while
1008 * the interrupt routine is executing.
1009 */
1010 static void sis900_poll(struct net_device *dev)
1011 {
1012 struct sis900_private *sp = netdev_priv(dev);
1013 const int irq = sp->pci_dev->irq;
1014
1015 disable_irq(irq);
1016 sis900_interrupt(irq, dev);
1017 enable_irq(irq);
1018 }
1019 #endif
1020
1021 /**
1022 * sis900_open - open sis900 device
1023 * @net_dev: the net device to open
1024 *
1025 * Do some initialization and start net interface.
1026 * enable interrupts and set sis900 timer.
1027 */
1028
1029 static int
1030 sis900_open(struct net_device *net_dev)
1031 {
1032 struct sis900_private *sis_priv = netdev_priv(net_dev);
1033 void __iomem *ioaddr = sis_priv->ioaddr;
1034 int ret;
1035
1036 /* Soft reset the chip. */
1037 sis900_reset(net_dev);
1038
1039 /* Equalizer workaround Rule */
1040 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1041
1042 ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED,
1043 net_dev->name, net_dev);
1044 if (ret)
1045 return ret;
1046
1047 sis900_init_rxfilter(net_dev);
1048
1049 sis900_init_tx_ring(net_dev);
1050 sis900_init_rx_ring(net_dev);
1051
1052 set_rx_mode(net_dev);
1053
1054 netif_start_queue(net_dev);
1055
1056 /* Workaround for EDB */
1057 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1058
1059 /* Enable all known interrupts by setting the interrupt mask. */
1060 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
1061 sw32(cr, RxENA | sr32(cr));
1062 sw32(ier, IE);
1063
1064 sis900_check_mode(net_dev, sis_priv->mii);
1065
1066 /* Set the timer to switch to check for link beat and perhaps switch
1067 to an alternate media type. */
1068 init_timer(&sis_priv->timer);
1069 sis_priv->timer.expires = jiffies + HZ;
1070 sis_priv->timer.data = (unsigned long)net_dev;
1071 sis_priv->timer.function = sis900_timer;
1072 add_timer(&sis_priv->timer);
1073
1074 return 0;
1075 }
1076
1077 /**
1078 * sis900_init_rxfilter - Initialize the Rx filter
1079 * @net_dev: the net device to initialize for
1080 *
1081 * Set receive filter address to our MAC address
1082 * and enable packet filtering.
1083 */
1084
1085 static void
1086 sis900_init_rxfilter (struct net_device * net_dev)
1087 {
1088 struct sis900_private *sis_priv = netdev_priv(net_dev);
1089 void __iomem *ioaddr = sis_priv->ioaddr;
1090 u32 rfcrSave;
1091 u32 i;
1092
1093 rfcrSave = sr32(rfcr);
1094
1095 /* disable packet filtering before setting filter */
1096 sw32(rfcr, rfcrSave & ~RFEN);
1097
1098 /* load MAC addr to filter data register */
1099 for (i = 0 ; i < 3 ; i++) {
1100 u32 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1101
1102 sw32(rfcr, i << RFADDR_shift);
1103 sw32(rfdr, w);
1104
1105 if (netif_msg_hw(sis_priv)) {
1106 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1107 net_dev->name, i, sr32(rfdr));
1108 }
1109 }
1110
1111 /* enable packet filtering */
1112 sw32(rfcr, rfcrSave | RFEN);
1113 }
1114
1115 /**
1116 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1117 * @net_dev: the net device to initialize for
1118 *
1119 * Initialize the Tx descriptor ring,
1120 */
1121
1122 static void
1123 sis900_init_tx_ring(struct net_device *net_dev)
1124 {
1125 struct sis900_private *sis_priv = netdev_priv(net_dev);
1126 void __iomem *ioaddr = sis_priv->ioaddr;
1127 int i;
1128
1129 sis_priv->tx_full = 0;
1130 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1131
1132 for (i = 0; i < NUM_TX_DESC; i++) {
1133 sis_priv->tx_skbuff[i] = NULL;
1134
1135 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1136 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1137 sis_priv->tx_ring[i].cmdsts = 0;
1138 sis_priv->tx_ring[i].bufptr = 0;
1139 }
1140
1141 /* load Transmit Descriptor Register */
1142 sw32(txdp, sis_priv->tx_ring_dma);
1143 if (netif_msg_hw(sis_priv))
1144 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1145 net_dev->name, sr32(txdp));
1146 }
1147
1148 /**
1149 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1150 * @net_dev: the net device to initialize for
1151 *
1152 * Initialize the Rx descriptor ring,
1153 * and pre-allocate recevie buffers (socket buffer)
1154 */
1155
1156 static void
1157 sis900_init_rx_ring(struct net_device *net_dev)
1158 {
1159 struct sis900_private *sis_priv = netdev_priv(net_dev);
1160 void __iomem *ioaddr = sis_priv->ioaddr;
1161 int i;
1162
1163 sis_priv->cur_rx = 0;
1164 sis_priv->dirty_rx = 0;
1165
1166 /* init RX descriptor */
1167 for (i = 0; i < NUM_RX_DESC; i++) {
1168 sis_priv->rx_skbuff[i] = NULL;
1169
1170 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1171 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1172 sis_priv->rx_ring[i].cmdsts = 0;
1173 sis_priv->rx_ring[i].bufptr = 0;
1174 }
1175
1176 /* allocate sock buffers */
1177 for (i = 0; i < NUM_RX_DESC; i++) {
1178 struct sk_buff *skb;
1179
1180 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1181 /* not enough memory for skbuff, this makes a "hole"
1182 on the buffer ring, it is not clear how the
1183 hardware will react to this kind of degenerated
1184 buffer */
1185 break;
1186 }
1187 sis_priv->rx_skbuff[i] = skb;
1188 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1189 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1190 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1191 if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev,
1192 sis_priv->rx_ring[i].bufptr))) {
1193 dev_kfree_skb(skb);
1194 sis_priv->rx_skbuff[i] = NULL;
1195 break;
1196 }
1197 }
1198 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1199
1200 /* load Receive Descriptor Register */
1201 sw32(rxdp, sis_priv->rx_ring_dma);
1202 if (netif_msg_hw(sis_priv))
1203 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1204 net_dev->name, sr32(rxdp));
1205 }
1206
1207 /**
1208 * sis630_set_eq - set phy equalizer value for 630 LAN
1209 * @net_dev: the net device to set equalizer value
1210 * @revision: 630 LAN revision number
1211 *
1212 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1213 * PHY register 14h(Test)
1214 * Bit 14: 0 -- Automatically detect (default)
1215 * 1 -- Manually set Equalizer filter
1216 * Bit 13: 0 -- (Default)
1217 * 1 -- Speed up convergence of equalizer setting
1218 * Bit 9 : 0 -- (Default)
1219 * 1 -- Disable Baseline Wander
1220 * Bit 3~7 -- Equalizer filter setting
1221 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1222 * Then calculate equalizer value
1223 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1224 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1225 * Calculate Equalizer value:
1226 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value.
1227 * When the equalizer is stable, this value is not a fixed value. It will be within
1228 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1229 * 0 <= max <= 4 --> set equalizer to max
1230 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1231 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1232 */
1233
1234 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1235 {
1236 struct sis900_private *sis_priv = netdev_priv(net_dev);
1237 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1238 int i, maxcount=10;
1239
1240 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1241 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1242 return;
1243
1244 if (netif_carrier_ok(net_dev)) {
1245 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1246 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1247 (0x2200 | reg14h) & 0xBFFF);
1248 for (i=0; i < maxcount; i++) {
1249 eq_value = (0x00F8 & mdio_read(net_dev,
1250 sis_priv->cur_phy, MII_RESV)) >> 3;
1251 if (i == 0)
1252 max_value=min_value=eq_value;
1253 max_value = (eq_value > max_value) ?
1254 eq_value : max_value;
1255 min_value = (eq_value < min_value) ?
1256 eq_value : min_value;
1257 }
1258 /* 630E rule to determine the equalizer value */
1259 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1260 revision == SIS630ET_900_REV) {
1261 if (max_value < 5)
1262 eq_value = max_value;
1263 else if (max_value >= 5 && max_value < 15)
1264 eq_value = (max_value == min_value) ?
1265 max_value+2 : max_value+1;
1266 else if (max_value >= 15)
1267 eq_value=(max_value == min_value) ?
1268 max_value+6 : max_value+5;
1269 }
1270 /* 630B0&B1 rule to determine the equalizer value */
1271 if (revision == SIS630A_900_REV &&
1272 (sis_priv->host_bridge_rev == SIS630B0 ||
1273 sis_priv->host_bridge_rev == SIS630B1)) {
1274 if (max_value == 0)
1275 eq_value = 3;
1276 else
1277 eq_value = (max_value + min_value + 1)/2;
1278 }
1279 /* write equalizer value and setting */
1280 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1281 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1282 reg14h = (reg14h | 0x6000) & 0xFDFF;
1283 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1284 } else {
1285 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1286 if (revision == SIS630A_900_REV &&
1287 (sis_priv->host_bridge_rev == SIS630B0 ||
1288 sis_priv->host_bridge_rev == SIS630B1))
1289 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1290 (reg14h | 0x2200) & 0xBFFF);
1291 else
1292 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1293 (reg14h | 0x2000) & 0xBFFF);
1294 }
1295 }
1296
1297 /**
1298 * sis900_timer - sis900 timer routine
1299 * @data: pointer to sis900 net device
1300 *
1301 * On each timer ticks we check two things,
1302 * link status (ON/OFF) and link mode (10/100/Full/Half)
1303 */
1304
1305 static void sis900_timer(unsigned long data)
1306 {
1307 struct net_device *net_dev = (struct net_device *)data;
1308 struct sis900_private *sis_priv = netdev_priv(net_dev);
1309 struct mii_phy *mii_phy = sis_priv->mii;
1310 static const int next_tick = 5*HZ;
1311 int speed = 0, duplex = 0;
1312 u16 status;
1313
1314 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1315 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1316
1317 /* Link OFF -> ON */
1318 if (!netif_carrier_ok(net_dev)) {
1319 LookForLink:
1320 /* Search for new PHY */
1321 status = sis900_default_phy(net_dev);
1322 mii_phy = sis_priv->mii;
1323
1324 if (status & MII_STAT_LINK) {
1325 WARN_ON(!(status & MII_STAT_AUTO_DONE));
1326
1327 sis900_read_mode(net_dev, &speed, &duplex);
1328 if (duplex) {
1329 sis900_set_mode(sis_priv, speed, duplex);
1330 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1331 netif_carrier_on(net_dev);
1332 }
1333 }
1334 } else {
1335 /* Link ON -> OFF */
1336 if (!(status & MII_STAT_LINK)){
1337 netif_carrier_off(net_dev);
1338 if(netif_msg_link(sis_priv))
1339 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1340
1341 /* Change mode issue */
1342 if ((mii_phy->phy_id0 == 0x001D) &&
1343 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1344 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1345
1346 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1347
1348 goto LookForLink;
1349 }
1350 }
1351
1352 sis_priv->timer.expires = jiffies + next_tick;
1353 add_timer(&sis_priv->timer);
1354 }
1355
1356 /**
1357 * sis900_check_mode - check the media mode for sis900
1358 * @net_dev: the net device to be checked
1359 * @mii_phy: the mii phy
1360 *
1361 * Older driver gets the media mode from mii status output
1362 * register. Now we set our media capability and auto-negotiate
1363 * to get the upper bound of speed and duplex between two ends.
1364 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1365 * and autong_complete should be set to 1.
1366 */
1367
1368 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1369 {
1370 struct sis900_private *sis_priv = netdev_priv(net_dev);
1371 void __iomem *ioaddr = sis_priv->ioaddr;
1372 int speed, duplex;
1373
1374 if (mii_phy->phy_types == LAN) {
1375 sw32(cfg, ~EXD & sr32(cfg));
1376 sis900_set_capability(net_dev , mii_phy);
1377 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1378 } else {
1379 sw32(cfg, EXD | sr32(cfg));
1380 speed = HW_SPEED_HOME;
1381 duplex = FDX_CAPABLE_HALF_SELECTED;
1382 sis900_set_mode(sis_priv, speed, duplex);
1383 sis_priv->autong_complete = 1;
1384 }
1385 }
1386
1387 /**
1388 * sis900_set_mode - Set the media mode of mac register.
1389 * @sp: the device private data
1390 * @speed : the transmit speed to be determined
1391 * @duplex: the duplex mode to be determined
1392 *
1393 * Set the media mode of mac register txcfg/rxcfg according to
1394 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1395 * bus is used instead of PCI bus. When this bit is set 1, the
1396 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1397 * double words.
1398 */
1399
1400 static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex)
1401 {
1402 void __iomem *ioaddr = sp->ioaddr;
1403 u32 tx_flags = 0, rx_flags = 0;
1404
1405 if (sr32( cfg) & EDB_MASTER_EN) {
1406 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1407 (TX_FILL_THRESH << TxFILLT_shift);
1408 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1409 } else {
1410 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1411 (TX_FILL_THRESH << TxFILLT_shift);
1412 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1413 }
1414
1415 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1416 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1417 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1418 } else {
1419 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1420 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1421 }
1422
1423 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1424 tx_flags |= (TxCSI | TxHBI);
1425 rx_flags |= RxATX;
1426 }
1427
1428 #if IS_ENABLED(CONFIG_VLAN_8021Q)
1429 /* Can accept Jumbo packet */
1430 rx_flags |= RxAJAB;
1431 #endif
1432
1433 sw32(txcfg, tx_flags);
1434 sw32(rxcfg, rx_flags);
1435 }
1436
1437 /**
1438 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1439 * @net_dev: the net device to read mode for
1440 * @phy_addr: mii phy address
1441 *
1442 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1443 * autong_complete should be set to 0 when starting auto-negotiation.
1444 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1445 * sis900_timer will wait for link on again if autong_complete = 0.
1446 */
1447
1448 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1449 {
1450 struct sis900_private *sis_priv = netdev_priv(net_dev);
1451 int i = 0;
1452 u32 status;
1453
1454 for (i = 0; i < 2; i++)
1455 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1456
1457 if (!(status & MII_STAT_LINK)){
1458 if(netif_msg_link(sis_priv))
1459 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1460 sis_priv->autong_complete = 1;
1461 netif_carrier_off(net_dev);
1462 return;
1463 }
1464
1465 /* (Re)start AutoNegotiate */
1466 mdio_write(net_dev, phy_addr, MII_CONTROL,
1467 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1468 sis_priv->autong_complete = 0;
1469 }
1470
1471
1472 /**
1473 * sis900_read_mode - read media mode for sis900 internal phy
1474 * @net_dev: the net device to read mode for
1475 * @speed : the transmit speed to be determined
1476 * @duplex : the duplex mode to be determined
1477 *
1478 * The capability of remote end will be put in mii register autorec
1479 * after auto-negotiation. Use AND operation to get the upper bound
1480 * of speed and duplex between two ends.
1481 */
1482
1483 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1484 {
1485 struct sis900_private *sis_priv = netdev_priv(net_dev);
1486 struct mii_phy *phy = sis_priv->mii;
1487 int phy_addr = sis_priv->cur_phy;
1488 u32 status;
1489 u16 autoadv, autorec;
1490 int i;
1491
1492 for (i = 0; i < 2; i++)
1493 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1494
1495 if (!(status & MII_STAT_LINK))
1496 return;
1497
1498 /* AutoNegotiate completed */
1499 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1500 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1501 status = autoadv & autorec;
1502
1503 *speed = HW_SPEED_10_MBPS;
1504 *duplex = FDX_CAPABLE_HALF_SELECTED;
1505
1506 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1507 *speed = HW_SPEED_100_MBPS;
1508 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1509 *duplex = FDX_CAPABLE_FULL_SELECTED;
1510
1511 sis_priv->autong_complete = 1;
1512
1513 /* Workaround for Realtek RTL8201 PHY issue */
1514 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1515 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1516 *duplex = FDX_CAPABLE_FULL_SELECTED;
1517 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1518 *speed = HW_SPEED_100_MBPS;
1519 }
1520
1521 if(netif_msg_link(sis_priv))
1522 printk(KERN_INFO "%s: Media Link On %s %s-duplex\n",
1523 net_dev->name,
1524 *speed == HW_SPEED_100_MBPS ?
1525 "100mbps" : "10mbps",
1526 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1527 "full" : "half");
1528 }
1529
1530 /**
1531 * sis900_tx_timeout - sis900 transmit timeout routine
1532 * @net_dev: the net device to transmit
1533 *
1534 * print transmit timeout status
1535 * disable interrupts and do some tasks
1536 */
1537
1538 static void sis900_tx_timeout(struct net_device *net_dev)
1539 {
1540 struct sis900_private *sis_priv = netdev_priv(net_dev);
1541 void __iomem *ioaddr = sis_priv->ioaddr;
1542 unsigned long flags;
1543 int i;
1544
1545 if (netif_msg_tx_err(sis_priv)) {
1546 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n",
1547 net_dev->name, sr32(cr), sr32(isr));
1548 }
1549
1550 /* Disable interrupts by clearing the interrupt mask. */
1551 sw32(imr, 0x0000);
1552
1553 /* use spinlock to prevent interrupt handler accessing buffer ring */
1554 spin_lock_irqsave(&sis_priv->lock, flags);
1555
1556 /* discard unsent packets */
1557 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1558 for (i = 0; i < NUM_TX_DESC; i++) {
1559 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1560
1561 if (skb) {
1562 pci_unmap_single(sis_priv->pci_dev,
1563 sis_priv->tx_ring[i].bufptr, skb->len,
1564 PCI_DMA_TODEVICE);
1565 dev_kfree_skb_irq(skb);
1566 sis_priv->tx_skbuff[i] = NULL;
1567 sis_priv->tx_ring[i].cmdsts = 0;
1568 sis_priv->tx_ring[i].bufptr = 0;
1569 net_dev->stats.tx_dropped++;
1570 }
1571 }
1572 sis_priv->tx_full = 0;
1573 netif_wake_queue(net_dev);
1574
1575 spin_unlock_irqrestore(&sis_priv->lock, flags);
1576
1577 netif_trans_update(net_dev); /* prevent tx timeout */
1578
1579 /* load Transmit Descriptor Register */
1580 sw32(txdp, sis_priv->tx_ring_dma);
1581
1582 /* Enable all known interrupts by setting the interrupt mask. */
1583 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
1584 }
1585
1586 /**
1587 * sis900_start_xmit - sis900 start transmit routine
1588 * @skb: socket buffer pointer to put the data being transmitted
1589 * @net_dev: the net device to transmit with
1590 *
1591 * Set the transmit buffer descriptor,
1592 * and write TxENA to enable transmit state machine.
1593 * tell upper layer if the buffer is full
1594 */
1595
1596 static netdev_tx_t
1597 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1598 {
1599 struct sis900_private *sis_priv = netdev_priv(net_dev);
1600 void __iomem *ioaddr = sis_priv->ioaddr;
1601 unsigned int entry;
1602 unsigned long flags;
1603 unsigned int index_cur_tx, index_dirty_tx;
1604 unsigned int count_dirty_tx;
1605
1606 spin_lock_irqsave(&sis_priv->lock, flags);
1607
1608 /* Calculate the next Tx descriptor entry. */
1609 entry = sis_priv->cur_tx % NUM_TX_DESC;
1610 sis_priv->tx_skbuff[entry] = skb;
1611
1612 /* set the transmit buffer descriptor and enable Transmit State Machine */
1613 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1614 skb->data, skb->len, PCI_DMA_TODEVICE);
1615 if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev,
1616 sis_priv->tx_ring[entry].bufptr))) {
1617 dev_kfree_skb_any(skb);
1618 sis_priv->tx_skbuff[entry] = NULL;
1619 net_dev->stats.tx_dropped++;
1620 spin_unlock_irqrestore(&sis_priv->lock, flags);
1621 return NETDEV_TX_OK;
1622 }
1623 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1624 sw32(cr, TxENA | sr32(cr));
1625
1626 sis_priv->cur_tx ++;
1627 index_cur_tx = sis_priv->cur_tx;
1628 index_dirty_tx = sis_priv->dirty_tx;
1629
1630 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1631 count_dirty_tx ++;
1632
1633 if (index_cur_tx == index_dirty_tx) {
1634 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1635 sis_priv->tx_full = 1;
1636 netif_stop_queue(net_dev);
1637 } else if (count_dirty_tx < NUM_TX_DESC) {
1638 /* Typical path, tell upper layer that more transmission is possible */
1639 netif_start_queue(net_dev);
1640 } else {
1641 /* buffer full, tell upper layer no more transmission */
1642 sis_priv->tx_full = 1;
1643 netif_stop_queue(net_dev);
1644 }
1645
1646 spin_unlock_irqrestore(&sis_priv->lock, flags);
1647
1648 if (netif_msg_tx_queued(sis_priv))
1649 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1650 "to slot %d.\n",
1651 net_dev->name, skb->data, (int)skb->len, entry);
1652
1653 return NETDEV_TX_OK;
1654 }
1655
1656 /**
1657 * sis900_interrupt - sis900 interrupt handler
1658 * @irq: the irq number
1659 * @dev_instance: the client data object
1660 *
1661 * The interrupt handler does all of the Rx thread work,
1662 * and cleans up after the Tx thread
1663 */
1664
1665 static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1666 {
1667 struct net_device *net_dev = dev_instance;
1668 struct sis900_private *sis_priv = netdev_priv(net_dev);
1669 int boguscnt = max_interrupt_work;
1670 void __iomem *ioaddr = sis_priv->ioaddr;
1671 u32 status;
1672 unsigned int handled = 0;
1673
1674 spin_lock (&sis_priv->lock);
1675
1676 do {
1677 status = sr32(isr);
1678
1679 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1680 /* nothing intresting happened */
1681 break;
1682 handled = 1;
1683
1684 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1685 if (status & (RxORN | RxERR | RxOK))
1686 /* Rx interrupt */
1687 sis900_rx(net_dev);
1688
1689 if (status & (TxURN | TxERR | TxIDLE))
1690 /* Tx interrupt */
1691 sis900_finish_xmit(net_dev);
1692
1693 /* something strange happened !!! */
1694 if (status & HIBERR) {
1695 if(netif_msg_intr(sis_priv))
1696 printk(KERN_INFO "%s: Abnormal interrupt, "
1697 "status %#8.8x.\n", net_dev->name, status);
1698 break;
1699 }
1700 if (--boguscnt < 0) {
1701 if(netif_msg_intr(sis_priv))
1702 printk(KERN_INFO "%s: Too much work at interrupt, "
1703 "interrupt status = %#8.8x.\n",
1704 net_dev->name, status);
1705 break;
1706 }
1707 } while (1);
1708
1709 if(netif_msg_intr(sis_priv))
1710 printk(KERN_DEBUG "%s: exiting interrupt, "
1711 "interrupt status = %#8.8x\n",
1712 net_dev->name, sr32(isr));
1713
1714 spin_unlock (&sis_priv->lock);
1715 return IRQ_RETVAL(handled);
1716 }
1717
1718 /**
1719 * sis900_rx - sis900 receive routine
1720 * @net_dev: the net device which receives data
1721 *
1722 * Process receive interrupt events,
1723 * put buffer to higher layer and refill buffer pool
1724 * Note: This function is called by interrupt handler,
1725 * don't do "too much" work here
1726 */
1727
1728 static int sis900_rx(struct net_device *net_dev)
1729 {
1730 struct sis900_private *sis_priv = netdev_priv(net_dev);
1731 void __iomem *ioaddr = sis_priv->ioaddr;
1732 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1733 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1734 int rx_work_limit;
1735
1736 if (netif_msg_rx_status(sis_priv))
1737 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1738 "status:0x%8.8x\n",
1739 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1740 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1741
1742 while (rx_status & OWN) {
1743 unsigned int rx_size;
1744 unsigned int data_size;
1745
1746 if (--rx_work_limit < 0)
1747 break;
1748
1749 data_size = rx_status & DSIZE;
1750 rx_size = data_size - CRC_SIZE;
1751
1752 #if IS_ENABLED(CONFIG_VLAN_8021Q)
1753 /* ``TOOLONG'' flag means jumbo packet received. */
1754 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1755 rx_status &= (~ ((unsigned int)TOOLONG));
1756 #endif
1757
1758 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1759 /* corrupted packet received */
1760 if (netif_msg_rx_err(sis_priv))
1761 printk(KERN_DEBUG "%s: Corrupted packet "
1762 "received, buffer status = 0x%8.8x/%d.\n",
1763 net_dev->name, rx_status, data_size);
1764 net_dev->stats.rx_errors++;
1765 if (rx_status & OVERRUN)
1766 net_dev->stats.rx_over_errors++;
1767 if (rx_status & (TOOLONG|RUNT))
1768 net_dev->stats.rx_length_errors++;
1769 if (rx_status & (RXISERR | FAERR))
1770 net_dev->stats.rx_frame_errors++;
1771 if (rx_status & CRCERR)
1772 net_dev->stats.rx_crc_errors++;
1773 /* reset buffer descriptor state */
1774 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1775 } else {
1776 struct sk_buff * skb;
1777 struct sk_buff * rx_skb;
1778
1779 pci_unmap_single(sis_priv->pci_dev,
1780 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1781 PCI_DMA_FROMDEVICE);
1782
1783 /* refill the Rx buffer, what if there is not enough
1784 * memory for new socket buffer ?? */
1785 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1786 /*
1787 * Not enough memory to refill the buffer
1788 * so we need to recycle the old one so
1789 * as to avoid creating a memory hole
1790 * in the rx ring
1791 */
1792 skb = sis_priv->rx_skbuff[entry];
1793 net_dev->stats.rx_dropped++;
1794 goto refill_rx_ring;
1795 }
1796
1797 /* This situation should never happen, but due to
1798 some unknown bugs, it is possible that
1799 we are working on NULL sk_buff :-( */
1800 if (sis_priv->rx_skbuff[entry] == NULL) {
1801 if (netif_msg_rx_err(sis_priv))
1802 printk(KERN_WARNING "%s: NULL pointer "
1803 "encountered in Rx ring\n"
1804 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1805 net_dev->name, sis_priv->cur_rx,
1806 sis_priv->dirty_rx);
1807 dev_kfree_skb(skb);
1808 break;
1809 }
1810
1811 /* give the socket buffer to upper layers */
1812 rx_skb = sis_priv->rx_skbuff[entry];
1813 skb_put(rx_skb, rx_size);
1814 rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
1815 netif_rx(rx_skb);
1816
1817 /* some network statistics */
1818 if ((rx_status & BCAST) == MCAST)
1819 net_dev->stats.multicast++;
1820 net_dev->stats.rx_bytes += rx_size;
1821 net_dev->stats.rx_packets++;
1822 sis_priv->dirty_rx++;
1823 refill_rx_ring:
1824 sis_priv->rx_skbuff[entry] = skb;
1825 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1826 sis_priv->rx_ring[entry].bufptr =
1827 pci_map_single(sis_priv->pci_dev, skb->data,
1828 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1829 if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev,
1830 sis_priv->rx_ring[entry].bufptr))) {
1831 dev_kfree_skb_irq(skb);
1832 sis_priv->rx_skbuff[entry] = NULL;
1833 break;
1834 }
1835 }
1836 sis_priv->cur_rx++;
1837 entry = sis_priv->cur_rx % NUM_RX_DESC;
1838 rx_status = sis_priv->rx_ring[entry].cmdsts;
1839 } // while
1840
1841 /* refill the Rx buffer, what if the rate of refilling is slower
1842 * than consuming ?? */
1843 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1844 struct sk_buff *skb;
1845
1846 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1847
1848 if (sis_priv->rx_skbuff[entry] == NULL) {
1849 skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE);
1850 if (skb == NULL) {
1851 /* not enough memory for skbuff, this makes a
1852 * "hole" on the buffer ring, it is not clear
1853 * how the hardware will react to this kind
1854 * of degenerated buffer */
1855 net_dev->stats.rx_dropped++;
1856 break;
1857 }
1858 sis_priv->rx_skbuff[entry] = skb;
1859 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1860 sis_priv->rx_ring[entry].bufptr =
1861 pci_map_single(sis_priv->pci_dev, skb->data,
1862 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1863 if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev,
1864 sis_priv->rx_ring[entry].bufptr))) {
1865 dev_kfree_skb_irq(skb);
1866 sis_priv->rx_skbuff[entry] = NULL;
1867 break;
1868 }
1869 }
1870 }
1871 /* re-enable the potentially idle receive state matchine */
1872 sw32(cr , RxENA | sr32(cr));
1873
1874 return 0;
1875 }
1876
1877 /**
1878 * sis900_finish_xmit - finish up transmission of packets
1879 * @net_dev: the net device to be transmitted on
1880 *
1881 * Check for error condition and free socket buffer etc
1882 * schedule for more transmission as needed
1883 * Note: This function is called by interrupt handler,
1884 * don't do "too much" work here
1885 */
1886
1887 static void sis900_finish_xmit (struct net_device *net_dev)
1888 {
1889 struct sis900_private *sis_priv = netdev_priv(net_dev);
1890
1891 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1892 struct sk_buff *skb;
1893 unsigned int entry;
1894 u32 tx_status;
1895
1896 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1897 tx_status = sis_priv->tx_ring[entry].cmdsts;
1898
1899 if (tx_status & OWN) {
1900 /* The packet is not transmitted yet (owned by hardware) !
1901 * Note: the interrupt is generated only when Tx Machine
1902 * is idle, so this is an almost impossible case */
1903 break;
1904 }
1905
1906 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1907 /* packet unsuccessfully transmitted */
1908 if (netif_msg_tx_err(sis_priv))
1909 printk(KERN_DEBUG "%s: Transmit "
1910 "error, Tx status %8.8x.\n",
1911 net_dev->name, tx_status);
1912 net_dev->stats.tx_errors++;
1913 if (tx_status & UNDERRUN)
1914 net_dev->stats.tx_fifo_errors++;
1915 if (tx_status & ABORT)
1916 net_dev->stats.tx_aborted_errors++;
1917 if (tx_status & NOCARRIER)
1918 net_dev->stats.tx_carrier_errors++;
1919 if (tx_status & OWCOLL)
1920 net_dev->stats.tx_window_errors++;
1921 } else {
1922 /* packet successfully transmitted */
1923 net_dev->stats.collisions += (tx_status & COLCNT) >> 16;
1924 net_dev->stats.tx_bytes += tx_status & DSIZE;
1925 net_dev->stats.tx_packets++;
1926 }
1927 /* Free the original skb. */
1928 skb = sis_priv->tx_skbuff[entry];
1929 pci_unmap_single(sis_priv->pci_dev,
1930 sis_priv->tx_ring[entry].bufptr, skb->len,
1931 PCI_DMA_TODEVICE);
1932 dev_kfree_skb_irq(skb);
1933 sis_priv->tx_skbuff[entry] = NULL;
1934 sis_priv->tx_ring[entry].bufptr = 0;
1935 sis_priv->tx_ring[entry].cmdsts = 0;
1936 }
1937
1938 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1939 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1940 /* The ring is no longer full, clear tx_full and schedule
1941 * more transmission by netif_wake_queue(net_dev) */
1942 sis_priv->tx_full = 0;
1943 netif_wake_queue (net_dev);
1944 }
1945 }
1946
1947 /**
1948 * sis900_close - close sis900 device
1949 * @net_dev: the net device to be closed
1950 *
1951 * Disable interrupts, stop the Tx and Rx Status Machine
1952 * free Tx and RX socket buffer
1953 */
1954
1955 static int sis900_close(struct net_device *net_dev)
1956 {
1957 struct sis900_private *sis_priv = netdev_priv(net_dev);
1958 struct pci_dev *pdev = sis_priv->pci_dev;
1959 void __iomem *ioaddr = sis_priv->ioaddr;
1960 struct sk_buff *skb;
1961 int i;
1962
1963 netif_stop_queue(net_dev);
1964
1965 /* Disable interrupts by clearing the interrupt mask. */
1966 sw32(imr, 0x0000);
1967 sw32(ier, 0x0000);
1968
1969 /* Stop the chip's Tx and Rx Status Machine */
1970 sw32(cr, RxDIS | TxDIS | sr32(cr));
1971
1972 del_timer(&sis_priv->timer);
1973
1974 free_irq(pdev->irq, net_dev);
1975
1976 /* Free Tx and RX skbuff */
1977 for (i = 0; i < NUM_RX_DESC; i++) {
1978 skb = sis_priv->rx_skbuff[i];
1979 if (skb) {
1980 pci_unmap_single(pdev, sis_priv->rx_ring[i].bufptr,
1981 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1982 dev_kfree_skb(skb);
1983 sis_priv->rx_skbuff[i] = NULL;
1984 }
1985 }
1986 for (i = 0; i < NUM_TX_DESC; i++) {
1987 skb = sis_priv->tx_skbuff[i];
1988 if (skb) {
1989 pci_unmap_single(pdev, sis_priv->tx_ring[i].bufptr,
1990 skb->len, PCI_DMA_TODEVICE);
1991 dev_kfree_skb(skb);
1992 sis_priv->tx_skbuff[i] = NULL;
1993 }
1994 }
1995
1996 /* Green! Put the chip in low-power mode. */
1997
1998 return 0;
1999 }
2000
2001 /**
2002 * sis900_get_drvinfo - Return information about driver
2003 * @net_dev: the net device to probe
2004 * @info: container for info returned
2005 *
2006 * Process ethtool command such as "ehtool -i" to show information
2007 */
2008
2009 static void sis900_get_drvinfo(struct net_device *net_dev,
2010 struct ethtool_drvinfo *info)
2011 {
2012 struct sis900_private *sis_priv = netdev_priv(net_dev);
2013
2014 strlcpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver));
2015 strlcpy(info->version, SIS900_DRV_VERSION, sizeof(info->version));
2016 strlcpy(info->bus_info, pci_name(sis_priv->pci_dev),
2017 sizeof(info->bus_info));
2018 }
2019
2020 static u32 sis900_get_msglevel(struct net_device *net_dev)
2021 {
2022 struct sis900_private *sis_priv = netdev_priv(net_dev);
2023 return sis_priv->msg_enable;
2024 }
2025
2026 static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
2027 {
2028 struct sis900_private *sis_priv = netdev_priv(net_dev);
2029 sis_priv->msg_enable = value;
2030 }
2031
2032 static u32 sis900_get_link(struct net_device *net_dev)
2033 {
2034 struct sis900_private *sis_priv = netdev_priv(net_dev);
2035 return mii_link_ok(&sis_priv->mii_info);
2036 }
2037
2038 static int sis900_get_settings(struct net_device *net_dev,
2039 struct ethtool_cmd *cmd)
2040 {
2041 struct sis900_private *sis_priv = netdev_priv(net_dev);
2042 spin_lock_irq(&sis_priv->lock);
2043 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2044 spin_unlock_irq(&sis_priv->lock);
2045 return 0;
2046 }
2047
2048 static int sis900_set_settings(struct net_device *net_dev,
2049 struct ethtool_cmd *cmd)
2050 {
2051 struct sis900_private *sis_priv = netdev_priv(net_dev);
2052 int rt;
2053 spin_lock_irq(&sis_priv->lock);
2054 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2055 spin_unlock_irq(&sis_priv->lock);
2056 return rt;
2057 }
2058
2059 static int sis900_nway_reset(struct net_device *net_dev)
2060 {
2061 struct sis900_private *sis_priv = netdev_priv(net_dev);
2062 return mii_nway_restart(&sis_priv->mii_info);
2063 }
2064
2065 /**
2066 * sis900_set_wol - Set up Wake on Lan registers
2067 * @net_dev: the net device to probe
2068 * @wol: container for info passed to the driver
2069 *
2070 * Process ethtool command "wol" to setup wake on lan features.
2071 * SiS900 supports sending WoL events if a correct packet is received,
2072 * but there is no simple way to filter them to only a subset (broadcast,
2073 * multicast, unicast or arp).
2074 */
2075
2076 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2077 {
2078 struct sis900_private *sis_priv = netdev_priv(net_dev);
2079 void __iomem *ioaddr = sis_priv->ioaddr;
2080 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2081
2082 if (wol->wolopts == 0) {
2083 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2084 cfgpmcsr &= ~PME_EN;
2085 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2086 sw32(pmctrl, pmctrl_bits);
2087 if (netif_msg_wol(sis_priv))
2088 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2089 return 0;
2090 }
2091
2092 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2093 | WAKE_BCAST | WAKE_ARP))
2094 return -EINVAL;
2095
2096 if (wol->wolopts & WAKE_MAGIC)
2097 pmctrl_bits |= MAGICPKT;
2098 if (wol->wolopts & WAKE_PHY)
2099 pmctrl_bits |= LINKON;
2100
2101 sw32(pmctrl, pmctrl_bits);
2102
2103 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2104 cfgpmcsr |= PME_EN;
2105 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2106 if (netif_msg_wol(sis_priv))
2107 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2108
2109 return 0;
2110 }
2111
2112 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2113 {
2114 struct sis900_private *sp = netdev_priv(net_dev);
2115 void __iomem *ioaddr = sp->ioaddr;
2116 u32 pmctrl_bits;
2117
2118 pmctrl_bits = sr32(pmctrl);
2119 if (pmctrl_bits & MAGICPKT)
2120 wol->wolopts |= WAKE_MAGIC;
2121 if (pmctrl_bits & LINKON)
2122 wol->wolopts |= WAKE_PHY;
2123
2124 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2125 }
2126
2127 static const struct ethtool_ops sis900_ethtool_ops = {
2128 .get_drvinfo = sis900_get_drvinfo,
2129 .get_msglevel = sis900_get_msglevel,
2130 .set_msglevel = sis900_set_msglevel,
2131 .get_link = sis900_get_link,
2132 .get_settings = sis900_get_settings,
2133 .set_settings = sis900_set_settings,
2134 .nway_reset = sis900_nway_reset,
2135 .get_wol = sis900_get_wol,
2136 .set_wol = sis900_set_wol
2137 };
2138
2139 /**
2140 * mii_ioctl - process MII i/o control command
2141 * @net_dev: the net device to command for
2142 * @rq: parameter for command
2143 * @cmd: the i/o command
2144 *
2145 * Process MII command like read/write MII register
2146 */
2147
2148 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2149 {
2150 struct sis900_private *sis_priv = netdev_priv(net_dev);
2151 struct mii_ioctl_data *data = if_mii(rq);
2152
2153 switch(cmd) {
2154 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2155 data->phy_id = sis_priv->mii->phy_addr;
2156 /* Fall Through */
2157
2158 case SIOCGMIIREG: /* Read MII PHY register. */
2159 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2160 return 0;
2161
2162 case SIOCSMIIREG: /* Write MII PHY register. */
2163 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2164 return 0;
2165 default:
2166 return -EOPNOTSUPP;
2167 }
2168 }
2169
2170 /**
2171 * sis900_set_config - Set media type by net_device.set_config
2172 * @dev: the net device for media type change
2173 * @map: ifmap passed by ifconfig
2174 *
2175 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2176 * we support only port changes. All other runtime configuration
2177 * changes will be ignored
2178 */
2179
2180 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2181 {
2182 struct sis900_private *sis_priv = netdev_priv(dev);
2183 struct mii_phy *mii_phy = sis_priv->mii;
2184
2185 u16 status;
2186
2187 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2188 /* we switch on the ifmap->port field. I couldn't find anything
2189 * like a definition or standard for the values of that field.
2190 * I think the meaning of those values is device specific. But
2191 * since I would like to change the media type via the ifconfig
2192 * command I use the definition from linux/netdevice.h
2193 * (which seems to be different from the ifport(pcmcia) definition) */
2194 switch(map->port){
2195 case IF_PORT_UNKNOWN: /* use auto here */
2196 dev->if_port = map->port;
2197 /* we are going to change the media type, so the Link
2198 * will be temporary down and we need to reflect that
2199 * here. When the Link comes up again, it will be
2200 * sensed by the sis_timer procedure, which also does
2201 * all the rest for us */
2202 netif_carrier_off(dev);
2203
2204 /* read current state */
2205 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2206
2207 /* enable auto negotiation and reset the negotioation
2208 * (I don't really know what the auto negatiotiation
2209 * reset really means, but it sounds for me right to
2210 * do one here) */
2211 mdio_write(dev, mii_phy->phy_addr,
2212 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2213
2214 break;
2215
2216 case IF_PORT_10BASET: /* 10BaseT */
2217 dev->if_port = map->port;
2218
2219 /* we are going to change the media type, so the Link
2220 * will be temporary down and we need to reflect that
2221 * here. When the Link comes up again, it will be
2222 * sensed by the sis_timer procedure, which also does
2223 * all the rest for us */
2224 netif_carrier_off(dev);
2225
2226 /* set Speed to 10Mbps */
2227 /* read current state */
2228 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2229
2230 /* disable auto negotiation and force 10MBit mode*/
2231 mdio_write(dev, mii_phy->phy_addr,
2232 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2233 MII_CNTL_AUTO));
2234 break;
2235
2236 case IF_PORT_100BASET: /* 100BaseT */
2237 case IF_PORT_100BASETX: /* 100BaseTx */
2238 dev->if_port = map->port;
2239
2240 /* we are going to change the media type, so the Link
2241 * will be temporary down and we need to reflect that
2242 * here. When the Link comes up again, it will be
2243 * sensed by the sis_timer procedure, which also does
2244 * all the rest for us */
2245 netif_carrier_off(dev);
2246
2247 /* set Speed to 100Mbps */
2248 /* disable auto negotiation and enable 100MBit Mode */
2249 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2250 mdio_write(dev, mii_phy->phy_addr,
2251 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2252 MII_CNTL_SPEED);
2253
2254 break;
2255
2256 case IF_PORT_10BASE2: /* 10Base2 */
2257 case IF_PORT_AUI: /* AUI */
2258 case IF_PORT_100BASEFX: /* 100BaseFx */
2259 /* These Modes are not supported (are they?)*/
2260 return -EOPNOTSUPP;
2261
2262 default:
2263 return -EINVAL;
2264 }
2265 }
2266 return 0;
2267 }
2268
2269 /**
2270 * sis900_mcast_bitnr - compute hashtable index
2271 * @addr: multicast address
2272 * @revision: revision id of chip
2273 *
2274 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2275 * hash table, which makes this function a little bit different from other drivers
2276 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2277 * multicast hash table.
2278 */
2279
2280 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2281 {
2282
2283 u32 crc = ether_crc(6, addr);
2284
2285 /* leave 8 or 7 most siginifant bits */
2286 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2287 return (int)(crc >> 24);
2288 else
2289 return (int)(crc >> 25);
2290 }
2291
2292 /**
2293 * set_rx_mode - Set SiS900 receive mode
2294 * @net_dev: the net device to be set
2295 *
2296 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2297 * And set the appropriate multicast filter.
2298 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2299 */
2300
2301 static void set_rx_mode(struct net_device *net_dev)
2302 {
2303 struct sis900_private *sis_priv = netdev_priv(net_dev);
2304 void __iomem *ioaddr = sis_priv->ioaddr;
2305 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2306 int i, table_entries;
2307 u32 rx_mode;
2308
2309 /* 635 Hash Table entries = 256(2^16) */
2310 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2311 (sis_priv->chipset_rev == SIS900B_900_REV))
2312 table_entries = 16;
2313 else
2314 table_entries = 8;
2315
2316 if (net_dev->flags & IFF_PROMISC) {
2317 /* Accept any kinds of packets */
2318 rx_mode = RFPromiscuous;
2319 for (i = 0; i < table_entries; i++)
2320 mc_filter[i] = 0xffff;
2321 } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) ||
2322 (net_dev->flags & IFF_ALLMULTI)) {
2323 /* too many multicast addresses or accept all multicast packet */
2324 rx_mode = RFAAB | RFAAM;
2325 for (i = 0; i < table_entries; i++)
2326 mc_filter[i] = 0xffff;
2327 } else {
2328 /* Accept Broadcast packet, destination address matchs our
2329 * MAC address, use Receive Filter to reject unwanted MCAST
2330 * packets */
2331 struct netdev_hw_addr *ha;
2332 rx_mode = RFAAB;
2333
2334 netdev_for_each_mc_addr(ha, net_dev) {
2335 unsigned int bit_nr;
2336
2337 bit_nr = sis900_mcast_bitnr(ha->addr,
2338 sis_priv->chipset_rev);
2339 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2340 }
2341 }
2342
2343 /* update Multicast Hash Table in Receive Filter */
2344 for (i = 0; i < table_entries; i++) {
2345 /* why plus 0x04 ??, That makes the correct value for hash table. */
2346 sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift);
2347 sw32(rfdr, mc_filter[i]);
2348 }
2349
2350 sw32(rfcr, RFEN | rx_mode);
2351
2352 /* sis900 is capable of looping back packets at MAC level for
2353 * debugging purpose */
2354 if (net_dev->flags & IFF_LOOPBACK) {
2355 u32 cr_saved;
2356 /* We must disable Tx/Rx before setting loopback mode */
2357 cr_saved = sr32(cr);
2358 sw32(cr, cr_saved | TxDIS | RxDIS);
2359 /* enable loopback */
2360 sw32(txcfg, sr32(txcfg) | TxMLB);
2361 sw32(rxcfg, sr32(rxcfg) | RxATX);
2362 /* restore cr */
2363 sw32(cr, cr_saved);
2364 }
2365 }
2366
2367 /**
2368 * sis900_reset - Reset sis900 MAC
2369 * @net_dev: the net device to reset
2370 *
2371 * reset sis900 MAC and wait until finished
2372 * reset through command register
2373 * change backoff algorithm for 900B0 & 635 M/B
2374 */
2375
2376 static void sis900_reset(struct net_device *net_dev)
2377 {
2378 struct sis900_private *sis_priv = netdev_priv(net_dev);
2379 void __iomem *ioaddr = sis_priv->ioaddr;
2380 u32 status = TxRCMP | RxRCMP;
2381 int i;
2382
2383 sw32(ier, 0);
2384 sw32(imr, 0);
2385 sw32(rfcr, 0);
2386
2387 sw32(cr, RxRESET | TxRESET | RESET | sr32(cr));
2388
2389 /* Check that the chip has finished the reset. */
2390 for (i = 0; status && (i < 1000); i++)
2391 status ^= sr32(isr) & status;
2392
2393 if (sis_priv->chipset_rev >= SIS635A_900_REV ||
2394 sis_priv->chipset_rev == SIS900B_900_REV)
2395 sw32(cfg, PESEL | RND_CNT);
2396 else
2397 sw32(cfg, PESEL);
2398 }
2399
2400 /**
2401 * sis900_remove - Remove sis900 device
2402 * @pci_dev: the pci device to be removed
2403 *
2404 * remove and release SiS900 net device
2405 */
2406
2407 static void sis900_remove(struct pci_dev *pci_dev)
2408 {
2409 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2410 struct sis900_private *sis_priv = netdev_priv(net_dev);
2411
2412 unregister_netdev(net_dev);
2413
2414 while (sis_priv->first_mii) {
2415 struct mii_phy *phy = sis_priv->first_mii;
2416
2417 sis_priv->first_mii = phy->next;
2418 kfree(phy);
2419 }
2420
2421 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2422 sis_priv->rx_ring_dma);
2423 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2424 sis_priv->tx_ring_dma);
2425 pci_iounmap(pci_dev, sis_priv->ioaddr);
2426 free_netdev(net_dev);
2427 pci_release_regions(pci_dev);
2428 }
2429
2430 #ifdef CONFIG_PM
2431
2432 static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2433 {
2434 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2435 struct sis900_private *sis_priv = netdev_priv(net_dev);
2436 void __iomem *ioaddr = sis_priv->ioaddr;
2437
2438 if(!netif_running(net_dev))
2439 return 0;
2440
2441 netif_stop_queue(net_dev);
2442 netif_device_detach(net_dev);
2443
2444 /* Stop the chip's Tx and Rx Status Machine */
2445 sw32(cr, RxDIS | TxDIS | sr32(cr));
2446
2447 pci_set_power_state(pci_dev, PCI_D3hot);
2448 pci_save_state(pci_dev);
2449
2450 return 0;
2451 }
2452
2453 static int sis900_resume(struct pci_dev *pci_dev)
2454 {
2455 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2456 struct sis900_private *sis_priv = netdev_priv(net_dev);
2457 void __iomem *ioaddr = sis_priv->ioaddr;
2458
2459 if(!netif_running(net_dev))
2460 return 0;
2461 pci_restore_state(pci_dev);
2462 pci_set_power_state(pci_dev, PCI_D0);
2463
2464 sis900_init_rxfilter(net_dev);
2465
2466 sis900_init_tx_ring(net_dev);
2467 sis900_init_rx_ring(net_dev);
2468
2469 set_rx_mode(net_dev);
2470
2471 netif_device_attach(net_dev);
2472 netif_start_queue(net_dev);
2473
2474 /* Workaround for EDB */
2475 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2476
2477 /* Enable all known interrupts by setting the interrupt mask. */
2478 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
2479 sw32(cr, RxENA | sr32(cr));
2480 sw32(ier, IE);
2481
2482 sis900_check_mode(net_dev, sis_priv->mii);
2483
2484 return 0;
2485 }
2486 #endif /* CONFIG_PM */
2487
2488 static struct pci_driver sis900_pci_driver = {
2489 .name = SIS900_MODULE_NAME,
2490 .id_table = sis900_pci_tbl,
2491 .probe = sis900_probe,
2492 .remove = sis900_remove,
2493 #ifdef CONFIG_PM
2494 .suspend = sis900_suspend,
2495 .resume = sis900_resume,
2496 #endif /* CONFIG_PM */
2497 };
2498
2499 static int __init sis900_init_module(void)
2500 {
2501 /* when a module, this is printed whether or not devices are found in probe */
2502 #ifdef MODULE
2503 printk(version);
2504 #endif
2505
2506 return pci_register_driver(&sis900_pci_driver);
2507 }
2508
2509 static void __exit sis900_cleanup_module(void)
2510 {
2511 pci_unregister_driver(&sis900_pci_driver);
2512 }
2513
2514 module_init(sis900_init_module);
2515 module_exit(sis900_cleanup_module);
2516
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