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Merge tag 'drm-intel-fixes-2014-02-11' of ssh://git.freedesktop.org/git/drm-intel...
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / smsc / smc91c92_cs.c
1 /*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26 ======================================================================*/
27
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/slab.h>
33 #include <linux/string.h>
34 #include <linux/timer.h>
35 #include <linux/interrupt.h>
36 #include <linux/delay.h>
37 #include <linux/crc32.h>
38 #include <linux/netdevice.h>
39 #include <linux/etherdevice.h>
40 #include <linux/skbuff.h>
41 #include <linux/if_arp.h>
42 #include <linux/ioport.h>
43 #include <linux/ethtool.h>
44 #include <linux/mii.h>
45 #include <linux/jiffies.h>
46 #include <linux/firmware.h>
47
48 #include <pcmcia/cistpl.h>
49 #include <pcmcia/cisreg.h>
50 #include <pcmcia/ciscode.h>
51 #include <pcmcia/ds.h>
52 #include <pcmcia/ss.h>
53
54 #include <asm/io.h>
55 #include <asm/uaccess.h>
56
57 /*====================================================================*/
58
59 static const char *if_names[] = { "auto", "10baseT", "10base2"};
60
61 /* Firmware name */
62 #define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
63
64 /* Module parameters */
65
66 MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
67 MODULE_LICENSE("GPL");
68 MODULE_FIRMWARE(FIRMWARE_NAME);
69
70 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
71
72 /*
73 Transceiver/media type.
74 0 = auto
75 1 = 10baseT (and autoselect if #define AUTOSELECT),
76 2 = AUI/10base2,
77 */
78 INT_MODULE_PARM(if_port, 0);
79
80
81 #define DRV_NAME "smc91c92_cs"
82 #define DRV_VERSION "1.123"
83
84 /*====================================================================*/
85
86 /* Operational parameter that usually are not changed. */
87
88 /* Time in jiffies before concluding Tx hung */
89 #define TX_TIMEOUT ((400*HZ)/1000)
90
91 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
92 #define INTR_WORK 4
93
94 /* Times to check the check the chip before concluding that it doesn't
95 currently have room for another Tx packet. */
96 #define MEMORY_WAIT_TIME 8
97
98 struct smc_private {
99 struct pcmcia_device *p_dev;
100 spinlock_t lock;
101 u_short manfid;
102 u_short cardid;
103
104 struct sk_buff *saved_skb;
105 int packets_waiting;
106 void __iomem *base;
107 u_short cfg;
108 struct timer_list media;
109 int watchdog, tx_err;
110 u_short media_status;
111 u_short fast_poll;
112 u_short link_status;
113 struct mii_if_info mii_if;
114 int duplex;
115 int rx_ovrn;
116 };
117
118 /* Special definitions for Megahertz multifunction cards */
119 #define MEGAHERTZ_ISR 0x0380
120
121 /* Special function registers for Motorola Mariner */
122 #define MOT_LAN 0x0000
123 #define MOT_UART 0x0020
124 #define MOT_EEPROM 0x20
125
126 #define MOT_NORMAL \
127 (COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
128
129 /* Special function registers for Ositech cards */
130 #define OSITECH_AUI_CTL 0x0c
131 #define OSITECH_PWRDOWN 0x0d
132 #define OSITECH_RESET 0x0e
133 #define OSITECH_ISR 0x0f
134 #define OSITECH_AUI_PWR 0x0c
135 #define OSITECH_RESET_ISR 0x0e
136
137 #define OSI_AUI_PWR 0x40
138 #define OSI_LAN_PWRDOWN 0x02
139 #define OSI_MODEM_PWRDOWN 0x01
140 #define OSI_LAN_RESET 0x02
141 #define OSI_MODEM_RESET 0x01
142
143 /* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
144 #define BANK_SELECT 14 /* Window select register. */
145 #define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
146
147 /* Bank 0 registers. */
148 #define TCR 0 /* transmit control register */
149 #define TCR_CLEAR 0 /* do NOTHING */
150 #define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
151 #define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
152 #define TCR_MONCSN 0x0400 /* Monitor Carrier. */
153 #define TCR_FDUPLX 0x0800 /* Full duplex mode. */
154 #define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
155
156 #define EPH 2 /* Ethernet Protocol Handler report. */
157 #define EPH_TX_SUC 0x0001
158 #define EPH_SNGLCOL 0x0002
159 #define EPH_MULCOL 0x0004
160 #define EPH_LTX_MULT 0x0008
161 #define EPH_16COL 0x0010
162 #define EPH_SQET 0x0020
163 #define EPH_LTX_BRD 0x0040
164 #define EPH_TX_DEFR 0x0080
165 #define EPH_LAT_COL 0x0200
166 #define EPH_LOST_CAR 0x0400
167 #define EPH_EXC_DEF 0x0800
168 #define EPH_CTR_ROL 0x1000
169 #define EPH_RX_OVRN 0x2000
170 #define EPH_LINK_OK 0x4000
171 #define EPH_TX_UNRN 0x8000
172 #define MEMINFO 8 /* Memory Information Register */
173 #define MEMCFG 10 /* Memory Configuration Register */
174
175 /* Bank 1 registers. */
176 #define CONFIG 0
177 #define CFG_MII_SELECT 0x8000 /* 91C100 only */
178 #define CFG_NO_WAIT 0x1000
179 #define CFG_FULL_STEP 0x0400
180 #define CFG_SET_SQLCH 0x0200
181 #define CFG_AUI_SELECT 0x0100
182 #define CFG_16BIT 0x0080
183 #define CFG_DIS_LINK 0x0040
184 #define CFG_STATIC 0x0030
185 #define CFG_IRQ_SEL_1 0x0004
186 #define CFG_IRQ_SEL_0 0x0002
187 #define BASE_ADDR 2
188 #define ADDR0 4
189 #define GENERAL 10
190 #define CONTROL 12
191 #define CTL_STORE 0x0001
192 #define CTL_RELOAD 0x0002
193 #define CTL_EE_SELECT 0x0004
194 #define CTL_TE_ENABLE 0x0020
195 #define CTL_CR_ENABLE 0x0040
196 #define CTL_LE_ENABLE 0x0080
197 #define CTL_AUTO_RELEASE 0x0800
198 #define CTL_POWERDOWN 0x2000
199
200 /* Bank 2 registers. */
201 #define MMU_CMD 0
202 #define MC_ALLOC 0x20 /* or with number of 256 byte packets */
203 #define MC_RESET 0x40
204 #define MC_RELEASE 0x80 /* remove and release the current rx packet */
205 #define MC_FREEPKT 0xA0 /* Release packet in PNR register */
206 #define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
207 #define PNR_ARR 2
208 #define FIFO_PORTS 4
209 #define FP_RXEMPTY 0x8000
210 #define POINTER 6
211 #define PTR_AUTO_INC 0x0040
212 #define PTR_READ 0x2000
213 #define PTR_AUTOINC 0x4000
214 #define PTR_RCV 0x8000
215 #define DATA_1 8
216 #define INTERRUPT 12
217 #define IM_RCV_INT 0x1
218 #define IM_TX_INT 0x2
219 #define IM_TX_EMPTY_INT 0x4
220 #define IM_ALLOC_INT 0x8
221 #define IM_RX_OVRN_INT 0x10
222 #define IM_EPH_INT 0x20
223
224 #define RCR 4
225 enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
226 RxEnable = 0x0100, RxStripCRC = 0x0200};
227 #define RCR_SOFTRESET 0x8000 /* resets the chip */
228 #define RCR_STRIP_CRC 0x200 /* strips CRC */
229 #define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
230 #define RCR_ALMUL 0x4 /* receive all multicast packets */
231 #define RCR_PROMISC 0x2 /* enable promiscuous mode */
232
233 /* the normal settings for the RCR register : */
234 #define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
235 #define RCR_CLEAR 0x0 /* set it to a base state */
236 #define COUNTER 6
237
238 /* BANK 3 -- not the same values as in smc9194! */
239 #define MULTICAST0 0
240 #define MULTICAST2 2
241 #define MULTICAST4 4
242 #define MULTICAST6 6
243 #define MGMT 8
244 #define REVISION 0x0a
245
246 /* Transmit status bits. */
247 #define TS_SUCCESS 0x0001
248 #define TS_16COL 0x0010
249 #define TS_LATCOL 0x0200
250 #define TS_LOSTCAR 0x0400
251
252 /* Receive status bits. */
253 #define RS_ALGNERR 0x8000
254 #define RS_BADCRC 0x2000
255 #define RS_ODDFRAME 0x1000
256 #define RS_TOOLONG 0x0800
257 #define RS_TOOSHORT 0x0400
258 #define RS_MULTICAST 0x0001
259 #define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
260
261 #define set_bits(v, p) outw(inw(p)|(v), (p))
262 #define mask_bits(v, p) outw(inw(p)&(v), (p))
263
264 /*====================================================================*/
265
266 static void smc91c92_detach(struct pcmcia_device *p_dev);
267 static int smc91c92_config(struct pcmcia_device *link);
268 static void smc91c92_release(struct pcmcia_device *link);
269
270 static int smc_open(struct net_device *dev);
271 static int smc_close(struct net_device *dev);
272 static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
273 static void smc_tx_timeout(struct net_device *dev);
274 static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
275 struct net_device *dev);
276 static irqreturn_t smc_interrupt(int irq, void *dev_id);
277 static void smc_rx(struct net_device *dev);
278 static void set_rx_mode(struct net_device *dev);
279 static int s9k_config(struct net_device *dev, struct ifmap *map);
280 static void smc_set_xcvr(struct net_device *dev, int if_port);
281 static void smc_reset(struct net_device *dev);
282 static void media_check(u_long arg);
283 static void mdio_sync(unsigned int addr);
284 static int mdio_read(struct net_device *dev, int phy_id, int loc);
285 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
286 static int smc_link_ok(struct net_device *dev);
287 static const struct ethtool_ops ethtool_ops;
288
289 static const struct net_device_ops smc_netdev_ops = {
290 .ndo_open = smc_open,
291 .ndo_stop = smc_close,
292 .ndo_start_xmit = smc_start_xmit,
293 .ndo_tx_timeout = smc_tx_timeout,
294 .ndo_set_config = s9k_config,
295 .ndo_set_rx_mode = set_rx_mode,
296 .ndo_do_ioctl = smc_ioctl,
297 .ndo_change_mtu = eth_change_mtu,
298 .ndo_set_mac_address = eth_mac_addr,
299 .ndo_validate_addr = eth_validate_addr,
300 };
301
302 static int smc91c92_probe(struct pcmcia_device *link)
303 {
304 struct smc_private *smc;
305 struct net_device *dev;
306
307 dev_dbg(&link->dev, "smc91c92_attach()\n");
308
309 /* Create new ethernet device */
310 dev = alloc_etherdev(sizeof(struct smc_private));
311 if (!dev)
312 return -ENOMEM;
313 smc = netdev_priv(dev);
314 smc->p_dev = link;
315 link->priv = dev;
316
317 spin_lock_init(&smc->lock);
318
319 /* The SMC91c92-specific entries in the device structure. */
320 dev->netdev_ops = &smc_netdev_ops;
321 SET_ETHTOOL_OPS(dev, &ethtool_ops);
322 dev->watchdog_timeo = TX_TIMEOUT;
323
324 smc->mii_if.dev = dev;
325 smc->mii_if.mdio_read = mdio_read;
326 smc->mii_if.mdio_write = mdio_write;
327 smc->mii_if.phy_id_mask = 0x1f;
328 smc->mii_if.reg_num_mask = 0x1f;
329
330 return smc91c92_config(link);
331 } /* smc91c92_attach */
332
333 static void smc91c92_detach(struct pcmcia_device *link)
334 {
335 struct net_device *dev = link->priv;
336
337 dev_dbg(&link->dev, "smc91c92_detach\n");
338
339 unregister_netdev(dev);
340
341 smc91c92_release(link);
342
343 free_netdev(dev);
344 } /* smc91c92_detach */
345
346 /*====================================================================*/
347
348 static int cvt_ascii_address(struct net_device *dev, char *s)
349 {
350 int i, j, da, c;
351
352 if (strlen(s) != 12)
353 return -1;
354 for (i = 0; i < 6; i++) {
355 da = 0;
356 for (j = 0; j < 2; j++) {
357 c = *s++;
358 da <<= 4;
359 da += ((c >= '0') && (c <= '9')) ?
360 (c - '0') : ((c & 0x0f) + 9);
361 }
362 dev->dev_addr[i] = da;
363 }
364 return 0;
365 }
366
367 /*====================================================================
368
369 Configuration stuff for Megahertz cards
370
371 mhz_3288_power() is used to power up a 3288's ethernet chip.
372 mhz_mfc_config() handles socket setup for multifunction (1144
373 and 3288) cards. mhz_setup() gets a card's hardware ethernet
374 address.
375
376 ======================================================================*/
377
378 static int mhz_3288_power(struct pcmcia_device *link)
379 {
380 struct net_device *dev = link->priv;
381 struct smc_private *smc = netdev_priv(dev);
382 u_char tmp;
383
384 /* Read the ISR twice... */
385 readb(smc->base+MEGAHERTZ_ISR);
386 udelay(5);
387 readb(smc->base+MEGAHERTZ_ISR);
388
389 /* Pause 200ms... */
390 mdelay(200);
391
392 /* Now read and write the COR... */
393 tmp = readb(smc->base + link->config_base + CISREG_COR);
394 udelay(5);
395 writeb(tmp, smc->base + link->config_base + CISREG_COR);
396
397 return 0;
398 }
399
400 static int mhz_mfc_config_check(struct pcmcia_device *p_dev, void *priv_data)
401 {
402 int k;
403 p_dev->io_lines = 16;
404 p_dev->resource[1]->start = p_dev->resource[0]->start;
405 p_dev->resource[1]->end = 8;
406 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
407 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
408 p_dev->resource[0]->end = 16;
409 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
410 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
411 for (k = 0; k < 0x400; k += 0x10) {
412 if (k & 0x80)
413 continue;
414 p_dev->resource[0]->start = k ^ 0x300;
415 if (!pcmcia_request_io(p_dev))
416 return 0;
417 }
418 return -ENODEV;
419 }
420
421 static int mhz_mfc_config(struct pcmcia_device *link)
422 {
423 struct net_device *dev = link->priv;
424 struct smc_private *smc = netdev_priv(dev);
425 unsigned int offset;
426 int i;
427
428 link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ |
429 CONF_AUTO_SET_IO;
430
431 /* The Megahertz combo cards have modem-like CIS entries, so
432 we have to explicitly try a bunch of port combinations. */
433 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
434 return -ENODEV;
435
436 dev->base_addr = link->resource[0]->start;
437
438 /* Allocate a memory window, for accessing the ISR */
439 link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
440 link->resource[2]->start = link->resource[2]->end = 0;
441 i = pcmcia_request_window(link, link->resource[2], 0);
442 if (i != 0)
443 return -ENODEV;
444
445 smc->base = ioremap(link->resource[2]->start,
446 resource_size(link->resource[2]));
447 offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0;
448 i = pcmcia_map_mem_page(link, link->resource[2], offset);
449 if ((i == 0) &&
450 (smc->manfid == MANFID_MEGAHERTZ) &&
451 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
452 mhz_3288_power(link);
453
454 return 0;
455 }
456
457 static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
458 tuple_t *tuple,
459 void *priv)
460 {
461 struct net_device *dev = priv;
462 cisparse_t parse;
463 u8 *buf;
464
465 if (pcmcia_parse_tuple(tuple, &parse))
466 return -EINVAL;
467
468 buf = parse.version_1.str + parse.version_1.ofs[3];
469
470 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
471 return 0;
472
473 return -EINVAL;
474 };
475
476 static int mhz_setup(struct pcmcia_device *link)
477 {
478 struct net_device *dev = link->priv;
479 size_t len;
480 u8 *buf;
481 int rc;
482
483 /* Read the station address from the CIS. It is stored as the last
484 (fourth) string in the Version 1 Version/ID tuple. */
485 if ((link->prod_id[3]) &&
486 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
487 return 0;
488
489 /* Workarounds for broken cards start here. */
490 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
491 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
492 return 0;
493
494 /* Another possibility: for the EM3288, in a special tuple */
495 rc = -1;
496 len = pcmcia_get_tuple(link, 0x81, &buf);
497 if (buf && len >= 13) {
498 buf[12] = '\0';
499 if (cvt_ascii_address(dev, buf) == 0)
500 rc = 0;
501 }
502 kfree(buf);
503
504 return rc;
505 };
506
507 /*======================================================================
508
509 Configuration stuff for the Motorola Mariner
510
511 mot_config() writes directly to the Mariner configuration
512 registers because the CIS is just bogus.
513
514 ======================================================================*/
515
516 static void mot_config(struct pcmcia_device *link)
517 {
518 struct net_device *dev = link->priv;
519 struct smc_private *smc = netdev_priv(dev);
520 unsigned int ioaddr = dev->base_addr;
521 unsigned int iouart = link->resource[1]->start;
522
523 /* Set UART base address and force map with COR bit 1 */
524 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
525 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
526 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
527
528 /* Set SMC base address and force map with COR bit 1 */
529 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
530 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
531 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
532
533 /* Wait for things to settle down */
534 mdelay(100);
535 }
536
537 static int mot_setup(struct pcmcia_device *link)
538 {
539 struct net_device *dev = link->priv;
540 unsigned int ioaddr = dev->base_addr;
541 int i, wait, loop;
542 u_int addr;
543
544 /* Read Ethernet address from Serial EEPROM */
545
546 for (i = 0; i < 3; i++) {
547 SMC_SELECT_BANK(2);
548 outw(MOT_EEPROM + i, ioaddr + POINTER);
549 SMC_SELECT_BANK(1);
550 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
551
552 for (loop = wait = 0; loop < 200; loop++) {
553 udelay(10);
554 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
555 if (wait == 0) break;
556 }
557
558 if (wait)
559 return -1;
560
561 addr = inw(ioaddr + GENERAL);
562 dev->dev_addr[2*i] = addr & 0xff;
563 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
564 }
565
566 return 0;
567 }
568
569 /*====================================================================*/
570
571 static int smc_configcheck(struct pcmcia_device *p_dev, void *priv_data)
572 {
573 p_dev->resource[0]->end = 16;
574 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
575 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
576
577 return pcmcia_request_io(p_dev);
578 }
579
580 static int smc_config(struct pcmcia_device *link)
581 {
582 struct net_device *dev = link->priv;
583 int i;
584
585 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
586
587 i = pcmcia_loop_config(link, smc_configcheck, NULL);
588 if (!i)
589 dev->base_addr = link->resource[0]->start;
590
591 return i;
592 }
593
594
595 static int smc_setup(struct pcmcia_device *link)
596 {
597 struct net_device *dev = link->priv;
598
599 /* Check for a LAN function extension tuple */
600 if (!pcmcia_get_mac_from_cis(link, dev))
601 return 0;
602
603 /* Try the third string in the Version 1 Version/ID tuple. */
604 if (link->prod_id[2]) {
605 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
606 return 0;
607 }
608 return -1;
609 }
610
611 /*====================================================================*/
612
613 static int osi_config(struct pcmcia_device *link)
614 {
615 struct net_device *dev = link->priv;
616 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
617 int i, j;
618
619 link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ;
620 link->resource[0]->end = 64;
621 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
622 link->resource[1]->end = 8;
623
624 /* Enable Hard Decode, LAN, Modem */
625 link->io_lines = 16;
626 link->config_index = 0x23;
627
628 for (i = j = 0; j < 4; j++) {
629 link->resource[1]->start = com[j];
630 i = pcmcia_request_io(link);
631 if (i == 0)
632 break;
633 }
634 if (i != 0) {
635 /* Fallback: turn off hard decode */
636 link->config_index = 0x03;
637 link->resource[1]->end = 0;
638 i = pcmcia_request_io(link);
639 }
640 dev->base_addr = link->resource[0]->start + 0x10;
641 return i;
642 }
643
644 static int osi_load_firmware(struct pcmcia_device *link)
645 {
646 const struct firmware *fw;
647 int i, err;
648
649 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
650 if (err) {
651 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
652 return err;
653 }
654
655 /* Download the Seven of Diamonds firmware */
656 for (i = 0; i < fw->size; i++) {
657 outb(fw->data[i], link->resource[0]->start + 2);
658 udelay(50);
659 }
660 release_firmware(fw);
661 return err;
662 }
663
664 static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
665 tuple_t *tuple,
666 void *priv)
667 {
668 struct net_device *dev = priv;
669 int i;
670
671 if (tuple->TupleDataLen < 8)
672 return -EINVAL;
673 if (tuple->TupleData[0] != 0x04)
674 return -EINVAL;
675 for (i = 0; i < 6; i++)
676 dev->dev_addr[i] = tuple->TupleData[i+2];
677 return 0;
678 };
679
680
681 static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
682 {
683 struct net_device *dev = link->priv;
684 int rc;
685
686 /* Read the station address from tuple 0x90, subtuple 0x04 */
687 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
688 return -1;
689
690 if (((manfid == MANFID_OSITECH) &&
691 (cardid == PRODID_OSITECH_SEVEN)) ||
692 ((manfid == MANFID_PSION) &&
693 (cardid == PRODID_PSION_NET100))) {
694 rc = osi_load_firmware(link);
695 if (rc)
696 return rc;
697 } else if (manfid == MANFID_OSITECH) {
698 /* Make sure both functions are powered up */
699 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
700 /* Now, turn on the interrupt for both card functions */
701 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
702 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
703 inw(link->resource[0]->start + OSITECH_AUI_PWR),
704 inw(link->resource[0]->start + OSITECH_RESET_ISR));
705 }
706 return 0;
707 }
708
709 static int smc91c92_suspend(struct pcmcia_device *link)
710 {
711 struct net_device *dev = link->priv;
712
713 if (link->open)
714 netif_device_detach(dev);
715
716 return 0;
717 }
718
719 static int smc91c92_resume(struct pcmcia_device *link)
720 {
721 struct net_device *dev = link->priv;
722 struct smc_private *smc = netdev_priv(dev);
723 int i;
724
725 if ((smc->manfid == MANFID_MEGAHERTZ) &&
726 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
727 mhz_3288_power(link);
728 if (smc->manfid == MANFID_MOTOROLA)
729 mot_config(link);
730 if ((smc->manfid == MANFID_OSITECH) &&
731 (smc->cardid != PRODID_OSITECH_SEVEN)) {
732 /* Power up the card and enable interrupts */
733 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
734 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
735 }
736 if (((smc->manfid == MANFID_OSITECH) &&
737 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
738 ((smc->manfid == MANFID_PSION) &&
739 (smc->cardid == PRODID_PSION_NET100))) {
740 i = osi_load_firmware(link);
741 if (i) {
742 netdev_err(dev, "Failed to load firmware\n");
743 return i;
744 }
745 }
746 if (link->open) {
747 smc_reset(dev);
748 netif_device_attach(dev);
749 }
750
751 return 0;
752 }
753
754
755 /*======================================================================
756
757 This verifies that the chip is some SMC91cXX variant, and returns
758 the revision code if successful. Otherwise, it returns -ENODEV.
759
760 ======================================================================*/
761
762 static int check_sig(struct pcmcia_device *link)
763 {
764 struct net_device *dev = link->priv;
765 unsigned int ioaddr = dev->base_addr;
766 int width;
767 u_short s;
768
769 SMC_SELECT_BANK(1);
770 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
771 /* Try powering up the chip */
772 outw(0, ioaddr + CONTROL);
773 mdelay(55);
774 }
775
776 /* Try setting bus width */
777 width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
778 s = inb(ioaddr + CONFIG);
779 if (width)
780 s |= CFG_16BIT;
781 else
782 s &= ~CFG_16BIT;
783 outb(s, ioaddr + CONFIG);
784
785 /* Check Base Address Register to make sure bus width is OK */
786 s = inw(ioaddr + BASE_ADDR);
787 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
788 ((s >> 8) != (s & 0xff))) {
789 SMC_SELECT_BANK(3);
790 s = inw(ioaddr + REVISION);
791 return s & 0xff;
792 }
793
794 if (width) {
795 netdev_info(dev, "using 8-bit IO window\n");
796
797 smc91c92_suspend(link);
798 pcmcia_fixup_iowidth(link);
799 smc91c92_resume(link);
800 return check_sig(link);
801 }
802 return -ENODEV;
803 }
804
805 static int smc91c92_config(struct pcmcia_device *link)
806 {
807 struct net_device *dev = link->priv;
808 struct smc_private *smc = netdev_priv(dev);
809 char *name;
810 int i, rev, j = 0;
811 unsigned int ioaddr;
812 u_long mir;
813
814 dev_dbg(&link->dev, "smc91c92_config\n");
815
816 smc->manfid = link->manf_id;
817 smc->cardid = link->card_id;
818
819 if ((smc->manfid == MANFID_OSITECH) &&
820 (smc->cardid != PRODID_OSITECH_SEVEN)) {
821 i = osi_config(link);
822 } else if ((smc->manfid == MANFID_MOTOROLA) ||
823 ((smc->manfid == MANFID_MEGAHERTZ) &&
824 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
825 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
826 i = mhz_mfc_config(link);
827 } else {
828 i = smc_config(link);
829 }
830 if (i)
831 goto config_failed;
832
833 i = pcmcia_request_irq(link, smc_interrupt);
834 if (i)
835 goto config_failed;
836 i = pcmcia_enable_device(link);
837 if (i)
838 goto config_failed;
839
840 if (smc->manfid == MANFID_MOTOROLA)
841 mot_config(link);
842
843 dev->irq = link->irq;
844
845 if ((if_port >= 0) && (if_port <= 2))
846 dev->if_port = if_port;
847 else
848 dev_notice(&link->dev, "invalid if_port requested\n");
849
850 switch (smc->manfid) {
851 case MANFID_OSITECH:
852 case MANFID_PSION:
853 i = osi_setup(link, smc->manfid, smc->cardid); break;
854 case MANFID_SMC:
855 case MANFID_NEW_MEDIA:
856 i = smc_setup(link); break;
857 case 0x128: /* For broken Megahertz cards */
858 case MANFID_MEGAHERTZ:
859 i = mhz_setup(link); break;
860 case MANFID_MOTOROLA:
861 default: /* get the hw address from EEPROM */
862 i = mot_setup(link); break;
863 }
864
865 if (i != 0) {
866 dev_notice(&link->dev, "Unable to find hardware address.\n");
867 goto config_failed;
868 }
869
870 smc->duplex = 0;
871 smc->rx_ovrn = 0;
872
873 rev = check_sig(link);
874 name = "???";
875 if (rev > 0)
876 switch (rev >> 4) {
877 case 3: name = "92"; break;
878 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
879 case 5: name = "95"; break;
880 case 7: name = "100"; break;
881 case 8: name = "100-FD"; break;
882 case 9: name = "110"; break;
883 }
884
885 ioaddr = dev->base_addr;
886 if (rev > 0) {
887 u_long mcr;
888 SMC_SELECT_BANK(0);
889 mir = inw(ioaddr + MEMINFO) & 0xff;
890 if (mir == 0xff) mir++;
891 /* Get scale factor for memory size */
892 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
893 mir *= 128 * (1<<((mcr >> 9) & 7));
894 SMC_SELECT_BANK(1);
895 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
896 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
897 if (smc->manfid == MANFID_OSITECH)
898 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
899 if ((rev >> 4) >= 7)
900 smc->cfg |= CFG_MII_SELECT;
901 } else
902 mir = 0;
903
904 if (smc->cfg & CFG_MII_SELECT) {
905 SMC_SELECT_BANK(3);
906
907 for (i = 0; i < 32; i++) {
908 j = mdio_read(dev, i, 1);
909 if ((j != 0) && (j != 0xffff)) break;
910 }
911 smc->mii_if.phy_id = (i < 32) ? i : -1;
912
913 SMC_SELECT_BANK(0);
914 }
915
916 SET_NETDEV_DEV(dev, &link->dev);
917
918 if (register_netdev(dev) != 0) {
919 dev_err(&link->dev, "register_netdev() failed\n");
920 goto config_undo;
921 }
922
923 netdev_info(dev, "smc91c%s rev %d: io %#3lx, irq %d, hw_addr %pM\n",
924 name, (rev & 0x0f), dev->base_addr, dev->irq, dev->dev_addr);
925
926 if (rev > 0) {
927 if (mir & 0x3ff)
928 netdev_info(dev, " %lu byte", mir);
929 else
930 netdev_info(dev, " %lu kb", mir>>10);
931 pr_cont(" buffer, %s xcvr\n",
932 (smc->cfg & CFG_MII_SELECT) ? "MII" : if_names[dev->if_port]);
933 }
934
935 if (smc->cfg & CFG_MII_SELECT) {
936 if (smc->mii_if.phy_id != -1) {
937 netdev_dbg(dev, " MII transceiver at index %d, status %x\n",
938 smc->mii_if.phy_id, j);
939 } else {
940 netdev_notice(dev, " No MII transceivers found!\n");
941 }
942 }
943 return 0;
944
945 config_undo:
946 unregister_netdev(dev);
947 config_failed:
948 smc91c92_release(link);
949 free_netdev(dev);
950 return -ENODEV;
951 } /* smc91c92_config */
952
953 static void smc91c92_release(struct pcmcia_device *link)
954 {
955 dev_dbg(&link->dev, "smc91c92_release\n");
956 if (link->resource[2]->end) {
957 struct net_device *dev = link->priv;
958 struct smc_private *smc = netdev_priv(dev);
959 iounmap(smc->base);
960 }
961 pcmcia_disable_device(link);
962 }
963
964 /*======================================================================
965
966 MII interface support for SMC91cXX based cards
967 ======================================================================*/
968
969 #define MDIO_SHIFT_CLK 0x04
970 #define MDIO_DATA_OUT 0x01
971 #define MDIO_DIR_WRITE 0x08
972 #define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
973 #define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
974 #define MDIO_DATA_READ 0x02
975
976 static void mdio_sync(unsigned int addr)
977 {
978 int bits;
979 for (bits = 0; bits < 32; bits++) {
980 outb(MDIO_DATA_WRITE1, addr);
981 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
982 }
983 }
984
985 static int mdio_read(struct net_device *dev, int phy_id, int loc)
986 {
987 unsigned int addr = dev->base_addr + MGMT;
988 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
989 int i, retval = 0;
990
991 mdio_sync(addr);
992 for (i = 13; i >= 0; i--) {
993 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
994 outb(dat, addr);
995 outb(dat | MDIO_SHIFT_CLK, addr);
996 }
997 for (i = 19; i > 0; i--) {
998 outb(0, addr);
999 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1000 outb(MDIO_SHIFT_CLK, addr);
1001 }
1002 return (retval>>1) & 0xffff;
1003 }
1004
1005 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1006 {
1007 unsigned int addr = dev->base_addr + MGMT;
1008 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1009 int i;
1010
1011 mdio_sync(addr);
1012 for (i = 31; i >= 0; i--) {
1013 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1014 outb(dat, addr);
1015 outb(dat | MDIO_SHIFT_CLK, addr);
1016 }
1017 for (i = 1; i >= 0; i--) {
1018 outb(0, addr);
1019 outb(MDIO_SHIFT_CLK, addr);
1020 }
1021 }
1022
1023 /*======================================================================
1024
1025 The driver core code, most of which should be common with a
1026 non-PCMCIA implementation.
1027
1028 ======================================================================*/
1029
1030 #ifdef PCMCIA_DEBUG
1031 static void smc_dump(struct net_device *dev)
1032 {
1033 unsigned int ioaddr = dev->base_addr;
1034 u_short i, w, save;
1035 save = inw(ioaddr + BANK_SELECT);
1036 for (w = 0; w < 4; w++) {
1037 SMC_SELECT_BANK(w);
1038 netdev_dbg(dev, "bank %d: ", w);
1039 for (i = 0; i < 14; i += 2)
1040 pr_cont(" %04x", inw(ioaddr + i));
1041 pr_cont("\n");
1042 }
1043 outw(save, ioaddr + BANK_SELECT);
1044 }
1045 #endif
1046
1047 static int smc_open(struct net_device *dev)
1048 {
1049 struct smc_private *smc = netdev_priv(dev);
1050 struct pcmcia_device *link = smc->p_dev;
1051
1052 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1053 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
1054 #ifdef PCMCIA_DEBUG
1055 smc_dump(dev);
1056 #endif
1057
1058 /* Check that the PCMCIA card is still here. */
1059 if (!pcmcia_dev_present(link))
1060 return -ENODEV;
1061 /* Physical device present signature. */
1062 if (check_sig(link) < 0) {
1063 netdev_info(dev, "Yikes! Bad chip signature!\n");
1064 return -ENODEV;
1065 }
1066 link->open++;
1067
1068 netif_start_queue(dev);
1069 smc->saved_skb = NULL;
1070 smc->packets_waiting = 0;
1071
1072 smc_reset(dev);
1073 init_timer(&smc->media);
1074 smc->media.function = media_check;
1075 smc->media.data = (u_long) dev;
1076 smc->media.expires = jiffies + HZ;
1077 add_timer(&smc->media);
1078
1079 return 0;
1080 } /* smc_open */
1081
1082 /*====================================================================*/
1083
1084 static int smc_close(struct net_device *dev)
1085 {
1086 struct smc_private *smc = netdev_priv(dev);
1087 struct pcmcia_device *link = smc->p_dev;
1088 unsigned int ioaddr = dev->base_addr;
1089
1090 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1091 dev->name, inw(ioaddr + BANK_SELECT));
1092
1093 netif_stop_queue(dev);
1094
1095 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1096 Don't bother to check for chip present. */
1097 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1098 outw(0, ioaddr + INTERRUPT);
1099 SMC_SELECT_BANK(0);
1100 mask_bits(0xff00, ioaddr + RCR);
1101 mask_bits(0xff00, ioaddr + TCR);
1102
1103 /* Put the chip into power-down mode. */
1104 SMC_SELECT_BANK(1);
1105 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1106
1107 link->open--;
1108 del_timer_sync(&smc->media);
1109
1110 return 0;
1111 } /* smc_close */
1112
1113 /*======================================================================
1114
1115 Transfer a packet to the hardware and trigger the packet send.
1116 This may be called at either from either the Tx queue code
1117 or the interrupt handler.
1118
1119 ======================================================================*/
1120
1121 static void smc_hardware_send_packet(struct net_device * dev)
1122 {
1123 struct smc_private *smc = netdev_priv(dev);
1124 struct sk_buff *skb = smc->saved_skb;
1125 unsigned int ioaddr = dev->base_addr;
1126 u_char packet_no;
1127
1128 if (!skb) {
1129 netdev_err(dev, "In XMIT with no packet to send\n");
1130 return;
1131 }
1132
1133 /* There should be a packet slot waiting. */
1134 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1135 if (packet_no & 0x80) {
1136 /* If not, there is a hardware problem! Likely an ejected card. */
1137 netdev_warn(dev, "hardware Tx buffer allocation failed, status %#2.2x\n",
1138 packet_no);
1139 dev_kfree_skb_irq(skb);
1140 smc->saved_skb = NULL;
1141 netif_start_queue(dev);
1142 return;
1143 }
1144
1145 dev->stats.tx_bytes += skb->len;
1146 /* The card should use the just-allocated buffer. */
1147 outw(packet_no, ioaddr + PNR_ARR);
1148 /* point to the beginning of the packet */
1149 outw(PTR_AUTOINC , ioaddr + POINTER);
1150
1151 /* Send the packet length (+6 for status, length and ctl byte)
1152 and the status word (set to zeros). */
1153 {
1154 u_char *buf = skb->data;
1155 u_int length = skb->len; /* The chip will pad to ethernet min. */
1156
1157 netdev_dbg(dev, "Trying to xmit packet of length %d\n", length);
1158
1159 /* send the packet length: +6 for status word, length, and ctl */
1160 outw(0, ioaddr + DATA_1);
1161 outw(length + 6, ioaddr + DATA_1);
1162 outsw(ioaddr + DATA_1, buf, length >> 1);
1163
1164 /* The odd last byte, if there is one, goes in the control word. */
1165 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1166 }
1167
1168 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1169 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1170 (inw(ioaddr + INTERRUPT) & 0xff00),
1171 ioaddr + INTERRUPT);
1172
1173 /* The chip does the rest of the work. */
1174 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1175
1176 smc->saved_skb = NULL;
1177 dev_kfree_skb_irq(skb);
1178 dev->trans_start = jiffies;
1179 netif_start_queue(dev);
1180 }
1181
1182 /*====================================================================*/
1183
1184 static void smc_tx_timeout(struct net_device *dev)
1185 {
1186 struct smc_private *smc = netdev_priv(dev);
1187 unsigned int ioaddr = dev->base_addr;
1188
1189 netdev_notice(dev, "transmit timed out, Tx_status %2.2x status %4.4x.\n",
1190 inw(ioaddr)&0xff, inw(ioaddr + 2));
1191 dev->stats.tx_errors++;
1192 smc_reset(dev);
1193 dev->trans_start = jiffies; /* prevent tx timeout */
1194 smc->saved_skb = NULL;
1195 netif_wake_queue(dev);
1196 }
1197
1198 static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1199 struct net_device *dev)
1200 {
1201 struct smc_private *smc = netdev_priv(dev);
1202 unsigned int ioaddr = dev->base_addr;
1203 u_short num_pages;
1204 short time_out, ir;
1205 unsigned long flags;
1206
1207 netif_stop_queue(dev);
1208
1209 netdev_dbg(dev, "smc_start_xmit(length = %d) called, status %04x\n",
1210 skb->len, inw(ioaddr + 2));
1211
1212 if (smc->saved_skb) {
1213 /* THIS SHOULD NEVER HAPPEN. */
1214 dev->stats.tx_aborted_errors++;
1215 netdev_dbg(dev, "Internal error -- sent packet while busy\n");
1216 return NETDEV_TX_BUSY;
1217 }
1218 smc->saved_skb = skb;
1219
1220 num_pages = skb->len >> 8;
1221
1222 if (num_pages > 7) {
1223 netdev_err(dev, "Far too big packet error: %d pages\n", num_pages);
1224 dev_kfree_skb (skb);
1225 smc->saved_skb = NULL;
1226 dev->stats.tx_dropped++;
1227 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1228 }
1229 /* A packet is now waiting. */
1230 smc->packets_waiting++;
1231
1232 spin_lock_irqsave(&smc->lock, flags);
1233 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1234
1235 /* need MC_RESET to keep the memory consistent. errata? */
1236 if (smc->rx_ovrn) {
1237 outw(MC_RESET, ioaddr + MMU_CMD);
1238 smc->rx_ovrn = 0;
1239 }
1240
1241 /* Allocate the memory; send the packet now if we win. */
1242 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1243 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1244 ir = inw(ioaddr+INTERRUPT);
1245 if (ir & IM_ALLOC_INT) {
1246 /* Acknowledge the interrupt, send the packet. */
1247 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1248 smc_hardware_send_packet(dev); /* Send the packet now.. */
1249 spin_unlock_irqrestore(&smc->lock, flags);
1250 return NETDEV_TX_OK;
1251 }
1252 }
1253
1254 /* Otherwise defer until the Tx-space-allocated interrupt. */
1255 netdev_dbg(dev, "memory allocation deferred.\n");
1256 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
1257 spin_unlock_irqrestore(&smc->lock, flags);
1258
1259 return NETDEV_TX_OK;
1260 }
1261
1262 /*======================================================================
1263
1264 Handle a Tx anomalous event. Entered while in Window 2.
1265
1266 ======================================================================*/
1267
1268 static void smc_tx_err(struct net_device * dev)
1269 {
1270 struct smc_private *smc = netdev_priv(dev);
1271 unsigned int ioaddr = dev->base_addr;
1272 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1273 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1274 int tx_status;
1275
1276 /* select this as the packet to read from */
1277 outw(packet_no, ioaddr + PNR_ARR);
1278
1279 /* read the first word from this packet */
1280 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1281
1282 tx_status = inw(ioaddr + DATA_1);
1283
1284 dev->stats.tx_errors++;
1285 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1286 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1287 if (tx_status & TS_16COL) {
1288 dev->stats.tx_aborted_errors++;
1289 smc->tx_err++;
1290 }
1291
1292 if (tx_status & TS_SUCCESS) {
1293 netdev_notice(dev, "Successful packet caused error interrupt?\n");
1294 }
1295 /* re-enable transmit */
1296 SMC_SELECT_BANK(0);
1297 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1298 SMC_SELECT_BANK(2);
1299
1300 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1301
1302 /* one less packet waiting for me */
1303 smc->packets_waiting--;
1304
1305 outw(saved_packet, ioaddr + PNR_ARR);
1306 }
1307
1308 /*====================================================================*/
1309
1310 static void smc_eph_irq(struct net_device *dev)
1311 {
1312 struct smc_private *smc = netdev_priv(dev);
1313 unsigned int ioaddr = dev->base_addr;
1314 u_short card_stats, ephs;
1315
1316 SMC_SELECT_BANK(0);
1317 ephs = inw(ioaddr + EPH);
1318 netdev_dbg(dev, "Ethernet protocol handler interrupt, status %4.4x.\n",
1319 ephs);
1320 /* Could be a counter roll-over warning: update stats. */
1321 card_stats = inw(ioaddr + COUNTER);
1322 /* single collisions */
1323 dev->stats.collisions += card_stats & 0xF;
1324 card_stats >>= 4;
1325 /* multiple collisions */
1326 dev->stats.collisions += card_stats & 0xF;
1327 #if 0 /* These are for when linux supports these statistics */
1328 card_stats >>= 4; /* deferred */
1329 card_stats >>= 4; /* excess deferred */
1330 #endif
1331 /* If we had a transmit error we must re-enable the transmitter. */
1332 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1333
1334 /* Clear a link error interrupt. */
1335 SMC_SELECT_BANK(1);
1336 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1337 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1338 ioaddr + CONTROL);
1339 SMC_SELECT_BANK(2);
1340 }
1341
1342 /*====================================================================*/
1343
1344 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1345 {
1346 struct net_device *dev = dev_id;
1347 struct smc_private *smc = netdev_priv(dev);
1348 unsigned int ioaddr;
1349 u_short saved_bank, saved_pointer, mask, status;
1350 unsigned int handled = 1;
1351 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1352
1353 if (!netif_device_present(dev))
1354 return IRQ_NONE;
1355
1356 ioaddr = dev->base_addr;
1357
1358 netdev_dbg(dev, "SMC91c92 interrupt %d at %#x.\n",
1359 irq, ioaddr);
1360
1361 spin_lock(&smc->lock);
1362 smc->watchdog = 0;
1363 saved_bank = inw(ioaddr + BANK_SELECT);
1364 if ((saved_bank & 0xff00) != 0x3300) {
1365 /* The device does not exist -- the card could be off-line, or
1366 maybe it has been ejected. */
1367 netdev_dbg(dev, "SMC91c92 interrupt %d for non-existent/ejected device.\n",
1368 irq);
1369 handled = 0;
1370 goto irq_done;
1371 }
1372
1373 SMC_SELECT_BANK(2);
1374 saved_pointer = inw(ioaddr + POINTER);
1375 mask = inw(ioaddr + INTERRUPT) >> 8;
1376 /* clear all interrupts */
1377 outw(0, ioaddr + INTERRUPT);
1378
1379 do { /* read the status flag, and mask it */
1380 status = inw(ioaddr + INTERRUPT) & 0xff;
1381 netdev_dbg(dev, "Status is %#2.2x (mask %#2.2x).\n",
1382 status, mask);
1383 if ((status & mask) == 0) {
1384 if (bogus_cnt == INTR_WORK)
1385 handled = 0;
1386 break;
1387 }
1388 if (status & IM_RCV_INT) {
1389 /* Got a packet(s). */
1390 smc_rx(dev);
1391 }
1392 if (status & IM_TX_INT) {
1393 smc_tx_err(dev);
1394 outw(IM_TX_INT, ioaddr + INTERRUPT);
1395 }
1396 status &= mask;
1397 if (status & IM_TX_EMPTY_INT) {
1398 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1399 mask &= ~IM_TX_EMPTY_INT;
1400 dev->stats.tx_packets += smc->packets_waiting;
1401 smc->packets_waiting = 0;
1402 }
1403 if (status & IM_ALLOC_INT) {
1404 /* Clear this interrupt so it doesn't happen again */
1405 mask &= ~IM_ALLOC_INT;
1406
1407 smc_hardware_send_packet(dev);
1408
1409 /* enable xmit interrupts based on this */
1410 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1411
1412 /* and let the card send more packets to me */
1413 netif_wake_queue(dev);
1414 }
1415 if (status & IM_RX_OVRN_INT) {
1416 dev->stats.rx_errors++;
1417 dev->stats.rx_fifo_errors++;
1418 if (smc->duplex)
1419 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1420 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1421 }
1422 if (status & IM_EPH_INT)
1423 smc_eph_irq(dev);
1424 } while (--bogus_cnt);
1425
1426 netdev_dbg(dev, " Restoring saved registers mask %2.2x bank %4.4x pointer %4.4x.\n",
1427 mask, saved_bank, saved_pointer);
1428
1429 /* restore state register */
1430 outw((mask<<8), ioaddr + INTERRUPT);
1431 outw(saved_pointer, ioaddr + POINTER);
1432 SMC_SELECT_BANK(saved_bank);
1433
1434 netdev_dbg(dev, "Exiting interrupt IRQ%d.\n", irq);
1435
1436 irq_done:
1437
1438 if ((smc->manfid == MANFID_OSITECH) &&
1439 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1440 /* Retrigger interrupt if needed */
1441 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1442 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1443 }
1444 if (smc->manfid == MANFID_MOTOROLA) {
1445 u_char cor;
1446 cor = readb(smc->base + MOT_UART + CISREG_COR);
1447 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1448 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1449 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1450 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1451 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1452 }
1453
1454 if ((smc->base != NULL) && /* Megahertz MFC's */
1455 (smc->manfid == MANFID_MEGAHERTZ) &&
1456 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1457
1458 u_char tmp;
1459 tmp = readb(smc->base+MEGAHERTZ_ISR);
1460 tmp = readb(smc->base+MEGAHERTZ_ISR);
1461
1462 /* Retrigger interrupt if needed */
1463 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1464 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1465 }
1466
1467 spin_unlock(&smc->lock);
1468 return IRQ_RETVAL(handled);
1469 }
1470
1471 /*====================================================================*/
1472
1473 static void smc_rx(struct net_device *dev)
1474 {
1475 unsigned int ioaddr = dev->base_addr;
1476 int rx_status;
1477 int packet_length; /* Caution: not frame length, rather words
1478 to transfer from the chip. */
1479
1480 /* Assertion: we are in Window 2. */
1481
1482 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1483 netdev_err(dev, "smc_rx() with nothing on Rx FIFO\n");
1484 return;
1485 }
1486
1487 /* Reset the read pointer, and read the status and packet length. */
1488 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1489 rx_status = inw(ioaddr + DATA_1);
1490 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1491
1492 netdev_dbg(dev, "Receive status %4.4x length %d.\n",
1493 rx_status, packet_length);
1494
1495 if (!(rx_status & RS_ERRORS)) {
1496 /* do stuff to make a new packet */
1497 struct sk_buff *skb;
1498
1499 /* Note: packet_length adds 5 or 6 extra bytes here! */
1500 skb = netdev_alloc_skb(dev, packet_length+2);
1501
1502 if (skb == NULL) {
1503 netdev_dbg(dev, "Low memory, packet dropped.\n");
1504 dev->stats.rx_dropped++;
1505 outw(MC_RELEASE, ioaddr + MMU_CMD);
1506 return;
1507 }
1508
1509 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1510 skb_reserve(skb, 2);
1511 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1512 (packet_length+1)>>1);
1513 skb->protocol = eth_type_trans(skb, dev);
1514
1515 netif_rx(skb);
1516 dev->last_rx = jiffies;
1517 dev->stats.rx_packets++;
1518 dev->stats.rx_bytes += packet_length;
1519 if (rx_status & RS_MULTICAST)
1520 dev->stats.multicast++;
1521 } else {
1522 /* error ... */
1523 dev->stats.rx_errors++;
1524
1525 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1526 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
1527 dev->stats.rx_length_errors++;
1528 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1529 }
1530 /* Let the MMU free the memory of this packet. */
1531 outw(MC_RELEASE, ioaddr + MMU_CMD);
1532 }
1533
1534 /*======================================================================
1535
1536 Set the receive mode.
1537
1538 This routine is used by both the protocol level to notify us of
1539 promiscuous/multicast mode changes, and by the open/reset code to
1540 initialize the Rx registers. We always set the multicast list and
1541 leave the receiver running.
1542
1543 ======================================================================*/
1544
1545 static void set_rx_mode(struct net_device *dev)
1546 {
1547 unsigned int ioaddr = dev->base_addr;
1548 struct smc_private *smc = netdev_priv(dev);
1549 unsigned char multicast_table[8];
1550 unsigned long flags;
1551 u_short rx_cfg_setting;
1552 int i;
1553
1554 memset(multicast_table, 0, sizeof(multicast_table));
1555
1556 if (dev->flags & IFF_PROMISC) {
1557 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1558 } else if (dev->flags & IFF_ALLMULTI)
1559 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1560 else {
1561 if (!netdev_mc_empty(dev)) {
1562 struct netdev_hw_addr *ha;
1563
1564 netdev_for_each_mc_addr(ha, dev) {
1565 u_int position = ether_crc(6, ha->addr);
1566 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1567 }
1568 }
1569 rx_cfg_setting = RxStripCRC | RxEnable;
1570 }
1571
1572 /* Load MC table and Rx setting into the chip without interrupts. */
1573 spin_lock_irqsave(&smc->lock, flags);
1574 SMC_SELECT_BANK(3);
1575 for (i = 0; i < 8; i++)
1576 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1577 SMC_SELECT_BANK(0);
1578 outw(rx_cfg_setting, ioaddr + RCR);
1579 SMC_SELECT_BANK(2);
1580 spin_unlock_irqrestore(&smc->lock, flags);
1581 }
1582
1583 /*======================================================================
1584
1585 Senses when a card's config changes. Here, it's coax or TP.
1586
1587 ======================================================================*/
1588
1589 static int s9k_config(struct net_device *dev, struct ifmap *map)
1590 {
1591 struct smc_private *smc = netdev_priv(dev);
1592 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1593 if (smc->cfg & CFG_MII_SELECT)
1594 return -EOPNOTSUPP;
1595 else if (map->port > 2)
1596 return -EINVAL;
1597 dev->if_port = map->port;
1598 netdev_info(dev, "switched to %s port\n", if_names[dev->if_port]);
1599 smc_reset(dev);
1600 }
1601 return 0;
1602 }
1603
1604 /*======================================================================
1605
1606 Reset the chip, reloading every register that might be corrupted.
1607
1608 ======================================================================*/
1609
1610 /*
1611 Set transceiver type, perhaps to something other than what the user
1612 specified in dev->if_port.
1613 */
1614 static void smc_set_xcvr(struct net_device *dev, int if_port)
1615 {
1616 struct smc_private *smc = netdev_priv(dev);
1617 unsigned int ioaddr = dev->base_addr;
1618 u_short saved_bank;
1619
1620 saved_bank = inw(ioaddr + BANK_SELECT);
1621 SMC_SELECT_BANK(1);
1622 if (if_port == 2) {
1623 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1624 if ((smc->manfid == MANFID_OSITECH) &&
1625 (smc->cardid != PRODID_OSITECH_SEVEN))
1626 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1627 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1628 } else {
1629 outw(smc->cfg, ioaddr + CONFIG);
1630 if ((smc->manfid == MANFID_OSITECH) &&
1631 (smc->cardid != PRODID_OSITECH_SEVEN))
1632 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1633 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1634 }
1635 SMC_SELECT_BANK(saved_bank);
1636 }
1637
1638 static void smc_reset(struct net_device *dev)
1639 {
1640 unsigned int ioaddr = dev->base_addr;
1641 struct smc_private *smc = netdev_priv(dev);
1642 int i;
1643
1644 netdev_dbg(dev, "smc91c92 reset called.\n");
1645
1646 /* The first interaction must be a write to bring the chip out
1647 of sleep mode. */
1648 SMC_SELECT_BANK(0);
1649 /* Reset the chip. */
1650 outw(RCR_SOFTRESET, ioaddr + RCR);
1651 udelay(10);
1652
1653 /* Clear the transmit and receive configuration registers. */
1654 outw(RCR_CLEAR, ioaddr + RCR);
1655 outw(TCR_CLEAR, ioaddr + TCR);
1656
1657 /* Set the Window 1 control, configuration and station addr registers.
1658 No point in writing the I/O base register ;-> */
1659 SMC_SELECT_BANK(1);
1660 /* Automatically release successfully transmitted packets,
1661 Accept link errors, counter and Tx error interrupts. */
1662 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1663 ioaddr + CONTROL);
1664 smc_set_xcvr(dev, dev->if_port);
1665 if ((smc->manfid == MANFID_OSITECH) &&
1666 (smc->cardid != PRODID_OSITECH_SEVEN))
1667 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1668 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1669 ioaddr - 0x10 + OSITECH_AUI_PWR);
1670
1671 /* Fill in the physical address. The databook is wrong about the order! */
1672 for (i = 0; i < 6; i += 2)
1673 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1674 ioaddr + ADDR0 + i);
1675
1676 /* Reset the MMU */
1677 SMC_SELECT_BANK(2);
1678 outw(MC_RESET, ioaddr + MMU_CMD);
1679 outw(0, ioaddr + INTERRUPT);
1680
1681 /* Re-enable the chip. */
1682 SMC_SELECT_BANK(0);
1683 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1684 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1685 set_rx_mode(dev);
1686
1687 if (smc->cfg & CFG_MII_SELECT) {
1688 SMC_SELECT_BANK(3);
1689
1690 /* Reset MII */
1691 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1692
1693 /* Advertise 100F, 100H, 10F, 10H */
1694 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1695
1696 /* Restart MII autonegotiation */
1697 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1698 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1699 }
1700
1701 /* Enable interrupts. */
1702 SMC_SELECT_BANK(2);
1703 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1704 ioaddr + INTERRUPT);
1705 }
1706
1707 /*======================================================================
1708
1709 Media selection timer routine
1710
1711 ======================================================================*/
1712
1713 static void media_check(u_long arg)
1714 {
1715 struct net_device *dev = (struct net_device *) arg;
1716 struct smc_private *smc = netdev_priv(dev);
1717 unsigned int ioaddr = dev->base_addr;
1718 u_short i, media, saved_bank;
1719 u_short link;
1720 unsigned long flags;
1721
1722 spin_lock_irqsave(&smc->lock, flags);
1723
1724 saved_bank = inw(ioaddr + BANK_SELECT);
1725
1726 if (!netif_device_present(dev))
1727 goto reschedule;
1728
1729 SMC_SELECT_BANK(2);
1730
1731 /* need MC_RESET to keep the memory consistent. errata? */
1732 if (smc->rx_ovrn) {
1733 outw(MC_RESET, ioaddr + MMU_CMD);
1734 smc->rx_ovrn = 0;
1735 }
1736 i = inw(ioaddr + INTERRUPT);
1737 SMC_SELECT_BANK(0);
1738 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1739 SMC_SELECT_BANK(1);
1740 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1741
1742 SMC_SELECT_BANK(saved_bank);
1743 spin_unlock_irqrestore(&smc->lock, flags);
1744
1745 /* Check for pending interrupt with watchdog flag set: with
1746 this, we can limp along even if the interrupt is blocked */
1747 if (smc->watchdog++ && ((i>>8) & i)) {
1748 if (!smc->fast_poll)
1749 netdev_info(dev, "interrupt(s) dropped!\n");
1750 local_irq_save(flags);
1751 smc_interrupt(dev->irq, dev);
1752 local_irq_restore(flags);
1753 smc->fast_poll = HZ;
1754 }
1755 if (smc->fast_poll) {
1756 smc->fast_poll--;
1757 smc->media.expires = jiffies + HZ/100;
1758 add_timer(&smc->media);
1759 return;
1760 }
1761
1762 spin_lock_irqsave(&smc->lock, flags);
1763
1764 saved_bank = inw(ioaddr + BANK_SELECT);
1765
1766 if (smc->cfg & CFG_MII_SELECT) {
1767 if (smc->mii_if.phy_id < 0)
1768 goto reschedule;
1769
1770 SMC_SELECT_BANK(3);
1771 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1772 if (!link || (link == 0xffff)) {
1773 netdev_info(dev, "MII is missing!\n");
1774 smc->mii_if.phy_id = -1;
1775 goto reschedule;
1776 }
1777
1778 link &= 0x0004;
1779 if (link != smc->link_status) {
1780 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1781 netdev_info(dev, "%s link beat\n", link ? "found" : "lost");
1782 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1783 ? TCR_FDUPLX : 0);
1784 if (link) {
1785 netdev_info(dev, "autonegotiation complete: "
1786 "%dbaseT-%cD selected\n",
1787 (p & 0x0180) ? 100 : 10, smc->duplex ? 'F' : 'H');
1788 }
1789 SMC_SELECT_BANK(0);
1790 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1791 smc->link_status = link;
1792 }
1793 goto reschedule;
1794 }
1795
1796 /* Ignore collisions unless we've had no rx's recently */
1797 if (time_after(jiffies, dev->last_rx + HZ)) {
1798 if (smc->tx_err || (smc->media_status & EPH_16COL))
1799 media |= EPH_16COL;
1800 }
1801 smc->tx_err = 0;
1802
1803 if (media != smc->media_status) {
1804 if ((media & smc->media_status & 1) &&
1805 ((smc->media_status ^ media) & EPH_LINK_OK))
1806 netdev_info(dev, "%s link beat\n",
1807 smc->media_status & EPH_LINK_OK ? "lost" : "found");
1808 else if ((media & smc->media_status & 2) &&
1809 ((smc->media_status ^ media) & EPH_16COL))
1810 netdev_info(dev, "coax cable %s\n",
1811 media & EPH_16COL ? "problem" : "ok");
1812 if (dev->if_port == 0) {
1813 if (media & 1) {
1814 if (media & EPH_LINK_OK)
1815 netdev_info(dev, "flipped to 10baseT\n");
1816 else
1817 smc_set_xcvr(dev, 2);
1818 } else {
1819 if (media & EPH_16COL)
1820 smc_set_xcvr(dev, 1);
1821 else
1822 netdev_info(dev, "flipped to 10base2\n");
1823 }
1824 }
1825 smc->media_status = media;
1826 }
1827
1828 reschedule:
1829 smc->media.expires = jiffies + HZ;
1830 add_timer(&smc->media);
1831 SMC_SELECT_BANK(saved_bank);
1832 spin_unlock_irqrestore(&smc->lock, flags);
1833 }
1834
1835 static int smc_link_ok(struct net_device *dev)
1836 {
1837 unsigned int ioaddr = dev->base_addr;
1838 struct smc_private *smc = netdev_priv(dev);
1839
1840 if (smc->cfg & CFG_MII_SELECT) {
1841 return mii_link_ok(&smc->mii_if);
1842 } else {
1843 SMC_SELECT_BANK(0);
1844 return inw(ioaddr + EPH) & EPH_LINK_OK;
1845 }
1846 }
1847
1848 static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1849 {
1850 u16 tmp;
1851 unsigned int ioaddr = dev->base_addr;
1852
1853 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1854 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1855
1856 SMC_SELECT_BANK(1);
1857 tmp = inw(ioaddr + CONFIG);
1858 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1859 ecmd->transceiver = XCVR_INTERNAL;
1860 ethtool_cmd_speed_set(ecmd, SPEED_10);
1861 ecmd->phy_address = ioaddr + MGMT;
1862
1863 SMC_SELECT_BANK(0);
1864 tmp = inw(ioaddr + TCR);
1865 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1866
1867 return 0;
1868 }
1869
1870 static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1871 {
1872 u16 tmp;
1873 unsigned int ioaddr = dev->base_addr;
1874
1875 if (ethtool_cmd_speed(ecmd) != SPEED_10)
1876 return -EINVAL;
1877 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1878 return -EINVAL;
1879 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1880 return -EINVAL;
1881 if (ecmd->transceiver != XCVR_INTERNAL)
1882 return -EINVAL;
1883
1884 if (ecmd->port == PORT_AUI)
1885 smc_set_xcvr(dev, 1);
1886 else
1887 smc_set_xcvr(dev, 0);
1888
1889 SMC_SELECT_BANK(0);
1890 tmp = inw(ioaddr + TCR);
1891 if (ecmd->duplex == DUPLEX_FULL)
1892 tmp |= TCR_FDUPLX;
1893 else
1894 tmp &= ~TCR_FDUPLX;
1895 outw(tmp, ioaddr + TCR);
1896
1897 return 0;
1898 }
1899
1900 static int check_if_running(struct net_device *dev)
1901 {
1902 if (!netif_running(dev))
1903 return -EINVAL;
1904 return 0;
1905 }
1906
1907 static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1908 {
1909 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1910 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1911 }
1912
1913 static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1914 {
1915 struct smc_private *smc = netdev_priv(dev);
1916 unsigned int ioaddr = dev->base_addr;
1917 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1918 int ret;
1919 unsigned long flags;
1920
1921 spin_lock_irqsave(&smc->lock, flags);
1922 SMC_SELECT_BANK(3);
1923 if (smc->cfg & CFG_MII_SELECT)
1924 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1925 else
1926 ret = smc_netdev_get_ecmd(dev, ecmd);
1927 SMC_SELECT_BANK(saved_bank);
1928 spin_unlock_irqrestore(&smc->lock, flags);
1929 return ret;
1930 }
1931
1932 static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1933 {
1934 struct smc_private *smc = netdev_priv(dev);
1935 unsigned int ioaddr = dev->base_addr;
1936 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1937 int ret;
1938 unsigned long flags;
1939
1940 spin_lock_irqsave(&smc->lock, flags);
1941 SMC_SELECT_BANK(3);
1942 if (smc->cfg & CFG_MII_SELECT)
1943 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
1944 else
1945 ret = smc_netdev_set_ecmd(dev, ecmd);
1946 SMC_SELECT_BANK(saved_bank);
1947 spin_unlock_irqrestore(&smc->lock, flags);
1948 return ret;
1949 }
1950
1951 static u32 smc_get_link(struct net_device *dev)
1952 {
1953 struct smc_private *smc = netdev_priv(dev);
1954 unsigned int ioaddr = dev->base_addr;
1955 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1956 u32 ret;
1957 unsigned long flags;
1958
1959 spin_lock_irqsave(&smc->lock, flags);
1960 SMC_SELECT_BANK(3);
1961 ret = smc_link_ok(dev);
1962 SMC_SELECT_BANK(saved_bank);
1963 spin_unlock_irqrestore(&smc->lock, flags);
1964 return ret;
1965 }
1966
1967 static int smc_nway_reset(struct net_device *dev)
1968 {
1969 struct smc_private *smc = netdev_priv(dev);
1970 if (smc->cfg & CFG_MII_SELECT) {
1971 unsigned int ioaddr = dev->base_addr;
1972 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1973 int res;
1974
1975 SMC_SELECT_BANK(3);
1976 res = mii_nway_restart(&smc->mii_if);
1977 SMC_SELECT_BANK(saved_bank);
1978
1979 return res;
1980 } else
1981 return -EOPNOTSUPP;
1982 }
1983
1984 static const struct ethtool_ops ethtool_ops = {
1985 .begin = check_if_running,
1986 .get_drvinfo = smc_get_drvinfo,
1987 .get_settings = smc_get_settings,
1988 .set_settings = smc_set_settings,
1989 .get_link = smc_get_link,
1990 .nway_reset = smc_nway_reset,
1991 };
1992
1993 static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1994 {
1995 struct smc_private *smc = netdev_priv(dev);
1996 struct mii_ioctl_data *mii = if_mii(rq);
1997 int rc = 0;
1998 u16 saved_bank;
1999 unsigned int ioaddr = dev->base_addr;
2000 unsigned long flags;
2001
2002 if (!netif_running(dev))
2003 return -EINVAL;
2004
2005 spin_lock_irqsave(&smc->lock, flags);
2006 saved_bank = inw(ioaddr + BANK_SELECT);
2007 SMC_SELECT_BANK(3);
2008 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2009 SMC_SELECT_BANK(saved_bank);
2010 spin_unlock_irqrestore(&smc->lock, flags);
2011 return rc;
2012 }
2013
2014 static const struct pcmcia_device_id smc91c92_ids[] = {
2015 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2016 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2017 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2018 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2019 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2020 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2021 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2022 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
2023 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2024 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
2025 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2026 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2027 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2028 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2029 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2030 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2031 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2032 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2033 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
2034 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2035 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
2036 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2037 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2038 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2039 /* These conflict with other cards! */
2040 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2041 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2042 PCMCIA_DEVICE_NULL,
2043 };
2044 MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2045
2046 static struct pcmcia_driver smc91c92_cs_driver = {
2047 .owner = THIS_MODULE,
2048 .name = "smc91c92_cs",
2049 .probe = smc91c92_probe,
2050 .remove = smc91c92_detach,
2051 .id_table = smc91c92_ids,
2052 .suspend = smc91c92_suspend,
2053 .resume = smc91c92_resume,
2054 };
2055 module_pcmcia_driver(smc91c92_cs_driver);
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