3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <http://www.gnu.org/licenses/>.
25 * io = for the base address
27 * nowait = 0 for normal wait states, 1 eliminates additional wait states
30 * Erik Stahlman <erik@vt.edu>
32 * hardware multicast code:
33 * Peter Cammaert <pc@denkart.be>
36 * Daris A Nevil <dnevil@snmc.com>
37 * Nicolas Pitre <nico@fluxnic.net>
38 * Russell King <rmk@arm.linux.org.uk>
41 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
42 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
43 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
44 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
45 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
46 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
47 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
48 * more bus abstraction, big cleanup, etc.
49 * 29/09/03 Russell King - add driver model support
51 * - convert to use generic MII interface
52 * - add link up/down notification
53 * - don't try to handle full negotiation in
55 * - clean up (and fix stack overrun) in PHY
56 * MII read/write functions
57 * 22/09/04 Nicolas Pitre big update (see commit log for details)
59 static const char version
[] =
60 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@fluxnic.net>";
68 #include <linux/module.h>
69 #include <linux/kernel.h>
70 #include <linux/sched.h>
71 #include <linux/delay.h>
72 #include <linux/interrupt.h>
73 #include <linux/irq.h>
74 #include <linux/errno.h>
75 #include <linux/ioport.h>
76 #include <linux/crc32.h>
77 #include <linux/platform_device.h>
78 #include <linux/spinlock.h>
79 #include <linux/ethtool.h>
80 #include <linux/mii.h>
81 #include <linux/workqueue.h>
83 #include <linux/of_device.h>
84 #include <linux/of_gpio.h>
86 #include <linux/netdevice.h>
87 #include <linux/etherdevice.h>
88 #include <linux/skbuff.h>
97 static int nowait
= SMC_NOWAIT
;
98 module_param(nowait
, int, 0400);
99 MODULE_PARM_DESC(nowait
, "set to 1 for no wait state");
102 * Transmit timeout, default 5 seconds.
104 static int watchdog
= 1000;
105 module_param(watchdog
, int, 0400);
106 MODULE_PARM_DESC(watchdog
, "transmit timeout in milliseconds");
108 MODULE_LICENSE("GPL");
109 MODULE_ALIAS("platform:smc91x");
112 * The internal workings of the driver. If you are changing anything
113 * here with the SMC stuff, you should have the datasheet and know
114 * what you are doing.
116 #define CARDNAME "smc91x"
119 * Use power-down feature of the chip
124 * Wait time for memory to be free. This probably shouldn't be
125 * tuned that much, as waiting for this means nothing else happens
128 #define MEMORY_WAIT_TIME 16
131 * The maximum number of processing loops allowed for each call to the
134 #define MAX_IRQ_LOOPS 8
137 * This selects whether TX packets are sent one by one to the SMC91x internal
138 * memory and throttled until transmission completes. This may prevent
139 * RX overruns a litle by keeping much of the memory free for RX packets
140 * but to the expense of reduced TX throughput and increased IRQ overhead.
141 * Note this is not a cure for a too slow data bus or too high IRQ latency.
143 #define THROTTLE_TX_PKTS 0
146 * The MII clock high/low times. 2x this number gives the MII clock period
147 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
151 #define DBG(n, dev, fmt, ...) \
153 if (SMC_DEBUG >= (n)) \
154 netdev_dbg(dev, fmt, ##__VA_ARGS__); \
157 #define PRINTK(dev, fmt, ...) \
160 netdev_info(dev, fmt, ##__VA_ARGS__); \
162 netdev_dbg(dev, fmt, ##__VA_ARGS__); \
166 static void PRINT_PKT(u_char
*buf
, int length
)
173 remainder
= length
% 16;
175 for (i
= 0; i
< lines
; i
++) {
178 for (cur
= 0; cur
< 8; cur
++) {
182 pr_cont("%02x%02x ", a
, b
);
187 for (i
= 0; i
< remainder
/2 ; i
++) {
191 pr_cont("%02x%02x ", a
, b
);
196 static inline void PRINT_PKT(u_char
*buf
, int length
) { }
200 /* this enables an interrupt in the interrupt mask register */
201 #define SMC_ENABLE_INT(lp, x) do { \
202 unsigned char mask; \
203 unsigned long smc_enable_flags; \
204 spin_lock_irqsave(&lp->lock, smc_enable_flags); \
205 mask = SMC_GET_INT_MASK(lp); \
207 SMC_SET_INT_MASK(lp, mask); \
208 spin_unlock_irqrestore(&lp->lock, smc_enable_flags); \
211 /* this disables an interrupt from the interrupt mask register */
212 #define SMC_DISABLE_INT(lp, x) do { \
213 unsigned char mask; \
214 unsigned long smc_disable_flags; \
215 spin_lock_irqsave(&lp->lock, smc_disable_flags); \
216 mask = SMC_GET_INT_MASK(lp); \
218 SMC_SET_INT_MASK(lp, mask); \
219 spin_unlock_irqrestore(&lp->lock, smc_disable_flags); \
223 * Wait while MMU is busy. This is usually in the order of a few nanosecs
224 * if at all, but let's avoid deadlocking the system if the hardware
225 * decides to go south.
227 #define SMC_WAIT_MMU_BUSY(lp) do { \
228 if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \
229 unsigned long timeout = jiffies + 2; \
230 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
231 if (time_after(jiffies, timeout)) { \
232 netdev_dbg(dev, "timeout %s line %d\n", \
233 __FILE__, __LINE__); \
243 * this does a soft reset on the device
245 static void smc_reset(struct net_device
*dev
)
247 struct smc_local
*lp
= netdev_priv(dev
);
248 void __iomem
*ioaddr
= lp
->base
;
249 unsigned int ctl
, cfg
;
250 struct sk_buff
*pending_skb
;
252 DBG(2, dev
, "%s\n", __func__
);
254 /* Disable all interrupts, block TX tasklet */
255 spin_lock_irq(&lp
->lock
);
256 SMC_SELECT_BANK(lp
, 2);
257 SMC_SET_INT_MASK(lp
, 0);
258 pending_skb
= lp
->pending_tx_skb
;
259 lp
->pending_tx_skb
= NULL
;
260 spin_unlock_irq(&lp
->lock
);
262 /* free any pending tx skb */
264 dev_kfree_skb(pending_skb
);
265 dev
->stats
.tx_errors
++;
266 dev
->stats
.tx_aborted_errors
++;
270 * This resets the registers mostly to defaults, but doesn't
271 * affect EEPROM. That seems unnecessary
273 SMC_SELECT_BANK(lp
, 0);
274 SMC_SET_RCR(lp
, RCR_SOFTRST
);
277 * Setup the Configuration Register
278 * This is necessary because the CONFIG_REG is not affected
281 SMC_SELECT_BANK(lp
, 1);
283 cfg
= CONFIG_DEFAULT
;
286 * Setup for fast accesses if requested. If the card/system
287 * can't handle it then there will be no recovery except for
288 * a hard reset or power cycle
290 if (lp
->cfg
.flags
& SMC91X_NOWAIT
)
291 cfg
|= CONFIG_NO_WAIT
;
294 * Release from possible power-down state
295 * Configuration register is not affected by Soft Reset
297 cfg
|= CONFIG_EPH_POWER_EN
;
299 SMC_SET_CONFIG(lp
, cfg
);
301 /* this should pause enough for the chip to be happy */
303 * elaborate? What does the chip _need_? --jgarzik
305 * This seems to be undocumented, but something the original
306 * driver(s) have always done. Suspect undocumented timing
307 * info/determined empirically. --rmk
311 /* Disable transmit and receive functionality */
312 SMC_SELECT_BANK(lp
, 0);
313 SMC_SET_RCR(lp
, RCR_CLEAR
);
314 SMC_SET_TCR(lp
, TCR_CLEAR
);
316 SMC_SELECT_BANK(lp
, 1);
317 ctl
= SMC_GET_CTL(lp
) | CTL_LE_ENABLE
;
320 * Set the control register to automatically release successfully
321 * transmitted packets, to make the best use out of our limited
324 if(!THROTTLE_TX_PKTS
)
325 ctl
|= CTL_AUTO_RELEASE
;
327 ctl
&= ~CTL_AUTO_RELEASE
;
328 SMC_SET_CTL(lp
, ctl
);
331 SMC_SELECT_BANK(lp
, 2);
332 SMC_SET_MMU_CMD(lp
, MC_RESET
);
333 SMC_WAIT_MMU_BUSY(lp
);
337 * Enable Interrupts, Receive, and Transmit
339 static void smc_enable(struct net_device
*dev
)
341 struct smc_local
*lp
= netdev_priv(dev
);
342 void __iomem
*ioaddr
= lp
->base
;
345 DBG(2, dev
, "%s\n", __func__
);
347 /* see the header file for options in TCR/RCR DEFAULT */
348 SMC_SELECT_BANK(lp
, 0);
349 SMC_SET_TCR(lp
, lp
->tcr_cur_mode
);
350 SMC_SET_RCR(lp
, lp
->rcr_cur_mode
);
352 SMC_SELECT_BANK(lp
, 1);
353 SMC_SET_MAC_ADDR(lp
, dev
->dev_addr
);
355 /* now, enable interrupts */
356 mask
= IM_EPH_INT
|IM_RX_OVRN_INT
|IM_RCV_INT
;
357 if (lp
->version
>= (CHIP_91100
<< 4))
359 SMC_SELECT_BANK(lp
, 2);
360 SMC_SET_INT_MASK(lp
, mask
);
363 * From this point the register bank must _NOT_ be switched away
364 * to something else than bank 2 without proper locking against
365 * races with any tasklet or interrupt handlers until smc_shutdown()
366 * or smc_reset() is called.
371 * this puts the device in an inactive state
373 static void smc_shutdown(struct net_device
*dev
)
375 struct smc_local
*lp
= netdev_priv(dev
);
376 void __iomem
*ioaddr
= lp
->base
;
377 struct sk_buff
*pending_skb
;
379 DBG(2, dev
, "%s: %s\n", CARDNAME
, __func__
);
381 /* no more interrupts for me */
382 spin_lock_irq(&lp
->lock
);
383 SMC_SELECT_BANK(lp
, 2);
384 SMC_SET_INT_MASK(lp
, 0);
385 pending_skb
= lp
->pending_tx_skb
;
386 lp
->pending_tx_skb
= NULL
;
387 spin_unlock_irq(&lp
->lock
);
389 dev_kfree_skb(pending_skb
);
391 /* and tell the card to stay away from that nasty outside world */
392 SMC_SELECT_BANK(lp
, 0);
393 SMC_SET_RCR(lp
, RCR_CLEAR
);
394 SMC_SET_TCR(lp
, TCR_CLEAR
);
397 /* finally, shut the chip down */
398 SMC_SELECT_BANK(lp
, 1);
399 SMC_SET_CONFIG(lp
, SMC_GET_CONFIG(lp
) & ~CONFIG_EPH_POWER_EN
);
404 * This is the procedure to handle the receipt of a packet.
406 static inline void smc_rcv(struct net_device
*dev
)
408 struct smc_local
*lp
= netdev_priv(dev
);
409 void __iomem
*ioaddr
= lp
->base
;
410 unsigned int packet_number
, status
, packet_len
;
412 DBG(3, dev
, "%s\n", __func__
);
414 packet_number
= SMC_GET_RXFIFO(lp
);
415 if (unlikely(packet_number
& RXFIFO_REMPTY
)) {
416 PRINTK(dev
, "smc_rcv with nothing on FIFO.\n");
420 /* read from start of packet */
421 SMC_SET_PTR(lp
, PTR_READ
| PTR_RCV
| PTR_AUTOINC
);
423 /* First two words are status and packet length */
424 SMC_GET_PKT_HDR(lp
, status
, packet_len
);
425 packet_len
&= 0x07ff; /* mask off top bits */
426 DBG(2, dev
, "RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
427 packet_number
, status
, packet_len
, packet_len
);
430 if (unlikely(packet_len
< 6 || status
& RS_ERRORS
)) {
431 if (status
& RS_TOOLONG
&& packet_len
<= (1514 + 4 + 6)) {
432 /* accept VLAN packets */
433 status
&= ~RS_TOOLONG
;
436 if (packet_len
< 6) {
437 /* bloody hardware */
438 netdev_err(dev
, "fubar (rxlen %u status %x\n",
440 status
|= RS_TOOSHORT
;
442 SMC_WAIT_MMU_BUSY(lp
);
443 SMC_SET_MMU_CMD(lp
, MC_RELEASE
);
444 dev
->stats
.rx_errors
++;
445 if (status
& RS_ALGNERR
)
446 dev
->stats
.rx_frame_errors
++;
447 if (status
& (RS_TOOSHORT
| RS_TOOLONG
))
448 dev
->stats
.rx_length_errors
++;
449 if (status
& RS_BADCRC
)
450 dev
->stats
.rx_crc_errors
++;
454 unsigned int data_len
;
456 /* set multicast stats */
457 if (status
& RS_MULTICAST
)
458 dev
->stats
.multicast
++;
461 * Actual payload is packet_len - 6 (or 5 if odd byte).
462 * We want skb_reserve(2) and the final ctrl word
463 * (2 bytes, possibly containing the payload odd byte).
464 * Furthermore, we add 2 bytes to allow rounding up to
465 * multiple of 4 bytes on 32 bit buses.
466 * Hence packet_len - 6 + 2 + 2 + 2.
468 skb
= netdev_alloc_skb(dev
, packet_len
);
469 if (unlikely(skb
== NULL
)) {
470 SMC_WAIT_MMU_BUSY(lp
);
471 SMC_SET_MMU_CMD(lp
, MC_RELEASE
);
472 dev
->stats
.rx_dropped
++;
476 /* Align IP header to 32 bits */
479 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
480 if (lp
->version
== 0x90)
481 status
|= RS_ODDFRAME
;
484 * If odd length: packet_len - 5,
485 * otherwise packet_len - 6.
486 * With the trailing ctrl byte it's packet_len - 4.
488 data_len
= packet_len
- ((status
& RS_ODDFRAME
) ? 5 : 6);
489 data
= skb_put(skb
, data_len
);
490 SMC_PULL_DATA(lp
, data
, packet_len
- 4);
492 SMC_WAIT_MMU_BUSY(lp
);
493 SMC_SET_MMU_CMD(lp
, MC_RELEASE
);
495 PRINT_PKT(data
, packet_len
- 4);
497 skb
->protocol
= eth_type_trans(skb
, dev
);
499 dev
->stats
.rx_packets
++;
500 dev
->stats
.rx_bytes
+= data_len
;
506 * On SMP we have the following problem:
508 * A = smc_hardware_send_pkt()
509 * B = smc_hard_start_xmit()
510 * C = smc_interrupt()
512 * A and B can never be executed simultaneously. However, at least on UP,
513 * it is possible (and even desirable) for C to interrupt execution of
514 * A or B in order to have better RX reliability and avoid overruns.
515 * C, just like A and B, must have exclusive access to the chip and
516 * each of them must lock against any other concurrent access.
517 * Unfortunately this is not possible to have C suspend execution of A or
518 * B taking place on another CPU. On UP this is no an issue since A and B
519 * are run from softirq context and C from hard IRQ context, and there is
520 * no other CPU where concurrent access can happen.
521 * If ever there is a way to force at least B and C to always be executed
522 * on the same CPU then we could use read/write locks to protect against
523 * any other concurrent access and C would always interrupt B. But life
524 * isn't that easy in a SMP world...
526 #define smc_special_trylock(lock, flags) \
529 local_irq_save(flags); \
530 __ret = spin_trylock(lock); \
532 local_irq_restore(flags); \
535 #define smc_special_lock(lock, flags) spin_lock_irqsave(lock, flags)
536 #define smc_special_unlock(lock, flags) spin_unlock_irqrestore(lock, flags)
538 #define smc_special_trylock(lock, flags) (flags == flags)
539 #define smc_special_lock(lock, flags) do { flags = 0; } while (0)
540 #define smc_special_unlock(lock, flags) do { flags = 0; } while (0)
544 * This is called to actually send a packet to the chip.
546 static void smc_hardware_send_pkt(unsigned long data
)
548 struct net_device
*dev
= (struct net_device
*)data
;
549 struct smc_local
*lp
= netdev_priv(dev
);
550 void __iomem
*ioaddr
= lp
->base
;
552 unsigned int packet_no
, len
;
556 DBG(3, dev
, "%s\n", __func__
);
558 if (!smc_special_trylock(&lp
->lock
, flags
)) {
559 netif_stop_queue(dev
);
560 tasklet_schedule(&lp
->tx_task
);
564 skb
= lp
->pending_tx_skb
;
565 if (unlikely(!skb
)) {
566 smc_special_unlock(&lp
->lock
, flags
);
569 lp
->pending_tx_skb
= NULL
;
571 packet_no
= SMC_GET_AR(lp
);
572 if (unlikely(packet_no
& AR_FAILED
)) {
573 netdev_err(dev
, "Memory allocation failed.\n");
574 dev
->stats
.tx_errors
++;
575 dev
->stats
.tx_fifo_errors
++;
576 smc_special_unlock(&lp
->lock
, flags
);
580 /* point to the beginning of the packet */
581 SMC_SET_PN(lp
, packet_no
);
582 SMC_SET_PTR(lp
, PTR_AUTOINC
);
586 DBG(2, dev
, "TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
587 packet_no
, len
, len
, buf
);
591 * Send the packet length (+6 for status words, length, and ctl.
592 * The card will pad to 64 bytes with zeroes if packet is too small.
594 SMC_PUT_PKT_HDR(lp
, 0, len
+ 6);
596 /* send the actual data */
597 SMC_PUSH_DATA(lp
, buf
, len
& ~1);
599 /* Send final ctl word with the last byte if there is one */
600 SMC_outw(((len
& 1) ? (0x2000 | buf
[len
-1]) : 0), ioaddr
, DATA_REG(lp
));
603 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
604 * have the effect of having at most one packet queued for TX
605 * in the chip's memory at all time.
607 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
608 * when memory allocation (MC_ALLOC) does not succeed right away.
610 if (THROTTLE_TX_PKTS
)
611 netif_stop_queue(dev
);
613 /* queue the packet for TX */
614 SMC_SET_MMU_CMD(lp
, MC_ENQUEUE
);
615 smc_special_unlock(&lp
->lock
, flags
);
617 dev
->trans_start
= jiffies
;
618 dev
->stats
.tx_packets
++;
619 dev
->stats
.tx_bytes
+= len
;
621 SMC_ENABLE_INT(lp
, IM_TX_INT
| IM_TX_EMPTY_INT
);
623 done
: if (!THROTTLE_TX_PKTS
)
624 netif_wake_queue(dev
);
626 dev_consume_skb_any(skb
);
630 * Since I am not sure if I will have enough room in the chip's ram
631 * to store the packet, I call this routine which either sends it
632 * now, or set the card to generates an interrupt when ready
635 static int smc_hard_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
637 struct smc_local
*lp
= netdev_priv(dev
);
638 void __iomem
*ioaddr
= lp
->base
;
639 unsigned int numPages
, poll_count
, status
;
642 DBG(3, dev
, "%s\n", __func__
);
644 BUG_ON(lp
->pending_tx_skb
!= NULL
);
647 * The MMU wants the number of pages to be the number of 256 bytes
648 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
650 * The 91C111 ignores the size bits, but earlier models don't.
652 * Pkt size for allocating is data length +6 (for additional status
653 * words, length and ctl)
655 * If odd size then last byte is included in ctl word.
657 numPages
= ((skb
->len
& ~1) + (6 - 1)) >> 8;
658 if (unlikely(numPages
> 7)) {
659 netdev_warn(dev
, "Far too big packet error.\n");
660 dev
->stats
.tx_errors
++;
661 dev
->stats
.tx_dropped
++;
662 dev_kfree_skb_any(skb
);
666 smc_special_lock(&lp
->lock
, flags
);
668 /* now, try to allocate the memory */
669 SMC_SET_MMU_CMD(lp
, MC_ALLOC
| numPages
);
672 * Poll the chip for a short amount of time in case the
673 * allocation succeeds quickly.
675 poll_count
= MEMORY_WAIT_TIME
;
677 status
= SMC_GET_INT(lp
);
678 if (status
& IM_ALLOC_INT
) {
679 SMC_ACK_INT(lp
, IM_ALLOC_INT
);
682 } while (--poll_count
);
684 smc_special_unlock(&lp
->lock
, flags
);
686 lp
->pending_tx_skb
= skb
;
688 /* oh well, wait until the chip finds memory later */
689 netif_stop_queue(dev
);
690 DBG(2, dev
, "TX memory allocation deferred.\n");
691 SMC_ENABLE_INT(lp
, IM_ALLOC_INT
);
694 * Allocation succeeded: push packet to the chip's own memory
697 smc_hardware_send_pkt((unsigned long)dev
);
704 * This handles a TX interrupt, which is only called when:
705 * - a TX error occurred, or
706 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
708 static void smc_tx(struct net_device
*dev
)
710 struct smc_local
*lp
= netdev_priv(dev
);
711 void __iomem
*ioaddr
= lp
->base
;
712 unsigned int saved_packet
, packet_no
, tx_status
, pkt_len
;
714 DBG(3, dev
, "%s\n", __func__
);
716 /* If the TX FIFO is empty then nothing to do */
717 packet_no
= SMC_GET_TXFIFO(lp
);
718 if (unlikely(packet_no
& TXFIFO_TEMPTY
)) {
719 PRINTK(dev
, "smc_tx with nothing on FIFO.\n");
723 /* select packet to read from */
724 saved_packet
= SMC_GET_PN(lp
);
725 SMC_SET_PN(lp
, packet_no
);
727 /* read the first word (status word) from this packet */
728 SMC_SET_PTR(lp
, PTR_AUTOINC
| PTR_READ
);
729 SMC_GET_PKT_HDR(lp
, tx_status
, pkt_len
);
730 DBG(2, dev
, "TX STATUS 0x%04x PNR 0x%02x\n",
731 tx_status
, packet_no
);
733 if (!(tx_status
& ES_TX_SUC
))
734 dev
->stats
.tx_errors
++;
736 if (tx_status
& ES_LOSTCARR
)
737 dev
->stats
.tx_carrier_errors
++;
739 if (tx_status
& (ES_LATCOL
| ES_16COL
)) {
740 PRINTK(dev
, "%s occurred on last xmit\n",
741 (tx_status
& ES_LATCOL
) ?
742 "late collision" : "too many collisions");
743 dev
->stats
.tx_window_errors
++;
744 if (!(dev
->stats
.tx_window_errors
& 63) && net_ratelimit()) {
745 netdev_info(dev
, "unexpectedly large number of bad collisions. Please check duplex setting.\n");
749 /* kill the packet */
750 SMC_WAIT_MMU_BUSY(lp
);
751 SMC_SET_MMU_CMD(lp
, MC_FREEPKT
);
753 /* Don't restore Packet Number Reg until busy bit is cleared */
754 SMC_WAIT_MMU_BUSY(lp
);
755 SMC_SET_PN(lp
, saved_packet
);
757 /* re-enable transmit */
758 SMC_SELECT_BANK(lp
, 0);
759 SMC_SET_TCR(lp
, lp
->tcr_cur_mode
);
760 SMC_SELECT_BANK(lp
, 2);
764 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
766 static void smc_mii_out(struct net_device
*dev
, unsigned int val
, int bits
)
768 struct smc_local
*lp
= netdev_priv(dev
);
769 void __iomem
*ioaddr
= lp
->base
;
770 unsigned int mii_reg
, mask
;
772 mii_reg
= SMC_GET_MII(lp
) & ~(MII_MCLK
| MII_MDOE
| MII_MDO
);
775 for (mask
= 1 << (bits
- 1); mask
; mask
>>= 1) {
781 SMC_SET_MII(lp
, mii_reg
);
783 SMC_SET_MII(lp
, mii_reg
| MII_MCLK
);
788 static unsigned int smc_mii_in(struct net_device
*dev
, int bits
)
790 struct smc_local
*lp
= netdev_priv(dev
);
791 void __iomem
*ioaddr
= lp
->base
;
792 unsigned int mii_reg
, mask
, val
;
794 mii_reg
= SMC_GET_MII(lp
) & ~(MII_MCLK
| MII_MDOE
| MII_MDO
);
795 SMC_SET_MII(lp
, mii_reg
);
797 for (mask
= 1 << (bits
- 1), val
= 0; mask
; mask
>>= 1) {
798 if (SMC_GET_MII(lp
) & MII_MDI
)
801 SMC_SET_MII(lp
, mii_reg
);
803 SMC_SET_MII(lp
, mii_reg
| MII_MCLK
);
811 * Reads a register from the MII Management serial interface
813 static int smc_phy_read(struct net_device
*dev
, int phyaddr
, int phyreg
)
815 struct smc_local
*lp
= netdev_priv(dev
);
816 void __iomem
*ioaddr
= lp
->base
;
817 unsigned int phydata
;
819 SMC_SELECT_BANK(lp
, 3);
822 smc_mii_out(dev
, 0xffffffff, 32);
824 /* Start code (01) + read (10) + phyaddr + phyreg */
825 smc_mii_out(dev
, 6 << 10 | phyaddr
<< 5 | phyreg
, 14);
827 /* Turnaround (2bits) + phydata */
828 phydata
= smc_mii_in(dev
, 18);
830 /* Return to idle state */
831 SMC_SET_MII(lp
, SMC_GET_MII(lp
) & ~(MII_MCLK
|MII_MDOE
|MII_MDO
));
833 DBG(3, dev
, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
834 __func__
, phyaddr
, phyreg
, phydata
);
836 SMC_SELECT_BANK(lp
, 2);
841 * Writes a register to the MII Management serial interface
843 static void smc_phy_write(struct net_device
*dev
, int phyaddr
, int phyreg
,
846 struct smc_local
*lp
= netdev_priv(dev
);
847 void __iomem
*ioaddr
= lp
->base
;
849 SMC_SELECT_BANK(lp
, 3);
852 smc_mii_out(dev
, 0xffffffff, 32);
854 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
855 smc_mii_out(dev
, 5 << 28 | phyaddr
<< 23 | phyreg
<< 18 | 2 << 16 | phydata
, 32);
857 /* Return to idle state */
858 SMC_SET_MII(lp
, SMC_GET_MII(lp
) & ~(MII_MCLK
|MII_MDOE
|MII_MDO
));
860 DBG(3, dev
, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
861 __func__
, phyaddr
, phyreg
, phydata
);
863 SMC_SELECT_BANK(lp
, 2);
867 * Finds and reports the PHY address
869 static void smc_phy_detect(struct net_device
*dev
)
871 struct smc_local
*lp
= netdev_priv(dev
);
874 DBG(2, dev
, "%s\n", __func__
);
879 * Scan all 32 PHY addresses if necessary, starting at
880 * PHY#1 to PHY#31, and then PHY#0 last.
882 for (phyaddr
= 1; phyaddr
< 33; ++phyaddr
) {
883 unsigned int id1
, id2
;
885 /* Read the PHY identifiers */
886 id1
= smc_phy_read(dev
, phyaddr
& 31, MII_PHYSID1
);
887 id2
= smc_phy_read(dev
, phyaddr
& 31, MII_PHYSID2
);
889 DBG(3, dev
, "phy_id1=0x%x, phy_id2=0x%x\n",
892 /* Make sure it is a valid identifier */
893 if (id1
!= 0x0000 && id1
!= 0xffff && id1
!= 0x8000 &&
894 id2
!= 0x0000 && id2
!= 0xffff && id2
!= 0x8000) {
895 /* Save the PHY's address */
896 lp
->mii
.phy_id
= phyaddr
& 31;
897 lp
->phy_type
= id1
<< 16 | id2
;
904 * Sets the PHY to a configuration as determined by the user
906 static int smc_phy_fixed(struct net_device
*dev
)
908 struct smc_local
*lp
= netdev_priv(dev
);
909 void __iomem
*ioaddr
= lp
->base
;
910 int phyaddr
= lp
->mii
.phy_id
;
913 DBG(3, dev
, "%s\n", __func__
);
915 /* Enter Link Disable state */
916 cfg1
= smc_phy_read(dev
, phyaddr
, PHY_CFG1_REG
);
917 cfg1
|= PHY_CFG1_LNKDIS
;
918 smc_phy_write(dev
, phyaddr
, PHY_CFG1_REG
, cfg1
);
921 * Set our fixed capabilities
922 * Disable auto-negotiation
927 bmcr
|= BMCR_FULLDPLX
;
929 if (lp
->ctl_rspeed
== 100)
930 bmcr
|= BMCR_SPEED100
;
932 /* Write our capabilities to the phy control register */
933 smc_phy_write(dev
, phyaddr
, MII_BMCR
, bmcr
);
935 /* Re-Configure the Receive/Phy Control register */
936 SMC_SELECT_BANK(lp
, 0);
937 SMC_SET_RPC(lp
, lp
->rpc_cur_mode
);
938 SMC_SELECT_BANK(lp
, 2);
944 * smc_phy_reset - reset the phy
948 * Issue a software reset for the specified PHY and
949 * wait up to 100ms for the reset to complete. We should
950 * not access the PHY for 50ms after issuing the reset.
952 * The time to wait appears to be dependent on the PHY.
954 * Must be called with lp->lock locked.
956 static int smc_phy_reset(struct net_device
*dev
, int phy
)
958 struct smc_local
*lp
= netdev_priv(dev
);
962 smc_phy_write(dev
, phy
, MII_BMCR
, BMCR_RESET
);
964 for (timeout
= 2; timeout
; timeout
--) {
965 spin_unlock_irq(&lp
->lock
);
967 spin_lock_irq(&lp
->lock
);
969 bmcr
= smc_phy_read(dev
, phy
, MII_BMCR
);
970 if (!(bmcr
& BMCR_RESET
))
974 return bmcr
& BMCR_RESET
;
978 * smc_phy_powerdown - powerdown phy
981 * Power down the specified PHY
983 static void smc_phy_powerdown(struct net_device
*dev
)
985 struct smc_local
*lp
= netdev_priv(dev
);
987 int phy
= lp
->mii
.phy_id
;
989 if (lp
->phy_type
== 0)
992 /* We need to ensure that no calls to smc_phy_configure are
995 cancel_work_sync(&lp
->phy_configure
);
997 bmcr
= smc_phy_read(dev
, phy
, MII_BMCR
);
998 smc_phy_write(dev
, phy
, MII_BMCR
, bmcr
| BMCR_PDOWN
);
1002 * smc_phy_check_media - check the media status and adjust TCR
1004 * @init: set true for initialisation
1006 * Select duplex mode depending on negotiation state. This
1007 * also updates our carrier state.
1009 static void smc_phy_check_media(struct net_device
*dev
, int init
)
1011 struct smc_local
*lp
= netdev_priv(dev
);
1012 void __iomem
*ioaddr
= lp
->base
;
1014 if (mii_check_media(&lp
->mii
, netif_msg_link(lp
), init
)) {
1015 /* duplex state has changed */
1016 if (lp
->mii
.full_duplex
) {
1017 lp
->tcr_cur_mode
|= TCR_SWFDUP
;
1019 lp
->tcr_cur_mode
&= ~TCR_SWFDUP
;
1022 SMC_SELECT_BANK(lp
, 0);
1023 SMC_SET_TCR(lp
, lp
->tcr_cur_mode
);
1028 * Configures the specified PHY through the MII management interface
1029 * using Autonegotiation.
1030 * Calls smc_phy_fixed() if the user has requested a certain config.
1031 * If RPC ANEG bit is set, the media selection is dependent purely on
1032 * the selection by the MII (either in the MII BMCR reg or the result
1033 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1034 * is controlled by the RPC SPEED and RPC DPLX bits.
1036 static void smc_phy_configure(struct work_struct
*work
)
1038 struct smc_local
*lp
=
1039 container_of(work
, struct smc_local
, phy_configure
);
1040 struct net_device
*dev
= lp
->dev
;
1041 void __iomem
*ioaddr
= lp
->base
;
1042 int phyaddr
= lp
->mii
.phy_id
;
1043 int my_phy_caps
; /* My PHY capabilities */
1044 int my_ad_caps
; /* My Advertised capabilities */
1047 DBG(3, dev
, "smc_program_phy()\n");
1049 spin_lock_irq(&lp
->lock
);
1052 * We should not be called if phy_type is zero.
1054 if (lp
->phy_type
== 0)
1055 goto smc_phy_configure_exit
;
1057 if (smc_phy_reset(dev
, phyaddr
)) {
1058 netdev_info(dev
, "PHY reset timed out\n");
1059 goto smc_phy_configure_exit
;
1063 * Enable PHY Interrupts (for register 18)
1064 * Interrupts listed here are disabled
1066 smc_phy_write(dev
, phyaddr
, PHY_MASK_REG
,
1067 PHY_INT_LOSSSYNC
| PHY_INT_CWRD
| PHY_INT_SSD
|
1068 PHY_INT_ESD
| PHY_INT_RPOL
| PHY_INT_JAB
|
1069 PHY_INT_SPDDET
| PHY_INT_DPLXDET
);
1071 /* Configure the Receive/Phy Control register */
1072 SMC_SELECT_BANK(lp
, 0);
1073 SMC_SET_RPC(lp
, lp
->rpc_cur_mode
);
1075 /* If the user requested no auto neg, then go set his request */
1076 if (lp
->mii
.force_media
) {
1078 goto smc_phy_configure_exit
;
1081 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1082 my_phy_caps
= smc_phy_read(dev
, phyaddr
, MII_BMSR
);
1084 if (!(my_phy_caps
& BMSR_ANEGCAPABLE
)) {
1085 netdev_info(dev
, "Auto negotiation NOT supported\n");
1087 goto smc_phy_configure_exit
;
1090 my_ad_caps
= ADVERTISE_CSMA
; /* I am CSMA capable */
1092 if (my_phy_caps
& BMSR_100BASE4
)
1093 my_ad_caps
|= ADVERTISE_100BASE4
;
1094 if (my_phy_caps
& BMSR_100FULL
)
1095 my_ad_caps
|= ADVERTISE_100FULL
;
1096 if (my_phy_caps
& BMSR_100HALF
)
1097 my_ad_caps
|= ADVERTISE_100HALF
;
1098 if (my_phy_caps
& BMSR_10FULL
)
1099 my_ad_caps
|= ADVERTISE_10FULL
;
1100 if (my_phy_caps
& BMSR_10HALF
)
1101 my_ad_caps
|= ADVERTISE_10HALF
;
1103 /* Disable capabilities not selected by our user */
1104 if (lp
->ctl_rspeed
!= 100)
1105 my_ad_caps
&= ~(ADVERTISE_100BASE4
|ADVERTISE_100FULL
|ADVERTISE_100HALF
);
1107 if (!lp
->ctl_rfduplx
)
1108 my_ad_caps
&= ~(ADVERTISE_100FULL
|ADVERTISE_10FULL
);
1110 /* Update our Auto-Neg Advertisement Register */
1111 smc_phy_write(dev
, phyaddr
, MII_ADVERTISE
, my_ad_caps
);
1112 lp
->mii
.advertising
= my_ad_caps
;
1115 * Read the register back. Without this, it appears that when
1116 * auto-negotiation is restarted, sometimes it isn't ready and
1117 * the link does not come up.
1119 status
= smc_phy_read(dev
, phyaddr
, MII_ADVERTISE
);
1121 DBG(2, dev
, "phy caps=%x\n", my_phy_caps
);
1122 DBG(2, dev
, "phy advertised caps=%x\n", my_ad_caps
);
1124 /* Restart auto-negotiation process in order to advertise my caps */
1125 smc_phy_write(dev
, phyaddr
, MII_BMCR
, BMCR_ANENABLE
| BMCR_ANRESTART
);
1127 smc_phy_check_media(dev
, 1);
1129 smc_phy_configure_exit
:
1130 SMC_SELECT_BANK(lp
, 2);
1131 spin_unlock_irq(&lp
->lock
);
1137 * Purpose: Handle interrupts relating to PHY register 18. This is
1138 * called from the "hard" interrupt handler under our private spinlock.
1140 static void smc_phy_interrupt(struct net_device
*dev
)
1142 struct smc_local
*lp
= netdev_priv(dev
);
1143 int phyaddr
= lp
->mii
.phy_id
;
1146 DBG(2, dev
, "%s\n", __func__
);
1148 if (lp
->phy_type
== 0)
1152 smc_phy_check_media(dev
, 0);
1154 /* Read PHY Register 18, Status Output */
1155 phy18
= smc_phy_read(dev
, phyaddr
, PHY_INT_REG
);
1156 if ((phy18
& PHY_INT_INT
) == 0)
1161 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1163 static void smc_10bt_check_media(struct net_device
*dev
, int init
)
1165 struct smc_local
*lp
= netdev_priv(dev
);
1166 void __iomem
*ioaddr
= lp
->base
;
1167 unsigned int old_carrier
, new_carrier
;
1169 old_carrier
= netif_carrier_ok(dev
) ? 1 : 0;
1171 SMC_SELECT_BANK(lp
, 0);
1172 new_carrier
= (SMC_GET_EPH_STATUS(lp
) & ES_LINK_OK
) ? 1 : 0;
1173 SMC_SELECT_BANK(lp
, 2);
1175 if (init
|| (old_carrier
!= new_carrier
)) {
1177 netif_carrier_off(dev
);
1179 netif_carrier_on(dev
);
1181 if (netif_msg_link(lp
))
1182 netdev_info(dev
, "link %s\n",
1183 new_carrier
? "up" : "down");
1187 static void smc_eph_interrupt(struct net_device
*dev
)
1189 struct smc_local
*lp
= netdev_priv(dev
);
1190 void __iomem
*ioaddr
= lp
->base
;
1193 smc_10bt_check_media(dev
, 0);
1195 SMC_SELECT_BANK(lp
, 1);
1196 ctl
= SMC_GET_CTL(lp
);
1197 SMC_SET_CTL(lp
, ctl
& ~CTL_LE_ENABLE
);
1198 SMC_SET_CTL(lp
, ctl
);
1199 SMC_SELECT_BANK(lp
, 2);
1203 * This is the main routine of the driver, to handle the device when
1204 * it needs some attention.
1206 static irqreturn_t
smc_interrupt(int irq
, void *dev_id
)
1208 struct net_device
*dev
= dev_id
;
1209 struct smc_local
*lp
= netdev_priv(dev
);
1210 void __iomem
*ioaddr
= lp
->base
;
1211 int status
, mask
, timeout
, card_stats
;
1214 DBG(3, dev
, "%s\n", __func__
);
1216 spin_lock(&lp
->lock
);
1218 /* A preamble may be used when there is a potential race
1219 * between the interruptible transmit functions and this
1221 SMC_INTERRUPT_PREAMBLE
;
1223 saved_pointer
= SMC_GET_PTR(lp
);
1224 mask
= SMC_GET_INT_MASK(lp
);
1225 SMC_SET_INT_MASK(lp
, 0);
1227 /* set a timeout value, so I don't stay here forever */
1228 timeout
= MAX_IRQ_LOOPS
;
1231 status
= SMC_GET_INT(lp
);
1233 DBG(2, dev
, "INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1235 ({ int meminfo
; SMC_SELECT_BANK(lp
, 0);
1236 meminfo
= SMC_GET_MIR(lp
);
1237 SMC_SELECT_BANK(lp
, 2); meminfo
; }),
1244 if (status
& IM_TX_INT
) {
1245 /* do this before RX as it will free memory quickly */
1246 DBG(3, dev
, "TX int\n");
1248 SMC_ACK_INT(lp
, IM_TX_INT
);
1249 if (THROTTLE_TX_PKTS
)
1250 netif_wake_queue(dev
);
1251 } else if (status
& IM_RCV_INT
) {
1252 DBG(3, dev
, "RX irq\n");
1254 } else if (status
& IM_ALLOC_INT
) {
1255 DBG(3, dev
, "Allocation irq\n");
1256 tasklet_hi_schedule(&lp
->tx_task
);
1257 mask
&= ~IM_ALLOC_INT
;
1258 } else if (status
& IM_TX_EMPTY_INT
) {
1259 DBG(3, dev
, "TX empty\n");
1260 mask
&= ~IM_TX_EMPTY_INT
;
1263 SMC_SELECT_BANK(lp
, 0);
1264 card_stats
= SMC_GET_COUNTER(lp
);
1265 SMC_SELECT_BANK(lp
, 2);
1267 /* single collisions */
1268 dev
->stats
.collisions
+= card_stats
& 0xF;
1271 /* multiple collisions */
1272 dev
->stats
.collisions
+= card_stats
& 0xF;
1273 } else if (status
& IM_RX_OVRN_INT
) {
1274 DBG(1, dev
, "RX overrun (EPH_ST 0x%04x)\n",
1275 ({ int eph_st
; SMC_SELECT_BANK(lp
, 0);
1276 eph_st
= SMC_GET_EPH_STATUS(lp
);
1277 SMC_SELECT_BANK(lp
, 2); eph_st
; }));
1278 SMC_ACK_INT(lp
, IM_RX_OVRN_INT
);
1279 dev
->stats
.rx_errors
++;
1280 dev
->stats
.rx_fifo_errors
++;
1281 } else if (status
& IM_EPH_INT
) {
1282 smc_eph_interrupt(dev
);
1283 } else if (status
& IM_MDINT
) {
1284 SMC_ACK_INT(lp
, IM_MDINT
);
1285 smc_phy_interrupt(dev
);
1286 } else if (status
& IM_ERCV_INT
) {
1287 SMC_ACK_INT(lp
, IM_ERCV_INT
);
1288 PRINTK(dev
, "UNSUPPORTED: ERCV INTERRUPT\n");
1290 } while (--timeout
);
1292 /* restore register states */
1293 SMC_SET_PTR(lp
, saved_pointer
);
1294 SMC_SET_INT_MASK(lp
, mask
);
1295 spin_unlock(&lp
->lock
);
1297 #ifndef CONFIG_NET_POLL_CONTROLLER
1298 if (timeout
== MAX_IRQ_LOOPS
)
1299 PRINTK(dev
, "spurious interrupt (mask = 0x%02x)\n",
1302 DBG(3, dev
, "Interrupt done (%d loops)\n",
1303 MAX_IRQ_LOOPS
- timeout
);
1306 * We return IRQ_HANDLED unconditionally here even if there was
1307 * nothing to do. There is a possibility that a packet might
1308 * get enqueued into the chip right after TX_EMPTY_INT is raised
1309 * but just before the CPU acknowledges the IRQ.
1310 * Better take an unneeded IRQ in some occasions than complexifying
1311 * the code for all cases.
1316 #ifdef CONFIG_NET_POLL_CONTROLLER
1318 * Polling receive - used by netconsole and other diagnostic tools
1319 * to allow network i/o with interrupts disabled.
1321 static void smc_poll_controller(struct net_device
*dev
)
1323 disable_irq(dev
->irq
);
1324 smc_interrupt(dev
->irq
, dev
);
1325 enable_irq(dev
->irq
);
1329 /* Our watchdog timed out. Called by the networking layer */
1330 static void smc_timeout(struct net_device
*dev
)
1332 struct smc_local
*lp
= netdev_priv(dev
);
1333 void __iomem
*ioaddr
= lp
->base
;
1334 int status
, mask
, eph_st
, meminfo
, fifo
;
1336 DBG(2, dev
, "%s\n", __func__
);
1338 spin_lock_irq(&lp
->lock
);
1339 status
= SMC_GET_INT(lp
);
1340 mask
= SMC_GET_INT_MASK(lp
);
1341 fifo
= SMC_GET_FIFO(lp
);
1342 SMC_SELECT_BANK(lp
, 0);
1343 eph_st
= SMC_GET_EPH_STATUS(lp
);
1344 meminfo
= SMC_GET_MIR(lp
);
1345 SMC_SELECT_BANK(lp
, 2);
1346 spin_unlock_irq(&lp
->lock
);
1347 PRINTK(dev
, "TX timeout (INT 0x%02x INTMASK 0x%02x MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1348 status
, mask
, meminfo
, fifo
, eph_st
);
1354 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1355 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1356 * which calls schedule(). Hence we use a work queue.
1358 if (lp
->phy_type
!= 0)
1359 schedule_work(&lp
->phy_configure
);
1361 /* We can accept TX packets again */
1362 dev
->trans_start
= jiffies
; /* prevent tx timeout */
1363 netif_wake_queue(dev
);
1367 * This routine will, depending on the values passed to it,
1368 * either make it accept multicast packets, go into
1369 * promiscuous mode (for TCPDUMP and cousins) or accept
1370 * a select set of multicast packets
1372 static void smc_set_multicast_list(struct net_device
*dev
)
1374 struct smc_local
*lp
= netdev_priv(dev
);
1375 void __iomem
*ioaddr
= lp
->base
;
1376 unsigned char multicast_table
[8];
1377 int update_multicast
= 0;
1379 DBG(2, dev
, "%s\n", __func__
);
1381 if (dev
->flags
& IFF_PROMISC
) {
1382 DBG(2, dev
, "RCR_PRMS\n");
1383 lp
->rcr_cur_mode
|= RCR_PRMS
;
1386 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1387 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1388 when promiscuous mode is turned on.
1392 * Here, I am setting this to accept all multicast packets.
1393 * I don't need to zero the multicast table, because the flag is
1394 * checked before the table is
1396 else if (dev
->flags
& IFF_ALLMULTI
|| netdev_mc_count(dev
) > 16) {
1397 DBG(2, dev
, "RCR_ALMUL\n");
1398 lp
->rcr_cur_mode
|= RCR_ALMUL
;
1402 * This sets the internal hardware table to filter out unwanted
1403 * multicast packets before they take up memory.
1405 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1406 * address are the offset into the table. If that bit is 1, then the
1407 * multicast packet is accepted. Otherwise, it's dropped silently.
1409 * To use the 6 bits as an offset into the table, the high 3 bits are
1410 * the number of the 8 bit register, while the low 3 bits are the bit
1411 * within that register.
1413 else if (!netdev_mc_empty(dev
)) {
1414 struct netdev_hw_addr
*ha
;
1416 /* table for flipping the order of 3 bits */
1417 static const unsigned char invert3
[] = {0, 4, 2, 6, 1, 5, 3, 7};
1419 /* start with a table of all zeros: reject all */
1420 memset(multicast_table
, 0, sizeof(multicast_table
));
1422 netdev_for_each_mc_addr(ha
, dev
) {
1425 /* only use the low order bits */
1426 position
= crc32_le(~0, ha
->addr
, 6) & 0x3f;
1428 /* do some messy swapping to put the bit in the right spot */
1429 multicast_table
[invert3
[position
&7]] |=
1430 (1<<invert3
[(position
>>3)&7]);
1433 /* be sure I get rid of flags I might have set */
1434 lp
->rcr_cur_mode
&= ~(RCR_PRMS
| RCR_ALMUL
);
1436 /* now, the table can be loaded into the chipset */
1437 update_multicast
= 1;
1439 DBG(2, dev
, "~(RCR_PRMS|RCR_ALMUL)\n");
1440 lp
->rcr_cur_mode
&= ~(RCR_PRMS
| RCR_ALMUL
);
1443 * since I'm disabling all multicast entirely, I need to
1444 * clear the multicast list
1446 memset(multicast_table
, 0, sizeof(multicast_table
));
1447 update_multicast
= 1;
1450 spin_lock_irq(&lp
->lock
);
1451 SMC_SELECT_BANK(lp
, 0);
1452 SMC_SET_RCR(lp
, lp
->rcr_cur_mode
);
1453 if (update_multicast
) {
1454 SMC_SELECT_BANK(lp
, 3);
1455 SMC_SET_MCAST(lp
, multicast_table
);
1457 SMC_SELECT_BANK(lp
, 2);
1458 spin_unlock_irq(&lp
->lock
);
1463 * Open and Initialize the board
1465 * Set up everything, reset the card, etc..
1468 smc_open(struct net_device
*dev
)
1470 struct smc_local
*lp
= netdev_priv(dev
);
1472 DBG(2, dev
, "%s\n", __func__
);
1474 /* Setup the default Register Modes */
1475 lp
->tcr_cur_mode
= TCR_DEFAULT
;
1476 lp
->rcr_cur_mode
= RCR_DEFAULT
;
1477 lp
->rpc_cur_mode
= RPC_DEFAULT
|
1478 lp
->cfg
.leda
<< RPC_LSXA_SHFT
|
1479 lp
->cfg
.ledb
<< RPC_LSXB_SHFT
;
1482 * If we are not using a MII interface, we need to
1483 * monitor our own carrier signal to detect faults.
1485 if (lp
->phy_type
== 0)
1486 lp
->tcr_cur_mode
|= TCR_MON_CSN
;
1488 /* reset the hardware */
1492 /* Configure the PHY, initialize the link state */
1493 if (lp
->phy_type
!= 0)
1494 smc_phy_configure(&lp
->phy_configure
);
1496 spin_lock_irq(&lp
->lock
);
1497 smc_10bt_check_media(dev
, 1);
1498 spin_unlock_irq(&lp
->lock
);
1501 netif_start_queue(dev
);
1508 * this makes the board clean up everything that it can
1509 * and not talk to the outside world. Caused by
1510 * an 'ifconfig ethX down'
1512 static int smc_close(struct net_device
*dev
)
1514 struct smc_local
*lp
= netdev_priv(dev
);
1516 DBG(2, dev
, "%s\n", __func__
);
1518 netif_stop_queue(dev
);
1519 netif_carrier_off(dev
);
1521 /* clear everything */
1523 tasklet_kill(&lp
->tx_task
);
1524 smc_phy_powerdown(dev
);
1532 smc_ethtool_getsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1534 struct smc_local
*lp
= netdev_priv(dev
);
1540 if (lp
->phy_type
!= 0) {
1541 spin_lock_irq(&lp
->lock
);
1542 ret
= mii_ethtool_gset(&lp
->mii
, cmd
);
1543 spin_unlock_irq(&lp
->lock
);
1545 cmd
->supported
= SUPPORTED_10baseT_Half
|
1546 SUPPORTED_10baseT_Full
|
1547 SUPPORTED_TP
| SUPPORTED_AUI
;
1549 if (lp
->ctl_rspeed
== 10)
1550 ethtool_cmd_speed_set(cmd
, SPEED_10
);
1551 else if (lp
->ctl_rspeed
== 100)
1552 ethtool_cmd_speed_set(cmd
, SPEED_100
);
1554 cmd
->autoneg
= AUTONEG_DISABLE
;
1555 cmd
->transceiver
= XCVR_INTERNAL
;
1557 cmd
->duplex
= lp
->tcr_cur_mode
& TCR_SWFDUP
? DUPLEX_FULL
: DUPLEX_HALF
;
1566 smc_ethtool_setsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1568 struct smc_local
*lp
= netdev_priv(dev
);
1571 if (lp
->phy_type
!= 0) {
1572 spin_lock_irq(&lp
->lock
);
1573 ret
= mii_ethtool_sset(&lp
->mii
, cmd
);
1574 spin_unlock_irq(&lp
->lock
);
1576 if (cmd
->autoneg
!= AUTONEG_DISABLE
||
1577 cmd
->speed
!= SPEED_10
||
1578 (cmd
->duplex
!= DUPLEX_HALF
&& cmd
->duplex
!= DUPLEX_FULL
) ||
1579 (cmd
->port
!= PORT_TP
&& cmd
->port
!= PORT_AUI
))
1582 // lp->port = cmd->port;
1583 lp
->ctl_rfduplx
= cmd
->duplex
== DUPLEX_FULL
;
1585 // if (netif_running(dev))
1586 // smc_set_port(dev);
1595 smc_ethtool_getdrvinfo(struct net_device
*dev
, struct ethtool_drvinfo
*info
)
1597 strlcpy(info
->driver
, CARDNAME
, sizeof(info
->driver
));
1598 strlcpy(info
->version
, version
, sizeof(info
->version
));
1599 strlcpy(info
->bus_info
, dev_name(dev
->dev
.parent
),
1600 sizeof(info
->bus_info
));
1603 static int smc_ethtool_nwayreset(struct net_device
*dev
)
1605 struct smc_local
*lp
= netdev_priv(dev
);
1608 if (lp
->phy_type
!= 0) {
1609 spin_lock_irq(&lp
->lock
);
1610 ret
= mii_nway_restart(&lp
->mii
);
1611 spin_unlock_irq(&lp
->lock
);
1617 static u32
smc_ethtool_getmsglevel(struct net_device
*dev
)
1619 struct smc_local
*lp
= netdev_priv(dev
);
1620 return lp
->msg_enable
;
1623 static void smc_ethtool_setmsglevel(struct net_device
*dev
, u32 level
)
1625 struct smc_local
*lp
= netdev_priv(dev
);
1626 lp
->msg_enable
= level
;
1629 static int smc_write_eeprom_word(struct net_device
*dev
, u16 addr
, u16 word
)
1632 struct smc_local
*lp
= netdev_priv(dev
);
1633 void __iomem
*ioaddr
= lp
->base
;
1635 spin_lock_irq(&lp
->lock
);
1636 /* load word into GP register */
1637 SMC_SELECT_BANK(lp
, 1);
1638 SMC_SET_GP(lp
, word
);
1639 /* set the address to put the data in EEPROM */
1640 SMC_SELECT_BANK(lp
, 2);
1641 SMC_SET_PTR(lp
, addr
);
1642 /* tell it to write */
1643 SMC_SELECT_BANK(lp
, 1);
1644 ctl
= SMC_GET_CTL(lp
);
1645 SMC_SET_CTL(lp
, ctl
| (CTL_EEPROM_SELECT
| CTL_STORE
));
1646 /* wait for it to finish */
1649 } while (SMC_GET_CTL(lp
) & CTL_STORE
);
1651 SMC_SET_CTL(lp
, ctl
);
1652 SMC_SELECT_BANK(lp
, 2);
1653 spin_unlock_irq(&lp
->lock
);
1657 static int smc_read_eeprom_word(struct net_device
*dev
, u16 addr
, u16
*word
)
1660 struct smc_local
*lp
= netdev_priv(dev
);
1661 void __iomem
*ioaddr
= lp
->base
;
1663 spin_lock_irq(&lp
->lock
);
1664 /* set the EEPROM address to get the data from */
1665 SMC_SELECT_BANK(lp
, 2);
1666 SMC_SET_PTR(lp
, addr
| PTR_READ
);
1667 /* tell it to load */
1668 SMC_SELECT_BANK(lp
, 1);
1669 SMC_SET_GP(lp
, 0xffff); /* init to known */
1670 ctl
= SMC_GET_CTL(lp
);
1671 SMC_SET_CTL(lp
, ctl
| (CTL_EEPROM_SELECT
| CTL_RELOAD
));
1672 /* wait for it to finish */
1675 } while (SMC_GET_CTL(lp
) & CTL_RELOAD
);
1676 /* read word from GP register */
1677 *word
= SMC_GET_GP(lp
);
1679 SMC_SET_CTL(lp
, ctl
);
1680 SMC_SELECT_BANK(lp
, 2);
1681 spin_unlock_irq(&lp
->lock
);
1685 static int smc_ethtool_geteeprom_len(struct net_device
*dev
)
1690 static int smc_ethtool_geteeprom(struct net_device
*dev
,
1691 struct ethtool_eeprom
*eeprom
, u8
*data
)
1696 DBG(1, dev
, "Reading %d bytes at %d(0x%x)\n",
1697 eeprom
->len
, eeprom
->offset
, eeprom
->offset
);
1698 imax
= smc_ethtool_geteeprom_len(dev
);
1699 for (i
= 0; i
< eeprom
->len
; i
+= 2) {
1702 int offset
= i
+ eeprom
->offset
;
1705 ret
= smc_read_eeprom_word(dev
, offset
>> 1, &wbuf
);
1708 DBG(2, dev
, "Read 0x%x from 0x%x\n", wbuf
, offset
>> 1);
1709 data
[i
] = (wbuf
>> 8) & 0xff;
1710 data
[i
+1] = wbuf
& 0xff;
1715 static int smc_ethtool_seteeprom(struct net_device
*dev
,
1716 struct ethtool_eeprom
*eeprom
, u8
*data
)
1721 DBG(1, dev
, "Writing %d bytes to %d(0x%x)\n",
1722 eeprom
->len
, eeprom
->offset
, eeprom
->offset
);
1723 imax
= smc_ethtool_geteeprom_len(dev
);
1724 for (i
= 0; i
< eeprom
->len
; i
+= 2) {
1727 int offset
= i
+ eeprom
->offset
;
1730 wbuf
= (data
[i
] << 8) | data
[i
+ 1];
1731 DBG(2, dev
, "Writing 0x%x to 0x%x\n", wbuf
, offset
>> 1);
1732 ret
= smc_write_eeprom_word(dev
, offset
>> 1, wbuf
);
1740 static const struct ethtool_ops smc_ethtool_ops
= {
1741 .get_settings
= smc_ethtool_getsettings
,
1742 .set_settings
= smc_ethtool_setsettings
,
1743 .get_drvinfo
= smc_ethtool_getdrvinfo
,
1745 .get_msglevel
= smc_ethtool_getmsglevel
,
1746 .set_msglevel
= smc_ethtool_setmsglevel
,
1747 .nway_reset
= smc_ethtool_nwayreset
,
1748 .get_link
= ethtool_op_get_link
,
1749 .get_eeprom_len
= smc_ethtool_geteeprom_len
,
1750 .get_eeprom
= smc_ethtool_geteeprom
,
1751 .set_eeprom
= smc_ethtool_seteeprom
,
1754 static const struct net_device_ops smc_netdev_ops
= {
1755 .ndo_open
= smc_open
,
1756 .ndo_stop
= smc_close
,
1757 .ndo_start_xmit
= smc_hard_start_xmit
,
1758 .ndo_tx_timeout
= smc_timeout
,
1759 .ndo_set_rx_mode
= smc_set_multicast_list
,
1760 .ndo_change_mtu
= eth_change_mtu
,
1761 .ndo_validate_addr
= eth_validate_addr
,
1762 .ndo_set_mac_address
= eth_mac_addr
,
1763 #ifdef CONFIG_NET_POLL_CONTROLLER
1764 .ndo_poll_controller
= smc_poll_controller
,
1771 * This routine has a simple purpose -- make the SMC chip generate an
1772 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1775 * does this still work?
1777 * I just deleted auto_irq.c, since it was never built...
1780 static int smc_findirq(struct smc_local
*lp
)
1782 void __iomem
*ioaddr
= lp
->base
;
1784 unsigned long cookie
;
1786 DBG(2, lp
->dev
, "%s: %s\n", CARDNAME
, __func__
);
1788 cookie
= probe_irq_on();
1791 * What I try to do here is trigger an ALLOC_INT. This is done
1792 * by allocating a small chunk of memory, which will give an interrupt
1795 /* enable ALLOCation interrupts ONLY */
1796 SMC_SELECT_BANK(lp
, 2);
1797 SMC_SET_INT_MASK(lp
, IM_ALLOC_INT
);
1800 * Allocate 512 bytes of memory. Note that the chip was just
1801 * reset so all the memory is available
1803 SMC_SET_MMU_CMD(lp
, MC_ALLOC
| 1);
1806 * Wait until positive that the interrupt has been generated
1811 int_status
= SMC_GET_INT(lp
);
1812 if (int_status
& IM_ALLOC_INT
)
1813 break; /* got the interrupt */
1814 } while (--timeout
);
1817 * there is really nothing that I can do here if timeout fails,
1818 * as autoirq_report will return a 0 anyway, which is what I
1819 * want in this case. Plus, the clean up is needed in both
1823 /* and disable all interrupts again */
1824 SMC_SET_INT_MASK(lp
, 0);
1826 /* and return what I found */
1827 return probe_irq_off(cookie
);
1831 * Function: smc_probe(unsigned long ioaddr)
1834 * Tests to see if a given ioaddr points to an SMC91x chip.
1835 * Returns a 0 on success
1838 * (1) see if the high byte of BANK_SELECT is 0x33
1839 * (2) compare the ioaddr with the base register's address
1840 * (3) see if I recognize the chip ID in the appropriate register
1842 * Here I do typical initialization tasks.
1844 * o Initialize the structure if needed
1845 * o print out my vanity message if not done so already
1846 * o print out what type of hardware is detected
1847 * o print out the ethernet address
1849 * o set up my private data
1850 * o configure the dev structure with my subroutines
1851 * o actually GRAB the irq.
1854 static int smc_probe(struct net_device
*dev
, void __iomem
*ioaddr
,
1855 unsigned long irq_flags
)
1857 struct smc_local
*lp
= netdev_priv(dev
);
1859 unsigned int val
, revision_register
;
1860 const char *version_string
;
1862 DBG(2, dev
, "%s: %s\n", CARDNAME
, __func__
);
1864 /* First, see if the high byte is 0x33 */
1865 val
= SMC_CURRENT_BANK(lp
);
1866 DBG(2, dev
, "%s: bank signature probe returned 0x%04x\n",
1868 if ((val
& 0xFF00) != 0x3300) {
1869 if ((val
& 0xFF) == 0x33) {
1871 "%s: Detected possible byte-swapped interface at IOADDR %p\n",
1879 * The above MIGHT indicate a device, but I need to write to
1880 * further test this.
1882 SMC_SELECT_BANK(lp
, 0);
1883 val
= SMC_CURRENT_BANK(lp
);
1884 if ((val
& 0xFF00) != 0x3300) {
1890 * well, we've already written once, so hopefully another
1891 * time won't hurt. This time, I need to switch the bank
1892 * register to bank 1, so I can access the base address
1895 SMC_SELECT_BANK(lp
, 1);
1896 val
= SMC_GET_BASE(lp
);
1897 val
= ((val
& 0x1F00) >> 3) << SMC_IO_SHIFT
;
1898 if (((unsigned long)ioaddr
& (0x3e0 << SMC_IO_SHIFT
)) != val
) {
1899 netdev_warn(dev
, "%s: IOADDR %p doesn't match configuration (%x).\n",
1900 CARDNAME
, ioaddr
, val
);
1904 * check if the revision register is something that I
1905 * recognize. These might need to be added to later,
1906 * as future revisions could be added.
1908 SMC_SELECT_BANK(lp
, 3);
1909 revision_register
= SMC_GET_REV(lp
);
1910 DBG(2, dev
, "%s: revision = 0x%04x\n", CARDNAME
, revision_register
);
1911 version_string
= chip_ids
[ (revision_register
>> 4) & 0xF];
1912 if (!version_string
|| (revision_register
& 0xff00) != 0x3300) {
1913 /* I don't recognize this chip, so... */
1914 netdev_warn(dev
, "%s: IO %p: Unrecognized revision register 0x%04x, Contact author.\n",
1915 CARDNAME
, ioaddr
, revision_register
);
1921 /* At this point I'll assume that the chip is an SMC91x. */
1922 pr_info_once("%s\n", version
);
1924 /* fill in some of the fields */
1925 dev
->base_addr
= (unsigned long)ioaddr
;
1927 lp
->version
= revision_register
& 0xff;
1928 spin_lock_init(&lp
->lock
);
1930 /* Get the MAC address */
1931 SMC_SELECT_BANK(lp
, 1);
1932 SMC_GET_MAC_ADDR(lp
, dev
->dev_addr
);
1934 /* now, reset the chip, and put it into a known state */
1938 * If dev->irq is 0, then the device has to be banged on to see
1941 * This banging doesn't always detect the IRQ, for unknown reasons.
1942 * a workaround is to reset the chip and try again.
1944 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1945 * be what is requested on the command line. I don't do that, mostly
1946 * because the card that I have uses a non-standard method of accessing
1947 * the IRQs, and because this _should_ work in most configurations.
1949 * Specifying an IRQ is done with the assumption that the user knows
1950 * what (s)he is doing. No checking is done!!!!
1957 dev
->irq
= smc_findirq(lp
);
1960 /* kick the card and try again */
1964 if (dev
->irq
== 0) {
1965 netdev_warn(dev
, "Couldn't autodetect your IRQ. Use irq=xx.\n");
1969 dev
->irq
= irq_canonicalize(dev
->irq
);
1971 dev
->watchdog_timeo
= msecs_to_jiffies(watchdog
);
1972 dev
->netdev_ops
= &smc_netdev_ops
;
1973 dev
->ethtool_ops
= &smc_ethtool_ops
;
1975 tasklet_init(&lp
->tx_task
, smc_hardware_send_pkt
, (unsigned long)dev
);
1976 INIT_WORK(&lp
->phy_configure
, smc_phy_configure
);
1978 lp
->mii
.phy_id_mask
= 0x1f;
1979 lp
->mii
.reg_num_mask
= 0x1f;
1980 lp
->mii
.force_media
= 0;
1981 lp
->mii
.full_duplex
= 0;
1983 lp
->mii
.mdio_read
= smc_phy_read
;
1984 lp
->mii
.mdio_write
= smc_phy_write
;
1987 * Locate the phy, if any.
1989 if (lp
->version
>= (CHIP_91100
<< 4))
1990 smc_phy_detect(dev
);
1992 /* then shut everything down to save power */
1994 smc_phy_powerdown(dev
);
1996 /* Set default parameters */
1997 lp
->msg_enable
= NETIF_MSG_LINK
;
1998 lp
->ctl_rfduplx
= 0;
1999 lp
->ctl_rspeed
= 10;
2001 if (lp
->version
>= (CHIP_91100
<< 4)) {
2002 lp
->ctl_rfduplx
= 1;
2003 lp
->ctl_rspeed
= 100;
2007 retval
= request_irq(dev
->irq
, smc_interrupt
, irq_flags
, dev
->name
, dev
);
2011 #ifdef CONFIG_ARCH_PXA
2012 # ifdef SMC_USE_PXA_DMA
2013 lp
->cfg
.flags
|= SMC91X_USE_DMA
;
2015 if (lp
->cfg
.flags
& SMC91X_USE_DMA
) {
2016 int dma
= pxa_request_dma(dev
->name
, DMA_PRIO_LOW
,
2017 smc_pxa_dma_irq
, NULL
);
2023 retval
= register_netdev(dev
);
2025 /* now, print out the card info, in a short format.. */
2026 netdev_info(dev
, "%s (rev %d) at %p IRQ %d",
2027 version_string
, revision_register
& 0x0f,
2028 lp
->base
, dev
->irq
);
2030 if (dev
->dma
!= (unsigned char)-1)
2031 pr_cont(" DMA %d", dev
->dma
);
2034 lp
->cfg
.flags
& SMC91X_NOWAIT
? " [nowait]" : "",
2035 THROTTLE_TX_PKTS
? " [throttle_tx]" : "");
2037 if (!is_valid_ether_addr(dev
->dev_addr
)) {
2038 netdev_warn(dev
, "Invalid ethernet MAC address. Please set using ifconfig\n");
2040 /* Print the Ethernet address */
2041 netdev_info(dev
, "Ethernet addr: %pM\n",
2045 if (lp
->phy_type
== 0) {
2046 PRINTK(dev
, "No PHY found\n");
2047 } else if ((lp
->phy_type
& 0xfffffff0) == 0x0016f840) {
2048 PRINTK(dev
, "PHY LAN83C183 (LAN91C111 Internal)\n");
2049 } else if ((lp
->phy_type
& 0xfffffff0) == 0x02821c50) {
2050 PRINTK(dev
, "PHY LAN83C180\n");
2055 #ifdef CONFIG_ARCH_PXA
2056 if (retval
&& dev
->dma
!= (unsigned char)-1)
2057 pxa_free_dma(dev
->dma
);
2062 static int smc_enable_device(struct platform_device
*pdev
)
2064 struct net_device
*ndev
= platform_get_drvdata(pdev
);
2065 struct smc_local
*lp
= netdev_priv(ndev
);
2066 unsigned long flags
;
2067 unsigned char ecor
, ecsr
;
2069 struct resource
* res
;
2071 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-attrib");
2076 * Map the attribute space. This is overkill, but clean.
2078 addr
= ioremap(res
->start
, ATTRIB_SIZE
);
2083 * Reset the device. We must disable IRQs around this
2084 * since a reset causes the IRQ line become active.
2086 local_irq_save(flags
);
2087 ecor
= readb(addr
+ (ECOR
<< SMC_IO_SHIFT
)) & ~ECOR_RESET
;
2088 writeb(ecor
| ECOR_RESET
, addr
+ (ECOR
<< SMC_IO_SHIFT
));
2089 readb(addr
+ (ECOR
<< SMC_IO_SHIFT
));
2092 * Wait 100us for the chip to reset.
2097 * The device will ignore all writes to the enable bit while
2098 * reset is asserted, even if the reset bit is cleared in the
2099 * same write. Must clear reset first, then enable the device.
2101 writeb(ecor
, addr
+ (ECOR
<< SMC_IO_SHIFT
));
2102 writeb(ecor
| ECOR_ENABLE
, addr
+ (ECOR
<< SMC_IO_SHIFT
));
2105 * Set the appropriate byte/word mode.
2107 ecsr
= readb(addr
+ (ECSR
<< SMC_IO_SHIFT
)) & ~ECSR_IOIS8
;
2110 writeb(ecsr
, addr
+ (ECSR
<< SMC_IO_SHIFT
));
2111 local_irq_restore(flags
);
2116 * Wait for the chip to wake up. We could poll the control
2117 * register in the main register space, but that isn't mapped
2118 * yet. We know this is going to take 750us.
2125 static int smc_request_attrib(struct platform_device
*pdev
,
2126 struct net_device
*ndev
)
2128 struct resource
* res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-attrib");
2129 struct smc_local
*lp __maybe_unused
= netdev_priv(ndev
);
2134 if (!request_mem_region(res
->start
, ATTRIB_SIZE
, CARDNAME
))
2140 static void smc_release_attrib(struct platform_device
*pdev
,
2141 struct net_device
*ndev
)
2143 struct resource
* res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-attrib");
2144 struct smc_local
*lp __maybe_unused
= netdev_priv(ndev
);
2147 release_mem_region(res
->start
, ATTRIB_SIZE
);
2150 static inline void smc_request_datacs(struct platform_device
*pdev
, struct net_device
*ndev
)
2152 if (SMC_CAN_USE_DATACS
) {
2153 struct resource
* res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-data32");
2154 struct smc_local
*lp
= netdev_priv(ndev
);
2159 if(!request_mem_region(res
->start
, SMC_DATA_EXTENT
, CARDNAME
)) {
2160 netdev_info(ndev
, "%s: failed to request datacs memory region.\n",
2165 lp
->datacs
= ioremap(res
->start
, SMC_DATA_EXTENT
);
2169 static void smc_release_datacs(struct platform_device
*pdev
, struct net_device
*ndev
)
2171 if (SMC_CAN_USE_DATACS
) {
2172 struct smc_local
*lp
= netdev_priv(ndev
);
2173 struct resource
* res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-data32");
2176 iounmap(lp
->datacs
);
2181 release_mem_region(res
->start
, SMC_DATA_EXTENT
);
2185 #if IS_BUILTIN(CONFIG_OF)
2186 static const struct of_device_id smc91x_match
[] = {
2187 { .compatible
= "smsc,lan91c94", },
2188 { .compatible
= "smsc,lan91c111", },
2191 MODULE_DEVICE_TABLE(of
, smc91x_match
);
2194 * of_try_set_control_gpio - configure a gpio if it exists
2196 static int try_toggle_control_gpio(struct device
*dev
,
2197 struct gpio_desc
**desc
,
2198 const char *name
, int index
,
2199 int value
, unsigned int nsdelay
)
2201 struct gpio_desc
*gpio
= *desc
;
2204 gpio
= devm_gpiod_get_index(dev
, name
, index
);
2206 if (PTR_ERR(gpio
) == -ENOENT
) {
2211 return PTR_ERR(gpio
);
2213 res
= gpiod_direction_output(gpio
, !value
);
2215 dev_err(dev
, "unable to toggle gpio %s: %i\n", name
, res
);
2216 devm_gpiod_put(dev
, gpio
);
2221 usleep_range(nsdelay
, 2 * nsdelay
);
2222 gpiod_set_value_cansleep(gpio
, value
);
2232 * dev->base_addr == 0, try to find all possible locations
2233 * dev->base_addr > 0x1ff, this is the address to check
2234 * dev->base_addr == <anything else>, return failure code
2237 * 0 --> there is a device
2238 * anything else, error
2240 static int smc_drv_probe(struct platform_device
*pdev
)
2242 struct smc91x_platdata
*pd
= dev_get_platdata(&pdev
->dev
);
2243 const struct of_device_id
*match
= NULL
;
2244 struct smc_local
*lp
;
2245 struct net_device
*ndev
;
2246 struct resource
*res
, *ires
;
2247 unsigned int __iomem
*addr
;
2248 unsigned long irq_flags
= SMC_IRQ_FLAGS
;
2251 ndev
= alloc_etherdev(sizeof(struct smc_local
));
2256 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
2258 /* get configuration from platform data, only allow use of
2259 * bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
2262 lp
= netdev_priv(ndev
);
2266 memcpy(&lp
->cfg
, pd
, sizeof(lp
->cfg
));
2267 lp
->io_shift
= SMC91X_IO_SHIFT(lp
->cfg
.flags
);
2270 #if IS_BUILTIN(CONFIG_OF)
2271 match
= of_match_device(of_match_ptr(smc91x_match
), &pdev
->dev
);
2273 struct device_node
*np
= pdev
->dev
.of_node
;
2276 /* Optional pwrdwn GPIO configured? */
2277 ret
= try_toggle_control_gpio(&pdev
->dev
, &lp
->power_gpio
,
2278 "power", 0, 0, 100);
2283 * Optional reset GPIO configured? Minimum 100 ns reset needed
2284 * according to LAN91C96 datasheet page 14.
2286 ret
= try_toggle_control_gpio(&pdev
->dev
, &lp
->reset_gpio
,
2287 "reset", 0, 0, 100);
2292 * Need to wait for optional EEPROM to load, max 750 us according
2293 * to LAN91C96 datasheet page 55.
2296 usleep_range(750, 1000);
2298 /* Combination of IO widths supported, default to 16-bit */
2299 if (!of_property_read_u32(np
, "reg-io-width", &val
)) {
2301 lp
->cfg
.flags
|= SMC91X_USE_8BIT
;
2302 if ((val
== 0) || (val
& 2))
2303 lp
->cfg
.flags
|= SMC91X_USE_16BIT
;
2305 lp
->cfg
.flags
|= SMC91X_USE_32BIT
;
2307 lp
->cfg
.flags
|= SMC91X_USE_16BIT
;
2312 if (!pd
&& !match
) {
2313 lp
->cfg
.flags
|= (SMC_CAN_USE_8BIT
) ? SMC91X_USE_8BIT
: 0;
2314 lp
->cfg
.flags
|= (SMC_CAN_USE_16BIT
) ? SMC91X_USE_16BIT
: 0;
2315 lp
->cfg
.flags
|= (SMC_CAN_USE_32BIT
) ? SMC91X_USE_32BIT
: 0;
2316 lp
->cfg
.flags
|= (nowait
) ? SMC91X_NOWAIT
: 0;
2319 if (!lp
->cfg
.leda
&& !lp
->cfg
.ledb
) {
2320 lp
->cfg
.leda
= RPC_LSA_DEFAULT
;
2321 lp
->cfg
.ledb
= RPC_LSB_DEFAULT
;
2324 ndev
->dma
= (unsigned char)-1;
2326 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-regs");
2328 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2331 goto out_free_netdev
;
2335 if (!request_mem_region(res
->start
, SMC_IO_EXTENT
, CARDNAME
)) {
2337 goto out_free_netdev
;
2340 ires
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
2343 goto out_release_io
;
2346 ndev
->irq
= ires
->start
;
2348 if (irq_flags
== -1 || ires
->flags
& IRQF_TRIGGER_MASK
)
2349 irq_flags
= ires
->flags
& IRQF_TRIGGER_MASK
;
2351 ret
= smc_request_attrib(pdev
, ndev
);
2353 goto out_release_io
;
2354 #if defined(CONFIG_SA1100_ASSABET)
2355 neponset_ncr_set(NCR_ENET_OSC_EN
);
2357 platform_set_drvdata(pdev
, ndev
);
2358 ret
= smc_enable_device(pdev
);
2360 goto out_release_attrib
;
2362 addr
= ioremap(res
->start
, SMC_IO_EXTENT
);
2365 goto out_release_attrib
;
2368 #ifdef CONFIG_ARCH_PXA
2370 struct smc_local
*lp
= netdev_priv(ndev
);
2371 lp
->device
= &pdev
->dev
;
2372 lp
->physaddr
= res
->start
;
2376 ret
= smc_probe(ndev
, addr
, irq_flags
);
2380 smc_request_datacs(pdev
, ndev
);
2387 smc_release_attrib(pdev
, ndev
);
2389 release_mem_region(res
->start
, SMC_IO_EXTENT
);
2393 pr_info("%s: not found (%d).\n", CARDNAME
, ret
);
2398 static int smc_drv_remove(struct platform_device
*pdev
)
2400 struct net_device
*ndev
= platform_get_drvdata(pdev
);
2401 struct smc_local
*lp
= netdev_priv(ndev
);
2402 struct resource
*res
;
2404 unregister_netdev(ndev
);
2406 free_irq(ndev
->irq
, ndev
);
2408 #ifdef CONFIG_ARCH_PXA
2409 if (ndev
->dma
!= (unsigned char)-1)
2410 pxa_free_dma(ndev
->dma
);
2414 smc_release_datacs(pdev
,ndev
);
2415 smc_release_attrib(pdev
,ndev
);
2417 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-regs");
2419 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2420 release_mem_region(res
->start
, SMC_IO_EXTENT
);
2427 static int smc_drv_suspend(struct device
*dev
)
2429 struct platform_device
*pdev
= to_platform_device(dev
);
2430 struct net_device
*ndev
= platform_get_drvdata(pdev
);
2433 if (netif_running(ndev
)) {
2434 netif_device_detach(ndev
);
2436 smc_phy_powerdown(ndev
);
2442 static int smc_drv_resume(struct device
*dev
)
2444 struct platform_device
*pdev
= to_platform_device(dev
);
2445 struct net_device
*ndev
= platform_get_drvdata(pdev
);
2448 struct smc_local
*lp
= netdev_priv(ndev
);
2449 smc_enable_device(pdev
);
2450 if (netif_running(ndev
)) {
2453 if (lp
->phy_type
!= 0)
2454 smc_phy_configure(&lp
->phy_configure
);
2455 netif_device_attach(ndev
);
2461 static struct dev_pm_ops smc_drv_pm_ops
= {
2462 .suspend
= smc_drv_suspend
,
2463 .resume
= smc_drv_resume
,
2466 static struct platform_driver smc_driver
= {
2467 .probe
= smc_drv_probe
,
2468 .remove
= smc_drv_remove
,
2471 .owner
= THIS_MODULE
,
2472 .pm
= &smc_drv_pm_ops
,
2473 .of_match_table
= of_match_ptr(smc91x_match
),
2477 module_platform_driver(smc_driver
);