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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[mirror_ubuntu-bionic-kernel.git] / drivers / net / ethernet / smsc / smsc911x.c
1 /***************************************************************************
2 *
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 ***************************************************************************
20 * Rewritten, heavily based on smsc911x simple driver by SMSC.
21 * Partly uses io macros from smc91x.c by Nicolas Pitre
22 *
23 * Supported devices:
24 * LAN9115, LAN9116, LAN9117, LAN9118
25 * LAN9215, LAN9216, LAN9217, LAN9218
26 * LAN9210, LAN9211
27 * LAN9220, LAN9221
28 * LAN89218
29 *
30 */
31
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34 #include <linux/crc32.h>
35 #include <linux/clk.h>
36 #include <linux/delay.h>
37 #include <linux/errno.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/module.h>
45 #include <linux/netdevice.h>
46 #include <linux/platform_device.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/sched.h>
49 #include <linux/timer.h>
50 #include <linux/bug.h>
51 #include <linux/bitops.h>
52 #include <linux/irq.h>
53 #include <linux/io.h>
54 #include <linux/swab.h>
55 #include <linux/phy.h>
56 #include <linux/smsc911x.h>
57 #include <linux/device.h>
58 #include <linux/of.h>
59 #include <linux/of_device.h>
60 #include <linux/of_gpio.h>
61 #include <linux/of_net.h>
62 #include <linux/acpi.h>
63 #include <linux/pm_runtime.h>
64 #include <linux/property.h>
65
66 #include "smsc911x.h"
67
68 #define SMSC_CHIPNAME "smsc911x"
69 #define SMSC_MDIONAME "smsc911x-mdio"
70 #define SMSC_DRV_VERSION "2008-10-21"
71
72 MODULE_LICENSE("GPL");
73 MODULE_VERSION(SMSC_DRV_VERSION);
74 MODULE_ALIAS("platform:smsc911x");
75
76 #if USE_DEBUG > 0
77 static int debug = 16;
78 #else
79 static int debug = 3;
80 #endif
81
82 module_param(debug, int, 0);
83 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
84
85 struct smsc911x_data;
86
87 struct smsc911x_ops {
88 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
89 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
90 void (*rx_readfifo)(struct smsc911x_data *pdata,
91 unsigned int *buf, unsigned int wordcount);
92 void (*tx_writefifo)(struct smsc911x_data *pdata,
93 unsigned int *buf, unsigned int wordcount);
94 };
95
96 #define SMSC911X_NUM_SUPPLIES 2
97
98 struct smsc911x_data {
99 void __iomem *ioaddr;
100
101 unsigned int idrev;
102
103 /* used to decide which workarounds apply */
104 unsigned int generation;
105
106 /* device configuration (copied from platform_data during probe) */
107 struct smsc911x_platform_config config;
108
109 /* This needs to be acquired before calling any of below:
110 * smsc911x_mac_read(), smsc911x_mac_write()
111 */
112 spinlock_t mac_lock;
113
114 /* spinlock to ensure register accesses are serialised */
115 spinlock_t dev_lock;
116
117 struct phy_device *phy_dev;
118 struct mii_bus *mii_bus;
119 int phy_irq[PHY_MAX_ADDR];
120 unsigned int using_extphy;
121 int last_duplex;
122 int last_carrier;
123
124 u32 msg_enable;
125 unsigned int gpio_setting;
126 unsigned int gpio_orig_setting;
127 struct net_device *dev;
128 struct napi_struct napi;
129
130 unsigned int software_irq_signal;
131
132 #ifdef USE_PHY_WORK_AROUND
133 #define MIN_PACKET_SIZE (64)
134 char loopback_tx_pkt[MIN_PACKET_SIZE];
135 char loopback_rx_pkt[MIN_PACKET_SIZE];
136 unsigned int resetcount;
137 #endif
138
139 /* Members for Multicast filter workaround */
140 unsigned int multicast_update_pending;
141 unsigned int set_bits_mask;
142 unsigned int clear_bits_mask;
143 unsigned int hashhi;
144 unsigned int hashlo;
145
146 /* register access functions */
147 const struct smsc911x_ops *ops;
148
149 /* regulators */
150 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
151
152 /* clock */
153 struct clk *clk;
154 };
155
156 /* Easy access to information */
157 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
158
159 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
160 {
161 if (pdata->config.flags & SMSC911X_USE_32BIT)
162 return readl(pdata->ioaddr + reg);
163
164 if (pdata->config.flags & SMSC911X_USE_16BIT)
165 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
166 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
167
168 BUG();
169 return 0;
170 }
171
172 static inline u32
173 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
174 {
175 if (pdata->config.flags & SMSC911X_USE_32BIT)
176 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
177
178 if (pdata->config.flags & SMSC911X_USE_16BIT)
179 return (readw(pdata->ioaddr +
180 __smsc_shift(pdata, reg)) & 0xFFFF) |
181 ((readw(pdata->ioaddr +
182 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
183
184 BUG();
185 return 0;
186 }
187
188 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
189 {
190 u32 data;
191 unsigned long flags;
192
193 spin_lock_irqsave(&pdata->dev_lock, flags);
194 data = pdata->ops->reg_read(pdata, reg);
195 spin_unlock_irqrestore(&pdata->dev_lock, flags);
196
197 return data;
198 }
199
200 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
201 u32 val)
202 {
203 if (pdata->config.flags & SMSC911X_USE_32BIT) {
204 writel(val, pdata->ioaddr + reg);
205 return;
206 }
207
208 if (pdata->config.flags & SMSC911X_USE_16BIT) {
209 writew(val & 0xFFFF, pdata->ioaddr + reg);
210 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
211 return;
212 }
213
214 BUG();
215 }
216
217 static inline void
218 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
219 {
220 if (pdata->config.flags & SMSC911X_USE_32BIT) {
221 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
222 return;
223 }
224
225 if (pdata->config.flags & SMSC911X_USE_16BIT) {
226 writew(val & 0xFFFF,
227 pdata->ioaddr + __smsc_shift(pdata, reg));
228 writew((val >> 16) & 0xFFFF,
229 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
230 return;
231 }
232
233 BUG();
234 }
235
236 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
237 u32 val)
238 {
239 unsigned long flags;
240
241 spin_lock_irqsave(&pdata->dev_lock, flags);
242 pdata->ops->reg_write(pdata, reg, val);
243 spin_unlock_irqrestore(&pdata->dev_lock, flags);
244 }
245
246 /* Writes a packet to the TX_DATA_FIFO */
247 static inline void
248 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
249 unsigned int wordcount)
250 {
251 unsigned long flags;
252
253 spin_lock_irqsave(&pdata->dev_lock, flags);
254
255 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
256 while (wordcount--)
257 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
258 swab32(*buf++));
259 goto out;
260 }
261
262 if (pdata->config.flags & SMSC911X_USE_32BIT) {
263 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
264 goto out;
265 }
266
267 if (pdata->config.flags & SMSC911X_USE_16BIT) {
268 while (wordcount--)
269 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
270 goto out;
271 }
272
273 BUG();
274 out:
275 spin_unlock_irqrestore(&pdata->dev_lock, flags);
276 }
277
278 /* Writes a packet to the TX_DATA_FIFO - shifted version */
279 static inline void
280 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
281 unsigned int wordcount)
282 {
283 unsigned long flags;
284
285 spin_lock_irqsave(&pdata->dev_lock, flags);
286
287 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
288 while (wordcount--)
289 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
290 swab32(*buf++));
291 goto out;
292 }
293
294 if (pdata->config.flags & SMSC911X_USE_32BIT) {
295 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
296 TX_DATA_FIFO), buf, wordcount);
297 goto out;
298 }
299
300 if (pdata->config.flags & SMSC911X_USE_16BIT) {
301 while (wordcount--)
302 __smsc911x_reg_write_shift(pdata,
303 TX_DATA_FIFO, *buf++);
304 goto out;
305 }
306
307 BUG();
308 out:
309 spin_unlock_irqrestore(&pdata->dev_lock, flags);
310 }
311
312 /* Reads a packet out of the RX_DATA_FIFO */
313 static inline void
314 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
315 unsigned int wordcount)
316 {
317 unsigned long flags;
318
319 spin_lock_irqsave(&pdata->dev_lock, flags);
320
321 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
322 while (wordcount--)
323 *buf++ = swab32(__smsc911x_reg_read(pdata,
324 RX_DATA_FIFO));
325 goto out;
326 }
327
328 if (pdata->config.flags & SMSC911X_USE_32BIT) {
329 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
330 goto out;
331 }
332
333 if (pdata->config.flags & SMSC911X_USE_16BIT) {
334 while (wordcount--)
335 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
336 goto out;
337 }
338
339 BUG();
340 out:
341 spin_unlock_irqrestore(&pdata->dev_lock, flags);
342 }
343
344 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
345 static inline void
346 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
347 unsigned int wordcount)
348 {
349 unsigned long flags;
350
351 spin_lock_irqsave(&pdata->dev_lock, flags);
352
353 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
354 while (wordcount--)
355 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
356 RX_DATA_FIFO));
357 goto out;
358 }
359
360 if (pdata->config.flags & SMSC911X_USE_32BIT) {
361 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
362 RX_DATA_FIFO), buf, wordcount);
363 goto out;
364 }
365
366 if (pdata->config.flags & SMSC911X_USE_16BIT) {
367 while (wordcount--)
368 *buf++ = __smsc911x_reg_read_shift(pdata,
369 RX_DATA_FIFO);
370 goto out;
371 }
372
373 BUG();
374 out:
375 spin_unlock_irqrestore(&pdata->dev_lock, flags);
376 }
377
378 /*
379 * enable regulator and clock resources.
380 */
381 static int smsc911x_enable_resources(struct platform_device *pdev)
382 {
383 struct net_device *ndev = platform_get_drvdata(pdev);
384 struct smsc911x_data *pdata = netdev_priv(ndev);
385 int ret = 0;
386
387 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
388 pdata->supplies);
389 if (ret)
390 netdev_err(ndev, "failed to enable regulators %d\n",
391 ret);
392
393 if (!IS_ERR(pdata->clk)) {
394 ret = clk_prepare_enable(pdata->clk);
395 if (ret < 0)
396 netdev_err(ndev, "failed to enable clock %d\n", ret);
397 }
398
399 return ret;
400 }
401
402 /*
403 * disable resources, currently just regulators.
404 */
405 static int smsc911x_disable_resources(struct platform_device *pdev)
406 {
407 struct net_device *ndev = platform_get_drvdata(pdev);
408 struct smsc911x_data *pdata = netdev_priv(ndev);
409 int ret = 0;
410
411 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
412 pdata->supplies);
413
414 if (!IS_ERR(pdata->clk))
415 clk_disable_unprepare(pdata->clk);
416
417 return ret;
418 }
419
420 /*
421 * Request resources, currently just regulators.
422 *
423 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
424 * these are not always-on we need to request regulators to be turned on
425 * before we can try to access the device registers.
426 */
427 static int smsc911x_request_resources(struct platform_device *pdev)
428 {
429 struct net_device *ndev = platform_get_drvdata(pdev);
430 struct smsc911x_data *pdata = netdev_priv(ndev);
431 int ret = 0;
432
433 /* Request regulators */
434 pdata->supplies[0].supply = "vdd33a";
435 pdata->supplies[1].supply = "vddvario";
436 ret = regulator_bulk_get(&pdev->dev,
437 ARRAY_SIZE(pdata->supplies),
438 pdata->supplies);
439 if (ret)
440 netdev_err(ndev, "couldn't get regulators %d\n",
441 ret);
442
443 /* Request clock */
444 pdata->clk = clk_get(&pdev->dev, NULL);
445 if (IS_ERR(pdata->clk))
446 dev_dbg(&pdev->dev, "couldn't get clock %li\n",
447 PTR_ERR(pdata->clk));
448
449 return ret;
450 }
451
452 /*
453 * Free resources, currently just regulators.
454 *
455 */
456 static void smsc911x_free_resources(struct platform_device *pdev)
457 {
458 struct net_device *ndev = platform_get_drvdata(pdev);
459 struct smsc911x_data *pdata = netdev_priv(ndev);
460
461 /* Free regulators */
462 regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
463 pdata->supplies);
464
465 /* Free clock */
466 if (!IS_ERR(pdata->clk)) {
467 clk_put(pdata->clk);
468 pdata->clk = NULL;
469 }
470 }
471
472 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
473 * and smsc911x_mac_write, so assumes mac_lock is held */
474 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
475 {
476 int i;
477 u32 val;
478
479 SMSC_ASSERT_MAC_LOCK(pdata);
480
481 for (i = 0; i < 40; i++) {
482 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
483 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
484 return 0;
485 }
486 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
487 "MAC_CSR_CMD: 0x%08X", val);
488 return -EIO;
489 }
490
491 /* Fetches a MAC register value. Assumes mac_lock is acquired */
492 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
493 {
494 unsigned int temp;
495
496 SMSC_ASSERT_MAC_LOCK(pdata);
497
498 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
499 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
500 SMSC_WARN(pdata, hw, "MAC busy at entry");
501 return 0xFFFFFFFF;
502 }
503
504 /* Send the MAC cmd */
505 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
506 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
507
508 /* Workaround for hardware read-after-write restriction */
509 temp = smsc911x_reg_read(pdata, BYTE_TEST);
510
511 /* Wait for the read to complete */
512 if (likely(smsc911x_mac_complete(pdata) == 0))
513 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
514
515 SMSC_WARN(pdata, hw, "MAC busy after read");
516 return 0xFFFFFFFF;
517 }
518
519 /* Set a mac register, mac_lock must be acquired before calling */
520 static void smsc911x_mac_write(struct smsc911x_data *pdata,
521 unsigned int offset, u32 val)
522 {
523 unsigned int temp;
524
525 SMSC_ASSERT_MAC_LOCK(pdata);
526
527 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
528 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
529 SMSC_WARN(pdata, hw,
530 "smsc911x_mac_write failed, MAC busy at entry");
531 return;
532 }
533
534 /* Send data to write */
535 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
536
537 /* Write the actual data */
538 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
539 MAC_CSR_CMD_CSR_BUSY_));
540
541 /* Workaround for hardware read-after-write restriction */
542 temp = smsc911x_reg_read(pdata, BYTE_TEST);
543
544 /* Wait for the write to complete */
545 if (likely(smsc911x_mac_complete(pdata) == 0))
546 return;
547
548 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
549 }
550
551 /* Get a phy register */
552 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
553 {
554 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
555 unsigned long flags;
556 unsigned int addr;
557 int i, reg;
558
559 spin_lock_irqsave(&pdata->mac_lock, flags);
560
561 /* Confirm MII not busy */
562 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
563 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
564 reg = -EIO;
565 goto out;
566 }
567
568 /* Set the address, index & direction (read from PHY) */
569 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
570 smsc911x_mac_write(pdata, MII_ACC, addr);
571
572 /* Wait for read to complete w/ timeout */
573 for (i = 0; i < 100; i++)
574 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
575 reg = smsc911x_mac_read(pdata, MII_DATA);
576 goto out;
577 }
578
579 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
580 reg = -EIO;
581
582 out:
583 spin_unlock_irqrestore(&pdata->mac_lock, flags);
584 return reg;
585 }
586
587 /* Set a phy register */
588 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
589 u16 val)
590 {
591 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
592 unsigned long flags;
593 unsigned int addr;
594 int i, reg;
595
596 spin_lock_irqsave(&pdata->mac_lock, flags);
597
598 /* Confirm MII not busy */
599 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
600 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
601 reg = -EIO;
602 goto out;
603 }
604
605 /* Put the data to write in the MAC */
606 smsc911x_mac_write(pdata, MII_DATA, val);
607
608 /* Set the address, index & direction (write to PHY) */
609 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
610 MII_ACC_MII_WRITE_;
611 smsc911x_mac_write(pdata, MII_ACC, addr);
612
613 /* Wait for write to complete w/ timeout */
614 for (i = 0; i < 100; i++)
615 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
616 reg = 0;
617 goto out;
618 }
619
620 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
621 reg = -EIO;
622
623 out:
624 spin_unlock_irqrestore(&pdata->mac_lock, flags);
625 return reg;
626 }
627
628 /* Switch to external phy. Assumes tx and rx are stopped. */
629 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
630 {
631 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
632
633 /* Disable phy clocks to the MAC */
634 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
635 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
636 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
637 udelay(10); /* Enough time for clocks to stop */
638
639 /* Switch to external phy */
640 hwcfg |= HW_CFG_EXT_PHY_EN_;
641 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
642
643 /* Enable phy clocks to the MAC */
644 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
645 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
646 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
647 udelay(10); /* Enough time for clocks to restart */
648
649 hwcfg |= HW_CFG_SMI_SEL_;
650 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
651 }
652
653 /* Autodetects and enables external phy if present on supported chips.
654 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
655 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
656 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
657 {
658 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
659
660 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
661 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
662 pdata->using_extphy = 0;
663 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
664 SMSC_TRACE(pdata, hw, "Forcing external PHY");
665 smsc911x_phy_enable_external(pdata);
666 pdata->using_extphy = 1;
667 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
668 SMSC_TRACE(pdata, hw,
669 "HW_CFG EXT_PHY_DET set, using external PHY");
670 smsc911x_phy_enable_external(pdata);
671 pdata->using_extphy = 1;
672 } else {
673 SMSC_TRACE(pdata, hw,
674 "HW_CFG EXT_PHY_DET clear, using internal PHY");
675 pdata->using_extphy = 0;
676 }
677 }
678
679 /* Fetches a tx status out of the status fifo */
680 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
681 {
682 unsigned int result =
683 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
684
685 if (result != 0)
686 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
687
688 return result;
689 }
690
691 /* Fetches the next rx status */
692 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
693 {
694 unsigned int result =
695 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
696
697 if (result != 0)
698 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
699
700 return result;
701 }
702
703 #ifdef USE_PHY_WORK_AROUND
704 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
705 {
706 unsigned int tries;
707 u32 wrsz;
708 u32 rdsz;
709 ulong bufp;
710
711 for (tries = 0; tries < 10; tries++) {
712 unsigned int txcmd_a;
713 unsigned int txcmd_b;
714 unsigned int status;
715 unsigned int pktlength;
716 unsigned int i;
717
718 /* Zero-out rx packet memory */
719 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
720
721 /* Write tx packet to 118 */
722 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
723 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
724 txcmd_a |= MIN_PACKET_SIZE;
725
726 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
727
728 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
729 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
730
731 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
732 wrsz = MIN_PACKET_SIZE + 3;
733 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
734 wrsz >>= 2;
735
736 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
737
738 /* Wait till transmit is done */
739 i = 60;
740 do {
741 udelay(5);
742 status = smsc911x_tx_get_txstatus(pdata);
743 } while ((i--) && (!status));
744
745 if (!status) {
746 SMSC_WARN(pdata, hw,
747 "Failed to transmit during loopback test");
748 continue;
749 }
750 if (status & TX_STS_ES_) {
751 SMSC_WARN(pdata, hw,
752 "Transmit encountered errors during loopback test");
753 continue;
754 }
755
756 /* Wait till receive is done */
757 i = 60;
758 do {
759 udelay(5);
760 status = smsc911x_rx_get_rxstatus(pdata);
761 } while ((i--) && (!status));
762
763 if (!status) {
764 SMSC_WARN(pdata, hw,
765 "Failed to receive during loopback test");
766 continue;
767 }
768 if (status & RX_STS_ES_) {
769 SMSC_WARN(pdata, hw,
770 "Receive encountered errors during loopback test");
771 continue;
772 }
773
774 pktlength = ((status & 0x3FFF0000UL) >> 16);
775 bufp = (ulong)pdata->loopback_rx_pkt;
776 rdsz = pktlength + 3;
777 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
778 rdsz >>= 2;
779
780 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
781
782 if (pktlength != (MIN_PACKET_SIZE + 4)) {
783 SMSC_WARN(pdata, hw, "Unexpected packet size "
784 "during loop back test, size=%d, will retry",
785 pktlength);
786 } else {
787 unsigned int j;
788 int mismatch = 0;
789 for (j = 0; j < MIN_PACKET_SIZE; j++) {
790 if (pdata->loopback_tx_pkt[j]
791 != pdata->loopback_rx_pkt[j]) {
792 mismatch = 1;
793 break;
794 }
795 }
796 if (!mismatch) {
797 SMSC_TRACE(pdata, hw, "Successfully verified "
798 "loopback packet");
799 return 0;
800 } else {
801 SMSC_WARN(pdata, hw, "Data mismatch "
802 "during loop back test, will retry");
803 }
804 }
805 }
806
807 return -EIO;
808 }
809
810 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
811 {
812 struct phy_device *phy_dev = pdata->phy_dev;
813 unsigned int temp;
814 unsigned int i = 100000;
815
816 BUG_ON(!phy_dev);
817 BUG_ON(!phy_dev->bus);
818
819 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
820 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
821 do {
822 msleep(1);
823 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
824 MII_BMCR);
825 } while ((i--) && (temp & BMCR_RESET));
826
827 if (temp & BMCR_RESET) {
828 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
829 return -EIO;
830 }
831 /* Extra delay required because the phy may not be completed with
832 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
833 * enough delay but using 1ms here to be safe */
834 msleep(1);
835
836 return 0;
837 }
838
839 static int smsc911x_phy_loopbacktest(struct net_device *dev)
840 {
841 struct smsc911x_data *pdata = netdev_priv(dev);
842 struct phy_device *phy_dev = pdata->phy_dev;
843 int result = -EIO;
844 unsigned int i, val;
845 unsigned long flags;
846
847 /* Initialise tx packet using broadcast destination address */
848 eth_broadcast_addr(pdata->loopback_tx_pkt);
849
850 /* Use incrementing source address */
851 for (i = 6; i < 12; i++)
852 pdata->loopback_tx_pkt[i] = (char)i;
853
854 /* Set length type field */
855 pdata->loopback_tx_pkt[12] = 0x00;
856 pdata->loopback_tx_pkt[13] = 0x00;
857
858 for (i = 14; i < MIN_PACKET_SIZE; i++)
859 pdata->loopback_tx_pkt[i] = (char)i;
860
861 val = smsc911x_reg_read(pdata, HW_CFG);
862 val &= HW_CFG_TX_FIF_SZ_;
863 val |= HW_CFG_SF_;
864 smsc911x_reg_write(pdata, HW_CFG, val);
865
866 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
867 smsc911x_reg_write(pdata, RX_CFG,
868 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
869
870 for (i = 0; i < 10; i++) {
871 /* Set PHY to 10/FD, no ANEG, and loopback mode */
872 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
873 BMCR_LOOPBACK | BMCR_FULLDPLX);
874
875 /* Enable MAC tx/rx, FD */
876 spin_lock_irqsave(&pdata->mac_lock, flags);
877 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
878 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
879 spin_unlock_irqrestore(&pdata->mac_lock, flags);
880
881 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
882 result = 0;
883 break;
884 }
885 pdata->resetcount++;
886
887 /* Disable MAC rx */
888 spin_lock_irqsave(&pdata->mac_lock, flags);
889 smsc911x_mac_write(pdata, MAC_CR, 0);
890 spin_unlock_irqrestore(&pdata->mac_lock, flags);
891
892 smsc911x_phy_reset(pdata);
893 }
894
895 /* Disable MAC */
896 spin_lock_irqsave(&pdata->mac_lock, flags);
897 smsc911x_mac_write(pdata, MAC_CR, 0);
898 spin_unlock_irqrestore(&pdata->mac_lock, flags);
899
900 /* Cancel PHY loopback mode */
901 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
902
903 smsc911x_reg_write(pdata, TX_CFG, 0);
904 smsc911x_reg_write(pdata, RX_CFG, 0);
905
906 return result;
907 }
908 #endif /* USE_PHY_WORK_AROUND */
909
910 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
911 {
912 struct phy_device *phy_dev = pdata->phy_dev;
913 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
914 u32 flow;
915 unsigned long flags;
916
917 if (phy_dev->duplex == DUPLEX_FULL) {
918 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
919 u16 rmtadv = phy_read(phy_dev, MII_LPA);
920 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
921
922 if (cap & FLOW_CTRL_RX)
923 flow = 0xFFFF0002;
924 else
925 flow = 0;
926
927 if (cap & FLOW_CTRL_TX)
928 afc |= 0xF;
929 else
930 afc &= ~0xF;
931
932 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
933 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
934 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
935 } else {
936 SMSC_TRACE(pdata, hw, "half duplex");
937 flow = 0;
938 afc |= 0xF;
939 }
940
941 spin_lock_irqsave(&pdata->mac_lock, flags);
942 smsc911x_mac_write(pdata, FLOW, flow);
943 spin_unlock_irqrestore(&pdata->mac_lock, flags);
944
945 smsc911x_reg_write(pdata, AFC_CFG, afc);
946 }
947
948 /* Update link mode if anything has changed. Called periodically when the
949 * PHY is in polling mode, even if nothing has changed. */
950 static void smsc911x_phy_adjust_link(struct net_device *dev)
951 {
952 struct smsc911x_data *pdata = netdev_priv(dev);
953 struct phy_device *phy_dev = pdata->phy_dev;
954 unsigned long flags;
955 int carrier;
956
957 if (phy_dev->duplex != pdata->last_duplex) {
958 unsigned int mac_cr;
959 SMSC_TRACE(pdata, hw, "duplex state has changed");
960
961 spin_lock_irqsave(&pdata->mac_lock, flags);
962 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
963 if (phy_dev->duplex) {
964 SMSC_TRACE(pdata, hw,
965 "configuring for full duplex mode");
966 mac_cr |= MAC_CR_FDPX_;
967 } else {
968 SMSC_TRACE(pdata, hw,
969 "configuring for half duplex mode");
970 mac_cr &= ~MAC_CR_FDPX_;
971 }
972 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
973 spin_unlock_irqrestore(&pdata->mac_lock, flags);
974
975 smsc911x_phy_update_flowcontrol(pdata);
976 pdata->last_duplex = phy_dev->duplex;
977 }
978
979 carrier = netif_carrier_ok(dev);
980 if (carrier != pdata->last_carrier) {
981 SMSC_TRACE(pdata, hw, "carrier state has changed");
982 if (carrier) {
983 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
984 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
985 (!pdata->using_extphy)) {
986 /* Restore original GPIO configuration */
987 pdata->gpio_setting = pdata->gpio_orig_setting;
988 smsc911x_reg_write(pdata, GPIO_CFG,
989 pdata->gpio_setting);
990 }
991 } else {
992 SMSC_TRACE(pdata, hw, "configuring for no carrier");
993 /* Check global setting that LED1
994 * usage is 10/100 indicator */
995 pdata->gpio_setting = smsc911x_reg_read(pdata,
996 GPIO_CFG);
997 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
998 (!pdata->using_extphy)) {
999 /* Force 10/100 LED off, after saving
1000 * original GPIO configuration */
1001 pdata->gpio_orig_setting = pdata->gpio_setting;
1002
1003 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
1004 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
1005 | GPIO_CFG_GPIODIR0_
1006 | GPIO_CFG_GPIOD0_);
1007 smsc911x_reg_write(pdata, GPIO_CFG,
1008 pdata->gpio_setting);
1009 }
1010 }
1011 pdata->last_carrier = carrier;
1012 }
1013 }
1014
1015 static int smsc911x_mii_probe(struct net_device *dev)
1016 {
1017 struct smsc911x_data *pdata = netdev_priv(dev);
1018 struct phy_device *phydev = NULL;
1019 int ret;
1020
1021 /* find the first phy */
1022 phydev = phy_find_first(pdata->mii_bus);
1023 if (!phydev) {
1024 netdev_err(dev, "no PHY found\n");
1025 return -ENODEV;
1026 }
1027
1028 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
1029 phydev->addr, phydev->phy_id);
1030
1031 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
1032 pdata->config.phy_interface);
1033
1034 if (ret) {
1035 netdev_err(dev, "Could not attach to PHY\n");
1036 return ret;
1037 }
1038
1039 netdev_info(dev,
1040 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1041 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
1042
1043 /* mask with MAC supported features */
1044 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
1045 SUPPORTED_Asym_Pause);
1046 phydev->advertising = phydev->supported;
1047
1048 pdata->phy_dev = phydev;
1049 pdata->last_duplex = -1;
1050 pdata->last_carrier = -1;
1051
1052 #ifdef USE_PHY_WORK_AROUND
1053 if (smsc911x_phy_loopbacktest(dev) < 0) {
1054 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1055 return -ENODEV;
1056 }
1057 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1058 #endif /* USE_PHY_WORK_AROUND */
1059
1060 SMSC_TRACE(pdata, hw, "phy initialised successfully");
1061 return 0;
1062 }
1063
1064 static int smsc911x_mii_init(struct platform_device *pdev,
1065 struct net_device *dev)
1066 {
1067 struct smsc911x_data *pdata = netdev_priv(dev);
1068 int err = -ENXIO, i;
1069
1070 pdata->mii_bus = mdiobus_alloc();
1071 if (!pdata->mii_bus) {
1072 err = -ENOMEM;
1073 goto err_out_1;
1074 }
1075
1076 pdata->mii_bus->name = SMSC_MDIONAME;
1077 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1078 pdev->name, pdev->id);
1079 pdata->mii_bus->priv = pdata;
1080 pdata->mii_bus->read = smsc911x_mii_read;
1081 pdata->mii_bus->write = smsc911x_mii_write;
1082 pdata->mii_bus->irq = pdata->phy_irq;
1083 for (i = 0; i < PHY_MAX_ADDR; ++i)
1084 pdata->mii_bus->irq[i] = PHY_POLL;
1085
1086 pdata->mii_bus->parent = &pdev->dev;
1087
1088 switch (pdata->idrev & 0xFFFF0000) {
1089 case 0x01170000:
1090 case 0x01150000:
1091 case 0x117A0000:
1092 case 0x115A0000:
1093 /* External PHY supported, try to autodetect */
1094 smsc911x_phy_initialise_external(pdata);
1095 break;
1096 default:
1097 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1098 "using internal PHY");
1099 pdata->using_extphy = 0;
1100 break;
1101 }
1102
1103 if (!pdata->using_extphy) {
1104 /* Mask all PHYs except ID 1 (internal) */
1105 pdata->mii_bus->phy_mask = ~(1 << 1);
1106 }
1107
1108 if (mdiobus_register(pdata->mii_bus)) {
1109 SMSC_WARN(pdata, probe, "Error registering mii bus");
1110 goto err_out_free_bus_2;
1111 }
1112
1113 if (smsc911x_mii_probe(dev) < 0) {
1114 SMSC_WARN(pdata, probe, "Error registering mii bus");
1115 goto err_out_unregister_bus_3;
1116 }
1117
1118 return 0;
1119
1120 err_out_unregister_bus_3:
1121 mdiobus_unregister(pdata->mii_bus);
1122 err_out_free_bus_2:
1123 mdiobus_free(pdata->mii_bus);
1124 err_out_1:
1125 return err;
1126 }
1127
1128 /* Gets the number of tx statuses in the fifo */
1129 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1130 {
1131 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1132 & TX_FIFO_INF_TSUSED_) >> 16;
1133 }
1134
1135 /* Reads tx statuses and increments counters where necessary */
1136 static void smsc911x_tx_update_txcounters(struct net_device *dev)
1137 {
1138 struct smsc911x_data *pdata = netdev_priv(dev);
1139 unsigned int tx_stat;
1140
1141 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1142 if (unlikely(tx_stat & 0x80000000)) {
1143 /* In this driver the packet tag is used as the packet
1144 * length. Since a packet length can never reach the
1145 * size of 0x8000, this bit is reserved. It is worth
1146 * noting that the "reserved bit" in the warning above
1147 * does not reference a hardware defined reserved bit
1148 * but rather a driver defined one.
1149 */
1150 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1151 } else {
1152 if (unlikely(tx_stat & TX_STS_ES_)) {
1153 dev->stats.tx_errors++;
1154 } else {
1155 dev->stats.tx_packets++;
1156 dev->stats.tx_bytes += (tx_stat >> 16);
1157 }
1158 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1159 dev->stats.collisions += 16;
1160 dev->stats.tx_aborted_errors += 1;
1161 } else {
1162 dev->stats.collisions +=
1163 ((tx_stat >> 3) & 0xF);
1164 }
1165 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1166 dev->stats.tx_carrier_errors += 1;
1167 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1168 dev->stats.collisions++;
1169 dev->stats.tx_aborted_errors++;
1170 }
1171 }
1172 }
1173 }
1174
1175 /* Increments the Rx error counters */
1176 static void
1177 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1178 {
1179 int crc_err = 0;
1180
1181 if (unlikely(rxstat & RX_STS_ES_)) {
1182 dev->stats.rx_errors++;
1183 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1184 dev->stats.rx_crc_errors++;
1185 crc_err = 1;
1186 }
1187 }
1188 if (likely(!crc_err)) {
1189 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1190 (rxstat & RX_STS_LENGTH_ERR_)))
1191 dev->stats.rx_length_errors++;
1192 if (rxstat & RX_STS_MCAST_)
1193 dev->stats.multicast++;
1194 }
1195 }
1196
1197 /* Quickly dumps bad packets */
1198 static void
1199 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1200 {
1201 if (likely(pktwords >= 4)) {
1202 unsigned int timeout = 500;
1203 unsigned int val;
1204 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1205 do {
1206 udelay(1);
1207 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1208 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1209
1210 if (unlikely(timeout == 0))
1211 SMSC_WARN(pdata, hw, "Timed out waiting for "
1212 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1213 } else {
1214 unsigned int temp;
1215 while (pktwords--)
1216 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1217 }
1218 }
1219
1220 /* NAPI poll function */
1221 static int smsc911x_poll(struct napi_struct *napi, int budget)
1222 {
1223 struct smsc911x_data *pdata =
1224 container_of(napi, struct smsc911x_data, napi);
1225 struct net_device *dev = pdata->dev;
1226 int npackets = 0;
1227
1228 while (npackets < budget) {
1229 unsigned int pktlength;
1230 unsigned int pktwords;
1231 struct sk_buff *skb;
1232 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1233
1234 if (!rxstat) {
1235 unsigned int temp;
1236 /* We processed all packets available. Tell NAPI it can
1237 * stop polling then re-enable rx interrupts */
1238 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1239 napi_complete(napi);
1240 temp = smsc911x_reg_read(pdata, INT_EN);
1241 temp |= INT_EN_RSFL_EN_;
1242 smsc911x_reg_write(pdata, INT_EN, temp);
1243 break;
1244 }
1245
1246 /* Count packet for NAPI scheduling, even if it has an error.
1247 * Error packets still require cycles to discard */
1248 npackets++;
1249
1250 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1251 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1252 smsc911x_rx_counterrors(dev, rxstat);
1253
1254 if (unlikely(rxstat & RX_STS_ES_)) {
1255 SMSC_WARN(pdata, rx_err,
1256 "Discarding packet with error bit set");
1257 /* Packet has an error, discard it and continue with
1258 * the next */
1259 smsc911x_rx_fastforward(pdata, pktwords);
1260 dev->stats.rx_dropped++;
1261 continue;
1262 }
1263
1264 skb = netdev_alloc_skb(dev, pktwords << 2);
1265 if (unlikely(!skb)) {
1266 SMSC_WARN(pdata, rx_err,
1267 "Unable to allocate skb for rx packet");
1268 /* Drop the packet and stop this polling iteration */
1269 smsc911x_rx_fastforward(pdata, pktwords);
1270 dev->stats.rx_dropped++;
1271 break;
1272 }
1273
1274 pdata->ops->rx_readfifo(pdata,
1275 (unsigned int *)skb->data, pktwords);
1276
1277 /* Align IP on 16B boundary */
1278 skb_reserve(skb, NET_IP_ALIGN);
1279 skb_put(skb, pktlength - 4);
1280 skb->protocol = eth_type_trans(skb, dev);
1281 skb_checksum_none_assert(skb);
1282 netif_receive_skb(skb);
1283
1284 /* Update counters */
1285 dev->stats.rx_packets++;
1286 dev->stats.rx_bytes += (pktlength - 4);
1287 }
1288
1289 /* Return total received packets */
1290 return npackets;
1291 }
1292
1293 /* Returns hash bit number for given MAC address
1294 * Example:
1295 * 01 00 5E 00 00 01 -> returns bit number 31 */
1296 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1297 {
1298 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1299 }
1300
1301 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1302 {
1303 /* Performs the multicast & mac_cr update. This is called when
1304 * safe on the current hardware, and with the mac_lock held */
1305 unsigned int mac_cr;
1306
1307 SMSC_ASSERT_MAC_LOCK(pdata);
1308
1309 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1310 mac_cr |= pdata->set_bits_mask;
1311 mac_cr &= ~(pdata->clear_bits_mask);
1312 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1313 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1314 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1315 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1316 mac_cr, pdata->hashhi, pdata->hashlo);
1317 }
1318
1319 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1320 {
1321 unsigned int mac_cr;
1322
1323 /* This function is only called for older LAN911x devices
1324 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1325 * be modified during Rx - newer devices immediately update the
1326 * registers.
1327 *
1328 * This is called from interrupt context */
1329
1330 spin_lock(&pdata->mac_lock);
1331
1332 /* Check Rx has stopped */
1333 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1334 SMSC_WARN(pdata, drv, "Rx not stopped");
1335
1336 /* Perform the update - safe to do now Rx has stopped */
1337 smsc911x_rx_multicast_update(pdata);
1338
1339 /* Re-enable Rx */
1340 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1341 mac_cr |= MAC_CR_RXEN_;
1342 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1343
1344 pdata->multicast_update_pending = 0;
1345
1346 spin_unlock(&pdata->mac_lock);
1347 }
1348
1349 static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata)
1350 {
1351 int rc = 0;
1352
1353 if (!pdata->phy_dev)
1354 return rc;
1355
1356 /* If the internal PHY is in General Power-Down mode, all, except the
1357 * management interface, is powered-down and stays in that condition as
1358 * long as Phy register bit 0.11 is HIGH.
1359 *
1360 * In that case, clear the bit 0.11, so the PHY powers up and we can
1361 * access to the phy registers.
1362 */
1363 rc = phy_read(pdata->phy_dev, MII_BMCR);
1364 if (rc < 0) {
1365 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1366 return rc;
1367 }
1368
1369 /* If the PHY general power-down bit is not set is not necessary to
1370 * disable the general power down-mode.
1371 */
1372 if (rc & BMCR_PDOWN) {
1373 rc = phy_write(pdata->phy_dev, MII_BMCR, rc & ~BMCR_PDOWN);
1374 if (rc < 0) {
1375 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1376 return rc;
1377 }
1378
1379 usleep_range(1000, 1500);
1380 }
1381
1382 return 0;
1383 }
1384
1385 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1386 {
1387 int rc = 0;
1388
1389 if (!pdata->phy_dev)
1390 return rc;
1391
1392 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1393
1394 if (rc < 0) {
1395 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1396 return rc;
1397 }
1398
1399 /* Only disable if energy detect mode is already enabled */
1400 if (rc & MII_LAN83C185_EDPWRDOWN) {
1401 /* Disable energy detect mode for this SMSC Transceivers */
1402 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1403 rc & (~MII_LAN83C185_EDPWRDOWN));
1404
1405 if (rc < 0) {
1406 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1407 return rc;
1408 }
1409 /* Allow PHY to wakeup */
1410 mdelay(2);
1411 }
1412
1413 return 0;
1414 }
1415
1416 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1417 {
1418 int rc = 0;
1419
1420 if (!pdata->phy_dev)
1421 return rc;
1422
1423 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1424
1425 if (rc < 0) {
1426 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1427 return rc;
1428 }
1429
1430 /* Only enable if energy detect mode is already disabled */
1431 if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1432 /* Enable energy detect mode for this SMSC Transceivers */
1433 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1434 rc | MII_LAN83C185_EDPWRDOWN);
1435
1436 if (rc < 0) {
1437 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1438 return rc;
1439 }
1440 }
1441 return 0;
1442 }
1443
1444 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1445 {
1446 unsigned int timeout;
1447 unsigned int temp;
1448 int ret;
1449
1450 /*
1451 * Make sure to power-up the PHY chip before doing a reset, otherwise
1452 * the reset fails.
1453 */
1454 ret = smsc911x_phy_general_power_up(pdata);
1455 if (ret) {
1456 SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip");
1457 return ret;
1458 }
1459
1460 /*
1461 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1462 * are initialized in a Energy Detect Power-Down mode that prevents
1463 * the MAC chip to be software reseted. So we have to wakeup the PHY
1464 * before.
1465 */
1466 if (pdata->generation == 4) {
1467 ret = smsc911x_phy_disable_energy_detect(pdata);
1468
1469 if (ret) {
1470 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1471 return ret;
1472 }
1473 }
1474
1475 /* Reset the LAN911x */
1476 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1477 timeout = 10;
1478 do {
1479 udelay(10);
1480 temp = smsc911x_reg_read(pdata, HW_CFG);
1481 } while ((--timeout) && (temp & HW_CFG_SRST_));
1482
1483 if (unlikely(temp & HW_CFG_SRST_)) {
1484 SMSC_WARN(pdata, drv, "Failed to complete reset");
1485 return -EIO;
1486 }
1487
1488 if (pdata->generation == 4) {
1489 ret = smsc911x_phy_enable_energy_detect(pdata);
1490
1491 if (ret) {
1492 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1493 return ret;
1494 }
1495 }
1496
1497 return 0;
1498 }
1499
1500 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1501 static void
1502 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1503 {
1504 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1505 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1506 (dev_addr[1] << 8) | dev_addr[0];
1507
1508 SMSC_ASSERT_MAC_LOCK(pdata);
1509
1510 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1511 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1512 }
1513
1514 static void smsc911x_disable_irq_chip(struct net_device *dev)
1515 {
1516 struct smsc911x_data *pdata = netdev_priv(dev);
1517
1518 smsc911x_reg_write(pdata, INT_EN, 0);
1519 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1520 }
1521
1522 static int smsc911x_open(struct net_device *dev)
1523 {
1524 struct smsc911x_data *pdata = netdev_priv(dev);
1525 unsigned int timeout;
1526 unsigned int temp;
1527 unsigned int intcfg;
1528
1529 /* if the phy is not yet registered, retry later*/
1530 if (!pdata->phy_dev) {
1531 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1532 return -EAGAIN;
1533 }
1534
1535 /* Reset the LAN911x */
1536 if (smsc911x_soft_reset(pdata)) {
1537 SMSC_WARN(pdata, hw, "soft reset failed");
1538 return -EIO;
1539 }
1540
1541 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1542 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1543
1544 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1545 spin_lock_irq(&pdata->mac_lock);
1546 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1547 spin_unlock_irq(&pdata->mac_lock);
1548
1549 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1550 timeout = 50;
1551 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1552 --timeout) {
1553 udelay(10);
1554 }
1555
1556 if (unlikely(timeout == 0))
1557 SMSC_WARN(pdata, ifup,
1558 "Timed out waiting for EEPROM busy bit to clear");
1559
1560 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1561
1562 /* The soft reset above cleared the device's MAC address,
1563 * restore it from local copy (set in probe) */
1564 spin_lock_irq(&pdata->mac_lock);
1565 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1566 spin_unlock_irq(&pdata->mac_lock);
1567
1568 /* Initialise irqs, but leave all sources disabled */
1569 smsc911x_disable_irq_chip(dev);
1570
1571 /* Set interrupt deassertion to 100uS */
1572 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1573
1574 if (pdata->config.irq_polarity) {
1575 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1576 intcfg |= INT_CFG_IRQ_POL_;
1577 } else {
1578 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1579 }
1580
1581 if (pdata->config.irq_type) {
1582 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1583 intcfg |= INT_CFG_IRQ_TYPE_;
1584 } else {
1585 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1586 }
1587
1588 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1589
1590 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1591 pdata->software_irq_signal = 0;
1592 smp_wmb();
1593
1594 temp = smsc911x_reg_read(pdata, INT_EN);
1595 temp |= INT_EN_SW_INT_EN_;
1596 smsc911x_reg_write(pdata, INT_EN, temp);
1597
1598 timeout = 1000;
1599 while (timeout--) {
1600 if (pdata->software_irq_signal)
1601 break;
1602 msleep(1);
1603 }
1604
1605 if (!pdata->software_irq_signal) {
1606 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1607 dev->irq);
1608 return -ENODEV;
1609 }
1610 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1611 dev->irq);
1612
1613 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1614 (unsigned long)pdata->ioaddr, dev->irq);
1615
1616 /* Reset the last known duplex and carrier */
1617 pdata->last_duplex = -1;
1618 pdata->last_carrier = -1;
1619
1620 /* Bring the PHY up */
1621 phy_start(pdata->phy_dev);
1622
1623 temp = smsc911x_reg_read(pdata, HW_CFG);
1624 /* Preserve TX FIFO size and external PHY configuration */
1625 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1626 temp |= HW_CFG_SF_;
1627 smsc911x_reg_write(pdata, HW_CFG, temp);
1628
1629 temp = smsc911x_reg_read(pdata, FIFO_INT);
1630 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1631 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1632 smsc911x_reg_write(pdata, FIFO_INT, temp);
1633
1634 /* set RX Data offset to 2 bytes for alignment */
1635 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1636
1637 /* enable NAPI polling before enabling RX interrupts */
1638 napi_enable(&pdata->napi);
1639
1640 temp = smsc911x_reg_read(pdata, INT_EN);
1641 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1642 smsc911x_reg_write(pdata, INT_EN, temp);
1643
1644 spin_lock_irq(&pdata->mac_lock);
1645 temp = smsc911x_mac_read(pdata, MAC_CR);
1646 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1647 smsc911x_mac_write(pdata, MAC_CR, temp);
1648 spin_unlock_irq(&pdata->mac_lock);
1649
1650 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1651
1652 netif_start_queue(dev);
1653 return 0;
1654 }
1655
1656 /* Entry point for stopping the interface */
1657 static int smsc911x_stop(struct net_device *dev)
1658 {
1659 struct smsc911x_data *pdata = netdev_priv(dev);
1660 unsigned int temp;
1661
1662 /* Disable all device interrupts */
1663 temp = smsc911x_reg_read(pdata, INT_CFG);
1664 temp &= ~INT_CFG_IRQ_EN_;
1665 smsc911x_reg_write(pdata, INT_CFG, temp);
1666
1667 /* Stop Tx and Rx polling */
1668 netif_stop_queue(dev);
1669 napi_disable(&pdata->napi);
1670
1671 /* At this point all Rx and Tx activity is stopped */
1672 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1673 smsc911x_tx_update_txcounters(dev);
1674
1675 /* Bring the PHY down */
1676 if (pdata->phy_dev)
1677 phy_stop(pdata->phy_dev);
1678
1679 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1680 return 0;
1681 }
1682
1683 /* Entry point for transmitting a packet */
1684 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1685 {
1686 struct smsc911x_data *pdata = netdev_priv(dev);
1687 unsigned int freespace;
1688 unsigned int tx_cmd_a;
1689 unsigned int tx_cmd_b;
1690 unsigned int temp;
1691 u32 wrsz;
1692 ulong bufp;
1693
1694 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1695
1696 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1697 SMSC_WARN(pdata, tx_err,
1698 "Tx data fifo low, space available: %d", freespace);
1699
1700 /* Word alignment adjustment */
1701 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1702 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1703 tx_cmd_a |= (unsigned int)skb->len;
1704
1705 tx_cmd_b = ((unsigned int)skb->len) << 16;
1706 tx_cmd_b |= (unsigned int)skb->len;
1707
1708 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1709 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1710
1711 bufp = (ulong)skb->data & (~0x3);
1712 wrsz = (u32)skb->len + 3;
1713 wrsz += (u32)((ulong)skb->data & 0x3);
1714 wrsz >>= 2;
1715
1716 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1717 freespace -= (skb->len + 32);
1718 skb_tx_timestamp(skb);
1719 dev_consume_skb_any(skb);
1720
1721 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1722 smsc911x_tx_update_txcounters(dev);
1723
1724 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1725 netif_stop_queue(dev);
1726 temp = smsc911x_reg_read(pdata, FIFO_INT);
1727 temp &= 0x00FFFFFF;
1728 temp |= 0x32000000;
1729 smsc911x_reg_write(pdata, FIFO_INT, temp);
1730 }
1731
1732 return NETDEV_TX_OK;
1733 }
1734
1735 /* Entry point for getting status counters */
1736 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1737 {
1738 struct smsc911x_data *pdata = netdev_priv(dev);
1739 smsc911x_tx_update_txcounters(dev);
1740 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1741 return &dev->stats;
1742 }
1743
1744 /* Entry point for setting addressing modes */
1745 static void smsc911x_set_multicast_list(struct net_device *dev)
1746 {
1747 struct smsc911x_data *pdata = netdev_priv(dev);
1748 unsigned long flags;
1749
1750 if (dev->flags & IFF_PROMISC) {
1751 /* Enabling promiscuous mode */
1752 pdata->set_bits_mask = MAC_CR_PRMS_;
1753 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1754 pdata->hashhi = 0;
1755 pdata->hashlo = 0;
1756 } else if (dev->flags & IFF_ALLMULTI) {
1757 /* Enabling all multicast mode */
1758 pdata->set_bits_mask = MAC_CR_MCPAS_;
1759 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1760 pdata->hashhi = 0;
1761 pdata->hashlo = 0;
1762 } else if (!netdev_mc_empty(dev)) {
1763 /* Enabling specific multicast addresses */
1764 unsigned int hash_high = 0;
1765 unsigned int hash_low = 0;
1766 struct netdev_hw_addr *ha;
1767
1768 pdata->set_bits_mask = MAC_CR_HPFILT_;
1769 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1770
1771 netdev_for_each_mc_addr(ha, dev) {
1772 unsigned int bitnum = smsc911x_hash(ha->addr);
1773 unsigned int mask = 0x01 << (bitnum & 0x1F);
1774
1775 if (bitnum & 0x20)
1776 hash_high |= mask;
1777 else
1778 hash_low |= mask;
1779 }
1780
1781 pdata->hashhi = hash_high;
1782 pdata->hashlo = hash_low;
1783 } else {
1784 /* Enabling local MAC address only */
1785 pdata->set_bits_mask = 0;
1786 pdata->clear_bits_mask =
1787 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1788 pdata->hashhi = 0;
1789 pdata->hashlo = 0;
1790 }
1791
1792 spin_lock_irqsave(&pdata->mac_lock, flags);
1793
1794 if (pdata->generation <= 1) {
1795 /* Older hardware revision - cannot change these flags while
1796 * receiving data */
1797 if (!pdata->multicast_update_pending) {
1798 unsigned int temp;
1799 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1800 pdata->multicast_update_pending = 1;
1801
1802 /* Request the hardware to stop, then perform the
1803 * update when we get an RX_STOP interrupt */
1804 temp = smsc911x_mac_read(pdata, MAC_CR);
1805 temp &= ~(MAC_CR_RXEN_);
1806 smsc911x_mac_write(pdata, MAC_CR, temp);
1807 } else {
1808 /* There is another update pending, this should now
1809 * use the newer values */
1810 }
1811 } else {
1812 /* Newer hardware revision - can write immediately */
1813 smsc911x_rx_multicast_update(pdata);
1814 }
1815
1816 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1817 }
1818
1819 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1820 {
1821 struct net_device *dev = dev_id;
1822 struct smsc911x_data *pdata = netdev_priv(dev);
1823 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1824 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1825 int serviced = IRQ_NONE;
1826 u32 temp;
1827
1828 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1829 temp = smsc911x_reg_read(pdata, INT_EN);
1830 temp &= (~INT_EN_SW_INT_EN_);
1831 smsc911x_reg_write(pdata, INT_EN, temp);
1832 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1833 pdata->software_irq_signal = 1;
1834 smp_wmb();
1835 serviced = IRQ_HANDLED;
1836 }
1837
1838 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1839 /* Called when there is a multicast update scheduled and
1840 * it is now safe to complete the update */
1841 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1842 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1843 if (pdata->multicast_update_pending)
1844 smsc911x_rx_multicast_update_workaround(pdata);
1845 serviced = IRQ_HANDLED;
1846 }
1847
1848 if (intsts & inten & INT_STS_TDFA_) {
1849 temp = smsc911x_reg_read(pdata, FIFO_INT);
1850 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1851 smsc911x_reg_write(pdata, FIFO_INT, temp);
1852 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1853 netif_wake_queue(dev);
1854 serviced = IRQ_HANDLED;
1855 }
1856
1857 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1858 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1859 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1860 serviced = IRQ_HANDLED;
1861 }
1862
1863 if (likely(intsts & inten & INT_STS_RSFL_)) {
1864 if (likely(napi_schedule_prep(&pdata->napi))) {
1865 /* Disable Rx interrupts */
1866 temp = smsc911x_reg_read(pdata, INT_EN);
1867 temp &= (~INT_EN_RSFL_EN_);
1868 smsc911x_reg_write(pdata, INT_EN, temp);
1869 /* Schedule a NAPI poll */
1870 __napi_schedule(&pdata->napi);
1871 } else {
1872 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1873 }
1874 serviced = IRQ_HANDLED;
1875 }
1876
1877 return serviced;
1878 }
1879
1880 #ifdef CONFIG_NET_POLL_CONTROLLER
1881 static void smsc911x_poll_controller(struct net_device *dev)
1882 {
1883 disable_irq(dev->irq);
1884 smsc911x_irqhandler(0, dev);
1885 enable_irq(dev->irq);
1886 }
1887 #endif /* CONFIG_NET_POLL_CONTROLLER */
1888
1889 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1890 {
1891 struct smsc911x_data *pdata = netdev_priv(dev);
1892 struct sockaddr *addr = p;
1893
1894 /* On older hardware revisions we cannot change the mac address
1895 * registers while receiving data. Newer devices can safely change
1896 * this at any time. */
1897 if (pdata->generation <= 1 && netif_running(dev))
1898 return -EBUSY;
1899
1900 if (!is_valid_ether_addr(addr->sa_data))
1901 return -EADDRNOTAVAIL;
1902
1903 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1904
1905 spin_lock_irq(&pdata->mac_lock);
1906 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1907 spin_unlock_irq(&pdata->mac_lock);
1908
1909 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1910
1911 return 0;
1912 }
1913
1914 /* Standard ioctls for mii-tool */
1915 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1916 {
1917 struct smsc911x_data *pdata = netdev_priv(dev);
1918
1919 if (!netif_running(dev) || !pdata->phy_dev)
1920 return -EINVAL;
1921
1922 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1923 }
1924
1925 static int
1926 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1927 {
1928 struct smsc911x_data *pdata = netdev_priv(dev);
1929
1930 cmd->maxtxpkt = 1;
1931 cmd->maxrxpkt = 1;
1932 return phy_ethtool_gset(pdata->phy_dev, cmd);
1933 }
1934
1935 static int
1936 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1937 {
1938 struct smsc911x_data *pdata = netdev_priv(dev);
1939
1940 return phy_ethtool_sset(pdata->phy_dev, cmd);
1941 }
1942
1943 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1944 struct ethtool_drvinfo *info)
1945 {
1946 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1947 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1948 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1949 sizeof(info->bus_info));
1950 }
1951
1952 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1953 {
1954 struct smsc911x_data *pdata = netdev_priv(dev);
1955
1956 return phy_start_aneg(pdata->phy_dev);
1957 }
1958
1959 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1960 {
1961 struct smsc911x_data *pdata = netdev_priv(dev);
1962 return pdata->msg_enable;
1963 }
1964
1965 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1966 {
1967 struct smsc911x_data *pdata = netdev_priv(dev);
1968 pdata->msg_enable = level;
1969 }
1970
1971 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1972 {
1973 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1974 sizeof(u32);
1975 }
1976
1977 static void
1978 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1979 void *buf)
1980 {
1981 struct smsc911x_data *pdata = netdev_priv(dev);
1982 struct phy_device *phy_dev = pdata->phy_dev;
1983 unsigned long flags;
1984 unsigned int i;
1985 unsigned int j = 0;
1986 u32 *data = buf;
1987
1988 regs->version = pdata->idrev;
1989 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1990 data[j++] = smsc911x_reg_read(pdata, i);
1991
1992 for (i = MAC_CR; i <= WUCSR; i++) {
1993 spin_lock_irqsave(&pdata->mac_lock, flags);
1994 data[j++] = smsc911x_mac_read(pdata, i);
1995 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1996 }
1997
1998 for (i = 0; i <= 31; i++)
1999 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
2000 }
2001
2002 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
2003 {
2004 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
2005 temp &= ~GPIO_CFG_EEPR_EN_;
2006 smsc911x_reg_write(pdata, GPIO_CFG, temp);
2007 msleep(1);
2008 }
2009
2010 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
2011 {
2012 int timeout = 100;
2013 u32 e2cmd;
2014
2015 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
2016 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
2017 SMSC_WARN(pdata, drv, "Busy at start");
2018 return -EBUSY;
2019 }
2020
2021 e2cmd = op | E2P_CMD_EPC_BUSY_;
2022 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
2023
2024 do {
2025 msleep(1);
2026 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
2027 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
2028
2029 if (!timeout) {
2030 SMSC_TRACE(pdata, drv, "TIMED OUT");
2031 return -EAGAIN;
2032 }
2033
2034 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
2035 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
2036 return -EINVAL;
2037 }
2038
2039 return 0;
2040 }
2041
2042 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
2043 u8 address, u8 *data)
2044 {
2045 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
2046 int ret;
2047
2048 SMSC_TRACE(pdata, drv, "address 0x%x", address);
2049 ret = smsc911x_eeprom_send_cmd(pdata, op);
2050
2051 if (!ret)
2052 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
2053
2054 return ret;
2055 }
2056
2057 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
2058 u8 address, u8 data)
2059 {
2060 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
2061 u32 temp;
2062 int ret;
2063
2064 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
2065 ret = smsc911x_eeprom_send_cmd(pdata, op);
2066
2067 if (!ret) {
2068 op = E2P_CMD_EPC_CMD_WRITE_ | address;
2069 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2070
2071 /* Workaround for hardware read-after-write restriction */
2072 temp = smsc911x_reg_read(pdata, BYTE_TEST);
2073
2074 ret = smsc911x_eeprom_send_cmd(pdata, op);
2075 }
2076
2077 return ret;
2078 }
2079
2080 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2081 {
2082 return SMSC911X_EEPROM_SIZE;
2083 }
2084
2085 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2086 struct ethtool_eeprom *eeprom, u8 *data)
2087 {
2088 struct smsc911x_data *pdata = netdev_priv(dev);
2089 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2090 int len;
2091 int i;
2092
2093 smsc911x_eeprom_enable_access(pdata);
2094
2095 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2096 for (i = 0; i < len; i++) {
2097 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2098 if (ret < 0) {
2099 eeprom->len = 0;
2100 return ret;
2101 }
2102 }
2103
2104 memcpy(data, &eeprom_data[eeprom->offset], len);
2105 eeprom->len = len;
2106 return 0;
2107 }
2108
2109 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2110 struct ethtool_eeprom *eeprom, u8 *data)
2111 {
2112 int ret;
2113 struct smsc911x_data *pdata = netdev_priv(dev);
2114
2115 smsc911x_eeprom_enable_access(pdata);
2116 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2117 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2118 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2119
2120 /* Single byte write, according to man page */
2121 eeprom->len = 1;
2122
2123 return ret;
2124 }
2125
2126 static const struct ethtool_ops smsc911x_ethtool_ops = {
2127 .get_settings = smsc911x_ethtool_getsettings,
2128 .set_settings = smsc911x_ethtool_setsettings,
2129 .get_link = ethtool_op_get_link,
2130 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2131 .nway_reset = smsc911x_ethtool_nwayreset,
2132 .get_msglevel = smsc911x_ethtool_getmsglevel,
2133 .set_msglevel = smsc911x_ethtool_setmsglevel,
2134 .get_regs_len = smsc911x_ethtool_getregslen,
2135 .get_regs = smsc911x_ethtool_getregs,
2136 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2137 .get_eeprom = smsc911x_ethtool_get_eeprom,
2138 .set_eeprom = smsc911x_ethtool_set_eeprom,
2139 .get_ts_info = ethtool_op_get_ts_info,
2140 };
2141
2142 static const struct net_device_ops smsc911x_netdev_ops = {
2143 .ndo_open = smsc911x_open,
2144 .ndo_stop = smsc911x_stop,
2145 .ndo_start_xmit = smsc911x_hard_start_xmit,
2146 .ndo_get_stats = smsc911x_get_stats,
2147 .ndo_set_rx_mode = smsc911x_set_multicast_list,
2148 .ndo_do_ioctl = smsc911x_do_ioctl,
2149 .ndo_change_mtu = eth_change_mtu,
2150 .ndo_validate_addr = eth_validate_addr,
2151 .ndo_set_mac_address = smsc911x_set_mac_address,
2152 #ifdef CONFIG_NET_POLL_CONTROLLER
2153 .ndo_poll_controller = smsc911x_poll_controller,
2154 #endif
2155 };
2156
2157 /* copies the current mac address from hardware to dev->dev_addr */
2158 static void smsc911x_read_mac_address(struct net_device *dev)
2159 {
2160 struct smsc911x_data *pdata = netdev_priv(dev);
2161 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2162 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2163
2164 dev->dev_addr[0] = (u8)(mac_low32);
2165 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2166 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2167 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2168 dev->dev_addr[4] = (u8)(mac_high16);
2169 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2170 }
2171
2172 /* Initializing private device structures, only called from probe */
2173 static int smsc911x_init(struct net_device *dev)
2174 {
2175 struct smsc911x_data *pdata = netdev_priv(dev);
2176 unsigned int byte_test, mask;
2177 unsigned int to = 100;
2178
2179 SMSC_TRACE(pdata, probe, "Driver Parameters:");
2180 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2181 (unsigned long)pdata->ioaddr);
2182 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2183 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2184
2185 spin_lock_init(&pdata->dev_lock);
2186 spin_lock_init(&pdata->mac_lock);
2187
2188 if (pdata->ioaddr == NULL) {
2189 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2190 return -ENODEV;
2191 }
2192
2193 /*
2194 * poll the READY bit in PMT_CTRL. Any other access to the device is
2195 * forbidden while this bit isn't set. Try for 100ms
2196 *
2197 * Note that this test is done before the WORD_SWAP register is
2198 * programmed. So in some configurations the READY bit is at 16 before
2199 * WORD_SWAP is written to. This issue is worked around by waiting
2200 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2201 *
2202 * SMSC has confirmed that checking bit 16 (marked as reserved in
2203 * the datasheet) is fine since these bits "will either never be set
2204 * or can only go high after READY does (so also indicate the device
2205 * is ready)".
2206 */
2207
2208 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2209 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2210 udelay(1000);
2211
2212 if (to == 0) {
2213 netdev_err(dev, "Device not READY in 100ms aborting\n");
2214 return -ENODEV;
2215 }
2216
2217 /* Check byte ordering */
2218 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2219 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2220 if (byte_test == 0x43218765) {
2221 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2222 "applying WORD_SWAP");
2223 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2224
2225 /* 1 dummy read of BYTE_TEST is needed after a write to
2226 * WORD_SWAP before its contents are valid */
2227 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2228
2229 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2230 }
2231
2232 if (byte_test != 0x87654321) {
2233 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2234 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2235 SMSC_WARN(pdata, probe,
2236 "top 16 bits equal to bottom 16 bits");
2237 SMSC_TRACE(pdata, probe,
2238 "This may mean the chip is set "
2239 "for 32 bit while the bus is reading 16 bit");
2240 }
2241 return -ENODEV;
2242 }
2243
2244 /* Default generation to zero (all workarounds apply) */
2245 pdata->generation = 0;
2246
2247 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2248 switch (pdata->idrev & 0xFFFF0000) {
2249 case 0x01180000:
2250 case 0x01170000:
2251 case 0x01160000:
2252 case 0x01150000:
2253 case 0x218A0000:
2254 /* LAN911[5678] family */
2255 pdata->generation = pdata->idrev & 0x0000FFFF;
2256 break;
2257
2258 case 0x118A0000:
2259 case 0x117A0000:
2260 case 0x116A0000:
2261 case 0x115A0000:
2262 /* LAN921[5678] family */
2263 pdata->generation = 3;
2264 break;
2265
2266 case 0x92100000:
2267 case 0x92110000:
2268 case 0x92200000:
2269 case 0x92210000:
2270 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2271 pdata->generation = 4;
2272 break;
2273
2274 default:
2275 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2276 pdata->idrev);
2277 return -ENODEV;
2278 }
2279
2280 SMSC_TRACE(pdata, probe,
2281 "LAN911x identified, idrev: 0x%08X, generation: %d",
2282 pdata->idrev, pdata->generation);
2283
2284 if (pdata->generation == 0)
2285 SMSC_WARN(pdata, probe,
2286 "This driver is not intended for this chip revision");
2287
2288 /* workaround for platforms without an eeprom, where the mac address
2289 * is stored elsewhere and set by the bootloader. This saves the
2290 * mac address before resetting the device */
2291 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2292 spin_lock_irq(&pdata->mac_lock);
2293 smsc911x_read_mac_address(dev);
2294 spin_unlock_irq(&pdata->mac_lock);
2295 }
2296
2297 /* Reset the LAN911x */
2298 if (smsc911x_soft_reset(pdata))
2299 return -ENODEV;
2300
2301 dev->flags |= IFF_MULTICAST;
2302 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2303 dev->netdev_ops = &smsc911x_netdev_ops;
2304 dev->ethtool_ops = &smsc911x_ethtool_ops;
2305
2306 return 0;
2307 }
2308
2309 static int smsc911x_drv_remove(struct platform_device *pdev)
2310 {
2311 struct net_device *dev;
2312 struct smsc911x_data *pdata;
2313 struct resource *res;
2314
2315 dev = platform_get_drvdata(pdev);
2316 BUG_ON(!dev);
2317 pdata = netdev_priv(dev);
2318 BUG_ON(!pdata);
2319 BUG_ON(!pdata->ioaddr);
2320 BUG_ON(!pdata->phy_dev);
2321
2322 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2323
2324 phy_disconnect(pdata->phy_dev);
2325 pdata->phy_dev = NULL;
2326 mdiobus_unregister(pdata->mii_bus);
2327 mdiobus_free(pdata->mii_bus);
2328
2329 unregister_netdev(dev);
2330 free_irq(dev->irq, dev);
2331 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2332 "smsc911x-memory");
2333 if (!res)
2334 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2335
2336 release_mem_region(res->start, resource_size(res));
2337
2338 iounmap(pdata->ioaddr);
2339
2340 (void)smsc911x_disable_resources(pdev);
2341 smsc911x_free_resources(pdev);
2342
2343 free_netdev(dev);
2344
2345 pm_runtime_put(&pdev->dev);
2346 pm_runtime_disable(&pdev->dev);
2347
2348 return 0;
2349 }
2350
2351 /* standard register acces */
2352 static const struct smsc911x_ops standard_smsc911x_ops = {
2353 .reg_read = __smsc911x_reg_read,
2354 .reg_write = __smsc911x_reg_write,
2355 .rx_readfifo = smsc911x_rx_readfifo,
2356 .tx_writefifo = smsc911x_tx_writefifo,
2357 };
2358
2359 /* shifted register access */
2360 static const struct smsc911x_ops shifted_smsc911x_ops = {
2361 .reg_read = __smsc911x_reg_read_shift,
2362 .reg_write = __smsc911x_reg_write_shift,
2363 .rx_readfifo = smsc911x_rx_readfifo_shift,
2364 .tx_writefifo = smsc911x_tx_writefifo_shift,
2365 };
2366
2367 static int smsc911x_probe_config(struct smsc911x_platform_config *config,
2368 struct device *dev)
2369 {
2370 int phy_interface;
2371 u32 width = 0;
2372 int err;
2373
2374 phy_interface = device_get_phy_mode(dev);
2375 if (phy_interface < 0)
2376 phy_interface = PHY_INTERFACE_MODE_NA;
2377 config->phy_interface = phy_interface;
2378
2379 device_get_mac_address(dev, config->mac, ETH_ALEN);
2380
2381 err = device_property_read_u32(dev, "reg-io-width", &width);
2382 if (err == -ENXIO)
2383 return err;
2384 if (!err && width == 4)
2385 config->flags |= SMSC911X_USE_32BIT;
2386 else
2387 config->flags |= SMSC911X_USE_16BIT;
2388
2389 device_property_read_u32(dev, "reg-shift", &config->shift);
2390
2391 if (device_property_present(dev, "smsc,irq-active-high"))
2392 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2393
2394 if (device_property_present(dev, "smsc,irq-push-pull"))
2395 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2396
2397 if (device_property_present(dev, "smsc,force-internal-phy"))
2398 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2399
2400 if (device_property_present(dev, "smsc,force-external-phy"))
2401 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2402
2403 if (device_property_present(dev, "smsc,save-mac-address"))
2404 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2405
2406 return 0;
2407 }
2408
2409 static int smsc911x_drv_probe(struct platform_device *pdev)
2410 {
2411 struct net_device *dev;
2412 struct smsc911x_data *pdata;
2413 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev);
2414 struct resource *res;
2415 unsigned int intcfg = 0;
2416 int res_size, irq, irq_flags;
2417 int retval;
2418
2419 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2420 "smsc911x-memory");
2421 if (!res)
2422 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2423 if (!res) {
2424 pr_warn("Could not allocate resource\n");
2425 retval = -ENODEV;
2426 goto out_0;
2427 }
2428 res_size = resource_size(res);
2429
2430 irq = platform_get_irq(pdev, 0);
2431 if (irq == -EPROBE_DEFER) {
2432 retval = -EPROBE_DEFER;
2433 goto out_0;
2434 } else if (irq <= 0) {
2435 pr_warn("Could not allocate irq resource\n");
2436 retval = -ENODEV;
2437 goto out_0;
2438 }
2439
2440 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2441 retval = -EBUSY;
2442 goto out_0;
2443 }
2444
2445 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2446 if (!dev) {
2447 retval = -ENOMEM;
2448 goto out_release_io_1;
2449 }
2450
2451 SET_NETDEV_DEV(dev, &pdev->dev);
2452
2453 pdata = netdev_priv(dev);
2454 dev->irq = irq;
2455 irq_flags = irq_get_trigger_type(irq);
2456 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2457
2458 pdata->dev = dev;
2459 pdata->msg_enable = ((1 << debug) - 1);
2460
2461 platform_set_drvdata(pdev, dev);
2462
2463 retval = smsc911x_request_resources(pdev);
2464 if (retval)
2465 goto out_request_resources_fail;
2466
2467 retval = smsc911x_enable_resources(pdev);
2468 if (retval)
2469 goto out_enable_resources_fail;
2470
2471 if (pdata->ioaddr == NULL) {
2472 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2473 retval = -ENOMEM;
2474 goto out_disable_resources;
2475 }
2476
2477 retval = smsc911x_probe_config(&pdata->config, &pdev->dev);
2478 if (retval && config) {
2479 /* copy config parameters across to pdata */
2480 memcpy(&pdata->config, config, sizeof(pdata->config));
2481 retval = 0;
2482 }
2483
2484 if (retval) {
2485 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2486 goto out_disable_resources;
2487 }
2488
2489 /* assume standard, non-shifted, access to HW registers */
2490 pdata->ops = &standard_smsc911x_ops;
2491 /* apply the right access if shifting is needed */
2492 if (pdata->config.shift)
2493 pdata->ops = &shifted_smsc911x_ops;
2494
2495 pm_runtime_enable(&pdev->dev);
2496 pm_runtime_get_sync(&pdev->dev);
2497
2498 retval = smsc911x_init(dev);
2499 if (retval < 0)
2500 goto out_disable_resources;
2501
2502 /* configure irq polarity and type before connecting isr */
2503 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2504 intcfg |= INT_CFG_IRQ_POL_;
2505
2506 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2507 intcfg |= INT_CFG_IRQ_TYPE_;
2508
2509 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2510
2511 /* Ensure interrupts are globally disabled before connecting ISR */
2512 smsc911x_disable_irq_chip(dev);
2513
2514 retval = request_irq(dev->irq, smsc911x_irqhandler,
2515 irq_flags | IRQF_SHARED, dev->name, dev);
2516 if (retval) {
2517 SMSC_WARN(pdata, probe,
2518 "Unable to claim requested irq: %d", dev->irq);
2519 goto out_disable_resources;
2520 }
2521
2522 netif_carrier_off(dev);
2523
2524 retval = register_netdev(dev);
2525 if (retval) {
2526 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2527 goto out_free_irq;
2528 } else {
2529 SMSC_TRACE(pdata, probe,
2530 "Network interface: \"%s\"", dev->name);
2531 }
2532
2533 retval = smsc911x_mii_init(pdev, dev);
2534 if (retval) {
2535 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2536 goto out_unregister_netdev_5;
2537 }
2538
2539 spin_lock_irq(&pdata->mac_lock);
2540
2541 /* Check if mac address has been specified when bringing interface up */
2542 if (is_valid_ether_addr(dev->dev_addr)) {
2543 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2544 SMSC_TRACE(pdata, probe,
2545 "MAC Address is specified by configuration");
2546 } else if (is_valid_ether_addr(pdata->config.mac)) {
2547 memcpy(dev->dev_addr, pdata->config.mac, ETH_ALEN);
2548 SMSC_TRACE(pdata, probe,
2549 "MAC Address specified by platform data");
2550 } else {
2551 /* Try reading mac address from device. if EEPROM is present
2552 * it will already have been set */
2553 smsc_get_mac(dev);
2554
2555 if (is_valid_ether_addr(dev->dev_addr)) {
2556 /* eeprom values are valid so use them */
2557 SMSC_TRACE(pdata, probe,
2558 "Mac Address is read from LAN911x EEPROM");
2559 } else {
2560 /* eeprom values are invalid, generate random MAC */
2561 eth_hw_addr_random(dev);
2562 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2563 SMSC_TRACE(pdata, probe,
2564 "MAC Address is set to eth_random_addr");
2565 }
2566 }
2567
2568 spin_unlock_irq(&pdata->mac_lock);
2569
2570 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2571
2572 return 0;
2573
2574 out_unregister_netdev_5:
2575 unregister_netdev(dev);
2576 out_free_irq:
2577 free_irq(dev->irq, dev);
2578 out_disable_resources:
2579 pm_runtime_put(&pdev->dev);
2580 pm_runtime_disable(&pdev->dev);
2581 (void)smsc911x_disable_resources(pdev);
2582 out_enable_resources_fail:
2583 smsc911x_free_resources(pdev);
2584 out_request_resources_fail:
2585 iounmap(pdata->ioaddr);
2586 free_netdev(dev);
2587 out_release_io_1:
2588 release_mem_region(res->start, resource_size(res));
2589 out_0:
2590 return retval;
2591 }
2592
2593 #ifdef CONFIG_PM
2594 /* This implementation assumes the devices remains powered on its VDDVARIO
2595 * pins during suspend. */
2596
2597 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2598
2599 static int smsc911x_suspend(struct device *dev)
2600 {
2601 struct net_device *ndev = dev_get_drvdata(dev);
2602 struct smsc911x_data *pdata = netdev_priv(ndev);
2603
2604 /* enable wake on LAN, energy detection and the external PME
2605 * signal. */
2606 smsc911x_reg_write(pdata, PMT_CTRL,
2607 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2608 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2609
2610 return 0;
2611 }
2612
2613 static int smsc911x_resume(struct device *dev)
2614 {
2615 struct net_device *ndev = dev_get_drvdata(dev);
2616 struct smsc911x_data *pdata = netdev_priv(ndev);
2617 unsigned int to = 100;
2618
2619 /* Note 3.11 from the datasheet:
2620 * "When the LAN9220 is in a power saving state, a write of any
2621 * data to the BYTE_TEST register will wake-up the device."
2622 */
2623 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2624
2625 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2626 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2627 * if it failed. */
2628 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2629 udelay(1000);
2630
2631 return (to == 0) ? -EIO : 0;
2632 }
2633
2634 static const struct dev_pm_ops smsc911x_pm_ops = {
2635 .suspend = smsc911x_suspend,
2636 .resume = smsc911x_resume,
2637 };
2638
2639 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2640
2641 #else
2642 #define SMSC911X_PM_OPS NULL
2643 #endif
2644
2645 #ifdef CONFIG_OF
2646 static const struct of_device_id smsc911x_dt_ids[] = {
2647 { .compatible = "smsc,lan9115", },
2648 { /* sentinel */ }
2649 };
2650 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2651 #endif
2652
2653 static const struct acpi_device_id smsc911x_acpi_match[] = {
2654 { "ARMH9118", 0 },
2655 { }
2656 };
2657 MODULE_DEVICE_TABLE(acpi, smsc911x_acpi_match);
2658
2659 static struct platform_driver smsc911x_driver = {
2660 .probe = smsc911x_drv_probe,
2661 .remove = smsc911x_drv_remove,
2662 .driver = {
2663 .name = SMSC_CHIPNAME,
2664 .pm = SMSC911X_PM_OPS,
2665 .of_match_table = of_match_ptr(smsc911x_dt_ids),
2666 .acpi_match_table = ACPI_PTR(smsc911x_acpi_match),
2667 },
2668 };
2669
2670 /* Entry point for loading the module */
2671 static int __init smsc911x_init_module(void)
2672 {
2673 SMSC_INITIALIZE();
2674 return platform_driver_register(&smsc911x_driver);
2675 }
2676
2677 /* entry point for unloading the module */
2678 static void __exit smsc911x_cleanup_module(void)
2679 {
2680 platform_driver_unregister(&smsc911x_driver);
2681 }
2682
2683 module_init(smsc911x_init_module);
2684 module_exit(smsc911x_cleanup_module);
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