]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - drivers/net/ethernet/smsc/smsc911x.c
projects / mirror_ubuntu-zesty-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
net: smsc911x: request and deassert optional RESET GPIO
[mirror_ubuntu-zesty-kernel.git] / drivers / net / ethernet / smsc / smsc911x.c
1 /***************************************************************************
2 *
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 ***************************************************************************
20 * Rewritten, heavily based on smsc911x simple driver by SMSC.
21 * Partly uses io macros from smc91x.c by Nicolas Pitre
22 *
23 * Supported devices:
24 * LAN9115, LAN9116, LAN9117, LAN9118
25 * LAN9215, LAN9216, LAN9217, LAN9218
26 * LAN9210, LAN9211
27 * LAN9220, LAN9221
28 * LAN89218
29 *
30 */
31
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34 #include <linux/crc32.h>
35 #include <linux/clk.h>
36 #include <linux/delay.h>
37 #include <linux/errno.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/module.h>
45 #include <linux/netdevice.h>
46 #include <linux/platform_device.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/sched.h>
49 #include <linux/timer.h>
50 #include <linux/bug.h>
51 #include <linux/bitops.h>
52 #include <linux/irq.h>
53 #include <linux/io.h>
54 #include <linux/swab.h>
55 #include <linux/phy.h>
56 #include <linux/smsc911x.h>
57 #include <linux/device.h>
58 #include <linux/of.h>
59 #include <linux/of_device.h>
60 #include <linux/of_gpio.h>
61 #include <linux/of_net.h>
62 #include <linux/acpi.h>
63 #include <linux/pm_runtime.h>
64 #include <linux/property.h>
65 #include <linux/gpio/consumer.h>
66
67 #include "smsc911x.h"
68
69 #define SMSC_CHIPNAME "smsc911x"
70 #define SMSC_MDIONAME "smsc911x-mdio"
71 #define SMSC_DRV_VERSION "2008-10-21"
72
73 MODULE_LICENSE("GPL");
74 MODULE_VERSION(SMSC_DRV_VERSION);
75 MODULE_ALIAS("platform:smsc911x");
76
77 #if USE_DEBUG > 0
78 static int debug = 16;
79 #else
80 static int debug = 3;
81 #endif
82
83 module_param(debug, int, 0);
84 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
85
86 struct smsc911x_data;
87
88 struct smsc911x_ops {
89 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
90 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
91 void (*rx_readfifo)(struct smsc911x_data *pdata,
92 unsigned int *buf, unsigned int wordcount);
93 void (*tx_writefifo)(struct smsc911x_data *pdata,
94 unsigned int *buf, unsigned int wordcount);
95 };
96
97 #define SMSC911X_NUM_SUPPLIES 2
98
99 struct smsc911x_data {
100 void __iomem *ioaddr;
101
102 unsigned int idrev;
103
104 /* used to decide which workarounds apply */
105 unsigned int generation;
106
107 /* device configuration (copied from platform_data during probe) */
108 struct smsc911x_platform_config config;
109
110 /* This needs to be acquired before calling any of below:
111 * smsc911x_mac_read(), smsc911x_mac_write()
112 */
113 spinlock_t mac_lock;
114
115 /* spinlock to ensure register accesses are serialised */
116 spinlock_t dev_lock;
117
118 struct mii_bus *mii_bus;
119 unsigned int using_extphy;
120 int last_duplex;
121 int last_carrier;
122
123 u32 msg_enable;
124 unsigned int gpio_setting;
125 unsigned int gpio_orig_setting;
126 struct net_device *dev;
127 struct napi_struct napi;
128
129 unsigned int software_irq_signal;
130
131 #ifdef USE_PHY_WORK_AROUND
132 #define MIN_PACKET_SIZE (64)
133 char loopback_tx_pkt[MIN_PACKET_SIZE];
134 char loopback_rx_pkt[MIN_PACKET_SIZE];
135 unsigned int resetcount;
136 #endif
137
138 /* Members for Multicast filter workaround */
139 unsigned int multicast_update_pending;
140 unsigned int set_bits_mask;
141 unsigned int clear_bits_mask;
142 unsigned int hashhi;
143 unsigned int hashlo;
144
145 /* register access functions */
146 const struct smsc911x_ops *ops;
147
148 /* regulators */
149 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
150
151 /* Reset GPIO */
152 struct gpio_desc *reset_gpiod;
153
154 /* clock */
155 struct clk *clk;
156 };
157
158 /* Easy access to information */
159 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
160
161 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
162 {
163 if (pdata->config.flags & SMSC911X_USE_32BIT)
164 return readl(pdata->ioaddr + reg);
165
166 if (pdata->config.flags & SMSC911X_USE_16BIT)
167 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
168 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
169
170 BUG();
171 return 0;
172 }
173
174 static inline u32
175 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
176 {
177 if (pdata->config.flags & SMSC911X_USE_32BIT)
178 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
179
180 if (pdata->config.flags & SMSC911X_USE_16BIT)
181 return (readw(pdata->ioaddr +
182 __smsc_shift(pdata, reg)) & 0xFFFF) |
183 ((readw(pdata->ioaddr +
184 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
185
186 BUG();
187 return 0;
188 }
189
190 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
191 {
192 u32 data;
193 unsigned long flags;
194
195 spin_lock_irqsave(&pdata->dev_lock, flags);
196 data = pdata->ops->reg_read(pdata, reg);
197 spin_unlock_irqrestore(&pdata->dev_lock, flags);
198
199 return data;
200 }
201
202 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
203 u32 val)
204 {
205 if (pdata->config.flags & SMSC911X_USE_32BIT) {
206 writel(val, pdata->ioaddr + reg);
207 return;
208 }
209
210 if (pdata->config.flags & SMSC911X_USE_16BIT) {
211 writew(val & 0xFFFF, pdata->ioaddr + reg);
212 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
213 return;
214 }
215
216 BUG();
217 }
218
219 static inline void
220 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
221 {
222 if (pdata->config.flags & SMSC911X_USE_32BIT) {
223 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
224 return;
225 }
226
227 if (pdata->config.flags & SMSC911X_USE_16BIT) {
228 writew(val & 0xFFFF,
229 pdata->ioaddr + __smsc_shift(pdata, reg));
230 writew((val >> 16) & 0xFFFF,
231 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
232 return;
233 }
234
235 BUG();
236 }
237
238 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
239 u32 val)
240 {
241 unsigned long flags;
242
243 spin_lock_irqsave(&pdata->dev_lock, flags);
244 pdata->ops->reg_write(pdata, reg, val);
245 spin_unlock_irqrestore(&pdata->dev_lock, flags);
246 }
247
248 /* Writes a packet to the TX_DATA_FIFO */
249 static inline void
250 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
251 unsigned int wordcount)
252 {
253 unsigned long flags;
254
255 spin_lock_irqsave(&pdata->dev_lock, flags);
256
257 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
258 while (wordcount--)
259 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
260 swab32(*buf++));
261 goto out;
262 }
263
264 if (pdata->config.flags & SMSC911X_USE_32BIT) {
265 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
266 goto out;
267 }
268
269 if (pdata->config.flags & SMSC911X_USE_16BIT) {
270 while (wordcount--)
271 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
272 goto out;
273 }
274
275 BUG();
276 out:
277 spin_unlock_irqrestore(&pdata->dev_lock, flags);
278 }
279
280 /* Writes a packet to the TX_DATA_FIFO - shifted version */
281 static inline void
282 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
283 unsigned int wordcount)
284 {
285 unsigned long flags;
286
287 spin_lock_irqsave(&pdata->dev_lock, flags);
288
289 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
290 while (wordcount--)
291 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
292 swab32(*buf++));
293 goto out;
294 }
295
296 if (pdata->config.flags & SMSC911X_USE_32BIT) {
297 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
298 TX_DATA_FIFO), buf, wordcount);
299 goto out;
300 }
301
302 if (pdata->config.flags & SMSC911X_USE_16BIT) {
303 while (wordcount--)
304 __smsc911x_reg_write_shift(pdata,
305 TX_DATA_FIFO, *buf++);
306 goto out;
307 }
308
309 BUG();
310 out:
311 spin_unlock_irqrestore(&pdata->dev_lock, flags);
312 }
313
314 /* Reads a packet out of the RX_DATA_FIFO */
315 static inline void
316 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
317 unsigned int wordcount)
318 {
319 unsigned long flags;
320
321 spin_lock_irqsave(&pdata->dev_lock, flags);
322
323 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
324 while (wordcount--)
325 *buf++ = swab32(__smsc911x_reg_read(pdata,
326 RX_DATA_FIFO));
327 goto out;
328 }
329
330 if (pdata->config.flags & SMSC911X_USE_32BIT) {
331 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
332 goto out;
333 }
334
335 if (pdata->config.flags & SMSC911X_USE_16BIT) {
336 while (wordcount--)
337 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
338 goto out;
339 }
340
341 BUG();
342 out:
343 spin_unlock_irqrestore(&pdata->dev_lock, flags);
344 }
345
346 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
347 static inline void
348 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
349 unsigned int wordcount)
350 {
351 unsigned long flags;
352
353 spin_lock_irqsave(&pdata->dev_lock, flags);
354
355 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
356 while (wordcount--)
357 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
358 RX_DATA_FIFO));
359 goto out;
360 }
361
362 if (pdata->config.flags & SMSC911X_USE_32BIT) {
363 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
364 RX_DATA_FIFO), buf, wordcount);
365 goto out;
366 }
367
368 if (pdata->config.flags & SMSC911X_USE_16BIT) {
369 while (wordcount--)
370 *buf++ = __smsc911x_reg_read_shift(pdata,
371 RX_DATA_FIFO);
372 goto out;
373 }
374
375 BUG();
376 out:
377 spin_unlock_irqrestore(&pdata->dev_lock, flags);
378 }
379
380 /*
381 * enable regulator and clock resources.
382 */
383 static int smsc911x_enable_resources(struct platform_device *pdev)
384 {
385 struct net_device *ndev = platform_get_drvdata(pdev);
386 struct smsc911x_data *pdata = netdev_priv(ndev);
387 int ret = 0;
388
389 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
390 pdata->supplies);
391 if (ret)
392 netdev_err(ndev, "failed to enable regulators %d\n",
393 ret);
394
395 if (!IS_ERR(pdata->clk)) {
396 ret = clk_prepare_enable(pdata->clk);
397 if (ret < 0)
398 netdev_err(ndev, "failed to enable clock %d\n", ret);
399 }
400
401 return ret;
402 }
403
404 /*
405 * disable resources, currently just regulators.
406 */
407 static int smsc911x_disable_resources(struct platform_device *pdev)
408 {
409 struct net_device *ndev = platform_get_drvdata(pdev);
410 struct smsc911x_data *pdata = netdev_priv(ndev);
411 int ret = 0;
412
413 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
414 pdata->supplies);
415
416 if (!IS_ERR(pdata->clk))
417 clk_disable_unprepare(pdata->clk);
418
419 return ret;
420 }
421
422 /*
423 * Request resources, currently just regulators.
424 *
425 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
426 * these are not always-on we need to request regulators to be turned on
427 * before we can try to access the device registers.
428 */
429 static int smsc911x_request_resources(struct platform_device *pdev)
430 {
431 struct net_device *ndev = platform_get_drvdata(pdev);
432 struct smsc911x_data *pdata = netdev_priv(ndev);
433 int ret = 0;
434
435 /* Request regulators */
436 pdata->supplies[0].supply = "vdd33a";
437 pdata->supplies[1].supply = "vddvario";
438 ret = regulator_bulk_get(&pdev->dev,
439 ARRAY_SIZE(pdata->supplies),
440 pdata->supplies);
441 if (ret)
442 netdev_err(ndev, "couldn't get regulators %d\n",
443 ret);
444
445 /* Request optional RESET GPIO */
446 pdata->reset_gpiod = devm_gpiod_get_optional(&pdev->dev,
447 "reset",
448 GPIOD_OUT_LOW);
449
450 /* Request clock */
451 pdata->clk = clk_get(&pdev->dev, NULL);
452 if (IS_ERR(pdata->clk))
453 dev_dbg(&pdev->dev, "couldn't get clock %li\n",
454 PTR_ERR(pdata->clk));
455
456 return ret;
457 }
458
459 /*
460 * Free resources, currently just regulators.
461 *
462 */
463 static void smsc911x_free_resources(struct platform_device *pdev)
464 {
465 struct net_device *ndev = platform_get_drvdata(pdev);
466 struct smsc911x_data *pdata = netdev_priv(ndev);
467
468 /* Free regulators */
469 regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
470 pdata->supplies);
471
472 /* Free clock */
473 if (!IS_ERR(pdata->clk)) {
474 clk_put(pdata->clk);
475 pdata->clk = NULL;
476 }
477 }
478
479 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
480 * and smsc911x_mac_write, so assumes mac_lock is held */
481 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
482 {
483 int i;
484 u32 val;
485
486 SMSC_ASSERT_MAC_LOCK(pdata);
487
488 for (i = 0; i < 40; i++) {
489 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
490 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
491 return 0;
492 }
493 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
494 "MAC_CSR_CMD: 0x%08X", val);
495 return -EIO;
496 }
497
498 /* Fetches a MAC register value. Assumes mac_lock is acquired */
499 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
500 {
501 unsigned int temp;
502
503 SMSC_ASSERT_MAC_LOCK(pdata);
504
505 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
506 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
507 SMSC_WARN(pdata, hw, "MAC busy at entry");
508 return 0xFFFFFFFF;
509 }
510
511 /* Send the MAC cmd */
512 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
513 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
514
515 /* Workaround for hardware read-after-write restriction */
516 temp = smsc911x_reg_read(pdata, BYTE_TEST);
517
518 /* Wait for the read to complete */
519 if (likely(smsc911x_mac_complete(pdata) == 0))
520 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
521
522 SMSC_WARN(pdata, hw, "MAC busy after read");
523 return 0xFFFFFFFF;
524 }
525
526 /* Set a mac register, mac_lock must be acquired before calling */
527 static void smsc911x_mac_write(struct smsc911x_data *pdata,
528 unsigned int offset, u32 val)
529 {
530 unsigned int temp;
531
532 SMSC_ASSERT_MAC_LOCK(pdata);
533
534 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
535 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
536 SMSC_WARN(pdata, hw,
537 "smsc911x_mac_write failed, MAC busy at entry");
538 return;
539 }
540
541 /* Send data to write */
542 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
543
544 /* Write the actual data */
545 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
546 MAC_CSR_CMD_CSR_BUSY_));
547
548 /* Workaround for hardware read-after-write restriction */
549 temp = smsc911x_reg_read(pdata, BYTE_TEST);
550
551 /* Wait for the write to complete */
552 if (likely(smsc911x_mac_complete(pdata) == 0))
553 return;
554
555 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
556 }
557
558 /* Get a phy register */
559 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
560 {
561 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
562 unsigned long flags;
563 unsigned int addr;
564 int i, reg;
565
566 spin_lock_irqsave(&pdata->mac_lock, flags);
567
568 /* Confirm MII not busy */
569 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
570 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
571 reg = -EIO;
572 goto out;
573 }
574
575 /* Set the address, index & direction (read from PHY) */
576 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
577 smsc911x_mac_write(pdata, MII_ACC, addr);
578
579 /* Wait for read to complete w/ timeout */
580 for (i = 0; i < 100; i++)
581 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
582 reg = smsc911x_mac_read(pdata, MII_DATA);
583 goto out;
584 }
585
586 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
587 reg = -EIO;
588
589 out:
590 spin_unlock_irqrestore(&pdata->mac_lock, flags);
591 return reg;
592 }
593
594 /* Set a phy register */
595 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
596 u16 val)
597 {
598 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
599 unsigned long flags;
600 unsigned int addr;
601 int i, reg;
602
603 spin_lock_irqsave(&pdata->mac_lock, flags);
604
605 /* Confirm MII not busy */
606 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
607 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
608 reg = -EIO;
609 goto out;
610 }
611
612 /* Put the data to write in the MAC */
613 smsc911x_mac_write(pdata, MII_DATA, val);
614
615 /* Set the address, index & direction (write to PHY) */
616 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
617 MII_ACC_MII_WRITE_;
618 smsc911x_mac_write(pdata, MII_ACC, addr);
619
620 /* Wait for write to complete w/ timeout */
621 for (i = 0; i < 100; i++)
622 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
623 reg = 0;
624 goto out;
625 }
626
627 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
628 reg = -EIO;
629
630 out:
631 spin_unlock_irqrestore(&pdata->mac_lock, flags);
632 return reg;
633 }
634
635 /* Switch to external phy. Assumes tx and rx are stopped. */
636 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
637 {
638 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
639
640 /* Disable phy clocks to the MAC */
641 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
642 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
643 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
644 udelay(10); /* Enough time for clocks to stop */
645
646 /* Switch to external phy */
647 hwcfg |= HW_CFG_EXT_PHY_EN_;
648 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
649
650 /* Enable phy clocks to the MAC */
651 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
652 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
653 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
654 udelay(10); /* Enough time for clocks to restart */
655
656 hwcfg |= HW_CFG_SMI_SEL_;
657 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
658 }
659
660 /* Autodetects and enables external phy if present on supported chips.
661 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
662 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
663 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
664 {
665 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
666
667 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
668 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
669 pdata->using_extphy = 0;
670 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
671 SMSC_TRACE(pdata, hw, "Forcing external PHY");
672 smsc911x_phy_enable_external(pdata);
673 pdata->using_extphy = 1;
674 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
675 SMSC_TRACE(pdata, hw,
676 "HW_CFG EXT_PHY_DET set, using external PHY");
677 smsc911x_phy_enable_external(pdata);
678 pdata->using_extphy = 1;
679 } else {
680 SMSC_TRACE(pdata, hw,
681 "HW_CFG EXT_PHY_DET clear, using internal PHY");
682 pdata->using_extphy = 0;
683 }
684 }
685
686 /* Fetches a tx status out of the status fifo */
687 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
688 {
689 unsigned int result =
690 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
691
692 if (result != 0)
693 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
694
695 return result;
696 }
697
698 /* Fetches the next rx status */
699 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
700 {
701 unsigned int result =
702 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
703
704 if (result != 0)
705 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
706
707 return result;
708 }
709
710 #ifdef USE_PHY_WORK_AROUND
711 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
712 {
713 unsigned int tries;
714 u32 wrsz;
715 u32 rdsz;
716 ulong bufp;
717
718 for (tries = 0; tries < 10; tries++) {
719 unsigned int txcmd_a;
720 unsigned int txcmd_b;
721 unsigned int status;
722 unsigned int pktlength;
723 unsigned int i;
724
725 /* Zero-out rx packet memory */
726 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
727
728 /* Write tx packet to 118 */
729 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
730 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
731 txcmd_a |= MIN_PACKET_SIZE;
732
733 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
734
735 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
736 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
737
738 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
739 wrsz = MIN_PACKET_SIZE + 3;
740 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
741 wrsz >>= 2;
742
743 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
744
745 /* Wait till transmit is done */
746 i = 60;
747 do {
748 udelay(5);
749 status = smsc911x_tx_get_txstatus(pdata);
750 } while ((i--) && (!status));
751
752 if (!status) {
753 SMSC_WARN(pdata, hw,
754 "Failed to transmit during loopback test");
755 continue;
756 }
757 if (status & TX_STS_ES_) {
758 SMSC_WARN(pdata, hw,
759 "Transmit encountered errors during loopback test");
760 continue;
761 }
762
763 /* Wait till receive is done */
764 i = 60;
765 do {
766 udelay(5);
767 status = smsc911x_rx_get_rxstatus(pdata);
768 } while ((i--) && (!status));
769
770 if (!status) {
771 SMSC_WARN(pdata, hw,
772 "Failed to receive during loopback test");
773 continue;
774 }
775 if (status & RX_STS_ES_) {
776 SMSC_WARN(pdata, hw,
777 "Receive encountered errors during loopback test");
778 continue;
779 }
780
781 pktlength = ((status & 0x3FFF0000UL) >> 16);
782 bufp = (ulong)pdata->loopback_rx_pkt;
783 rdsz = pktlength + 3;
784 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
785 rdsz >>= 2;
786
787 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
788
789 if (pktlength != (MIN_PACKET_SIZE + 4)) {
790 SMSC_WARN(pdata, hw, "Unexpected packet size "
791 "during loop back test, size=%d, will retry",
792 pktlength);
793 } else {
794 unsigned int j;
795 int mismatch = 0;
796 for (j = 0; j < MIN_PACKET_SIZE; j++) {
797 if (pdata->loopback_tx_pkt[j]
798 != pdata->loopback_rx_pkt[j]) {
799 mismatch = 1;
800 break;
801 }
802 }
803 if (!mismatch) {
804 SMSC_TRACE(pdata, hw, "Successfully verified "
805 "loopback packet");
806 return 0;
807 } else {
808 SMSC_WARN(pdata, hw, "Data mismatch "
809 "during loop back test, will retry");
810 }
811 }
812 }
813
814 return -EIO;
815 }
816
817 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
818 {
819 unsigned int temp;
820 unsigned int i = 100000;
821
822 temp = smsc911x_reg_read(pdata, PMT_CTRL);
823 smsc911x_reg_write(pdata, PMT_CTRL, temp | PMT_CTRL_PHY_RST_);
824 do {
825 msleep(1);
826 temp = smsc911x_reg_read(pdata, PMT_CTRL);
827 } while ((i--) && (temp & PMT_CTRL_PHY_RST_));
828
829 if (unlikely(temp & PMT_CTRL_PHY_RST_)) {
830 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
831 return -EIO;
832 }
833 /* Extra delay required because the phy may not be completed with
834 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
835 * enough delay but using 1ms here to be safe */
836 msleep(1);
837
838 return 0;
839 }
840
841 static int smsc911x_phy_loopbacktest(struct net_device *dev)
842 {
843 struct smsc911x_data *pdata = netdev_priv(dev);
844 struct phy_device *phy_dev = dev->phydev;
845 int result = -EIO;
846 unsigned int i, val;
847 unsigned long flags;
848
849 /* Initialise tx packet using broadcast destination address */
850 eth_broadcast_addr(pdata->loopback_tx_pkt);
851
852 /* Use incrementing source address */
853 for (i = 6; i < 12; i++)
854 pdata->loopback_tx_pkt[i] = (char)i;
855
856 /* Set length type field */
857 pdata->loopback_tx_pkt[12] = 0x00;
858 pdata->loopback_tx_pkt[13] = 0x00;
859
860 for (i = 14; i < MIN_PACKET_SIZE; i++)
861 pdata->loopback_tx_pkt[i] = (char)i;
862
863 val = smsc911x_reg_read(pdata, HW_CFG);
864 val &= HW_CFG_TX_FIF_SZ_;
865 val |= HW_CFG_SF_;
866 smsc911x_reg_write(pdata, HW_CFG, val);
867
868 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
869 smsc911x_reg_write(pdata, RX_CFG,
870 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
871
872 for (i = 0; i < 10; i++) {
873 /* Set PHY to 10/FD, no ANEG, and loopback mode */
874 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr,
875 MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX);
876
877 /* Enable MAC tx/rx, FD */
878 spin_lock_irqsave(&pdata->mac_lock, flags);
879 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
880 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
881 spin_unlock_irqrestore(&pdata->mac_lock, flags);
882
883 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
884 result = 0;
885 break;
886 }
887 pdata->resetcount++;
888
889 /* Disable MAC rx */
890 spin_lock_irqsave(&pdata->mac_lock, flags);
891 smsc911x_mac_write(pdata, MAC_CR, 0);
892 spin_unlock_irqrestore(&pdata->mac_lock, flags);
893
894 smsc911x_phy_reset(pdata);
895 }
896
897 /* Disable MAC */
898 spin_lock_irqsave(&pdata->mac_lock, flags);
899 smsc911x_mac_write(pdata, MAC_CR, 0);
900 spin_unlock_irqrestore(&pdata->mac_lock, flags);
901
902 /* Cancel PHY loopback mode */
903 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr, MII_BMCR, 0);
904
905 smsc911x_reg_write(pdata, TX_CFG, 0);
906 smsc911x_reg_write(pdata, RX_CFG, 0);
907
908 return result;
909 }
910 #endif /* USE_PHY_WORK_AROUND */
911
912 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
913 {
914 struct net_device *ndev = pdata->dev;
915 struct phy_device *phy_dev = ndev->phydev;
916 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
917 u32 flow;
918 unsigned long flags;
919
920 if (phy_dev->duplex == DUPLEX_FULL) {
921 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
922 u16 rmtadv = phy_read(phy_dev, MII_LPA);
923 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
924
925 if (cap & FLOW_CTRL_RX)
926 flow = 0xFFFF0002;
927 else
928 flow = 0;
929
930 if (cap & FLOW_CTRL_TX)
931 afc |= 0xF;
932 else
933 afc &= ~0xF;
934
935 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
936 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
937 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
938 } else {
939 SMSC_TRACE(pdata, hw, "half duplex");
940 flow = 0;
941 afc |= 0xF;
942 }
943
944 spin_lock_irqsave(&pdata->mac_lock, flags);
945 smsc911x_mac_write(pdata, FLOW, flow);
946 spin_unlock_irqrestore(&pdata->mac_lock, flags);
947
948 smsc911x_reg_write(pdata, AFC_CFG, afc);
949 }
950
951 /* Update link mode if anything has changed. Called periodically when the
952 * PHY is in polling mode, even if nothing has changed. */
953 static void smsc911x_phy_adjust_link(struct net_device *dev)
954 {
955 struct smsc911x_data *pdata = netdev_priv(dev);
956 struct phy_device *phy_dev = dev->phydev;
957 unsigned long flags;
958 int carrier;
959
960 if (phy_dev->duplex != pdata->last_duplex) {
961 unsigned int mac_cr;
962 SMSC_TRACE(pdata, hw, "duplex state has changed");
963
964 spin_lock_irqsave(&pdata->mac_lock, flags);
965 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
966 if (phy_dev->duplex) {
967 SMSC_TRACE(pdata, hw,
968 "configuring for full duplex mode");
969 mac_cr |= MAC_CR_FDPX_;
970 } else {
971 SMSC_TRACE(pdata, hw,
972 "configuring for half duplex mode");
973 mac_cr &= ~MAC_CR_FDPX_;
974 }
975 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
976 spin_unlock_irqrestore(&pdata->mac_lock, flags);
977
978 smsc911x_phy_update_flowcontrol(pdata);
979 pdata->last_duplex = phy_dev->duplex;
980 }
981
982 carrier = netif_carrier_ok(dev);
983 if (carrier != pdata->last_carrier) {
984 SMSC_TRACE(pdata, hw, "carrier state has changed");
985 if (carrier) {
986 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
987 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
988 (!pdata->using_extphy)) {
989 /* Restore original GPIO configuration */
990 pdata->gpio_setting = pdata->gpio_orig_setting;
991 smsc911x_reg_write(pdata, GPIO_CFG,
992 pdata->gpio_setting);
993 }
994 } else {
995 SMSC_TRACE(pdata, hw, "configuring for no carrier");
996 /* Check global setting that LED1
997 * usage is 10/100 indicator */
998 pdata->gpio_setting = smsc911x_reg_read(pdata,
999 GPIO_CFG);
1000 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
1001 (!pdata->using_extphy)) {
1002 /* Force 10/100 LED off, after saving
1003 * original GPIO configuration */
1004 pdata->gpio_orig_setting = pdata->gpio_setting;
1005
1006 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
1007 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
1008 | GPIO_CFG_GPIODIR0_
1009 | GPIO_CFG_GPIOD0_);
1010 smsc911x_reg_write(pdata, GPIO_CFG,
1011 pdata->gpio_setting);
1012 }
1013 }
1014 pdata->last_carrier = carrier;
1015 }
1016 }
1017
1018 static int smsc911x_mii_probe(struct net_device *dev)
1019 {
1020 struct smsc911x_data *pdata = netdev_priv(dev);
1021 struct phy_device *phydev = NULL;
1022 int ret;
1023
1024 /* find the first phy */
1025 phydev = phy_find_first(pdata->mii_bus);
1026 if (!phydev) {
1027 netdev_err(dev, "no PHY found\n");
1028 return -ENODEV;
1029 }
1030
1031 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
1032 phydev->mdio.addr, phydev->phy_id);
1033
1034 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
1035 pdata->config.phy_interface);
1036
1037 if (ret) {
1038 netdev_err(dev, "Could not attach to PHY\n");
1039 return ret;
1040 }
1041
1042 phy_attached_info(phydev);
1043
1044 /* mask with MAC supported features */
1045 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
1046 SUPPORTED_Asym_Pause);
1047 phydev->advertising = phydev->supported;
1048
1049 pdata->last_duplex = -1;
1050 pdata->last_carrier = -1;
1051
1052 #ifdef USE_PHY_WORK_AROUND
1053 if (smsc911x_phy_loopbacktest(dev) < 0) {
1054 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1055 phy_disconnect(phydev);
1056 return -ENODEV;
1057 }
1058 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1059 #endif /* USE_PHY_WORK_AROUND */
1060
1061 SMSC_TRACE(pdata, hw, "phy initialised successfully");
1062 return 0;
1063 }
1064
1065 static int smsc911x_mii_init(struct platform_device *pdev,
1066 struct net_device *dev)
1067 {
1068 struct smsc911x_data *pdata = netdev_priv(dev);
1069 int err = -ENXIO;
1070
1071 pdata->mii_bus = mdiobus_alloc();
1072 if (!pdata->mii_bus) {
1073 err = -ENOMEM;
1074 goto err_out_1;
1075 }
1076
1077 pdata->mii_bus->name = SMSC_MDIONAME;
1078 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1079 pdev->name, pdev->id);
1080 pdata->mii_bus->priv = pdata;
1081 pdata->mii_bus->read = smsc911x_mii_read;
1082 pdata->mii_bus->write = smsc911x_mii_write;
1083
1084 pdata->mii_bus->parent = &pdev->dev;
1085
1086 switch (pdata->idrev & 0xFFFF0000) {
1087 case 0x01170000:
1088 case 0x01150000:
1089 case 0x117A0000:
1090 case 0x115A0000:
1091 /* External PHY supported, try to autodetect */
1092 smsc911x_phy_initialise_external(pdata);
1093 break;
1094 default:
1095 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1096 "using internal PHY");
1097 pdata->using_extphy = 0;
1098 break;
1099 }
1100
1101 if (!pdata->using_extphy) {
1102 /* Mask all PHYs except ID 1 (internal) */
1103 pdata->mii_bus->phy_mask = ~(1 << 1);
1104 }
1105
1106 if (mdiobus_register(pdata->mii_bus)) {
1107 SMSC_WARN(pdata, probe, "Error registering mii bus");
1108 goto err_out_free_bus_2;
1109 }
1110
1111 if (smsc911x_mii_probe(dev) < 0) {
1112 SMSC_WARN(pdata, probe, "Error registering mii bus");
1113 goto err_out_unregister_bus_3;
1114 }
1115
1116 return 0;
1117
1118 err_out_unregister_bus_3:
1119 mdiobus_unregister(pdata->mii_bus);
1120 err_out_free_bus_2:
1121 mdiobus_free(pdata->mii_bus);
1122 err_out_1:
1123 return err;
1124 }
1125
1126 /* Gets the number of tx statuses in the fifo */
1127 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1128 {
1129 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1130 & TX_FIFO_INF_TSUSED_) >> 16;
1131 }
1132
1133 /* Reads tx statuses and increments counters where necessary */
1134 static void smsc911x_tx_update_txcounters(struct net_device *dev)
1135 {
1136 struct smsc911x_data *pdata = netdev_priv(dev);
1137 unsigned int tx_stat;
1138
1139 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1140 if (unlikely(tx_stat & 0x80000000)) {
1141 /* In this driver the packet tag is used as the packet
1142 * length. Since a packet length can never reach the
1143 * size of 0x8000, this bit is reserved. It is worth
1144 * noting that the "reserved bit" in the warning above
1145 * does not reference a hardware defined reserved bit
1146 * but rather a driver defined one.
1147 */
1148 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1149 } else {
1150 if (unlikely(tx_stat & TX_STS_ES_)) {
1151 dev->stats.tx_errors++;
1152 } else {
1153 dev->stats.tx_packets++;
1154 dev->stats.tx_bytes += (tx_stat >> 16);
1155 }
1156 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1157 dev->stats.collisions += 16;
1158 dev->stats.tx_aborted_errors += 1;
1159 } else {
1160 dev->stats.collisions +=
1161 ((tx_stat >> 3) & 0xF);
1162 }
1163 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1164 dev->stats.tx_carrier_errors += 1;
1165 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1166 dev->stats.collisions++;
1167 dev->stats.tx_aborted_errors++;
1168 }
1169 }
1170 }
1171 }
1172
1173 /* Increments the Rx error counters */
1174 static void
1175 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1176 {
1177 int crc_err = 0;
1178
1179 if (unlikely(rxstat & RX_STS_ES_)) {
1180 dev->stats.rx_errors++;
1181 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1182 dev->stats.rx_crc_errors++;
1183 crc_err = 1;
1184 }
1185 }
1186 if (likely(!crc_err)) {
1187 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1188 (rxstat & RX_STS_LENGTH_ERR_)))
1189 dev->stats.rx_length_errors++;
1190 if (rxstat & RX_STS_MCAST_)
1191 dev->stats.multicast++;
1192 }
1193 }
1194
1195 /* Quickly dumps bad packets */
1196 static void
1197 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1198 {
1199 if (likely(pktwords >= 4)) {
1200 unsigned int timeout = 500;
1201 unsigned int val;
1202 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1203 do {
1204 udelay(1);
1205 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1206 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1207
1208 if (unlikely(timeout == 0))
1209 SMSC_WARN(pdata, hw, "Timed out waiting for "
1210 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1211 } else {
1212 unsigned int temp;
1213 while (pktwords--)
1214 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1215 }
1216 }
1217
1218 /* NAPI poll function */
1219 static int smsc911x_poll(struct napi_struct *napi, int budget)
1220 {
1221 struct smsc911x_data *pdata =
1222 container_of(napi, struct smsc911x_data, napi);
1223 struct net_device *dev = pdata->dev;
1224 int npackets = 0;
1225
1226 while (npackets < budget) {
1227 unsigned int pktlength;
1228 unsigned int pktwords;
1229 struct sk_buff *skb;
1230 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1231
1232 if (!rxstat) {
1233 unsigned int temp;
1234 /* We processed all packets available. Tell NAPI it can
1235 * stop polling then re-enable rx interrupts */
1236 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1237 napi_complete(napi);
1238 temp = smsc911x_reg_read(pdata, INT_EN);
1239 temp |= INT_EN_RSFL_EN_;
1240 smsc911x_reg_write(pdata, INT_EN, temp);
1241 break;
1242 }
1243
1244 /* Count packet for NAPI scheduling, even if it has an error.
1245 * Error packets still require cycles to discard */
1246 npackets++;
1247
1248 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1249 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1250 smsc911x_rx_counterrors(dev, rxstat);
1251
1252 if (unlikely(rxstat & RX_STS_ES_)) {
1253 SMSC_WARN(pdata, rx_err,
1254 "Discarding packet with error bit set");
1255 /* Packet has an error, discard it and continue with
1256 * the next */
1257 smsc911x_rx_fastforward(pdata, pktwords);
1258 dev->stats.rx_dropped++;
1259 continue;
1260 }
1261
1262 skb = netdev_alloc_skb(dev, pktwords << 2);
1263 if (unlikely(!skb)) {
1264 SMSC_WARN(pdata, rx_err,
1265 "Unable to allocate skb for rx packet");
1266 /* Drop the packet and stop this polling iteration */
1267 smsc911x_rx_fastforward(pdata, pktwords);
1268 dev->stats.rx_dropped++;
1269 break;
1270 }
1271
1272 pdata->ops->rx_readfifo(pdata,
1273 (unsigned int *)skb->data, pktwords);
1274
1275 /* Align IP on 16B boundary */
1276 skb_reserve(skb, NET_IP_ALIGN);
1277 skb_put(skb, pktlength - 4);
1278 skb->protocol = eth_type_trans(skb, dev);
1279 skb_checksum_none_assert(skb);
1280 netif_receive_skb(skb);
1281
1282 /* Update counters */
1283 dev->stats.rx_packets++;
1284 dev->stats.rx_bytes += (pktlength - 4);
1285 }
1286
1287 /* Return total received packets */
1288 return npackets;
1289 }
1290
1291 /* Returns hash bit number for given MAC address
1292 * Example:
1293 * 01 00 5E 00 00 01 -> returns bit number 31 */
1294 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1295 {
1296 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1297 }
1298
1299 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1300 {
1301 /* Performs the multicast & mac_cr update. This is called when
1302 * safe on the current hardware, and with the mac_lock held */
1303 unsigned int mac_cr;
1304
1305 SMSC_ASSERT_MAC_LOCK(pdata);
1306
1307 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1308 mac_cr |= pdata->set_bits_mask;
1309 mac_cr &= ~(pdata->clear_bits_mask);
1310 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1311 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1312 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1313 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1314 mac_cr, pdata->hashhi, pdata->hashlo);
1315 }
1316
1317 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1318 {
1319 unsigned int mac_cr;
1320
1321 /* This function is only called for older LAN911x devices
1322 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1323 * be modified during Rx - newer devices immediately update the
1324 * registers.
1325 *
1326 * This is called from interrupt context */
1327
1328 spin_lock(&pdata->mac_lock);
1329
1330 /* Check Rx has stopped */
1331 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1332 SMSC_WARN(pdata, drv, "Rx not stopped");
1333
1334 /* Perform the update - safe to do now Rx has stopped */
1335 smsc911x_rx_multicast_update(pdata);
1336
1337 /* Re-enable Rx */
1338 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1339 mac_cr |= MAC_CR_RXEN_;
1340 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1341
1342 pdata->multicast_update_pending = 0;
1343
1344 spin_unlock(&pdata->mac_lock);
1345 }
1346
1347 static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata)
1348 {
1349 struct net_device *ndev = pdata->dev;
1350 struct phy_device *phy_dev = ndev->phydev;
1351 int rc = 0;
1352
1353 if (!phy_dev)
1354 return rc;
1355
1356 /* If the internal PHY is in General Power-Down mode, all, except the
1357 * management interface, is powered-down and stays in that condition as
1358 * long as Phy register bit 0.11 is HIGH.
1359 *
1360 * In that case, clear the bit 0.11, so the PHY powers up and we can
1361 * access to the phy registers.
1362 */
1363 rc = phy_read(phy_dev, MII_BMCR);
1364 if (rc < 0) {
1365 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1366 return rc;
1367 }
1368
1369 /* If the PHY general power-down bit is not set is not necessary to
1370 * disable the general power down-mode.
1371 */
1372 if (rc & BMCR_PDOWN) {
1373 rc = phy_write(phy_dev, MII_BMCR, rc & ~BMCR_PDOWN);
1374 if (rc < 0) {
1375 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1376 return rc;
1377 }
1378
1379 usleep_range(1000, 1500);
1380 }
1381
1382 return 0;
1383 }
1384
1385 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1386 {
1387 struct net_device *ndev = pdata->dev;
1388 struct phy_device *phy_dev = ndev->phydev;
1389 int rc = 0;
1390
1391 if (!phy_dev)
1392 return rc;
1393
1394 rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS);
1395
1396 if (rc < 0) {
1397 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1398 return rc;
1399 }
1400
1401 /* Only disable if energy detect mode is already enabled */
1402 if (rc & MII_LAN83C185_EDPWRDOWN) {
1403 /* Disable energy detect mode for this SMSC Transceivers */
1404 rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS,
1405 rc & (~MII_LAN83C185_EDPWRDOWN));
1406
1407 if (rc < 0) {
1408 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1409 return rc;
1410 }
1411 /* Allow PHY to wakeup */
1412 mdelay(2);
1413 }
1414
1415 return 0;
1416 }
1417
1418 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1419 {
1420 struct net_device *ndev = pdata->dev;
1421 struct phy_device *phy_dev = ndev->phydev;
1422 int rc = 0;
1423
1424 if (!phy_dev)
1425 return rc;
1426
1427 rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS);
1428
1429 if (rc < 0) {
1430 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1431 return rc;
1432 }
1433
1434 /* Only enable if energy detect mode is already disabled */
1435 if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1436 /* Enable energy detect mode for this SMSC Transceivers */
1437 rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS,
1438 rc | MII_LAN83C185_EDPWRDOWN);
1439
1440 if (rc < 0) {
1441 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1442 return rc;
1443 }
1444 }
1445 return 0;
1446 }
1447
1448 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1449 {
1450 unsigned int timeout;
1451 unsigned int temp;
1452 int ret;
1453
1454 /*
1455 * Make sure to power-up the PHY chip before doing a reset, otherwise
1456 * the reset fails.
1457 */
1458 ret = smsc911x_phy_general_power_up(pdata);
1459 if (ret) {
1460 SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip");
1461 return ret;
1462 }
1463
1464 /*
1465 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1466 * are initialized in a Energy Detect Power-Down mode that prevents
1467 * the MAC chip to be software reseted. So we have to wakeup the PHY
1468 * before.
1469 */
1470 if (pdata->generation == 4) {
1471 ret = smsc911x_phy_disable_energy_detect(pdata);
1472
1473 if (ret) {
1474 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1475 return ret;
1476 }
1477 }
1478
1479 /* Reset the LAN911x */
1480 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1481 timeout = 10;
1482 do {
1483 udelay(10);
1484 temp = smsc911x_reg_read(pdata, HW_CFG);
1485 } while ((--timeout) && (temp & HW_CFG_SRST_));
1486
1487 if (unlikely(temp & HW_CFG_SRST_)) {
1488 SMSC_WARN(pdata, drv, "Failed to complete reset");
1489 return -EIO;
1490 }
1491
1492 if (pdata->generation == 4) {
1493 ret = smsc911x_phy_enable_energy_detect(pdata);
1494
1495 if (ret) {
1496 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1497 return ret;
1498 }
1499 }
1500
1501 return 0;
1502 }
1503
1504 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1505 static void
1506 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1507 {
1508 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1509 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1510 (dev_addr[1] << 8) | dev_addr[0];
1511
1512 SMSC_ASSERT_MAC_LOCK(pdata);
1513
1514 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1515 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1516 }
1517
1518 static void smsc911x_disable_irq_chip(struct net_device *dev)
1519 {
1520 struct smsc911x_data *pdata = netdev_priv(dev);
1521
1522 smsc911x_reg_write(pdata, INT_EN, 0);
1523 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1524 }
1525
1526 static int smsc911x_open(struct net_device *dev)
1527 {
1528 struct smsc911x_data *pdata = netdev_priv(dev);
1529 unsigned int timeout;
1530 unsigned int temp;
1531 unsigned int intcfg;
1532
1533 /* if the phy is not yet registered, retry later*/
1534 if (!dev->phydev) {
1535 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1536 return -EAGAIN;
1537 }
1538
1539 /* Reset the LAN911x */
1540 if (smsc911x_soft_reset(pdata)) {
1541 SMSC_WARN(pdata, hw, "soft reset failed");
1542 return -EIO;
1543 }
1544
1545 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1546 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1547
1548 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1549 spin_lock_irq(&pdata->mac_lock);
1550 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1551 spin_unlock_irq(&pdata->mac_lock);
1552
1553 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1554 timeout = 50;
1555 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1556 --timeout) {
1557 udelay(10);
1558 }
1559
1560 if (unlikely(timeout == 0))
1561 SMSC_WARN(pdata, ifup,
1562 "Timed out waiting for EEPROM busy bit to clear");
1563
1564 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1565
1566 /* The soft reset above cleared the device's MAC address,
1567 * restore it from local copy (set in probe) */
1568 spin_lock_irq(&pdata->mac_lock);
1569 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1570 spin_unlock_irq(&pdata->mac_lock);
1571
1572 /* Initialise irqs, but leave all sources disabled */
1573 smsc911x_disable_irq_chip(dev);
1574
1575 /* Set interrupt deassertion to 100uS */
1576 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1577
1578 if (pdata->config.irq_polarity) {
1579 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1580 intcfg |= INT_CFG_IRQ_POL_;
1581 } else {
1582 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1583 }
1584
1585 if (pdata->config.irq_type) {
1586 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1587 intcfg |= INT_CFG_IRQ_TYPE_;
1588 } else {
1589 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1590 }
1591
1592 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1593
1594 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1595 pdata->software_irq_signal = 0;
1596 smp_wmb();
1597
1598 temp = smsc911x_reg_read(pdata, INT_EN);
1599 temp |= INT_EN_SW_INT_EN_;
1600 smsc911x_reg_write(pdata, INT_EN, temp);
1601
1602 timeout = 1000;
1603 while (timeout--) {
1604 if (pdata->software_irq_signal)
1605 break;
1606 msleep(1);
1607 }
1608
1609 if (!pdata->software_irq_signal) {
1610 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1611 dev->irq);
1612 return -ENODEV;
1613 }
1614 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1615 dev->irq);
1616
1617 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1618 (unsigned long)pdata->ioaddr, dev->irq);
1619
1620 /* Reset the last known duplex and carrier */
1621 pdata->last_duplex = -1;
1622 pdata->last_carrier = -1;
1623
1624 /* Bring the PHY up */
1625 phy_start(dev->phydev);
1626
1627 temp = smsc911x_reg_read(pdata, HW_CFG);
1628 /* Preserve TX FIFO size and external PHY configuration */
1629 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1630 temp |= HW_CFG_SF_;
1631 smsc911x_reg_write(pdata, HW_CFG, temp);
1632
1633 temp = smsc911x_reg_read(pdata, FIFO_INT);
1634 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1635 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1636 smsc911x_reg_write(pdata, FIFO_INT, temp);
1637
1638 /* set RX Data offset to 2 bytes for alignment */
1639 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1640
1641 /* enable NAPI polling before enabling RX interrupts */
1642 napi_enable(&pdata->napi);
1643
1644 temp = smsc911x_reg_read(pdata, INT_EN);
1645 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1646 smsc911x_reg_write(pdata, INT_EN, temp);
1647
1648 spin_lock_irq(&pdata->mac_lock);
1649 temp = smsc911x_mac_read(pdata, MAC_CR);
1650 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1651 smsc911x_mac_write(pdata, MAC_CR, temp);
1652 spin_unlock_irq(&pdata->mac_lock);
1653
1654 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1655
1656 netif_start_queue(dev);
1657 return 0;
1658 }
1659
1660 /* Entry point for stopping the interface */
1661 static int smsc911x_stop(struct net_device *dev)
1662 {
1663 struct smsc911x_data *pdata = netdev_priv(dev);
1664 unsigned int temp;
1665
1666 /* Disable all device interrupts */
1667 temp = smsc911x_reg_read(pdata, INT_CFG);
1668 temp &= ~INT_CFG_IRQ_EN_;
1669 smsc911x_reg_write(pdata, INT_CFG, temp);
1670
1671 /* Stop Tx and Rx polling */
1672 netif_stop_queue(dev);
1673 napi_disable(&pdata->napi);
1674
1675 /* At this point all Rx and Tx activity is stopped */
1676 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1677 smsc911x_tx_update_txcounters(dev);
1678
1679 /* Bring the PHY down */
1680 if (dev->phydev)
1681 phy_stop(dev->phydev);
1682
1683 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1684 return 0;
1685 }
1686
1687 /* Entry point for transmitting a packet */
1688 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1689 {
1690 struct smsc911x_data *pdata = netdev_priv(dev);
1691 unsigned int freespace;
1692 unsigned int tx_cmd_a;
1693 unsigned int tx_cmd_b;
1694 unsigned int temp;
1695 u32 wrsz;
1696 ulong bufp;
1697
1698 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1699
1700 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1701 SMSC_WARN(pdata, tx_err,
1702 "Tx data fifo low, space available: %d", freespace);
1703
1704 /* Word alignment adjustment */
1705 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1706 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1707 tx_cmd_a |= (unsigned int)skb->len;
1708
1709 tx_cmd_b = ((unsigned int)skb->len) << 16;
1710 tx_cmd_b |= (unsigned int)skb->len;
1711
1712 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1713 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1714
1715 bufp = (ulong)skb->data & (~0x3);
1716 wrsz = (u32)skb->len + 3;
1717 wrsz += (u32)((ulong)skb->data & 0x3);
1718 wrsz >>= 2;
1719
1720 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1721 freespace -= (skb->len + 32);
1722 skb_tx_timestamp(skb);
1723 dev_consume_skb_any(skb);
1724
1725 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1726 smsc911x_tx_update_txcounters(dev);
1727
1728 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1729 netif_stop_queue(dev);
1730 temp = smsc911x_reg_read(pdata, FIFO_INT);
1731 temp &= 0x00FFFFFF;
1732 temp |= 0x32000000;
1733 smsc911x_reg_write(pdata, FIFO_INT, temp);
1734 }
1735
1736 return NETDEV_TX_OK;
1737 }
1738
1739 /* Entry point for getting status counters */
1740 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1741 {
1742 struct smsc911x_data *pdata = netdev_priv(dev);
1743 smsc911x_tx_update_txcounters(dev);
1744 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1745 return &dev->stats;
1746 }
1747
1748 /* Entry point for setting addressing modes */
1749 static void smsc911x_set_multicast_list(struct net_device *dev)
1750 {
1751 struct smsc911x_data *pdata = netdev_priv(dev);
1752 unsigned long flags;
1753
1754 if (dev->flags & IFF_PROMISC) {
1755 /* Enabling promiscuous mode */
1756 pdata->set_bits_mask = MAC_CR_PRMS_;
1757 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1758 pdata->hashhi = 0;
1759 pdata->hashlo = 0;
1760 } else if (dev->flags & IFF_ALLMULTI) {
1761 /* Enabling all multicast mode */
1762 pdata->set_bits_mask = MAC_CR_MCPAS_;
1763 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1764 pdata->hashhi = 0;
1765 pdata->hashlo = 0;
1766 } else if (!netdev_mc_empty(dev)) {
1767 /* Enabling specific multicast addresses */
1768 unsigned int hash_high = 0;
1769 unsigned int hash_low = 0;
1770 struct netdev_hw_addr *ha;
1771
1772 pdata->set_bits_mask = MAC_CR_HPFILT_;
1773 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1774
1775 netdev_for_each_mc_addr(ha, dev) {
1776 unsigned int bitnum = smsc911x_hash(ha->addr);
1777 unsigned int mask = 0x01 << (bitnum & 0x1F);
1778
1779 if (bitnum & 0x20)
1780 hash_high |= mask;
1781 else
1782 hash_low |= mask;
1783 }
1784
1785 pdata->hashhi = hash_high;
1786 pdata->hashlo = hash_low;
1787 } else {
1788 /* Enabling local MAC address only */
1789 pdata->set_bits_mask = 0;
1790 pdata->clear_bits_mask =
1791 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1792 pdata->hashhi = 0;
1793 pdata->hashlo = 0;
1794 }
1795
1796 spin_lock_irqsave(&pdata->mac_lock, flags);
1797
1798 if (pdata->generation <= 1) {
1799 /* Older hardware revision - cannot change these flags while
1800 * receiving data */
1801 if (!pdata->multicast_update_pending) {
1802 unsigned int temp;
1803 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1804 pdata->multicast_update_pending = 1;
1805
1806 /* Request the hardware to stop, then perform the
1807 * update when we get an RX_STOP interrupt */
1808 temp = smsc911x_mac_read(pdata, MAC_CR);
1809 temp &= ~(MAC_CR_RXEN_);
1810 smsc911x_mac_write(pdata, MAC_CR, temp);
1811 } else {
1812 /* There is another update pending, this should now
1813 * use the newer values */
1814 }
1815 } else {
1816 /* Newer hardware revision - can write immediately */
1817 smsc911x_rx_multicast_update(pdata);
1818 }
1819
1820 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1821 }
1822
1823 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1824 {
1825 struct net_device *dev = dev_id;
1826 struct smsc911x_data *pdata = netdev_priv(dev);
1827 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1828 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1829 int serviced = IRQ_NONE;
1830 u32 temp;
1831
1832 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1833 temp = smsc911x_reg_read(pdata, INT_EN);
1834 temp &= (~INT_EN_SW_INT_EN_);
1835 smsc911x_reg_write(pdata, INT_EN, temp);
1836 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1837 pdata->software_irq_signal = 1;
1838 smp_wmb();
1839 serviced = IRQ_HANDLED;
1840 }
1841
1842 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1843 /* Called when there is a multicast update scheduled and
1844 * it is now safe to complete the update */
1845 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1846 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1847 if (pdata->multicast_update_pending)
1848 smsc911x_rx_multicast_update_workaround(pdata);
1849 serviced = IRQ_HANDLED;
1850 }
1851
1852 if (intsts & inten & INT_STS_TDFA_) {
1853 temp = smsc911x_reg_read(pdata, FIFO_INT);
1854 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1855 smsc911x_reg_write(pdata, FIFO_INT, temp);
1856 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1857 netif_wake_queue(dev);
1858 serviced = IRQ_HANDLED;
1859 }
1860
1861 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1862 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1863 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1864 serviced = IRQ_HANDLED;
1865 }
1866
1867 if (likely(intsts & inten & INT_STS_RSFL_)) {
1868 if (likely(napi_schedule_prep(&pdata->napi))) {
1869 /* Disable Rx interrupts */
1870 temp = smsc911x_reg_read(pdata, INT_EN);
1871 temp &= (~INT_EN_RSFL_EN_);
1872 smsc911x_reg_write(pdata, INT_EN, temp);
1873 /* Schedule a NAPI poll */
1874 __napi_schedule(&pdata->napi);
1875 } else {
1876 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1877 }
1878 serviced = IRQ_HANDLED;
1879 }
1880
1881 return serviced;
1882 }
1883
1884 #ifdef CONFIG_NET_POLL_CONTROLLER
1885 static void smsc911x_poll_controller(struct net_device *dev)
1886 {
1887 disable_irq(dev->irq);
1888 smsc911x_irqhandler(0, dev);
1889 enable_irq(dev->irq);
1890 }
1891 #endif /* CONFIG_NET_POLL_CONTROLLER */
1892
1893 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1894 {
1895 struct smsc911x_data *pdata = netdev_priv(dev);
1896 struct sockaddr *addr = p;
1897
1898 /* On older hardware revisions we cannot change the mac address
1899 * registers while receiving data. Newer devices can safely change
1900 * this at any time. */
1901 if (pdata->generation <= 1 && netif_running(dev))
1902 return -EBUSY;
1903
1904 if (!is_valid_ether_addr(addr->sa_data))
1905 return -EADDRNOTAVAIL;
1906
1907 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1908
1909 spin_lock_irq(&pdata->mac_lock);
1910 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1911 spin_unlock_irq(&pdata->mac_lock);
1912
1913 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1914
1915 return 0;
1916 }
1917
1918 /* Standard ioctls for mii-tool */
1919 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1920 {
1921 if (!netif_running(dev) || !dev->phydev)
1922 return -EINVAL;
1923
1924 return phy_mii_ioctl(dev->phydev, ifr, cmd);
1925 }
1926
1927 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1928 struct ethtool_drvinfo *info)
1929 {
1930 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1931 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1932 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1933 sizeof(info->bus_info));
1934 }
1935
1936 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1937 {
1938 return phy_start_aneg(dev->phydev);
1939 }
1940
1941 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1942 {
1943 struct smsc911x_data *pdata = netdev_priv(dev);
1944 return pdata->msg_enable;
1945 }
1946
1947 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1948 {
1949 struct smsc911x_data *pdata = netdev_priv(dev);
1950 pdata->msg_enable = level;
1951 }
1952
1953 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1954 {
1955 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1956 sizeof(u32);
1957 }
1958
1959 static void
1960 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1961 void *buf)
1962 {
1963 struct smsc911x_data *pdata = netdev_priv(dev);
1964 struct phy_device *phy_dev = dev->phydev;
1965 unsigned long flags;
1966 unsigned int i;
1967 unsigned int j = 0;
1968 u32 *data = buf;
1969
1970 regs->version = pdata->idrev;
1971 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1972 data[j++] = smsc911x_reg_read(pdata, i);
1973
1974 for (i = MAC_CR; i <= WUCSR; i++) {
1975 spin_lock_irqsave(&pdata->mac_lock, flags);
1976 data[j++] = smsc911x_mac_read(pdata, i);
1977 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1978 }
1979
1980 for (i = 0; i <= 31; i++)
1981 data[j++] = smsc911x_mii_read(phy_dev->mdio.bus,
1982 phy_dev->mdio.addr, i);
1983 }
1984
1985 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1986 {
1987 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1988 temp &= ~GPIO_CFG_EEPR_EN_;
1989 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1990 msleep(1);
1991 }
1992
1993 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1994 {
1995 int timeout = 100;
1996 u32 e2cmd;
1997
1998 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
1999 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
2000 SMSC_WARN(pdata, drv, "Busy at start");
2001 return -EBUSY;
2002 }
2003
2004 e2cmd = op | E2P_CMD_EPC_BUSY_;
2005 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
2006
2007 do {
2008 msleep(1);
2009 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
2010 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
2011
2012 if (!timeout) {
2013 SMSC_TRACE(pdata, drv, "TIMED OUT");
2014 return -EAGAIN;
2015 }
2016
2017 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
2018 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
2019 return -EINVAL;
2020 }
2021
2022 return 0;
2023 }
2024
2025 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
2026 u8 address, u8 *data)
2027 {
2028 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
2029 int ret;
2030
2031 SMSC_TRACE(pdata, drv, "address 0x%x", address);
2032 ret = smsc911x_eeprom_send_cmd(pdata, op);
2033
2034 if (!ret)
2035 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
2036
2037 return ret;
2038 }
2039
2040 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
2041 u8 address, u8 data)
2042 {
2043 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
2044 u32 temp;
2045 int ret;
2046
2047 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
2048 ret = smsc911x_eeprom_send_cmd(pdata, op);
2049
2050 if (!ret) {
2051 op = E2P_CMD_EPC_CMD_WRITE_ | address;
2052 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2053
2054 /* Workaround for hardware read-after-write restriction */
2055 temp = smsc911x_reg_read(pdata, BYTE_TEST);
2056
2057 ret = smsc911x_eeprom_send_cmd(pdata, op);
2058 }
2059
2060 return ret;
2061 }
2062
2063 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2064 {
2065 return SMSC911X_EEPROM_SIZE;
2066 }
2067
2068 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2069 struct ethtool_eeprom *eeprom, u8 *data)
2070 {
2071 struct smsc911x_data *pdata = netdev_priv(dev);
2072 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2073 int len;
2074 int i;
2075
2076 smsc911x_eeprom_enable_access(pdata);
2077
2078 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2079 for (i = 0; i < len; i++) {
2080 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2081 if (ret < 0) {
2082 eeprom->len = 0;
2083 return ret;
2084 }
2085 }
2086
2087 memcpy(data, &eeprom_data[eeprom->offset], len);
2088 eeprom->len = len;
2089 return 0;
2090 }
2091
2092 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2093 struct ethtool_eeprom *eeprom, u8 *data)
2094 {
2095 int ret;
2096 struct smsc911x_data *pdata = netdev_priv(dev);
2097
2098 smsc911x_eeprom_enable_access(pdata);
2099 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2100 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2101 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2102
2103 /* Single byte write, according to man page */
2104 eeprom->len = 1;
2105
2106 return ret;
2107 }
2108
2109 static const struct ethtool_ops smsc911x_ethtool_ops = {
2110 .get_link = ethtool_op_get_link,
2111 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2112 .nway_reset = smsc911x_ethtool_nwayreset,
2113 .get_msglevel = smsc911x_ethtool_getmsglevel,
2114 .set_msglevel = smsc911x_ethtool_setmsglevel,
2115 .get_regs_len = smsc911x_ethtool_getregslen,
2116 .get_regs = smsc911x_ethtool_getregs,
2117 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2118 .get_eeprom = smsc911x_ethtool_get_eeprom,
2119 .set_eeprom = smsc911x_ethtool_set_eeprom,
2120 .get_ts_info = ethtool_op_get_ts_info,
2121 .get_link_ksettings = phy_ethtool_get_link_ksettings,
2122 .set_link_ksettings = phy_ethtool_set_link_ksettings,
2123 };
2124
2125 static const struct net_device_ops smsc911x_netdev_ops = {
2126 .ndo_open = smsc911x_open,
2127 .ndo_stop = smsc911x_stop,
2128 .ndo_start_xmit = smsc911x_hard_start_xmit,
2129 .ndo_get_stats = smsc911x_get_stats,
2130 .ndo_set_rx_mode = smsc911x_set_multicast_list,
2131 .ndo_do_ioctl = smsc911x_do_ioctl,
2132 .ndo_change_mtu = eth_change_mtu,
2133 .ndo_validate_addr = eth_validate_addr,
2134 .ndo_set_mac_address = smsc911x_set_mac_address,
2135 #ifdef CONFIG_NET_POLL_CONTROLLER
2136 .ndo_poll_controller = smsc911x_poll_controller,
2137 #endif
2138 };
2139
2140 /* copies the current mac address from hardware to dev->dev_addr */
2141 static void smsc911x_read_mac_address(struct net_device *dev)
2142 {
2143 struct smsc911x_data *pdata = netdev_priv(dev);
2144 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2145 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2146
2147 dev->dev_addr[0] = (u8)(mac_low32);
2148 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2149 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2150 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2151 dev->dev_addr[4] = (u8)(mac_high16);
2152 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2153 }
2154
2155 /* Initializing private device structures, only called from probe */
2156 static int smsc911x_init(struct net_device *dev)
2157 {
2158 struct smsc911x_data *pdata = netdev_priv(dev);
2159 unsigned int byte_test, mask;
2160 unsigned int to = 100;
2161
2162 SMSC_TRACE(pdata, probe, "Driver Parameters:");
2163 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2164 (unsigned long)pdata->ioaddr);
2165 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2166 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2167
2168 spin_lock_init(&pdata->dev_lock);
2169 spin_lock_init(&pdata->mac_lock);
2170
2171 if (pdata->ioaddr == NULL) {
2172 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2173 return -ENODEV;
2174 }
2175
2176 /*
2177 * poll the READY bit in PMT_CTRL. Any other access to the device is
2178 * forbidden while this bit isn't set. Try for 100ms
2179 *
2180 * Note that this test is done before the WORD_SWAP register is
2181 * programmed. So in some configurations the READY bit is at 16 before
2182 * WORD_SWAP is written to. This issue is worked around by waiting
2183 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2184 *
2185 * SMSC has confirmed that checking bit 16 (marked as reserved in
2186 * the datasheet) is fine since these bits "will either never be set
2187 * or can only go high after READY does (so also indicate the device
2188 * is ready)".
2189 */
2190
2191 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2192 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2193 udelay(1000);
2194
2195 if (to == 0) {
2196 netdev_err(dev, "Device not READY in 100ms aborting\n");
2197 return -ENODEV;
2198 }
2199
2200 /* Check byte ordering */
2201 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2202 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2203 if (byte_test == 0x43218765) {
2204 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2205 "applying WORD_SWAP");
2206 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2207
2208 /* 1 dummy read of BYTE_TEST is needed after a write to
2209 * WORD_SWAP before its contents are valid */
2210 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2211
2212 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2213 }
2214
2215 if (byte_test != 0x87654321) {
2216 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2217 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2218 SMSC_WARN(pdata, probe,
2219 "top 16 bits equal to bottom 16 bits");
2220 SMSC_TRACE(pdata, probe,
2221 "This may mean the chip is set "
2222 "for 32 bit while the bus is reading 16 bit");
2223 }
2224 return -ENODEV;
2225 }
2226
2227 /* Default generation to zero (all workarounds apply) */
2228 pdata->generation = 0;
2229
2230 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2231 switch (pdata->idrev & 0xFFFF0000) {
2232 case 0x01180000:
2233 case 0x01170000:
2234 case 0x01160000:
2235 case 0x01150000:
2236 case 0x218A0000:
2237 /* LAN911[5678] family */
2238 pdata->generation = pdata->idrev & 0x0000FFFF;
2239 break;
2240
2241 case 0x118A0000:
2242 case 0x117A0000:
2243 case 0x116A0000:
2244 case 0x115A0000:
2245 /* LAN921[5678] family */
2246 pdata->generation = 3;
2247 break;
2248
2249 case 0x92100000:
2250 case 0x92110000:
2251 case 0x92200000:
2252 case 0x92210000:
2253 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2254 pdata->generation = 4;
2255 break;
2256
2257 default:
2258 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2259 pdata->idrev);
2260 return -ENODEV;
2261 }
2262
2263 SMSC_TRACE(pdata, probe,
2264 "LAN911x identified, idrev: 0x%08X, generation: %d",
2265 pdata->idrev, pdata->generation);
2266
2267 if (pdata->generation == 0)
2268 SMSC_WARN(pdata, probe,
2269 "This driver is not intended for this chip revision");
2270
2271 /* workaround for platforms without an eeprom, where the mac address
2272 * is stored elsewhere and set by the bootloader. This saves the
2273 * mac address before resetting the device */
2274 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2275 spin_lock_irq(&pdata->mac_lock);
2276 smsc911x_read_mac_address(dev);
2277 spin_unlock_irq(&pdata->mac_lock);
2278 }
2279
2280 /* Reset the LAN911x */
2281 if (smsc911x_phy_reset(pdata) || smsc911x_soft_reset(pdata))
2282 return -ENODEV;
2283
2284 dev->flags |= IFF_MULTICAST;
2285 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2286 dev->netdev_ops = &smsc911x_netdev_ops;
2287 dev->ethtool_ops = &smsc911x_ethtool_ops;
2288
2289 return 0;
2290 }
2291
2292 static int smsc911x_drv_remove(struct platform_device *pdev)
2293 {
2294 struct net_device *dev;
2295 struct smsc911x_data *pdata;
2296 struct resource *res;
2297
2298 dev = platform_get_drvdata(pdev);
2299 BUG_ON(!dev);
2300 pdata = netdev_priv(dev);
2301 BUG_ON(!pdata);
2302 BUG_ON(!pdata->ioaddr);
2303 BUG_ON(!dev->phydev);
2304
2305 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2306
2307 phy_disconnect(dev->phydev);
2308 mdiobus_unregister(pdata->mii_bus);
2309 mdiobus_free(pdata->mii_bus);
2310
2311 unregister_netdev(dev);
2312 free_irq(dev->irq, dev);
2313 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2314 "smsc911x-memory");
2315 if (!res)
2316 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2317
2318 release_mem_region(res->start, resource_size(res));
2319
2320 iounmap(pdata->ioaddr);
2321
2322 (void)smsc911x_disable_resources(pdev);
2323 smsc911x_free_resources(pdev);
2324
2325 free_netdev(dev);
2326
2327 pm_runtime_put(&pdev->dev);
2328 pm_runtime_disable(&pdev->dev);
2329
2330 return 0;
2331 }
2332
2333 /* standard register acces */
2334 static const struct smsc911x_ops standard_smsc911x_ops = {
2335 .reg_read = __smsc911x_reg_read,
2336 .reg_write = __smsc911x_reg_write,
2337 .rx_readfifo = smsc911x_rx_readfifo,
2338 .tx_writefifo = smsc911x_tx_writefifo,
2339 };
2340
2341 /* shifted register access */
2342 static const struct smsc911x_ops shifted_smsc911x_ops = {
2343 .reg_read = __smsc911x_reg_read_shift,
2344 .reg_write = __smsc911x_reg_write_shift,
2345 .rx_readfifo = smsc911x_rx_readfifo_shift,
2346 .tx_writefifo = smsc911x_tx_writefifo_shift,
2347 };
2348
2349 static int smsc911x_probe_config(struct smsc911x_platform_config *config,
2350 struct device *dev)
2351 {
2352 int phy_interface;
2353 u32 width = 0;
2354 int err;
2355
2356 phy_interface = device_get_phy_mode(dev);
2357 if (phy_interface < 0)
2358 phy_interface = PHY_INTERFACE_MODE_NA;
2359 config->phy_interface = phy_interface;
2360
2361 device_get_mac_address(dev, config->mac, ETH_ALEN);
2362
2363 err = device_property_read_u32(dev, "reg-io-width", &width);
2364 if (err == -ENXIO)
2365 return err;
2366 if (!err && width == 4)
2367 config->flags |= SMSC911X_USE_32BIT;
2368 else
2369 config->flags |= SMSC911X_USE_16BIT;
2370
2371 device_property_read_u32(dev, "reg-shift", &config->shift);
2372
2373 if (device_property_present(dev, "smsc,irq-active-high"))
2374 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2375
2376 if (device_property_present(dev, "smsc,irq-push-pull"))
2377 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2378
2379 if (device_property_present(dev, "smsc,force-internal-phy"))
2380 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2381
2382 if (device_property_present(dev, "smsc,force-external-phy"))
2383 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2384
2385 if (device_property_present(dev, "smsc,save-mac-address"))
2386 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2387
2388 return 0;
2389 }
2390
2391 static int smsc911x_drv_probe(struct platform_device *pdev)
2392 {
2393 struct net_device *dev;
2394 struct smsc911x_data *pdata;
2395 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev);
2396 struct resource *res;
2397 unsigned int intcfg = 0;
2398 int res_size, irq, irq_flags;
2399 int retval;
2400
2401 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2402 "smsc911x-memory");
2403 if (!res)
2404 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2405 if (!res) {
2406 pr_warn("Could not allocate resource\n");
2407 retval = -ENODEV;
2408 goto out_0;
2409 }
2410 res_size = resource_size(res);
2411
2412 irq = platform_get_irq(pdev, 0);
2413 if (irq == -EPROBE_DEFER) {
2414 retval = -EPROBE_DEFER;
2415 goto out_0;
2416 } else if (irq <= 0) {
2417 pr_warn("Could not allocate irq resource\n");
2418 retval = -ENODEV;
2419 goto out_0;
2420 }
2421
2422 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2423 retval = -EBUSY;
2424 goto out_0;
2425 }
2426
2427 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2428 if (!dev) {
2429 retval = -ENOMEM;
2430 goto out_release_io_1;
2431 }
2432
2433 SET_NETDEV_DEV(dev, &pdev->dev);
2434
2435 pdata = netdev_priv(dev);
2436 dev->irq = irq;
2437 irq_flags = irq_get_trigger_type(irq);
2438 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2439
2440 pdata->dev = dev;
2441 pdata->msg_enable = ((1 << debug) - 1);
2442
2443 platform_set_drvdata(pdev, dev);
2444
2445 retval = smsc911x_request_resources(pdev);
2446 if (retval)
2447 goto out_request_resources_fail;
2448
2449 retval = smsc911x_enable_resources(pdev);
2450 if (retval)
2451 goto out_enable_resources_fail;
2452
2453 if (pdata->ioaddr == NULL) {
2454 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2455 retval = -ENOMEM;
2456 goto out_disable_resources;
2457 }
2458
2459 retval = smsc911x_probe_config(&pdata->config, &pdev->dev);
2460 if (retval && config) {
2461 /* copy config parameters across to pdata */
2462 memcpy(&pdata->config, config, sizeof(pdata->config));
2463 retval = 0;
2464 }
2465
2466 if (retval) {
2467 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2468 goto out_disable_resources;
2469 }
2470
2471 /* assume standard, non-shifted, access to HW registers */
2472 pdata->ops = &standard_smsc911x_ops;
2473 /* apply the right access if shifting is needed */
2474 if (pdata->config.shift)
2475 pdata->ops = &shifted_smsc911x_ops;
2476
2477 pm_runtime_enable(&pdev->dev);
2478 pm_runtime_get_sync(&pdev->dev);
2479
2480 retval = smsc911x_init(dev);
2481 if (retval < 0)
2482 goto out_disable_resources;
2483
2484 /* configure irq polarity and type before connecting isr */
2485 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2486 intcfg |= INT_CFG_IRQ_POL_;
2487
2488 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2489 intcfg |= INT_CFG_IRQ_TYPE_;
2490
2491 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2492
2493 /* Ensure interrupts are globally disabled before connecting ISR */
2494 smsc911x_disable_irq_chip(dev);
2495
2496 retval = request_irq(dev->irq, smsc911x_irqhandler,
2497 irq_flags | IRQF_SHARED, dev->name, dev);
2498 if (retval) {
2499 SMSC_WARN(pdata, probe,
2500 "Unable to claim requested irq: %d", dev->irq);
2501 goto out_disable_resources;
2502 }
2503
2504 netif_carrier_off(dev);
2505
2506 retval = register_netdev(dev);
2507 if (retval) {
2508 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2509 goto out_free_irq;
2510 } else {
2511 SMSC_TRACE(pdata, probe,
2512 "Network interface: \"%s\"", dev->name);
2513 }
2514
2515 retval = smsc911x_mii_init(pdev, dev);
2516 if (retval) {
2517 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2518 goto out_unregister_netdev_5;
2519 }
2520
2521 spin_lock_irq(&pdata->mac_lock);
2522
2523 /* Check if mac address has been specified when bringing interface up */
2524 if (is_valid_ether_addr(dev->dev_addr)) {
2525 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2526 SMSC_TRACE(pdata, probe,
2527 "MAC Address is specified by configuration");
2528 } else if (is_valid_ether_addr(pdata->config.mac)) {
2529 memcpy(dev->dev_addr, pdata->config.mac, ETH_ALEN);
2530 SMSC_TRACE(pdata, probe,
2531 "MAC Address specified by platform data");
2532 } else {
2533 /* Try reading mac address from device. if EEPROM is present
2534 * it will already have been set */
2535 smsc_get_mac(dev);
2536
2537 if (is_valid_ether_addr(dev->dev_addr)) {
2538 /* eeprom values are valid so use them */
2539 SMSC_TRACE(pdata, probe,
2540 "Mac Address is read from LAN911x EEPROM");
2541 } else {
2542 /* eeprom values are invalid, generate random MAC */
2543 eth_hw_addr_random(dev);
2544 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2545 SMSC_TRACE(pdata, probe,
2546 "MAC Address is set to eth_random_addr");
2547 }
2548 }
2549
2550 spin_unlock_irq(&pdata->mac_lock);
2551
2552 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2553
2554 return 0;
2555
2556 out_unregister_netdev_5:
2557 unregister_netdev(dev);
2558 out_free_irq:
2559 free_irq(dev->irq, dev);
2560 out_disable_resources:
2561 pm_runtime_put(&pdev->dev);
2562 pm_runtime_disable(&pdev->dev);
2563 (void)smsc911x_disable_resources(pdev);
2564 out_enable_resources_fail:
2565 smsc911x_free_resources(pdev);
2566 out_request_resources_fail:
2567 iounmap(pdata->ioaddr);
2568 free_netdev(dev);
2569 out_release_io_1:
2570 release_mem_region(res->start, resource_size(res));
2571 out_0:
2572 return retval;
2573 }
2574
2575 #ifdef CONFIG_PM
2576 /* This implementation assumes the devices remains powered on its VDDVARIO
2577 * pins during suspend. */
2578
2579 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2580
2581 static int smsc911x_suspend(struct device *dev)
2582 {
2583 struct net_device *ndev = dev_get_drvdata(dev);
2584 struct smsc911x_data *pdata = netdev_priv(ndev);
2585
2586 /* enable wake on LAN, energy detection and the external PME
2587 * signal. */
2588 smsc911x_reg_write(pdata, PMT_CTRL,
2589 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2590 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2591
2592 return 0;
2593 }
2594
2595 static int smsc911x_resume(struct device *dev)
2596 {
2597 struct net_device *ndev = dev_get_drvdata(dev);
2598 struct smsc911x_data *pdata = netdev_priv(ndev);
2599 unsigned int to = 100;
2600
2601 /* Note 3.11 from the datasheet:
2602 * "When the LAN9220 is in a power saving state, a write of any
2603 * data to the BYTE_TEST register will wake-up the device."
2604 */
2605 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2606
2607 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2608 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2609 * if it failed. */
2610 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2611 udelay(1000);
2612
2613 return (to == 0) ? -EIO : 0;
2614 }
2615
2616 static const struct dev_pm_ops smsc911x_pm_ops = {
2617 .suspend = smsc911x_suspend,
2618 .resume = smsc911x_resume,
2619 };
2620
2621 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2622
2623 #else
2624 #define SMSC911X_PM_OPS NULL
2625 #endif
2626
2627 #ifdef CONFIG_OF
2628 static const struct of_device_id smsc911x_dt_ids[] = {
2629 { .compatible = "smsc,lan9115", },
2630 { /* sentinel */ }
2631 };
2632 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2633 #endif
2634
2635 static const struct acpi_device_id smsc911x_acpi_match[] = {
2636 { "ARMH9118", 0 },
2637 { }
2638 };
2639 MODULE_DEVICE_TABLE(acpi, smsc911x_acpi_match);
2640
2641 static struct platform_driver smsc911x_driver = {
2642 .probe = smsc911x_drv_probe,
2643 .remove = smsc911x_drv_remove,
2644 .driver = {
2645 .name = SMSC_CHIPNAME,
2646 .pm = SMSC911X_PM_OPS,
2647 .of_match_table = of_match_ptr(smsc911x_dt_ids),
2648 .acpi_match_table = ACPI_PTR(smsc911x_acpi_match),
2649 },
2650 };
2651
2652 /* Entry point for loading the module */
2653 static int __init smsc911x_init_module(void)
2654 {
2655 SMSC_INITIALIZE();
2656 return platform_driver_register(&smsc911x_driver);
2657 }
2658
2659 /* entry point for unloading the module */
2660 static void __exit smsc911x_cleanup_module(void)
2661 {
2662 platform_driver_unregister(&smsc911x_driver);
2663 }
2664
2665 module_init(smsc911x_init_module);
2666 module_exit(smsc911x_cleanup_module);
ubuntu-zesty-kernel mirror