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ath10k: fix compilation warnings in wmi phyerr pull function
[mirror_ubuntu-bionic-kernel.git] / drivers / net / ethernet / smsc / smsc911x.c
1 /***************************************************************************
2 *
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 ***************************************************************************
20 * Rewritten, heavily based on smsc911x simple driver by SMSC.
21 * Partly uses io macros from smc91x.c by Nicolas Pitre
22 *
23 * Supported devices:
24 * LAN9115, LAN9116, LAN9117, LAN9118
25 * LAN9215, LAN9216, LAN9217, LAN9218
26 * LAN9210, LAN9211
27 * LAN9220, LAN9221
28 * LAN89218
29 *
30 */
31
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34 #include <linux/crc32.h>
35 #include <linux/clk.h>
36 #include <linux/delay.h>
37 #include <linux/errno.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/module.h>
45 #include <linux/netdevice.h>
46 #include <linux/platform_device.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/sched.h>
49 #include <linux/timer.h>
50 #include <linux/bug.h>
51 #include <linux/bitops.h>
52 #include <linux/irq.h>
53 #include <linux/io.h>
54 #include <linux/swab.h>
55 #include <linux/phy.h>
56 #include <linux/smsc911x.h>
57 #include <linux/device.h>
58 #include <linux/of.h>
59 #include <linux/of_device.h>
60 #include <linux/of_gpio.h>
61 #include <linux/of_net.h>
62 #include <linux/pm_runtime.h>
63
64 #include "smsc911x.h"
65
66 #define SMSC_CHIPNAME "smsc911x"
67 #define SMSC_MDIONAME "smsc911x-mdio"
68 #define SMSC_DRV_VERSION "2008-10-21"
69
70 MODULE_LICENSE("GPL");
71 MODULE_VERSION(SMSC_DRV_VERSION);
72 MODULE_ALIAS("platform:smsc911x");
73
74 #if USE_DEBUG > 0
75 static int debug = 16;
76 #else
77 static int debug = 3;
78 #endif
79
80 module_param(debug, int, 0);
81 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
82
83 struct smsc911x_data;
84
85 struct smsc911x_ops {
86 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
87 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
88 void (*rx_readfifo)(struct smsc911x_data *pdata,
89 unsigned int *buf, unsigned int wordcount);
90 void (*tx_writefifo)(struct smsc911x_data *pdata,
91 unsigned int *buf, unsigned int wordcount);
92 };
93
94 #define SMSC911X_NUM_SUPPLIES 2
95
96 struct smsc911x_data {
97 void __iomem *ioaddr;
98
99 unsigned int idrev;
100
101 /* used to decide which workarounds apply */
102 unsigned int generation;
103
104 /* device configuration (copied from platform_data during probe) */
105 struct smsc911x_platform_config config;
106
107 /* This needs to be acquired before calling any of below:
108 * smsc911x_mac_read(), smsc911x_mac_write()
109 */
110 spinlock_t mac_lock;
111
112 /* spinlock to ensure register accesses are serialised */
113 spinlock_t dev_lock;
114
115 struct phy_device *phy_dev;
116 struct mii_bus *mii_bus;
117 int phy_irq[PHY_MAX_ADDR];
118 unsigned int using_extphy;
119 int last_duplex;
120 int last_carrier;
121
122 u32 msg_enable;
123 unsigned int gpio_setting;
124 unsigned int gpio_orig_setting;
125 struct net_device *dev;
126 struct napi_struct napi;
127
128 unsigned int software_irq_signal;
129
130 #ifdef USE_PHY_WORK_AROUND
131 #define MIN_PACKET_SIZE (64)
132 char loopback_tx_pkt[MIN_PACKET_SIZE];
133 char loopback_rx_pkt[MIN_PACKET_SIZE];
134 unsigned int resetcount;
135 #endif
136
137 /* Members for Multicast filter workaround */
138 unsigned int multicast_update_pending;
139 unsigned int set_bits_mask;
140 unsigned int clear_bits_mask;
141 unsigned int hashhi;
142 unsigned int hashlo;
143
144 /* register access functions */
145 const struct smsc911x_ops *ops;
146
147 /* regulators */
148 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
149
150 /* clock */
151 struct clk *clk;
152 };
153
154 /* Easy access to information */
155 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
156
157 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
158 {
159 if (pdata->config.flags & SMSC911X_USE_32BIT)
160 return readl(pdata->ioaddr + reg);
161
162 if (pdata->config.flags & SMSC911X_USE_16BIT)
163 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
164 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
165
166 BUG();
167 return 0;
168 }
169
170 static inline u32
171 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
172 {
173 if (pdata->config.flags & SMSC911X_USE_32BIT)
174 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
175
176 if (pdata->config.flags & SMSC911X_USE_16BIT)
177 return (readw(pdata->ioaddr +
178 __smsc_shift(pdata, reg)) & 0xFFFF) |
179 ((readw(pdata->ioaddr +
180 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
181
182 BUG();
183 return 0;
184 }
185
186 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
187 {
188 u32 data;
189 unsigned long flags;
190
191 spin_lock_irqsave(&pdata->dev_lock, flags);
192 data = pdata->ops->reg_read(pdata, reg);
193 spin_unlock_irqrestore(&pdata->dev_lock, flags);
194
195 return data;
196 }
197
198 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
199 u32 val)
200 {
201 if (pdata->config.flags & SMSC911X_USE_32BIT) {
202 writel(val, pdata->ioaddr + reg);
203 return;
204 }
205
206 if (pdata->config.flags & SMSC911X_USE_16BIT) {
207 writew(val & 0xFFFF, pdata->ioaddr + reg);
208 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
209 return;
210 }
211
212 BUG();
213 }
214
215 static inline void
216 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
217 {
218 if (pdata->config.flags & SMSC911X_USE_32BIT) {
219 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
220 return;
221 }
222
223 if (pdata->config.flags & SMSC911X_USE_16BIT) {
224 writew(val & 0xFFFF,
225 pdata->ioaddr + __smsc_shift(pdata, reg));
226 writew((val >> 16) & 0xFFFF,
227 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
228 return;
229 }
230
231 BUG();
232 }
233
234 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
235 u32 val)
236 {
237 unsigned long flags;
238
239 spin_lock_irqsave(&pdata->dev_lock, flags);
240 pdata->ops->reg_write(pdata, reg, val);
241 spin_unlock_irqrestore(&pdata->dev_lock, flags);
242 }
243
244 /* Writes a packet to the TX_DATA_FIFO */
245 static inline void
246 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
247 unsigned int wordcount)
248 {
249 unsigned long flags;
250
251 spin_lock_irqsave(&pdata->dev_lock, flags);
252
253 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
254 while (wordcount--)
255 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
256 swab32(*buf++));
257 goto out;
258 }
259
260 if (pdata->config.flags & SMSC911X_USE_32BIT) {
261 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
262 goto out;
263 }
264
265 if (pdata->config.flags & SMSC911X_USE_16BIT) {
266 while (wordcount--)
267 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
268 goto out;
269 }
270
271 BUG();
272 out:
273 spin_unlock_irqrestore(&pdata->dev_lock, flags);
274 }
275
276 /* Writes a packet to the TX_DATA_FIFO - shifted version */
277 static inline void
278 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
279 unsigned int wordcount)
280 {
281 unsigned long flags;
282
283 spin_lock_irqsave(&pdata->dev_lock, flags);
284
285 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
286 while (wordcount--)
287 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
288 swab32(*buf++));
289 goto out;
290 }
291
292 if (pdata->config.flags & SMSC911X_USE_32BIT) {
293 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
294 TX_DATA_FIFO), buf, wordcount);
295 goto out;
296 }
297
298 if (pdata->config.flags & SMSC911X_USE_16BIT) {
299 while (wordcount--)
300 __smsc911x_reg_write_shift(pdata,
301 TX_DATA_FIFO, *buf++);
302 goto out;
303 }
304
305 BUG();
306 out:
307 spin_unlock_irqrestore(&pdata->dev_lock, flags);
308 }
309
310 /* Reads a packet out of the RX_DATA_FIFO */
311 static inline void
312 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
313 unsigned int wordcount)
314 {
315 unsigned long flags;
316
317 spin_lock_irqsave(&pdata->dev_lock, flags);
318
319 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
320 while (wordcount--)
321 *buf++ = swab32(__smsc911x_reg_read(pdata,
322 RX_DATA_FIFO));
323 goto out;
324 }
325
326 if (pdata->config.flags & SMSC911X_USE_32BIT) {
327 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
328 goto out;
329 }
330
331 if (pdata->config.flags & SMSC911X_USE_16BIT) {
332 while (wordcount--)
333 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
334 goto out;
335 }
336
337 BUG();
338 out:
339 spin_unlock_irqrestore(&pdata->dev_lock, flags);
340 }
341
342 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
343 static inline void
344 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
345 unsigned int wordcount)
346 {
347 unsigned long flags;
348
349 spin_lock_irqsave(&pdata->dev_lock, flags);
350
351 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
352 while (wordcount--)
353 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
354 RX_DATA_FIFO));
355 goto out;
356 }
357
358 if (pdata->config.flags & SMSC911X_USE_32BIT) {
359 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
360 RX_DATA_FIFO), buf, wordcount);
361 goto out;
362 }
363
364 if (pdata->config.flags & SMSC911X_USE_16BIT) {
365 while (wordcount--)
366 *buf++ = __smsc911x_reg_read_shift(pdata,
367 RX_DATA_FIFO);
368 goto out;
369 }
370
371 BUG();
372 out:
373 spin_unlock_irqrestore(&pdata->dev_lock, flags);
374 }
375
376 /*
377 * enable regulator and clock resources.
378 */
379 static int smsc911x_enable_resources(struct platform_device *pdev)
380 {
381 struct net_device *ndev = platform_get_drvdata(pdev);
382 struct smsc911x_data *pdata = netdev_priv(ndev);
383 int ret = 0;
384
385 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
386 pdata->supplies);
387 if (ret)
388 netdev_err(ndev, "failed to enable regulators %d\n",
389 ret);
390
391 if (!IS_ERR(pdata->clk)) {
392 ret = clk_prepare_enable(pdata->clk);
393 if (ret < 0)
394 netdev_err(ndev, "failed to enable clock %d\n", ret);
395 }
396
397 return ret;
398 }
399
400 /*
401 * disable resources, currently just regulators.
402 */
403 static int smsc911x_disable_resources(struct platform_device *pdev)
404 {
405 struct net_device *ndev = platform_get_drvdata(pdev);
406 struct smsc911x_data *pdata = netdev_priv(ndev);
407 int ret = 0;
408
409 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
410 pdata->supplies);
411
412 if (!IS_ERR(pdata->clk))
413 clk_disable_unprepare(pdata->clk);
414
415 return ret;
416 }
417
418 /*
419 * Request resources, currently just regulators.
420 *
421 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
422 * these are not always-on we need to request regulators to be turned on
423 * before we can try to access the device registers.
424 */
425 static int smsc911x_request_resources(struct platform_device *pdev)
426 {
427 struct net_device *ndev = platform_get_drvdata(pdev);
428 struct smsc911x_data *pdata = netdev_priv(ndev);
429 int ret = 0;
430
431 /* Request regulators */
432 pdata->supplies[0].supply = "vdd33a";
433 pdata->supplies[1].supply = "vddvario";
434 ret = regulator_bulk_get(&pdev->dev,
435 ARRAY_SIZE(pdata->supplies),
436 pdata->supplies);
437 if (ret)
438 netdev_err(ndev, "couldn't get regulators %d\n",
439 ret);
440
441 /* Request clock */
442 pdata->clk = clk_get(&pdev->dev, NULL);
443 if (IS_ERR(pdata->clk))
444 dev_dbg(&pdev->dev, "couldn't get clock %li\n",
445 PTR_ERR(pdata->clk));
446
447 return ret;
448 }
449
450 /*
451 * Free resources, currently just regulators.
452 *
453 */
454 static void smsc911x_free_resources(struct platform_device *pdev)
455 {
456 struct net_device *ndev = platform_get_drvdata(pdev);
457 struct smsc911x_data *pdata = netdev_priv(ndev);
458
459 /* Free regulators */
460 regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
461 pdata->supplies);
462
463 /* Free clock */
464 if (!IS_ERR(pdata->clk)) {
465 clk_put(pdata->clk);
466 pdata->clk = NULL;
467 }
468 }
469
470 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
471 * and smsc911x_mac_write, so assumes mac_lock is held */
472 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
473 {
474 int i;
475 u32 val;
476
477 SMSC_ASSERT_MAC_LOCK(pdata);
478
479 for (i = 0; i < 40; i++) {
480 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
481 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
482 return 0;
483 }
484 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
485 "MAC_CSR_CMD: 0x%08X", val);
486 return -EIO;
487 }
488
489 /* Fetches a MAC register value. Assumes mac_lock is acquired */
490 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
491 {
492 unsigned int temp;
493
494 SMSC_ASSERT_MAC_LOCK(pdata);
495
496 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
497 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
498 SMSC_WARN(pdata, hw, "MAC busy at entry");
499 return 0xFFFFFFFF;
500 }
501
502 /* Send the MAC cmd */
503 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
504 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
505
506 /* Workaround for hardware read-after-write restriction */
507 temp = smsc911x_reg_read(pdata, BYTE_TEST);
508
509 /* Wait for the read to complete */
510 if (likely(smsc911x_mac_complete(pdata) == 0))
511 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
512
513 SMSC_WARN(pdata, hw, "MAC busy after read");
514 return 0xFFFFFFFF;
515 }
516
517 /* Set a mac register, mac_lock must be acquired before calling */
518 static void smsc911x_mac_write(struct smsc911x_data *pdata,
519 unsigned int offset, u32 val)
520 {
521 unsigned int temp;
522
523 SMSC_ASSERT_MAC_LOCK(pdata);
524
525 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
526 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
527 SMSC_WARN(pdata, hw,
528 "smsc911x_mac_write failed, MAC busy at entry");
529 return;
530 }
531
532 /* Send data to write */
533 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
534
535 /* Write the actual data */
536 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
537 MAC_CSR_CMD_CSR_BUSY_));
538
539 /* Workaround for hardware read-after-write restriction */
540 temp = smsc911x_reg_read(pdata, BYTE_TEST);
541
542 /* Wait for the write to complete */
543 if (likely(smsc911x_mac_complete(pdata) == 0))
544 return;
545
546 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
547 }
548
549 /* Get a phy register */
550 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
551 {
552 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
553 unsigned long flags;
554 unsigned int addr;
555 int i, reg;
556
557 spin_lock_irqsave(&pdata->mac_lock, flags);
558
559 /* Confirm MII not busy */
560 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
561 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
562 reg = -EIO;
563 goto out;
564 }
565
566 /* Set the address, index & direction (read from PHY) */
567 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
568 smsc911x_mac_write(pdata, MII_ACC, addr);
569
570 /* Wait for read to complete w/ timeout */
571 for (i = 0; i < 100; i++)
572 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
573 reg = smsc911x_mac_read(pdata, MII_DATA);
574 goto out;
575 }
576
577 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
578 reg = -EIO;
579
580 out:
581 spin_unlock_irqrestore(&pdata->mac_lock, flags);
582 return reg;
583 }
584
585 /* Set a phy register */
586 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
587 u16 val)
588 {
589 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
590 unsigned long flags;
591 unsigned int addr;
592 int i, reg;
593
594 spin_lock_irqsave(&pdata->mac_lock, flags);
595
596 /* Confirm MII not busy */
597 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
598 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
599 reg = -EIO;
600 goto out;
601 }
602
603 /* Put the data to write in the MAC */
604 smsc911x_mac_write(pdata, MII_DATA, val);
605
606 /* Set the address, index & direction (write to PHY) */
607 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
608 MII_ACC_MII_WRITE_;
609 smsc911x_mac_write(pdata, MII_ACC, addr);
610
611 /* Wait for write to complete w/ timeout */
612 for (i = 0; i < 100; i++)
613 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
614 reg = 0;
615 goto out;
616 }
617
618 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
619 reg = -EIO;
620
621 out:
622 spin_unlock_irqrestore(&pdata->mac_lock, flags);
623 return reg;
624 }
625
626 /* Switch to external phy. Assumes tx and rx are stopped. */
627 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
628 {
629 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
630
631 /* Disable phy clocks to the MAC */
632 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
633 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
634 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
635 udelay(10); /* Enough time for clocks to stop */
636
637 /* Switch to external phy */
638 hwcfg |= HW_CFG_EXT_PHY_EN_;
639 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
640
641 /* Enable phy clocks to the MAC */
642 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
643 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
644 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
645 udelay(10); /* Enough time for clocks to restart */
646
647 hwcfg |= HW_CFG_SMI_SEL_;
648 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
649 }
650
651 /* Autodetects and enables external phy if present on supported chips.
652 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
653 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
654 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
655 {
656 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
657
658 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
659 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
660 pdata->using_extphy = 0;
661 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
662 SMSC_TRACE(pdata, hw, "Forcing external PHY");
663 smsc911x_phy_enable_external(pdata);
664 pdata->using_extphy = 1;
665 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
666 SMSC_TRACE(pdata, hw,
667 "HW_CFG EXT_PHY_DET set, using external PHY");
668 smsc911x_phy_enable_external(pdata);
669 pdata->using_extphy = 1;
670 } else {
671 SMSC_TRACE(pdata, hw,
672 "HW_CFG EXT_PHY_DET clear, using internal PHY");
673 pdata->using_extphy = 0;
674 }
675 }
676
677 /* Fetches a tx status out of the status fifo */
678 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
679 {
680 unsigned int result =
681 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
682
683 if (result != 0)
684 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
685
686 return result;
687 }
688
689 /* Fetches the next rx status */
690 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
691 {
692 unsigned int result =
693 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
694
695 if (result != 0)
696 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
697
698 return result;
699 }
700
701 #ifdef USE_PHY_WORK_AROUND
702 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
703 {
704 unsigned int tries;
705 u32 wrsz;
706 u32 rdsz;
707 ulong bufp;
708
709 for (tries = 0; tries < 10; tries++) {
710 unsigned int txcmd_a;
711 unsigned int txcmd_b;
712 unsigned int status;
713 unsigned int pktlength;
714 unsigned int i;
715
716 /* Zero-out rx packet memory */
717 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
718
719 /* Write tx packet to 118 */
720 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
721 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
722 txcmd_a |= MIN_PACKET_SIZE;
723
724 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
725
726 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
727 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
728
729 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
730 wrsz = MIN_PACKET_SIZE + 3;
731 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
732 wrsz >>= 2;
733
734 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
735
736 /* Wait till transmit is done */
737 i = 60;
738 do {
739 udelay(5);
740 status = smsc911x_tx_get_txstatus(pdata);
741 } while ((i--) && (!status));
742
743 if (!status) {
744 SMSC_WARN(pdata, hw,
745 "Failed to transmit during loopback test");
746 continue;
747 }
748 if (status & TX_STS_ES_) {
749 SMSC_WARN(pdata, hw,
750 "Transmit encountered errors during loopback test");
751 continue;
752 }
753
754 /* Wait till receive is done */
755 i = 60;
756 do {
757 udelay(5);
758 status = smsc911x_rx_get_rxstatus(pdata);
759 } while ((i--) && (!status));
760
761 if (!status) {
762 SMSC_WARN(pdata, hw,
763 "Failed to receive during loopback test");
764 continue;
765 }
766 if (status & RX_STS_ES_) {
767 SMSC_WARN(pdata, hw,
768 "Receive encountered errors during loopback test");
769 continue;
770 }
771
772 pktlength = ((status & 0x3FFF0000UL) >> 16);
773 bufp = (ulong)pdata->loopback_rx_pkt;
774 rdsz = pktlength + 3;
775 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
776 rdsz >>= 2;
777
778 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
779
780 if (pktlength != (MIN_PACKET_SIZE + 4)) {
781 SMSC_WARN(pdata, hw, "Unexpected packet size "
782 "during loop back test, size=%d, will retry",
783 pktlength);
784 } else {
785 unsigned int j;
786 int mismatch = 0;
787 for (j = 0; j < MIN_PACKET_SIZE; j++) {
788 if (pdata->loopback_tx_pkt[j]
789 != pdata->loopback_rx_pkt[j]) {
790 mismatch = 1;
791 break;
792 }
793 }
794 if (!mismatch) {
795 SMSC_TRACE(pdata, hw, "Successfully verified "
796 "loopback packet");
797 return 0;
798 } else {
799 SMSC_WARN(pdata, hw, "Data mismatch "
800 "during loop back test, will retry");
801 }
802 }
803 }
804
805 return -EIO;
806 }
807
808 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
809 {
810 struct phy_device *phy_dev = pdata->phy_dev;
811 unsigned int temp;
812 unsigned int i = 100000;
813
814 BUG_ON(!phy_dev);
815 BUG_ON(!phy_dev->bus);
816
817 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
818 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
819 do {
820 msleep(1);
821 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
822 MII_BMCR);
823 } while ((i--) && (temp & BMCR_RESET));
824
825 if (temp & BMCR_RESET) {
826 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
827 return -EIO;
828 }
829 /* Extra delay required because the phy may not be completed with
830 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
831 * enough delay but using 1ms here to be safe */
832 msleep(1);
833
834 return 0;
835 }
836
837 static int smsc911x_phy_loopbacktest(struct net_device *dev)
838 {
839 struct smsc911x_data *pdata = netdev_priv(dev);
840 struct phy_device *phy_dev = pdata->phy_dev;
841 int result = -EIO;
842 unsigned int i, val;
843 unsigned long flags;
844
845 /* Initialise tx packet using broadcast destination address */
846 eth_broadcast_addr(pdata->loopback_tx_pkt);
847
848 /* Use incrementing source address */
849 for (i = 6; i < 12; i++)
850 pdata->loopback_tx_pkt[i] = (char)i;
851
852 /* Set length type field */
853 pdata->loopback_tx_pkt[12] = 0x00;
854 pdata->loopback_tx_pkt[13] = 0x00;
855
856 for (i = 14; i < MIN_PACKET_SIZE; i++)
857 pdata->loopback_tx_pkt[i] = (char)i;
858
859 val = smsc911x_reg_read(pdata, HW_CFG);
860 val &= HW_CFG_TX_FIF_SZ_;
861 val |= HW_CFG_SF_;
862 smsc911x_reg_write(pdata, HW_CFG, val);
863
864 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
865 smsc911x_reg_write(pdata, RX_CFG,
866 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
867
868 for (i = 0; i < 10; i++) {
869 /* Set PHY to 10/FD, no ANEG, and loopback mode */
870 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
871 BMCR_LOOPBACK | BMCR_FULLDPLX);
872
873 /* Enable MAC tx/rx, FD */
874 spin_lock_irqsave(&pdata->mac_lock, flags);
875 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
876 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
877 spin_unlock_irqrestore(&pdata->mac_lock, flags);
878
879 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
880 result = 0;
881 break;
882 }
883 pdata->resetcount++;
884
885 /* Disable MAC rx */
886 spin_lock_irqsave(&pdata->mac_lock, flags);
887 smsc911x_mac_write(pdata, MAC_CR, 0);
888 spin_unlock_irqrestore(&pdata->mac_lock, flags);
889
890 smsc911x_phy_reset(pdata);
891 }
892
893 /* Disable MAC */
894 spin_lock_irqsave(&pdata->mac_lock, flags);
895 smsc911x_mac_write(pdata, MAC_CR, 0);
896 spin_unlock_irqrestore(&pdata->mac_lock, flags);
897
898 /* Cancel PHY loopback mode */
899 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
900
901 smsc911x_reg_write(pdata, TX_CFG, 0);
902 smsc911x_reg_write(pdata, RX_CFG, 0);
903
904 return result;
905 }
906 #endif /* USE_PHY_WORK_AROUND */
907
908 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
909 {
910 struct phy_device *phy_dev = pdata->phy_dev;
911 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
912 u32 flow;
913 unsigned long flags;
914
915 if (phy_dev->duplex == DUPLEX_FULL) {
916 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
917 u16 rmtadv = phy_read(phy_dev, MII_LPA);
918 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
919
920 if (cap & FLOW_CTRL_RX)
921 flow = 0xFFFF0002;
922 else
923 flow = 0;
924
925 if (cap & FLOW_CTRL_TX)
926 afc |= 0xF;
927 else
928 afc &= ~0xF;
929
930 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
931 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
932 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
933 } else {
934 SMSC_TRACE(pdata, hw, "half duplex");
935 flow = 0;
936 afc |= 0xF;
937 }
938
939 spin_lock_irqsave(&pdata->mac_lock, flags);
940 smsc911x_mac_write(pdata, FLOW, flow);
941 spin_unlock_irqrestore(&pdata->mac_lock, flags);
942
943 smsc911x_reg_write(pdata, AFC_CFG, afc);
944 }
945
946 /* Update link mode if anything has changed. Called periodically when the
947 * PHY is in polling mode, even if nothing has changed. */
948 static void smsc911x_phy_adjust_link(struct net_device *dev)
949 {
950 struct smsc911x_data *pdata = netdev_priv(dev);
951 struct phy_device *phy_dev = pdata->phy_dev;
952 unsigned long flags;
953 int carrier;
954
955 if (phy_dev->duplex != pdata->last_duplex) {
956 unsigned int mac_cr;
957 SMSC_TRACE(pdata, hw, "duplex state has changed");
958
959 spin_lock_irqsave(&pdata->mac_lock, flags);
960 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
961 if (phy_dev->duplex) {
962 SMSC_TRACE(pdata, hw,
963 "configuring for full duplex mode");
964 mac_cr |= MAC_CR_FDPX_;
965 } else {
966 SMSC_TRACE(pdata, hw,
967 "configuring for half duplex mode");
968 mac_cr &= ~MAC_CR_FDPX_;
969 }
970 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
971 spin_unlock_irqrestore(&pdata->mac_lock, flags);
972
973 smsc911x_phy_update_flowcontrol(pdata);
974 pdata->last_duplex = phy_dev->duplex;
975 }
976
977 carrier = netif_carrier_ok(dev);
978 if (carrier != pdata->last_carrier) {
979 SMSC_TRACE(pdata, hw, "carrier state has changed");
980 if (carrier) {
981 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
982 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
983 (!pdata->using_extphy)) {
984 /* Restore original GPIO configuration */
985 pdata->gpio_setting = pdata->gpio_orig_setting;
986 smsc911x_reg_write(pdata, GPIO_CFG,
987 pdata->gpio_setting);
988 }
989 } else {
990 SMSC_TRACE(pdata, hw, "configuring for no carrier");
991 /* Check global setting that LED1
992 * usage is 10/100 indicator */
993 pdata->gpio_setting = smsc911x_reg_read(pdata,
994 GPIO_CFG);
995 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
996 (!pdata->using_extphy)) {
997 /* Force 10/100 LED off, after saving
998 * original GPIO configuration */
999 pdata->gpio_orig_setting = pdata->gpio_setting;
1000
1001 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
1002 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
1003 | GPIO_CFG_GPIODIR0_
1004 | GPIO_CFG_GPIOD0_);
1005 smsc911x_reg_write(pdata, GPIO_CFG,
1006 pdata->gpio_setting);
1007 }
1008 }
1009 pdata->last_carrier = carrier;
1010 }
1011 }
1012
1013 static int smsc911x_mii_probe(struct net_device *dev)
1014 {
1015 struct smsc911x_data *pdata = netdev_priv(dev);
1016 struct phy_device *phydev = NULL;
1017 int ret;
1018
1019 /* find the first phy */
1020 phydev = phy_find_first(pdata->mii_bus);
1021 if (!phydev) {
1022 netdev_err(dev, "no PHY found\n");
1023 return -ENODEV;
1024 }
1025
1026 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
1027 phydev->addr, phydev->phy_id);
1028
1029 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
1030 pdata->config.phy_interface);
1031
1032 if (ret) {
1033 netdev_err(dev, "Could not attach to PHY\n");
1034 return ret;
1035 }
1036
1037 netdev_info(dev,
1038 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1039 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
1040
1041 /* mask with MAC supported features */
1042 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
1043 SUPPORTED_Asym_Pause);
1044 phydev->advertising = phydev->supported;
1045
1046 pdata->phy_dev = phydev;
1047 pdata->last_duplex = -1;
1048 pdata->last_carrier = -1;
1049
1050 #ifdef USE_PHY_WORK_AROUND
1051 if (smsc911x_phy_loopbacktest(dev) < 0) {
1052 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1053 return -ENODEV;
1054 }
1055 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1056 #endif /* USE_PHY_WORK_AROUND */
1057
1058 SMSC_TRACE(pdata, hw, "phy initialised successfully");
1059 return 0;
1060 }
1061
1062 static int smsc911x_mii_init(struct platform_device *pdev,
1063 struct net_device *dev)
1064 {
1065 struct smsc911x_data *pdata = netdev_priv(dev);
1066 int err = -ENXIO, i;
1067
1068 pdata->mii_bus = mdiobus_alloc();
1069 if (!pdata->mii_bus) {
1070 err = -ENOMEM;
1071 goto err_out_1;
1072 }
1073
1074 pdata->mii_bus->name = SMSC_MDIONAME;
1075 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1076 pdev->name, pdev->id);
1077 pdata->mii_bus->priv = pdata;
1078 pdata->mii_bus->read = smsc911x_mii_read;
1079 pdata->mii_bus->write = smsc911x_mii_write;
1080 pdata->mii_bus->irq = pdata->phy_irq;
1081 for (i = 0; i < PHY_MAX_ADDR; ++i)
1082 pdata->mii_bus->irq[i] = PHY_POLL;
1083
1084 pdata->mii_bus->parent = &pdev->dev;
1085
1086 switch (pdata->idrev & 0xFFFF0000) {
1087 case 0x01170000:
1088 case 0x01150000:
1089 case 0x117A0000:
1090 case 0x115A0000:
1091 /* External PHY supported, try to autodetect */
1092 smsc911x_phy_initialise_external(pdata);
1093 break;
1094 default:
1095 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1096 "using internal PHY");
1097 pdata->using_extphy = 0;
1098 break;
1099 }
1100
1101 if (!pdata->using_extphy) {
1102 /* Mask all PHYs except ID 1 (internal) */
1103 pdata->mii_bus->phy_mask = ~(1 << 1);
1104 }
1105
1106 if (mdiobus_register(pdata->mii_bus)) {
1107 SMSC_WARN(pdata, probe, "Error registering mii bus");
1108 goto err_out_free_bus_2;
1109 }
1110
1111 if (smsc911x_mii_probe(dev) < 0) {
1112 SMSC_WARN(pdata, probe, "Error registering mii bus");
1113 goto err_out_unregister_bus_3;
1114 }
1115
1116 return 0;
1117
1118 err_out_unregister_bus_3:
1119 mdiobus_unregister(pdata->mii_bus);
1120 err_out_free_bus_2:
1121 mdiobus_free(pdata->mii_bus);
1122 err_out_1:
1123 return err;
1124 }
1125
1126 /* Gets the number of tx statuses in the fifo */
1127 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1128 {
1129 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1130 & TX_FIFO_INF_TSUSED_) >> 16;
1131 }
1132
1133 /* Reads tx statuses and increments counters where necessary */
1134 static void smsc911x_tx_update_txcounters(struct net_device *dev)
1135 {
1136 struct smsc911x_data *pdata = netdev_priv(dev);
1137 unsigned int tx_stat;
1138
1139 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1140 if (unlikely(tx_stat & 0x80000000)) {
1141 /* In this driver the packet tag is used as the packet
1142 * length. Since a packet length can never reach the
1143 * size of 0x8000, this bit is reserved. It is worth
1144 * noting that the "reserved bit" in the warning above
1145 * does not reference a hardware defined reserved bit
1146 * but rather a driver defined one.
1147 */
1148 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1149 } else {
1150 if (unlikely(tx_stat & TX_STS_ES_)) {
1151 dev->stats.tx_errors++;
1152 } else {
1153 dev->stats.tx_packets++;
1154 dev->stats.tx_bytes += (tx_stat >> 16);
1155 }
1156 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1157 dev->stats.collisions += 16;
1158 dev->stats.tx_aborted_errors += 1;
1159 } else {
1160 dev->stats.collisions +=
1161 ((tx_stat >> 3) & 0xF);
1162 }
1163 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1164 dev->stats.tx_carrier_errors += 1;
1165 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1166 dev->stats.collisions++;
1167 dev->stats.tx_aborted_errors++;
1168 }
1169 }
1170 }
1171 }
1172
1173 /* Increments the Rx error counters */
1174 static void
1175 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1176 {
1177 int crc_err = 0;
1178
1179 if (unlikely(rxstat & RX_STS_ES_)) {
1180 dev->stats.rx_errors++;
1181 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1182 dev->stats.rx_crc_errors++;
1183 crc_err = 1;
1184 }
1185 }
1186 if (likely(!crc_err)) {
1187 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1188 (rxstat & RX_STS_LENGTH_ERR_)))
1189 dev->stats.rx_length_errors++;
1190 if (rxstat & RX_STS_MCAST_)
1191 dev->stats.multicast++;
1192 }
1193 }
1194
1195 /* Quickly dumps bad packets */
1196 static void
1197 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1198 {
1199 if (likely(pktwords >= 4)) {
1200 unsigned int timeout = 500;
1201 unsigned int val;
1202 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1203 do {
1204 udelay(1);
1205 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1206 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1207
1208 if (unlikely(timeout == 0))
1209 SMSC_WARN(pdata, hw, "Timed out waiting for "
1210 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1211 } else {
1212 unsigned int temp;
1213 while (pktwords--)
1214 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1215 }
1216 }
1217
1218 /* NAPI poll function */
1219 static int smsc911x_poll(struct napi_struct *napi, int budget)
1220 {
1221 struct smsc911x_data *pdata =
1222 container_of(napi, struct smsc911x_data, napi);
1223 struct net_device *dev = pdata->dev;
1224 int npackets = 0;
1225
1226 while (npackets < budget) {
1227 unsigned int pktlength;
1228 unsigned int pktwords;
1229 struct sk_buff *skb;
1230 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1231
1232 if (!rxstat) {
1233 unsigned int temp;
1234 /* We processed all packets available. Tell NAPI it can
1235 * stop polling then re-enable rx interrupts */
1236 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1237 napi_complete(napi);
1238 temp = smsc911x_reg_read(pdata, INT_EN);
1239 temp |= INT_EN_RSFL_EN_;
1240 smsc911x_reg_write(pdata, INT_EN, temp);
1241 break;
1242 }
1243
1244 /* Count packet for NAPI scheduling, even if it has an error.
1245 * Error packets still require cycles to discard */
1246 npackets++;
1247
1248 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1249 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1250 smsc911x_rx_counterrors(dev, rxstat);
1251
1252 if (unlikely(rxstat & RX_STS_ES_)) {
1253 SMSC_WARN(pdata, rx_err,
1254 "Discarding packet with error bit set");
1255 /* Packet has an error, discard it and continue with
1256 * the next */
1257 smsc911x_rx_fastforward(pdata, pktwords);
1258 dev->stats.rx_dropped++;
1259 continue;
1260 }
1261
1262 skb = netdev_alloc_skb(dev, pktwords << 2);
1263 if (unlikely(!skb)) {
1264 SMSC_WARN(pdata, rx_err,
1265 "Unable to allocate skb for rx packet");
1266 /* Drop the packet and stop this polling iteration */
1267 smsc911x_rx_fastforward(pdata, pktwords);
1268 dev->stats.rx_dropped++;
1269 break;
1270 }
1271
1272 pdata->ops->rx_readfifo(pdata,
1273 (unsigned int *)skb->data, pktwords);
1274
1275 /* Align IP on 16B boundary */
1276 skb_reserve(skb, NET_IP_ALIGN);
1277 skb_put(skb, pktlength - 4);
1278 skb->protocol = eth_type_trans(skb, dev);
1279 skb_checksum_none_assert(skb);
1280 netif_receive_skb(skb);
1281
1282 /* Update counters */
1283 dev->stats.rx_packets++;
1284 dev->stats.rx_bytes += (pktlength - 4);
1285 }
1286
1287 /* Return total received packets */
1288 return npackets;
1289 }
1290
1291 /* Returns hash bit number for given MAC address
1292 * Example:
1293 * 01 00 5E 00 00 01 -> returns bit number 31 */
1294 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1295 {
1296 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1297 }
1298
1299 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1300 {
1301 /* Performs the multicast & mac_cr update. This is called when
1302 * safe on the current hardware, and with the mac_lock held */
1303 unsigned int mac_cr;
1304
1305 SMSC_ASSERT_MAC_LOCK(pdata);
1306
1307 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1308 mac_cr |= pdata->set_bits_mask;
1309 mac_cr &= ~(pdata->clear_bits_mask);
1310 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1311 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1312 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1313 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1314 mac_cr, pdata->hashhi, pdata->hashlo);
1315 }
1316
1317 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1318 {
1319 unsigned int mac_cr;
1320
1321 /* This function is only called for older LAN911x devices
1322 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1323 * be modified during Rx - newer devices immediately update the
1324 * registers.
1325 *
1326 * This is called from interrupt context */
1327
1328 spin_lock(&pdata->mac_lock);
1329
1330 /* Check Rx has stopped */
1331 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1332 SMSC_WARN(pdata, drv, "Rx not stopped");
1333
1334 /* Perform the update - safe to do now Rx has stopped */
1335 smsc911x_rx_multicast_update(pdata);
1336
1337 /* Re-enable Rx */
1338 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1339 mac_cr |= MAC_CR_RXEN_;
1340 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1341
1342 pdata->multicast_update_pending = 0;
1343
1344 spin_unlock(&pdata->mac_lock);
1345 }
1346
1347 static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata)
1348 {
1349 int rc = 0;
1350
1351 if (!pdata->phy_dev)
1352 return rc;
1353
1354 /* If the internal PHY is in General Power-Down mode, all, except the
1355 * management interface, is powered-down and stays in that condition as
1356 * long as Phy register bit 0.11 is HIGH.
1357 *
1358 * In that case, clear the bit 0.11, so the PHY powers up and we can
1359 * access to the phy registers.
1360 */
1361 rc = phy_read(pdata->phy_dev, MII_BMCR);
1362 if (rc < 0) {
1363 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1364 return rc;
1365 }
1366
1367 /* If the PHY general power-down bit is not set is not necessary to
1368 * disable the general power down-mode.
1369 */
1370 if (rc & BMCR_PDOWN) {
1371 rc = phy_write(pdata->phy_dev, MII_BMCR, rc & ~BMCR_PDOWN);
1372 if (rc < 0) {
1373 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1374 return rc;
1375 }
1376
1377 usleep_range(1000, 1500);
1378 }
1379
1380 return 0;
1381 }
1382
1383 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1384 {
1385 int rc = 0;
1386
1387 if (!pdata->phy_dev)
1388 return rc;
1389
1390 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1391
1392 if (rc < 0) {
1393 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1394 return rc;
1395 }
1396
1397 /* Only disable if energy detect mode is already enabled */
1398 if (rc & MII_LAN83C185_EDPWRDOWN) {
1399 /* Disable energy detect mode for this SMSC Transceivers */
1400 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1401 rc & (~MII_LAN83C185_EDPWRDOWN));
1402
1403 if (rc < 0) {
1404 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1405 return rc;
1406 }
1407 /* Allow PHY to wakeup */
1408 mdelay(2);
1409 }
1410
1411 return 0;
1412 }
1413
1414 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1415 {
1416 int rc = 0;
1417
1418 if (!pdata->phy_dev)
1419 return rc;
1420
1421 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1422
1423 if (rc < 0) {
1424 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1425 return rc;
1426 }
1427
1428 /* Only enable if energy detect mode is already disabled */
1429 if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1430 /* Enable energy detect mode for this SMSC Transceivers */
1431 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1432 rc | MII_LAN83C185_EDPWRDOWN);
1433
1434 if (rc < 0) {
1435 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1436 return rc;
1437 }
1438 }
1439 return 0;
1440 }
1441
1442 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1443 {
1444 unsigned int timeout;
1445 unsigned int temp;
1446 int ret;
1447
1448 /*
1449 * Make sure to power-up the PHY chip before doing a reset, otherwise
1450 * the reset fails.
1451 */
1452 ret = smsc911x_phy_general_power_up(pdata);
1453 if (ret) {
1454 SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip");
1455 return ret;
1456 }
1457
1458 /*
1459 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1460 * are initialized in a Energy Detect Power-Down mode that prevents
1461 * the MAC chip to be software reseted. So we have to wakeup the PHY
1462 * before.
1463 */
1464 if (pdata->generation == 4) {
1465 ret = smsc911x_phy_disable_energy_detect(pdata);
1466
1467 if (ret) {
1468 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1469 return ret;
1470 }
1471 }
1472
1473 /* Reset the LAN911x */
1474 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1475 timeout = 10;
1476 do {
1477 udelay(10);
1478 temp = smsc911x_reg_read(pdata, HW_CFG);
1479 } while ((--timeout) && (temp & HW_CFG_SRST_));
1480
1481 if (unlikely(temp & HW_CFG_SRST_)) {
1482 SMSC_WARN(pdata, drv, "Failed to complete reset");
1483 return -EIO;
1484 }
1485
1486 if (pdata->generation == 4) {
1487 ret = smsc911x_phy_enable_energy_detect(pdata);
1488
1489 if (ret) {
1490 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1491 return ret;
1492 }
1493 }
1494
1495 return 0;
1496 }
1497
1498 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1499 static void
1500 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1501 {
1502 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1503 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1504 (dev_addr[1] << 8) | dev_addr[0];
1505
1506 SMSC_ASSERT_MAC_LOCK(pdata);
1507
1508 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1509 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1510 }
1511
1512 static void smsc911x_disable_irq_chip(struct net_device *dev)
1513 {
1514 struct smsc911x_data *pdata = netdev_priv(dev);
1515
1516 smsc911x_reg_write(pdata, INT_EN, 0);
1517 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1518 }
1519
1520 static int smsc911x_open(struct net_device *dev)
1521 {
1522 struct smsc911x_data *pdata = netdev_priv(dev);
1523 unsigned int timeout;
1524 unsigned int temp;
1525 unsigned int intcfg;
1526
1527 /* if the phy is not yet registered, retry later*/
1528 if (!pdata->phy_dev) {
1529 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1530 return -EAGAIN;
1531 }
1532
1533 /* Reset the LAN911x */
1534 if (smsc911x_soft_reset(pdata)) {
1535 SMSC_WARN(pdata, hw, "soft reset failed");
1536 return -EIO;
1537 }
1538
1539 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1540 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1541
1542 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1543 spin_lock_irq(&pdata->mac_lock);
1544 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1545 spin_unlock_irq(&pdata->mac_lock);
1546
1547 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1548 timeout = 50;
1549 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1550 --timeout) {
1551 udelay(10);
1552 }
1553
1554 if (unlikely(timeout == 0))
1555 SMSC_WARN(pdata, ifup,
1556 "Timed out waiting for EEPROM busy bit to clear");
1557
1558 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1559
1560 /* The soft reset above cleared the device's MAC address,
1561 * restore it from local copy (set in probe) */
1562 spin_lock_irq(&pdata->mac_lock);
1563 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1564 spin_unlock_irq(&pdata->mac_lock);
1565
1566 /* Initialise irqs, but leave all sources disabled */
1567 smsc911x_disable_irq_chip(dev);
1568
1569 /* Set interrupt deassertion to 100uS */
1570 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1571
1572 if (pdata->config.irq_polarity) {
1573 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1574 intcfg |= INT_CFG_IRQ_POL_;
1575 } else {
1576 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1577 }
1578
1579 if (pdata->config.irq_type) {
1580 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1581 intcfg |= INT_CFG_IRQ_TYPE_;
1582 } else {
1583 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1584 }
1585
1586 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1587
1588 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1589 pdata->software_irq_signal = 0;
1590 smp_wmb();
1591
1592 temp = smsc911x_reg_read(pdata, INT_EN);
1593 temp |= INT_EN_SW_INT_EN_;
1594 smsc911x_reg_write(pdata, INT_EN, temp);
1595
1596 timeout = 1000;
1597 while (timeout--) {
1598 if (pdata->software_irq_signal)
1599 break;
1600 msleep(1);
1601 }
1602
1603 if (!pdata->software_irq_signal) {
1604 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1605 dev->irq);
1606 return -ENODEV;
1607 }
1608 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1609 dev->irq);
1610
1611 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1612 (unsigned long)pdata->ioaddr, dev->irq);
1613
1614 /* Reset the last known duplex and carrier */
1615 pdata->last_duplex = -1;
1616 pdata->last_carrier = -1;
1617
1618 /* Bring the PHY up */
1619 phy_start(pdata->phy_dev);
1620
1621 temp = smsc911x_reg_read(pdata, HW_CFG);
1622 /* Preserve TX FIFO size and external PHY configuration */
1623 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1624 temp |= HW_CFG_SF_;
1625 smsc911x_reg_write(pdata, HW_CFG, temp);
1626
1627 temp = smsc911x_reg_read(pdata, FIFO_INT);
1628 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1629 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1630 smsc911x_reg_write(pdata, FIFO_INT, temp);
1631
1632 /* set RX Data offset to 2 bytes for alignment */
1633 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1634
1635 /* enable NAPI polling before enabling RX interrupts */
1636 napi_enable(&pdata->napi);
1637
1638 temp = smsc911x_reg_read(pdata, INT_EN);
1639 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1640 smsc911x_reg_write(pdata, INT_EN, temp);
1641
1642 spin_lock_irq(&pdata->mac_lock);
1643 temp = smsc911x_mac_read(pdata, MAC_CR);
1644 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1645 smsc911x_mac_write(pdata, MAC_CR, temp);
1646 spin_unlock_irq(&pdata->mac_lock);
1647
1648 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1649
1650 netif_start_queue(dev);
1651 return 0;
1652 }
1653
1654 /* Entry point for stopping the interface */
1655 static int smsc911x_stop(struct net_device *dev)
1656 {
1657 struct smsc911x_data *pdata = netdev_priv(dev);
1658 unsigned int temp;
1659
1660 /* Disable all device interrupts */
1661 temp = smsc911x_reg_read(pdata, INT_CFG);
1662 temp &= ~INT_CFG_IRQ_EN_;
1663 smsc911x_reg_write(pdata, INT_CFG, temp);
1664
1665 /* Stop Tx and Rx polling */
1666 netif_stop_queue(dev);
1667 napi_disable(&pdata->napi);
1668
1669 /* At this point all Rx and Tx activity is stopped */
1670 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1671 smsc911x_tx_update_txcounters(dev);
1672
1673 /* Bring the PHY down */
1674 if (pdata->phy_dev)
1675 phy_stop(pdata->phy_dev);
1676
1677 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1678 return 0;
1679 }
1680
1681 /* Entry point for transmitting a packet */
1682 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1683 {
1684 struct smsc911x_data *pdata = netdev_priv(dev);
1685 unsigned int freespace;
1686 unsigned int tx_cmd_a;
1687 unsigned int tx_cmd_b;
1688 unsigned int temp;
1689 u32 wrsz;
1690 ulong bufp;
1691
1692 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1693
1694 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1695 SMSC_WARN(pdata, tx_err,
1696 "Tx data fifo low, space available: %d", freespace);
1697
1698 /* Word alignment adjustment */
1699 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1700 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1701 tx_cmd_a |= (unsigned int)skb->len;
1702
1703 tx_cmd_b = ((unsigned int)skb->len) << 16;
1704 tx_cmd_b |= (unsigned int)skb->len;
1705
1706 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1707 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1708
1709 bufp = (ulong)skb->data & (~0x3);
1710 wrsz = (u32)skb->len + 3;
1711 wrsz += (u32)((ulong)skb->data & 0x3);
1712 wrsz >>= 2;
1713
1714 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1715 freespace -= (skb->len + 32);
1716 skb_tx_timestamp(skb);
1717 dev_consume_skb_any(skb);
1718
1719 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1720 smsc911x_tx_update_txcounters(dev);
1721
1722 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1723 netif_stop_queue(dev);
1724 temp = smsc911x_reg_read(pdata, FIFO_INT);
1725 temp &= 0x00FFFFFF;
1726 temp |= 0x32000000;
1727 smsc911x_reg_write(pdata, FIFO_INT, temp);
1728 }
1729
1730 return NETDEV_TX_OK;
1731 }
1732
1733 /* Entry point for getting status counters */
1734 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1735 {
1736 struct smsc911x_data *pdata = netdev_priv(dev);
1737 smsc911x_tx_update_txcounters(dev);
1738 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1739 return &dev->stats;
1740 }
1741
1742 /* Entry point for setting addressing modes */
1743 static void smsc911x_set_multicast_list(struct net_device *dev)
1744 {
1745 struct smsc911x_data *pdata = netdev_priv(dev);
1746 unsigned long flags;
1747
1748 if (dev->flags & IFF_PROMISC) {
1749 /* Enabling promiscuous mode */
1750 pdata->set_bits_mask = MAC_CR_PRMS_;
1751 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1752 pdata->hashhi = 0;
1753 pdata->hashlo = 0;
1754 } else if (dev->flags & IFF_ALLMULTI) {
1755 /* Enabling all multicast mode */
1756 pdata->set_bits_mask = MAC_CR_MCPAS_;
1757 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1758 pdata->hashhi = 0;
1759 pdata->hashlo = 0;
1760 } else if (!netdev_mc_empty(dev)) {
1761 /* Enabling specific multicast addresses */
1762 unsigned int hash_high = 0;
1763 unsigned int hash_low = 0;
1764 struct netdev_hw_addr *ha;
1765
1766 pdata->set_bits_mask = MAC_CR_HPFILT_;
1767 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1768
1769 netdev_for_each_mc_addr(ha, dev) {
1770 unsigned int bitnum = smsc911x_hash(ha->addr);
1771 unsigned int mask = 0x01 << (bitnum & 0x1F);
1772
1773 if (bitnum & 0x20)
1774 hash_high |= mask;
1775 else
1776 hash_low |= mask;
1777 }
1778
1779 pdata->hashhi = hash_high;
1780 pdata->hashlo = hash_low;
1781 } else {
1782 /* Enabling local MAC address only */
1783 pdata->set_bits_mask = 0;
1784 pdata->clear_bits_mask =
1785 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1786 pdata->hashhi = 0;
1787 pdata->hashlo = 0;
1788 }
1789
1790 spin_lock_irqsave(&pdata->mac_lock, flags);
1791
1792 if (pdata->generation <= 1) {
1793 /* Older hardware revision - cannot change these flags while
1794 * receiving data */
1795 if (!pdata->multicast_update_pending) {
1796 unsigned int temp;
1797 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1798 pdata->multicast_update_pending = 1;
1799
1800 /* Request the hardware to stop, then perform the
1801 * update when we get an RX_STOP interrupt */
1802 temp = smsc911x_mac_read(pdata, MAC_CR);
1803 temp &= ~(MAC_CR_RXEN_);
1804 smsc911x_mac_write(pdata, MAC_CR, temp);
1805 } else {
1806 /* There is another update pending, this should now
1807 * use the newer values */
1808 }
1809 } else {
1810 /* Newer hardware revision - can write immediately */
1811 smsc911x_rx_multicast_update(pdata);
1812 }
1813
1814 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1815 }
1816
1817 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1818 {
1819 struct net_device *dev = dev_id;
1820 struct smsc911x_data *pdata = netdev_priv(dev);
1821 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1822 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1823 int serviced = IRQ_NONE;
1824 u32 temp;
1825
1826 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1827 temp = smsc911x_reg_read(pdata, INT_EN);
1828 temp &= (~INT_EN_SW_INT_EN_);
1829 smsc911x_reg_write(pdata, INT_EN, temp);
1830 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1831 pdata->software_irq_signal = 1;
1832 smp_wmb();
1833 serviced = IRQ_HANDLED;
1834 }
1835
1836 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1837 /* Called when there is a multicast update scheduled and
1838 * it is now safe to complete the update */
1839 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1840 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1841 if (pdata->multicast_update_pending)
1842 smsc911x_rx_multicast_update_workaround(pdata);
1843 serviced = IRQ_HANDLED;
1844 }
1845
1846 if (intsts & inten & INT_STS_TDFA_) {
1847 temp = smsc911x_reg_read(pdata, FIFO_INT);
1848 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1849 smsc911x_reg_write(pdata, FIFO_INT, temp);
1850 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1851 netif_wake_queue(dev);
1852 serviced = IRQ_HANDLED;
1853 }
1854
1855 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1856 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1857 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1858 serviced = IRQ_HANDLED;
1859 }
1860
1861 if (likely(intsts & inten & INT_STS_RSFL_)) {
1862 if (likely(napi_schedule_prep(&pdata->napi))) {
1863 /* Disable Rx interrupts */
1864 temp = smsc911x_reg_read(pdata, INT_EN);
1865 temp &= (~INT_EN_RSFL_EN_);
1866 smsc911x_reg_write(pdata, INT_EN, temp);
1867 /* Schedule a NAPI poll */
1868 __napi_schedule(&pdata->napi);
1869 } else {
1870 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1871 }
1872 serviced = IRQ_HANDLED;
1873 }
1874
1875 return serviced;
1876 }
1877
1878 #ifdef CONFIG_NET_POLL_CONTROLLER
1879 static void smsc911x_poll_controller(struct net_device *dev)
1880 {
1881 disable_irq(dev->irq);
1882 smsc911x_irqhandler(0, dev);
1883 enable_irq(dev->irq);
1884 }
1885 #endif /* CONFIG_NET_POLL_CONTROLLER */
1886
1887 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1888 {
1889 struct smsc911x_data *pdata = netdev_priv(dev);
1890 struct sockaddr *addr = p;
1891
1892 /* On older hardware revisions we cannot change the mac address
1893 * registers while receiving data. Newer devices can safely change
1894 * this at any time. */
1895 if (pdata->generation <= 1 && netif_running(dev))
1896 return -EBUSY;
1897
1898 if (!is_valid_ether_addr(addr->sa_data))
1899 return -EADDRNOTAVAIL;
1900
1901 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1902
1903 spin_lock_irq(&pdata->mac_lock);
1904 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1905 spin_unlock_irq(&pdata->mac_lock);
1906
1907 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1908
1909 return 0;
1910 }
1911
1912 /* Standard ioctls for mii-tool */
1913 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1914 {
1915 struct smsc911x_data *pdata = netdev_priv(dev);
1916
1917 if (!netif_running(dev) || !pdata->phy_dev)
1918 return -EINVAL;
1919
1920 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1921 }
1922
1923 static int
1924 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1925 {
1926 struct smsc911x_data *pdata = netdev_priv(dev);
1927
1928 cmd->maxtxpkt = 1;
1929 cmd->maxrxpkt = 1;
1930 return phy_ethtool_gset(pdata->phy_dev, cmd);
1931 }
1932
1933 static int
1934 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1935 {
1936 struct smsc911x_data *pdata = netdev_priv(dev);
1937
1938 return phy_ethtool_sset(pdata->phy_dev, cmd);
1939 }
1940
1941 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1942 struct ethtool_drvinfo *info)
1943 {
1944 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1945 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1946 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1947 sizeof(info->bus_info));
1948 }
1949
1950 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1951 {
1952 struct smsc911x_data *pdata = netdev_priv(dev);
1953
1954 return phy_start_aneg(pdata->phy_dev);
1955 }
1956
1957 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1958 {
1959 struct smsc911x_data *pdata = netdev_priv(dev);
1960 return pdata->msg_enable;
1961 }
1962
1963 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1964 {
1965 struct smsc911x_data *pdata = netdev_priv(dev);
1966 pdata->msg_enable = level;
1967 }
1968
1969 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1970 {
1971 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1972 sizeof(u32);
1973 }
1974
1975 static void
1976 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1977 void *buf)
1978 {
1979 struct smsc911x_data *pdata = netdev_priv(dev);
1980 struct phy_device *phy_dev = pdata->phy_dev;
1981 unsigned long flags;
1982 unsigned int i;
1983 unsigned int j = 0;
1984 u32 *data = buf;
1985
1986 regs->version = pdata->idrev;
1987 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1988 data[j++] = smsc911x_reg_read(pdata, i);
1989
1990 for (i = MAC_CR; i <= WUCSR; i++) {
1991 spin_lock_irqsave(&pdata->mac_lock, flags);
1992 data[j++] = smsc911x_mac_read(pdata, i);
1993 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1994 }
1995
1996 for (i = 0; i <= 31; i++)
1997 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1998 }
1999
2000 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
2001 {
2002 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
2003 temp &= ~GPIO_CFG_EEPR_EN_;
2004 smsc911x_reg_write(pdata, GPIO_CFG, temp);
2005 msleep(1);
2006 }
2007
2008 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
2009 {
2010 int timeout = 100;
2011 u32 e2cmd;
2012
2013 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
2014 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
2015 SMSC_WARN(pdata, drv, "Busy at start");
2016 return -EBUSY;
2017 }
2018
2019 e2cmd = op | E2P_CMD_EPC_BUSY_;
2020 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
2021
2022 do {
2023 msleep(1);
2024 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
2025 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
2026
2027 if (!timeout) {
2028 SMSC_TRACE(pdata, drv, "TIMED OUT");
2029 return -EAGAIN;
2030 }
2031
2032 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
2033 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
2034 return -EINVAL;
2035 }
2036
2037 return 0;
2038 }
2039
2040 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
2041 u8 address, u8 *data)
2042 {
2043 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
2044 int ret;
2045
2046 SMSC_TRACE(pdata, drv, "address 0x%x", address);
2047 ret = smsc911x_eeprom_send_cmd(pdata, op);
2048
2049 if (!ret)
2050 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
2051
2052 return ret;
2053 }
2054
2055 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
2056 u8 address, u8 data)
2057 {
2058 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
2059 u32 temp;
2060 int ret;
2061
2062 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
2063 ret = smsc911x_eeprom_send_cmd(pdata, op);
2064
2065 if (!ret) {
2066 op = E2P_CMD_EPC_CMD_WRITE_ | address;
2067 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2068
2069 /* Workaround for hardware read-after-write restriction */
2070 temp = smsc911x_reg_read(pdata, BYTE_TEST);
2071
2072 ret = smsc911x_eeprom_send_cmd(pdata, op);
2073 }
2074
2075 return ret;
2076 }
2077
2078 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2079 {
2080 return SMSC911X_EEPROM_SIZE;
2081 }
2082
2083 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2084 struct ethtool_eeprom *eeprom, u8 *data)
2085 {
2086 struct smsc911x_data *pdata = netdev_priv(dev);
2087 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2088 int len;
2089 int i;
2090
2091 smsc911x_eeprom_enable_access(pdata);
2092
2093 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2094 for (i = 0; i < len; i++) {
2095 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2096 if (ret < 0) {
2097 eeprom->len = 0;
2098 return ret;
2099 }
2100 }
2101
2102 memcpy(data, &eeprom_data[eeprom->offset], len);
2103 eeprom->len = len;
2104 return 0;
2105 }
2106
2107 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2108 struct ethtool_eeprom *eeprom, u8 *data)
2109 {
2110 int ret;
2111 struct smsc911x_data *pdata = netdev_priv(dev);
2112
2113 smsc911x_eeprom_enable_access(pdata);
2114 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2115 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2116 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2117
2118 /* Single byte write, according to man page */
2119 eeprom->len = 1;
2120
2121 return ret;
2122 }
2123
2124 static const struct ethtool_ops smsc911x_ethtool_ops = {
2125 .get_settings = smsc911x_ethtool_getsettings,
2126 .set_settings = smsc911x_ethtool_setsettings,
2127 .get_link = ethtool_op_get_link,
2128 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2129 .nway_reset = smsc911x_ethtool_nwayreset,
2130 .get_msglevel = smsc911x_ethtool_getmsglevel,
2131 .set_msglevel = smsc911x_ethtool_setmsglevel,
2132 .get_regs_len = smsc911x_ethtool_getregslen,
2133 .get_regs = smsc911x_ethtool_getregs,
2134 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2135 .get_eeprom = smsc911x_ethtool_get_eeprom,
2136 .set_eeprom = smsc911x_ethtool_set_eeprom,
2137 .get_ts_info = ethtool_op_get_ts_info,
2138 };
2139
2140 static const struct net_device_ops smsc911x_netdev_ops = {
2141 .ndo_open = smsc911x_open,
2142 .ndo_stop = smsc911x_stop,
2143 .ndo_start_xmit = smsc911x_hard_start_xmit,
2144 .ndo_get_stats = smsc911x_get_stats,
2145 .ndo_set_rx_mode = smsc911x_set_multicast_list,
2146 .ndo_do_ioctl = smsc911x_do_ioctl,
2147 .ndo_change_mtu = eth_change_mtu,
2148 .ndo_validate_addr = eth_validate_addr,
2149 .ndo_set_mac_address = smsc911x_set_mac_address,
2150 #ifdef CONFIG_NET_POLL_CONTROLLER
2151 .ndo_poll_controller = smsc911x_poll_controller,
2152 #endif
2153 };
2154
2155 /* copies the current mac address from hardware to dev->dev_addr */
2156 static void smsc911x_read_mac_address(struct net_device *dev)
2157 {
2158 struct smsc911x_data *pdata = netdev_priv(dev);
2159 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2160 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2161
2162 dev->dev_addr[0] = (u8)(mac_low32);
2163 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2164 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2165 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2166 dev->dev_addr[4] = (u8)(mac_high16);
2167 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2168 }
2169
2170 /* Initializing private device structures, only called from probe */
2171 static int smsc911x_init(struct net_device *dev)
2172 {
2173 struct smsc911x_data *pdata = netdev_priv(dev);
2174 unsigned int byte_test, mask;
2175 unsigned int to = 100;
2176
2177 SMSC_TRACE(pdata, probe, "Driver Parameters:");
2178 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2179 (unsigned long)pdata->ioaddr);
2180 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2181 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2182
2183 spin_lock_init(&pdata->dev_lock);
2184 spin_lock_init(&pdata->mac_lock);
2185
2186 if (pdata->ioaddr == NULL) {
2187 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2188 return -ENODEV;
2189 }
2190
2191 /*
2192 * poll the READY bit in PMT_CTRL. Any other access to the device is
2193 * forbidden while this bit isn't set. Try for 100ms
2194 *
2195 * Note that this test is done before the WORD_SWAP register is
2196 * programmed. So in some configurations the READY bit is at 16 before
2197 * WORD_SWAP is written to. This issue is worked around by waiting
2198 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2199 *
2200 * SMSC has confirmed that checking bit 16 (marked as reserved in
2201 * the datasheet) is fine since these bits "will either never be set
2202 * or can only go high after READY does (so also indicate the device
2203 * is ready)".
2204 */
2205
2206 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2207 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2208 udelay(1000);
2209
2210 if (to == 0) {
2211 netdev_err(dev, "Device not READY in 100ms aborting\n");
2212 return -ENODEV;
2213 }
2214
2215 /* Check byte ordering */
2216 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2217 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2218 if (byte_test == 0x43218765) {
2219 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2220 "applying WORD_SWAP");
2221 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2222
2223 /* 1 dummy read of BYTE_TEST is needed after a write to
2224 * WORD_SWAP before its contents are valid */
2225 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2226
2227 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2228 }
2229
2230 if (byte_test != 0x87654321) {
2231 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2232 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2233 SMSC_WARN(pdata, probe,
2234 "top 16 bits equal to bottom 16 bits");
2235 SMSC_TRACE(pdata, probe,
2236 "This may mean the chip is set "
2237 "for 32 bit while the bus is reading 16 bit");
2238 }
2239 return -ENODEV;
2240 }
2241
2242 /* Default generation to zero (all workarounds apply) */
2243 pdata->generation = 0;
2244
2245 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2246 switch (pdata->idrev & 0xFFFF0000) {
2247 case 0x01180000:
2248 case 0x01170000:
2249 case 0x01160000:
2250 case 0x01150000:
2251 case 0x218A0000:
2252 /* LAN911[5678] family */
2253 pdata->generation = pdata->idrev & 0x0000FFFF;
2254 break;
2255
2256 case 0x118A0000:
2257 case 0x117A0000:
2258 case 0x116A0000:
2259 case 0x115A0000:
2260 /* LAN921[5678] family */
2261 pdata->generation = 3;
2262 break;
2263
2264 case 0x92100000:
2265 case 0x92110000:
2266 case 0x92200000:
2267 case 0x92210000:
2268 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2269 pdata->generation = 4;
2270 break;
2271
2272 default:
2273 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2274 pdata->idrev);
2275 return -ENODEV;
2276 }
2277
2278 SMSC_TRACE(pdata, probe,
2279 "LAN911x identified, idrev: 0x%08X, generation: %d",
2280 pdata->idrev, pdata->generation);
2281
2282 if (pdata->generation == 0)
2283 SMSC_WARN(pdata, probe,
2284 "This driver is not intended for this chip revision");
2285
2286 /* workaround for platforms without an eeprom, where the mac address
2287 * is stored elsewhere and set by the bootloader. This saves the
2288 * mac address before resetting the device */
2289 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2290 spin_lock_irq(&pdata->mac_lock);
2291 smsc911x_read_mac_address(dev);
2292 spin_unlock_irq(&pdata->mac_lock);
2293 }
2294
2295 /* Reset the LAN911x */
2296 if (smsc911x_soft_reset(pdata))
2297 return -ENODEV;
2298
2299 dev->flags |= IFF_MULTICAST;
2300 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2301 dev->netdev_ops = &smsc911x_netdev_ops;
2302 dev->ethtool_ops = &smsc911x_ethtool_ops;
2303
2304 return 0;
2305 }
2306
2307 static int smsc911x_drv_remove(struct platform_device *pdev)
2308 {
2309 struct net_device *dev;
2310 struct smsc911x_data *pdata;
2311 struct resource *res;
2312
2313 dev = platform_get_drvdata(pdev);
2314 BUG_ON(!dev);
2315 pdata = netdev_priv(dev);
2316 BUG_ON(!pdata);
2317 BUG_ON(!pdata->ioaddr);
2318 BUG_ON(!pdata->phy_dev);
2319
2320 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2321
2322 phy_disconnect(pdata->phy_dev);
2323 pdata->phy_dev = NULL;
2324 mdiobus_unregister(pdata->mii_bus);
2325 mdiobus_free(pdata->mii_bus);
2326
2327 unregister_netdev(dev);
2328 free_irq(dev->irq, dev);
2329 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2330 "smsc911x-memory");
2331 if (!res)
2332 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2333
2334 release_mem_region(res->start, resource_size(res));
2335
2336 iounmap(pdata->ioaddr);
2337
2338 (void)smsc911x_disable_resources(pdev);
2339 smsc911x_free_resources(pdev);
2340
2341 free_netdev(dev);
2342
2343 pm_runtime_put(&pdev->dev);
2344 pm_runtime_disable(&pdev->dev);
2345
2346 return 0;
2347 }
2348
2349 /* standard register acces */
2350 static const struct smsc911x_ops standard_smsc911x_ops = {
2351 .reg_read = __smsc911x_reg_read,
2352 .reg_write = __smsc911x_reg_write,
2353 .rx_readfifo = smsc911x_rx_readfifo,
2354 .tx_writefifo = smsc911x_tx_writefifo,
2355 };
2356
2357 /* shifted register access */
2358 static const struct smsc911x_ops shifted_smsc911x_ops = {
2359 .reg_read = __smsc911x_reg_read_shift,
2360 .reg_write = __smsc911x_reg_write_shift,
2361 .rx_readfifo = smsc911x_rx_readfifo_shift,
2362 .tx_writefifo = smsc911x_tx_writefifo_shift,
2363 };
2364
2365 #ifdef CONFIG_OF
2366 static int smsc911x_probe_config_dt(struct smsc911x_platform_config *config,
2367 struct device_node *np)
2368 {
2369 const char *mac;
2370 u32 width = 0;
2371
2372 if (!np)
2373 return -ENODEV;
2374
2375 config->phy_interface = of_get_phy_mode(np);
2376
2377 mac = of_get_mac_address(np);
2378 if (mac)
2379 memcpy(config->mac, mac, ETH_ALEN);
2380
2381 of_property_read_u32(np, "reg-shift", &config->shift);
2382
2383 of_property_read_u32(np, "reg-io-width", &width);
2384 if (width == 4)
2385 config->flags |= SMSC911X_USE_32BIT;
2386 else
2387 config->flags |= SMSC911X_USE_16BIT;
2388
2389 if (of_get_property(np, "smsc,irq-active-high", NULL))
2390 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2391
2392 if (of_get_property(np, "smsc,irq-push-pull", NULL))
2393 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2394
2395 if (of_get_property(np, "smsc,force-internal-phy", NULL))
2396 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2397
2398 if (of_get_property(np, "smsc,force-external-phy", NULL))
2399 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2400
2401 if (of_get_property(np, "smsc,save-mac-address", NULL))
2402 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2403
2404 return 0;
2405 }
2406 #else
2407 static inline int smsc911x_probe_config_dt(
2408 struct smsc911x_platform_config *config,
2409 struct device_node *np)
2410 {
2411 return -ENODEV;
2412 }
2413 #endif /* CONFIG_OF */
2414
2415 static int smsc911x_drv_probe(struct platform_device *pdev)
2416 {
2417 struct device_node *np = pdev->dev.of_node;
2418 struct net_device *dev;
2419 struct smsc911x_data *pdata;
2420 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev);
2421 struct resource *res;
2422 unsigned int intcfg = 0;
2423 int res_size, irq, irq_flags;
2424 int retval;
2425
2426 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2427 "smsc911x-memory");
2428 if (!res)
2429 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2430 if (!res) {
2431 pr_warn("Could not allocate resource\n");
2432 retval = -ENODEV;
2433 goto out_0;
2434 }
2435 res_size = resource_size(res);
2436
2437 irq = platform_get_irq(pdev, 0);
2438 if (irq <= 0) {
2439 pr_warn("Could not allocate irq resource\n");
2440 retval = -ENODEV;
2441 goto out_0;
2442 }
2443
2444 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2445 retval = -EBUSY;
2446 goto out_0;
2447 }
2448
2449 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2450 if (!dev) {
2451 retval = -ENOMEM;
2452 goto out_release_io_1;
2453 }
2454
2455 SET_NETDEV_DEV(dev, &pdev->dev);
2456
2457 pdata = netdev_priv(dev);
2458 dev->irq = irq;
2459 irq_flags = irq_get_trigger_type(irq);
2460 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2461
2462 pdata->dev = dev;
2463 pdata->msg_enable = ((1 << debug) - 1);
2464
2465 platform_set_drvdata(pdev, dev);
2466
2467 retval = smsc911x_request_resources(pdev);
2468 if (retval)
2469 goto out_request_resources_fail;
2470
2471 retval = smsc911x_enable_resources(pdev);
2472 if (retval)
2473 goto out_enable_resources_fail;
2474
2475 if (pdata->ioaddr == NULL) {
2476 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2477 retval = -ENOMEM;
2478 goto out_disable_resources;
2479 }
2480
2481 retval = smsc911x_probe_config_dt(&pdata->config, np);
2482 if (retval && config) {
2483 /* copy config parameters across to pdata */
2484 memcpy(&pdata->config, config, sizeof(pdata->config));
2485 retval = 0;
2486 }
2487
2488 if (retval) {
2489 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2490 goto out_disable_resources;
2491 }
2492
2493 /* assume standard, non-shifted, access to HW registers */
2494 pdata->ops = &standard_smsc911x_ops;
2495 /* apply the right access if shifting is needed */
2496 if (pdata->config.shift)
2497 pdata->ops = &shifted_smsc911x_ops;
2498
2499 pm_runtime_enable(&pdev->dev);
2500 pm_runtime_get_sync(&pdev->dev);
2501
2502 retval = smsc911x_init(dev);
2503 if (retval < 0)
2504 goto out_disable_resources;
2505
2506 /* configure irq polarity and type before connecting isr */
2507 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2508 intcfg |= INT_CFG_IRQ_POL_;
2509
2510 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2511 intcfg |= INT_CFG_IRQ_TYPE_;
2512
2513 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2514
2515 /* Ensure interrupts are globally disabled before connecting ISR */
2516 smsc911x_disable_irq_chip(dev);
2517
2518 retval = request_irq(dev->irq, smsc911x_irqhandler,
2519 irq_flags | IRQF_SHARED, dev->name, dev);
2520 if (retval) {
2521 SMSC_WARN(pdata, probe,
2522 "Unable to claim requested irq: %d", dev->irq);
2523 goto out_disable_resources;
2524 }
2525
2526 netif_carrier_off(dev);
2527
2528 retval = register_netdev(dev);
2529 if (retval) {
2530 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2531 goto out_free_irq;
2532 } else {
2533 SMSC_TRACE(pdata, probe,
2534 "Network interface: \"%s\"", dev->name);
2535 }
2536
2537 retval = smsc911x_mii_init(pdev, dev);
2538 if (retval) {
2539 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2540 goto out_unregister_netdev_5;
2541 }
2542
2543 spin_lock_irq(&pdata->mac_lock);
2544
2545 /* Check if mac address has been specified when bringing interface up */
2546 if (is_valid_ether_addr(dev->dev_addr)) {
2547 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2548 SMSC_TRACE(pdata, probe,
2549 "MAC Address is specified by configuration");
2550 } else if (is_valid_ether_addr(pdata->config.mac)) {
2551 memcpy(dev->dev_addr, pdata->config.mac, ETH_ALEN);
2552 SMSC_TRACE(pdata, probe,
2553 "MAC Address specified by platform data");
2554 } else {
2555 /* Try reading mac address from device. if EEPROM is present
2556 * it will already have been set */
2557 smsc_get_mac(dev);
2558
2559 if (is_valid_ether_addr(dev->dev_addr)) {
2560 /* eeprom values are valid so use them */
2561 SMSC_TRACE(pdata, probe,
2562 "Mac Address is read from LAN911x EEPROM");
2563 } else {
2564 /* eeprom values are invalid, generate random MAC */
2565 eth_hw_addr_random(dev);
2566 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2567 SMSC_TRACE(pdata, probe,
2568 "MAC Address is set to eth_random_addr");
2569 }
2570 }
2571
2572 spin_unlock_irq(&pdata->mac_lock);
2573
2574 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2575
2576 return 0;
2577
2578 out_unregister_netdev_5:
2579 unregister_netdev(dev);
2580 out_free_irq:
2581 free_irq(dev->irq, dev);
2582 out_disable_resources:
2583 pm_runtime_put(&pdev->dev);
2584 pm_runtime_disable(&pdev->dev);
2585 (void)smsc911x_disable_resources(pdev);
2586 out_enable_resources_fail:
2587 smsc911x_free_resources(pdev);
2588 out_request_resources_fail:
2589 iounmap(pdata->ioaddr);
2590 free_netdev(dev);
2591 out_release_io_1:
2592 release_mem_region(res->start, resource_size(res));
2593 out_0:
2594 return retval;
2595 }
2596
2597 #ifdef CONFIG_PM
2598 /* This implementation assumes the devices remains powered on its VDDVARIO
2599 * pins during suspend. */
2600
2601 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2602
2603 static int smsc911x_suspend(struct device *dev)
2604 {
2605 struct net_device *ndev = dev_get_drvdata(dev);
2606 struct smsc911x_data *pdata = netdev_priv(ndev);
2607
2608 /* enable wake on LAN, energy detection and the external PME
2609 * signal. */
2610 smsc911x_reg_write(pdata, PMT_CTRL,
2611 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2612 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2613
2614 return 0;
2615 }
2616
2617 static int smsc911x_resume(struct device *dev)
2618 {
2619 struct net_device *ndev = dev_get_drvdata(dev);
2620 struct smsc911x_data *pdata = netdev_priv(ndev);
2621 unsigned int to = 100;
2622
2623 /* Note 3.11 from the datasheet:
2624 * "When the LAN9220 is in a power saving state, a write of any
2625 * data to the BYTE_TEST register will wake-up the device."
2626 */
2627 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2628
2629 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2630 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2631 * if it failed. */
2632 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2633 udelay(1000);
2634
2635 return (to == 0) ? -EIO : 0;
2636 }
2637
2638 static const struct dev_pm_ops smsc911x_pm_ops = {
2639 .suspend = smsc911x_suspend,
2640 .resume = smsc911x_resume,
2641 };
2642
2643 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2644
2645 #else
2646 #define SMSC911X_PM_OPS NULL
2647 #endif
2648
2649 #ifdef CONFIG_OF
2650 static const struct of_device_id smsc911x_dt_ids[] = {
2651 { .compatible = "smsc,lan9115", },
2652 { /* sentinel */ }
2653 };
2654 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2655 #endif
2656
2657 static struct platform_driver smsc911x_driver = {
2658 .probe = smsc911x_drv_probe,
2659 .remove = smsc911x_drv_remove,
2660 .driver = {
2661 .name = SMSC_CHIPNAME,
2662 .pm = SMSC911X_PM_OPS,
2663 .of_match_table = of_match_ptr(smsc911x_dt_ids),
2664 },
2665 };
2666
2667 /* Entry point for loading the module */
2668 static int __init smsc911x_init_module(void)
2669 {
2670 SMSC_INITIALIZE();
2671 return platform_driver_register(&smsc911x_driver);
2672 }
2673
2674 /* entry point for unloading the module */
2675 static void __exit smsc911x_cleanup_module(void)
2676 {
2677 platform_driver_unregister(&smsc911x_driver);
2678 }
2679
2680 module_init(smsc911x_init_module);
2681 module_exit(smsc911x_cleanup_module);
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