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at86rf230: add support for sleep state
[mirror_ubuntu-bionic-kernel.git] / drivers / net / ieee802154 / at86rf230.c
1 /*
2 * AT86RF230/RF231 driver
3 *
4 * Copyright (C) 2009-2012 Siemens AG
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * Written by:
16 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
17 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
18 * Alexander Aring <aar@pengutronix.de>
19 */
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/hrtimer.h>
23 #include <linux/jiffies.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/gpio.h>
27 #include <linux/delay.h>
28 #include <linux/spi/spi.h>
29 #include <linux/spi/at86rf230.h>
30 #include <linux/regmap.h>
31 #include <linux/skbuff.h>
32 #include <linux/of_gpio.h>
33 #include <linux/ieee802154.h>
34
35 #include <net/mac802154.h>
36 #include <net/cfg802154.h>
37
38 #include "at86rf230.h"
39
40 struct at86rf230_local;
41 /* at86rf2xx chip depend data.
42 * All timings are in us.
43 */
44 struct at86rf2xx_chip_data {
45 u16 t_sleep_cycle;
46 u16 t_channel_switch;
47 u16 t_reset_to_off;
48 u16 t_off_to_aack;
49 u16 t_off_to_tx_on;
50 u16 t_off_to_sleep;
51 u16 t_sleep_to_off;
52 u16 t_frame;
53 u16 t_p_ack;
54 int rssi_base_val;
55
56 int (*set_channel)(struct at86rf230_local *, u8, u8);
57 int (*set_txpower)(struct at86rf230_local *, s32);
58 };
59
60 #define AT86RF2XX_MAX_BUF (127 + 3)
61 /* tx retries to access the TX_ON state
62 * if it's above then force change will be started.
63 *
64 * We assume the max_frame_retries (7) value of 802.15.4 here.
65 */
66 #define AT86RF2XX_MAX_TX_RETRIES 7
67 /* We use the recommended 5 minutes timeout to recalibrate */
68 #define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ)
69
70 struct at86rf230_state_change {
71 struct at86rf230_local *lp;
72 int irq;
73
74 struct hrtimer timer;
75 struct spi_message msg;
76 struct spi_transfer trx;
77 u8 buf[AT86RF2XX_MAX_BUF];
78
79 void (*complete)(void *context);
80 u8 from_state;
81 u8 to_state;
82
83 bool irq_enable;
84 };
85
86 struct at86rf230_local {
87 struct spi_device *spi;
88
89 struct ieee802154_hw *hw;
90 struct at86rf2xx_chip_data *data;
91 struct regmap *regmap;
92 int slp_tr;
93
94 struct completion state_complete;
95 struct at86rf230_state_change state;
96
97 struct at86rf230_state_change irq;
98
99 bool tx_aret;
100 unsigned long cal_timeout;
101 s8 max_frame_retries;
102 bool is_tx;
103 bool is_tx_from_off;
104 u8 tx_retry;
105 struct sk_buff *tx_skb;
106 struct at86rf230_state_change tx;
107 };
108
109 #define AT86RF2XX_NUMREGS 0x3F
110
111 static void
112 at86rf230_async_state_change(struct at86rf230_local *lp,
113 struct at86rf230_state_change *ctx,
114 const u8 state, void (*complete)(void *context),
115 const bool irq_enable);
116
117 static inline int
118 __at86rf230_write(struct at86rf230_local *lp,
119 unsigned int addr, unsigned int data)
120 {
121 return regmap_write(lp->regmap, addr, data);
122 }
123
124 static inline int
125 __at86rf230_read(struct at86rf230_local *lp,
126 unsigned int addr, unsigned int *data)
127 {
128 return regmap_read(lp->regmap, addr, data);
129 }
130
131 static inline int
132 at86rf230_read_subreg(struct at86rf230_local *lp,
133 unsigned int addr, unsigned int mask,
134 unsigned int shift, unsigned int *data)
135 {
136 int rc;
137
138 rc = __at86rf230_read(lp, addr, data);
139 if (!rc)
140 *data = (*data & mask) >> shift;
141
142 return rc;
143 }
144
145 static inline int
146 at86rf230_write_subreg(struct at86rf230_local *lp,
147 unsigned int addr, unsigned int mask,
148 unsigned int shift, unsigned int data)
149 {
150 return regmap_update_bits(lp->regmap, addr, mask, data << shift);
151 }
152
153 static inline void
154 at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
155 {
156 gpio_set_value(lp->slp_tr, 1);
157 udelay(1);
158 gpio_set_value(lp->slp_tr, 0);
159 }
160
161 static bool
162 at86rf230_reg_writeable(struct device *dev, unsigned int reg)
163 {
164 switch (reg) {
165 case RG_TRX_STATE:
166 case RG_TRX_CTRL_0:
167 case RG_TRX_CTRL_1:
168 case RG_PHY_TX_PWR:
169 case RG_PHY_ED_LEVEL:
170 case RG_PHY_CC_CCA:
171 case RG_CCA_THRES:
172 case RG_RX_CTRL:
173 case RG_SFD_VALUE:
174 case RG_TRX_CTRL_2:
175 case RG_ANT_DIV:
176 case RG_IRQ_MASK:
177 case RG_VREG_CTRL:
178 case RG_BATMON:
179 case RG_XOSC_CTRL:
180 case RG_RX_SYN:
181 case RG_XAH_CTRL_1:
182 case RG_FTN_CTRL:
183 case RG_PLL_CF:
184 case RG_PLL_DCU:
185 case RG_SHORT_ADDR_0:
186 case RG_SHORT_ADDR_1:
187 case RG_PAN_ID_0:
188 case RG_PAN_ID_1:
189 case RG_IEEE_ADDR_0:
190 case RG_IEEE_ADDR_1:
191 case RG_IEEE_ADDR_2:
192 case RG_IEEE_ADDR_3:
193 case RG_IEEE_ADDR_4:
194 case RG_IEEE_ADDR_5:
195 case RG_IEEE_ADDR_6:
196 case RG_IEEE_ADDR_7:
197 case RG_XAH_CTRL_0:
198 case RG_CSMA_SEED_0:
199 case RG_CSMA_SEED_1:
200 case RG_CSMA_BE:
201 return true;
202 default:
203 return false;
204 }
205 }
206
207 static bool
208 at86rf230_reg_readable(struct device *dev, unsigned int reg)
209 {
210 bool rc;
211
212 /* all writeable are also readable */
213 rc = at86rf230_reg_writeable(dev, reg);
214 if (rc)
215 return rc;
216
217 /* readonly regs */
218 switch (reg) {
219 case RG_TRX_STATUS:
220 case RG_PHY_RSSI:
221 case RG_IRQ_STATUS:
222 case RG_PART_NUM:
223 case RG_VERSION_NUM:
224 case RG_MAN_ID_1:
225 case RG_MAN_ID_0:
226 return true;
227 default:
228 return false;
229 }
230 }
231
232 static bool
233 at86rf230_reg_volatile(struct device *dev, unsigned int reg)
234 {
235 /* can be changed during runtime */
236 switch (reg) {
237 case RG_TRX_STATUS:
238 case RG_TRX_STATE:
239 case RG_PHY_RSSI:
240 case RG_PHY_ED_LEVEL:
241 case RG_IRQ_STATUS:
242 case RG_VREG_CTRL:
243 case RG_PLL_CF:
244 case RG_PLL_DCU:
245 return true;
246 default:
247 return false;
248 }
249 }
250
251 static bool
252 at86rf230_reg_precious(struct device *dev, unsigned int reg)
253 {
254 /* don't clear irq line on read */
255 switch (reg) {
256 case RG_IRQ_STATUS:
257 return true;
258 default:
259 return false;
260 }
261 }
262
263 static const struct regmap_config at86rf230_regmap_spi_config = {
264 .reg_bits = 8,
265 .val_bits = 8,
266 .write_flag_mask = CMD_REG | CMD_WRITE,
267 .read_flag_mask = CMD_REG,
268 .cache_type = REGCACHE_RBTREE,
269 .max_register = AT86RF2XX_NUMREGS,
270 .writeable_reg = at86rf230_reg_writeable,
271 .readable_reg = at86rf230_reg_readable,
272 .volatile_reg = at86rf230_reg_volatile,
273 .precious_reg = at86rf230_reg_precious,
274 };
275
276 static void
277 at86rf230_async_error_recover(void *context)
278 {
279 struct at86rf230_state_change *ctx = context;
280 struct at86rf230_local *lp = ctx->lp;
281
282 lp->is_tx = 0;
283 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL, false);
284 ieee802154_wake_queue(lp->hw);
285 }
286
287 static inline void
288 at86rf230_async_error(struct at86rf230_local *lp,
289 struct at86rf230_state_change *ctx, int rc)
290 {
291 dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
292
293 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
294 at86rf230_async_error_recover, false);
295 }
296
297 /* Generic function to get some register value in async mode */
298 static void
299 at86rf230_async_read_reg(struct at86rf230_local *lp, const u8 reg,
300 struct at86rf230_state_change *ctx,
301 void (*complete)(void *context),
302 const bool irq_enable)
303 {
304 int rc;
305
306 u8 *tx_buf = ctx->buf;
307
308 tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
309 ctx->msg.complete = complete;
310 ctx->irq_enable = irq_enable;
311 rc = spi_async(lp->spi, &ctx->msg);
312 if (rc) {
313 if (irq_enable)
314 enable_irq(ctx->irq);
315
316 at86rf230_async_error(lp, ctx, rc);
317 }
318 }
319
320 static inline u8 at86rf230_state_to_force(u8 state)
321 {
322 if (state == STATE_TX_ON)
323 return STATE_FORCE_TX_ON;
324 else
325 return STATE_FORCE_TRX_OFF;
326 }
327
328 static void
329 at86rf230_async_state_assert(void *context)
330 {
331 struct at86rf230_state_change *ctx = context;
332 struct at86rf230_local *lp = ctx->lp;
333 const u8 *buf = ctx->buf;
334 const u8 trx_state = buf[1] & TRX_STATE_MASK;
335
336 /* Assert state change */
337 if (trx_state != ctx->to_state) {
338 /* Special handling if transceiver state is in
339 * STATE_BUSY_RX_AACK and a SHR was detected.
340 */
341 if (trx_state == STATE_BUSY_RX_AACK) {
342 /* Undocumented race condition. If we send a state
343 * change to STATE_RX_AACK_ON the transceiver could
344 * change his state automatically to STATE_BUSY_RX_AACK
345 * if a SHR was detected. This is not an error, but we
346 * can't assert this.
347 */
348 if (ctx->to_state == STATE_RX_AACK_ON)
349 goto done;
350
351 /* If we change to STATE_TX_ON without forcing and
352 * transceiver state is STATE_BUSY_RX_AACK, we wait
353 * 'tFrame + tPAck' receiving time. In this time the
354 * PDU should be received. If the transceiver is still
355 * in STATE_BUSY_RX_AACK, we run a force state change
356 * to STATE_TX_ON. This is a timeout handling, if the
357 * transceiver stucks in STATE_BUSY_RX_AACK.
358 *
359 * Additional we do several retries to try to get into
360 * TX_ON state without forcing. If the retries are
361 * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
362 * will do a force change.
363 */
364 if (ctx->to_state == STATE_TX_ON ||
365 ctx->to_state == STATE_TRX_OFF) {
366 u8 state = ctx->to_state;
367
368 if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
369 state = at86rf230_state_to_force(state);
370 lp->tx_retry++;
371
372 at86rf230_async_state_change(lp, ctx, state,
373 ctx->complete,
374 ctx->irq_enable);
375 return;
376 }
377 }
378
379 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
380 ctx->from_state, ctx->to_state, trx_state);
381 }
382
383 done:
384 if (ctx->complete)
385 ctx->complete(context);
386 }
387
388 static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
389 {
390 struct at86rf230_state_change *ctx =
391 container_of(timer, struct at86rf230_state_change, timer);
392 struct at86rf230_local *lp = ctx->lp;
393
394 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
395 at86rf230_async_state_assert,
396 ctx->irq_enable);
397
398 return HRTIMER_NORESTART;
399 }
400
401 /* Do state change timing delay. */
402 static void
403 at86rf230_async_state_delay(void *context)
404 {
405 struct at86rf230_state_change *ctx = context;
406 struct at86rf230_local *lp = ctx->lp;
407 struct at86rf2xx_chip_data *c = lp->data;
408 bool force = false;
409 ktime_t tim;
410
411 /* The force state changes are will show as normal states in the
412 * state status subregister. We change the to_state to the
413 * corresponding one and remember if it was a force change, this
414 * differs if we do a state change from STATE_BUSY_RX_AACK.
415 */
416 switch (ctx->to_state) {
417 case STATE_FORCE_TX_ON:
418 ctx->to_state = STATE_TX_ON;
419 force = true;
420 break;
421 case STATE_FORCE_TRX_OFF:
422 ctx->to_state = STATE_TRX_OFF;
423 force = true;
424 break;
425 default:
426 break;
427 }
428
429 switch (ctx->from_state) {
430 case STATE_TRX_OFF:
431 switch (ctx->to_state) {
432 case STATE_RX_AACK_ON:
433 tim = ktime_set(0, c->t_off_to_aack * NSEC_PER_USEC);
434 /* state change from TRX_OFF to RX_AACK_ON to do a
435 * calibration, we need to reset the timeout for the
436 * next one.
437 */
438 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
439 goto change;
440 case STATE_TX_ARET_ON:
441 case STATE_TX_ON:
442 tim = ktime_set(0, c->t_off_to_tx_on * NSEC_PER_USEC);
443 /* state change from TRX_OFF to TX_ON or ARET_ON to do
444 * a calibration, we need to reset the timeout for the
445 * next one.
446 */
447 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
448 goto change;
449 default:
450 break;
451 }
452 break;
453 case STATE_BUSY_RX_AACK:
454 switch (ctx->to_state) {
455 case STATE_TRX_OFF:
456 case STATE_TX_ON:
457 /* Wait for worst case receiving time if we
458 * didn't make a force change from BUSY_RX_AACK
459 * to TX_ON or TRX_OFF.
460 */
461 if (!force) {
462 tim = ktime_set(0, (c->t_frame + c->t_p_ack) *
463 NSEC_PER_USEC);
464 goto change;
465 }
466 break;
467 default:
468 break;
469 }
470 break;
471 /* Default value, means RESET state */
472 case STATE_P_ON:
473 switch (ctx->to_state) {
474 case STATE_TRX_OFF:
475 tim = ktime_set(0, c->t_reset_to_off * NSEC_PER_USEC);
476 goto change;
477 default:
478 break;
479 }
480 break;
481 default:
482 break;
483 }
484
485 /* Default delay is 1us in the most cases */
486 tim = ktime_set(0, NSEC_PER_USEC);
487
488 change:
489 hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
490 }
491
492 static void
493 at86rf230_async_state_change_start(void *context)
494 {
495 struct at86rf230_state_change *ctx = context;
496 struct at86rf230_local *lp = ctx->lp;
497 u8 *buf = ctx->buf;
498 const u8 trx_state = buf[1] & TRX_STATE_MASK;
499 int rc;
500
501 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
502 if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
503 udelay(1);
504 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
505 at86rf230_async_state_change_start,
506 ctx->irq_enable);
507 return;
508 }
509
510 /* Check if we already are in the state which we change in */
511 if (trx_state == ctx->to_state) {
512 if (ctx->complete)
513 ctx->complete(context);
514 return;
515 }
516
517 /* Set current state to the context of state change */
518 ctx->from_state = trx_state;
519
520 /* Going into the next step for a state change which do a timing
521 * relevant delay.
522 */
523 buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
524 buf[1] = ctx->to_state;
525 ctx->msg.complete = at86rf230_async_state_delay;
526 rc = spi_async(lp->spi, &ctx->msg);
527 if (rc) {
528 if (ctx->irq_enable)
529 enable_irq(ctx->irq);
530
531 at86rf230_async_error(lp, ctx, rc);
532 }
533 }
534
535 static void
536 at86rf230_async_state_change(struct at86rf230_local *lp,
537 struct at86rf230_state_change *ctx,
538 const u8 state, void (*complete)(void *context),
539 const bool irq_enable)
540 {
541 /* Initialization for the state change context */
542 ctx->to_state = state;
543 ctx->complete = complete;
544 ctx->irq_enable = irq_enable;
545 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
546 at86rf230_async_state_change_start,
547 irq_enable);
548 }
549
550 static void
551 at86rf230_sync_state_change_complete(void *context)
552 {
553 struct at86rf230_state_change *ctx = context;
554 struct at86rf230_local *lp = ctx->lp;
555
556 complete(&lp->state_complete);
557 }
558
559 /* This function do a sync framework above the async state change.
560 * Some callbacks of the IEEE 802.15.4 driver interface need to be
561 * handled synchronously.
562 */
563 static int
564 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
565 {
566 unsigned long rc;
567
568 at86rf230_async_state_change(lp, &lp->state, state,
569 at86rf230_sync_state_change_complete,
570 false);
571
572 rc = wait_for_completion_timeout(&lp->state_complete,
573 msecs_to_jiffies(100));
574 if (!rc) {
575 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
576 return -ETIMEDOUT;
577 }
578
579 return 0;
580 }
581
582 static void
583 at86rf230_tx_complete(void *context)
584 {
585 struct at86rf230_state_change *ctx = context;
586 struct at86rf230_local *lp = ctx->lp;
587
588 enable_irq(ctx->irq);
589
590 ieee802154_xmit_complete(lp->hw, lp->tx_skb, !lp->tx_aret);
591 }
592
593 static void
594 at86rf230_tx_on(void *context)
595 {
596 struct at86rf230_state_change *ctx = context;
597 struct at86rf230_local *lp = ctx->lp;
598
599 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
600 at86rf230_tx_complete, true);
601 }
602
603 static void
604 at86rf230_tx_trac_check(void *context)
605 {
606 struct at86rf230_state_change *ctx = context;
607 struct at86rf230_local *lp = ctx->lp;
608 const u8 *buf = ctx->buf;
609 const u8 trac = (buf[1] & 0xe0) >> 5;
610
611 /* If trac status is different than zero we need to do a state change
612 * to STATE_FORCE_TRX_OFF then STATE_RX_AACK_ON to recover the
613 * transceiver.
614 */
615 if (trac)
616 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
617 at86rf230_tx_on, true);
618 else
619 at86rf230_tx_on(context);
620 }
621
622 static void
623 at86rf230_tx_trac_status(void *context)
624 {
625 struct at86rf230_state_change *ctx = context;
626 struct at86rf230_local *lp = ctx->lp;
627
628 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
629 at86rf230_tx_trac_check, true);
630 }
631
632 static void
633 at86rf230_rx_read_frame_complete(void *context)
634 {
635 struct at86rf230_state_change *ctx = context;
636 struct at86rf230_local *lp = ctx->lp;
637 u8 rx_local_buf[AT86RF2XX_MAX_BUF];
638 const u8 *buf = ctx->buf;
639 struct sk_buff *skb;
640 u8 len, lqi;
641
642 len = buf[1];
643 if (!ieee802154_is_valid_psdu_len(len)) {
644 dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
645 len = IEEE802154_MTU;
646 }
647 lqi = buf[2 + len];
648
649 memcpy(rx_local_buf, buf + 2, len);
650 ctx->trx.len = 2;
651 enable_irq(ctx->irq);
652
653 skb = dev_alloc_skb(IEEE802154_MTU);
654 if (!skb) {
655 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
656 return;
657 }
658
659 memcpy(skb_put(skb, len), rx_local_buf, len);
660 ieee802154_rx_irqsafe(lp->hw, skb, lqi);
661 }
662
663 static void
664 at86rf230_rx_read_frame(void *context)
665 {
666 struct at86rf230_state_change *ctx = context;
667 struct at86rf230_local *lp = ctx->lp;
668 u8 *buf = ctx->buf;
669 int rc;
670
671 buf[0] = CMD_FB;
672 ctx->trx.len = AT86RF2XX_MAX_BUF;
673 ctx->msg.complete = at86rf230_rx_read_frame_complete;
674 rc = spi_async(lp->spi, &ctx->msg);
675 if (rc) {
676 ctx->trx.len = 2;
677 enable_irq(ctx->irq);
678 at86rf230_async_error(lp, ctx, rc);
679 }
680 }
681
682 static void
683 at86rf230_rx_trac_check(void *context)
684 {
685 /* Possible check on trac status here. This could be useful to make
686 * some stats why receive is failed. Not used at the moment, but it's
687 * maybe timing relevant. Datasheet doesn't say anything about this.
688 * The programming guide say do it so.
689 */
690
691 at86rf230_rx_read_frame(context);
692 }
693
694 static void
695 at86rf230_irq_trx_end(struct at86rf230_local *lp)
696 {
697 if (lp->is_tx) {
698 lp->is_tx = 0;
699
700 if (lp->tx_aret)
701 at86rf230_async_state_change(lp, &lp->irq,
702 STATE_FORCE_TX_ON,
703 at86rf230_tx_trac_status,
704 true);
705 else
706 at86rf230_async_state_change(lp, &lp->irq,
707 STATE_RX_AACK_ON,
708 at86rf230_tx_complete,
709 true);
710 } else {
711 at86rf230_async_read_reg(lp, RG_TRX_STATE, &lp->irq,
712 at86rf230_rx_trac_check, true);
713 }
714 }
715
716 static void
717 at86rf230_irq_status(void *context)
718 {
719 struct at86rf230_state_change *ctx = context;
720 struct at86rf230_local *lp = ctx->lp;
721 const u8 *buf = ctx->buf;
722 const u8 irq = buf[1];
723
724 if (irq & IRQ_TRX_END) {
725 at86rf230_irq_trx_end(lp);
726 } else {
727 enable_irq(ctx->irq);
728 dev_err(&lp->spi->dev, "not supported irq %02x received\n",
729 irq);
730 }
731 }
732
733 static irqreturn_t at86rf230_isr(int irq, void *data)
734 {
735 struct at86rf230_local *lp = data;
736 struct at86rf230_state_change *ctx = &lp->irq;
737 u8 *buf = ctx->buf;
738 int rc;
739
740 disable_irq_nosync(irq);
741
742 buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
743 ctx->msg.complete = at86rf230_irq_status;
744 rc = spi_async(lp->spi, &ctx->msg);
745 if (rc) {
746 enable_irq(irq);
747 at86rf230_async_error(lp, ctx, rc);
748 return IRQ_NONE;
749 }
750
751 return IRQ_HANDLED;
752 }
753
754 static void
755 at86rf230_write_frame_complete(void *context)
756 {
757 struct at86rf230_state_change *ctx = context;
758 struct at86rf230_local *lp = ctx->lp;
759 u8 *buf = ctx->buf;
760 int rc;
761
762 ctx->trx.len = 2;
763
764 if (gpio_is_valid(lp->slp_tr)) {
765 at86rf230_slp_tr_rising_edge(lp);
766 } else {
767 buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
768 buf[1] = STATE_BUSY_TX;
769 ctx->msg.complete = NULL;
770 rc = spi_async(lp->spi, &ctx->msg);
771 if (rc)
772 at86rf230_async_error(lp, ctx, rc);
773 }
774 }
775
776 static void
777 at86rf230_write_frame(void *context)
778 {
779 struct at86rf230_state_change *ctx = context;
780 struct at86rf230_local *lp = ctx->lp;
781 struct sk_buff *skb = lp->tx_skb;
782 u8 *buf = ctx->buf;
783 int rc;
784
785 lp->is_tx = 1;
786
787 buf[0] = CMD_FB | CMD_WRITE;
788 buf[1] = skb->len + 2;
789 memcpy(buf + 2, skb->data, skb->len);
790 ctx->trx.len = skb->len + 2;
791 ctx->msg.complete = at86rf230_write_frame_complete;
792 rc = spi_async(lp->spi, &ctx->msg);
793 if (rc) {
794 ctx->trx.len = 2;
795 at86rf230_async_error(lp, ctx, rc);
796 }
797 }
798
799 static void
800 at86rf230_xmit_tx_on(void *context)
801 {
802 struct at86rf230_state_change *ctx = context;
803 struct at86rf230_local *lp = ctx->lp;
804
805 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
806 at86rf230_write_frame, false);
807 }
808
809 static void
810 at86rf230_xmit_start(void *context)
811 {
812 struct at86rf230_state_change *ctx = context;
813 struct at86rf230_local *lp = ctx->lp;
814
815 /* In ARET mode we need to go into STATE_TX_ARET_ON after we
816 * are in STATE_TX_ON. The pfad differs here, so we change
817 * the complete handler.
818 */
819 if (lp->tx_aret) {
820 if (lp->is_tx_from_off) {
821 lp->is_tx_from_off = false;
822 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
823 at86rf230_write_frame,
824 false);
825 } else {
826 at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
827 at86rf230_xmit_tx_on,
828 false);
829 }
830 } else {
831 at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
832 at86rf230_write_frame, false);
833 }
834 }
835
836 static int
837 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
838 {
839 struct at86rf230_local *lp = hw->priv;
840 struct at86rf230_state_change *ctx = &lp->tx;
841
842 lp->tx_skb = skb;
843 lp->tx_retry = 0;
844
845 /* After 5 minutes in PLL and the same frequency we run again the
846 * calibration loops which is recommended by at86rf2xx datasheets.
847 *
848 * The calibration is initiate by a state change from TRX_OFF
849 * to TX_ON, the lp->cal_timeout should be reinit by state_delay
850 * function then to start in the next 5 minutes.
851 */
852 if (time_is_before_jiffies(lp->cal_timeout)) {
853 lp->is_tx_from_off = true;
854 at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
855 at86rf230_xmit_start, false);
856 } else {
857 at86rf230_xmit_start(ctx);
858 }
859
860 return 0;
861 }
862
863 static int
864 at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
865 {
866 BUG_ON(!level);
867 *level = 0xbe;
868 return 0;
869 }
870
871 static int
872 at86rf230_start(struct ieee802154_hw *hw)
873 {
874 struct at86rf230_local *lp = hw->priv;
875
876 if (gpio_is_valid(lp->slp_tr)) {
877 gpio_set_value(lp->slp_tr, 0);
878 usleep_range(lp->data->t_sleep_to_off,
879 lp->data->t_sleep_to_off + 100);
880 }
881
882 enable_irq(lp->spi->irq);
883
884 return at86rf230_sync_state_change(hw->priv, STATE_RX_AACK_ON);
885 }
886
887 static void
888 at86rf230_stop(struct ieee802154_hw *hw)
889 {
890 struct at86rf230_local *lp = hw->priv;
891
892 at86rf230_sync_state_change(hw->priv, STATE_FORCE_TRX_OFF);
893
894 disable_irq(lp->spi->irq);
895
896 if (gpio_is_valid(lp->slp_tr)) {
897 gpio_set_value(lp->slp_tr, 1);
898 usleep_range(lp->data->t_off_to_sleep,
899 lp->data->t_off_to_sleep + 10);
900 }
901 }
902
903 static int
904 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
905 {
906 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
907 }
908
909 #define AT86RF2XX_MAX_ED_LEVELS 0xF
910 static const s32 at86rf23x_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
911 -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
912 -7100, -6900, -6700, -6500, -6300, -6100,
913 };
914
915 static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
916 -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
917 -8000, -7800, -7600, -7400, -7200, -7000,
918 };
919
920 static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
921 -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
922 -7800, -7600, -7400, -7200, -7000, -6800,
923 };
924
925 static inline int
926 at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
927 {
928 unsigned int cca_ed_thres;
929 int rc;
930
931 rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
932 if (rc < 0)
933 return rc;
934
935 switch (rssi_base_val) {
936 case -98:
937 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
938 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
939 lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
940 break;
941 case -100:
942 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
943 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
944 lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
945 break;
946 default:
947 WARN_ON(1);
948 }
949
950 return 0;
951 }
952
953 static int
954 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
955 {
956 int rc;
957
958 if (channel == 0)
959 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
960 else
961 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
962 if (rc < 0)
963 return rc;
964
965 if (page == 0) {
966 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
967 lp->data->rssi_base_val = -100;
968 } else {
969 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
970 lp->data->rssi_base_val = -98;
971 }
972 if (rc < 0)
973 return rc;
974
975 rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
976 if (rc < 0)
977 return rc;
978
979 /* This sets the symbol_duration according frequency on the 212.
980 * TODO move this handling while set channel and page in cfg802154.
981 * We can do that, this timings are according 802.15.4 standard.
982 * If we do that in cfg802154, this is a more generic calculation.
983 *
984 * This should also protected from ifs_timer. Means cancel timer and
985 * init with a new value. For now, this is okay.
986 */
987 if (channel == 0) {
988 if (page == 0) {
989 /* SUB:0 and BPSK:0 -> BPSK-20 */
990 lp->hw->phy->symbol_duration = 50;
991 } else {
992 /* SUB:1 and BPSK:0 -> BPSK-40 */
993 lp->hw->phy->symbol_duration = 25;
994 }
995 } else {
996 if (page == 0)
997 /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
998 lp->hw->phy->symbol_duration = 40;
999 else
1000 /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1001 lp->hw->phy->symbol_duration = 16;
1002 }
1003
1004 lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
1005 lp->hw->phy->symbol_duration;
1006 lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
1007 lp->hw->phy->symbol_duration;
1008
1009 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1010 }
1011
1012 static int
1013 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1014 {
1015 struct at86rf230_local *lp = hw->priv;
1016 int rc;
1017
1018 rc = lp->data->set_channel(lp, page, channel);
1019 /* Wait for PLL */
1020 usleep_range(lp->data->t_channel_switch,
1021 lp->data->t_channel_switch + 10);
1022
1023 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
1024 return rc;
1025 }
1026
1027 static int
1028 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1029 struct ieee802154_hw_addr_filt *filt,
1030 unsigned long changed)
1031 {
1032 struct at86rf230_local *lp = hw->priv;
1033
1034 if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1035 u16 addr = le16_to_cpu(filt->short_addr);
1036
1037 dev_vdbg(&lp->spi->dev,
1038 "at86rf230_set_hw_addr_filt called for saddr\n");
1039 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1040 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1041 }
1042
1043 if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1044 u16 pan = le16_to_cpu(filt->pan_id);
1045
1046 dev_vdbg(&lp->spi->dev,
1047 "at86rf230_set_hw_addr_filt called for pan id\n");
1048 __at86rf230_write(lp, RG_PAN_ID_0, pan);
1049 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1050 }
1051
1052 if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1053 u8 i, addr[8];
1054
1055 memcpy(addr, &filt->ieee_addr, 8);
1056 dev_vdbg(&lp->spi->dev,
1057 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
1058 for (i = 0; i < 8; i++)
1059 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1060 }
1061
1062 if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1063 dev_vdbg(&lp->spi->dev,
1064 "at86rf230_set_hw_addr_filt called for panc change\n");
1065 if (filt->pan_coord)
1066 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1067 else
1068 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1069 }
1070
1071 return 0;
1072 }
1073
1074 #define AT86RF23X_MAX_TX_POWERS 0xF
1075 static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1076 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
1077 -800, -1200, -1700,
1078 };
1079
1080 static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1081 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
1082 -900, -1200, -1700,
1083 };
1084
1085 #define AT86RF212_MAX_TX_POWERS 0x1F
1086 static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
1087 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
1088 -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
1089 -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
1090 };
1091
1092 static int
1093 at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
1094 {
1095 u32 i;
1096
1097 for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1098 if (lp->hw->phy->supported.tx_powers[i] == mbm)
1099 return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
1100 }
1101
1102 return -EINVAL;
1103 }
1104
1105 static int
1106 at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
1107 {
1108 u32 i;
1109
1110 for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1111 if (lp->hw->phy->supported.tx_powers[i] == mbm)
1112 return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
1113 }
1114
1115 return -EINVAL;
1116 }
1117
1118 static int
1119 at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
1120 {
1121 struct at86rf230_local *lp = hw->priv;
1122
1123 return lp->data->set_txpower(lp, mbm);
1124 }
1125
1126 static int
1127 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1128 {
1129 struct at86rf230_local *lp = hw->priv;
1130
1131 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1132 }
1133
1134 static int
1135 at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1136 const struct wpan_phy_cca *cca)
1137 {
1138 struct at86rf230_local *lp = hw->priv;
1139 u8 val;
1140
1141 /* mapping 802.15.4 to driver spec */
1142 switch (cca->mode) {
1143 case NL802154_CCA_ENERGY:
1144 val = 1;
1145 break;
1146 case NL802154_CCA_CARRIER:
1147 val = 2;
1148 break;
1149 case NL802154_CCA_ENERGY_CARRIER:
1150 switch (cca->opt) {
1151 case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1152 val = 3;
1153 break;
1154 case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1155 val = 0;
1156 break;
1157 default:
1158 return -EINVAL;
1159 }
1160 break;
1161 default:
1162 return -EINVAL;
1163 }
1164
1165 return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1166 }
1167
1168
1169 static int
1170 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
1171 {
1172 struct at86rf230_local *lp = hw->priv;
1173 u32 i;
1174
1175 for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
1176 if (hw->phy->supported.cca_ed_levels[i] == mbm)
1177 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
1178 }
1179
1180 return -EINVAL;
1181 }
1182
1183 static int
1184 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1185 u8 retries)
1186 {
1187 struct at86rf230_local *lp = hw->priv;
1188 int rc;
1189
1190 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1191 if (rc)
1192 return rc;
1193
1194 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1195 if (rc)
1196 return rc;
1197
1198 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1199 }
1200
1201 static int
1202 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1203 {
1204 struct at86rf230_local *lp = hw->priv;
1205 int rc = 0;
1206
1207 lp->tx_aret = retries >= 0;
1208 lp->max_frame_retries = retries;
1209
1210 if (retries >= 0)
1211 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1212
1213 return rc;
1214 }
1215
1216 static int
1217 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1218 {
1219 struct at86rf230_local *lp = hw->priv;
1220 int rc;
1221
1222 if (on) {
1223 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1224 if (rc < 0)
1225 return rc;
1226
1227 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1228 if (rc < 0)
1229 return rc;
1230 } else {
1231 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1232 if (rc < 0)
1233 return rc;
1234
1235 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1236 if (rc < 0)
1237 return rc;
1238 }
1239
1240 return 0;
1241 }
1242
1243 static const struct ieee802154_ops at86rf230_ops = {
1244 .owner = THIS_MODULE,
1245 .xmit_async = at86rf230_xmit,
1246 .ed = at86rf230_ed,
1247 .set_channel = at86rf230_channel,
1248 .start = at86rf230_start,
1249 .stop = at86rf230_stop,
1250 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1251 .set_txpower = at86rf230_set_txpower,
1252 .set_lbt = at86rf230_set_lbt,
1253 .set_cca_mode = at86rf230_set_cca_mode,
1254 .set_cca_ed_level = at86rf230_set_cca_ed_level,
1255 .set_csma_params = at86rf230_set_csma_params,
1256 .set_frame_retries = at86rf230_set_frame_retries,
1257 .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1258 };
1259
1260 static struct at86rf2xx_chip_data at86rf233_data = {
1261 .t_sleep_cycle = 330,
1262 .t_channel_switch = 11,
1263 .t_reset_to_off = 26,
1264 .t_off_to_aack = 80,
1265 .t_off_to_tx_on = 80,
1266 .t_off_to_sleep = 35,
1267 .t_sleep_to_off = 210,
1268 .t_frame = 4096,
1269 .t_p_ack = 545,
1270 .rssi_base_val = -91,
1271 .set_channel = at86rf23x_set_channel,
1272 .set_txpower = at86rf23x_set_txpower,
1273 };
1274
1275 static struct at86rf2xx_chip_data at86rf231_data = {
1276 .t_sleep_cycle = 330,
1277 .t_channel_switch = 24,
1278 .t_reset_to_off = 37,
1279 .t_off_to_aack = 110,
1280 .t_off_to_tx_on = 110,
1281 .t_off_to_sleep = 35,
1282 .t_sleep_to_off = 380,
1283 .t_frame = 4096,
1284 .t_p_ack = 545,
1285 .rssi_base_val = -91,
1286 .set_channel = at86rf23x_set_channel,
1287 .set_txpower = at86rf23x_set_txpower,
1288 };
1289
1290 static struct at86rf2xx_chip_data at86rf212_data = {
1291 .t_sleep_cycle = 330,
1292 .t_channel_switch = 11,
1293 .t_reset_to_off = 26,
1294 .t_off_to_aack = 200,
1295 .t_off_to_tx_on = 200,
1296 .t_off_to_sleep = 35,
1297 .t_sleep_to_off = 380,
1298 .t_frame = 4096,
1299 .t_p_ack = 545,
1300 .rssi_base_val = -100,
1301 .set_channel = at86rf212_set_channel,
1302 .set_txpower = at86rf212_set_txpower,
1303 };
1304
1305 static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
1306 {
1307 int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1308 unsigned int dvdd;
1309 u8 csma_seed[2];
1310
1311 rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1312 if (rc)
1313 return rc;
1314
1315 irq_type = irq_get_trigger_type(lp->spi->irq);
1316 if (irq_type == IRQ_TYPE_EDGE_RISING ||
1317 irq_type == IRQ_TYPE_EDGE_FALLING)
1318 dev_warn(&lp->spi->dev,
1319 "Using edge triggered irq's are not recommended!\n");
1320 if (irq_type == IRQ_TYPE_EDGE_FALLING ||
1321 irq_type == IRQ_TYPE_LEVEL_LOW)
1322 irq_pol = IRQ_ACTIVE_LOW;
1323
1324 rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1325 if (rc)
1326 return rc;
1327
1328 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1329 if (rc)
1330 return rc;
1331
1332 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1333 if (rc)
1334 return rc;
1335
1336 /* reset values differs in at86rf231 and at86rf233 */
1337 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
1338 if (rc)
1339 return rc;
1340
1341 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1342 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1343 if (rc)
1344 return rc;
1345 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1346 if (rc)
1347 return rc;
1348
1349 /* CLKM changes are applied immediately */
1350 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1351 if (rc)
1352 return rc;
1353
1354 /* Turn CLKM Off */
1355 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1356 if (rc)
1357 return rc;
1358 /* Wait the next SLEEP cycle */
1359 usleep_range(lp->data->t_sleep_cycle,
1360 lp->data->t_sleep_cycle + 100);
1361
1362 /* xtal_trim value is calculated by:
1363 * CL = 0.5 * (CX + CTRIM + CPAR)
1364 *
1365 * whereas:
1366 * CL = capacitor of used crystal
1367 * CX = connected capacitors at xtal pins
1368 * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1369 * but this is different on each board setup. You need to fine
1370 * tuning this value via CTRIM.
1371 * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1372 * 0 pF upto 4.5 pF.
1373 *
1374 * Examples:
1375 * atben transceiver:
1376 *
1377 * CL = 8 pF
1378 * CX = 12 pF
1379 * CPAR = 3 pF (We assume the magic constant from datasheet)
1380 * CTRIM = 0.9 pF
1381 *
1382 * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1383 *
1384 * xtal_trim = 0x3
1385 *
1386 * openlabs transceiver:
1387 *
1388 * CL = 16 pF
1389 * CX = 22 pF
1390 * CPAR = 3 pF (We assume the magic constant from datasheet)
1391 * CTRIM = 4.5 pF
1392 *
1393 * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1394 *
1395 * xtal_trim = 0xf
1396 */
1397 rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
1398 if (rc)
1399 return rc;
1400
1401 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1402 if (rc)
1403 return rc;
1404 if (!dvdd) {
1405 dev_err(&lp->spi->dev, "DVDD error\n");
1406 return -EINVAL;
1407 }
1408
1409 /* Force setting slotted operation bit to 0. Sometimes the atben
1410 * sets this bit and I don't know why. We set this always force
1411 * to zero while probing.
1412 */
1413 return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1414 }
1415
1416 static int
1417 at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
1418 u8 *xtal_trim)
1419 {
1420 struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1421 int ret;
1422
1423 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
1424 if (!pdata)
1425 return -ENOENT;
1426
1427 *rstn = pdata->rstn;
1428 *slp_tr = pdata->slp_tr;
1429 *xtal_trim = pdata->xtal_trim;
1430 return 0;
1431 }
1432
1433 *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1434 *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1435 ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
1436 if (ret < 0 && ret != -EINVAL)
1437 return ret;
1438
1439 return 0;
1440 }
1441
1442 static int
1443 at86rf230_detect_device(struct at86rf230_local *lp)
1444 {
1445 unsigned int part, version, val;
1446 u16 man_id = 0;
1447 const char *chip;
1448 int rc;
1449
1450 rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1451 if (rc)
1452 return rc;
1453 man_id |= val;
1454
1455 rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1456 if (rc)
1457 return rc;
1458 man_id |= (val << 8);
1459
1460 rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1461 if (rc)
1462 return rc;
1463
1464 rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1465 if (rc)
1466 return rc;
1467
1468 if (man_id != 0x001f) {
1469 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1470 man_id >> 8, man_id & 0xFF);
1471 return -EINVAL;
1472 }
1473
1474 lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
1475 IEEE802154_HW_CSMA_PARAMS |
1476 IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
1477 IEEE802154_HW_PROMISCUOUS;
1478
1479 lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
1480 WPAN_PHY_FLAG_CCA_ED_LEVEL |
1481 WPAN_PHY_FLAG_CCA_MODE;
1482
1483 lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
1484 BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
1485 lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
1486 BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
1487
1488 lp->hw->phy->supported.cca_ed_levels = at86rf23x_ed_levels;
1489 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf23x_ed_levels);
1490
1491 lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1492
1493 switch (part) {
1494 case 2:
1495 chip = "at86rf230";
1496 rc = -ENOTSUPP;
1497 goto not_supp;
1498 case 3:
1499 chip = "at86rf231";
1500 lp->data = &at86rf231_data;
1501 lp->hw->phy->supported.channels[0] = 0x7FFF800;
1502 lp->hw->phy->current_channel = 11;
1503 lp->hw->phy->symbol_duration = 16;
1504 lp->hw->phy->supported.tx_powers = at86rf231_powers;
1505 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
1506 break;
1507 case 7:
1508 chip = "at86rf212";
1509 lp->data = &at86rf212_data;
1510 lp->hw->flags |= IEEE802154_HW_LBT;
1511 lp->hw->phy->supported.channels[0] = 0x00007FF;
1512 lp->hw->phy->supported.channels[2] = 0x00007FF;
1513 lp->hw->phy->current_channel = 5;
1514 lp->hw->phy->symbol_duration = 25;
1515 lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
1516 lp->hw->phy->supported.tx_powers = at86rf212_powers;
1517 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
1518 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1519 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1520 break;
1521 case 11:
1522 chip = "at86rf233";
1523 lp->data = &at86rf233_data;
1524 lp->hw->phy->supported.channels[0] = 0x7FFF800;
1525 lp->hw->phy->current_channel = 13;
1526 lp->hw->phy->symbol_duration = 16;
1527 lp->hw->phy->supported.tx_powers = at86rf233_powers;
1528 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
1529 break;
1530 default:
1531 chip = "unknown";
1532 rc = -ENOTSUPP;
1533 goto not_supp;
1534 }
1535
1536 lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
1537 lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
1538
1539 not_supp:
1540 dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1541
1542 return rc;
1543 }
1544
1545 static void
1546 at86rf230_setup_spi_messages(struct at86rf230_local *lp)
1547 {
1548 lp->state.lp = lp;
1549 lp->state.irq = lp->spi->irq;
1550 spi_message_init(&lp->state.msg);
1551 lp->state.msg.context = &lp->state;
1552 lp->state.trx.len = 2;
1553 lp->state.trx.tx_buf = lp->state.buf;
1554 lp->state.trx.rx_buf = lp->state.buf;
1555 spi_message_add_tail(&lp->state.trx, &lp->state.msg);
1556 hrtimer_init(&lp->state.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1557 lp->state.timer.function = at86rf230_async_state_timer;
1558
1559 lp->irq.lp = lp;
1560 lp->irq.irq = lp->spi->irq;
1561 spi_message_init(&lp->irq.msg);
1562 lp->irq.msg.context = &lp->irq;
1563 lp->irq.trx.len = 2;
1564 lp->irq.trx.tx_buf = lp->irq.buf;
1565 lp->irq.trx.rx_buf = lp->irq.buf;
1566 spi_message_add_tail(&lp->irq.trx, &lp->irq.msg);
1567 hrtimer_init(&lp->irq.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1568 lp->irq.timer.function = at86rf230_async_state_timer;
1569
1570 lp->tx.lp = lp;
1571 lp->tx.irq = lp->spi->irq;
1572 spi_message_init(&lp->tx.msg);
1573 lp->tx.msg.context = &lp->tx;
1574 lp->tx.trx.len = 2;
1575 lp->tx.trx.tx_buf = lp->tx.buf;
1576 lp->tx.trx.rx_buf = lp->tx.buf;
1577 spi_message_add_tail(&lp->tx.trx, &lp->tx.msg);
1578 hrtimer_init(&lp->tx.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1579 lp->tx.timer.function = at86rf230_async_state_timer;
1580 }
1581
1582 static int at86rf230_probe(struct spi_device *spi)
1583 {
1584 struct ieee802154_hw *hw;
1585 struct at86rf230_local *lp;
1586 unsigned int status;
1587 int rc, irq_type, rstn, slp_tr;
1588 u8 xtal_trim = 0;
1589
1590 if (!spi->irq) {
1591 dev_err(&spi->dev, "no IRQ specified\n");
1592 return -EINVAL;
1593 }
1594
1595 rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
1596 if (rc < 0) {
1597 dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
1598 return rc;
1599 }
1600
1601 if (gpio_is_valid(rstn)) {
1602 rc = devm_gpio_request_one(&spi->dev, rstn,
1603 GPIOF_OUT_INIT_HIGH, "rstn");
1604 if (rc)
1605 return rc;
1606 }
1607
1608 if (gpio_is_valid(slp_tr)) {
1609 rc = devm_gpio_request_one(&spi->dev, slp_tr,
1610 GPIOF_OUT_INIT_LOW, "slp_tr");
1611 if (rc)
1612 return rc;
1613 }
1614
1615 /* Reset */
1616 if (gpio_is_valid(rstn)) {
1617 udelay(1);
1618 gpio_set_value(rstn, 0);
1619 udelay(1);
1620 gpio_set_value(rstn, 1);
1621 usleep_range(120, 240);
1622 }
1623
1624 hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1625 if (!hw)
1626 return -ENOMEM;
1627
1628 lp = hw->priv;
1629 lp->hw = hw;
1630 lp->spi = spi;
1631 lp->slp_tr = slp_tr;
1632 hw->parent = &spi->dev;
1633 ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1634
1635 lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1636 if (IS_ERR(lp->regmap)) {
1637 rc = PTR_ERR(lp->regmap);
1638 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1639 rc);
1640 goto free_dev;
1641 }
1642
1643 at86rf230_setup_spi_messages(lp);
1644
1645 rc = at86rf230_detect_device(lp);
1646 if (rc < 0)
1647 goto free_dev;
1648
1649 init_completion(&lp->state_complete);
1650
1651 spi_set_drvdata(spi, lp);
1652
1653 rc = at86rf230_hw_init(lp, xtal_trim);
1654 if (rc)
1655 goto free_dev;
1656
1657 /* Read irq status register to reset irq line */
1658 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1659 if (rc)
1660 goto free_dev;
1661
1662 irq_type = irq_get_trigger_type(spi->irq);
1663 if (!irq_type)
1664 irq_type = IRQF_TRIGGER_HIGH;
1665
1666 rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1667 IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1668 if (rc)
1669 goto free_dev;
1670
1671 /* disable_irq by default and wait for starting hardware */
1672 disable_irq(spi->irq);
1673
1674 /* going into sleep by default */
1675 if (gpio_is_valid(slp_tr)) {
1676 gpio_set_value(slp_tr, 1);
1677 usleep_range(lp->data->t_off_to_sleep,
1678 lp->data->t_off_to_sleep + 10);
1679 }
1680
1681 rc = ieee802154_register_hw(lp->hw);
1682 if (rc)
1683 goto free_dev;
1684
1685 return rc;
1686
1687 free_dev:
1688 ieee802154_free_hw(lp->hw);
1689
1690 return rc;
1691 }
1692
1693 static int at86rf230_remove(struct spi_device *spi)
1694 {
1695 struct at86rf230_local *lp = spi_get_drvdata(spi);
1696
1697 /* mask all at86rf230 irq's */
1698 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1699 ieee802154_unregister_hw(lp->hw);
1700 ieee802154_free_hw(lp->hw);
1701 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1702
1703 return 0;
1704 }
1705
1706 static const struct of_device_id at86rf230_of_match[] = {
1707 { .compatible = "atmel,at86rf230", },
1708 { .compatible = "atmel,at86rf231", },
1709 { .compatible = "atmel,at86rf233", },
1710 { .compatible = "atmel,at86rf212", },
1711 { },
1712 };
1713 MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1714
1715 static const struct spi_device_id at86rf230_device_id[] = {
1716 { .name = "at86rf230", },
1717 { .name = "at86rf231", },
1718 { .name = "at86rf233", },
1719 { .name = "at86rf212", },
1720 { },
1721 };
1722 MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1723
1724 static struct spi_driver at86rf230_driver = {
1725 .id_table = at86rf230_device_id,
1726 .driver = {
1727 .of_match_table = of_match_ptr(at86rf230_of_match),
1728 .name = "at86rf230",
1729 .owner = THIS_MODULE,
1730 },
1731 .probe = at86rf230_probe,
1732 .remove = at86rf230_remove,
1733 };
1734
1735 module_spi_driver(at86rf230_driver);
1736
1737 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1738 MODULE_LICENSE("GPL v2");
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