1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/pci-aspm.h>
42 #include <linux/delay.h>
43 #include <linux/interrupt.h>
44 #include <linux/if_ether.h>
45 #include <linux/aer.h>
47 #include <linux/dca.h>
51 #define DRV_VERSION "1.2.45-k2"
52 char igb_driver_name
[] = "igb";
53 char igb_driver_version
[] = DRV_VERSION
;
54 static const char igb_driver_string
[] =
55 "Intel(R) Gigabit Ethernet Network Driver";
56 static const char igb_copyright
[] = "Copyright (c) 2008 Intel Corporation.";
58 static const struct e1000_info
*igb_info_tbl
[] = {
59 [board_82575
] = &e1000_82575_info
,
62 static struct pci_device_id igb_pci_tbl
[] = {
63 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
64 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
65 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
66 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
67 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
68 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
69 /* required last entry */
73 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
75 void igb_reset(struct igb_adapter
*);
76 static int igb_setup_all_tx_resources(struct igb_adapter
*);
77 static int igb_setup_all_rx_resources(struct igb_adapter
*);
78 static void igb_free_all_tx_resources(struct igb_adapter
*);
79 static void igb_free_all_rx_resources(struct igb_adapter
*);
80 void igb_update_stats(struct igb_adapter
*);
81 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
82 static void __devexit
igb_remove(struct pci_dev
*pdev
);
83 static int igb_sw_init(struct igb_adapter
*);
84 static int igb_open(struct net_device
*);
85 static int igb_close(struct net_device
*);
86 static void igb_configure_tx(struct igb_adapter
*);
87 static void igb_configure_rx(struct igb_adapter
*);
88 static void igb_setup_rctl(struct igb_adapter
*);
89 static void igb_clean_all_tx_rings(struct igb_adapter
*);
90 static void igb_clean_all_rx_rings(struct igb_adapter
*);
91 static void igb_clean_tx_ring(struct igb_ring
*);
92 static void igb_clean_rx_ring(struct igb_ring
*);
93 static void igb_set_multi(struct net_device
*);
94 static void igb_update_phy_info(unsigned long);
95 static void igb_watchdog(unsigned long);
96 static void igb_watchdog_task(struct work_struct
*);
97 static int igb_xmit_frame_ring_adv(struct sk_buff
*, struct net_device
*,
99 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*);
100 static struct net_device_stats
*igb_get_stats(struct net_device
*);
101 static int igb_change_mtu(struct net_device
*, int);
102 static int igb_set_mac(struct net_device
*, void *);
103 static irqreturn_t
igb_intr(int irq
, void *);
104 static irqreturn_t
igb_intr_msi(int irq
, void *);
105 static irqreturn_t
igb_msix_other(int irq
, void *);
106 static irqreturn_t
igb_msix_rx(int irq
, void *);
107 static irqreturn_t
igb_msix_tx(int irq
, void *);
108 static int igb_clean_rx_ring_msix(struct napi_struct
*, int);
109 #ifdef CONFIG_IGB_DCA
110 static void igb_update_rx_dca(struct igb_ring
*);
111 static void igb_update_tx_dca(struct igb_ring
*);
112 static void igb_setup_dca(struct igb_adapter
*);
113 #endif /* CONFIG_IGB_DCA */
114 static bool igb_clean_tx_irq(struct igb_ring
*);
115 static int igb_poll(struct napi_struct
*, int);
116 static bool igb_clean_rx_irq_adv(struct igb_ring
*, int *, int);
117 static void igb_alloc_rx_buffers_adv(struct igb_ring
*, int);
118 #ifdef CONFIG_IGB_LRO
119 static int igb_get_skb_hdr(struct sk_buff
*skb
, void **, void **, u64
*, void *);
121 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
122 static void igb_tx_timeout(struct net_device
*);
123 static void igb_reset_task(struct work_struct
*);
124 static void igb_vlan_rx_register(struct net_device
*, struct vlan_group
*);
125 static void igb_vlan_rx_add_vid(struct net_device
*, u16
);
126 static void igb_vlan_rx_kill_vid(struct net_device
*, u16
);
127 static void igb_restore_vlan(struct igb_adapter
*);
129 static int igb_suspend(struct pci_dev
*, pm_message_t
);
131 static int igb_resume(struct pci_dev
*);
133 static void igb_shutdown(struct pci_dev
*);
134 #ifdef CONFIG_IGB_DCA
135 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
136 static struct notifier_block dca_notifier
= {
137 .notifier_call
= igb_notify_dca
,
143 #ifdef CONFIG_NET_POLL_CONTROLLER
144 /* for netdump / net console */
145 static void igb_netpoll(struct net_device
*);
148 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
149 pci_channel_state_t
);
150 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
151 static void igb_io_resume(struct pci_dev
*);
153 static struct pci_error_handlers igb_err_handler
= {
154 .error_detected
= igb_io_error_detected
,
155 .slot_reset
= igb_io_slot_reset
,
156 .resume
= igb_io_resume
,
160 static struct pci_driver igb_driver
= {
161 .name
= igb_driver_name
,
162 .id_table
= igb_pci_tbl
,
164 .remove
= __devexit_p(igb_remove
),
166 /* Power Managment Hooks */
167 .suspend
= igb_suspend
,
168 .resume
= igb_resume
,
170 .shutdown
= igb_shutdown
,
171 .err_handler
= &igb_err_handler
174 static int global_quad_port_a
; /* global quad port a indication */
176 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
177 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
178 MODULE_LICENSE("GPL");
179 MODULE_VERSION(DRV_VERSION
);
183 * igb_get_hw_dev_name - return device name string
184 * used by hardware layer to print debugging information
186 char *igb_get_hw_dev_name(struct e1000_hw
*hw
)
188 struct igb_adapter
*adapter
= hw
->back
;
189 return adapter
->netdev
->name
;
194 * igb_init_module - Driver Registration Routine
196 * igb_init_module is the first routine called when the driver is
197 * loaded. All it does is register with the PCI subsystem.
199 static int __init
igb_init_module(void)
202 printk(KERN_INFO
"%s - version %s\n",
203 igb_driver_string
, igb_driver_version
);
205 printk(KERN_INFO
"%s\n", igb_copyright
);
207 global_quad_port_a
= 0;
209 #ifdef CONFIG_IGB_DCA
210 dca_register_notify(&dca_notifier
);
213 ret
= pci_register_driver(&igb_driver
);
217 module_init(igb_init_module
);
220 * igb_exit_module - Driver Exit Cleanup Routine
222 * igb_exit_module is called just before the driver is removed
225 static void __exit
igb_exit_module(void)
227 #ifdef CONFIG_IGB_DCA
228 dca_unregister_notify(&dca_notifier
);
230 pci_unregister_driver(&igb_driver
);
233 module_exit(igb_exit_module
);
235 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
237 * igb_cache_ring_register - Descriptor ring to register mapping
238 * @adapter: board private structure to initialize
240 * Once we know the feature-set enabled for the device, we'll cache
241 * the register offset the descriptor ring is assigned to.
243 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
247 switch (adapter
->hw
.mac
.type
) {
249 /* The queues are allocated for virtualization such that VF 0
250 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
251 * In order to avoid collision we start at the first free queue
252 * and continue consuming queues in the same sequence
254 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
255 adapter
->rx_ring
[i
].reg_idx
= Q_IDX_82576(i
);
256 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
257 adapter
->tx_ring
[i
].reg_idx
= Q_IDX_82576(i
);
261 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
262 adapter
->rx_ring
[i
].reg_idx
= i
;
263 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
264 adapter
->tx_ring
[i
].reg_idx
= i
;
270 * igb_alloc_queues - Allocate memory for all rings
271 * @adapter: board private structure to initialize
273 * We allocate one ring per queue at run-time since we don't know the
274 * number of queues at compile-time.
276 static int igb_alloc_queues(struct igb_adapter
*adapter
)
280 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
281 sizeof(struct igb_ring
), GFP_KERNEL
);
282 if (!adapter
->tx_ring
)
285 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
286 sizeof(struct igb_ring
), GFP_KERNEL
);
287 if (!adapter
->rx_ring
) {
288 kfree(adapter
->tx_ring
);
292 adapter
->rx_ring
->buddy
= adapter
->tx_ring
;
294 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
295 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
296 ring
->count
= adapter
->tx_ring_count
;
297 ring
->adapter
= adapter
;
298 ring
->queue_index
= i
;
300 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
301 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
302 ring
->count
= adapter
->rx_ring_count
;
303 ring
->adapter
= adapter
;
304 ring
->queue_index
= i
;
305 ring
->itr_register
= E1000_ITR
;
307 /* set a default napi handler for each rx_ring */
308 netif_napi_add(adapter
->netdev
, &ring
->napi
, igb_poll
, 64);
311 igb_cache_ring_register(adapter
);
315 static void igb_free_queues(struct igb_adapter
*adapter
)
319 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
320 netif_napi_del(&adapter
->rx_ring
[i
].napi
);
322 kfree(adapter
->tx_ring
);
323 kfree(adapter
->rx_ring
);
326 #define IGB_N0_QUEUE -1
327 static void igb_assign_vector(struct igb_adapter
*adapter
, int rx_queue
,
328 int tx_queue
, int msix_vector
)
331 struct e1000_hw
*hw
= &adapter
->hw
;
334 switch (hw
->mac
.type
) {
336 /* The 82575 assigns vectors using a bitmask, which matches the
337 bitmask for the EICR/EIMS/EIMC registers. To assign one
338 or more queues to a vector, we write the appropriate bits
339 into the MSIXBM register for that vector. */
340 if (rx_queue
> IGB_N0_QUEUE
) {
341 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
342 adapter
->rx_ring
[rx_queue
].eims_value
= msixbm
;
344 if (tx_queue
> IGB_N0_QUEUE
) {
345 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
346 adapter
->tx_ring
[tx_queue
].eims_value
=
347 E1000_EICR_TX_QUEUE0
<< tx_queue
;
349 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
352 /* 82576 uses a table-based method for assigning vectors.
353 Each queue has a single entry in the table to which we write
354 a vector number along with a "valid" bit. Sadly, the layout
355 of the table is somewhat counterintuitive. */
356 if (rx_queue
> IGB_N0_QUEUE
) {
357 index
= (rx_queue
>> 1);
358 ivar
= array_rd32(E1000_IVAR0
, index
);
359 if (rx_queue
& 0x1) {
360 /* vector goes into third byte of register */
361 ivar
= ivar
& 0xFF00FFFF;
362 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 16;
364 /* vector goes into low byte of register */
365 ivar
= ivar
& 0xFFFFFF00;
366 ivar
|= msix_vector
| E1000_IVAR_VALID
;
368 adapter
->rx_ring
[rx_queue
].eims_value
= 1 << msix_vector
;
369 array_wr32(E1000_IVAR0
, index
, ivar
);
371 if (tx_queue
> IGB_N0_QUEUE
) {
372 index
= (tx_queue
>> 1);
373 ivar
= array_rd32(E1000_IVAR0
, index
);
374 if (tx_queue
& 0x1) {
375 /* vector goes into high byte of register */
376 ivar
= ivar
& 0x00FFFFFF;
377 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 24;
379 /* vector goes into second byte of register */
380 ivar
= ivar
& 0xFFFF00FF;
381 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 8;
383 adapter
->tx_ring
[tx_queue
].eims_value
= 1 << msix_vector
;
384 array_wr32(E1000_IVAR0
, index
, ivar
);
394 * igb_configure_msix - Configure MSI-X hardware
396 * igb_configure_msix sets up the hardware to properly
397 * generate MSI-X interrupts.
399 static void igb_configure_msix(struct igb_adapter
*adapter
)
403 struct e1000_hw
*hw
= &adapter
->hw
;
405 adapter
->eims_enable_mask
= 0;
406 if (hw
->mac
.type
== e1000_82576
)
407 /* Turn on MSI-X capability first, or our settings
408 * won't stick. And it will take days to debug. */
409 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
410 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
413 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
414 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
415 igb_assign_vector(adapter
, IGB_N0_QUEUE
, i
, vector
++);
416 adapter
->eims_enable_mask
|= tx_ring
->eims_value
;
417 if (tx_ring
->itr_val
)
418 writel(tx_ring
->itr_val
,
419 hw
->hw_addr
+ tx_ring
->itr_register
);
421 writel(1, hw
->hw_addr
+ tx_ring
->itr_register
);
424 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
425 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
426 rx_ring
->buddy
= NULL
;
427 igb_assign_vector(adapter
, i
, IGB_N0_QUEUE
, vector
++);
428 adapter
->eims_enable_mask
|= rx_ring
->eims_value
;
429 if (rx_ring
->itr_val
)
430 writel(rx_ring
->itr_val
,
431 hw
->hw_addr
+ rx_ring
->itr_register
);
433 writel(1, hw
->hw_addr
+ rx_ring
->itr_register
);
437 /* set vector for other causes, i.e. link changes */
438 switch (hw
->mac
.type
) {
440 array_wr32(E1000_MSIXBM(0), vector
++,
443 tmp
= rd32(E1000_CTRL_EXT
);
444 /* enable MSI-X PBA support*/
445 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
447 /* Auto-Mask interrupts upon ICR read. */
448 tmp
|= E1000_CTRL_EXT_EIAME
;
449 tmp
|= E1000_CTRL_EXT_IRCA
;
451 wr32(E1000_CTRL_EXT
, tmp
);
452 adapter
->eims_enable_mask
|= E1000_EIMS_OTHER
;
453 adapter
->eims_other
= E1000_EIMS_OTHER
;
458 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
459 wr32(E1000_IVAR_MISC
, tmp
);
461 adapter
->eims_enable_mask
= (1 << (vector
)) - 1;
462 adapter
->eims_other
= 1 << (vector
- 1);
465 /* do nothing, since nothing else supports MSI-X */
467 } /* switch (hw->mac.type) */
472 * igb_request_msix - Initialize MSI-X interrupts
474 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
477 static int igb_request_msix(struct igb_adapter
*adapter
)
479 struct net_device
*netdev
= adapter
->netdev
;
480 int i
, err
= 0, vector
= 0;
484 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
485 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
486 sprintf(ring
->name
, "%s-tx-%d", netdev
->name
, i
);
487 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
488 &igb_msix_tx
, 0, ring
->name
,
489 &(adapter
->tx_ring
[i
]));
492 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
493 ring
->itr_val
= 976; /* ~4000 ints/sec */
496 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
497 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
498 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
499 sprintf(ring
->name
, "%s-rx-%d", netdev
->name
, i
);
501 memcpy(ring
->name
, netdev
->name
, IFNAMSIZ
);
502 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
503 &igb_msix_rx
, 0, ring
->name
,
504 &(adapter
->rx_ring
[i
]));
507 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
508 ring
->itr_val
= adapter
->itr
;
509 /* overwrite the poll routine for MSIX, we've already done
511 ring
->napi
.poll
= &igb_clean_rx_ring_msix
;
515 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
516 &igb_msix_other
, 0, netdev
->name
, netdev
);
520 igb_configure_msix(adapter
);
526 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
528 if (adapter
->msix_entries
) {
529 pci_disable_msix(adapter
->pdev
);
530 kfree(adapter
->msix_entries
);
531 adapter
->msix_entries
= NULL
;
532 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
533 pci_disable_msi(adapter
->pdev
);
539 * igb_set_interrupt_capability - set MSI or MSI-X if supported
541 * Attempt to configure interrupts using the best available
542 * capabilities of the hardware and kernel.
544 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
)
549 numvecs
= adapter
->num_tx_queues
+ adapter
->num_rx_queues
+ 1;
550 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
552 if (!adapter
->msix_entries
)
555 for (i
= 0; i
< numvecs
; i
++)
556 adapter
->msix_entries
[i
].entry
= i
;
558 err
= pci_enable_msix(adapter
->pdev
,
559 adapter
->msix_entries
,
564 igb_reset_interrupt_capability(adapter
);
566 /* If we can't do MSI-X, try MSI */
568 adapter
->num_rx_queues
= 1;
569 adapter
->num_tx_queues
= 1;
570 if (!pci_enable_msi(adapter
->pdev
))
571 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
573 /* Notify the stack of the (possibly) reduced Tx Queue count. */
574 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
579 * igb_request_irq - initialize interrupts
581 * Attempts to configure interrupts using the best available
582 * capabilities of the hardware and kernel.
584 static int igb_request_irq(struct igb_adapter
*adapter
)
586 struct net_device
*netdev
= adapter
->netdev
;
587 struct e1000_hw
*hw
= &adapter
->hw
;
590 if (adapter
->msix_entries
) {
591 err
= igb_request_msix(adapter
);
594 /* fall back to MSI */
595 igb_reset_interrupt_capability(adapter
);
596 if (!pci_enable_msi(adapter
->pdev
))
597 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
598 igb_free_all_tx_resources(adapter
);
599 igb_free_all_rx_resources(adapter
);
600 adapter
->num_rx_queues
= 1;
601 igb_alloc_queues(adapter
);
603 switch (hw
->mac
.type
) {
605 wr32(E1000_MSIXBM(0),
606 (E1000_EICR_RX_QUEUE0
| E1000_EIMS_OTHER
));
609 wr32(E1000_IVAR0
, E1000_IVAR_VALID
);
616 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
617 err
= request_irq(adapter
->pdev
->irq
, &igb_intr_msi
, 0,
618 netdev
->name
, netdev
);
621 /* fall back to legacy interrupts */
622 igb_reset_interrupt_capability(adapter
);
623 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
626 err
= request_irq(adapter
->pdev
->irq
, &igb_intr
, IRQF_SHARED
,
627 netdev
->name
, netdev
);
630 dev_err(&adapter
->pdev
->dev
, "Error %d getting interrupt\n",
637 static void igb_free_irq(struct igb_adapter
*adapter
)
639 struct net_device
*netdev
= adapter
->netdev
;
641 if (adapter
->msix_entries
) {
644 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
645 free_irq(adapter
->msix_entries
[vector
++].vector
,
646 &(adapter
->tx_ring
[i
]));
647 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
648 free_irq(adapter
->msix_entries
[vector
++].vector
,
649 &(adapter
->rx_ring
[i
]));
651 free_irq(adapter
->msix_entries
[vector
++].vector
, netdev
);
655 free_irq(adapter
->pdev
->irq
, netdev
);
659 * igb_irq_disable - Mask off interrupt generation on the NIC
660 * @adapter: board private structure
662 static void igb_irq_disable(struct igb_adapter
*adapter
)
664 struct e1000_hw
*hw
= &adapter
->hw
;
666 if (adapter
->msix_entries
) {
668 wr32(E1000_EIMC
, ~0);
675 synchronize_irq(adapter
->pdev
->irq
);
679 * igb_irq_enable - Enable default interrupt generation settings
680 * @adapter: board private structure
682 static void igb_irq_enable(struct igb_adapter
*adapter
)
684 struct e1000_hw
*hw
= &adapter
->hw
;
686 if (adapter
->msix_entries
) {
687 wr32(E1000_EIAC
, adapter
->eims_enable_mask
);
688 wr32(E1000_EIAM
, adapter
->eims_enable_mask
);
689 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
690 wr32(E1000_IMS
, E1000_IMS_LSC
);
692 wr32(E1000_IMS
, IMS_ENABLE_MASK
);
693 wr32(E1000_IAM
, IMS_ENABLE_MASK
);
697 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
699 struct net_device
*netdev
= adapter
->netdev
;
700 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
701 u16 old_vid
= adapter
->mng_vlan_id
;
702 if (adapter
->vlgrp
) {
703 if (!vlan_group_get_device(adapter
->vlgrp
, vid
)) {
704 if (adapter
->hw
.mng_cookie
.status
&
705 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
706 igb_vlan_rx_add_vid(netdev
, vid
);
707 adapter
->mng_vlan_id
= vid
;
709 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
711 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
713 !vlan_group_get_device(adapter
->vlgrp
, old_vid
))
714 igb_vlan_rx_kill_vid(netdev
, old_vid
);
716 adapter
->mng_vlan_id
= vid
;
721 * igb_release_hw_control - release control of the h/w to f/w
722 * @adapter: address of board private structure
724 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
725 * For ASF and Pass Through versions of f/w this means that the
726 * driver is no longer loaded.
729 static void igb_release_hw_control(struct igb_adapter
*adapter
)
731 struct e1000_hw
*hw
= &adapter
->hw
;
734 /* Let firmware take over control of h/w */
735 ctrl_ext
= rd32(E1000_CTRL_EXT
);
737 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
742 * igb_get_hw_control - get control of the h/w from f/w
743 * @adapter: address of board private structure
745 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
746 * For ASF and Pass Through versions of f/w this means that
747 * the driver is loaded.
750 static void igb_get_hw_control(struct igb_adapter
*adapter
)
752 struct e1000_hw
*hw
= &adapter
->hw
;
755 /* Let firmware know the driver has taken over */
756 ctrl_ext
= rd32(E1000_CTRL_EXT
);
758 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
762 * igb_configure - configure the hardware for RX and TX
763 * @adapter: private board structure
765 static void igb_configure(struct igb_adapter
*adapter
)
767 struct net_device
*netdev
= adapter
->netdev
;
770 igb_get_hw_control(adapter
);
771 igb_set_multi(netdev
);
773 igb_restore_vlan(adapter
);
775 igb_configure_tx(adapter
);
776 igb_setup_rctl(adapter
);
777 igb_configure_rx(adapter
);
779 igb_rx_fifo_flush_82575(&adapter
->hw
);
781 /* call IGB_DESC_UNUSED which always leaves
782 * at least 1 descriptor unused to make sure
783 * next_to_use != next_to_clean */
784 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
785 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
786 igb_alloc_rx_buffers_adv(ring
, IGB_DESC_UNUSED(ring
));
790 adapter
->tx_queue_len
= netdev
->tx_queue_len
;
795 * igb_up - Open the interface and prepare it to handle traffic
796 * @adapter: board private structure
799 int igb_up(struct igb_adapter
*adapter
)
801 struct e1000_hw
*hw
= &adapter
->hw
;
804 /* hardware has been reset, we need to reload some things */
805 igb_configure(adapter
);
807 clear_bit(__IGB_DOWN
, &adapter
->state
);
809 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
810 napi_enable(&adapter
->rx_ring
[i
].napi
);
811 if (adapter
->msix_entries
)
812 igb_configure_msix(adapter
);
814 /* Clear any pending interrupts. */
816 igb_irq_enable(adapter
);
818 /* Fire a link change interrupt to start the watchdog. */
819 wr32(E1000_ICS
, E1000_ICS_LSC
);
823 void igb_down(struct igb_adapter
*adapter
)
825 struct e1000_hw
*hw
= &adapter
->hw
;
826 struct net_device
*netdev
= adapter
->netdev
;
830 /* signal that we're down so the interrupt handler does not
831 * reschedule our watchdog timer */
832 set_bit(__IGB_DOWN
, &adapter
->state
);
834 /* disable receives in the hardware */
835 rctl
= rd32(E1000_RCTL
);
836 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
837 /* flush and sleep below */
839 netif_tx_stop_all_queues(netdev
);
841 /* disable transmits in the hardware */
842 tctl
= rd32(E1000_TCTL
);
843 tctl
&= ~E1000_TCTL_EN
;
844 wr32(E1000_TCTL
, tctl
);
845 /* flush both disables and wait for them to finish */
849 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
850 napi_disable(&adapter
->rx_ring
[i
].napi
);
852 igb_irq_disable(adapter
);
854 del_timer_sync(&adapter
->watchdog_timer
);
855 del_timer_sync(&adapter
->phy_info_timer
);
857 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
858 netif_carrier_off(netdev
);
859 adapter
->link_speed
= 0;
860 adapter
->link_duplex
= 0;
862 if (!pci_channel_offline(adapter
->pdev
))
864 igb_clean_all_tx_rings(adapter
);
865 igb_clean_all_rx_rings(adapter
);
868 void igb_reinit_locked(struct igb_adapter
*adapter
)
870 WARN_ON(in_interrupt());
871 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
875 clear_bit(__IGB_RESETTING
, &adapter
->state
);
878 void igb_reset(struct igb_adapter
*adapter
)
880 struct e1000_hw
*hw
= &adapter
->hw
;
881 struct e1000_mac_info
*mac
= &hw
->mac
;
882 struct e1000_fc_info
*fc
= &hw
->fc
;
883 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
;
886 /* Repartition Pba for greater than 9k mtu
887 * To take effect CTRL.RST is required.
889 if (mac
->type
!= e1000_82576
) {
896 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
897 (mac
->type
< e1000_82576
)) {
898 /* adjust PBA for jumbo frames */
899 wr32(E1000_PBA
, pba
);
901 /* To maintain wire speed transmits, the Tx FIFO should be
902 * large enough to accommodate two full transmit packets,
903 * rounded up to the next 1KB and expressed in KB. Likewise,
904 * the Rx FIFO should be large enough to accommodate at least
905 * one full receive packet and is similarly rounded up and
906 * expressed in KB. */
907 pba
= rd32(E1000_PBA
);
908 /* upper 16 bits has Tx packet buffer allocation size in KB */
909 tx_space
= pba
>> 16;
910 /* lower 16 bits has Rx packet buffer allocation size in KB */
912 /* the tx fifo also stores 16 bytes of information about the tx
913 * but don't include ethernet FCS because hardware appends it */
914 min_tx_space
= (adapter
->max_frame_size
+
915 sizeof(struct e1000_tx_desc
) -
917 min_tx_space
= ALIGN(min_tx_space
, 1024);
919 /* software strips receive CRC, so leave room for it */
920 min_rx_space
= adapter
->max_frame_size
;
921 min_rx_space
= ALIGN(min_rx_space
, 1024);
924 /* If current Tx allocation is less than the min Tx FIFO size,
925 * and the min Tx FIFO size is less than the current Rx FIFO
926 * allocation, take space away from current Rx allocation */
927 if (tx_space
< min_tx_space
&&
928 ((min_tx_space
- tx_space
) < pba
)) {
929 pba
= pba
- (min_tx_space
- tx_space
);
931 /* if short on rx space, rx wins and must trump tx
933 if (pba
< min_rx_space
)
936 wr32(E1000_PBA
, pba
);
939 /* flow control settings */
940 /* The high water mark must be low enough to fit one full frame
941 * (or the size used for early receive) above it in the Rx FIFO.
942 * Set it to the lower of:
943 * - 90% of the Rx FIFO size, or
944 * - the full Rx FIFO size minus one full frame */
945 hwm
= min(((pba
<< 10) * 9 / 10),
946 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
948 if (mac
->type
< e1000_82576
) {
949 fc
->high_water
= hwm
& 0xFFF8; /* 8-byte granularity */
950 fc
->low_water
= fc
->high_water
- 8;
952 fc
->high_water
= hwm
& 0xFFF0; /* 16-byte granularity */
953 fc
->low_water
= fc
->high_water
- 16;
955 fc
->pause_time
= 0xFFFF;
957 fc
->type
= fc
->original_type
;
959 /* Allow time for pending master requests to run */
960 adapter
->hw
.mac
.ops
.reset_hw(&adapter
->hw
);
963 if (adapter
->hw
.mac
.ops
.init_hw(&adapter
->hw
))
964 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
966 igb_update_mng_vlan(adapter
);
968 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
969 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
971 igb_reset_adaptive(&adapter
->hw
);
972 igb_get_phy_info(&adapter
->hw
);
976 * igb_is_need_ioport - determine if an adapter needs ioport resources or not
977 * @pdev: PCI device information struct
979 * Returns true if an adapter needs ioport resources
981 static int igb_is_need_ioport(struct pci_dev
*pdev
)
983 switch (pdev
->device
) {
984 /* Currently there are no adapters that need ioport resources */
990 static const struct net_device_ops igb_netdev_ops
= {
991 .ndo_open
= igb_open
,
992 .ndo_stop
= igb_close
,
993 .ndo_start_xmit
= igb_xmit_frame_adv
,
994 .ndo_get_stats
= igb_get_stats
,
995 .ndo_set_multicast_list
= igb_set_multi
,
996 .ndo_set_mac_address
= igb_set_mac
,
997 .ndo_change_mtu
= igb_change_mtu
,
998 .ndo_do_ioctl
= igb_ioctl
,
999 .ndo_tx_timeout
= igb_tx_timeout
,
1000 .ndo_validate_addr
= eth_validate_addr
,
1001 .ndo_vlan_rx_register
= igb_vlan_rx_register
,
1002 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
1003 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
1004 #ifdef CONFIG_NET_POLL_CONTROLLER
1005 .ndo_poll_controller
= igb_netpoll
,
1010 * igb_probe - Device Initialization Routine
1011 * @pdev: PCI device information struct
1012 * @ent: entry in igb_pci_tbl
1014 * Returns 0 on success, negative on failure
1016 * igb_probe initializes an adapter identified by a pci_dev structure.
1017 * The OS initialization, configuring of the adapter private structure,
1018 * and a hardware reset occur.
1020 static int __devinit
igb_probe(struct pci_dev
*pdev
,
1021 const struct pci_device_id
*ent
)
1023 struct net_device
*netdev
;
1024 struct igb_adapter
*adapter
;
1025 struct e1000_hw
*hw
;
1026 struct pci_dev
*us_dev
;
1027 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
1028 unsigned long mmio_start
, mmio_len
;
1029 int i
, err
, pci_using_dac
, pos
;
1030 u16 eeprom_data
= 0, state
= 0;
1031 u16 eeprom_apme_mask
= IGB_EEPROM_APME
;
1033 int bars
, need_ioport
;
1035 /* do not allocate ioport bars when not needed */
1036 need_ioport
= igb_is_need_ioport(pdev
);
1038 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
| IORESOURCE_IO
);
1039 err
= pci_enable_device(pdev
);
1041 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
1042 err
= pci_enable_device_mem(pdev
);
1048 err
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
1050 err
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
1054 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1056 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
1058 dev_err(&pdev
->dev
, "No usable DMA "
1059 "configuration, aborting\n");
1065 /* 82575 requires that the pci-e link partner disable the L0s state */
1066 switch (pdev
->device
) {
1067 case E1000_DEV_ID_82575EB_COPPER
:
1068 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1069 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1070 us_dev
= pdev
->bus
->self
;
1071 pos
= pci_find_capability(us_dev
, PCI_CAP_ID_EXP
);
1073 pci_read_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1075 state
&= ~PCIE_LINK_STATE_L0S
;
1076 pci_write_config_word(us_dev
, pos
+ PCI_EXP_LNKCTL
,
1078 dev_info(&pdev
->dev
,
1079 "Disabling ASPM L0s upstream switch port %s\n",
1086 err
= pci_request_selected_regions(pdev
, bars
, igb_driver_name
);
1090 err
= pci_enable_pcie_error_reporting(pdev
);
1092 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
1094 /* non-fatal, continue */
1097 pci_set_master(pdev
);
1098 pci_save_state(pdev
);
1101 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
), IGB_MAX_TX_QUEUES
);
1103 goto err_alloc_etherdev
;
1105 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
1107 pci_set_drvdata(pdev
, netdev
);
1108 adapter
= netdev_priv(netdev
);
1109 adapter
->netdev
= netdev
;
1110 adapter
->pdev
= pdev
;
1113 adapter
->msg_enable
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
;
1114 adapter
->bars
= bars
;
1115 adapter
->need_ioport
= need_ioport
;
1117 mmio_start
= pci_resource_start(pdev
, 0);
1118 mmio_len
= pci_resource_len(pdev
, 0);
1121 adapter
->hw
.hw_addr
= ioremap(mmio_start
, mmio_len
);
1122 if (!adapter
->hw
.hw_addr
)
1125 netdev
->netdev_ops
= &igb_netdev_ops
;
1126 igb_set_ethtool_ops(netdev
);
1127 netdev
->watchdog_timeo
= 5 * HZ
;
1129 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
1131 netdev
->mem_start
= mmio_start
;
1132 netdev
->mem_end
= mmio_start
+ mmio_len
;
1134 /* PCI config space info */
1135 hw
->vendor_id
= pdev
->vendor
;
1136 hw
->device_id
= pdev
->device
;
1137 hw
->revision_id
= pdev
->revision
;
1138 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
1139 hw
->subsystem_device_id
= pdev
->subsystem_device
;
1141 /* setup the private structure */
1143 /* Copy the default MAC, PHY and NVM function pointers */
1144 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
1145 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
1146 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
1147 /* Initialize skew-specific constants */
1148 err
= ei
->get_invariants(hw
);
1152 err
= igb_sw_init(adapter
);
1156 igb_get_bus_info_pcie(hw
);
1159 switch (hw
->mac
.type
) {
1161 adapter
->flags
|= IGB_FLAG_NEED_CTX_IDX
;
1168 hw
->phy
.autoneg_wait_to_complete
= false;
1169 hw
->mac
.adaptive_ifs
= true;
1171 /* Copper options */
1172 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1173 hw
->phy
.mdix
= AUTO_ALL_MODES
;
1174 hw
->phy
.disable_polarity_correction
= false;
1175 hw
->phy
.ms_type
= e1000_ms_hw_default
;
1178 if (igb_check_reset_block(hw
))
1179 dev_info(&pdev
->dev
,
1180 "PHY reset is blocked due to SOL/IDER session.\n");
1182 netdev
->features
= NETIF_F_SG
|
1184 NETIF_F_HW_VLAN_TX
|
1185 NETIF_F_HW_VLAN_RX
|
1186 NETIF_F_HW_VLAN_FILTER
;
1188 netdev
->features
|= NETIF_F_TSO
;
1189 netdev
->features
|= NETIF_F_TSO6
;
1191 #ifdef CONFIG_IGB_LRO
1192 netdev
->features
|= NETIF_F_LRO
;
1195 netdev
->vlan_features
|= NETIF_F_TSO
;
1196 netdev
->vlan_features
|= NETIF_F_TSO6
;
1197 netdev
->vlan_features
|= NETIF_F_HW_CSUM
;
1198 netdev
->vlan_features
|= NETIF_F_SG
;
1201 netdev
->features
|= NETIF_F_HIGHDMA
;
1203 netdev
->features
|= NETIF_F_LLTX
;
1204 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(&adapter
->hw
);
1206 /* before reading the NVM, reset the controller to put the device in a
1207 * known good starting state */
1208 hw
->mac
.ops
.reset_hw(hw
);
1210 /* make sure the NVM is good */
1211 if (igb_validate_nvm_checksum(hw
) < 0) {
1212 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
1217 /* copy the MAC address out of the NVM */
1218 if (hw
->mac
.ops
.read_mac_addr(hw
))
1219 dev_err(&pdev
->dev
, "NVM Read Error\n");
1221 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1222 memcpy(netdev
->perm_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1224 if (!is_valid_ether_addr(netdev
->perm_addr
)) {
1225 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
1230 init_timer(&adapter
->watchdog_timer
);
1231 adapter
->watchdog_timer
.function
= &igb_watchdog
;
1232 adapter
->watchdog_timer
.data
= (unsigned long) adapter
;
1234 init_timer(&adapter
->phy_info_timer
);
1235 adapter
->phy_info_timer
.function
= &igb_update_phy_info
;
1236 adapter
->phy_info_timer
.data
= (unsigned long) adapter
;
1238 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
1239 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
1241 /* Initialize link & ring properties that are user-changeable */
1242 adapter
->tx_ring
->count
= 256;
1243 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
1244 adapter
->tx_ring
[i
].count
= adapter
->tx_ring
->count
;
1245 adapter
->rx_ring
->count
= 256;
1246 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1247 adapter
->rx_ring
[i
].count
= adapter
->rx_ring
->count
;
1249 adapter
->fc_autoneg
= true;
1250 hw
->mac
.autoneg
= true;
1251 hw
->phy
.autoneg_advertised
= 0x2f;
1253 hw
->fc
.original_type
= e1000_fc_default
;
1254 hw
->fc
.type
= e1000_fc_default
;
1256 adapter
->itr_setting
= 3;
1257 adapter
->itr
= IGB_START_ITR
;
1259 igb_validate_mdi_setting(hw
);
1261 adapter
->rx_csum
= 1;
1263 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1264 * enable the ACPI Magic Packet filter
1267 if (hw
->bus
.func
== 0 ||
1268 hw
->device_id
== E1000_DEV_ID_82575EB_COPPER
)
1269 hw
->nvm
.ops
.read_nvm(hw
, NVM_INIT_CONTROL3_PORT_A
, 1,
1272 if (eeprom_data
& eeprom_apme_mask
)
1273 adapter
->eeprom_wol
|= E1000_WUFC_MAG
;
1275 /* now that we have the eeprom settings, apply the special cases where
1276 * the eeprom may be wrong or the board simply won't support wake on
1277 * lan on a particular port */
1278 switch (pdev
->device
) {
1279 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1280 adapter
->eeprom_wol
= 0;
1282 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1283 case E1000_DEV_ID_82576_FIBER
:
1284 case E1000_DEV_ID_82576_SERDES
:
1285 /* Wake events only supported on port A for dual fiber
1286 * regardless of eeprom setting */
1287 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
1288 adapter
->eeprom_wol
= 0;
1292 /* initialize the wol settings based on the eeprom settings */
1293 adapter
->wol
= adapter
->eeprom_wol
;
1294 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1296 /* reset the hardware with the new settings */
1299 /* let the f/w know that the h/w is now under the control of the
1301 igb_get_hw_control(adapter
);
1303 /* tell the stack to leave us alone until igb_open() is called */
1304 netif_carrier_off(netdev
);
1305 netif_tx_stop_all_queues(netdev
);
1307 strcpy(netdev
->name
, "eth%d");
1308 err
= register_netdev(netdev
);
1312 #ifdef CONFIG_IGB_DCA
1313 if (dca_add_requester(&pdev
->dev
) == 0) {
1314 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
1315 dev_info(&pdev
->dev
, "DCA enabled\n");
1316 /* Always use CB2 mode, difference is masked
1317 * in the CB driver. */
1318 wr32(E1000_DCA_CTRL
, 2);
1319 igb_setup_dca(adapter
);
1323 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
1324 /* print bus type/speed/width info */
1325 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
1327 ((hw
->bus
.speed
== e1000_bus_speed_2500
)
1328 ? "2.5Gb/s" : "unknown"),
1329 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
)
1330 ? "Width x4" : (hw
->bus
.width
== e1000_bus_width_pcie_x1
)
1331 ? "Width x1" : "unknown"),
1334 igb_read_part_num(hw
, &part_num
);
1335 dev_info(&pdev
->dev
, "%s: PBA No: %06x-%03x\n", netdev
->name
,
1336 (part_num
>> 8), (part_num
& 0xff));
1338 dev_info(&pdev
->dev
,
1339 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1340 adapter
->msix_entries
? "MSI-X" :
1341 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
1342 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
1347 igb_release_hw_control(adapter
);
1349 if (!igb_check_reset_block(hw
))
1352 if (hw
->flash_address
)
1353 iounmap(hw
->flash_address
);
1355 igb_remove_device(hw
);
1356 igb_free_queues(adapter
);
1359 iounmap(hw
->hw_addr
);
1361 free_netdev(netdev
);
1363 pci_release_selected_regions(pdev
, bars
);
1366 pci_disable_device(pdev
);
1371 * igb_remove - Device Removal Routine
1372 * @pdev: PCI device information struct
1374 * igb_remove is called by the PCI subsystem to alert the driver
1375 * that it should release a PCI device. The could be caused by a
1376 * Hot-Plug event, or because the driver is going to be removed from
1379 static void __devexit
igb_remove(struct pci_dev
*pdev
)
1381 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1382 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1383 #ifdef CONFIG_IGB_DCA
1384 struct e1000_hw
*hw
= &adapter
->hw
;
1388 /* flush_scheduled work may reschedule our watchdog task, so
1389 * explicitly disable watchdog tasks from being rescheduled */
1390 set_bit(__IGB_DOWN
, &adapter
->state
);
1391 del_timer_sync(&adapter
->watchdog_timer
);
1392 del_timer_sync(&adapter
->phy_info_timer
);
1394 flush_scheduled_work();
1396 #ifdef CONFIG_IGB_DCA
1397 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
1398 dev_info(&pdev
->dev
, "DCA disabled\n");
1399 dca_remove_requester(&pdev
->dev
);
1400 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
1401 wr32(E1000_DCA_CTRL
, 1);
1405 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1406 * would have already happened in close and is redundant. */
1407 igb_release_hw_control(adapter
);
1409 unregister_netdev(netdev
);
1411 if (!igb_check_reset_block(&adapter
->hw
))
1412 igb_reset_phy(&adapter
->hw
);
1414 igb_remove_device(&adapter
->hw
);
1415 igb_reset_interrupt_capability(adapter
);
1417 igb_free_queues(adapter
);
1419 iounmap(adapter
->hw
.hw_addr
);
1420 if (adapter
->hw
.flash_address
)
1421 iounmap(adapter
->hw
.flash_address
);
1422 pci_release_selected_regions(pdev
, adapter
->bars
);
1424 free_netdev(netdev
);
1426 err
= pci_disable_pcie_error_reporting(pdev
);
1429 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
1431 pci_disable_device(pdev
);
1435 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1436 * @adapter: board private structure to initialize
1438 * igb_sw_init initializes the Adapter private data structure.
1439 * Fields are initialized based on PCI device information and
1440 * OS network device settings (MTU size).
1442 static int __devinit
igb_sw_init(struct igb_adapter
*adapter
)
1444 struct e1000_hw
*hw
= &adapter
->hw
;
1445 struct net_device
*netdev
= adapter
->netdev
;
1446 struct pci_dev
*pdev
= adapter
->pdev
;
1448 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
1450 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
1451 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
1452 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1453 adapter
->rx_ps_hdr_size
= 0; /* disable packet split */
1454 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1455 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
1457 /* Number of supported queues. */
1458 /* Having more queues than CPUs doesn't make sense. */
1459 adapter
->num_rx_queues
= min_t(u32
, IGB_MAX_RX_QUEUES
, num_online_cpus());
1460 adapter
->num_tx_queues
= min_t(u32
, IGB_MAX_TX_QUEUES
, num_online_cpus());
1462 /* This call may decrease the number of queues depending on
1463 * interrupt mode. */
1464 igb_set_interrupt_capability(adapter
);
1466 if (igb_alloc_queues(adapter
)) {
1467 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
1471 /* Explicitly disable IRQ since the NIC can be in any state. */
1472 igb_irq_disable(adapter
);
1474 set_bit(__IGB_DOWN
, &adapter
->state
);
1479 * igb_open - Called when a network interface is made active
1480 * @netdev: network interface device structure
1482 * Returns 0 on success, negative value on failure
1484 * The open entry point is called when a network interface is made
1485 * active by the system (IFF_UP). At this point all resources needed
1486 * for transmit and receive operations are allocated, the interrupt
1487 * handler is registered with the OS, the watchdog timer is started,
1488 * and the stack is notified that the interface is ready.
1490 static int igb_open(struct net_device
*netdev
)
1492 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1493 struct e1000_hw
*hw
= &adapter
->hw
;
1497 /* disallow open during test */
1498 if (test_bit(__IGB_TESTING
, &adapter
->state
))
1501 /* allocate transmit descriptors */
1502 err
= igb_setup_all_tx_resources(adapter
);
1506 /* allocate receive descriptors */
1507 err
= igb_setup_all_rx_resources(adapter
);
1511 /* e1000_power_up_phy(adapter); */
1513 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1514 if ((adapter
->hw
.mng_cookie
.status
&
1515 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
))
1516 igb_update_mng_vlan(adapter
);
1518 /* before we allocate an interrupt, we must be ready to handle it.
1519 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1520 * as soon as we call pci_request_irq, so we have to setup our
1521 * clean_rx handler before we do so. */
1522 igb_configure(adapter
);
1524 err
= igb_request_irq(adapter
);
1528 /* From here on the code is the same as igb_up() */
1529 clear_bit(__IGB_DOWN
, &adapter
->state
);
1531 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1532 napi_enable(&adapter
->rx_ring
[i
].napi
);
1534 /* Clear any pending interrupts. */
1537 igb_irq_enable(adapter
);
1539 netif_tx_start_all_queues(netdev
);
1541 /* Fire a link status change interrupt to start the watchdog. */
1542 wr32(E1000_ICS
, E1000_ICS_LSC
);
1547 igb_release_hw_control(adapter
);
1548 /* e1000_power_down_phy(adapter); */
1549 igb_free_all_rx_resources(adapter
);
1551 igb_free_all_tx_resources(adapter
);
1559 * igb_close - Disables a network interface
1560 * @netdev: network interface device structure
1562 * Returns 0, this is not allowed to fail
1564 * The close entry point is called when an interface is de-activated
1565 * by the OS. The hardware is still under the driver's control, but
1566 * needs to be disabled. A global MAC reset is issued to stop the
1567 * hardware, and all transmit and receive resources are freed.
1569 static int igb_close(struct net_device
*netdev
)
1571 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1573 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
1576 igb_free_irq(adapter
);
1578 igb_free_all_tx_resources(adapter
);
1579 igb_free_all_rx_resources(adapter
);
1581 /* kill manageability vlan ID if supported, but not if a vlan with
1582 * the same ID is registered on the host OS (let 8021q kill it) */
1583 if ((adapter
->hw
.mng_cookie
.status
&
1584 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
1586 vlan_group_get_device(adapter
->vlgrp
, adapter
->mng_vlan_id
)))
1587 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
1593 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1594 * @adapter: board private structure
1595 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1597 * Return 0 on success, negative on failure
1600 int igb_setup_tx_resources(struct igb_adapter
*adapter
,
1601 struct igb_ring
*tx_ring
)
1603 struct pci_dev
*pdev
= adapter
->pdev
;
1606 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
1607 tx_ring
->buffer_info
= vmalloc(size
);
1608 if (!tx_ring
->buffer_info
)
1610 memset(tx_ring
->buffer_info
, 0, size
);
1612 /* round up to nearest 4K */
1613 tx_ring
->size
= tx_ring
->count
* sizeof(struct e1000_tx_desc
);
1614 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1616 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1622 tx_ring
->adapter
= adapter
;
1623 tx_ring
->next_to_use
= 0;
1624 tx_ring
->next_to_clean
= 0;
1628 vfree(tx_ring
->buffer_info
);
1629 dev_err(&adapter
->pdev
->dev
,
1630 "Unable to allocate memory for the transmit descriptor ring\n");
1635 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1636 * (Descriptors) for all queues
1637 * @adapter: board private structure
1639 * Return 0 on success, negative on failure
1641 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
1646 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1647 err
= igb_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
1649 dev_err(&adapter
->pdev
->dev
,
1650 "Allocation for Tx Queue %u failed\n", i
);
1651 for (i
--; i
>= 0; i
--)
1652 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
1657 for (i
= 0; i
< IGB_MAX_TX_QUEUES
; i
++) {
1658 r_idx
= i
% adapter
->num_tx_queues
;
1659 adapter
->multi_tx_table
[i
] = &adapter
->tx_ring
[r_idx
];
1665 * igb_configure_tx - Configure transmit Unit after Reset
1666 * @adapter: board private structure
1668 * Configure the Tx unit of the MAC after a reset.
1670 static void igb_configure_tx(struct igb_adapter
*adapter
)
1673 struct e1000_hw
*hw
= &adapter
->hw
;
1678 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1679 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
1681 wr32(E1000_TDLEN(j
),
1682 ring
->count
* sizeof(struct e1000_tx_desc
));
1684 wr32(E1000_TDBAL(j
),
1685 tdba
& 0x00000000ffffffffULL
);
1686 wr32(E1000_TDBAH(j
), tdba
>> 32);
1688 ring
->head
= E1000_TDH(j
);
1689 ring
->tail
= E1000_TDT(j
);
1690 writel(0, hw
->hw_addr
+ ring
->tail
);
1691 writel(0, hw
->hw_addr
+ ring
->head
);
1692 txdctl
= rd32(E1000_TXDCTL(j
));
1693 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
1694 wr32(E1000_TXDCTL(j
), txdctl
);
1696 /* Turn off Relaxed Ordering on head write-backs. The
1697 * writebacks MUST be delivered in order or it will
1698 * completely screw up our bookeeping.
1700 txctrl
= rd32(E1000_DCA_TXCTRL(j
));
1701 txctrl
&= ~E1000_DCA_TXCTRL_TX_WB_RO_EN
;
1702 wr32(E1000_DCA_TXCTRL(j
), txctrl
);
1707 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1709 /* Program the Transmit Control Register */
1711 tctl
= rd32(E1000_TCTL
);
1712 tctl
&= ~E1000_TCTL_CT
;
1713 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
1714 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
1716 igb_config_collision_dist(hw
);
1718 /* Setup Transmit Descriptor Settings for eop descriptor */
1719 adapter
->txd_cmd
= E1000_TXD_CMD_EOP
| E1000_TXD_CMD_RS
;
1721 /* Enable transmits */
1722 tctl
|= E1000_TCTL_EN
;
1724 wr32(E1000_TCTL
, tctl
);
1728 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1729 * @adapter: board private structure
1730 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1732 * Returns 0 on success, negative on failure
1735 int igb_setup_rx_resources(struct igb_adapter
*adapter
,
1736 struct igb_ring
*rx_ring
)
1738 struct pci_dev
*pdev
= adapter
->pdev
;
1741 #ifdef CONFIG_IGB_LRO
1742 size
= sizeof(struct net_lro_desc
) * MAX_LRO_DESCRIPTORS
;
1743 rx_ring
->lro_mgr
.lro_arr
= vmalloc(size
);
1744 if (!rx_ring
->lro_mgr
.lro_arr
)
1746 memset(rx_ring
->lro_mgr
.lro_arr
, 0, size
);
1749 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
1750 rx_ring
->buffer_info
= vmalloc(size
);
1751 if (!rx_ring
->buffer_info
)
1753 memset(rx_ring
->buffer_info
, 0, size
);
1755 desc_len
= sizeof(union e1000_adv_rx_desc
);
1757 /* Round up to nearest 4K */
1758 rx_ring
->size
= rx_ring
->count
* desc_len
;
1759 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
1761 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
1767 rx_ring
->next_to_clean
= 0;
1768 rx_ring
->next_to_use
= 0;
1770 rx_ring
->adapter
= adapter
;
1775 #ifdef CONFIG_IGB_LRO
1776 vfree(rx_ring
->lro_mgr
.lro_arr
);
1777 rx_ring
->lro_mgr
.lro_arr
= NULL
;
1779 vfree(rx_ring
->buffer_info
);
1780 dev_err(&adapter
->pdev
->dev
, "Unable to allocate memory for "
1781 "the receive descriptor ring\n");
1786 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1787 * (Descriptors) for all queues
1788 * @adapter: board private structure
1790 * Return 0 on success, negative on failure
1792 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
1796 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1797 err
= igb_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
1799 dev_err(&adapter
->pdev
->dev
,
1800 "Allocation for Rx Queue %u failed\n", i
);
1801 for (i
--; i
>= 0; i
--)
1802 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
1811 * igb_setup_rctl - configure the receive control registers
1812 * @adapter: Board private structure
1814 static void igb_setup_rctl(struct igb_adapter
*adapter
)
1816 struct e1000_hw
*hw
= &adapter
->hw
;
1821 rctl
= rd32(E1000_RCTL
);
1823 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
1824 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1826 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
1827 (adapter
->hw
.mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
1830 * enable stripping of CRC. It's unlikely this will break BMC
1831 * redirection as it did with e1000. Newer features require
1832 * that the HW strips the CRC.
1834 rctl
|= E1000_RCTL_SECRC
;
1837 * disable store bad packets and clear size bits.
1839 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
1841 /* enable LPE when to prevent packets larger than max_frame_size */
1842 rctl
|= E1000_RCTL_LPE
;
1844 /* Setup buffer sizes */
1845 switch (adapter
->rx_buffer_len
) {
1846 case IGB_RXBUFFER_256
:
1847 rctl
|= E1000_RCTL_SZ_256
;
1849 case IGB_RXBUFFER_512
:
1850 rctl
|= E1000_RCTL_SZ_512
;
1853 srrctl
= ALIGN(adapter
->rx_buffer_len
, 1024)
1854 >> E1000_SRRCTL_BSIZEPKT_SHIFT
;
1858 /* 82575 and greater support packet-split where the protocol
1859 * header is placed in skb->data and the packet data is
1860 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1861 * In the case of a non-split, skb->data is linearly filled,
1862 * followed by the page buffers. Therefore, skb->data is
1863 * sized to hold the largest protocol header.
1865 /* allocations using alloc_page take too long for regular MTU
1866 * so only enable packet split for jumbo frames */
1867 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
1868 adapter
->rx_ps_hdr_size
= IGB_RXBUFFER_128
;
1869 srrctl
|= adapter
->rx_ps_hdr_size
<<
1870 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
1871 srrctl
|= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1873 adapter
->rx_ps_hdr_size
= 0;
1874 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1877 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1878 j
= adapter
->rx_ring
[i
].reg_idx
;
1879 wr32(E1000_SRRCTL(j
), srrctl
);
1882 wr32(E1000_RCTL
, rctl
);
1886 * igb_configure_rx - Configure receive Unit after Reset
1887 * @adapter: board private structure
1889 * Configure the Rx unit of the MAC after a reset.
1891 static void igb_configure_rx(struct igb_adapter
*adapter
)
1894 struct e1000_hw
*hw
= &adapter
->hw
;
1899 /* disable receives while setting up the descriptors */
1900 rctl
= rd32(E1000_RCTL
);
1901 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1905 if (adapter
->itr_setting
> 3)
1906 wr32(E1000_ITR
, adapter
->itr
);
1908 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1909 * the Base and Length of the Rx Descriptor Ring */
1910 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1911 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
1914 wr32(E1000_RDBAL(j
),
1915 rdba
& 0x00000000ffffffffULL
);
1916 wr32(E1000_RDBAH(j
), rdba
>> 32);
1917 wr32(E1000_RDLEN(j
),
1918 ring
->count
* sizeof(union e1000_adv_rx_desc
));
1920 ring
->head
= E1000_RDH(j
);
1921 ring
->tail
= E1000_RDT(j
);
1922 writel(0, hw
->hw_addr
+ ring
->tail
);
1923 writel(0, hw
->hw_addr
+ ring
->head
);
1925 rxdctl
= rd32(E1000_RXDCTL(j
));
1926 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
1927 rxdctl
&= 0xFFF00000;
1928 rxdctl
|= IGB_RX_PTHRESH
;
1929 rxdctl
|= IGB_RX_HTHRESH
<< 8;
1930 rxdctl
|= IGB_RX_WTHRESH
<< 16;
1931 wr32(E1000_RXDCTL(j
), rxdctl
);
1932 #ifdef CONFIG_IGB_LRO
1933 /* Intitial LRO Settings */
1934 ring
->lro_mgr
.max_aggr
= MAX_LRO_AGGR
;
1935 ring
->lro_mgr
.max_desc
= MAX_LRO_DESCRIPTORS
;
1936 ring
->lro_mgr
.get_skb_header
= igb_get_skb_hdr
;
1937 ring
->lro_mgr
.features
= LRO_F_NAPI
| LRO_F_EXTRACT_VLAN_ID
;
1938 ring
->lro_mgr
.dev
= adapter
->netdev
;
1939 ring
->lro_mgr
.ip_summed
= CHECKSUM_UNNECESSARY
;
1940 ring
->lro_mgr
.ip_summed_aggr
= CHECKSUM_UNNECESSARY
;
1944 if (adapter
->num_rx_queues
> 1) {
1953 get_random_bytes(&random
[0], 40);
1955 if (hw
->mac
.type
>= e1000_82576
)
1959 for (j
= 0; j
< (32 * 4); j
++) {
1961 adapter
->rx_ring
[(j
% adapter
->num_rx_queues
)].reg_idx
<< shift
;
1964 hw
->hw_addr
+ E1000_RETA(0) + (j
& ~3));
1966 mrqc
= E1000_MRQC_ENABLE_RSS_4Q
;
1968 /* Fill out hash function seeds */
1969 for (j
= 0; j
< 10; j
++)
1970 array_wr32(E1000_RSSRK(0), j
, random
[j
]);
1972 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4
|
1973 E1000_MRQC_RSS_FIELD_IPV4_TCP
);
1974 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6
|
1975 E1000_MRQC_RSS_FIELD_IPV6_TCP
);
1976 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4_UDP
|
1977 E1000_MRQC_RSS_FIELD_IPV6_UDP
);
1978 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX
|
1979 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
);
1982 wr32(E1000_MRQC
, mrqc
);
1984 /* Multiqueue and raw packet checksumming are mutually
1985 * exclusive. Note that this not the same as TCP/IP
1986 * checksumming, which works fine. */
1987 rxcsum
= rd32(E1000_RXCSUM
);
1988 rxcsum
|= E1000_RXCSUM_PCSD
;
1989 wr32(E1000_RXCSUM
, rxcsum
);
1991 /* Enable Receive Checksum Offload for TCP and UDP */
1992 rxcsum
= rd32(E1000_RXCSUM
);
1993 if (adapter
->rx_csum
) {
1994 rxcsum
|= E1000_RXCSUM_TUOFL
;
1996 /* Enable IPv4 payload checksum for UDP fragments
1997 * Must be used in conjunction with packet-split. */
1998 if (adapter
->rx_ps_hdr_size
)
1999 rxcsum
|= E1000_RXCSUM_IPPCSE
;
2001 rxcsum
&= ~E1000_RXCSUM_TUOFL
;
2002 /* don't need to clear IPPCSE as it defaults to 0 */
2004 wr32(E1000_RXCSUM
, rxcsum
);
2009 adapter
->max_frame_size
+ VLAN_TAG_SIZE
);
2011 wr32(E1000_RLPML
, adapter
->max_frame_size
);
2013 /* Enable Receives */
2014 wr32(E1000_RCTL
, rctl
);
2018 * igb_free_tx_resources - Free Tx Resources per Queue
2019 * @tx_ring: Tx descriptor ring for a specific queue
2021 * Free all transmit software resources
2023 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
2025 struct pci_dev
*pdev
= tx_ring
->adapter
->pdev
;
2027 igb_clean_tx_ring(tx_ring
);
2029 vfree(tx_ring
->buffer_info
);
2030 tx_ring
->buffer_info
= NULL
;
2032 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2034 tx_ring
->desc
= NULL
;
2038 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2039 * @adapter: board private structure
2041 * Free all transmit software resources
2043 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
2047 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2048 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
2051 static void igb_unmap_and_free_tx_resource(struct igb_adapter
*adapter
,
2052 struct igb_buffer
*buffer_info
)
2054 if (buffer_info
->dma
) {
2055 pci_unmap_page(adapter
->pdev
,
2057 buffer_info
->length
,
2059 buffer_info
->dma
= 0;
2061 if (buffer_info
->skb
) {
2062 dev_kfree_skb_any(buffer_info
->skb
);
2063 buffer_info
->skb
= NULL
;
2065 buffer_info
->time_stamp
= 0;
2066 /* buffer_info must be completely set up in the transmit path */
2070 * igb_clean_tx_ring - Free Tx Buffers
2071 * @tx_ring: ring to be cleaned
2073 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
2075 struct igb_adapter
*adapter
= tx_ring
->adapter
;
2076 struct igb_buffer
*buffer_info
;
2080 if (!tx_ring
->buffer_info
)
2082 /* Free all the Tx ring sk_buffs */
2084 for (i
= 0; i
< tx_ring
->count
; i
++) {
2085 buffer_info
= &tx_ring
->buffer_info
[i
];
2086 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
2089 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
2090 memset(tx_ring
->buffer_info
, 0, size
);
2092 /* Zero out the descriptor ring */
2094 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2096 tx_ring
->next_to_use
= 0;
2097 tx_ring
->next_to_clean
= 0;
2099 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2100 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2104 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2105 * @adapter: board private structure
2107 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
2111 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2112 igb_clean_tx_ring(&adapter
->tx_ring
[i
]);
2116 * igb_free_rx_resources - Free Rx Resources
2117 * @rx_ring: ring to clean the resources from
2119 * Free all receive software resources
2121 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
2123 struct pci_dev
*pdev
= rx_ring
->adapter
->pdev
;
2125 igb_clean_rx_ring(rx_ring
);
2127 vfree(rx_ring
->buffer_info
);
2128 rx_ring
->buffer_info
= NULL
;
2130 #ifdef CONFIG_IGB_LRO
2131 vfree(rx_ring
->lro_mgr
.lro_arr
);
2132 rx_ring
->lro_mgr
.lro_arr
= NULL
;
2135 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2137 rx_ring
->desc
= NULL
;
2141 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2142 * @adapter: board private structure
2144 * Free all receive software resources
2146 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
2150 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2151 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2155 * igb_clean_rx_ring - Free Rx Buffers per Queue
2156 * @rx_ring: ring to free buffers from
2158 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
2160 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2161 struct igb_buffer
*buffer_info
;
2162 struct pci_dev
*pdev
= adapter
->pdev
;
2166 if (!rx_ring
->buffer_info
)
2168 /* Free all the Rx ring sk_buffs */
2169 for (i
= 0; i
< rx_ring
->count
; i
++) {
2170 buffer_info
= &rx_ring
->buffer_info
[i
];
2171 if (buffer_info
->dma
) {
2172 if (adapter
->rx_ps_hdr_size
)
2173 pci_unmap_single(pdev
, buffer_info
->dma
,
2174 adapter
->rx_ps_hdr_size
,
2175 PCI_DMA_FROMDEVICE
);
2177 pci_unmap_single(pdev
, buffer_info
->dma
,
2178 adapter
->rx_buffer_len
,
2179 PCI_DMA_FROMDEVICE
);
2180 buffer_info
->dma
= 0;
2183 if (buffer_info
->skb
) {
2184 dev_kfree_skb(buffer_info
->skb
);
2185 buffer_info
->skb
= NULL
;
2187 if (buffer_info
->page
) {
2188 if (buffer_info
->page_dma
)
2189 pci_unmap_page(pdev
, buffer_info
->page_dma
,
2191 PCI_DMA_FROMDEVICE
);
2192 put_page(buffer_info
->page
);
2193 buffer_info
->page
= NULL
;
2194 buffer_info
->page_dma
= 0;
2195 buffer_info
->page_offset
= 0;
2199 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
2200 memset(rx_ring
->buffer_info
, 0, size
);
2202 /* Zero out the descriptor ring */
2203 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2205 rx_ring
->next_to_clean
= 0;
2206 rx_ring
->next_to_use
= 0;
2208 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2209 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2213 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2214 * @adapter: board private structure
2216 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
2220 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2221 igb_clean_rx_ring(&adapter
->rx_ring
[i
]);
2225 * igb_set_mac - Change the Ethernet Address of the NIC
2226 * @netdev: network interface device structure
2227 * @p: pointer to an address structure
2229 * Returns 0 on success, negative on failure
2231 static int igb_set_mac(struct net_device
*netdev
, void *p
)
2233 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2234 struct sockaddr
*addr
= p
;
2236 if (!is_valid_ether_addr(addr
->sa_data
))
2237 return -EADDRNOTAVAIL
;
2239 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
2240 memcpy(adapter
->hw
.mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
2242 adapter
->hw
.mac
.ops
.rar_set(&adapter
->hw
, adapter
->hw
.mac
.addr
, 0);
2248 * igb_set_multi - Multicast and Promiscuous mode set
2249 * @netdev: network interface device structure
2251 * The set_multi entry point is called whenever the multicast address
2252 * list or the network interface flags are updated. This routine is
2253 * responsible for configuring the hardware for proper multicast,
2254 * promiscuous mode, and all-multi behavior.
2256 static void igb_set_multi(struct net_device
*netdev
)
2258 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2259 struct e1000_hw
*hw
= &adapter
->hw
;
2260 struct e1000_mac_info
*mac
= &hw
->mac
;
2261 struct dev_mc_list
*mc_ptr
;
2266 /* Check for Promiscuous and All Multicast modes */
2268 rctl
= rd32(E1000_RCTL
);
2270 if (netdev
->flags
& IFF_PROMISC
) {
2271 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2272 rctl
&= ~E1000_RCTL_VFE
;
2274 if (netdev
->flags
& IFF_ALLMULTI
) {
2275 rctl
|= E1000_RCTL_MPE
;
2276 rctl
&= ~E1000_RCTL_UPE
;
2278 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2279 rctl
|= E1000_RCTL_VFE
;
2281 wr32(E1000_RCTL
, rctl
);
2283 if (!netdev
->mc_count
) {
2284 /* nothing to program, so clear mc list */
2285 igb_update_mc_addr_list_82575(hw
, NULL
, 0, 1,
2286 mac
->rar_entry_count
);
2290 mta_list
= kzalloc(netdev
->mc_count
* 6, GFP_ATOMIC
);
2294 /* The shared function expects a packed array of only addresses. */
2295 mc_ptr
= netdev
->mc_list
;
2297 for (i
= 0; i
< netdev
->mc_count
; i
++) {
2300 memcpy(mta_list
+ (i
*ETH_ALEN
), mc_ptr
->dmi_addr
, ETH_ALEN
);
2301 mc_ptr
= mc_ptr
->next
;
2303 igb_update_mc_addr_list_82575(hw
, mta_list
, i
, 1,
2304 mac
->rar_entry_count
);
2308 /* Need to wait a few seconds after link up to get diagnostic information from
2310 static void igb_update_phy_info(unsigned long data
)
2312 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
2313 igb_get_phy_info(&adapter
->hw
);
2317 * igb_watchdog - Timer Call-back
2318 * @data: pointer to adapter cast into an unsigned long
2320 static void igb_watchdog(unsigned long data
)
2322 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
2323 /* Do the rest outside of interrupt context */
2324 schedule_work(&adapter
->watchdog_task
);
2327 static void igb_watchdog_task(struct work_struct
*work
)
2329 struct igb_adapter
*adapter
= container_of(work
,
2330 struct igb_adapter
, watchdog_task
);
2331 struct e1000_hw
*hw
= &adapter
->hw
;
2333 struct net_device
*netdev
= adapter
->netdev
;
2334 struct igb_ring
*tx_ring
= adapter
->tx_ring
;
2335 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
2341 if ((netif_carrier_ok(netdev
)) &&
2342 (rd32(E1000_STATUS
) & E1000_STATUS_LU
))
2345 ret_val
= hw
->mac
.ops
.check_for_link(&adapter
->hw
);
2346 if ((ret_val
== E1000_ERR_PHY
) &&
2347 (hw
->phy
.type
== e1000_phy_igp_3
) &&
2349 E1000_PHY_CTRL_GBE_DISABLE
))
2350 dev_info(&adapter
->pdev
->dev
,
2351 "Gigabit has been disabled, downgrading speed\n");
2353 if ((hw
->phy
.media_type
== e1000_media_type_internal_serdes
) &&
2354 !(rd32(E1000_TXCW
) & E1000_TXCW_ANE
))
2355 link
= mac
->serdes_has_link
;
2357 link
= rd32(E1000_STATUS
) &
2361 if (!netif_carrier_ok(netdev
)) {
2363 hw
->mac
.ops
.get_speed_and_duplex(&adapter
->hw
,
2364 &adapter
->link_speed
,
2365 &adapter
->link_duplex
);
2367 ctrl
= rd32(E1000_CTRL
);
2368 /* Links status message must follow this format */
2369 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s, "
2370 "Flow Control: %s\n",
2372 adapter
->link_speed
,
2373 adapter
->link_duplex
== FULL_DUPLEX
?
2374 "Full Duplex" : "Half Duplex",
2375 ((ctrl
& E1000_CTRL_TFCE
) && (ctrl
&
2376 E1000_CTRL_RFCE
)) ? "RX/TX" : ((ctrl
&
2377 E1000_CTRL_RFCE
) ? "RX" : ((ctrl
&
2378 E1000_CTRL_TFCE
) ? "TX" : "None")));
2380 /* tweak tx_queue_len according to speed/duplex and
2381 * adjust the timeout factor */
2382 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
2383 adapter
->tx_timeout_factor
= 1;
2384 switch (adapter
->link_speed
) {
2386 netdev
->tx_queue_len
= 10;
2387 adapter
->tx_timeout_factor
= 14;
2390 netdev
->tx_queue_len
= 100;
2391 /* maybe add some timeout factor ? */
2395 netif_carrier_on(netdev
);
2396 netif_tx_wake_all_queues(netdev
);
2398 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2399 mod_timer(&adapter
->phy_info_timer
,
2400 round_jiffies(jiffies
+ 2 * HZ
));
2403 if (netif_carrier_ok(netdev
)) {
2404 adapter
->link_speed
= 0;
2405 adapter
->link_duplex
= 0;
2406 /* Links status message must follow this format */
2407 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
2409 netif_carrier_off(netdev
);
2410 netif_tx_stop_all_queues(netdev
);
2411 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2412 mod_timer(&adapter
->phy_info_timer
,
2413 round_jiffies(jiffies
+ 2 * HZ
));
2418 igb_update_stats(adapter
);
2420 mac
->tx_packet_delta
= adapter
->stats
.tpt
- adapter
->tpt_old
;
2421 adapter
->tpt_old
= adapter
->stats
.tpt
;
2422 mac
->collision_delta
= adapter
->stats
.colc
- adapter
->colc_old
;
2423 adapter
->colc_old
= adapter
->stats
.colc
;
2425 adapter
->gorc
= adapter
->stats
.gorc
- adapter
->gorc_old
;
2426 adapter
->gorc_old
= adapter
->stats
.gorc
;
2427 adapter
->gotc
= adapter
->stats
.gotc
- adapter
->gotc_old
;
2428 adapter
->gotc_old
= adapter
->stats
.gotc
;
2430 igb_update_adaptive(&adapter
->hw
);
2432 if (!netif_carrier_ok(netdev
)) {
2433 if (IGB_DESC_UNUSED(tx_ring
) + 1 < tx_ring
->count
) {
2434 /* We've lost link, so the controller stops DMA,
2435 * but we've got queued Tx work that's never going
2436 * to get done, so reset controller to flush Tx.
2437 * (Do the reset outside of interrupt context). */
2438 adapter
->tx_timeout_count
++;
2439 schedule_work(&adapter
->reset_task
);
2443 /* Cause software interrupt to ensure rx ring is cleaned */
2444 if (adapter
->msix_entries
) {
2445 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2446 eics
|= adapter
->rx_ring
[i
].eims_value
;
2447 wr32(E1000_EICS
, eics
);
2449 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
2452 /* Force detection of hung controller every watchdog period */
2453 tx_ring
->detect_tx_hung
= true;
2455 /* Reset the timer */
2456 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2457 mod_timer(&adapter
->watchdog_timer
,
2458 round_jiffies(jiffies
+ 2 * HZ
));
2461 enum latency_range
{
2465 latency_invalid
= 255
2470 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2472 * Stores a new ITR value based on strictly on packet size. This
2473 * algorithm is less sophisticated than that used in igb_update_itr,
2474 * due to the difficulty of synchronizing statistics across multiple
2475 * receive rings. The divisors and thresholds used by this fuction
2476 * were determined based on theoretical maximum wire speed and testing
2477 * data, in order to minimize response time while increasing bulk
2479 * This functionality is controlled by the InterruptThrottleRate module
2480 * parameter (see igb_param.c)
2481 * NOTE: This function is called only when operating in a multiqueue
2482 * receive environment.
2483 * @rx_ring: pointer to ring
2485 static void igb_update_ring_itr(struct igb_ring
*rx_ring
)
2487 int new_val
= rx_ring
->itr_val
;
2488 int avg_wire_size
= 0;
2489 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2491 if (!rx_ring
->total_packets
)
2492 goto clear_counts
; /* no packets, so don't do anything */
2494 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2495 * ints/sec - ITR timer value of 120 ticks.
2497 if (adapter
->link_speed
!= SPEED_1000
) {
2501 avg_wire_size
= rx_ring
->total_bytes
/ rx_ring
->total_packets
;
2503 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2504 avg_wire_size
+= 24;
2506 /* Don't starve jumbo frames */
2507 avg_wire_size
= min(avg_wire_size
, 3000);
2509 /* Give a little boost to mid-size frames */
2510 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
2511 new_val
= avg_wire_size
/ 3;
2513 new_val
= avg_wire_size
/ 2;
2516 if (new_val
!= rx_ring
->itr_val
) {
2517 rx_ring
->itr_val
= new_val
;
2518 rx_ring
->set_itr
= 1;
2521 rx_ring
->total_bytes
= 0;
2522 rx_ring
->total_packets
= 0;
2526 * igb_update_itr - update the dynamic ITR value based on statistics
2527 * Stores a new ITR value based on packets and byte
2528 * counts during the last interrupt. The advantage of per interrupt
2529 * computation is faster updates and more accurate ITR for the current
2530 * traffic pattern. Constants in this function were computed
2531 * based on theoretical maximum wire speed and thresholds were set based
2532 * on testing data as well as attempting to minimize response time
2533 * while increasing bulk throughput.
2534 * this functionality is controlled by the InterruptThrottleRate module
2535 * parameter (see igb_param.c)
2536 * NOTE: These calculations are only valid when operating in a single-
2537 * queue environment.
2538 * @adapter: pointer to adapter
2539 * @itr_setting: current adapter->itr
2540 * @packets: the number of packets during this measurement interval
2541 * @bytes: the number of bytes during this measurement interval
2543 static unsigned int igb_update_itr(struct igb_adapter
*adapter
, u16 itr_setting
,
2544 int packets
, int bytes
)
2546 unsigned int retval
= itr_setting
;
2549 goto update_itr_done
;
2551 switch (itr_setting
) {
2552 case lowest_latency
:
2553 /* handle TSO and jumbo frames */
2554 if (bytes
/packets
> 8000)
2555 retval
= bulk_latency
;
2556 else if ((packets
< 5) && (bytes
> 512))
2557 retval
= low_latency
;
2559 case low_latency
: /* 50 usec aka 20000 ints/s */
2560 if (bytes
> 10000) {
2561 /* this if handles the TSO accounting */
2562 if (bytes
/packets
> 8000) {
2563 retval
= bulk_latency
;
2564 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
2565 retval
= bulk_latency
;
2566 } else if ((packets
> 35)) {
2567 retval
= lowest_latency
;
2569 } else if (bytes
/packets
> 2000) {
2570 retval
= bulk_latency
;
2571 } else if (packets
<= 2 && bytes
< 512) {
2572 retval
= lowest_latency
;
2575 case bulk_latency
: /* 250 usec aka 4000 ints/s */
2576 if (bytes
> 25000) {
2578 retval
= low_latency
;
2579 } else if (bytes
< 6000) {
2580 retval
= low_latency
;
2589 static void igb_set_itr(struct igb_adapter
*adapter
)
2592 u32 new_itr
= adapter
->itr
;
2594 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2595 if (adapter
->link_speed
!= SPEED_1000
) {
2601 adapter
->rx_itr
= igb_update_itr(adapter
,
2603 adapter
->rx_ring
->total_packets
,
2604 adapter
->rx_ring
->total_bytes
);
2606 if (adapter
->rx_ring
->buddy
) {
2607 adapter
->tx_itr
= igb_update_itr(adapter
,
2609 adapter
->tx_ring
->total_packets
,
2610 adapter
->tx_ring
->total_bytes
);
2612 current_itr
= max(adapter
->rx_itr
, adapter
->tx_itr
);
2614 current_itr
= adapter
->rx_itr
;
2617 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2618 if (adapter
->itr_setting
== 3 &&
2619 current_itr
== lowest_latency
)
2620 current_itr
= low_latency
;
2622 switch (current_itr
) {
2623 /* counts and packets in update_itr are dependent on these numbers */
2624 case lowest_latency
:
2628 new_itr
= 20000; /* aka hwitr = ~200 */
2638 adapter
->rx_ring
->total_bytes
= 0;
2639 adapter
->rx_ring
->total_packets
= 0;
2640 if (adapter
->rx_ring
->buddy
) {
2641 adapter
->rx_ring
->buddy
->total_bytes
= 0;
2642 adapter
->rx_ring
->buddy
->total_packets
= 0;
2645 if (new_itr
!= adapter
->itr
) {
2646 /* this attempts to bias the interrupt rate towards Bulk
2647 * by adding intermediate steps when interrupt rate is
2649 new_itr
= new_itr
> adapter
->itr
?
2650 min(adapter
->itr
+ (new_itr
>> 2), new_itr
) :
2652 /* Don't write the value here; it resets the adapter's
2653 * internal timer, and causes us to delay far longer than
2654 * we should between interrupts. Instead, we write the ITR
2655 * value at the beginning of the next interrupt so the timing
2656 * ends up being correct.
2658 adapter
->itr
= new_itr
;
2659 adapter
->rx_ring
->itr_val
= 1000000000 / (new_itr
* 256);
2660 adapter
->rx_ring
->set_itr
= 1;
2667 #define IGB_TX_FLAGS_CSUM 0x00000001
2668 #define IGB_TX_FLAGS_VLAN 0x00000002
2669 #define IGB_TX_FLAGS_TSO 0x00000004
2670 #define IGB_TX_FLAGS_IPV4 0x00000008
2671 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2672 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2674 static inline int igb_tso_adv(struct igb_adapter
*adapter
,
2675 struct igb_ring
*tx_ring
,
2676 struct sk_buff
*skb
, u32 tx_flags
, u8
*hdr_len
)
2678 struct e1000_adv_tx_context_desc
*context_desc
;
2681 struct igb_buffer
*buffer_info
;
2682 u32 info
= 0, tu_cmd
= 0;
2683 u32 mss_l4len_idx
, l4len
;
2686 if (skb_header_cloned(skb
)) {
2687 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2692 l4len
= tcp_hdrlen(skb
);
2695 if (skb
->protocol
== htons(ETH_P_IP
)) {
2696 struct iphdr
*iph
= ip_hdr(skb
);
2699 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2703 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
2704 ipv6_hdr(skb
)->payload_len
= 0;
2705 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
2706 &ipv6_hdr(skb
)->daddr
,
2710 i
= tx_ring
->next_to_use
;
2712 buffer_info
= &tx_ring
->buffer_info
[i
];
2713 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2714 /* VLAN MACLEN IPLEN */
2715 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2716 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2717 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2718 *hdr_len
+= skb_network_offset(skb
);
2719 info
|= skb_network_header_len(skb
);
2720 *hdr_len
+= skb_network_header_len(skb
);
2721 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2723 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2724 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2726 if (skb
->protocol
== htons(ETH_P_IP
))
2727 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2728 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2730 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2733 mss_l4len_idx
= (skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
);
2734 mss_l4len_idx
|= (l4len
<< E1000_ADVTXD_L4LEN_SHIFT
);
2736 /* Context index must be unique per ring. */
2737 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2738 mss_l4len_idx
|= tx_ring
->queue_index
<< 4;
2740 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
2741 context_desc
->seqnum_seed
= 0;
2743 buffer_info
->time_stamp
= jiffies
;
2744 buffer_info
->next_to_watch
= i
;
2745 buffer_info
->dma
= 0;
2747 if (i
== tx_ring
->count
)
2750 tx_ring
->next_to_use
= i
;
2755 static inline bool igb_tx_csum_adv(struct igb_adapter
*adapter
,
2756 struct igb_ring
*tx_ring
,
2757 struct sk_buff
*skb
, u32 tx_flags
)
2759 struct e1000_adv_tx_context_desc
*context_desc
;
2761 struct igb_buffer
*buffer_info
;
2762 u32 info
= 0, tu_cmd
= 0;
2764 if ((skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
2765 (tx_flags
& IGB_TX_FLAGS_VLAN
)) {
2766 i
= tx_ring
->next_to_use
;
2767 buffer_info
= &tx_ring
->buffer_info
[i
];
2768 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
2770 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2771 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
2772 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
2773 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2774 info
|= skb_network_header_len(skb
);
2776 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
2778 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
2780 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
2781 switch (skb
->protocol
) {
2782 case __constant_htons(ETH_P_IP
):
2783 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
2784 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
2785 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2787 case __constant_htons(ETH_P_IPV6
):
2788 /* XXX what about other V6 headers?? */
2789 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
2790 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
2793 if (unlikely(net_ratelimit()))
2794 dev_warn(&adapter
->pdev
->dev
,
2795 "partial checksum but proto=%x!\n",
2801 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
2802 context_desc
->seqnum_seed
= 0;
2803 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
2804 context_desc
->mss_l4len_idx
=
2805 cpu_to_le32(tx_ring
->queue_index
<< 4);
2807 buffer_info
->time_stamp
= jiffies
;
2808 buffer_info
->next_to_watch
= i
;
2809 buffer_info
->dma
= 0;
2812 if (i
== tx_ring
->count
)
2814 tx_ring
->next_to_use
= i
;
2823 #define IGB_MAX_TXD_PWR 16
2824 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2826 static inline int igb_tx_map_adv(struct igb_adapter
*adapter
,
2827 struct igb_ring
*tx_ring
, struct sk_buff
*skb
,
2830 struct igb_buffer
*buffer_info
;
2831 unsigned int len
= skb_headlen(skb
);
2832 unsigned int count
= 0, i
;
2835 i
= tx_ring
->next_to_use
;
2837 buffer_info
= &tx_ring
->buffer_info
[i
];
2838 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
2839 buffer_info
->length
= len
;
2840 /* set time_stamp *before* dma to help avoid a possible race */
2841 buffer_info
->time_stamp
= jiffies
;
2842 buffer_info
->next_to_watch
= i
;
2843 buffer_info
->dma
= pci_map_single(adapter
->pdev
, skb
->data
, len
,
2847 if (i
== tx_ring
->count
)
2850 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++) {
2851 struct skb_frag_struct
*frag
;
2853 frag
= &skb_shinfo(skb
)->frags
[f
];
2856 buffer_info
= &tx_ring
->buffer_info
[i
];
2857 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
2858 buffer_info
->length
= len
;
2859 buffer_info
->time_stamp
= jiffies
;
2860 buffer_info
->next_to_watch
= i
;
2861 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
2869 if (i
== tx_ring
->count
)
2873 i
= ((i
== 0) ? tx_ring
->count
- 1 : i
- 1);
2874 tx_ring
->buffer_info
[i
].skb
= skb
;
2875 tx_ring
->buffer_info
[first
].next_to_watch
= i
;
2880 static inline void igb_tx_queue_adv(struct igb_adapter
*adapter
,
2881 struct igb_ring
*tx_ring
,
2882 int tx_flags
, int count
, u32 paylen
,
2885 union e1000_adv_tx_desc
*tx_desc
= NULL
;
2886 struct igb_buffer
*buffer_info
;
2887 u32 olinfo_status
= 0, cmd_type_len
;
2890 cmd_type_len
= (E1000_ADVTXD_DTYP_DATA
| E1000_ADVTXD_DCMD_IFCS
|
2891 E1000_ADVTXD_DCMD_DEXT
);
2893 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
2894 cmd_type_len
|= E1000_ADVTXD_DCMD_VLE
;
2896 if (tx_flags
& IGB_TX_FLAGS_TSO
) {
2897 cmd_type_len
|= E1000_ADVTXD_DCMD_TSE
;
2899 /* insert tcp checksum */
2900 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
2902 /* insert ip checksum */
2903 if (tx_flags
& IGB_TX_FLAGS_IPV4
)
2904 olinfo_status
|= E1000_TXD_POPTS_IXSM
<< 8;
2906 } else if (tx_flags
& IGB_TX_FLAGS_CSUM
) {
2907 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
2910 if ((adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
) &&
2911 (tx_flags
& (IGB_TX_FLAGS_CSUM
| IGB_TX_FLAGS_TSO
|
2912 IGB_TX_FLAGS_VLAN
)))
2913 olinfo_status
|= tx_ring
->queue_index
<< 4;
2915 olinfo_status
|= ((paylen
- hdr_len
) << E1000_ADVTXD_PAYLEN_SHIFT
);
2917 i
= tx_ring
->next_to_use
;
2919 buffer_info
= &tx_ring
->buffer_info
[i
];
2920 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
2921 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
2922 tx_desc
->read
.cmd_type_len
=
2923 cpu_to_le32(cmd_type_len
| buffer_info
->length
);
2924 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
2926 if (i
== tx_ring
->count
)
2930 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(adapter
->txd_cmd
);
2931 /* Force memory writes to complete before letting h/w
2932 * know there are new descriptors to fetch. (Only
2933 * applicable for weak-ordered memory model archs,
2934 * such as IA-64). */
2937 tx_ring
->next_to_use
= i
;
2938 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2939 /* we need this if more than one processor can write to our tail
2940 * at a time, it syncronizes IO on IA64/Altix systems */
2944 static int __igb_maybe_stop_tx(struct net_device
*netdev
,
2945 struct igb_ring
*tx_ring
, int size
)
2947 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2949 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
2951 /* Herbert's original patch had:
2952 * smp_mb__after_netif_stop_queue();
2953 * but since that doesn't exist yet, just open code it. */
2956 /* We need to check again in a case another CPU has just
2957 * made room available. */
2958 if (IGB_DESC_UNUSED(tx_ring
) < size
)
2962 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
2963 ++adapter
->restart_queue
;
2967 static int igb_maybe_stop_tx(struct net_device
*netdev
,
2968 struct igb_ring
*tx_ring
, int size
)
2970 if (IGB_DESC_UNUSED(tx_ring
) >= size
)
2972 return __igb_maybe_stop_tx(netdev
, tx_ring
, size
);
2975 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2977 static int igb_xmit_frame_ring_adv(struct sk_buff
*skb
,
2978 struct net_device
*netdev
,
2979 struct igb_ring
*tx_ring
)
2981 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2983 unsigned int tx_flags
= 0;
2988 len
= skb_headlen(skb
);
2990 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
2991 dev_kfree_skb_any(skb
);
2992 return NETDEV_TX_OK
;
2995 if (skb
->len
<= 0) {
2996 dev_kfree_skb_any(skb
);
2997 return NETDEV_TX_OK
;
3000 /* need: 1 descriptor per page,
3001 * + 2 desc gap to keep tail from touching head,
3002 * + 1 desc for skb->data,
3003 * + 1 desc for context descriptor,
3004 * otherwise try next time */
3005 if (igb_maybe_stop_tx(netdev
, tx_ring
, skb_shinfo(skb
)->nr_frags
+ 4)) {
3006 /* this is a hard error */
3007 return NETDEV_TX_BUSY
;
3011 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3012 tx_flags
|= IGB_TX_FLAGS_VLAN
;
3013 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
3016 if (skb
->protocol
== htons(ETH_P_IP
))
3017 tx_flags
|= IGB_TX_FLAGS_IPV4
;
3019 first
= tx_ring
->next_to_use
;
3021 tso
= skb_is_gso(skb
) ? igb_tso_adv(adapter
, tx_ring
, skb
, tx_flags
,
3025 dev_kfree_skb_any(skb
);
3026 return NETDEV_TX_OK
;
3030 tx_flags
|= IGB_TX_FLAGS_TSO
;
3031 else if (igb_tx_csum_adv(adapter
, tx_ring
, skb
, tx_flags
))
3032 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3033 tx_flags
|= IGB_TX_FLAGS_CSUM
;
3035 igb_tx_queue_adv(adapter
, tx_ring
, tx_flags
,
3036 igb_tx_map_adv(adapter
, tx_ring
, skb
, first
),
3039 netdev
->trans_start
= jiffies
;
3041 /* Make sure there is space in the ring for the next send. */
3042 igb_maybe_stop_tx(netdev
, tx_ring
, MAX_SKB_FRAGS
+ 4);
3044 return NETDEV_TX_OK
;
3047 static int igb_xmit_frame_adv(struct sk_buff
*skb
, struct net_device
*netdev
)
3049 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3050 struct igb_ring
*tx_ring
;
3053 r_idx
= skb
->queue_mapping
& (IGB_MAX_TX_QUEUES
- 1);
3054 tx_ring
= adapter
->multi_tx_table
[r_idx
];
3056 /* This goes back to the question of how to logically map a tx queue
3057 * to a flow. Right now, performance is impacted slightly negatively
3058 * if using multiple tx queues. If the stack breaks away from a
3059 * single qdisc implementation, we can look at this again. */
3060 return (igb_xmit_frame_ring_adv(skb
, netdev
, tx_ring
));
3064 * igb_tx_timeout - Respond to a Tx Hang
3065 * @netdev: network interface device structure
3067 static void igb_tx_timeout(struct net_device
*netdev
)
3069 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3070 struct e1000_hw
*hw
= &adapter
->hw
;
3072 /* Do the reset outside of interrupt context */
3073 adapter
->tx_timeout_count
++;
3074 schedule_work(&adapter
->reset_task
);
3075 wr32(E1000_EICS
, adapter
->eims_enable_mask
&
3076 ~(E1000_EIMS_TCP_TIMER
| E1000_EIMS_OTHER
));
3079 static void igb_reset_task(struct work_struct
*work
)
3081 struct igb_adapter
*adapter
;
3082 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
3084 igb_reinit_locked(adapter
);
3088 * igb_get_stats - Get System Network Statistics
3089 * @netdev: network interface device structure
3091 * Returns the address of the device statistics structure.
3092 * The statistics are actually updated from the timer callback.
3094 static struct net_device_stats
*
3095 igb_get_stats(struct net_device
*netdev
)
3097 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3099 /* only return the current stats */
3100 return &adapter
->net_stats
;
3104 * igb_change_mtu - Change the Maximum Transfer Unit
3105 * @netdev: network interface device structure
3106 * @new_mtu: new value for maximum frame size
3108 * Returns 0 on success, negative on failure
3110 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
3112 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3113 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3115 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
3116 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
3117 dev_err(&adapter
->pdev
->dev
, "Invalid MTU setting\n");
3121 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3122 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
3123 dev_err(&adapter
->pdev
->dev
, "MTU > 9216 not supported.\n");
3127 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
3129 /* igb_down has a dependency on max_frame_size */
3130 adapter
->max_frame_size
= max_frame
;
3131 if (netif_running(netdev
))
3134 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3135 * means we reserve 2 more, this pushes us to allocate from the next
3137 * i.e. RXBUFFER_2048 --> size-4096 slab
3140 if (max_frame
<= IGB_RXBUFFER_256
)
3141 adapter
->rx_buffer_len
= IGB_RXBUFFER_256
;
3142 else if (max_frame
<= IGB_RXBUFFER_512
)
3143 adapter
->rx_buffer_len
= IGB_RXBUFFER_512
;
3144 else if (max_frame
<= IGB_RXBUFFER_1024
)
3145 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3146 else if (max_frame
<= IGB_RXBUFFER_2048
)
3147 adapter
->rx_buffer_len
= IGB_RXBUFFER_2048
;
3149 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3150 adapter
->rx_buffer_len
= IGB_RXBUFFER_16384
;
3152 adapter
->rx_buffer_len
= PAGE_SIZE
/ 2;
3154 /* adjust allocation if LPE protects us, and we aren't using SBP */
3155 if ((max_frame
== ETH_FRAME_LEN
+ ETH_FCS_LEN
) ||
3156 (max_frame
== MAXIMUM_ETHERNET_VLAN_SIZE
))
3157 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
3159 dev_info(&adapter
->pdev
->dev
, "changing MTU from %d to %d\n",
3160 netdev
->mtu
, new_mtu
);
3161 netdev
->mtu
= new_mtu
;
3163 if (netif_running(netdev
))
3168 clear_bit(__IGB_RESETTING
, &adapter
->state
);
3174 * igb_update_stats - Update the board statistics counters
3175 * @adapter: board private structure
3178 void igb_update_stats(struct igb_adapter
*adapter
)
3180 struct e1000_hw
*hw
= &adapter
->hw
;
3181 struct pci_dev
*pdev
= adapter
->pdev
;
3184 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3187 * Prevent stats update while adapter is being reset, or if the pci
3188 * connection is down.
3190 if (adapter
->link_speed
== 0)
3192 if (pci_channel_offline(pdev
))
3195 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
3196 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
3197 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
3198 rd32(E1000_GORCH
); /* clear GORCL */
3199 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
3200 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
3201 adapter
->stats
.roc
+= rd32(E1000_ROC
);
3203 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
3204 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
3205 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
3206 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
3207 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
3208 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
3209 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
3210 adapter
->stats
.sec
+= rd32(E1000_SEC
);
3212 adapter
->stats
.mpc
+= rd32(E1000_MPC
);
3213 adapter
->stats
.scc
+= rd32(E1000_SCC
);
3214 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
3215 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
3216 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
3217 adapter
->stats
.dc
+= rd32(E1000_DC
);
3218 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
3219 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
3220 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
3221 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
3222 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
3223 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
3224 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
3225 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
3226 rd32(E1000_GOTCH
); /* clear GOTCL */
3227 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
3228 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
3229 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
3230 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
3231 adapter
->stats
.tor
+= rd32(E1000_TORH
);
3232 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
3233 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
3235 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
3236 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
3237 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
3238 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
3239 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
3240 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
3242 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
3243 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
3245 /* used for adaptive IFS */
3247 hw
->mac
.tx_packet_delta
= rd32(E1000_TPT
);
3248 adapter
->stats
.tpt
+= hw
->mac
.tx_packet_delta
;
3249 hw
->mac
.collision_delta
= rd32(E1000_COLC
);
3250 adapter
->stats
.colc
+= hw
->mac
.collision_delta
;
3252 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
3253 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
3254 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
3255 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
3256 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
3258 adapter
->stats
.iac
+= rd32(E1000_IAC
);
3259 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
3260 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
3261 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
3262 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
3263 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
3264 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
3265 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
3266 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
3268 /* Fill out the OS statistics structure */
3269 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3270 adapter
->net_stats
.collisions
= adapter
->stats
.colc
;
3274 /* RLEC on some newer hardware can be incorrect so build
3275 * our own version based on RUC and ROC */
3276 adapter
->net_stats
.rx_errors
= adapter
->stats
.rxerrc
+
3277 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
3278 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
3279 adapter
->stats
.cexterr
;
3280 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.ruc
+
3282 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3283 adapter
->net_stats
.rx_frame_errors
= adapter
->stats
.algnerrc
;
3284 adapter
->net_stats
.rx_missed_errors
= adapter
->stats
.mpc
;
3287 adapter
->net_stats
.tx_errors
= adapter
->stats
.ecol
+
3288 adapter
->stats
.latecol
;
3289 adapter
->net_stats
.tx_aborted_errors
= adapter
->stats
.ecol
;
3290 adapter
->net_stats
.tx_window_errors
= adapter
->stats
.latecol
;
3291 adapter
->net_stats
.tx_carrier_errors
= adapter
->stats
.tncrs
;
3293 /* Tx Dropped needs to be maintained elsewhere */
3296 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
3297 if ((adapter
->link_speed
== SPEED_1000
) &&
3298 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
,
3300 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
3301 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
3305 /* Management Stats */
3306 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
3307 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
3308 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
3312 static irqreturn_t
igb_msix_other(int irq
, void *data
)
3314 struct net_device
*netdev
= data
;
3315 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3316 struct e1000_hw
*hw
= &adapter
->hw
;
3317 u32 icr
= rd32(E1000_ICR
);
3319 /* reading ICR causes bit 31 of EICR to be cleared */
3320 if (!(icr
& E1000_ICR_LSC
))
3321 goto no_link_interrupt
;
3322 hw
->mac
.get_link_status
= 1;
3323 /* guard against interrupt when we're going down */
3324 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3325 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3328 wr32(E1000_IMS
, E1000_IMS_LSC
);
3329 wr32(E1000_EIMS
, adapter
->eims_other
);
3334 static irqreturn_t
igb_msix_tx(int irq
, void *data
)
3336 struct igb_ring
*tx_ring
= data
;
3337 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3338 struct e1000_hw
*hw
= &adapter
->hw
;
3340 #ifdef CONFIG_IGB_DCA
3341 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3342 igb_update_tx_dca(tx_ring
);
3344 tx_ring
->total_bytes
= 0;
3345 tx_ring
->total_packets
= 0;
3347 /* auto mask will automatically reenable the interrupt when we write
3349 if (!igb_clean_tx_irq(tx_ring
))
3350 /* Ring was not completely cleaned, so fire another interrupt */
3351 wr32(E1000_EICS
, tx_ring
->eims_value
);
3353 wr32(E1000_EIMS
, tx_ring
->eims_value
);
3358 static void igb_write_itr(struct igb_ring
*ring
)
3360 struct e1000_hw
*hw
= &ring
->adapter
->hw
;
3361 if ((ring
->adapter
->itr_setting
& 3) && ring
->set_itr
) {
3362 switch (hw
->mac
.type
) {
3364 wr32(ring
->itr_register
,
3369 wr32(ring
->itr_register
,
3371 (ring
->itr_val
<< 16));
3378 static irqreturn_t
igb_msix_rx(int irq
, void *data
)
3380 struct igb_ring
*rx_ring
= data
;
3382 /* Write the ITR value calculated at the end of the
3383 * previous interrupt.
3386 igb_write_itr(rx_ring
);
3388 if (netif_rx_schedule_prep(&rx_ring
->napi
))
3389 __netif_rx_schedule(&rx_ring
->napi
);
3391 #ifdef CONFIG_IGB_DCA
3392 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3393 igb_update_rx_dca(rx_ring
);
3398 #ifdef CONFIG_IGB_DCA
3399 static void igb_update_rx_dca(struct igb_ring
*rx_ring
)
3402 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3403 struct e1000_hw
*hw
= &adapter
->hw
;
3404 int cpu
= get_cpu();
3405 int q
= rx_ring
->reg_idx
;
3407 if (rx_ring
->cpu
!= cpu
) {
3408 dca_rxctrl
= rd32(E1000_DCA_RXCTRL(q
));
3409 if (hw
->mac
.type
== e1000_82576
) {
3410 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK_82576
;
3411 dca_rxctrl
|= dca_get_tag(cpu
) <<
3412 E1000_DCA_RXCTRL_CPUID_SHIFT
;
3414 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK
;
3415 dca_rxctrl
|= dca_get_tag(cpu
);
3417 dca_rxctrl
|= E1000_DCA_RXCTRL_DESC_DCA_EN
;
3418 dca_rxctrl
|= E1000_DCA_RXCTRL_HEAD_DCA_EN
;
3419 dca_rxctrl
|= E1000_DCA_RXCTRL_DATA_DCA_EN
;
3420 wr32(E1000_DCA_RXCTRL(q
), dca_rxctrl
);
3426 static void igb_update_tx_dca(struct igb_ring
*tx_ring
)
3429 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3430 struct e1000_hw
*hw
= &adapter
->hw
;
3431 int cpu
= get_cpu();
3432 int q
= tx_ring
->reg_idx
;
3434 if (tx_ring
->cpu
!= cpu
) {
3435 dca_txctrl
= rd32(E1000_DCA_TXCTRL(q
));
3436 if (hw
->mac
.type
== e1000_82576
) {
3437 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK_82576
;
3438 dca_txctrl
|= dca_get_tag(cpu
) <<
3439 E1000_DCA_TXCTRL_CPUID_SHIFT
;
3441 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK
;
3442 dca_txctrl
|= dca_get_tag(cpu
);
3444 dca_txctrl
|= E1000_DCA_TXCTRL_DESC_DCA_EN
;
3445 wr32(E1000_DCA_TXCTRL(q
), dca_txctrl
);
3451 static void igb_setup_dca(struct igb_adapter
*adapter
)
3455 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
3458 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3459 adapter
->tx_ring
[i
].cpu
= -1;
3460 igb_update_tx_dca(&adapter
->tx_ring
[i
]);
3462 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3463 adapter
->rx_ring
[i
].cpu
= -1;
3464 igb_update_rx_dca(&adapter
->rx_ring
[i
]);
3468 static int __igb_notify_dca(struct device
*dev
, void *data
)
3470 struct net_device
*netdev
= dev_get_drvdata(dev
);
3471 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3472 struct e1000_hw
*hw
= &adapter
->hw
;
3473 unsigned long event
= *(unsigned long *)data
;
3476 case DCA_PROVIDER_ADD
:
3477 /* if already enabled, don't do it again */
3478 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3480 /* Always use CB2 mode, difference is masked
3481 * in the CB driver. */
3482 wr32(E1000_DCA_CTRL
, 2);
3483 if (dca_add_requester(dev
) == 0) {
3484 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
3485 dev_info(&adapter
->pdev
->dev
, "DCA enabled\n");
3486 igb_setup_dca(adapter
);
3489 /* Fall Through since DCA is disabled. */
3490 case DCA_PROVIDER_REMOVE
:
3491 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
3492 /* without this a class_device is left
3493 * hanging around in the sysfs model */
3494 dca_remove_requester(dev
);
3495 dev_info(&adapter
->pdev
->dev
, "DCA disabled\n");
3496 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
3497 wr32(E1000_DCA_CTRL
, 1);
3505 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3510 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
3513 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3515 #endif /* CONFIG_IGB_DCA */
3518 * igb_intr_msi - Interrupt Handler
3519 * @irq: interrupt number
3520 * @data: pointer to a network interface device structure
3522 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
3524 struct net_device
*netdev
= data
;
3525 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3526 struct e1000_hw
*hw
= &adapter
->hw
;
3527 /* read ICR disables interrupts using IAM */
3528 u32 icr
= rd32(E1000_ICR
);
3530 igb_write_itr(adapter
->rx_ring
);
3532 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
3533 hw
->mac
.get_link_status
= 1;
3534 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3535 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3538 netif_rx_schedule(&adapter
->rx_ring
[0].napi
);
3544 * igb_intr - Interrupt Handler
3545 * @irq: interrupt number
3546 * @data: pointer to a network interface device structure
3548 static irqreturn_t
igb_intr(int irq
, void *data
)
3550 struct net_device
*netdev
= data
;
3551 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3552 struct e1000_hw
*hw
= &adapter
->hw
;
3553 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3554 * need for the IMC write */
3555 u32 icr
= rd32(E1000_ICR
);
3558 return IRQ_NONE
; /* Not our interrupt */
3560 igb_write_itr(adapter
->rx_ring
);
3562 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3563 * not set, then the adapter didn't send an interrupt */
3564 if (!(icr
& E1000_ICR_INT_ASSERTED
))
3567 eicr
= rd32(E1000_EICR
);
3569 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
3570 hw
->mac
.get_link_status
= 1;
3571 /* guard against interrupt when we're going down */
3572 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3573 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3576 netif_rx_schedule(&adapter
->rx_ring
[0].napi
);
3582 * igb_poll - NAPI Rx polling callback
3583 * @napi: napi polling structure
3584 * @budget: count of how many packets we should handle
3586 static int igb_poll(struct napi_struct
*napi
, int budget
)
3588 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
3589 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3590 struct net_device
*netdev
= adapter
->netdev
;
3591 int tx_clean_complete
, work_done
= 0;
3593 /* this poll routine only supports one tx and one rx queue */
3594 #ifdef CONFIG_IGB_DCA
3595 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3596 igb_update_tx_dca(&adapter
->tx_ring
[0]);
3598 tx_clean_complete
= igb_clean_tx_irq(&adapter
->tx_ring
[0]);
3600 #ifdef CONFIG_IGB_DCA
3601 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3602 igb_update_rx_dca(&adapter
->rx_ring
[0]);
3604 igb_clean_rx_irq_adv(&adapter
->rx_ring
[0], &work_done
, budget
);
3606 /* If no Tx and not enough Rx work done, exit the polling mode */
3607 if ((tx_clean_complete
&& (work_done
< budget
)) ||
3608 !netif_running(netdev
)) {
3609 if (adapter
->itr_setting
& 3)
3610 igb_set_itr(adapter
);
3611 netif_rx_complete(napi
);
3612 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3613 igb_irq_enable(adapter
);
3620 static int igb_clean_rx_ring_msix(struct napi_struct
*napi
, int budget
)
3622 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
3623 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3624 struct e1000_hw
*hw
= &adapter
->hw
;
3625 struct net_device
*netdev
= adapter
->netdev
;
3628 #ifdef CONFIG_IGB_DCA
3629 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3630 igb_update_rx_dca(rx_ring
);
3632 igb_clean_rx_irq_adv(rx_ring
, &work_done
, budget
);
3635 /* If not enough Rx work done, exit the polling mode */
3636 if ((work_done
== 0) || !netif_running(netdev
)) {
3637 netif_rx_complete(napi
);
3639 if (adapter
->itr_setting
& 3) {
3640 if (adapter
->num_rx_queues
== 1)
3641 igb_set_itr(adapter
);
3643 igb_update_ring_itr(rx_ring
);
3646 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3647 wr32(E1000_EIMS
, rx_ring
->eims_value
);
3656 * igb_clean_tx_irq - Reclaim resources after transmit completes
3657 * @adapter: board private structure
3658 * returns true if ring is completely cleaned
3660 static bool igb_clean_tx_irq(struct igb_ring
*tx_ring
)
3662 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3663 struct net_device
*netdev
= adapter
->netdev
;
3664 struct e1000_hw
*hw
= &adapter
->hw
;
3665 struct igb_buffer
*buffer_info
;
3666 struct sk_buff
*skb
;
3667 union e1000_adv_tx_desc
*tx_desc
, *eop_desc
;
3668 unsigned int total_bytes
= 0, total_packets
= 0;
3669 unsigned int i
, eop
, count
= 0;
3670 bool cleaned
= false;
3672 i
= tx_ring
->next_to_clean
;
3673 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
3674 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
3676 while ((eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)) &&
3677 (count
< tx_ring
->count
)) {
3678 for (cleaned
= false; !cleaned
; count
++) {
3679 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3680 buffer_info
= &tx_ring
->buffer_info
[i
];
3681 cleaned
= (i
== eop
);
3682 skb
= buffer_info
->skb
;
3685 unsigned int segs
, bytecount
;
3686 /* gso_segs is currently only valid for tcp */
3687 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
3688 /* multiply data chunks by size of headers */
3689 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
3691 total_packets
+= segs
;
3692 total_bytes
+= bytecount
;
3695 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
3696 tx_desc
->wb
.status
= 0;
3699 if (i
== tx_ring
->count
)
3703 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
3704 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
3707 tx_ring
->next_to_clean
= i
;
3709 if (unlikely(count
&&
3710 netif_carrier_ok(netdev
) &&
3711 IGB_DESC_UNUSED(tx_ring
) >= IGB_TX_QUEUE_WAKE
)) {
3712 /* Make sure that anybody stopping the queue after this
3713 * sees the new next_to_clean.
3716 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
3717 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
3718 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3719 ++adapter
->restart_queue
;
3723 if (tx_ring
->detect_tx_hung
) {
3724 /* Detect a transmit hang in hardware, this serializes the
3725 * check with the clearing of time_stamp and movement of i */
3726 tx_ring
->detect_tx_hung
= false;
3727 if (tx_ring
->buffer_info
[i
].time_stamp
&&
3728 time_after(jiffies
, tx_ring
->buffer_info
[i
].time_stamp
+
3729 (adapter
->tx_timeout_factor
* HZ
))
3730 && !(rd32(E1000_STATUS
) &
3731 E1000_STATUS_TXOFF
)) {
3733 /* detected Tx unit hang */
3734 dev_err(&adapter
->pdev
->dev
,
3735 "Detected Tx Unit Hang\n"
3739 " next_to_use <%x>\n"
3740 " next_to_clean <%x>\n"
3741 "buffer_info[next_to_clean]\n"
3742 " time_stamp <%lx>\n"
3743 " next_to_watch <%x>\n"
3745 " desc.status <%x>\n",
3746 tx_ring
->queue_index
,
3747 readl(adapter
->hw
.hw_addr
+ tx_ring
->head
),
3748 readl(adapter
->hw
.hw_addr
+ tx_ring
->tail
),
3749 tx_ring
->next_to_use
,
3750 tx_ring
->next_to_clean
,
3751 tx_ring
->buffer_info
[i
].time_stamp
,
3754 eop_desc
->wb
.status
);
3755 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3758 tx_ring
->total_bytes
+= total_bytes
;
3759 tx_ring
->total_packets
+= total_packets
;
3760 tx_ring
->tx_stats
.bytes
+= total_bytes
;
3761 tx_ring
->tx_stats
.packets
+= total_packets
;
3762 adapter
->net_stats
.tx_bytes
+= total_bytes
;
3763 adapter
->net_stats
.tx_packets
+= total_packets
;
3764 return (count
< tx_ring
->count
);
3767 #ifdef CONFIG_IGB_LRO
3769 * igb_get_skb_hdr - helper function for LRO header processing
3770 * @skb: pointer to sk_buff to be added to LRO packet
3771 * @iphdr: pointer to ip header structure
3772 * @tcph: pointer to tcp header structure
3773 * @hdr_flags: pointer to header flags
3774 * @priv: pointer to the receive descriptor for the current sk_buff
3776 static int igb_get_skb_hdr(struct sk_buff
*skb
, void **iphdr
, void **tcph
,
3777 u64
*hdr_flags
, void *priv
)
3779 union e1000_adv_rx_desc
*rx_desc
= priv
;
3780 u16 pkt_type
= rx_desc
->wb
.lower
.lo_dword
.pkt_info
&
3781 (E1000_RXDADV_PKTTYPE_IPV4
| E1000_RXDADV_PKTTYPE_TCP
);
3783 /* Verify that this is a valid IPv4 TCP packet */
3784 if (pkt_type
!= (E1000_RXDADV_PKTTYPE_IPV4
|
3785 E1000_RXDADV_PKTTYPE_TCP
))
3788 /* Set network headers */
3789 skb_reset_network_header(skb
);
3790 skb_set_transport_header(skb
, ip_hdrlen(skb
));
3791 *iphdr
= ip_hdr(skb
);
3792 *tcph
= tcp_hdr(skb
);
3793 *hdr_flags
= LRO_IPV4
| LRO_TCP
;
3798 #endif /* CONFIG_IGB_LRO */
3801 * igb_receive_skb - helper function to handle rx indications
3802 * @ring: pointer to receive ring receving this packet
3803 * @status: descriptor status field as written by hardware
3804 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3805 * @skb: pointer to sk_buff to be indicated to stack
3807 static void igb_receive_skb(struct igb_ring
*ring
, u8 status
,
3808 union e1000_adv_rx_desc
* rx_desc
,
3809 struct sk_buff
*skb
)
3811 struct igb_adapter
* adapter
= ring
->adapter
;
3812 bool vlan_extracted
= (adapter
->vlgrp
&& (status
& E1000_RXD_STAT_VP
));
3814 #ifdef CONFIG_IGB_LRO
3815 if (adapter
->netdev
->features
& NETIF_F_LRO
&&
3816 skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
3818 lro_vlan_hwaccel_receive_skb(&ring
->lro_mgr
, skb
,
3820 le16_to_cpu(rx_desc
->wb
.upper
.vlan
),
3823 lro_receive_skb(&ring
->lro_mgr
,skb
, rx_desc
);
3828 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
,
3829 le16_to_cpu(rx_desc
->wb
.upper
.vlan
));
3832 netif_receive_skb(skb
);
3833 #ifdef CONFIG_IGB_LRO
3839 static inline void igb_rx_checksum_adv(struct igb_adapter
*adapter
,
3840 u32 status_err
, struct sk_buff
*skb
)
3842 skb
->ip_summed
= CHECKSUM_NONE
;
3844 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3845 if ((status_err
& E1000_RXD_STAT_IXSM
) || !adapter
->rx_csum
)
3847 /* TCP/UDP checksum error bit is set */
3849 (E1000_RXDEXT_STATERR_TCPE
| E1000_RXDEXT_STATERR_IPE
)) {
3850 /* let the stack verify checksum errors */
3851 adapter
->hw_csum_err
++;
3854 /* It must be a TCP or UDP packet with a valid checksum */
3855 if (status_err
& (E1000_RXD_STAT_TCPCS
| E1000_RXD_STAT_UDPCS
))
3856 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
3858 adapter
->hw_csum_good
++;
3861 static bool igb_clean_rx_irq_adv(struct igb_ring
*rx_ring
,
3862 int *work_done
, int budget
)
3864 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3865 struct net_device
*netdev
= adapter
->netdev
;
3866 struct pci_dev
*pdev
= adapter
->pdev
;
3867 union e1000_adv_rx_desc
*rx_desc
, *next_rxd
;
3868 struct igb_buffer
*buffer_info
, *next_buffer
;
3869 struct sk_buff
*skb
;
3871 u32 length
, hlen
, staterr
;
3872 bool cleaned
= false;
3873 int cleaned_count
= 0;
3874 unsigned int total_bytes
= 0, total_packets
= 0;
3876 i
= rx_ring
->next_to_clean
;
3877 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3878 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
3880 while (staterr
& E1000_RXD_STAT_DD
) {
3881 if (*work_done
>= budget
)
3884 buffer_info
= &rx_ring
->buffer_info
[i
];
3886 /* HW will not DMA in data larger than the given buffer, even
3887 * if it parses the (NFS, of course) header to be larger. In
3888 * that case, it fills the header buffer and spills the rest
3891 hlen
= (le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hdr_info
) &
3892 E1000_RXDADV_HDRBUFLEN_MASK
) >> E1000_RXDADV_HDRBUFLEN_SHIFT
;
3893 if (hlen
> adapter
->rx_ps_hdr_size
)
3894 hlen
= adapter
->rx_ps_hdr_size
;
3896 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
3900 skb
= buffer_info
->skb
;
3901 prefetch(skb
->data
- NET_IP_ALIGN
);
3902 buffer_info
->skb
= NULL
;
3903 if (!adapter
->rx_ps_hdr_size
) {
3904 pci_unmap_single(pdev
, buffer_info
->dma
,
3905 adapter
->rx_buffer_len
+
3907 PCI_DMA_FROMDEVICE
);
3908 skb_put(skb
, length
);
3912 if (!skb_shinfo(skb
)->nr_frags
) {
3913 pci_unmap_single(pdev
, buffer_info
->dma
,
3914 adapter
->rx_ps_hdr_size
+
3916 PCI_DMA_FROMDEVICE
);
3921 pci_unmap_page(pdev
, buffer_info
->page_dma
,
3922 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
3923 buffer_info
->page_dma
= 0;
3925 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
++,
3927 buffer_info
->page_offset
,
3930 if ((adapter
->rx_buffer_len
> (PAGE_SIZE
/ 2)) ||
3931 (page_count(buffer_info
->page
) != 1))
3932 buffer_info
->page
= NULL
;
3934 get_page(buffer_info
->page
);
3937 skb
->data_len
+= length
;
3939 skb
->truesize
+= length
;
3943 if (i
== rx_ring
->count
)
3945 next_rxd
= E1000_RX_DESC_ADV(*rx_ring
, i
);
3947 next_buffer
= &rx_ring
->buffer_info
[i
];
3949 if (!(staterr
& E1000_RXD_STAT_EOP
)) {
3950 buffer_info
->skb
= next_buffer
->skb
;
3951 buffer_info
->dma
= next_buffer
->dma
;
3952 next_buffer
->skb
= skb
;
3953 next_buffer
->dma
= 0;
3957 if (staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) {
3958 dev_kfree_skb_irq(skb
);
3962 total_bytes
+= skb
->len
;
3965 igb_rx_checksum_adv(adapter
, staterr
, skb
);
3967 skb
->protocol
= eth_type_trans(skb
, netdev
);
3969 igb_receive_skb(rx_ring
, staterr
, rx_desc
, skb
);
3972 rx_desc
->wb
.upper
.status_error
= 0;
3974 /* return some buffers to hardware, one at a time is too slow */
3975 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
3976 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
3980 /* use prefetched values */
3982 buffer_info
= next_buffer
;
3984 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
3987 rx_ring
->next_to_clean
= i
;
3988 cleaned_count
= IGB_DESC_UNUSED(rx_ring
);
3990 #ifdef CONFIG_IGB_LRO
3991 if (rx_ring
->lro_used
) {
3992 lro_flush_all(&rx_ring
->lro_mgr
);
3993 rx_ring
->lro_used
= 0;
3998 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4000 rx_ring
->total_packets
+= total_packets
;
4001 rx_ring
->total_bytes
+= total_bytes
;
4002 rx_ring
->rx_stats
.packets
+= total_packets
;
4003 rx_ring
->rx_stats
.bytes
+= total_bytes
;
4004 adapter
->net_stats
.rx_bytes
+= total_bytes
;
4005 adapter
->net_stats
.rx_packets
+= total_packets
;
4011 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4012 * @adapter: address of board private structure
4014 static void igb_alloc_rx_buffers_adv(struct igb_ring
*rx_ring
,
4017 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4018 struct net_device
*netdev
= adapter
->netdev
;
4019 struct pci_dev
*pdev
= adapter
->pdev
;
4020 union e1000_adv_rx_desc
*rx_desc
;
4021 struct igb_buffer
*buffer_info
;
4022 struct sk_buff
*skb
;
4025 i
= rx_ring
->next_to_use
;
4026 buffer_info
= &rx_ring
->buffer_info
[i
];
4028 while (cleaned_count
--) {
4029 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4031 if (adapter
->rx_ps_hdr_size
&& !buffer_info
->page_dma
) {
4032 if (!buffer_info
->page
) {
4033 buffer_info
->page
= alloc_page(GFP_ATOMIC
);
4034 if (!buffer_info
->page
) {
4035 adapter
->alloc_rx_buff_failed
++;
4038 buffer_info
->page_offset
= 0;
4040 buffer_info
->page_offset
^= PAGE_SIZE
/ 2;
4042 buffer_info
->page_dma
=
4045 buffer_info
->page_offset
,
4047 PCI_DMA_FROMDEVICE
);
4050 if (!buffer_info
->skb
) {
4053 if (adapter
->rx_ps_hdr_size
)
4054 bufsz
= adapter
->rx_ps_hdr_size
;
4056 bufsz
= adapter
->rx_buffer_len
;
4057 bufsz
+= NET_IP_ALIGN
;
4058 skb
= netdev_alloc_skb(netdev
, bufsz
);
4061 adapter
->alloc_rx_buff_failed
++;
4065 /* Make buffer alignment 2 beyond a 16 byte boundary
4066 * this will result in a 16 byte aligned IP header after
4067 * the 14 byte MAC header is removed
4069 skb_reserve(skb
, NET_IP_ALIGN
);
4071 buffer_info
->skb
= skb
;
4072 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
4074 PCI_DMA_FROMDEVICE
);
4077 /* Refresh the desc even if buffer_addrs didn't change because
4078 * each write-back erases this info. */
4079 if (adapter
->rx_ps_hdr_size
) {
4080 rx_desc
->read
.pkt_addr
=
4081 cpu_to_le64(buffer_info
->page_dma
);
4082 rx_desc
->read
.hdr_addr
= cpu_to_le64(buffer_info
->dma
);
4084 rx_desc
->read
.pkt_addr
=
4085 cpu_to_le64(buffer_info
->dma
);
4086 rx_desc
->read
.hdr_addr
= 0;
4090 if (i
== rx_ring
->count
)
4092 buffer_info
= &rx_ring
->buffer_info
[i
];
4096 if (rx_ring
->next_to_use
!= i
) {
4097 rx_ring
->next_to_use
= i
;
4099 i
= (rx_ring
->count
- 1);
4103 /* Force memory writes to complete before letting h/w
4104 * know there are new descriptors to fetch. (Only
4105 * applicable for weak-ordered memory model archs,
4106 * such as IA-64). */
4108 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
4118 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4120 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4121 struct mii_ioctl_data
*data
= if_mii(ifr
);
4123 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
4128 data
->phy_id
= adapter
->hw
.phy
.addr
;
4131 if (!capable(CAP_NET_ADMIN
))
4133 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
4150 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4156 return igb_mii_ioctl(netdev
, ifr
, cmd
);
4162 static void igb_vlan_rx_register(struct net_device
*netdev
,
4163 struct vlan_group
*grp
)
4165 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4166 struct e1000_hw
*hw
= &adapter
->hw
;
4169 igb_irq_disable(adapter
);
4170 adapter
->vlgrp
= grp
;
4173 /* enable VLAN tag insert/strip */
4174 ctrl
= rd32(E1000_CTRL
);
4175 ctrl
|= E1000_CTRL_VME
;
4176 wr32(E1000_CTRL
, ctrl
);
4178 /* enable VLAN receive filtering */
4179 rctl
= rd32(E1000_RCTL
);
4180 rctl
&= ~E1000_RCTL_CFIEN
;
4181 wr32(E1000_RCTL
, rctl
);
4182 igb_update_mng_vlan(adapter
);
4184 adapter
->max_frame_size
+ VLAN_TAG_SIZE
);
4186 /* disable VLAN tag insert/strip */
4187 ctrl
= rd32(E1000_CTRL
);
4188 ctrl
&= ~E1000_CTRL_VME
;
4189 wr32(E1000_CTRL
, ctrl
);
4191 if (adapter
->mng_vlan_id
!= (u16
)IGB_MNG_VLAN_NONE
) {
4192 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
4193 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
4196 adapter
->max_frame_size
);
4199 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4200 igb_irq_enable(adapter
);
4203 static void igb_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
4205 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4206 struct e1000_hw
*hw
= &adapter
->hw
;
4209 if ((adapter
->hw
.mng_cookie
.status
&
4210 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4211 (vid
== adapter
->mng_vlan_id
))
4213 /* add VID to filter table */
4214 index
= (vid
>> 5) & 0x7F;
4215 vfta
= array_rd32(E1000_VFTA
, index
);
4216 vfta
|= (1 << (vid
& 0x1F));
4217 igb_write_vfta(&adapter
->hw
, index
, vfta
);
4220 static void igb_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
4222 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4223 struct e1000_hw
*hw
= &adapter
->hw
;
4226 igb_irq_disable(adapter
);
4227 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
4229 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4230 igb_irq_enable(adapter
);
4232 if ((adapter
->hw
.mng_cookie
.status
&
4233 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
4234 (vid
== adapter
->mng_vlan_id
)) {
4235 /* release control to f/w */
4236 igb_release_hw_control(adapter
);
4240 /* remove VID from filter table */
4241 index
= (vid
>> 5) & 0x7F;
4242 vfta
= array_rd32(E1000_VFTA
, index
);
4243 vfta
&= ~(1 << (vid
& 0x1F));
4244 igb_write_vfta(&adapter
->hw
, index
, vfta
);
4247 static void igb_restore_vlan(struct igb_adapter
*adapter
)
4249 igb_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
4251 if (adapter
->vlgrp
) {
4253 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
4254 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
4256 igb_vlan_rx_add_vid(adapter
->netdev
, vid
);
4261 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u16 spddplx
)
4263 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
4267 /* Fiber NICs only allow 1000 gbps Full duplex */
4268 if ((adapter
->hw
.phy
.media_type
== e1000_media_type_fiber
) &&
4269 spddplx
!= (SPEED_1000
+ DUPLEX_FULL
)) {
4270 dev_err(&adapter
->pdev
->dev
,
4271 "Unsupported Speed/Duplex configuration\n");
4276 case SPEED_10
+ DUPLEX_HALF
:
4277 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
4279 case SPEED_10
+ DUPLEX_FULL
:
4280 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
4282 case SPEED_100
+ DUPLEX_HALF
:
4283 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
4285 case SPEED_100
+ DUPLEX_FULL
:
4286 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
4288 case SPEED_1000
+ DUPLEX_FULL
:
4290 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
4292 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
4294 dev_err(&adapter
->pdev
->dev
,
4295 "Unsupported Speed/Duplex configuration\n");
4302 static int igb_suspend(struct pci_dev
*pdev
, pm_message_t state
)
4304 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4305 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4306 struct e1000_hw
*hw
= &adapter
->hw
;
4307 u32 ctrl
, rctl
, status
;
4308 u32 wufc
= adapter
->wol
;
4313 netif_device_detach(netdev
);
4315 if (netif_running(netdev
))
4318 igb_reset_interrupt_capability(adapter
);
4320 igb_free_queues(adapter
);
4323 retval
= pci_save_state(pdev
);
4328 status
= rd32(E1000_STATUS
);
4329 if (status
& E1000_STATUS_LU
)
4330 wufc
&= ~E1000_WUFC_LNKC
;
4333 igb_setup_rctl(adapter
);
4334 igb_set_multi(netdev
);
4336 /* turn on all-multi mode if wake on multicast is enabled */
4337 if (wufc
& E1000_WUFC_MC
) {
4338 rctl
= rd32(E1000_RCTL
);
4339 rctl
|= E1000_RCTL_MPE
;
4340 wr32(E1000_RCTL
, rctl
);
4343 ctrl
= rd32(E1000_CTRL
);
4344 /* advertise wake from D3Cold */
4345 #define E1000_CTRL_ADVD3WUC 0x00100000
4346 /* phy power management enable */
4347 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4348 ctrl
|= E1000_CTRL_ADVD3WUC
;
4349 wr32(E1000_CTRL
, ctrl
);
4351 /* Allow time for pending master requests to run */
4352 igb_disable_pcie_master(&adapter
->hw
);
4354 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
4355 wr32(E1000_WUFC
, wufc
);
4358 wr32(E1000_WUFC
, 0);
4361 /* make sure adapter isn't asleep if manageability/wol is enabled */
4362 if (wufc
|| adapter
->en_mng_pt
) {
4363 pci_enable_wake(pdev
, PCI_D3hot
, 1);
4364 pci_enable_wake(pdev
, PCI_D3cold
, 1);
4366 igb_shutdown_fiber_serdes_link_82575(hw
);
4367 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4368 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4371 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4372 * would have already happened in close and is redundant. */
4373 igb_release_hw_control(adapter
);
4375 pci_disable_device(pdev
);
4377 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
4383 static int igb_resume(struct pci_dev
*pdev
)
4385 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4386 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4387 struct e1000_hw
*hw
= &adapter
->hw
;
4390 pci_set_power_state(pdev
, PCI_D0
);
4391 pci_restore_state(pdev
);
4393 if (adapter
->need_ioport
)
4394 err
= pci_enable_device(pdev
);
4396 err
= pci_enable_device_mem(pdev
);
4399 "igb: Cannot enable PCI device from suspend\n");
4402 pci_set_master(pdev
);
4404 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4405 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4407 igb_set_interrupt_capability(adapter
);
4409 if (igb_alloc_queues(adapter
)) {
4410 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
4414 /* e1000_power_up_phy(adapter); */
4417 wr32(E1000_WUS
, ~0);
4419 if (netif_running(netdev
)) {
4420 err
= igb_open(netdev
);
4425 netif_device_attach(netdev
);
4427 /* let the f/w know that the h/w is now under the control of the
4429 igb_get_hw_control(adapter
);
4435 static void igb_shutdown(struct pci_dev
*pdev
)
4437 igb_suspend(pdev
, PMSG_SUSPEND
);
4440 #ifdef CONFIG_NET_POLL_CONTROLLER
4442 * Polling 'interrupt' - used by things like netconsole to send skbs
4443 * without having to re-enable interrupts. It's not called while
4444 * the interrupt routine is executing.
4446 static void igb_netpoll(struct net_device
*netdev
)
4448 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4452 igb_irq_disable(adapter
);
4453 adapter
->flags
|= IGB_FLAG_IN_NETPOLL
;
4455 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4456 igb_clean_tx_irq(&adapter
->tx_ring
[i
]);
4458 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4459 igb_clean_rx_irq_adv(&adapter
->rx_ring
[i
],
4461 adapter
->rx_ring
[i
].napi
.weight
);
4463 adapter
->flags
&= ~IGB_FLAG_IN_NETPOLL
;
4464 igb_irq_enable(adapter
);
4466 #endif /* CONFIG_NET_POLL_CONTROLLER */
4469 * igb_io_error_detected - called when PCI error is detected
4470 * @pdev: Pointer to PCI device
4471 * @state: The current pci connection state
4473 * This function is called after a PCI bus error affecting
4474 * this device has been detected.
4476 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
4477 pci_channel_state_t state
)
4479 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4480 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4482 netif_device_detach(netdev
);
4484 if (netif_running(netdev
))
4486 pci_disable_device(pdev
);
4488 /* Request a slot slot reset. */
4489 return PCI_ERS_RESULT_NEED_RESET
;
4493 * igb_io_slot_reset - called after the pci bus has been reset.
4494 * @pdev: Pointer to PCI device
4496 * Restart the card from scratch, as if from a cold-boot. Implementation
4497 * resembles the first-half of the igb_resume routine.
4499 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
4501 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4502 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4503 struct e1000_hw
*hw
= &adapter
->hw
;
4504 pci_ers_result_t result
;
4507 if (adapter
->need_ioport
)
4508 err
= pci_enable_device(pdev
);
4510 err
= pci_enable_device_mem(pdev
);
4514 "Cannot re-enable PCI device after reset.\n");
4515 result
= PCI_ERS_RESULT_DISCONNECT
;
4517 pci_set_master(pdev
);
4518 pci_restore_state(pdev
);
4520 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4521 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4524 wr32(E1000_WUS
, ~0);
4525 result
= PCI_ERS_RESULT_RECOVERED
;
4528 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
4530 dev_err(&pdev
->dev
, "pci_cleanup_aer_uncorrect_error_status "
4531 "failed 0x%0x\n", err
);
4532 /* non-fatal, continue */
4539 * igb_io_resume - called when traffic can start flowing again.
4540 * @pdev: Pointer to PCI device
4542 * This callback is called when the error recovery driver tells us that
4543 * its OK to resume normal operation. Implementation resembles the
4544 * second-half of the igb_resume routine.
4546 static void igb_io_resume(struct pci_dev
*pdev
)
4548 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4549 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4551 if (netif_running(netdev
)) {
4552 if (igb_up(adapter
)) {
4553 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
4558 netif_device_attach(netdev
);
4560 /* let the f/w know that the h/w is now under the control of the
4562 igb_get_hw_control(adapter
);