1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
40 #include <linux/if_vlan.h>
41 #include <linux/pci.h>
42 #include <linux/pci-aspm.h>
43 #include <linux/delay.h>
44 #include <linux/interrupt.h>
45 #include <linux/if_ether.h>
46 #include <linux/aer.h>
48 #include <linux/dca.h>
52 #define DRV_VERSION "1.3.16-k2"
53 char igb_driver_name
[] = "igb";
54 char igb_driver_version
[] = DRV_VERSION
;
55 static const char igb_driver_string
[] =
56 "Intel(R) Gigabit Ethernet Network Driver";
57 static const char igb_copyright
[] = "Copyright (c) 2007-2009 Intel Corporation.";
59 static const struct e1000_info
*igb_info_tbl
[] = {
60 [board_82575
] = &e1000_82575_info
,
63 static struct pci_device_id igb_pci_tbl
[] = {
64 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
65 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS
), board_82575
},
66 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
67 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
68 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES_QUAD
), board_82575
},
69 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER
), board_82575
},
70 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
71 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
72 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
73 /* required last entry */
77 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
79 void igb_reset(struct igb_adapter
*);
80 static int igb_setup_all_tx_resources(struct igb_adapter
*);
81 static int igb_setup_all_rx_resources(struct igb_adapter
*);
82 static void igb_free_all_tx_resources(struct igb_adapter
*);
83 static void igb_free_all_rx_resources(struct igb_adapter
*);
84 void igb_update_stats(struct igb_adapter
*);
85 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
86 static void __devexit
igb_remove(struct pci_dev
*pdev
);
87 static int igb_sw_init(struct igb_adapter
*);
88 static int igb_open(struct net_device
*);
89 static int igb_close(struct net_device
*);
90 static void igb_configure_tx(struct igb_adapter
*);
91 static void igb_configure_rx(struct igb_adapter
*);
92 static void igb_setup_rctl(struct igb_adapter
*);
93 static void igb_clean_all_tx_rings(struct igb_adapter
*);
94 static void igb_clean_all_rx_rings(struct igb_adapter
*);
95 static void igb_clean_tx_ring(struct igb_ring
*);
96 static void igb_clean_rx_ring(struct igb_ring
*);
97 static void igb_set_rx_mode(struct net_device
*);
98 static void igb_update_phy_info(unsigned long);
99 static void igb_watchdog(unsigned long);
100 static void igb_watchdog_task(struct work_struct
*);
101 static netdev_tx_t
igb_xmit_frame_ring_adv(struct sk_buff
*,
104 static netdev_tx_t
igb_xmit_frame_adv(struct sk_buff
*skb
,
105 struct net_device
*);
106 static struct net_device_stats
*igb_get_stats(struct net_device
*);
107 static int igb_change_mtu(struct net_device
*, int);
108 static int igb_set_mac(struct net_device
*, void *);
109 static irqreturn_t
igb_intr(int irq
, void *);
110 static irqreturn_t
igb_intr_msi(int irq
, void *);
111 static irqreturn_t
igb_msix_other(int irq
, void *);
112 static irqreturn_t
igb_msix_rx(int irq
, void *);
113 static irqreturn_t
igb_msix_tx(int irq
, void *);
114 #ifdef CONFIG_IGB_DCA
115 static void igb_update_rx_dca(struct igb_ring
*);
116 static void igb_update_tx_dca(struct igb_ring
*);
117 static void igb_setup_dca(struct igb_adapter
*);
118 #endif /* CONFIG_IGB_DCA */
119 static bool igb_clean_tx_irq(struct igb_ring
*);
120 static int igb_poll(struct napi_struct
*, int);
121 static bool igb_clean_rx_irq_adv(struct igb_ring
*, int *, int);
122 static void igb_alloc_rx_buffers_adv(struct igb_ring
*, int);
123 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
124 static void igb_tx_timeout(struct net_device
*);
125 static void igb_reset_task(struct work_struct
*);
126 static void igb_vlan_rx_register(struct net_device
*, struct vlan_group
*);
127 static void igb_vlan_rx_add_vid(struct net_device
*, u16
);
128 static void igb_vlan_rx_kill_vid(struct net_device
*, u16
);
129 static void igb_restore_vlan(struct igb_adapter
*);
130 static void igb_ping_all_vfs(struct igb_adapter
*);
131 static void igb_msg_task(struct igb_adapter
*);
132 static int igb_rcv_msg_from_vf(struct igb_adapter
*, u32
);
133 static inline void igb_set_rah_pool(struct e1000_hw
*, int , int);
134 static void igb_vmm_control(struct igb_adapter
*);
135 static int igb_set_vf_mac(struct igb_adapter
*adapter
, int, unsigned char *);
136 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
138 static inline void igb_set_vmolr(struct e1000_hw
*hw
, int vfn
)
142 reg_data
= rd32(E1000_VMOLR(vfn
));
143 reg_data
|= E1000_VMOLR_BAM
| /* Accept broadcast */
144 E1000_VMOLR_ROPE
| /* Accept packets matched in UTA */
145 E1000_VMOLR_ROMPE
| /* Accept packets matched in MTA */
146 E1000_VMOLR_AUPE
| /* Accept untagged packets */
147 E1000_VMOLR_STRVLAN
; /* Strip vlan tags */
148 wr32(E1000_VMOLR(vfn
), reg_data
);
151 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
154 struct e1000_hw
*hw
= &adapter
->hw
;
157 vmolr
= rd32(E1000_VMOLR(vfn
));
158 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
159 vmolr
|= size
| E1000_VMOLR_LPE
;
160 wr32(E1000_VMOLR(vfn
), vmolr
);
165 static inline void igb_set_rah_pool(struct e1000_hw
*hw
, int pool
, int entry
)
169 reg_data
= rd32(E1000_RAH(entry
));
170 reg_data
&= ~E1000_RAH_POOL_MASK
;
171 reg_data
|= E1000_RAH_POOL_1
<< pool
;;
172 wr32(E1000_RAH(entry
), reg_data
);
176 static int igb_suspend(struct pci_dev
*, pm_message_t
);
177 static int igb_resume(struct pci_dev
*);
179 static void igb_shutdown(struct pci_dev
*);
180 #ifdef CONFIG_IGB_DCA
181 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
182 static struct notifier_block dca_notifier
= {
183 .notifier_call
= igb_notify_dca
,
188 #ifdef CONFIG_NET_POLL_CONTROLLER
189 /* for netdump / net console */
190 static void igb_netpoll(struct net_device
*);
192 #ifdef CONFIG_PCI_IOV
193 static unsigned int max_vfs
= 0;
194 module_param(max_vfs
, uint
, 0);
195 MODULE_PARM_DESC(max_vfs
, "Maximum number of virtual functions to allocate "
196 "per physical function");
197 #endif /* CONFIG_PCI_IOV */
199 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
200 pci_channel_state_t
);
201 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
202 static void igb_io_resume(struct pci_dev
*);
204 static struct pci_error_handlers igb_err_handler
= {
205 .error_detected
= igb_io_error_detected
,
206 .slot_reset
= igb_io_slot_reset
,
207 .resume
= igb_io_resume
,
211 static struct pci_driver igb_driver
= {
212 .name
= igb_driver_name
,
213 .id_table
= igb_pci_tbl
,
215 .remove
= __devexit_p(igb_remove
),
217 /* Power Managment Hooks */
218 .suspend
= igb_suspend
,
219 .resume
= igb_resume
,
221 .shutdown
= igb_shutdown
,
222 .err_handler
= &igb_err_handler
225 static int global_quad_port_a
; /* global quad port a indication */
227 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
228 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
229 MODULE_LICENSE("GPL");
230 MODULE_VERSION(DRV_VERSION
);
233 * Scale the NIC clock cycle by a large factor so that
234 * relatively small clock corrections can be added or
235 * substracted at each clock tick. The drawbacks of a
236 * large factor are a) that the clock register overflows
237 * more quickly (not such a big deal) and b) that the
238 * increment per tick has to fit into 24 bits.
241 * TIMINCA = IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS *
243 * TIMINCA += TIMINCA * adjustment [ppm] / 1e9
245 * The base scale factor is intentionally a power of two
246 * so that the division in %struct timecounter can be done with
249 #define IGB_TSYNC_SHIFT (19)
250 #define IGB_TSYNC_SCALE (1<<IGB_TSYNC_SHIFT)
253 * The duration of one clock cycle of the NIC.
255 * @todo This hard-coded value is part of the specification and might change
256 * in future hardware revisions. Add revision check.
258 #define IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS 16
260 #if (IGB_TSYNC_SCALE * IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS) >= (1<<24)
261 # error IGB_TSYNC_SCALE and/or IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS are too large to fit into TIMINCA
265 * igb_read_clock - read raw cycle counter (to be used by time counter)
267 static cycle_t
igb_read_clock(const struct cyclecounter
*tc
)
269 struct igb_adapter
*adapter
=
270 container_of(tc
, struct igb_adapter
, cycles
);
271 struct e1000_hw
*hw
= &adapter
->hw
;
274 stamp
= rd32(E1000_SYSTIML
);
275 stamp
|= (u64
)rd32(E1000_SYSTIMH
) << 32ULL;
282 * igb_get_hw_dev_name - return device name string
283 * used by hardware layer to print debugging information
285 char *igb_get_hw_dev_name(struct e1000_hw
*hw
)
287 struct igb_adapter
*adapter
= hw
->back
;
288 return adapter
->netdev
->name
;
292 * igb_get_time_str - format current NIC and system time as string
294 static char *igb_get_time_str(struct igb_adapter
*adapter
,
297 cycle_t hw
= adapter
->cycles
.read(&adapter
->cycles
);
298 struct timespec nic
= ns_to_timespec(timecounter_read(&adapter
->clock
));
300 struct timespec delta
;
301 getnstimeofday(&sys
);
303 delta
= timespec_sub(nic
, sys
);
306 "HW %llu, NIC %ld.%09lus, SYS %ld.%09lus, NIC-SYS %lds + %09luns",
308 (long)nic
.tv_sec
, nic
.tv_nsec
,
309 (long)sys
.tv_sec
, sys
.tv_nsec
,
310 (long)delta
.tv_sec
, delta
.tv_nsec
);
317 * igb_desc_unused - calculate if we have unused descriptors
319 static int igb_desc_unused(struct igb_ring
*ring
)
321 if (ring
->next_to_clean
> ring
->next_to_use
)
322 return ring
->next_to_clean
- ring
->next_to_use
- 1;
324 return ring
->count
+ ring
->next_to_clean
- ring
->next_to_use
- 1;
328 * igb_init_module - Driver Registration Routine
330 * igb_init_module is the first routine called when the driver is
331 * loaded. All it does is register with the PCI subsystem.
333 static int __init
igb_init_module(void)
336 printk(KERN_INFO
"%s - version %s\n",
337 igb_driver_string
, igb_driver_version
);
339 printk(KERN_INFO
"%s\n", igb_copyright
);
341 global_quad_port_a
= 0;
343 #ifdef CONFIG_IGB_DCA
344 dca_register_notify(&dca_notifier
);
347 ret
= pci_register_driver(&igb_driver
);
351 module_init(igb_init_module
);
354 * igb_exit_module - Driver Exit Cleanup Routine
356 * igb_exit_module is called just before the driver is removed
359 static void __exit
igb_exit_module(void)
361 #ifdef CONFIG_IGB_DCA
362 dca_unregister_notify(&dca_notifier
);
364 pci_unregister_driver(&igb_driver
);
367 module_exit(igb_exit_module
);
369 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
371 * igb_cache_ring_register - Descriptor ring to register mapping
372 * @adapter: board private structure to initialize
374 * Once we know the feature-set enabled for the device, we'll cache
375 * the register offset the descriptor ring is assigned to.
377 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
380 unsigned int rbase_offset
= adapter
->vfs_allocated_count
;
382 switch (adapter
->hw
.mac
.type
) {
384 /* The queues are allocated for virtualization such that VF 0
385 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
386 * In order to avoid collision we start at the first free queue
387 * and continue consuming queues in the same sequence
389 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
390 adapter
->rx_ring
[i
].reg_idx
= rbase_offset
+
392 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
393 adapter
->tx_ring
[i
].reg_idx
= rbase_offset
+
398 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
399 adapter
->rx_ring
[i
].reg_idx
= i
;
400 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
401 adapter
->tx_ring
[i
].reg_idx
= i
;
407 * igb_alloc_queues - Allocate memory for all rings
408 * @adapter: board private structure to initialize
410 * We allocate one ring per queue at run-time since we don't know the
411 * number of queues at compile-time.
413 static int igb_alloc_queues(struct igb_adapter
*adapter
)
417 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
418 sizeof(struct igb_ring
), GFP_KERNEL
);
419 if (!adapter
->tx_ring
)
422 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
423 sizeof(struct igb_ring
), GFP_KERNEL
);
424 if (!adapter
->rx_ring
) {
425 kfree(adapter
->tx_ring
);
429 adapter
->rx_ring
->buddy
= adapter
->tx_ring
;
431 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
432 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
433 ring
->count
= adapter
->tx_ring_count
;
434 ring
->adapter
= adapter
;
435 ring
->queue_index
= i
;
437 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
438 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
439 ring
->count
= adapter
->rx_ring_count
;
440 ring
->adapter
= adapter
;
441 ring
->queue_index
= i
;
442 ring
->itr_register
= E1000_ITR
;
444 /* set a default napi handler for each rx_ring */
445 netif_napi_add(adapter
->netdev
, &ring
->napi
, igb_poll
, 64);
448 igb_cache_ring_register(adapter
);
452 static void igb_free_queues(struct igb_adapter
*adapter
)
456 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
457 netif_napi_del(&adapter
->rx_ring
[i
].napi
);
459 adapter
->num_rx_queues
= 0;
460 adapter
->num_tx_queues
= 0;
462 kfree(adapter
->tx_ring
);
463 kfree(adapter
->rx_ring
);
466 #define IGB_N0_QUEUE -1
467 static void igb_assign_vector(struct igb_adapter
*adapter
, int rx_queue
,
468 int tx_queue
, int msix_vector
)
471 struct e1000_hw
*hw
= &adapter
->hw
;
474 switch (hw
->mac
.type
) {
476 /* The 82575 assigns vectors using a bitmask, which matches the
477 bitmask for the EICR/EIMS/EIMC registers. To assign one
478 or more queues to a vector, we write the appropriate bits
479 into the MSIXBM register for that vector. */
480 if (rx_queue
> IGB_N0_QUEUE
) {
481 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
482 adapter
->rx_ring
[rx_queue
].eims_value
= msixbm
;
484 if (tx_queue
> IGB_N0_QUEUE
) {
485 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
486 adapter
->tx_ring
[tx_queue
].eims_value
=
487 E1000_EICR_TX_QUEUE0
<< tx_queue
;
489 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
492 /* 82576 uses a table-based method for assigning vectors.
493 Each queue has a single entry in the table to which we write
494 a vector number along with a "valid" bit. Sadly, the layout
495 of the table is somewhat counterintuitive. */
496 if (rx_queue
> IGB_N0_QUEUE
) {
497 index
= (rx_queue
>> 1) + adapter
->vfs_allocated_count
;
498 ivar
= array_rd32(E1000_IVAR0
, index
);
499 if (rx_queue
& 0x1) {
500 /* vector goes into third byte of register */
501 ivar
= ivar
& 0xFF00FFFF;
502 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 16;
504 /* vector goes into low byte of register */
505 ivar
= ivar
& 0xFFFFFF00;
506 ivar
|= msix_vector
| E1000_IVAR_VALID
;
508 adapter
->rx_ring
[rx_queue
].eims_value
= 1 << msix_vector
;
509 array_wr32(E1000_IVAR0
, index
, ivar
);
511 if (tx_queue
> IGB_N0_QUEUE
) {
512 index
= (tx_queue
>> 1) + adapter
->vfs_allocated_count
;
513 ivar
= array_rd32(E1000_IVAR0
, index
);
514 if (tx_queue
& 0x1) {
515 /* vector goes into high byte of register */
516 ivar
= ivar
& 0x00FFFFFF;
517 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 24;
519 /* vector goes into second byte of register */
520 ivar
= ivar
& 0xFFFF00FF;
521 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << 8;
523 adapter
->tx_ring
[tx_queue
].eims_value
= 1 << msix_vector
;
524 array_wr32(E1000_IVAR0
, index
, ivar
);
534 * igb_configure_msix - Configure MSI-X hardware
536 * igb_configure_msix sets up the hardware to properly
537 * generate MSI-X interrupts.
539 static void igb_configure_msix(struct igb_adapter
*adapter
)
543 struct e1000_hw
*hw
= &adapter
->hw
;
545 adapter
->eims_enable_mask
= 0;
546 if (hw
->mac
.type
== e1000_82576
)
547 /* Turn on MSI-X capability first, or our settings
548 * won't stick. And it will take days to debug. */
549 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
550 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
553 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
554 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
555 igb_assign_vector(adapter
, IGB_N0_QUEUE
, i
, vector
++);
556 adapter
->eims_enable_mask
|= tx_ring
->eims_value
;
557 if (tx_ring
->itr_val
)
558 writel(tx_ring
->itr_val
,
559 hw
->hw_addr
+ tx_ring
->itr_register
);
561 writel(1, hw
->hw_addr
+ tx_ring
->itr_register
);
564 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
565 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
566 rx_ring
->buddy
= NULL
;
567 igb_assign_vector(adapter
, i
, IGB_N0_QUEUE
, vector
++);
568 adapter
->eims_enable_mask
|= rx_ring
->eims_value
;
569 if (rx_ring
->itr_val
)
570 writel(rx_ring
->itr_val
,
571 hw
->hw_addr
+ rx_ring
->itr_register
);
573 writel(1, hw
->hw_addr
+ rx_ring
->itr_register
);
577 /* set vector for other causes, i.e. link changes */
578 switch (hw
->mac
.type
) {
580 array_wr32(E1000_MSIXBM(0), vector
++,
583 tmp
= rd32(E1000_CTRL_EXT
);
584 /* enable MSI-X PBA support*/
585 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
587 /* Auto-Mask interrupts upon ICR read. */
588 tmp
|= E1000_CTRL_EXT_EIAME
;
589 tmp
|= E1000_CTRL_EXT_IRCA
;
591 wr32(E1000_CTRL_EXT
, tmp
);
592 adapter
->eims_enable_mask
|= E1000_EIMS_OTHER
;
593 adapter
->eims_other
= E1000_EIMS_OTHER
;
598 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
599 wr32(E1000_IVAR_MISC
, tmp
);
601 adapter
->eims_enable_mask
= (1 << (vector
)) - 1;
602 adapter
->eims_other
= 1 << (vector
- 1);
605 /* do nothing, since nothing else supports MSI-X */
607 } /* switch (hw->mac.type) */
612 * igb_request_msix - Initialize MSI-X interrupts
614 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
617 static int igb_request_msix(struct igb_adapter
*adapter
)
619 struct net_device
*netdev
= adapter
->netdev
;
620 int i
, err
= 0, vector
= 0;
624 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
625 struct igb_ring
*ring
= &(adapter
->tx_ring
[i
]);
626 sprintf(ring
->name
, "%s-tx-%d", netdev
->name
, i
);
627 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
628 &igb_msix_tx
, 0, ring
->name
,
629 &(adapter
->tx_ring
[i
]));
632 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
633 ring
->itr_val
= 976; /* ~4000 ints/sec */
636 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
637 struct igb_ring
*ring
= &(adapter
->rx_ring
[i
]);
638 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
639 sprintf(ring
->name
, "%s-rx-%d", netdev
->name
, i
);
641 memcpy(ring
->name
, netdev
->name
, IFNAMSIZ
);
642 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
643 &igb_msix_rx
, 0, ring
->name
,
644 &(adapter
->rx_ring
[i
]));
647 ring
->itr_register
= E1000_EITR(0) + (vector
<< 2);
648 ring
->itr_val
= adapter
->itr
;
652 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
653 &igb_msix_other
, 0, netdev
->name
, netdev
);
657 igb_configure_msix(adapter
);
663 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
665 if (adapter
->msix_entries
) {
666 pci_disable_msix(adapter
->pdev
);
667 kfree(adapter
->msix_entries
);
668 adapter
->msix_entries
= NULL
;
669 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
670 pci_disable_msi(adapter
->pdev
);
676 * igb_set_interrupt_capability - set MSI or MSI-X if supported
678 * Attempt to configure interrupts using the best available
679 * capabilities of the hardware and kernel.
681 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
)
686 /* Number of supported queues. */
687 /* Having more queues than CPUs doesn't make sense. */
688 adapter
->num_rx_queues
= min_t(u32
, IGB_MAX_RX_QUEUES
, num_online_cpus());
689 adapter
->num_tx_queues
= min_t(u32
, IGB_MAX_TX_QUEUES
, num_online_cpus());
691 numvecs
= adapter
->num_tx_queues
+ adapter
->num_rx_queues
+ 1;
692 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
694 if (!adapter
->msix_entries
)
697 for (i
= 0; i
< numvecs
; i
++)
698 adapter
->msix_entries
[i
].entry
= i
;
700 err
= pci_enable_msix(adapter
->pdev
,
701 adapter
->msix_entries
,
706 igb_reset_interrupt_capability(adapter
);
708 /* If we can't do MSI-X, try MSI */
710 #ifdef CONFIG_PCI_IOV
711 /* disable SR-IOV for non MSI-X configurations */
712 if (adapter
->vf_data
) {
713 struct e1000_hw
*hw
= &adapter
->hw
;
714 /* disable iov and allow time for transactions to clear */
715 pci_disable_sriov(adapter
->pdev
);
718 kfree(adapter
->vf_data
);
719 adapter
->vf_data
= NULL
;
720 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
722 dev_info(&adapter
->pdev
->dev
, "IOV Disabled\n");
725 adapter
->num_rx_queues
= 1;
726 adapter
->num_tx_queues
= 1;
727 if (!pci_enable_msi(adapter
->pdev
))
728 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
730 /* Notify the stack of the (possibly) reduced Tx Queue count. */
731 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
736 * igb_request_irq - initialize interrupts
738 * Attempts to configure interrupts using the best available
739 * capabilities of the hardware and kernel.
741 static int igb_request_irq(struct igb_adapter
*adapter
)
743 struct net_device
*netdev
= adapter
->netdev
;
744 struct e1000_hw
*hw
= &adapter
->hw
;
747 if (adapter
->msix_entries
) {
748 err
= igb_request_msix(adapter
);
751 /* fall back to MSI */
752 igb_reset_interrupt_capability(adapter
);
753 if (!pci_enable_msi(adapter
->pdev
))
754 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
755 igb_free_all_tx_resources(adapter
);
756 igb_free_all_rx_resources(adapter
);
757 adapter
->num_rx_queues
= 1;
758 igb_alloc_queues(adapter
);
760 switch (hw
->mac
.type
) {
762 wr32(E1000_MSIXBM(0),
763 (E1000_EICR_RX_QUEUE0
| E1000_EIMS_OTHER
));
766 wr32(E1000_IVAR0
, E1000_IVAR_VALID
);
773 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
774 err
= request_irq(adapter
->pdev
->irq
, &igb_intr_msi
, 0,
775 netdev
->name
, netdev
);
778 /* fall back to legacy interrupts */
779 igb_reset_interrupt_capability(adapter
);
780 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
783 err
= request_irq(adapter
->pdev
->irq
, &igb_intr
, IRQF_SHARED
,
784 netdev
->name
, netdev
);
787 dev_err(&adapter
->pdev
->dev
, "Error %d getting interrupt\n",
794 static void igb_free_irq(struct igb_adapter
*adapter
)
796 struct net_device
*netdev
= adapter
->netdev
;
798 if (adapter
->msix_entries
) {
801 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
802 free_irq(adapter
->msix_entries
[vector
++].vector
,
803 &(adapter
->tx_ring
[i
]));
804 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
805 free_irq(adapter
->msix_entries
[vector
++].vector
,
806 &(adapter
->rx_ring
[i
]));
808 free_irq(adapter
->msix_entries
[vector
++].vector
, netdev
);
812 free_irq(adapter
->pdev
->irq
, netdev
);
816 * igb_irq_disable - Mask off interrupt generation on the NIC
817 * @adapter: board private structure
819 static void igb_irq_disable(struct igb_adapter
*adapter
)
821 struct e1000_hw
*hw
= &adapter
->hw
;
823 if (adapter
->msix_entries
) {
825 wr32(E1000_EIMC
, ~0);
832 synchronize_irq(adapter
->pdev
->irq
);
836 * igb_irq_enable - Enable default interrupt generation settings
837 * @adapter: board private structure
839 static void igb_irq_enable(struct igb_adapter
*adapter
)
841 struct e1000_hw
*hw
= &adapter
->hw
;
843 if (adapter
->msix_entries
) {
844 wr32(E1000_EIAC
, adapter
->eims_enable_mask
);
845 wr32(E1000_EIAM
, adapter
->eims_enable_mask
);
846 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
847 if (adapter
->vfs_allocated_count
)
848 wr32(E1000_MBVFIMR
, 0xFF);
849 wr32(E1000_IMS
, (E1000_IMS_LSC
| E1000_IMS_VMMB
|
850 E1000_IMS_DOUTSYNC
));
852 wr32(E1000_IMS
, IMS_ENABLE_MASK
);
853 wr32(E1000_IAM
, IMS_ENABLE_MASK
);
857 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
859 struct net_device
*netdev
= adapter
->netdev
;
860 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
861 u16 old_vid
= adapter
->mng_vlan_id
;
862 if (adapter
->vlgrp
) {
863 if (!vlan_group_get_device(adapter
->vlgrp
, vid
)) {
864 if (adapter
->hw
.mng_cookie
.status
&
865 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
866 igb_vlan_rx_add_vid(netdev
, vid
);
867 adapter
->mng_vlan_id
= vid
;
869 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
871 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
873 !vlan_group_get_device(adapter
->vlgrp
, old_vid
))
874 igb_vlan_rx_kill_vid(netdev
, old_vid
);
876 adapter
->mng_vlan_id
= vid
;
881 * igb_release_hw_control - release control of the h/w to f/w
882 * @adapter: address of board private structure
884 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
885 * For ASF and Pass Through versions of f/w this means that the
886 * driver is no longer loaded.
889 static void igb_release_hw_control(struct igb_adapter
*adapter
)
891 struct e1000_hw
*hw
= &adapter
->hw
;
894 /* Let firmware take over control of h/w */
895 ctrl_ext
= rd32(E1000_CTRL_EXT
);
897 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
902 * igb_get_hw_control - get control of the h/w from f/w
903 * @adapter: address of board private structure
905 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
906 * For ASF and Pass Through versions of f/w this means that
907 * the driver is loaded.
910 static void igb_get_hw_control(struct igb_adapter
*adapter
)
912 struct e1000_hw
*hw
= &adapter
->hw
;
915 /* Let firmware know the driver has taken over */
916 ctrl_ext
= rd32(E1000_CTRL_EXT
);
918 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
922 * igb_configure - configure the hardware for RX and TX
923 * @adapter: private board structure
925 static void igb_configure(struct igb_adapter
*adapter
)
927 struct net_device
*netdev
= adapter
->netdev
;
930 igb_get_hw_control(adapter
);
931 igb_set_rx_mode(netdev
);
933 igb_restore_vlan(adapter
);
935 igb_configure_tx(adapter
);
936 igb_setup_rctl(adapter
);
937 igb_configure_rx(adapter
);
939 igb_rx_fifo_flush_82575(&adapter
->hw
);
941 /* call igb_desc_unused which always leaves
942 * at least 1 descriptor unused to make sure
943 * next_to_use != next_to_clean */
944 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
945 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
946 igb_alloc_rx_buffers_adv(ring
, igb_desc_unused(ring
));
950 adapter
->tx_queue_len
= netdev
->tx_queue_len
;
955 * igb_up - Open the interface and prepare it to handle traffic
956 * @adapter: board private structure
959 int igb_up(struct igb_adapter
*adapter
)
961 struct e1000_hw
*hw
= &adapter
->hw
;
964 /* hardware has been reset, we need to reload some things */
965 igb_configure(adapter
);
967 clear_bit(__IGB_DOWN
, &adapter
->state
);
969 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
970 napi_enable(&adapter
->rx_ring
[i
].napi
);
971 if (adapter
->msix_entries
)
972 igb_configure_msix(adapter
);
974 igb_vmm_control(adapter
);
975 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
976 igb_set_vmolr(hw
, adapter
->vfs_allocated_count
);
978 /* Clear any pending interrupts. */
980 igb_irq_enable(adapter
);
982 netif_tx_start_all_queues(adapter
->netdev
);
984 /* Fire a link change interrupt to start the watchdog. */
985 wr32(E1000_ICS
, E1000_ICS_LSC
);
989 void igb_down(struct igb_adapter
*adapter
)
991 struct e1000_hw
*hw
= &adapter
->hw
;
992 struct net_device
*netdev
= adapter
->netdev
;
996 /* signal that we're down so the interrupt handler does not
997 * reschedule our watchdog timer */
998 set_bit(__IGB_DOWN
, &adapter
->state
);
1000 /* disable receives in the hardware */
1001 rctl
= rd32(E1000_RCTL
);
1002 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1003 /* flush and sleep below */
1005 netif_tx_stop_all_queues(netdev
);
1007 /* disable transmits in the hardware */
1008 tctl
= rd32(E1000_TCTL
);
1009 tctl
&= ~E1000_TCTL_EN
;
1010 wr32(E1000_TCTL
, tctl
);
1011 /* flush both disables and wait for them to finish */
1015 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1016 napi_disable(&adapter
->rx_ring
[i
].napi
);
1018 igb_irq_disable(adapter
);
1020 del_timer_sync(&adapter
->watchdog_timer
);
1021 del_timer_sync(&adapter
->phy_info_timer
);
1023 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
1024 netif_carrier_off(netdev
);
1026 /* record the stats before reset*/
1027 igb_update_stats(adapter
);
1029 adapter
->link_speed
= 0;
1030 adapter
->link_duplex
= 0;
1032 if (!pci_channel_offline(adapter
->pdev
))
1034 igb_clean_all_tx_rings(adapter
);
1035 igb_clean_all_rx_rings(adapter
);
1036 #ifdef CONFIG_IGB_DCA
1038 /* since we reset the hardware DCA settings were cleared */
1039 igb_setup_dca(adapter
);
1043 void igb_reinit_locked(struct igb_adapter
*adapter
)
1045 WARN_ON(in_interrupt());
1046 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
1050 clear_bit(__IGB_RESETTING
, &adapter
->state
);
1053 void igb_reset(struct igb_adapter
*adapter
)
1055 struct e1000_hw
*hw
= &adapter
->hw
;
1056 struct e1000_mac_info
*mac
= &hw
->mac
;
1057 struct e1000_fc_info
*fc
= &hw
->fc
;
1058 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
;
1061 /* Repartition Pba for greater than 9k mtu
1062 * To take effect CTRL.RST is required.
1064 switch (mac
->type
) {
1066 pba
= E1000_PBA_64K
;
1070 pba
= E1000_PBA_34K
;
1074 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
1075 (mac
->type
< e1000_82576
)) {
1076 /* adjust PBA for jumbo frames */
1077 wr32(E1000_PBA
, pba
);
1079 /* To maintain wire speed transmits, the Tx FIFO should be
1080 * large enough to accommodate two full transmit packets,
1081 * rounded up to the next 1KB and expressed in KB. Likewise,
1082 * the Rx FIFO should be large enough to accommodate at least
1083 * one full receive packet and is similarly rounded up and
1084 * expressed in KB. */
1085 pba
= rd32(E1000_PBA
);
1086 /* upper 16 bits has Tx packet buffer allocation size in KB */
1087 tx_space
= pba
>> 16;
1088 /* lower 16 bits has Rx packet buffer allocation size in KB */
1090 /* the tx fifo also stores 16 bytes of information about the tx
1091 * but don't include ethernet FCS because hardware appends it */
1092 min_tx_space
= (adapter
->max_frame_size
+
1093 sizeof(union e1000_adv_tx_desc
) -
1095 min_tx_space
= ALIGN(min_tx_space
, 1024);
1096 min_tx_space
>>= 10;
1097 /* software strips receive CRC, so leave room for it */
1098 min_rx_space
= adapter
->max_frame_size
;
1099 min_rx_space
= ALIGN(min_rx_space
, 1024);
1100 min_rx_space
>>= 10;
1102 /* If current Tx allocation is less than the min Tx FIFO size,
1103 * and the min Tx FIFO size is less than the current Rx FIFO
1104 * allocation, take space away from current Rx allocation */
1105 if (tx_space
< min_tx_space
&&
1106 ((min_tx_space
- tx_space
) < pba
)) {
1107 pba
= pba
- (min_tx_space
- tx_space
);
1109 /* if short on rx space, rx wins and must trump tx
1111 if (pba
< min_rx_space
)
1114 wr32(E1000_PBA
, pba
);
1117 /* flow control settings */
1118 /* The high water mark must be low enough to fit one full frame
1119 * (or the size used for early receive) above it in the Rx FIFO.
1120 * Set it to the lower of:
1121 * - 90% of the Rx FIFO size, or
1122 * - the full Rx FIFO size minus one full frame */
1123 hwm
= min(((pba
<< 10) * 9 / 10),
1124 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1126 if (mac
->type
< e1000_82576
) {
1127 fc
->high_water
= hwm
& 0xFFF8; /* 8-byte granularity */
1128 fc
->low_water
= fc
->high_water
- 8;
1130 fc
->high_water
= hwm
& 0xFFF0; /* 16-byte granularity */
1131 fc
->low_water
= fc
->high_water
- 16;
1133 fc
->pause_time
= 0xFFFF;
1135 fc
->current_mode
= fc
->requested_mode
;
1137 /* disable receive for all VFs and wait one second */
1138 if (adapter
->vfs_allocated_count
) {
1140 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1141 adapter
->vf_data
[i
].clear_to_send
= false;
1143 /* ping all the active vfs to let them know we are going down */
1144 igb_ping_all_vfs(adapter
);
1146 /* disable transmits and receives */
1147 wr32(E1000_VFRE
, 0);
1148 wr32(E1000_VFTE
, 0);
1151 /* Allow time for pending master requests to run */
1152 adapter
->hw
.mac
.ops
.reset_hw(&adapter
->hw
);
1155 if (adapter
->hw
.mac
.ops
.init_hw(&adapter
->hw
))
1156 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
1158 igb_update_mng_vlan(adapter
);
1160 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1161 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
1163 igb_reset_adaptive(&adapter
->hw
);
1164 igb_get_phy_info(&adapter
->hw
);
1167 static const struct net_device_ops igb_netdev_ops
= {
1168 .ndo_open
= igb_open
,
1169 .ndo_stop
= igb_close
,
1170 .ndo_start_xmit
= igb_xmit_frame_adv
,
1171 .ndo_get_stats
= igb_get_stats
,
1172 .ndo_set_rx_mode
= igb_set_rx_mode
,
1173 .ndo_set_multicast_list
= igb_set_rx_mode
,
1174 .ndo_set_mac_address
= igb_set_mac
,
1175 .ndo_change_mtu
= igb_change_mtu
,
1176 .ndo_do_ioctl
= igb_ioctl
,
1177 .ndo_tx_timeout
= igb_tx_timeout
,
1178 .ndo_validate_addr
= eth_validate_addr
,
1179 .ndo_vlan_rx_register
= igb_vlan_rx_register
,
1180 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
1181 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
1182 #ifdef CONFIG_NET_POLL_CONTROLLER
1183 .ndo_poll_controller
= igb_netpoll
,
1188 * igb_probe - Device Initialization Routine
1189 * @pdev: PCI device information struct
1190 * @ent: entry in igb_pci_tbl
1192 * Returns 0 on success, negative on failure
1194 * igb_probe initializes an adapter identified by a pci_dev structure.
1195 * The OS initialization, configuring of the adapter private structure,
1196 * and a hardware reset occur.
1198 static int __devinit
igb_probe(struct pci_dev
*pdev
,
1199 const struct pci_device_id
*ent
)
1201 struct net_device
*netdev
;
1202 struct igb_adapter
*adapter
;
1203 struct e1000_hw
*hw
;
1204 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
1205 unsigned long mmio_start
, mmio_len
;
1206 int err
, pci_using_dac
;
1207 u16 eeprom_data
= 0;
1208 u16 eeprom_apme_mask
= IGB_EEPROM_APME
;
1211 err
= pci_enable_device_mem(pdev
);
1216 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(64));
1218 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64));
1222 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
1224 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
1226 dev_err(&pdev
->dev
, "No usable DMA "
1227 "configuration, aborting\n");
1233 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
1239 err
= pci_enable_pcie_error_reporting(pdev
);
1241 dev_err(&pdev
->dev
, "pci_enable_pcie_error_reporting failed "
1243 /* non-fatal, continue */
1246 pci_set_master(pdev
);
1247 pci_save_state(pdev
);
1250 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
1251 IGB_ABS_MAX_TX_QUEUES
);
1253 goto err_alloc_etherdev
;
1255 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
1257 pci_set_drvdata(pdev
, netdev
);
1258 adapter
= netdev_priv(netdev
);
1259 adapter
->netdev
= netdev
;
1260 adapter
->pdev
= pdev
;
1263 adapter
->msg_enable
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
;
1265 mmio_start
= pci_resource_start(pdev
, 0);
1266 mmio_len
= pci_resource_len(pdev
, 0);
1269 hw
->hw_addr
= ioremap(mmio_start
, mmio_len
);
1273 netdev
->netdev_ops
= &igb_netdev_ops
;
1274 igb_set_ethtool_ops(netdev
);
1275 netdev
->watchdog_timeo
= 5 * HZ
;
1277 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
1279 netdev
->mem_start
= mmio_start
;
1280 netdev
->mem_end
= mmio_start
+ mmio_len
;
1282 /* PCI config space info */
1283 hw
->vendor_id
= pdev
->vendor
;
1284 hw
->device_id
= pdev
->device
;
1285 hw
->revision_id
= pdev
->revision
;
1286 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
1287 hw
->subsystem_device_id
= pdev
->subsystem_device
;
1289 /* setup the private structure */
1291 /* Copy the default MAC, PHY and NVM function pointers */
1292 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
1293 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
1294 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
1295 /* Initialize skew-specific constants */
1296 err
= ei
->get_invariants(hw
);
1300 #ifdef CONFIG_PCI_IOV
1301 /* since iov functionality isn't critical to base device function we
1302 * can accept failure. If it fails we don't allow iov to be enabled */
1303 if (hw
->mac
.type
== e1000_82576
) {
1304 /* 82576 supports a maximum of 7 VFs in addition to the PF */
1305 unsigned int num_vfs
= (max_vfs
> 7) ? 7 : max_vfs
;
1307 unsigned char mac_addr
[ETH_ALEN
];
1310 adapter
->vf_data
= kcalloc(num_vfs
,
1311 sizeof(struct vf_data_storage
),
1313 if (!adapter
->vf_data
) {
1315 "Could not allocate VF private data - "
1316 "IOV enable failed\n");
1318 err
= pci_enable_sriov(pdev
, num_vfs
);
1320 adapter
->vfs_allocated_count
= num_vfs
;
1321 dev_info(&pdev
->dev
,
1322 "%d vfs allocated\n",
1325 i
< adapter
->vfs_allocated_count
;
1327 random_ether_addr(mac_addr
);
1328 igb_set_vf_mac(adapter
, i
,
1332 kfree(adapter
->vf_data
);
1333 adapter
->vf_data
= NULL
;
1340 /* setup the private structure */
1341 err
= igb_sw_init(adapter
);
1345 igb_get_bus_info_pcie(hw
);
1348 switch (hw
->mac
.type
) {
1350 adapter
->flags
|= IGB_FLAG_NEED_CTX_IDX
;
1357 hw
->phy
.autoneg_wait_to_complete
= false;
1358 hw
->mac
.adaptive_ifs
= true;
1360 /* Copper options */
1361 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1362 hw
->phy
.mdix
= AUTO_ALL_MODES
;
1363 hw
->phy
.disable_polarity_correction
= false;
1364 hw
->phy
.ms_type
= e1000_ms_hw_default
;
1367 if (igb_check_reset_block(hw
))
1368 dev_info(&pdev
->dev
,
1369 "PHY reset is blocked due to SOL/IDER session.\n");
1371 netdev
->features
= NETIF_F_SG
|
1373 NETIF_F_HW_VLAN_TX
|
1374 NETIF_F_HW_VLAN_RX
|
1375 NETIF_F_HW_VLAN_FILTER
;
1377 netdev
->features
|= NETIF_F_IPV6_CSUM
;
1378 netdev
->features
|= NETIF_F_TSO
;
1379 netdev
->features
|= NETIF_F_TSO6
;
1381 netdev
->features
|= NETIF_F_GRO
;
1383 netdev
->vlan_features
|= NETIF_F_TSO
;
1384 netdev
->vlan_features
|= NETIF_F_TSO6
;
1385 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
1386 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
1387 netdev
->vlan_features
|= NETIF_F_SG
;
1390 netdev
->features
|= NETIF_F_HIGHDMA
;
1392 if (adapter
->hw
.mac
.type
== e1000_82576
)
1393 netdev
->features
|= NETIF_F_SCTP_CSUM
;
1395 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(&adapter
->hw
);
1397 /* before reading the NVM, reset the controller to put the device in a
1398 * known good starting state */
1399 hw
->mac
.ops
.reset_hw(hw
);
1401 /* make sure the NVM is good */
1402 if (igb_validate_nvm_checksum(hw
) < 0) {
1403 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
1408 /* copy the MAC address out of the NVM */
1409 if (hw
->mac
.ops
.read_mac_addr(hw
))
1410 dev_err(&pdev
->dev
, "NVM Read Error\n");
1412 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1413 memcpy(netdev
->perm_addr
, hw
->mac
.addr
, netdev
->addr_len
);
1415 if (!is_valid_ether_addr(netdev
->perm_addr
)) {
1416 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
1421 setup_timer(&adapter
->watchdog_timer
, &igb_watchdog
,
1422 (unsigned long) adapter
);
1423 setup_timer(&adapter
->phy_info_timer
, &igb_update_phy_info
,
1424 (unsigned long) adapter
);
1426 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
1427 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
1429 /* Initialize link properties that are user-changeable */
1430 adapter
->fc_autoneg
= true;
1431 hw
->mac
.autoneg
= true;
1432 hw
->phy
.autoneg_advertised
= 0x2f;
1434 hw
->fc
.requested_mode
= e1000_fc_default
;
1435 hw
->fc
.current_mode
= e1000_fc_default
;
1437 adapter
->itr_setting
= IGB_DEFAULT_ITR
;
1438 adapter
->itr
= IGB_START_ITR
;
1440 igb_validate_mdi_setting(hw
);
1442 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1443 * enable the ACPI Magic Packet filter
1446 if (hw
->bus
.func
== 0)
1447 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
, 1, &eeprom_data
);
1448 else if (hw
->bus
.func
== 1)
1449 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_B
, 1, &eeprom_data
);
1451 if (eeprom_data
& eeprom_apme_mask
)
1452 adapter
->eeprom_wol
|= E1000_WUFC_MAG
;
1454 /* now that we have the eeprom settings, apply the special cases where
1455 * the eeprom may be wrong or the board simply won't support wake on
1456 * lan on a particular port */
1457 switch (pdev
->device
) {
1458 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1459 adapter
->eeprom_wol
= 0;
1461 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1462 case E1000_DEV_ID_82576_FIBER
:
1463 case E1000_DEV_ID_82576_SERDES
:
1464 /* Wake events only supported on port A for dual fiber
1465 * regardless of eeprom setting */
1466 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
1467 adapter
->eeprom_wol
= 0;
1469 case E1000_DEV_ID_82576_QUAD_COPPER
:
1470 /* if quad port adapter, disable WoL on all but port A */
1471 if (global_quad_port_a
!= 0)
1472 adapter
->eeprom_wol
= 0;
1474 adapter
->flags
|= IGB_FLAG_QUAD_PORT_A
;
1475 /* Reset for multiple quad port adapters */
1476 if (++global_quad_port_a
== 4)
1477 global_quad_port_a
= 0;
1481 /* initialize the wol settings based on the eeprom settings */
1482 adapter
->wol
= adapter
->eeprom_wol
;
1483 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1485 /* reset the hardware with the new settings */
1488 /* let the f/w know that the h/w is now under the control of the
1490 igb_get_hw_control(adapter
);
1492 strcpy(netdev
->name
, "eth%d");
1493 err
= register_netdev(netdev
);
1497 /* carrier off reporting is important to ethtool even BEFORE open */
1498 netif_carrier_off(netdev
);
1500 #ifdef CONFIG_IGB_DCA
1501 if (dca_add_requester(&pdev
->dev
) == 0) {
1502 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
1503 dev_info(&pdev
->dev
, "DCA enabled\n");
1504 igb_setup_dca(adapter
);
1509 * Initialize hardware timer: we keep it running just in case
1510 * that some program needs it later on.
1512 memset(&adapter
->cycles
, 0, sizeof(adapter
->cycles
));
1513 adapter
->cycles
.read
= igb_read_clock
;
1514 adapter
->cycles
.mask
= CLOCKSOURCE_MASK(64);
1515 adapter
->cycles
.mult
= 1;
1516 adapter
->cycles
.shift
= IGB_TSYNC_SHIFT
;
1519 IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS
* IGB_TSYNC_SCALE
);
1522 * Avoid rollover while we initialize by resetting the time counter.
1524 wr32(E1000_SYSTIML
, 0x00000000);
1525 wr32(E1000_SYSTIMH
, 0x00000000);
1528 * Set registers so that rollover occurs soon to test this.
1530 wr32(E1000_SYSTIML
, 0x00000000);
1531 wr32(E1000_SYSTIMH
, 0xFF800000);
1534 timecounter_init(&adapter
->clock
,
1536 ktime_to_ns(ktime_get_real()));
1539 * Synchronize our NIC clock against system wall clock. NIC
1540 * time stamp reading requires ~3us per sample, each sample
1541 * was pretty stable even under load => only require 10
1542 * samples for each offset comparison.
1544 memset(&adapter
->compare
, 0, sizeof(adapter
->compare
));
1545 adapter
->compare
.source
= &adapter
->clock
;
1546 adapter
->compare
.target
= ktime_get_real
;
1547 adapter
->compare
.num_samples
= 10;
1548 timecompare_update(&adapter
->compare
, 0);
1554 "igb: %s: hw %p initialized timer\n",
1555 igb_get_time_str(adapter
, buffer
),
1560 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
1561 /* print bus type/speed/width info */
1562 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
1564 ((hw
->bus
.speed
== e1000_bus_speed_2500
)
1565 ? "2.5Gb/s" : "unknown"),
1566 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
) ? "Width x4" :
1567 (hw
->bus
.width
== e1000_bus_width_pcie_x2
) ? "Width x2" :
1568 (hw
->bus
.width
== e1000_bus_width_pcie_x1
) ? "Width x1" :
1572 igb_read_part_num(hw
, &part_num
);
1573 dev_info(&pdev
->dev
, "%s: PBA No: %06x-%03x\n", netdev
->name
,
1574 (part_num
>> 8), (part_num
& 0xff));
1576 dev_info(&pdev
->dev
,
1577 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1578 adapter
->msix_entries
? "MSI-X" :
1579 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
1580 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
1585 igb_release_hw_control(adapter
);
1587 if (!igb_check_reset_block(hw
))
1590 if (hw
->flash_address
)
1591 iounmap(hw
->flash_address
);
1593 igb_free_queues(adapter
);
1595 iounmap(hw
->hw_addr
);
1597 free_netdev(netdev
);
1599 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1603 pci_disable_device(pdev
);
1608 * igb_remove - Device Removal Routine
1609 * @pdev: PCI device information struct
1611 * igb_remove is called by the PCI subsystem to alert the driver
1612 * that it should release a PCI device. The could be caused by a
1613 * Hot-Plug event, or because the driver is going to be removed from
1616 static void __devexit
igb_remove(struct pci_dev
*pdev
)
1618 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1619 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1620 struct e1000_hw
*hw
= &adapter
->hw
;
1623 /* flush_scheduled work may reschedule our watchdog task, so
1624 * explicitly disable watchdog tasks from being rescheduled */
1625 set_bit(__IGB_DOWN
, &adapter
->state
);
1626 del_timer_sync(&adapter
->watchdog_timer
);
1627 del_timer_sync(&adapter
->phy_info_timer
);
1629 flush_scheduled_work();
1631 #ifdef CONFIG_IGB_DCA
1632 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
1633 dev_info(&pdev
->dev
, "DCA disabled\n");
1634 dca_remove_requester(&pdev
->dev
);
1635 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
1636 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
1640 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1641 * would have already happened in close and is redundant. */
1642 igb_release_hw_control(adapter
);
1644 unregister_netdev(netdev
);
1646 if (!igb_check_reset_block(&adapter
->hw
))
1647 igb_reset_phy(&adapter
->hw
);
1649 igb_reset_interrupt_capability(adapter
);
1651 igb_free_queues(adapter
);
1653 #ifdef CONFIG_PCI_IOV
1654 /* reclaim resources allocated to VFs */
1655 if (adapter
->vf_data
) {
1656 /* disable iov and allow time for transactions to clear */
1657 pci_disable_sriov(pdev
);
1660 kfree(adapter
->vf_data
);
1661 adapter
->vf_data
= NULL
;
1662 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1664 dev_info(&pdev
->dev
, "IOV Disabled\n");
1667 iounmap(hw
->hw_addr
);
1668 if (hw
->flash_address
)
1669 iounmap(hw
->flash_address
);
1670 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
1673 free_netdev(netdev
);
1675 err
= pci_disable_pcie_error_reporting(pdev
);
1678 "pci_disable_pcie_error_reporting failed 0x%x\n", err
);
1680 pci_disable_device(pdev
);
1684 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1685 * @adapter: board private structure to initialize
1687 * igb_sw_init initializes the Adapter private data structure.
1688 * Fields are initialized based on PCI device information and
1689 * OS network device settings (MTU size).
1691 static int __devinit
igb_sw_init(struct igb_adapter
*adapter
)
1693 struct e1000_hw
*hw
= &adapter
->hw
;
1694 struct net_device
*netdev
= adapter
->netdev
;
1695 struct pci_dev
*pdev
= adapter
->pdev
;
1697 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
1699 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
1700 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
1701 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1702 adapter
->rx_ps_hdr_size
= 0; /* disable packet split */
1703 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1704 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
1706 /* This call may decrease the number of queues depending on
1707 * interrupt mode. */
1708 igb_set_interrupt_capability(adapter
);
1710 if (igb_alloc_queues(adapter
)) {
1711 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
1715 /* Explicitly disable IRQ since the NIC can be in any state. */
1716 igb_irq_disable(adapter
);
1718 set_bit(__IGB_DOWN
, &adapter
->state
);
1723 * igb_open - Called when a network interface is made active
1724 * @netdev: network interface device structure
1726 * Returns 0 on success, negative value on failure
1728 * The open entry point is called when a network interface is made
1729 * active by the system (IFF_UP). At this point all resources needed
1730 * for transmit and receive operations are allocated, the interrupt
1731 * handler is registered with the OS, the watchdog timer is started,
1732 * and the stack is notified that the interface is ready.
1734 static int igb_open(struct net_device
*netdev
)
1736 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1737 struct e1000_hw
*hw
= &adapter
->hw
;
1741 /* disallow open during test */
1742 if (test_bit(__IGB_TESTING
, &adapter
->state
))
1745 netif_carrier_off(netdev
);
1747 /* allocate transmit descriptors */
1748 err
= igb_setup_all_tx_resources(adapter
);
1752 /* allocate receive descriptors */
1753 err
= igb_setup_all_rx_resources(adapter
);
1757 /* e1000_power_up_phy(adapter); */
1759 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1760 if ((adapter
->hw
.mng_cookie
.status
&
1761 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
))
1762 igb_update_mng_vlan(adapter
);
1764 /* before we allocate an interrupt, we must be ready to handle it.
1765 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1766 * as soon as we call pci_request_irq, so we have to setup our
1767 * clean_rx handler before we do so. */
1768 igb_configure(adapter
);
1770 igb_vmm_control(adapter
);
1771 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
1772 igb_set_vmolr(hw
, adapter
->vfs_allocated_count
);
1774 err
= igb_request_irq(adapter
);
1778 /* From here on the code is the same as igb_up() */
1779 clear_bit(__IGB_DOWN
, &adapter
->state
);
1781 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1782 napi_enable(&adapter
->rx_ring
[i
].napi
);
1784 /* Clear any pending interrupts. */
1787 igb_irq_enable(adapter
);
1789 netif_tx_start_all_queues(netdev
);
1791 /* Fire a link status change interrupt to start the watchdog. */
1792 wr32(E1000_ICS
, E1000_ICS_LSC
);
1797 igb_release_hw_control(adapter
);
1798 /* e1000_power_down_phy(adapter); */
1799 igb_free_all_rx_resources(adapter
);
1801 igb_free_all_tx_resources(adapter
);
1809 * igb_close - Disables a network interface
1810 * @netdev: network interface device structure
1812 * Returns 0, this is not allowed to fail
1814 * The close entry point is called when an interface is de-activated
1815 * by the OS. The hardware is still under the driver's control, but
1816 * needs to be disabled. A global MAC reset is issued to stop the
1817 * hardware, and all transmit and receive resources are freed.
1819 static int igb_close(struct net_device
*netdev
)
1821 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1823 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
1826 igb_free_irq(adapter
);
1828 igb_free_all_tx_resources(adapter
);
1829 igb_free_all_rx_resources(adapter
);
1831 /* kill manageability vlan ID if supported, but not if a vlan with
1832 * the same ID is registered on the host OS (let 8021q kill it) */
1833 if ((adapter
->hw
.mng_cookie
.status
&
1834 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
1836 vlan_group_get_device(adapter
->vlgrp
, adapter
->mng_vlan_id
)))
1837 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
1843 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1844 * @adapter: board private structure
1845 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1847 * Return 0 on success, negative on failure
1849 int igb_setup_tx_resources(struct igb_adapter
*adapter
,
1850 struct igb_ring
*tx_ring
)
1852 struct pci_dev
*pdev
= adapter
->pdev
;
1855 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
1856 tx_ring
->buffer_info
= vmalloc(size
);
1857 if (!tx_ring
->buffer_info
)
1859 memset(tx_ring
->buffer_info
, 0, size
);
1861 /* round up to nearest 4K */
1862 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
1863 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1865 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1871 tx_ring
->adapter
= adapter
;
1872 tx_ring
->next_to_use
= 0;
1873 tx_ring
->next_to_clean
= 0;
1877 vfree(tx_ring
->buffer_info
);
1878 dev_err(&adapter
->pdev
->dev
,
1879 "Unable to allocate memory for the transmit descriptor ring\n");
1884 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1885 * (Descriptors) for all queues
1886 * @adapter: board private structure
1888 * Return 0 on success, negative on failure
1890 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
1895 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1896 err
= igb_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
1898 dev_err(&adapter
->pdev
->dev
,
1899 "Allocation for Tx Queue %u failed\n", i
);
1900 for (i
--; i
>= 0; i
--)
1901 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
1906 for (i
= 0; i
< IGB_MAX_TX_QUEUES
; i
++) {
1907 r_idx
= i
% adapter
->num_tx_queues
;
1908 adapter
->multi_tx_table
[i
] = &adapter
->tx_ring
[r_idx
];
1914 * igb_configure_tx - Configure transmit Unit after Reset
1915 * @adapter: board private structure
1917 * Configure the Tx unit of the MAC after a reset.
1919 static void igb_configure_tx(struct igb_adapter
*adapter
)
1922 struct e1000_hw
*hw
= &adapter
->hw
;
1927 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1928 struct igb_ring
*ring
= &adapter
->tx_ring
[i
];
1930 wr32(E1000_TDLEN(j
),
1931 ring
->count
* sizeof(union e1000_adv_tx_desc
));
1933 wr32(E1000_TDBAL(j
),
1934 tdba
& 0x00000000ffffffffULL
);
1935 wr32(E1000_TDBAH(j
), tdba
>> 32);
1937 ring
->head
= E1000_TDH(j
);
1938 ring
->tail
= E1000_TDT(j
);
1939 writel(0, hw
->hw_addr
+ ring
->tail
);
1940 writel(0, hw
->hw_addr
+ ring
->head
);
1941 txdctl
= rd32(E1000_TXDCTL(j
));
1942 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
1943 wr32(E1000_TXDCTL(j
), txdctl
);
1945 /* Turn off Relaxed Ordering on head write-backs. The
1946 * writebacks MUST be delivered in order or it will
1947 * completely screw up our bookeeping.
1949 txctrl
= rd32(E1000_DCA_TXCTRL(j
));
1950 txctrl
&= ~E1000_DCA_TXCTRL_TX_WB_RO_EN
;
1951 wr32(E1000_DCA_TXCTRL(j
), txctrl
);
1954 /* disable queue 0 to prevent tail bump w/o re-configuration */
1955 if (adapter
->vfs_allocated_count
)
1956 wr32(E1000_TXDCTL(0), 0);
1958 /* Program the Transmit Control Register */
1959 tctl
= rd32(E1000_TCTL
);
1960 tctl
&= ~E1000_TCTL_CT
;
1961 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
1962 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
1964 igb_config_collision_dist(hw
);
1966 /* Setup Transmit Descriptor Settings for eop descriptor */
1967 adapter
->txd_cmd
= E1000_TXD_CMD_EOP
| E1000_TXD_CMD_RS
;
1969 /* Enable transmits */
1970 tctl
|= E1000_TCTL_EN
;
1972 wr32(E1000_TCTL
, tctl
);
1976 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1977 * @adapter: board private structure
1978 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1980 * Returns 0 on success, negative on failure
1982 int igb_setup_rx_resources(struct igb_adapter
*adapter
,
1983 struct igb_ring
*rx_ring
)
1985 struct pci_dev
*pdev
= adapter
->pdev
;
1988 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
1989 rx_ring
->buffer_info
= vmalloc(size
);
1990 if (!rx_ring
->buffer_info
)
1992 memset(rx_ring
->buffer_info
, 0, size
);
1994 desc_len
= sizeof(union e1000_adv_rx_desc
);
1996 /* Round up to nearest 4K */
1997 rx_ring
->size
= rx_ring
->count
* desc_len
;
1998 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
2000 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
2006 rx_ring
->next_to_clean
= 0;
2007 rx_ring
->next_to_use
= 0;
2009 rx_ring
->adapter
= adapter
;
2014 vfree(rx_ring
->buffer_info
);
2015 dev_err(&adapter
->pdev
->dev
, "Unable to allocate memory for "
2016 "the receive descriptor ring\n");
2021 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
2022 * (Descriptors) for all queues
2023 * @adapter: board private structure
2025 * Return 0 on success, negative on failure
2027 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
2031 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2032 err
= igb_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2034 dev_err(&adapter
->pdev
->dev
,
2035 "Allocation for Rx Queue %u failed\n", i
);
2036 for (i
--; i
>= 0; i
--)
2037 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2046 * igb_setup_rctl - configure the receive control registers
2047 * @adapter: Board private structure
2049 static void igb_setup_rctl(struct igb_adapter
*adapter
)
2051 struct e1000_hw
*hw
= &adapter
->hw
;
2056 rctl
= rd32(E1000_RCTL
);
2058 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
2059 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
2061 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
2062 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
2065 * enable stripping of CRC. It's unlikely this will break BMC
2066 * redirection as it did with e1000. Newer features require
2067 * that the HW strips the CRC.
2069 rctl
|= E1000_RCTL_SECRC
;
2072 * disable store bad packets and clear size bits.
2074 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
2076 /* enable LPE when to prevent packets larger than max_frame_size */
2077 rctl
|= E1000_RCTL_LPE
;
2079 /* Setup buffer sizes */
2080 switch (adapter
->rx_buffer_len
) {
2081 case IGB_RXBUFFER_256
:
2082 rctl
|= E1000_RCTL_SZ_256
;
2084 case IGB_RXBUFFER_512
:
2085 rctl
|= E1000_RCTL_SZ_512
;
2088 srrctl
= ALIGN(adapter
->rx_buffer_len
, 1024)
2089 >> E1000_SRRCTL_BSIZEPKT_SHIFT
;
2093 /* 82575 and greater support packet-split where the protocol
2094 * header is placed in skb->data and the packet data is
2095 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2096 * In the case of a non-split, skb->data is linearly filled,
2097 * followed by the page buffers. Therefore, skb->data is
2098 * sized to hold the largest protocol header.
2100 /* allocations using alloc_page take too long for regular MTU
2101 * so only enable packet split for jumbo frames */
2102 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
2103 adapter
->rx_ps_hdr_size
= IGB_RXBUFFER_128
;
2104 srrctl
|= adapter
->rx_ps_hdr_size
<<
2105 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
2106 srrctl
|= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
2108 adapter
->rx_ps_hdr_size
= 0;
2109 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2112 /* Attention!!! For SR-IOV PF driver operations you must enable
2113 * queue drop for all VF and PF queues to prevent head of line blocking
2114 * if an un-trusted VF does not provide descriptors to hardware.
2116 if (adapter
->vfs_allocated_count
) {
2119 /* set all queue drop enable bits */
2120 wr32(E1000_QDE
, ALL_QUEUES
);
2121 srrctl
|= E1000_SRRCTL_DROP_EN
;
2123 /* disable queue 0 to prevent tail write w/o re-config */
2124 wr32(E1000_RXDCTL(0), 0);
2126 vmolr
= rd32(E1000_VMOLR(adapter
->vfs_allocated_count
));
2127 if (rctl
& E1000_RCTL_LPE
)
2128 vmolr
|= E1000_VMOLR_LPE
;
2129 if (adapter
->num_rx_queues
> 1)
2130 vmolr
|= E1000_VMOLR_RSSE
;
2131 wr32(E1000_VMOLR(adapter
->vfs_allocated_count
), vmolr
);
2134 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2135 int j
= adapter
->rx_ring
[i
].reg_idx
;
2136 wr32(E1000_SRRCTL(j
), srrctl
);
2139 wr32(E1000_RCTL
, rctl
);
2143 * igb_rlpml_set - set maximum receive packet size
2144 * @adapter: board private structure
2146 * Configure maximum receivable packet size.
2148 static void igb_rlpml_set(struct igb_adapter
*adapter
)
2150 u32 max_frame_size
= adapter
->max_frame_size
;
2151 struct e1000_hw
*hw
= &adapter
->hw
;
2152 u16 pf_id
= adapter
->vfs_allocated_count
;
2155 max_frame_size
+= VLAN_TAG_SIZE
;
2157 /* if vfs are enabled we set RLPML to the largest possible request
2158 * size and set the VMOLR RLPML to the size we need */
2160 igb_set_vf_rlpml(adapter
, max_frame_size
, pf_id
);
2161 max_frame_size
= MAX_STD_JUMBO_FRAME_SIZE
+ VLAN_TAG_SIZE
;
2164 wr32(E1000_RLPML
, max_frame_size
);
2168 * igb_configure_vt_default_pool - Configure VT default pool
2169 * @adapter: board private structure
2171 * Configure the default pool
2173 static void igb_configure_vt_default_pool(struct igb_adapter
*adapter
)
2175 struct e1000_hw
*hw
= &adapter
->hw
;
2176 u16 pf_id
= adapter
->vfs_allocated_count
;
2179 /* not in sr-iov mode - do nothing */
2183 vtctl
= rd32(E1000_VT_CTL
);
2184 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
2185 E1000_VT_CTL_DISABLE_DEF_POOL
);
2186 vtctl
|= pf_id
<< E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
2187 wr32(E1000_VT_CTL
, vtctl
);
2191 * igb_configure_rx - Configure receive Unit after Reset
2192 * @adapter: board private structure
2194 * Configure the Rx unit of the MAC after a reset.
2196 static void igb_configure_rx(struct igb_adapter
*adapter
)
2199 struct e1000_hw
*hw
= &adapter
->hw
;
2204 /* disable receives while setting up the descriptors */
2205 rctl
= rd32(E1000_RCTL
);
2206 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
2210 if (adapter
->itr_setting
> 3)
2211 wr32(E1000_ITR
, adapter
->itr
);
2213 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2214 * the Base and Length of the Rx Descriptor Ring */
2215 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2216 struct igb_ring
*ring
= &adapter
->rx_ring
[i
];
2217 int j
= ring
->reg_idx
;
2219 wr32(E1000_RDBAL(j
),
2220 rdba
& 0x00000000ffffffffULL
);
2221 wr32(E1000_RDBAH(j
), rdba
>> 32);
2222 wr32(E1000_RDLEN(j
),
2223 ring
->count
* sizeof(union e1000_adv_rx_desc
));
2225 ring
->head
= E1000_RDH(j
);
2226 ring
->tail
= E1000_RDT(j
);
2227 writel(0, hw
->hw_addr
+ ring
->tail
);
2228 writel(0, hw
->hw_addr
+ ring
->head
);
2230 rxdctl
= rd32(E1000_RXDCTL(j
));
2231 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
2232 rxdctl
&= 0xFFF00000;
2233 rxdctl
|= IGB_RX_PTHRESH
;
2234 rxdctl
|= IGB_RX_HTHRESH
<< 8;
2235 rxdctl
|= IGB_RX_WTHRESH
<< 16;
2236 wr32(E1000_RXDCTL(j
), rxdctl
);
2239 if (adapter
->num_rx_queues
> 1) {
2248 get_random_bytes(&random
[0], 40);
2250 if (hw
->mac
.type
>= e1000_82576
)
2254 for (j
= 0; j
< (32 * 4); j
++) {
2256 adapter
->rx_ring
[(j
% adapter
->num_rx_queues
)].reg_idx
<< shift
;
2259 hw
->hw_addr
+ E1000_RETA(0) + (j
& ~3));
2261 if (adapter
->vfs_allocated_count
)
2262 mrqc
= E1000_MRQC_ENABLE_VMDQ_RSS_2Q
;
2264 mrqc
= E1000_MRQC_ENABLE_RSS_4Q
;
2266 /* Fill out hash function seeds */
2267 for (j
= 0; j
< 10; j
++)
2268 array_wr32(E1000_RSSRK(0), j
, random
[j
]);
2270 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4
|
2271 E1000_MRQC_RSS_FIELD_IPV4_TCP
);
2272 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6
|
2273 E1000_MRQC_RSS_FIELD_IPV6_TCP
);
2274 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV4_UDP
|
2275 E1000_MRQC_RSS_FIELD_IPV6_UDP
);
2276 mrqc
|= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX
|
2277 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
);
2279 wr32(E1000_MRQC
, mrqc
);
2280 } else if (adapter
->vfs_allocated_count
) {
2281 /* Enable multi-queue for sr-iov */
2282 wr32(E1000_MRQC
, E1000_MRQC_ENABLE_VMDQ
);
2285 /* Enable Receive Checksum Offload for TCP and UDP */
2286 rxcsum
= rd32(E1000_RXCSUM
);
2287 /* Disable raw packet checksumming */
2288 rxcsum
|= E1000_RXCSUM_PCSD
;
2290 if (adapter
->hw
.mac
.type
== e1000_82576
)
2291 /* Enable Receive Checksum Offload for SCTP */
2292 rxcsum
|= E1000_RXCSUM_CRCOFL
;
2294 /* Don't need to set TUOFL or IPOFL, they default to 1 */
2295 wr32(E1000_RXCSUM
, rxcsum
);
2297 /* Set the default pool for the PF's first queue */
2298 igb_configure_vt_default_pool(adapter
);
2300 igb_rlpml_set(adapter
);
2302 /* Enable Receives */
2303 wr32(E1000_RCTL
, rctl
);
2307 * igb_free_tx_resources - Free Tx Resources per Queue
2308 * @tx_ring: Tx descriptor ring for a specific queue
2310 * Free all transmit software resources
2312 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
2314 struct pci_dev
*pdev
= tx_ring
->adapter
->pdev
;
2316 igb_clean_tx_ring(tx_ring
);
2318 vfree(tx_ring
->buffer_info
);
2319 tx_ring
->buffer_info
= NULL
;
2321 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2323 tx_ring
->desc
= NULL
;
2327 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2328 * @adapter: board private structure
2330 * Free all transmit software resources
2332 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
2336 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2337 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
2340 static void igb_unmap_and_free_tx_resource(struct igb_adapter
*adapter
,
2341 struct igb_buffer
*buffer_info
)
2343 buffer_info
->dma
= 0;
2344 if (buffer_info
->skb
) {
2345 skb_dma_unmap(&adapter
->pdev
->dev
, buffer_info
->skb
,
2347 dev_kfree_skb_any(buffer_info
->skb
);
2348 buffer_info
->skb
= NULL
;
2350 buffer_info
->time_stamp
= 0;
2351 /* buffer_info must be completely set up in the transmit path */
2355 * igb_clean_tx_ring - Free Tx Buffers
2356 * @tx_ring: ring to be cleaned
2358 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
2360 struct igb_adapter
*adapter
= tx_ring
->adapter
;
2361 struct igb_buffer
*buffer_info
;
2365 if (!tx_ring
->buffer_info
)
2367 /* Free all the Tx ring sk_buffs */
2369 for (i
= 0; i
< tx_ring
->count
; i
++) {
2370 buffer_info
= &tx_ring
->buffer_info
[i
];
2371 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
2374 size
= sizeof(struct igb_buffer
) * tx_ring
->count
;
2375 memset(tx_ring
->buffer_info
, 0, size
);
2377 /* Zero out the descriptor ring */
2379 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2381 tx_ring
->next_to_use
= 0;
2382 tx_ring
->next_to_clean
= 0;
2384 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2385 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2389 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2390 * @adapter: board private structure
2392 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
2396 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2397 igb_clean_tx_ring(&adapter
->tx_ring
[i
]);
2401 * igb_free_rx_resources - Free Rx Resources
2402 * @rx_ring: ring to clean the resources from
2404 * Free all receive software resources
2406 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
2408 struct pci_dev
*pdev
= rx_ring
->adapter
->pdev
;
2410 igb_clean_rx_ring(rx_ring
);
2412 vfree(rx_ring
->buffer_info
);
2413 rx_ring
->buffer_info
= NULL
;
2415 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2417 rx_ring
->desc
= NULL
;
2421 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2422 * @adapter: board private structure
2424 * Free all receive software resources
2426 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
2430 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2431 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
2435 * igb_clean_rx_ring - Free Rx Buffers per Queue
2436 * @rx_ring: ring to free buffers from
2438 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
2440 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2441 struct igb_buffer
*buffer_info
;
2442 struct pci_dev
*pdev
= adapter
->pdev
;
2446 if (!rx_ring
->buffer_info
)
2448 /* Free all the Rx ring sk_buffs */
2449 for (i
= 0; i
< rx_ring
->count
; i
++) {
2450 buffer_info
= &rx_ring
->buffer_info
[i
];
2451 if (buffer_info
->dma
) {
2452 if (adapter
->rx_ps_hdr_size
)
2453 pci_unmap_single(pdev
, buffer_info
->dma
,
2454 adapter
->rx_ps_hdr_size
,
2455 PCI_DMA_FROMDEVICE
);
2457 pci_unmap_single(pdev
, buffer_info
->dma
,
2458 adapter
->rx_buffer_len
,
2459 PCI_DMA_FROMDEVICE
);
2460 buffer_info
->dma
= 0;
2463 if (buffer_info
->skb
) {
2464 dev_kfree_skb(buffer_info
->skb
);
2465 buffer_info
->skb
= NULL
;
2467 if (buffer_info
->page
) {
2468 if (buffer_info
->page_dma
)
2469 pci_unmap_page(pdev
, buffer_info
->page_dma
,
2471 PCI_DMA_FROMDEVICE
);
2472 put_page(buffer_info
->page
);
2473 buffer_info
->page
= NULL
;
2474 buffer_info
->page_dma
= 0;
2475 buffer_info
->page_offset
= 0;
2479 size
= sizeof(struct igb_buffer
) * rx_ring
->count
;
2480 memset(rx_ring
->buffer_info
, 0, size
);
2482 /* Zero out the descriptor ring */
2483 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2485 rx_ring
->next_to_clean
= 0;
2486 rx_ring
->next_to_use
= 0;
2488 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2489 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2493 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2494 * @adapter: board private structure
2496 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
2500 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2501 igb_clean_rx_ring(&adapter
->rx_ring
[i
]);
2505 * igb_set_mac - Change the Ethernet Address of the NIC
2506 * @netdev: network interface device structure
2507 * @p: pointer to an address structure
2509 * Returns 0 on success, negative on failure
2511 static int igb_set_mac(struct net_device
*netdev
, void *p
)
2513 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2514 struct e1000_hw
*hw
= &adapter
->hw
;
2515 struct sockaddr
*addr
= p
;
2517 if (!is_valid_ether_addr(addr
->sa_data
))
2518 return -EADDRNOTAVAIL
;
2520 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
2521 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
2523 igb_rar_set(hw
, hw
->mac
.addr
, 0);
2524 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
, 0);
2530 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
2531 * @netdev: network interface device structure
2533 * The set_rx_mode entry point is called whenever the unicast or multicast
2534 * address lists or the network interface flags are updated. This routine is
2535 * responsible for configuring the hardware for proper unicast, multicast,
2536 * promiscuous mode, and all-multi behavior.
2538 static void igb_set_rx_mode(struct net_device
*netdev
)
2540 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2541 struct e1000_hw
*hw
= &adapter
->hw
;
2542 unsigned int rar_entries
= hw
->mac
.rar_entry_count
-
2543 (adapter
->vfs_allocated_count
+ 1);
2544 struct dev_mc_list
*mc_ptr
= netdev
->mc_list
;
2545 u8
*mta_list
= NULL
;
2549 /* Check for Promiscuous and All Multicast modes */
2550 rctl
= rd32(E1000_RCTL
);
2552 if (netdev
->flags
& IFF_PROMISC
) {
2553 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
2554 rctl
&= ~E1000_RCTL_VFE
;
2556 if (netdev
->flags
& IFF_ALLMULTI
)
2557 rctl
|= E1000_RCTL_MPE
;
2559 rctl
&= ~E1000_RCTL_MPE
;
2561 if (netdev
->uc
.count
> rar_entries
)
2562 rctl
|= E1000_RCTL_UPE
;
2564 rctl
&= ~E1000_RCTL_UPE
;
2565 rctl
|= E1000_RCTL_VFE
;
2567 wr32(E1000_RCTL
, rctl
);
2569 if (netdev
->uc
.count
&& rar_entries
) {
2570 struct netdev_hw_addr
*ha
;
2571 list_for_each_entry(ha
, &netdev
->uc
.list
, list
) {
2574 igb_rar_set(hw
, ha
->addr
, rar_entries
);
2575 igb_set_rah_pool(hw
, adapter
->vfs_allocated_count
,
2580 /* write the addresses in reverse order to avoid write combining */
2581 for (; rar_entries
> 0 ; rar_entries
--) {
2582 wr32(E1000_RAH(rar_entries
), 0);
2583 wr32(E1000_RAL(rar_entries
), 0);
2587 if (!netdev
->mc_count
) {
2588 /* nothing to program, so clear mc list */
2589 igb_update_mc_addr_list(hw
, NULL
, 0);
2590 igb_restore_vf_multicasts(adapter
);
2594 mta_list
= kzalloc(netdev
->mc_count
* 6, GFP_ATOMIC
);
2596 dev_err(&adapter
->pdev
->dev
,
2597 "failed to allocate multicast filter list\n");
2601 /* The shared function expects a packed array of only addresses. */
2602 for (i
= 0; i
< netdev
->mc_count
; i
++) {
2605 memcpy(mta_list
+ (i
*ETH_ALEN
), mc_ptr
->dmi_addr
, ETH_ALEN
);
2606 mc_ptr
= mc_ptr
->next
;
2608 igb_update_mc_addr_list(hw
, mta_list
, i
);
2610 igb_restore_vf_multicasts(adapter
);
2613 /* Need to wait a few seconds after link up to get diagnostic information from
2615 static void igb_update_phy_info(unsigned long data
)
2617 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
2618 igb_get_phy_info(&adapter
->hw
);
2622 * igb_has_link - check shared code for link and determine up/down
2623 * @adapter: pointer to driver private info
2625 static bool igb_has_link(struct igb_adapter
*adapter
)
2627 struct e1000_hw
*hw
= &adapter
->hw
;
2628 bool link_active
= false;
2631 /* get_link_status is set on LSC (link status) interrupt or
2632 * rx sequence error interrupt. get_link_status will stay
2633 * false until the e1000_check_for_link establishes link
2634 * for copper adapters ONLY
2636 switch (hw
->phy
.media_type
) {
2637 case e1000_media_type_copper
:
2638 if (hw
->mac
.get_link_status
) {
2639 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2640 link_active
= !hw
->mac
.get_link_status
;
2645 case e1000_media_type_internal_serdes
:
2646 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
2647 link_active
= hw
->mac
.serdes_has_link
;
2650 case e1000_media_type_unknown
:
2658 * igb_watchdog - Timer Call-back
2659 * @data: pointer to adapter cast into an unsigned long
2661 static void igb_watchdog(unsigned long data
)
2663 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
2664 /* Do the rest outside of interrupt context */
2665 schedule_work(&adapter
->watchdog_task
);
2668 static void igb_watchdog_task(struct work_struct
*work
)
2670 struct igb_adapter
*adapter
= container_of(work
,
2671 struct igb_adapter
, watchdog_task
);
2672 struct e1000_hw
*hw
= &adapter
->hw
;
2673 struct net_device
*netdev
= adapter
->netdev
;
2674 struct igb_ring
*tx_ring
= adapter
->tx_ring
;
2679 link
= igb_has_link(adapter
);
2680 if ((netif_carrier_ok(netdev
)) && link
)
2684 if (!netif_carrier_ok(netdev
)) {
2686 hw
->mac
.ops
.get_speed_and_duplex(&adapter
->hw
,
2687 &adapter
->link_speed
,
2688 &adapter
->link_duplex
);
2690 ctrl
= rd32(E1000_CTRL
);
2691 /* Links status message must follow this format */
2692 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s, "
2693 "Flow Control: %s\n",
2695 adapter
->link_speed
,
2696 adapter
->link_duplex
== FULL_DUPLEX
?
2697 "Full Duplex" : "Half Duplex",
2698 ((ctrl
& E1000_CTRL_TFCE
) && (ctrl
&
2699 E1000_CTRL_RFCE
)) ? "RX/TX" : ((ctrl
&
2700 E1000_CTRL_RFCE
) ? "RX" : ((ctrl
&
2701 E1000_CTRL_TFCE
) ? "TX" : "None")));
2703 /* tweak tx_queue_len according to speed/duplex and
2704 * adjust the timeout factor */
2705 netdev
->tx_queue_len
= adapter
->tx_queue_len
;
2706 adapter
->tx_timeout_factor
= 1;
2707 switch (adapter
->link_speed
) {
2709 netdev
->tx_queue_len
= 10;
2710 adapter
->tx_timeout_factor
= 14;
2713 netdev
->tx_queue_len
= 100;
2714 /* maybe add some timeout factor ? */
2718 netif_carrier_on(netdev
);
2720 igb_ping_all_vfs(adapter
);
2722 /* link state has changed, schedule phy info update */
2723 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2724 mod_timer(&adapter
->phy_info_timer
,
2725 round_jiffies(jiffies
+ 2 * HZ
));
2728 if (netif_carrier_ok(netdev
)) {
2729 adapter
->link_speed
= 0;
2730 adapter
->link_duplex
= 0;
2731 /* Links status message must follow this format */
2732 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
2734 netif_carrier_off(netdev
);
2736 igb_ping_all_vfs(adapter
);
2738 /* link state has changed, schedule phy info update */
2739 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2740 mod_timer(&adapter
->phy_info_timer
,
2741 round_jiffies(jiffies
+ 2 * HZ
));
2746 igb_update_stats(adapter
);
2748 hw
->mac
.tx_packet_delta
= adapter
->stats
.tpt
- adapter
->tpt_old
;
2749 adapter
->tpt_old
= adapter
->stats
.tpt
;
2750 hw
->mac
.collision_delta
= adapter
->stats
.colc
- adapter
->colc_old
;
2751 adapter
->colc_old
= adapter
->stats
.colc
;
2753 adapter
->gorc
= adapter
->stats
.gorc
- adapter
->gorc_old
;
2754 adapter
->gorc_old
= adapter
->stats
.gorc
;
2755 adapter
->gotc
= adapter
->stats
.gotc
- adapter
->gotc_old
;
2756 adapter
->gotc_old
= adapter
->stats
.gotc
;
2758 igb_update_adaptive(&adapter
->hw
);
2760 if (!netif_carrier_ok(netdev
)) {
2761 if (igb_desc_unused(tx_ring
) + 1 < tx_ring
->count
) {
2762 /* We've lost link, so the controller stops DMA,
2763 * but we've got queued Tx work that's never going
2764 * to get done, so reset controller to flush Tx.
2765 * (Do the reset outside of interrupt context). */
2766 adapter
->tx_timeout_count
++;
2767 schedule_work(&adapter
->reset_task
);
2768 /* return immediately since reset is imminent */
2773 /* Cause software interrupt to ensure rx ring is cleaned */
2774 if (adapter
->msix_entries
) {
2775 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2776 eics
|= adapter
->rx_ring
[i
].eims_value
;
2777 wr32(E1000_EICS
, eics
);
2779 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
2782 /* Force detection of hung controller every watchdog period */
2783 tx_ring
->detect_tx_hung
= true;
2785 /* Reset the timer */
2786 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
2787 mod_timer(&adapter
->watchdog_timer
,
2788 round_jiffies(jiffies
+ 2 * HZ
));
2791 enum latency_range
{
2795 latency_invalid
= 255
2800 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2802 * Stores a new ITR value based on strictly on packet size. This
2803 * algorithm is less sophisticated than that used in igb_update_itr,
2804 * due to the difficulty of synchronizing statistics across multiple
2805 * receive rings. The divisors and thresholds used by this fuction
2806 * were determined based on theoretical maximum wire speed and testing
2807 * data, in order to minimize response time while increasing bulk
2809 * This functionality is controlled by the InterruptThrottleRate module
2810 * parameter (see igb_param.c)
2811 * NOTE: This function is called only when operating in a multiqueue
2812 * receive environment.
2813 * @rx_ring: pointer to ring
2815 static void igb_update_ring_itr(struct igb_ring
*rx_ring
)
2817 int new_val
= rx_ring
->itr_val
;
2818 int avg_wire_size
= 0;
2819 struct igb_adapter
*adapter
= rx_ring
->adapter
;
2821 if (!rx_ring
->total_packets
)
2822 goto clear_counts
; /* no packets, so don't do anything */
2824 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2825 * ints/sec - ITR timer value of 120 ticks.
2827 if (adapter
->link_speed
!= SPEED_1000
) {
2831 avg_wire_size
= rx_ring
->total_bytes
/ rx_ring
->total_packets
;
2833 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2834 avg_wire_size
+= 24;
2836 /* Don't starve jumbo frames */
2837 avg_wire_size
= min(avg_wire_size
, 3000);
2839 /* Give a little boost to mid-size frames */
2840 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
2841 new_val
= avg_wire_size
/ 3;
2843 new_val
= avg_wire_size
/ 2;
2846 if (new_val
!= rx_ring
->itr_val
) {
2847 rx_ring
->itr_val
= new_val
;
2848 rx_ring
->set_itr
= 1;
2851 rx_ring
->total_bytes
= 0;
2852 rx_ring
->total_packets
= 0;
2856 * igb_update_itr - update the dynamic ITR value based on statistics
2857 * Stores a new ITR value based on packets and byte
2858 * counts during the last interrupt. The advantage of per interrupt
2859 * computation is faster updates and more accurate ITR for the current
2860 * traffic pattern. Constants in this function were computed
2861 * based on theoretical maximum wire speed and thresholds were set based
2862 * on testing data as well as attempting to minimize response time
2863 * while increasing bulk throughput.
2864 * this functionality is controlled by the InterruptThrottleRate module
2865 * parameter (see igb_param.c)
2866 * NOTE: These calculations are only valid when operating in a single-
2867 * queue environment.
2868 * @adapter: pointer to adapter
2869 * @itr_setting: current adapter->itr
2870 * @packets: the number of packets during this measurement interval
2871 * @bytes: the number of bytes during this measurement interval
2873 static unsigned int igb_update_itr(struct igb_adapter
*adapter
, u16 itr_setting
,
2874 int packets
, int bytes
)
2876 unsigned int retval
= itr_setting
;
2879 goto update_itr_done
;
2881 switch (itr_setting
) {
2882 case lowest_latency
:
2883 /* handle TSO and jumbo frames */
2884 if (bytes
/packets
> 8000)
2885 retval
= bulk_latency
;
2886 else if ((packets
< 5) && (bytes
> 512))
2887 retval
= low_latency
;
2889 case low_latency
: /* 50 usec aka 20000 ints/s */
2890 if (bytes
> 10000) {
2891 /* this if handles the TSO accounting */
2892 if (bytes
/packets
> 8000) {
2893 retval
= bulk_latency
;
2894 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
2895 retval
= bulk_latency
;
2896 } else if ((packets
> 35)) {
2897 retval
= lowest_latency
;
2899 } else if (bytes
/packets
> 2000) {
2900 retval
= bulk_latency
;
2901 } else if (packets
<= 2 && bytes
< 512) {
2902 retval
= lowest_latency
;
2905 case bulk_latency
: /* 250 usec aka 4000 ints/s */
2906 if (bytes
> 25000) {
2908 retval
= low_latency
;
2909 } else if (bytes
< 1500) {
2910 retval
= low_latency
;
2919 static void igb_set_itr(struct igb_adapter
*adapter
)
2922 u32 new_itr
= adapter
->itr
;
2924 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2925 if (adapter
->link_speed
!= SPEED_1000
) {
2931 adapter
->rx_itr
= igb_update_itr(adapter
,
2933 adapter
->rx_ring
->total_packets
,
2934 adapter
->rx_ring
->total_bytes
);
2936 if (adapter
->rx_ring
->buddy
) {
2937 adapter
->tx_itr
= igb_update_itr(adapter
,
2939 adapter
->tx_ring
->total_packets
,
2940 adapter
->tx_ring
->total_bytes
);
2941 current_itr
= max(adapter
->rx_itr
, adapter
->tx_itr
);
2943 current_itr
= adapter
->rx_itr
;
2946 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2947 if (adapter
->itr_setting
== 3 && current_itr
== lowest_latency
)
2948 current_itr
= low_latency
;
2950 switch (current_itr
) {
2951 /* counts and packets in update_itr are dependent on these numbers */
2952 case lowest_latency
:
2953 new_itr
= 56; /* aka 70,000 ints/sec */
2956 new_itr
= 196; /* aka 20,000 ints/sec */
2959 new_itr
= 980; /* aka 4,000 ints/sec */
2966 adapter
->rx_ring
->total_bytes
= 0;
2967 adapter
->rx_ring
->total_packets
= 0;
2968 if (adapter
->rx_ring
->buddy
) {
2969 adapter
->rx_ring
->buddy
->total_bytes
= 0;
2970 adapter
->rx_ring
->buddy
->total_packets
= 0;
2973 if (new_itr
!= adapter
->itr
) {
2974 /* this attempts to bias the interrupt rate towards Bulk
2975 * by adding intermediate steps when interrupt rate is
2977 new_itr
= new_itr
> adapter
->itr
?
2978 max((new_itr
* adapter
->itr
) /
2979 (new_itr
+ (adapter
->itr
>> 2)), new_itr
) :
2981 /* Don't write the value here; it resets the adapter's
2982 * internal timer, and causes us to delay far longer than
2983 * we should between interrupts. Instead, we write the ITR
2984 * value at the beginning of the next interrupt so the timing
2985 * ends up being correct.
2987 adapter
->itr
= new_itr
;
2988 adapter
->rx_ring
->itr_val
= new_itr
;
2989 adapter
->rx_ring
->set_itr
= 1;
2996 #define IGB_TX_FLAGS_CSUM 0x00000001
2997 #define IGB_TX_FLAGS_VLAN 0x00000002
2998 #define IGB_TX_FLAGS_TSO 0x00000004
2999 #define IGB_TX_FLAGS_IPV4 0x00000008
3000 #define IGB_TX_FLAGS_TSTAMP 0x00000010
3001 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
3002 #define IGB_TX_FLAGS_VLAN_SHIFT 16
3004 static inline int igb_tso_adv(struct igb_adapter
*adapter
,
3005 struct igb_ring
*tx_ring
,
3006 struct sk_buff
*skb
, u32 tx_flags
, u8
*hdr_len
)
3008 struct e1000_adv_tx_context_desc
*context_desc
;
3011 struct igb_buffer
*buffer_info
;
3012 u32 info
= 0, tu_cmd
= 0;
3013 u32 mss_l4len_idx
, l4len
;
3016 if (skb_header_cloned(skb
)) {
3017 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
3022 l4len
= tcp_hdrlen(skb
);
3025 if (skb
->protocol
== htons(ETH_P_IP
)) {
3026 struct iphdr
*iph
= ip_hdr(skb
);
3029 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
3033 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
3034 ipv6_hdr(skb
)->payload_len
= 0;
3035 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
3036 &ipv6_hdr(skb
)->daddr
,
3040 i
= tx_ring
->next_to_use
;
3042 buffer_info
= &tx_ring
->buffer_info
[i
];
3043 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
3044 /* VLAN MACLEN IPLEN */
3045 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
3046 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
3047 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
3048 *hdr_len
+= skb_network_offset(skb
);
3049 info
|= skb_network_header_len(skb
);
3050 *hdr_len
+= skb_network_header_len(skb
);
3051 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
3053 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3054 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
3056 if (skb
->protocol
== htons(ETH_P_IP
))
3057 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
3058 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3060 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
3063 mss_l4len_idx
= (skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
);
3064 mss_l4len_idx
|= (l4len
<< E1000_ADVTXD_L4LEN_SHIFT
);
3066 /* For 82575, context index must be unique per ring. */
3067 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
3068 mss_l4len_idx
|= tx_ring
->queue_index
<< 4;
3070 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
3071 context_desc
->seqnum_seed
= 0;
3073 buffer_info
->time_stamp
= jiffies
;
3074 buffer_info
->next_to_watch
= i
;
3075 buffer_info
->dma
= 0;
3077 if (i
== tx_ring
->count
)
3080 tx_ring
->next_to_use
= i
;
3085 static inline bool igb_tx_csum_adv(struct igb_adapter
*adapter
,
3086 struct igb_ring
*tx_ring
,
3087 struct sk_buff
*skb
, u32 tx_flags
)
3089 struct e1000_adv_tx_context_desc
*context_desc
;
3091 struct igb_buffer
*buffer_info
;
3092 u32 info
= 0, tu_cmd
= 0;
3094 if ((skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
3095 (tx_flags
& IGB_TX_FLAGS_VLAN
)) {
3096 i
= tx_ring
->next_to_use
;
3097 buffer_info
= &tx_ring
->buffer_info
[i
];
3098 context_desc
= E1000_TX_CTXTDESC_ADV(*tx_ring
, i
);
3100 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
3101 info
|= (tx_flags
& IGB_TX_FLAGS_VLAN_MASK
);
3102 info
|= (skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
);
3103 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3104 info
|= skb_network_header_len(skb
);
3106 context_desc
->vlan_macip_lens
= cpu_to_le32(info
);
3108 tu_cmd
|= (E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
);
3110 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
3113 if (skb
->protocol
== cpu_to_be16(ETH_P_8021Q
)) {
3114 const struct vlan_ethhdr
*vhdr
=
3115 (const struct vlan_ethhdr
*)skb
->data
;
3117 protocol
= vhdr
->h_vlan_encapsulated_proto
;
3119 protocol
= skb
->protocol
;
3123 case cpu_to_be16(ETH_P_IP
):
3124 tu_cmd
|= E1000_ADVTXD_TUCMD_IPV4
;
3125 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
3126 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3127 else if (ip_hdr(skb
)->protocol
== IPPROTO_SCTP
)
3128 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_SCTP
;
3130 case cpu_to_be16(ETH_P_IPV6
):
3131 /* XXX what about other V6 headers?? */
3132 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
3133 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
3134 else if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_SCTP
)
3135 tu_cmd
|= E1000_ADVTXD_TUCMD_L4T_SCTP
;
3138 if (unlikely(net_ratelimit()))
3139 dev_warn(&adapter
->pdev
->dev
,
3140 "partial checksum but proto=%x!\n",
3146 context_desc
->type_tucmd_mlhl
= cpu_to_le32(tu_cmd
);
3147 context_desc
->seqnum_seed
= 0;
3148 if (adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
)
3149 context_desc
->mss_l4len_idx
=
3150 cpu_to_le32(tx_ring
->queue_index
<< 4);
3152 context_desc
->mss_l4len_idx
= 0;
3154 buffer_info
->time_stamp
= jiffies
;
3155 buffer_info
->next_to_watch
= i
;
3156 buffer_info
->dma
= 0;
3159 if (i
== tx_ring
->count
)
3161 tx_ring
->next_to_use
= i
;
3168 #define IGB_MAX_TXD_PWR 16
3169 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
3171 static inline int igb_tx_map_adv(struct igb_adapter
*adapter
,
3172 struct igb_ring
*tx_ring
, struct sk_buff
*skb
,
3175 struct igb_buffer
*buffer_info
;
3176 unsigned int len
= skb_headlen(skb
);
3177 unsigned int count
= 0, i
;
3181 i
= tx_ring
->next_to_use
;
3183 if (skb_dma_map(&adapter
->pdev
->dev
, skb
, DMA_TO_DEVICE
)) {
3184 dev_err(&adapter
->pdev
->dev
, "TX DMA map failed\n");
3188 map
= skb_shinfo(skb
)->dma_maps
;
3190 buffer_info
= &tx_ring
->buffer_info
[i
];
3191 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
3192 buffer_info
->length
= len
;
3193 /* set time_stamp *before* dma to help avoid a possible race */
3194 buffer_info
->time_stamp
= jiffies
;
3195 buffer_info
->next_to_watch
= i
;
3196 buffer_info
->dma
= skb_shinfo(skb
)->dma_head
;
3198 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++) {
3199 struct skb_frag_struct
*frag
;
3202 if (i
== tx_ring
->count
)
3205 frag
= &skb_shinfo(skb
)->frags
[f
];
3208 buffer_info
= &tx_ring
->buffer_info
[i
];
3209 BUG_ON(len
>= IGB_MAX_DATA_PER_TXD
);
3210 buffer_info
->length
= len
;
3211 buffer_info
->time_stamp
= jiffies
;
3212 buffer_info
->next_to_watch
= i
;
3213 buffer_info
->dma
= map
[count
];
3217 tx_ring
->buffer_info
[i
].skb
= skb
;
3218 tx_ring
->buffer_info
[first
].next_to_watch
= i
;
3223 static inline void igb_tx_queue_adv(struct igb_adapter
*adapter
,
3224 struct igb_ring
*tx_ring
,
3225 int tx_flags
, int count
, u32 paylen
,
3228 union e1000_adv_tx_desc
*tx_desc
= NULL
;
3229 struct igb_buffer
*buffer_info
;
3230 u32 olinfo_status
= 0, cmd_type_len
;
3233 cmd_type_len
= (E1000_ADVTXD_DTYP_DATA
| E1000_ADVTXD_DCMD_IFCS
|
3234 E1000_ADVTXD_DCMD_DEXT
);
3236 if (tx_flags
& IGB_TX_FLAGS_VLAN
)
3237 cmd_type_len
|= E1000_ADVTXD_DCMD_VLE
;
3239 if (tx_flags
& IGB_TX_FLAGS_TSTAMP
)
3240 cmd_type_len
|= E1000_ADVTXD_MAC_TSTAMP
;
3242 if (tx_flags
& IGB_TX_FLAGS_TSO
) {
3243 cmd_type_len
|= E1000_ADVTXD_DCMD_TSE
;
3245 /* insert tcp checksum */
3246 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
3248 /* insert ip checksum */
3249 if (tx_flags
& IGB_TX_FLAGS_IPV4
)
3250 olinfo_status
|= E1000_TXD_POPTS_IXSM
<< 8;
3252 } else if (tx_flags
& IGB_TX_FLAGS_CSUM
) {
3253 olinfo_status
|= E1000_TXD_POPTS_TXSM
<< 8;
3256 if ((adapter
->flags
& IGB_FLAG_NEED_CTX_IDX
) &&
3257 (tx_flags
& (IGB_TX_FLAGS_CSUM
| IGB_TX_FLAGS_TSO
|
3258 IGB_TX_FLAGS_VLAN
)))
3259 olinfo_status
|= tx_ring
->queue_index
<< 4;
3261 olinfo_status
|= ((paylen
- hdr_len
) << E1000_ADVTXD_PAYLEN_SHIFT
);
3263 i
= tx_ring
->next_to_use
;
3265 buffer_info
= &tx_ring
->buffer_info
[i
];
3266 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
3267 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
3268 tx_desc
->read
.cmd_type_len
=
3269 cpu_to_le32(cmd_type_len
| buffer_info
->length
);
3270 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3272 if (i
== tx_ring
->count
)
3276 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(adapter
->txd_cmd
);
3277 /* Force memory writes to complete before letting h/w
3278 * know there are new descriptors to fetch. (Only
3279 * applicable for weak-ordered memory model archs,
3280 * such as IA-64). */
3283 tx_ring
->next_to_use
= i
;
3284 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3285 /* we need this if more than one processor can write to our tail
3286 * at a time, it syncronizes IO on IA64/Altix systems */
3290 static int __igb_maybe_stop_tx(struct net_device
*netdev
,
3291 struct igb_ring
*tx_ring
, int size
)
3293 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3295 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3297 /* Herbert's original patch had:
3298 * smp_mb__after_netif_stop_queue();
3299 * but since that doesn't exist yet, just open code it. */
3302 /* We need to check again in a case another CPU has just
3303 * made room available. */
3304 if (igb_desc_unused(tx_ring
) < size
)
3308 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3309 ++adapter
->restart_queue
;
3313 static int igb_maybe_stop_tx(struct net_device
*netdev
,
3314 struct igb_ring
*tx_ring
, int size
)
3316 if (igb_desc_unused(tx_ring
) >= size
)
3318 return __igb_maybe_stop_tx(netdev
, tx_ring
, size
);
3321 static netdev_tx_t
igb_xmit_frame_ring_adv(struct sk_buff
*skb
,
3322 struct net_device
*netdev
,
3323 struct igb_ring
*tx_ring
)
3325 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3327 unsigned int tx_flags
= 0;
3331 union skb_shared_tx
*shtx
;
3333 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
3334 dev_kfree_skb_any(skb
);
3335 return NETDEV_TX_OK
;
3338 if (skb
->len
<= 0) {
3339 dev_kfree_skb_any(skb
);
3340 return NETDEV_TX_OK
;
3343 /* need: 1 descriptor per page,
3344 * + 2 desc gap to keep tail from touching head,
3345 * + 1 desc for skb->data,
3346 * + 1 desc for context descriptor,
3347 * otherwise try next time */
3348 if (igb_maybe_stop_tx(netdev
, tx_ring
, skb_shinfo(skb
)->nr_frags
+ 4)) {
3349 /* this is a hard error */
3350 return NETDEV_TX_BUSY
;
3354 * TODO: check that there currently is no other packet with
3355 * time stamping in the queue
3357 * When doing time stamping, keep the connection to the socket
3358 * a while longer: it is still needed by skb_hwtstamp_tx(),
3359 * called either in igb_tx_hwtstamp() or by our caller when
3360 * doing software time stamping.
3363 if (unlikely(shtx
->hardware
)) {
3364 shtx
->in_progress
= 1;
3365 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
3368 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3369 tx_flags
|= IGB_TX_FLAGS_VLAN
;
3370 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
3373 if (skb
->protocol
== htons(ETH_P_IP
))
3374 tx_flags
|= IGB_TX_FLAGS_IPV4
;
3376 first
= tx_ring
->next_to_use
;
3377 tso
= skb_is_gso(skb
) ? igb_tso_adv(adapter
, tx_ring
, skb
, tx_flags
,
3381 dev_kfree_skb_any(skb
);
3382 return NETDEV_TX_OK
;
3386 tx_flags
|= IGB_TX_FLAGS_TSO
;
3387 else if (igb_tx_csum_adv(adapter
, tx_ring
, skb
, tx_flags
) &&
3388 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
3389 tx_flags
|= IGB_TX_FLAGS_CSUM
;
3392 * count reflects descriptors mapped, if 0 then mapping error
3393 * has occured and we need to rewind the descriptor queue
3395 count
= igb_tx_map_adv(adapter
, tx_ring
, skb
, first
);
3398 igb_tx_queue_adv(adapter
, tx_ring
, tx_flags
, count
,
3400 /* Make sure there is space in the ring for the next send. */
3401 igb_maybe_stop_tx(netdev
, tx_ring
, MAX_SKB_FRAGS
+ 4);
3403 dev_kfree_skb_any(skb
);
3404 tx_ring
->buffer_info
[first
].time_stamp
= 0;
3405 tx_ring
->next_to_use
= first
;
3408 return NETDEV_TX_OK
;
3411 static netdev_tx_t
igb_xmit_frame_adv(struct sk_buff
*skb
,
3412 struct net_device
*netdev
)
3414 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3415 struct igb_ring
*tx_ring
;
3418 r_idx
= skb
->queue_mapping
& (IGB_ABS_MAX_TX_QUEUES
- 1);
3419 tx_ring
= adapter
->multi_tx_table
[r_idx
];
3421 /* This goes back to the question of how to logically map a tx queue
3422 * to a flow. Right now, performance is impacted slightly negatively
3423 * if using multiple tx queues. If the stack breaks away from a
3424 * single qdisc implementation, we can look at this again. */
3425 return igb_xmit_frame_ring_adv(skb
, netdev
, tx_ring
);
3429 * igb_tx_timeout - Respond to a Tx Hang
3430 * @netdev: network interface device structure
3432 static void igb_tx_timeout(struct net_device
*netdev
)
3434 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3435 struct e1000_hw
*hw
= &adapter
->hw
;
3437 /* Do the reset outside of interrupt context */
3438 adapter
->tx_timeout_count
++;
3439 schedule_work(&adapter
->reset_task
);
3441 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
3444 static void igb_reset_task(struct work_struct
*work
)
3446 struct igb_adapter
*adapter
;
3447 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
3449 igb_reinit_locked(adapter
);
3453 * igb_get_stats - Get System Network Statistics
3454 * @netdev: network interface device structure
3456 * Returns the address of the device statistics structure.
3457 * The statistics are actually updated from the timer callback.
3459 static struct net_device_stats
*igb_get_stats(struct net_device
*netdev
)
3461 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3463 /* only return the current stats */
3464 return &adapter
->net_stats
;
3468 * igb_change_mtu - Change the Maximum Transfer Unit
3469 * @netdev: network interface device structure
3470 * @new_mtu: new value for maximum frame size
3472 * Returns 0 on success, negative on failure
3474 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
3476 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3477 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3479 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
3480 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
3481 dev_err(&adapter
->pdev
->dev
, "Invalid MTU setting\n");
3485 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
3486 dev_err(&adapter
->pdev
->dev
, "MTU > 9216 not supported.\n");
3490 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
3493 /* igb_down has a dependency on max_frame_size */
3494 adapter
->max_frame_size
= max_frame
;
3495 if (netif_running(netdev
))
3498 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3499 * means we reserve 2 more, this pushes us to allocate from the next
3501 * i.e. RXBUFFER_2048 --> size-4096 slab
3504 if (max_frame
<= IGB_RXBUFFER_256
)
3505 adapter
->rx_buffer_len
= IGB_RXBUFFER_256
;
3506 else if (max_frame
<= IGB_RXBUFFER_512
)
3507 adapter
->rx_buffer_len
= IGB_RXBUFFER_512
;
3508 else if (max_frame
<= IGB_RXBUFFER_1024
)
3509 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3510 else if (max_frame
<= IGB_RXBUFFER_2048
)
3511 adapter
->rx_buffer_len
= IGB_RXBUFFER_2048
;
3513 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3514 adapter
->rx_buffer_len
= IGB_RXBUFFER_16384
;
3516 adapter
->rx_buffer_len
= PAGE_SIZE
/ 2;
3519 /* if sr-iov is enabled we need to force buffer size to 1K or larger */
3520 if (adapter
->vfs_allocated_count
&&
3521 (adapter
->rx_buffer_len
< IGB_RXBUFFER_1024
))
3522 adapter
->rx_buffer_len
= IGB_RXBUFFER_1024
;
3524 /* adjust allocation if LPE protects us, and we aren't using SBP */
3525 if ((max_frame
== ETH_FRAME_LEN
+ ETH_FCS_LEN
) ||
3526 (max_frame
== MAXIMUM_ETHERNET_VLAN_SIZE
))
3527 adapter
->rx_buffer_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
3529 dev_info(&adapter
->pdev
->dev
, "changing MTU from %d to %d\n",
3530 netdev
->mtu
, new_mtu
);
3531 netdev
->mtu
= new_mtu
;
3533 if (netif_running(netdev
))
3538 clear_bit(__IGB_RESETTING
, &adapter
->state
);
3544 * igb_update_stats - Update the board statistics counters
3545 * @adapter: board private structure
3548 void igb_update_stats(struct igb_adapter
*adapter
)
3550 struct e1000_hw
*hw
= &adapter
->hw
;
3551 struct pci_dev
*pdev
= adapter
->pdev
;
3554 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3557 * Prevent stats update while adapter is being reset, or if the pci
3558 * connection is down.
3560 if (adapter
->link_speed
== 0)
3562 if (pci_channel_offline(pdev
))
3565 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
3566 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
3567 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
3568 rd32(E1000_GORCH
); /* clear GORCL */
3569 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
3570 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
3571 adapter
->stats
.roc
+= rd32(E1000_ROC
);
3573 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
3574 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
3575 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
3576 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
3577 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
3578 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
3579 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
3580 adapter
->stats
.sec
+= rd32(E1000_SEC
);
3582 adapter
->stats
.mpc
+= rd32(E1000_MPC
);
3583 adapter
->stats
.scc
+= rd32(E1000_SCC
);
3584 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
3585 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
3586 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
3587 adapter
->stats
.dc
+= rd32(E1000_DC
);
3588 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
3589 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
3590 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
3591 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
3592 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
3593 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
3594 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
3595 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
3596 rd32(E1000_GOTCH
); /* clear GOTCL */
3597 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
3598 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
3599 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
3600 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
3601 adapter
->stats
.tor
+= rd32(E1000_TORH
);
3602 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
3603 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
3605 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
3606 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
3607 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
3608 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
3609 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
3610 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
3612 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
3613 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
3615 /* used for adaptive IFS */
3617 hw
->mac
.tx_packet_delta
= rd32(E1000_TPT
);
3618 adapter
->stats
.tpt
+= hw
->mac
.tx_packet_delta
;
3619 hw
->mac
.collision_delta
= rd32(E1000_COLC
);
3620 adapter
->stats
.colc
+= hw
->mac
.collision_delta
;
3622 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
3623 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
3624 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
3625 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
3626 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
3628 adapter
->stats
.iac
+= rd32(E1000_IAC
);
3629 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
3630 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
3631 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
3632 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
3633 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
3634 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
3635 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
3636 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
3638 /* Fill out the OS statistics structure */
3639 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3640 adapter
->net_stats
.collisions
= adapter
->stats
.colc
;
3644 if (hw
->mac
.type
!= e1000_82575
) {
3646 u64 rqdpc_total
= 0;
3648 /* Read out drops stats per RX queue. Notice RQDPC (Receive
3649 * Queue Drop Packet Count) stats only gets incremented, if
3650 * the DROP_EN but it set (in the SRRCTL register for that
3651 * queue). If DROP_EN bit is NOT set, then the some what
3652 * equivalent count is stored in RNBC (not per queue basis).
3653 * Also note the drop count is due to lack of available
3656 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3657 rqdpc_tmp
= rd32(E1000_RQDPC(i
)) & 0xFFF;
3658 adapter
->rx_ring
[i
].rx_stats
.drops
+= rqdpc_tmp
;
3659 rqdpc_total
+= adapter
->rx_ring
[i
].rx_stats
.drops
;
3661 adapter
->net_stats
.rx_fifo_errors
= rqdpc_total
;
3664 /* Note RNBC (Receive No Buffers Count) is an not an exact
3665 * drop count as the hardware FIFO might save the day. Thats
3666 * one of the reason for saving it in rx_fifo_errors, as its
3667 * potentially not a true drop.
3669 adapter
->net_stats
.rx_fifo_errors
+= adapter
->stats
.rnbc
;
3671 /* RLEC on some newer hardware can be incorrect so build
3672 * our own version based on RUC and ROC */
3673 adapter
->net_stats
.rx_errors
= adapter
->stats
.rxerrc
+
3674 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
3675 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
3676 adapter
->stats
.cexterr
;
3677 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.ruc
+
3679 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3680 adapter
->net_stats
.rx_frame_errors
= adapter
->stats
.algnerrc
;
3681 adapter
->net_stats
.rx_missed_errors
= adapter
->stats
.mpc
;
3684 adapter
->net_stats
.tx_errors
= adapter
->stats
.ecol
+
3685 adapter
->stats
.latecol
;
3686 adapter
->net_stats
.tx_aborted_errors
= adapter
->stats
.ecol
;
3687 adapter
->net_stats
.tx_window_errors
= adapter
->stats
.latecol
;
3688 adapter
->net_stats
.tx_carrier_errors
= adapter
->stats
.tncrs
;
3690 /* Tx Dropped needs to be maintained elsewhere */
3693 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
3694 if ((adapter
->link_speed
== SPEED_1000
) &&
3695 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
, &phy_tmp
))) {
3696 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
3697 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
3701 /* Management Stats */
3702 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
3703 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
3704 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
3707 static irqreturn_t
igb_msix_other(int irq
, void *data
)
3709 struct net_device
*netdev
= data
;
3710 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3711 struct e1000_hw
*hw
= &adapter
->hw
;
3712 u32 icr
= rd32(E1000_ICR
);
3714 /* reading ICR causes bit 31 of EICR to be cleared */
3716 if(icr
& E1000_ICR_DOUTSYNC
) {
3717 /* HW is reporting DMA is out of sync */
3718 adapter
->stats
.doosync
++;
3721 /* Check for a mailbox event */
3722 if (icr
& E1000_ICR_VMMB
)
3723 igb_msg_task(adapter
);
3725 if (icr
& E1000_ICR_LSC
) {
3726 hw
->mac
.get_link_status
= 1;
3727 /* guard against interrupt when we're going down */
3728 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3729 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
3732 wr32(E1000_IMS
, E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_VMMB
);
3733 wr32(E1000_EIMS
, adapter
->eims_other
);
3738 static irqreturn_t
igb_msix_tx(int irq
, void *data
)
3740 struct igb_ring
*tx_ring
= data
;
3741 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3742 struct e1000_hw
*hw
= &adapter
->hw
;
3744 #ifdef CONFIG_IGB_DCA
3745 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3746 igb_update_tx_dca(tx_ring
);
3749 tx_ring
->total_bytes
= 0;
3750 tx_ring
->total_packets
= 0;
3752 /* auto mask will automatically reenable the interrupt when we write
3754 if (!igb_clean_tx_irq(tx_ring
))
3755 /* Ring was not completely cleaned, so fire another interrupt */
3756 wr32(E1000_EICS
, tx_ring
->eims_value
);
3758 wr32(E1000_EIMS
, tx_ring
->eims_value
);
3763 static void igb_write_itr(struct igb_ring
*ring
)
3765 struct e1000_hw
*hw
= &ring
->adapter
->hw
;
3766 if ((ring
->adapter
->itr_setting
& 3) && ring
->set_itr
) {
3767 switch (hw
->mac
.type
) {
3769 wr32(ring
->itr_register
, ring
->itr_val
|
3773 wr32(ring
->itr_register
, ring
->itr_val
|
3774 (ring
->itr_val
<< 16));
3781 static irqreturn_t
igb_msix_rx(int irq
, void *data
)
3783 struct igb_ring
*rx_ring
= data
;
3785 /* Write the ITR value calculated at the end of the
3786 * previous interrupt.
3789 igb_write_itr(rx_ring
);
3791 if (napi_schedule_prep(&rx_ring
->napi
))
3792 __napi_schedule(&rx_ring
->napi
);
3794 #ifdef CONFIG_IGB_DCA
3795 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3796 igb_update_rx_dca(rx_ring
);
3801 #ifdef CONFIG_IGB_DCA
3802 static void igb_update_rx_dca(struct igb_ring
*rx_ring
)
3805 struct igb_adapter
*adapter
= rx_ring
->adapter
;
3806 struct e1000_hw
*hw
= &adapter
->hw
;
3807 int cpu
= get_cpu();
3808 int q
= rx_ring
->reg_idx
;
3810 if (rx_ring
->cpu
!= cpu
) {
3811 dca_rxctrl
= rd32(E1000_DCA_RXCTRL(q
));
3812 if (hw
->mac
.type
== e1000_82576
) {
3813 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK_82576
;
3814 dca_rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
3815 E1000_DCA_RXCTRL_CPUID_SHIFT
;
3817 dca_rxctrl
&= ~E1000_DCA_RXCTRL_CPUID_MASK
;
3818 dca_rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
3820 dca_rxctrl
|= E1000_DCA_RXCTRL_DESC_DCA_EN
;
3821 dca_rxctrl
|= E1000_DCA_RXCTRL_HEAD_DCA_EN
;
3822 dca_rxctrl
|= E1000_DCA_RXCTRL_DATA_DCA_EN
;
3823 wr32(E1000_DCA_RXCTRL(q
), dca_rxctrl
);
3829 static void igb_update_tx_dca(struct igb_ring
*tx_ring
)
3832 struct igb_adapter
*adapter
= tx_ring
->adapter
;
3833 struct e1000_hw
*hw
= &adapter
->hw
;
3834 int cpu
= get_cpu();
3835 int q
= tx_ring
->reg_idx
;
3837 if (tx_ring
->cpu
!= cpu
) {
3838 dca_txctrl
= rd32(E1000_DCA_TXCTRL(q
));
3839 if (hw
->mac
.type
== e1000_82576
) {
3840 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK_82576
;
3841 dca_txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
) <<
3842 E1000_DCA_TXCTRL_CPUID_SHIFT
;
3844 dca_txctrl
&= ~E1000_DCA_TXCTRL_CPUID_MASK
;
3845 dca_txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
3847 dca_txctrl
|= E1000_DCA_TXCTRL_DESC_DCA_EN
;
3848 wr32(E1000_DCA_TXCTRL(q
), dca_txctrl
);
3854 static void igb_setup_dca(struct igb_adapter
*adapter
)
3856 struct e1000_hw
*hw
= &adapter
->hw
;
3859 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
3862 /* Always use CB2 mode, difference is masked in the CB driver. */
3863 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
3865 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3866 adapter
->tx_ring
[i
].cpu
= -1;
3867 igb_update_tx_dca(&adapter
->tx_ring
[i
]);
3869 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3870 adapter
->rx_ring
[i
].cpu
= -1;
3871 igb_update_rx_dca(&adapter
->rx_ring
[i
]);
3875 static int __igb_notify_dca(struct device
*dev
, void *data
)
3877 struct net_device
*netdev
= dev_get_drvdata(dev
);
3878 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3879 struct e1000_hw
*hw
= &adapter
->hw
;
3880 unsigned long event
= *(unsigned long *)data
;
3883 case DCA_PROVIDER_ADD
:
3884 /* if already enabled, don't do it again */
3885 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
3887 /* Always use CB2 mode, difference is masked
3888 * in the CB driver. */
3889 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
3890 if (dca_add_requester(dev
) == 0) {
3891 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
3892 dev_info(&adapter
->pdev
->dev
, "DCA enabled\n");
3893 igb_setup_dca(adapter
);
3896 /* Fall Through since DCA is disabled. */
3897 case DCA_PROVIDER_REMOVE
:
3898 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
3899 /* without this a class_device is left
3900 * hanging around in the sysfs model */
3901 dca_remove_requester(dev
);
3902 dev_info(&adapter
->pdev
->dev
, "DCA disabled\n");
3903 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
3904 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
3912 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3917 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
3920 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3922 #endif /* CONFIG_IGB_DCA */
3924 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
3926 struct e1000_hw
*hw
= &adapter
->hw
;
3930 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
3931 ping
= E1000_PF_CONTROL_MSG
;
3932 if (adapter
->vf_data
[i
].clear_to_send
)
3933 ping
|= E1000_VT_MSGTYPE_CTS
;
3934 igb_write_mbx(hw
, &ping
, 1, i
);
3938 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
3939 u32
*msgbuf
, u32 vf
)
3941 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
3942 u16
*hash_list
= (u16
*)&msgbuf
[1];
3943 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
3946 /* only up to 30 hash values supported */
3950 /* salt away the number of multi cast addresses assigned
3951 * to this VF for later use to restore when the PF multi cast
3954 vf_data
->num_vf_mc_hashes
= n
;
3956 /* VFs are limited to using the MTA hash table for their multicast
3958 for (i
= 0; i
< n
; i
++)
3959 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];;
3961 /* Flush and reset the mta with the new values */
3962 igb_set_rx_mode(adapter
->netdev
);
3967 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
3969 struct e1000_hw
*hw
= &adapter
->hw
;
3970 struct vf_data_storage
*vf_data
;
3973 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
3974 vf_data
= &adapter
->vf_data
[i
];
3975 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
3976 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
3980 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
3982 struct e1000_hw
*hw
= &adapter
->hw
;
3983 u32 pool_mask
, reg
, vid
;
3986 pool_mask
= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
3988 /* Find the vlan filter for this id */
3989 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
3990 reg
= rd32(E1000_VLVF(i
));
3992 /* remove the vf from the pool */
3995 /* if pool is empty then remove entry from vfta */
3996 if (!(reg
& E1000_VLVF_POOLSEL_MASK
) &&
3997 (reg
& E1000_VLVF_VLANID_ENABLE
)) {
3999 vid
= reg
& E1000_VLVF_VLANID_MASK
;
4000 igb_vfta_set(hw
, vid
, false);
4003 wr32(E1000_VLVF(i
), reg
);
4007 static s32
igb_vlvf_set(struct igb_adapter
*adapter
, u32 vid
, bool add
, u32 vf
)
4009 struct e1000_hw
*hw
= &adapter
->hw
;
4012 /* It is an error to call this function when VFs are not enabled */
4013 if (!adapter
->vfs_allocated_count
)
4016 /* Find the vlan filter for this id */
4017 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
4018 reg
= rd32(E1000_VLVF(i
));
4019 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
4020 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
4025 if (i
== E1000_VLVF_ARRAY_SIZE
) {
4026 /* Did not find a matching VLAN ID entry that was
4027 * enabled. Search for a free filter entry, i.e.
4028 * one without the enable bit set
4030 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
4031 reg
= rd32(E1000_VLVF(i
));
4032 if (!(reg
& E1000_VLVF_VLANID_ENABLE
))
4036 if (i
< E1000_VLVF_ARRAY_SIZE
) {
4037 /* Found an enabled/available entry */
4038 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
4040 /* if !enabled we need to set this up in vfta */
4041 if (!(reg
& E1000_VLVF_VLANID_ENABLE
)) {
4042 /* add VID to filter table, if bit already set
4043 * PF must have added it outside of table */
4044 if (igb_vfta_set(hw
, vid
, true))
4045 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+
4046 adapter
->vfs_allocated_count
);
4047 reg
|= E1000_VLVF_VLANID_ENABLE
;
4049 reg
&= ~E1000_VLVF_VLANID_MASK
;
4052 wr32(E1000_VLVF(i
), reg
);
4056 if (i
< E1000_VLVF_ARRAY_SIZE
) {
4057 /* remove vf from the pool */
4058 reg
&= ~(1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
));
4059 /* if pool is empty then remove entry from vfta */
4060 if (!(reg
& E1000_VLVF_POOLSEL_MASK
)) {
4062 igb_vfta_set(hw
, vid
, false);
4064 wr32(E1000_VLVF(i
), reg
);
4071 static int igb_set_vf_vlan(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
4073 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
4074 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
4076 return igb_vlvf_set(adapter
, vid
, add
, vf
);
4079 static inline void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
4081 struct e1000_hw
*hw
= &adapter
->hw
;
4083 /* disable mailbox functionality for vf */
4084 adapter
->vf_data
[vf
].clear_to_send
= false;
4086 /* reset offloads to defaults */
4087 igb_set_vmolr(hw
, vf
);
4089 /* reset vlans for device */
4090 igb_clear_vf_vfta(adapter
, vf
);
4092 /* reset multicast table array for vf */
4093 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
4095 /* Flush and reset the mta with the new values */
4096 igb_set_rx_mode(adapter
->netdev
);
4099 static inline void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
4101 struct e1000_hw
*hw
= &adapter
->hw
;
4102 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
4103 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
4105 u8
*addr
= (u8
*)(&msgbuf
[1]);
4107 /* process all the same items cleared in a function level reset */
4108 igb_vf_reset_event(adapter
, vf
);
4110 /* set vf mac address */
4111 igb_rar_set(hw
, vf_mac
, rar_entry
);
4112 igb_set_rah_pool(hw
, vf
, rar_entry
);
4114 /* enable transmit and receive for vf */
4115 reg
= rd32(E1000_VFTE
);
4116 wr32(E1000_VFTE
, reg
| (1 << vf
));
4117 reg
= rd32(E1000_VFRE
);
4118 wr32(E1000_VFRE
, reg
| (1 << vf
));
4120 /* enable mailbox functionality for vf */
4121 adapter
->vf_data
[vf
].clear_to_send
= true;
4123 /* reply to reset with ack and vf mac address */
4124 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
4125 memcpy(addr
, vf_mac
, 6);
4126 igb_write_mbx(hw
, msgbuf
, 3, vf
);
4129 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
4131 unsigned char *addr
= (char *)&msg
[1];
4134 if (is_valid_ether_addr(addr
))
4135 err
= igb_set_vf_mac(adapter
, vf
, addr
);
4141 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
4143 struct e1000_hw
*hw
= &adapter
->hw
;
4144 u32 msg
= E1000_VT_MSGTYPE_NACK
;
4146 /* if device isn't clear to send it shouldn't be reading either */
4147 if (!adapter
->vf_data
[vf
].clear_to_send
)
4148 igb_write_mbx(hw
, &msg
, 1, vf
);
4152 static void igb_msg_task(struct igb_adapter
*adapter
)
4154 struct e1000_hw
*hw
= &adapter
->hw
;
4157 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
4158 /* process any reset requests */
4159 if (!igb_check_for_rst(hw
, vf
)) {
4160 adapter
->vf_data
[vf
].clear_to_send
= false;
4161 igb_vf_reset_event(adapter
, vf
);
4164 /* process any messages pending */
4165 if (!igb_check_for_msg(hw
, vf
))
4166 igb_rcv_msg_from_vf(adapter
, vf
);
4168 /* process any acks */
4169 if (!igb_check_for_ack(hw
, vf
))
4170 igb_rcv_ack_from_vf(adapter
, vf
);
4175 static int igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
4177 u32 mbx_size
= E1000_VFMAILBOX_SIZE
;
4178 u32 msgbuf
[mbx_size
];
4179 struct e1000_hw
*hw
= &adapter
->hw
;
4182 retval
= igb_read_mbx(hw
, msgbuf
, mbx_size
, vf
);
4185 dev_err(&adapter
->pdev
->dev
,
4186 "Error receiving message from VF\n");
4188 /* this is a message we already processed, do nothing */
4189 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
4193 * until the vf completes a reset it should not be
4194 * allowed to start any configuration.
4197 if (msgbuf
[0] == E1000_VF_RESET
) {
4198 igb_vf_reset_msg(adapter
, vf
);
4203 if (!adapter
->vf_data
[vf
].clear_to_send
) {
4204 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
4205 igb_write_mbx(hw
, msgbuf
, 1, vf
);
4209 switch ((msgbuf
[0] & 0xFFFF)) {
4210 case E1000_VF_SET_MAC_ADDR
:
4211 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
4213 case E1000_VF_SET_MULTICAST
:
4214 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
4216 case E1000_VF_SET_LPE
:
4217 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
4219 case E1000_VF_SET_VLAN
:
4220 retval
= igb_set_vf_vlan(adapter
, msgbuf
, vf
);
4223 dev_err(&adapter
->pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
4228 /* notify the VF of the results of what it sent us */
4230 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
4232 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
4234 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
4236 igb_write_mbx(hw
, msgbuf
, 1, vf
);
4242 * igb_intr_msi - Interrupt Handler
4243 * @irq: interrupt number
4244 * @data: pointer to a network interface device structure
4246 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
4248 struct net_device
*netdev
= data
;
4249 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4250 struct e1000_hw
*hw
= &adapter
->hw
;
4251 /* read ICR disables interrupts using IAM */
4252 u32 icr
= rd32(E1000_ICR
);
4254 igb_write_itr(adapter
->rx_ring
);
4256 if(icr
& E1000_ICR_DOUTSYNC
) {
4257 /* HW is reporting DMA is out of sync */
4258 adapter
->stats
.doosync
++;
4261 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
4262 hw
->mac
.get_link_status
= 1;
4263 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4264 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
4267 napi_schedule(&adapter
->rx_ring
[0].napi
);
4273 * igb_intr - Legacy Interrupt Handler
4274 * @irq: interrupt number
4275 * @data: pointer to a network interface device structure
4277 static irqreturn_t
igb_intr(int irq
, void *data
)
4279 struct net_device
*netdev
= data
;
4280 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4281 struct e1000_hw
*hw
= &adapter
->hw
;
4282 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
4283 * need for the IMC write */
4284 u32 icr
= rd32(E1000_ICR
);
4286 return IRQ_NONE
; /* Not our interrupt */
4288 igb_write_itr(adapter
->rx_ring
);
4290 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
4291 * not set, then the adapter didn't send an interrupt */
4292 if (!(icr
& E1000_ICR_INT_ASSERTED
))
4295 if(icr
& E1000_ICR_DOUTSYNC
) {
4296 /* HW is reporting DMA is out of sync */
4297 adapter
->stats
.doosync
++;
4300 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
4301 hw
->mac
.get_link_status
= 1;
4302 /* guard against interrupt when we're going down */
4303 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4304 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
4307 napi_schedule(&adapter
->rx_ring
[0].napi
);
4312 static inline void igb_rx_irq_enable(struct igb_ring
*rx_ring
)
4314 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4315 struct e1000_hw
*hw
= &adapter
->hw
;
4317 if (adapter
->itr_setting
& 3) {
4318 if (adapter
->num_rx_queues
== 1)
4319 igb_set_itr(adapter
);
4321 igb_update_ring_itr(rx_ring
);
4324 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
4325 if (adapter
->msix_entries
)
4326 wr32(E1000_EIMS
, rx_ring
->eims_value
);
4328 igb_irq_enable(adapter
);
4333 * igb_poll - NAPI Rx polling callback
4334 * @napi: napi polling structure
4335 * @budget: count of how many packets we should handle
4337 static int igb_poll(struct napi_struct
*napi
, int budget
)
4339 struct igb_ring
*rx_ring
= container_of(napi
, struct igb_ring
, napi
);
4342 #ifdef CONFIG_IGB_DCA
4343 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
4344 igb_update_rx_dca(rx_ring
);
4346 igb_clean_rx_irq_adv(rx_ring
, &work_done
, budget
);
4348 if (rx_ring
->buddy
) {
4349 #ifdef CONFIG_IGB_DCA
4350 if (rx_ring
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
4351 igb_update_tx_dca(rx_ring
->buddy
);
4353 if (!igb_clean_tx_irq(rx_ring
->buddy
))
4357 /* If not enough Rx work done, exit the polling mode */
4358 if (work_done
< budget
) {
4359 napi_complete(napi
);
4360 igb_rx_irq_enable(rx_ring
);
4367 * igb_hwtstamp - utility function which checks for TX time stamp
4368 * @adapter: board private structure
4369 * @skb: packet that was just sent
4371 * If we were asked to do hardware stamping and such a time stamp is
4372 * available, then it must have been for this skb here because we only
4373 * allow only one such packet into the queue.
4375 static void igb_tx_hwtstamp(struct igb_adapter
*adapter
, struct sk_buff
*skb
)
4377 union skb_shared_tx
*shtx
= skb_tx(skb
);
4378 struct e1000_hw
*hw
= &adapter
->hw
;
4380 if (unlikely(shtx
->hardware
)) {
4381 u32 valid
= rd32(E1000_TSYNCTXCTL
) & E1000_TSYNCTXCTL_VALID
;
4383 u64 regval
= rd32(E1000_TXSTMPL
);
4385 struct skb_shared_hwtstamps shhwtstamps
;
4387 memset(&shhwtstamps
, 0, sizeof(shhwtstamps
));
4388 regval
|= (u64
)rd32(E1000_TXSTMPH
) << 32;
4389 ns
= timecounter_cyc2time(&adapter
->clock
,
4391 timecompare_update(&adapter
->compare
, ns
);
4392 shhwtstamps
.hwtstamp
= ns_to_ktime(ns
);
4393 shhwtstamps
.syststamp
=
4394 timecompare_transform(&adapter
->compare
, ns
);
4395 skb_tstamp_tx(skb
, &shhwtstamps
);
4401 * igb_clean_tx_irq - Reclaim resources after transmit completes
4402 * @adapter: board private structure
4403 * returns true if ring is completely cleaned
4405 static bool igb_clean_tx_irq(struct igb_ring
*tx_ring
)
4407 struct igb_adapter
*adapter
= tx_ring
->adapter
;
4408 struct net_device
*netdev
= adapter
->netdev
;
4409 struct e1000_hw
*hw
= &adapter
->hw
;
4410 struct igb_buffer
*buffer_info
;
4411 struct sk_buff
*skb
;
4412 union e1000_adv_tx_desc
*tx_desc
, *eop_desc
;
4413 unsigned int total_bytes
= 0, total_packets
= 0;
4414 unsigned int i
, eop
, count
= 0;
4415 bool cleaned
= false;
4417 i
= tx_ring
->next_to_clean
;
4418 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
4419 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
4421 while ((eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)) &&
4422 (count
< tx_ring
->count
)) {
4423 for (cleaned
= false; !cleaned
; count
++) {
4424 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
4425 buffer_info
= &tx_ring
->buffer_info
[i
];
4426 cleaned
= (i
== eop
);
4427 skb
= buffer_info
->skb
;
4430 unsigned int segs
, bytecount
;
4431 /* gso_segs is currently only valid for tcp */
4432 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
4433 /* multiply data chunks by size of headers */
4434 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
4436 total_packets
+= segs
;
4437 total_bytes
+= bytecount
;
4439 igb_tx_hwtstamp(adapter
, skb
);
4442 igb_unmap_and_free_tx_resource(adapter
, buffer_info
);
4443 tx_desc
->wb
.status
= 0;
4446 if (i
== tx_ring
->count
)
4449 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
4450 eop_desc
= E1000_TX_DESC_ADV(*tx_ring
, eop
);
4453 tx_ring
->next_to_clean
= i
;
4455 if (unlikely(count
&&
4456 netif_carrier_ok(netdev
) &&
4457 igb_desc_unused(tx_ring
) >= IGB_TX_QUEUE_WAKE
)) {
4458 /* Make sure that anybody stopping the queue after this
4459 * sees the new next_to_clean.
4462 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
4463 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
4464 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
4465 ++adapter
->restart_queue
;
4469 if (tx_ring
->detect_tx_hung
) {
4470 /* Detect a transmit hang in hardware, this serializes the
4471 * check with the clearing of time_stamp and movement of i */
4472 tx_ring
->detect_tx_hung
= false;
4473 if (tx_ring
->buffer_info
[i
].time_stamp
&&
4474 time_after(jiffies
, tx_ring
->buffer_info
[i
].time_stamp
+
4475 (adapter
->tx_timeout_factor
* HZ
))
4476 && !(rd32(E1000_STATUS
) &
4477 E1000_STATUS_TXOFF
)) {
4479 /* detected Tx unit hang */
4480 dev_err(&adapter
->pdev
->dev
,
4481 "Detected Tx Unit Hang\n"
4485 " next_to_use <%x>\n"
4486 " next_to_clean <%x>\n"
4487 "buffer_info[next_to_clean]\n"
4488 " time_stamp <%lx>\n"
4489 " next_to_watch <%x>\n"
4491 " desc.status <%x>\n",
4492 tx_ring
->queue_index
,
4493 readl(adapter
->hw
.hw_addr
+ tx_ring
->head
),
4494 readl(adapter
->hw
.hw_addr
+ tx_ring
->tail
),
4495 tx_ring
->next_to_use
,
4496 tx_ring
->next_to_clean
,
4497 tx_ring
->buffer_info
[i
].time_stamp
,
4500 eop_desc
->wb
.status
);
4501 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4504 tx_ring
->total_bytes
+= total_bytes
;
4505 tx_ring
->total_packets
+= total_packets
;
4506 tx_ring
->tx_stats
.bytes
+= total_bytes
;
4507 tx_ring
->tx_stats
.packets
+= total_packets
;
4508 adapter
->net_stats
.tx_bytes
+= total_bytes
;
4509 adapter
->net_stats
.tx_packets
+= total_packets
;
4510 return (count
< tx_ring
->count
);
4514 * igb_receive_skb - helper function to handle rx indications
4515 * @ring: pointer to receive ring receving this packet
4516 * @status: descriptor status field as written by hardware
4517 * @rx_desc: receive descriptor containing vlan and type information.
4518 * @skb: pointer to sk_buff to be indicated to stack
4520 static void igb_receive_skb(struct igb_ring
*ring
, u8 status
,
4521 union e1000_adv_rx_desc
* rx_desc
,
4522 struct sk_buff
*skb
)
4524 struct igb_adapter
* adapter
= ring
->adapter
;
4525 bool vlan_extracted
= (adapter
->vlgrp
&& (status
& E1000_RXD_STAT_VP
));
4527 skb_record_rx_queue(skb
, ring
->queue_index
);
4529 vlan_gro_receive(&ring
->napi
, adapter
->vlgrp
,
4530 le16_to_cpu(rx_desc
->wb
.upper
.vlan
),
4533 napi_gro_receive(&ring
->napi
, skb
);
4536 static inline void igb_rx_checksum_adv(struct igb_adapter
*adapter
,
4537 u32 status_err
, struct sk_buff
*skb
)
4539 skb
->ip_summed
= CHECKSUM_NONE
;
4541 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
4542 if ((status_err
& E1000_RXD_STAT_IXSM
) ||
4543 (adapter
->flags
& IGB_FLAG_RX_CSUM_DISABLED
))
4545 /* TCP/UDP checksum error bit is set */
4547 (E1000_RXDEXT_STATERR_TCPE
| E1000_RXDEXT_STATERR_IPE
)) {
4549 * work around errata with sctp packets where the TCPE aka
4550 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
4551 * packets, (aka let the stack check the crc32c)
4553 if (!((adapter
->hw
.mac
.type
== e1000_82576
) &&
4555 adapter
->hw_csum_err
++;
4556 /* let the stack verify checksum errors */
4559 /* It must be a TCP or UDP packet with a valid checksum */
4560 if (status_err
& (E1000_RXD_STAT_TCPCS
| E1000_RXD_STAT_UDPCS
))
4561 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
4563 dev_dbg(&adapter
->pdev
->dev
, "cksum success: bits %08X\n", status_err
);
4564 adapter
->hw_csum_good
++;
4567 static inline u16
igb_get_hlen(struct igb_adapter
*adapter
,
4568 union e1000_adv_rx_desc
*rx_desc
)
4570 /* HW will not DMA in data larger than the given buffer, even if it
4571 * parses the (NFS, of course) header to be larger. In that case, it
4572 * fills the header buffer and spills the rest into the page.
4574 u16 hlen
= (le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hdr_info
) &
4575 E1000_RXDADV_HDRBUFLEN_MASK
) >> E1000_RXDADV_HDRBUFLEN_SHIFT
;
4576 if (hlen
> adapter
->rx_ps_hdr_size
)
4577 hlen
= adapter
->rx_ps_hdr_size
;
4581 static bool igb_clean_rx_irq_adv(struct igb_ring
*rx_ring
,
4582 int *work_done
, int budget
)
4584 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4585 struct net_device
*netdev
= adapter
->netdev
;
4586 struct e1000_hw
*hw
= &adapter
->hw
;
4587 struct pci_dev
*pdev
= adapter
->pdev
;
4588 union e1000_adv_rx_desc
*rx_desc
, *next_rxd
;
4589 struct igb_buffer
*buffer_info
, *next_buffer
;
4590 struct sk_buff
*skb
;
4591 bool cleaned
= false;
4592 int cleaned_count
= 0;
4593 unsigned int total_bytes
= 0, total_packets
= 0;
4598 i
= rx_ring
->next_to_clean
;
4599 buffer_info
= &rx_ring
->buffer_info
[i
];
4600 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4601 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
4603 while (staterr
& E1000_RXD_STAT_DD
) {
4604 if (*work_done
>= budget
)
4608 skb
= buffer_info
->skb
;
4609 prefetch(skb
->data
- NET_IP_ALIGN
);
4610 buffer_info
->skb
= NULL
;
4613 if (i
== rx_ring
->count
)
4615 next_rxd
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4617 next_buffer
= &rx_ring
->buffer_info
[i
];
4619 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
4623 /* this is the fast path for the non-packet split case */
4624 if (!adapter
->rx_ps_hdr_size
) {
4625 pci_unmap_single(pdev
, buffer_info
->dma
,
4626 adapter
->rx_buffer_len
,
4627 PCI_DMA_FROMDEVICE
);
4628 buffer_info
->dma
= 0;
4629 skb_put(skb
, length
);
4633 if (buffer_info
->dma
) {
4634 u16 hlen
= igb_get_hlen(adapter
, rx_desc
);
4635 pci_unmap_single(pdev
, buffer_info
->dma
,
4636 adapter
->rx_ps_hdr_size
,
4637 PCI_DMA_FROMDEVICE
);
4638 buffer_info
->dma
= 0;
4643 pci_unmap_page(pdev
, buffer_info
->page_dma
,
4644 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
4645 buffer_info
->page_dma
= 0;
4647 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
++,
4649 buffer_info
->page_offset
,
4652 if ((adapter
->rx_buffer_len
> (PAGE_SIZE
/ 2)) ||
4653 (page_count(buffer_info
->page
) != 1))
4654 buffer_info
->page
= NULL
;
4656 get_page(buffer_info
->page
);
4659 skb
->data_len
+= length
;
4661 skb
->truesize
+= length
;
4664 if (!(staterr
& E1000_RXD_STAT_EOP
)) {
4665 buffer_info
->skb
= next_buffer
->skb
;
4666 buffer_info
->dma
= next_buffer
->dma
;
4667 next_buffer
->skb
= skb
;
4668 next_buffer
->dma
= 0;
4673 * If this bit is set, then the RX registers contain
4674 * the time stamp. No other packet will be time
4675 * stamped until we read these registers, so read the
4676 * registers to make them available again. Because
4677 * only one packet can be time stamped at a time, we
4678 * know that the register values must belong to this
4679 * one here and therefore we don't need to compare
4680 * any of the additional attributes stored for it.
4682 * If nothing went wrong, then it should have a
4683 * skb_shared_tx that we can turn into a
4684 * skb_shared_hwtstamps.
4686 * TODO: can time stamping be triggered (thus locking
4687 * the registers) without the packet reaching this point
4688 * here? In that case RX time stamping would get stuck.
4690 * TODO: in "time stamp all packets" mode this bit is
4691 * not set. Need a global flag for this mode and then
4692 * always read the registers. Cannot be done without
4695 if (unlikely(staterr
& E1000_RXD_STAT_TS
)) {
4698 struct skb_shared_hwtstamps
*shhwtstamps
=
4701 WARN(!(rd32(E1000_TSYNCRXCTL
) & E1000_TSYNCRXCTL_VALID
),
4702 "igb: no RX time stamp available for time stamped packet");
4703 regval
= rd32(E1000_RXSTMPL
);
4704 regval
|= (u64
)rd32(E1000_RXSTMPH
) << 32;
4705 ns
= timecounter_cyc2time(&adapter
->clock
, regval
);
4706 timecompare_update(&adapter
->compare
, ns
);
4707 memset(shhwtstamps
, 0, sizeof(*shhwtstamps
));
4708 shhwtstamps
->hwtstamp
= ns_to_ktime(ns
);
4709 shhwtstamps
->syststamp
=
4710 timecompare_transform(&adapter
->compare
, ns
);
4713 if (staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) {
4714 dev_kfree_skb_irq(skb
);
4718 total_bytes
+= skb
->len
;
4721 igb_rx_checksum_adv(adapter
, staterr
, skb
);
4723 skb
->protocol
= eth_type_trans(skb
, netdev
);
4725 igb_receive_skb(rx_ring
, staterr
, rx_desc
, skb
);
4728 rx_desc
->wb
.upper
.status_error
= 0;
4730 /* return some buffers to hardware, one at a time is too slow */
4731 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
4732 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4736 /* use prefetched values */
4738 buffer_info
= next_buffer
;
4739 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
4742 rx_ring
->next_to_clean
= i
;
4743 cleaned_count
= igb_desc_unused(rx_ring
);
4746 igb_alloc_rx_buffers_adv(rx_ring
, cleaned_count
);
4748 rx_ring
->total_packets
+= total_packets
;
4749 rx_ring
->total_bytes
+= total_bytes
;
4750 rx_ring
->rx_stats
.packets
+= total_packets
;
4751 rx_ring
->rx_stats
.bytes
+= total_bytes
;
4752 adapter
->net_stats
.rx_bytes
+= total_bytes
;
4753 adapter
->net_stats
.rx_packets
+= total_packets
;
4758 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4759 * @adapter: address of board private structure
4761 static void igb_alloc_rx_buffers_adv(struct igb_ring
*rx_ring
,
4764 struct igb_adapter
*adapter
= rx_ring
->adapter
;
4765 struct net_device
*netdev
= adapter
->netdev
;
4766 struct pci_dev
*pdev
= adapter
->pdev
;
4767 union e1000_adv_rx_desc
*rx_desc
;
4768 struct igb_buffer
*buffer_info
;
4769 struct sk_buff
*skb
;
4773 i
= rx_ring
->next_to_use
;
4774 buffer_info
= &rx_ring
->buffer_info
[i
];
4776 if (adapter
->rx_ps_hdr_size
)
4777 bufsz
= adapter
->rx_ps_hdr_size
;
4779 bufsz
= adapter
->rx_buffer_len
;
4781 while (cleaned_count
--) {
4782 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
4784 if (adapter
->rx_ps_hdr_size
&& !buffer_info
->page_dma
) {
4785 if (!buffer_info
->page
) {
4786 buffer_info
->page
= alloc_page(GFP_ATOMIC
);
4787 if (!buffer_info
->page
) {
4788 adapter
->alloc_rx_buff_failed
++;
4791 buffer_info
->page_offset
= 0;
4793 buffer_info
->page_offset
^= PAGE_SIZE
/ 2;
4795 buffer_info
->page_dma
=
4796 pci_map_page(pdev
, buffer_info
->page
,
4797 buffer_info
->page_offset
,
4799 PCI_DMA_FROMDEVICE
);
4802 if (!buffer_info
->skb
) {
4803 skb
= netdev_alloc_skb(netdev
, bufsz
+ NET_IP_ALIGN
);
4805 adapter
->alloc_rx_buff_failed
++;
4809 /* Make buffer alignment 2 beyond a 16 byte boundary
4810 * this will result in a 16 byte aligned IP header after
4811 * the 14 byte MAC header is removed
4813 skb_reserve(skb
, NET_IP_ALIGN
);
4815 buffer_info
->skb
= skb
;
4816 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
4818 PCI_DMA_FROMDEVICE
);
4820 /* Refresh the desc even if buffer_addrs didn't change because
4821 * each write-back erases this info. */
4822 if (adapter
->rx_ps_hdr_size
) {
4823 rx_desc
->read
.pkt_addr
=
4824 cpu_to_le64(buffer_info
->page_dma
);
4825 rx_desc
->read
.hdr_addr
= cpu_to_le64(buffer_info
->dma
);
4827 rx_desc
->read
.pkt_addr
=
4828 cpu_to_le64(buffer_info
->dma
);
4829 rx_desc
->read
.hdr_addr
= 0;
4833 if (i
== rx_ring
->count
)
4835 buffer_info
= &rx_ring
->buffer_info
[i
];
4839 if (rx_ring
->next_to_use
!= i
) {
4840 rx_ring
->next_to_use
= i
;
4842 i
= (rx_ring
->count
- 1);
4846 /* Force memory writes to complete before letting h/w
4847 * know there are new descriptors to fetch. (Only
4848 * applicable for weak-ordered memory model archs,
4849 * such as IA-64). */
4851 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
4861 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
4863 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4864 struct mii_ioctl_data
*data
= if_mii(ifr
);
4866 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
4871 data
->phy_id
= adapter
->hw
.phy
.addr
;
4874 if (!capable(CAP_NET_ADMIN
))
4876 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
4888 * igb_hwtstamp_ioctl - control hardware time stamping
4893 * Outgoing time stamping can be enabled and disabled. Play nice and
4894 * disable it when requested, although it shouldn't case any overhead
4895 * when no packet needs it. At most one packet in the queue may be
4896 * marked for time stamping, otherwise it would be impossible to tell
4897 * for sure to which packet the hardware time stamp belongs.
4899 * Incoming time stamping has to be configured via the hardware
4900 * filters. Not all combinations are supported, in particular event
4901 * type has to be specified. Matching the kind of event packet is
4902 * not supported, with the exception of "all V2 events regardless of
4906 static int igb_hwtstamp_ioctl(struct net_device
*netdev
,
4907 struct ifreq
*ifr
, int cmd
)
4909 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4910 struct e1000_hw
*hw
= &adapter
->hw
;
4911 struct hwtstamp_config config
;
4912 u32 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4913 u32 tsync_rx_ctl_bit
= E1000_TSYNCRXCTL_ENABLED
;
4914 u32 tsync_rx_ctl_type
= 0;
4915 u32 tsync_rx_cfg
= 0;
4918 short port
= 319; /* PTP */
4921 if (copy_from_user(&config
, ifr
->ifr_data
, sizeof(config
)))
4924 /* reserved for future extensions */
4928 switch (config
.tx_type
) {
4929 case HWTSTAMP_TX_OFF
:
4930 tsync_tx_ctl_bit
= 0;
4932 case HWTSTAMP_TX_ON
:
4933 tsync_tx_ctl_bit
= E1000_TSYNCTXCTL_ENABLED
;
4939 switch (config
.rx_filter
) {
4940 case HWTSTAMP_FILTER_NONE
:
4941 tsync_rx_ctl_bit
= 0;
4943 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT
:
4944 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
4945 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
4946 case HWTSTAMP_FILTER_ALL
:
4948 * register TSYNCRXCFG must be set, therefore it is not
4949 * possible to time stamp both Sync and Delay_Req messages
4950 * => fall back to time stamping all packets
4952 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_ALL
;
4953 config
.rx_filter
= HWTSTAMP_FILTER_ALL
;
4955 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC
:
4956 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4957 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE
;
4960 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
:
4961 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L4_V1
;
4962 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE
;
4965 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
4966 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
4967 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4968 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE
;
4971 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4973 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
4974 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
:
4975 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
4976 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE
;
4979 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
4981 case HWTSTAMP_FILTER_PTP_V2_EVENT
:
4982 case HWTSTAMP_FILTER_PTP_V2_SYNC
:
4983 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
4984 tsync_rx_ctl_type
= E1000_TSYNCRXCTL_TYPE_EVENT_V2
;
4985 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_EVENT
;
4992 /* enable/disable TX */
4993 regval
= rd32(E1000_TSYNCTXCTL
);
4994 regval
= (regval
& ~E1000_TSYNCTXCTL_ENABLED
) | tsync_tx_ctl_bit
;
4995 wr32(E1000_TSYNCTXCTL
, regval
);
4997 /* enable/disable RX, define which PTP packets are time stamped */
4998 regval
= rd32(E1000_TSYNCRXCTL
);
4999 regval
= (regval
& ~E1000_TSYNCRXCTL_ENABLED
) | tsync_rx_ctl_bit
;
5000 regval
= (regval
& ~0xE) | tsync_rx_ctl_type
;
5001 wr32(E1000_TSYNCRXCTL
, regval
);
5002 wr32(E1000_TSYNCRXCFG
, tsync_rx_cfg
);
5005 * Ethertype Filter Queue Filter[0][15:0] = 0x88F7
5006 * (Ethertype to filter on)
5007 * Ethertype Filter Queue Filter[0][26] = 0x1 (Enable filter)
5008 * Ethertype Filter Queue Filter[0][30] = 0x1 (Enable Timestamping)
5010 wr32(E1000_ETQF0
, is_l2
? 0x440088f7 : 0);
5012 /* L4 Queue Filter[0]: only filter by source and destination port */
5013 wr32(E1000_SPQF0
, htons(port
));
5014 wr32(E1000_IMIREXT(0), is_l4
?
5015 ((1<<12) | (1<<19) /* bypass size and control flags */) : 0);
5016 wr32(E1000_IMIR(0), is_l4
?
5018 | (0<<16) /* immediate interrupt disabled */
5019 | 0 /* (1<<17) bit cleared: do not bypass
5020 destination port check */)
5022 wr32(E1000_FTQF0
, is_l4
?
5024 | (1<<15) /* VF not compared */
5025 | (1<<27) /* Enable Timestamping */
5026 | (7<<28) /* only source port filter enabled,
5027 source/target address and protocol
5029 : ((1<<15) | (15<<28) /* all mask bits set = filter not
5034 adapter
->hwtstamp_config
= config
;
5036 /* clear TX/RX time stamp registers, just to be sure */
5037 regval
= rd32(E1000_TXSTMPH
);
5038 regval
= rd32(E1000_RXSTMPH
);
5040 return copy_to_user(ifr
->ifr_data
, &config
, sizeof(config
)) ?
5050 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
5056 return igb_mii_ioctl(netdev
, ifr
, cmd
);
5058 return igb_hwtstamp_ioctl(netdev
, ifr
, cmd
);
5064 s32
igb_read_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
5066 struct igb_adapter
*adapter
= hw
->back
;
5069 cap_offset
= pci_find_capability(adapter
->pdev
, PCI_CAP_ID_EXP
);
5071 return -E1000_ERR_CONFIG
;
5073 pci_read_config_word(adapter
->pdev
, cap_offset
+ reg
, value
);
5078 s32
igb_write_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
5080 struct igb_adapter
*adapter
= hw
->back
;
5083 cap_offset
= pci_find_capability(adapter
->pdev
, PCI_CAP_ID_EXP
);
5085 return -E1000_ERR_CONFIG
;
5087 pci_write_config_word(adapter
->pdev
, cap_offset
+ reg
, *value
);
5092 static void igb_vlan_rx_register(struct net_device
*netdev
,
5093 struct vlan_group
*grp
)
5095 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5096 struct e1000_hw
*hw
= &adapter
->hw
;
5099 igb_irq_disable(adapter
);
5100 adapter
->vlgrp
= grp
;
5103 /* enable VLAN tag insert/strip */
5104 ctrl
= rd32(E1000_CTRL
);
5105 ctrl
|= E1000_CTRL_VME
;
5106 wr32(E1000_CTRL
, ctrl
);
5108 /* enable VLAN receive filtering */
5109 rctl
= rd32(E1000_RCTL
);
5110 rctl
&= ~E1000_RCTL_CFIEN
;
5111 wr32(E1000_RCTL
, rctl
);
5112 igb_update_mng_vlan(adapter
);
5114 /* disable VLAN tag insert/strip */
5115 ctrl
= rd32(E1000_CTRL
);
5116 ctrl
&= ~E1000_CTRL_VME
;
5117 wr32(E1000_CTRL
, ctrl
);
5119 if (adapter
->mng_vlan_id
!= (u16
)IGB_MNG_VLAN_NONE
) {
5120 igb_vlan_rx_kill_vid(netdev
, adapter
->mng_vlan_id
);
5121 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
5125 igb_rlpml_set(adapter
);
5127 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5128 igb_irq_enable(adapter
);
5131 static void igb_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
5133 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5134 struct e1000_hw
*hw
= &adapter
->hw
;
5135 int pf_id
= adapter
->vfs_allocated_count
;
5137 if ((hw
->mng_cookie
.status
&
5138 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
5139 (vid
== adapter
->mng_vlan_id
))
5142 /* add vid to vlvf if sr-iov is enabled,
5143 * if that fails add directly to filter table */
5144 if (igb_vlvf_set(adapter
, vid
, true, pf_id
))
5145 igb_vfta_set(hw
, vid
, true);
5149 static void igb_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
5151 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5152 struct e1000_hw
*hw
= &adapter
->hw
;
5153 int pf_id
= adapter
->vfs_allocated_count
;
5155 igb_irq_disable(adapter
);
5156 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
5158 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5159 igb_irq_enable(adapter
);
5161 if ((adapter
->hw
.mng_cookie
.status
&
5162 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
5163 (vid
== adapter
->mng_vlan_id
)) {
5164 /* release control to f/w */
5165 igb_release_hw_control(adapter
);
5169 /* remove vid from vlvf if sr-iov is enabled,
5170 * if not in vlvf remove from vfta */
5171 if (igb_vlvf_set(adapter
, vid
, false, pf_id
))
5172 igb_vfta_set(hw
, vid
, false);
5175 static void igb_restore_vlan(struct igb_adapter
*adapter
)
5177 igb_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
5179 if (adapter
->vlgrp
) {
5181 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
5182 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
5184 igb_vlan_rx_add_vid(adapter
->netdev
, vid
);
5189 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u16 spddplx
)
5191 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
5196 case SPEED_10
+ DUPLEX_HALF
:
5197 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
5199 case SPEED_10
+ DUPLEX_FULL
:
5200 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
5202 case SPEED_100
+ DUPLEX_HALF
:
5203 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
5205 case SPEED_100
+ DUPLEX_FULL
:
5206 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
5208 case SPEED_1000
+ DUPLEX_FULL
:
5210 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
5212 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
5214 dev_err(&adapter
->pdev
->dev
,
5215 "Unsupported Speed/Duplex configuration\n");
5221 static int __igb_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
5223 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5224 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5225 struct e1000_hw
*hw
= &adapter
->hw
;
5226 u32 ctrl
, rctl
, status
;
5227 u32 wufc
= adapter
->wol
;
5232 netif_device_detach(netdev
);
5234 if (netif_running(netdev
))
5237 igb_reset_interrupt_capability(adapter
);
5239 igb_free_queues(adapter
);
5242 retval
= pci_save_state(pdev
);
5247 status
= rd32(E1000_STATUS
);
5248 if (status
& E1000_STATUS_LU
)
5249 wufc
&= ~E1000_WUFC_LNKC
;
5252 igb_setup_rctl(adapter
);
5253 igb_set_rx_mode(netdev
);
5255 /* turn on all-multi mode if wake on multicast is enabled */
5256 if (wufc
& E1000_WUFC_MC
) {
5257 rctl
= rd32(E1000_RCTL
);
5258 rctl
|= E1000_RCTL_MPE
;
5259 wr32(E1000_RCTL
, rctl
);
5262 ctrl
= rd32(E1000_CTRL
);
5263 /* advertise wake from D3Cold */
5264 #define E1000_CTRL_ADVD3WUC 0x00100000
5265 /* phy power management enable */
5266 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5267 ctrl
|= E1000_CTRL_ADVD3WUC
;
5268 wr32(E1000_CTRL
, ctrl
);
5270 /* Allow time for pending master requests to run */
5271 igb_disable_pcie_master(&adapter
->hw
);
5273 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
5274 wr32(E1000_WUFC
, wufc
);
5277 wr32(E1000_WUFC
, 0);
5280 *enable_wake
= wufc
|| adapter
->en_mng_pt
;
5282 igb_shutdown_fiber_serdes_link_82575(hw
);
5284 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5285 * would have already happened in close and is redundant. */
5286 igb_release_hw_control(adapter
);
5288 pci_disable_device(pdev
);
5294 static int igb_suspend(struct pci_dev
*pdev
, pm_message_t state
)
5299 retval
= __igb_shutdown(pdev
, &wake
);
5304 pci_prepare_to_sleep(pdev
);
5306 pci_wake_from_d3(pdev
, false);
5307 pci_set_power_state(pdev
, PCI_D3hot
);
5313 static int igb_resume(struct pci_dev
*pdev
)
5315 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5316 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5317 struct e1000_hw
*hw
= &adapter
->hw
;
5320 pci_set_power_state(pdev
, PCI_D0
);
5321 pci_restore_state(pdev
);
5323 err
= pci_enable_device_mem(pdev
);
5326 "igb: Cannot enable PCI device from suspend\n");
5329 pci_set_master(pdev
);
5331 pci_enable_wake(pdev
, PCI_D3hot
, 0);
5332 pci_enable_wake(pdev
, PCI_D3cold
, 0);
5334 igb_set_interrupt_capability(adapter
);
5336 if (igb_alloc_queues(adapter
)) {
5337 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
5341 /* e1000_power_up_phy(adapter); */
5345 /* let the f/w know that the h/w is now under the control of the
5347 igb_get_hw_control(adapter
);
5349 wr32(E1000_WUS
, ~0);
5351 if (netif_running(netdev
)) {
5352 err
= igb_open(netdev
);
5357 netif_device_attach(netdev
);
5363 static void igb_shutdown(struct pci_dev
*pdev
)
5367 __igb_shutdown(pdev
, &wake
);
5369 if (system_state
== SYSTEM_POWER_OFF
) {
5370 pci_wake_from_d3(pdev
, wake
);
5371 pci_set_power_state(pdev
, PCI_D3hot
);
5375 #ifdef CONFIG_NET_POLL_CONTROLLER
5377 * Polling 'interrupt' - used by things like netconsole to send skbs
5378 * without having to re-enable interrupts. It's not called while
5379 * the interrupt routine is executing.
5381 static void igb_netpoll(struct net_device
*netdev
)
5383 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5384 struct e1000_hw
*hw
= &adapter
->hw
;
5387 if (!adapter
->msix_entries
) {
5388 igb_irq_disable(adapter
);
5389 napi_schedule(&adapter
->rx_ring
[0].napi
);
5393 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5394 struct igb_ring
*tx_ring
= &adapter
->tx_ring
[i
];
5395 wr32(E1000_EIMC
, tx_ring
->eims_value
);
5396 igb_clean_tx_irq(tx_ring
);
5397 wr32(E1000_EIMS
, tx_ring
->eims_value
);
5400 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5401 struct igb_ring
*rx_ring
= &adapter
->rx_ring
[i
];
5402 wr32(E1000_EIMC
, rx_ring
->eims_value
);
5403 napi_schedule(&rx_ring
->napi
);
5406 #endif /* CONFIG_NET_POLL_CONTROLLER */
5409 * igb_io_error_detected - called when PCI error is detected
5410 * @pdev: Pointer to PCI device
5411 * @state: The current pci connection state
5413 * This function is called after a PCI bus error affecting
5414 * this device has been detected.
5416 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
5417 pci_channel_state_t state
)
5419 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5420 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5422 netif_device_detach(netdev
);
5424 if (state
== pci_channel_io_perm_failure
)
5425 return PCI_ERS_RESULT_DISCONNECT
;
5427 if (netif_running(netdev
))
5429 pci_disable_device(pdev
);
5431 /* Request a slot slot reset. */
5432 return PCI_ERS_RESULT_NEED_RESET
;
5436 * igb_io_slot_reset - called after the pci bus has been reset.
5437 * @pdev: Pointer to PCI device
5439 * Restart the card from scratch, as if from a cold-boot. Implementation
5440 * resembles the first-half of the igb_resume routine.
5442 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
5444 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5445 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5446 struct e1000_hw
*hw
= &adapter
->hw
;
5447 pci_ers_result_t result
;
5450 if (pci_enable_device_mem(pdev
)) {
5452 "Cannot re-enable PCI device after reset.\n");
5453 result
= PCI_ERS_RESULT_DISCONNECT
;
5455 pci_set_master(pdev
);
5456 pci_restore_state(pdev
);
5458 pci_enable_wake(pdev
, PCI_D3hot
, 0);
5459 pci_enable_wake(pdev
, PCI_D3cold
, 0);
5462 wr32(E1000_WUS
, ~0);
5463 result
= PCI_ERS_RESULT_RECOVERED
;
5466 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
5468 dev_err(&pdev
->dev
, "pci_cleanup_aer_uncorrect_error_status "
5469 "failed 0x%0x\n", err
);
5470 /* non-fatal, continue */
5477 * igb_io_resume - called when traffic can start flowing again.
5478 * @pdev: Pointer to PCI device
5480 * This callback is called when the error recovery driver tells us that
5481 * its OK to resume normal operation. Implementation resembles the
5482 * second-half of the igb_resume routine.
5484 static void igb_io_resume(struct pci_dev
*pdev
)
5486 struct net_device
*netdev
= pci_get_drvdata(pdev
);
5487 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5489 if (netif_running(netdev
)) {
5490 if (igb_up(adapter
)) {
5491 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
5496 netif_device_attach(netdev
);
5498 /* let the f/w know that the h/w is now under the control of the
5500 igb_get_hw_control(adapter
);
5503 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
5504 int vf
, unsigned char *mac_addr
)
5506 struct e1000_hw
*hw
= &adapter
->hw
;
5507 /* VF MAC addresses start at end of receive addresses and moves
5508 * torwards the first, as a result a collision should not be possible */
5509 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
5511 memcpy(adapter
->vf_data
[vf
].vf_mac_addresses
, mac_addr
, ETH_ALEN
);
5513 igb_rar_set(hw
, mac_addr
, rar_entry
);
5514 igb_set_rah_pool(hw
, vf
, rar_entry
);
5519 static void igb_vmm_control(struct igb_adapter
*adapter
)
5521 struct e1000_hw
*hw
= &adapter
->hw
;
5524 if (!adapter
->vfs_allocated_count
)
5527 /* VF's need PF reset indication before they
5528 * can send/receive mail */
5529 reg_data
= rd32(E1000_CTRL_EXT
);
5530 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
5531 wr32(E1000_CTRL_EXT
, reg_data
);
5533 igb_vmdq_set_loopback_pf(hw
, true);
5534 igb_vmdq_set_replication_pf(hw
, true);