1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
37 #include <linux/tcp.h>
38 #include <linux/ipv6.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ethtool.h>
42 #include <linux/if_vlan.h>
45 #include "ixgbe_common.h"
47 char ixgbe_driver_name
[] = "ixgbe";
48 static const char ixgbe_driver_string
[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
51 #define DRV_VERSION "1.3.18-k4"
52 const char ixgbe_driver_version
[] = DRV_VERSION
;
53 static const char ixgbe_copyright
[] =
54 "Copyright (c) 1999-2007 Intel Corporation.";
56 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
57 [board_82598
] = &ixgbe_82598_info
,
60 /* ixgbe_pci_tbl - PCI Device ID Table
62 * Wildcard entries (PCI_ANY_ID) should come last
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static struct pci_device_id ixgbe_pci_tbl
[] = {
69 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
71 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
73 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
75 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
78 /* required last entry */
81 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
83 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
84 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
86 static struct notifier_block dca_notifier
= {
87 .notifier_call
= ixgbe_notify_dca
,
93 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
94 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
95 MODULE_LICENSE("GPL");
96 MODULE_VERSION(DRV_VERSION
);
98 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
100 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
104 /* Let firmware take over control of h/w */
105 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
106 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
107 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
110 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
114 /* Let firmware know the driver has taken over */
115 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
116 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
117 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
122 * ixgbe_get_hw_dev_name - return device name string
123 * used by hardware layer to print debugging information
125 char *ixgbe_get_hw_dev_name(struct ixgbe_hw
*hw
)
127 struct ixgbe_adapter
*adapter
= hw
->back
;
128 struct net_device
*netdev
= adapter
->netdev
;
133 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, u16 int_alloc_entry
,
138 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
139 index
= (int_alloc_entry
>> 2) & 0x1F;
140 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR(index
));
141 ivar
&= ~(0xFF << (8 * (int_alloc_entry
& 0x3)));
142 ivar
|= (msix_vector
<< (8 * (int_alloc_entry
& 0x3)));
143 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR(index
), ivar
);
146 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
147 struct ixgbe_tx_buffer
150 if (tx_buffer_info
->dma
) {
151 pci_unmap_page(adapter
->pdev
, tx_buffer_info
->dma
,
152 tx_buffer_info
->length
, PCI_DMA_TODEVICE
);
153 tx_buffer_info
->dma
= 0;
155 if (tx_buffer_info
->skb
) {
156 dev_kfree_skb_any(tx_buffer_info
->skb
);
157 tx_buffer_info
->skb
= NULL
;
159 /* tx_buffer_info must be completely set up in the transmit path */
162 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
163 struct ixgbe_ring
*tx_ring
,
166 struct ixgbe_hw
*hw
= &adapter
->hw
;
169 /* Detect a transmit hang in hardware, this serializes the
170 * check with the clearing of time_stamp and movement of eop */
171 head
= IXGBE_READ_REG(hw
, tx_ring
->head
);
172 tail
= IXGBE_READ_REG(hw
, tx_ring
->tail
);
173 adapter
->detect_tx_hung
= false;
174 if ((head
!= tail
) &&
175 tx_ring
->tx_buffer_info
[eop
].time_stamp
&&
176 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
177 !(IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & IXGBE_TFCS_TXOFF
)) {
178 /* detected Tx unit hang */
179 union ixgbe_adv_tx_desc
*tx_desc
;
180 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
181 DPRINTK(DRV
, ERR
, "Detected Tx Unit Hang\n"
183 " TDH, TDT <%x>, <%x>\n"
184 " next_to_use <%x>\n"
185 " next_to_clean <%x>\n"
186 "tx_buffer_info[next_to_clean]\n"
187 " time_stamp <%lx>\n"
189 tx_ring
->queue_index
,
191 tx_ring
->next_to_use
, eop
,
192 tx_ring
->tx_buffer_info
[eop
].time_stamp
, jiffies
);
199 #define IXGBE_MAX_TXD_PWR 14
200 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
202 /* Tx Descriptors needed, worst case */
203 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
204 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
205 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
206 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
208 #define GET_TX_HEAD_FROM_RING(ring) (\
210 ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
211 static void ixgbe_tx_timeout(struct net_device
*netdev
);
214 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
215 * @adapter: board private structure
216 * @tx_ring: tx ring to clean
218 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter
*adapter
,
219 struct ixgbe_ring
*tx_ring
)
221 union ixgbe_adv_tx_desc
*tx_desc
;
222 struct ixgbe_tx_buffer
*tx_buffer_info
;
223 struct net_device
*netdev
= adapter
->netdev
;
227 unsigned int count
= 0;
228 unsigned int total_bytes
= 0, total_packets
= 0;
231 head
= GET_TX_HEAD_FROM_RING(tx_ring
);
232 head
= le32_to_cpu(head
);
233 i
= tx_ring
->next_to_clean
;
236 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
237 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
238 skb
= tx_buffer_info
->skb
;
241 unsigned int segs
, bytecount
;
243 /* gso_segs is currently only valid for tcp */
244 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
245 /* multiply data chunks by size of headers */
246 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
248 total_packets
+= segs
;
249 total_bytes
+= bytecount
;
252 ixgbe_unmap_and_free_tx_resource(adapter
,
256 if (i
== tx_ring
->count
)
260 if (count
== tx_ring
->count
)
265 head
= GET_TX_HEAD_FROM_RING(tx_ring
);
266 head
= le32_to_cpu(head
);
272 tx_ring
->next_to_clean
= i
;
274 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
275 if (unlikely(count
&& netif_carrier_ok(netdev
) &&
276 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
277 /* Make sure that anybody stopping the queue after this
278 * sees the new next_to_clean.
281 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
282 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
283 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
284 ++adapter
->restart_queue
;
288 if (adapter
->detect_tx_hung
) {
289 if (ixgbe_check_tx_hang(adapter
, tx_ring
, i
)) {
290 /* schedule immediate reset if we believe we hung */
292 "tx hang %d detected, resetting adapter\n",
293 adapter
->tx_timeout_count
+ 1);
294 ixgbe_tx_timeout(adapter
->netdev
);
298 /* re-arm the interrupt */
299 if ((total_packets
>= tx_ring
->work_limit
) ||
300 (count
== tx_ring
->count
))
301 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, tx_ring
->v_idx
);
303 tx_ring
->total_bytes
+= total_bytes
;
304 tx_ring
->total_packets
+= total_packets
;
305 tx_ring
->stats
.bytes
+= total_bytes
;
306 tx_ring
->stats
.packets
+= total_packets
;
307 adapter
->net_stats
.tx_bytes
+= total_bytes
;
308 adapter
->net_stats
.tx_packets
+= total_packets
;
309 return (total_packets
? true : false);
312 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
313 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
314 struct ixgbe_ring
*rx_ring
)
318 int q
= rx_ring
- adapter
->rx_ring
;
320 if (rx_ring
->cpu
!= cpu
) {
321 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
322 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
323 rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
324 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
325 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
326 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
332 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
333 struct ixgbe_ring
*tx_ring
)
337 int q
= tx_ring
- adapter
->tx_ring
;
339 if (tx_ring
->cpu
!= cpu
) {
340 txctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
));
341 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
342 txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
343 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
344 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
350 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
354 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
357 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
358 adapter
->tx_ring
[i
].cpu
= -1;
359 ixgbe_update_tx_dca(adapter
, &adapter
->tx_ring
[i
]);
361 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
362 adapter
->rx_ring
[i
].cpu
= -1;
363 ixgbe_update_rx_dca(adapter
, &adapter
->rx_ring
[i
]);
367 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
369 struct net_device
*netdev
= dev_get_drvdata(dev
);
370 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
371 unsigned long event
= *(unsigned long *)data
;
374 case DCA_PROVIDER_ADD
:
375 /* if we're already enabled, don't do it again */
376 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
378 /* Always use CB2 mode, difference is masked
379 * in the CB driver. */
380 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
381 if (dca_add_requester(dev
) == 0) {
382 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
383 ixgbe_setup_dca(adapter
);
386 /* Fall Through since DCA is disabled. */
387 case DCA_PROVIDER_REMOVE
:
388 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
389 dca_remove_requester(dev
);
390 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
391 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
399 #endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
401 * ixgbe_receive_skb - Send a completed packet up the stack
402 * @adapter: board private structure
403 * @skb: packet to send up
404 * @status: hardware indication of status of receive
405 * @rx_ring: rx descriptor ring (for a specific queue) to setup
406 * @rx_desc: rx descriptor
408 static void ixgbe_receive_skb(struct ixgbe_adapter
*adapter
,
409 struct sk_buff
*skb
, u8 status
,
410 struct ixgbe_ring
*ring
,
411 union ixgbe_adv_rx_desc
*rx_desc
)
413 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
414 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
416 if (adapter
->netdev
->features
& NETIF_F_LRO
&&
417 skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
418 if (adapter
->vlgrp
&& is_vlan
)
419 lro_vlan_hwaccel_receive_skb(&ring
->lro_mgr
, skb
,
423 lro_receive_skb(&ring
->lro_mgr
, skb
, rx_desc
);
424 ring
->lro_used
= true;
426 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
)) {
427 if (adapter
->vlgrp
&& is_vlan
)
428 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
, tag
);
430 netif_receive_skb(skb
);
432 if (adapter
->vlgrp
&& is_vlan
)
433 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, tag
);
441 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
442 * @adapter: address of board private structure
443 * @status_err: hardware indication of status of receive
444 * @skb: skb currently being received and modified
446 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
447 u32 status_err
, struct sk_buff
*skb
)
449 skb
->ip_summed
= CHECKSUM_NONE
;
451 /* Rx csum disabled */
452 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
455 /* if IP and error */
456 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
457 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
458 adapter
->hw_csum_rx_error
++;
462 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
465 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
466 adapter
->hw_csum_rx_error
++;
470 /* It must be a TCP or UDP packet with a valid checksum */
471 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
472 adapter
->hw_csum_rx_good
++;
476 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
477 * @adapter: address of board private structure
479 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
480 struct ixgbe_ring
*rx_ring
,
483 struct net_device
*netdev
= adapter
->netdev
;
484 struct pci_dev
*pdev
= adapter
->pdev
;
485 union ixgbe_adv_rx_desc
*rx_desc
;
486 struct ixgbe_rx_buffer
*bi
;
488 unsigned int bufsz
= rx_ring
->rx_buf_len
+ NET_IP_ALIGN
;
490 i
= rx_ring
->next_to_use
;
491 bi
= &rx_ring
->rx_buffer_info
[i
];
493 while (cleaned_count
--) {
494 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
497 (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)) {
498 bi
->page
= alloc_page(GFP_ATOMIC
);
500 adapter
->alloc_rx_page_failed
++;
503 bi
->page_dma
= pci_map_page(pdev
, bi
->page
, 0,
509 struct sk_buff
*skb
= netdev_alloc_skb(netdev
, bufsz
);
512 adapter
->alloc_rx_buff_failed
++;
517 * Make buffer alignment 2 beyond a 16 byte boundary
518 * this will result in a 16 byte aligned IP header after
519 * the 14 byte MAC header is removed
521 skb_reserve(skb
, NET_IP_ALIGN
);
524 bi
->dma
= pci_map_single(pdev
, skb
->data
, bufsz
,
527 /* Refresh the desc even if buffer_addrs didn't change because
528 * each write-back erases this info. */
529 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
530 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
531 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
533 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
537 if (i
== rx_ring
->count
)
539 bi
= &rx_ring
->rx_buffer_info
[i
];
543 if (rx_ring
->next_to_use
!= i
) {
544 rx_ring
->next_to_use
= i
;
546 i
= (rx_ring
->count
- 1);
549 * Force memory writes to complete before letting h/w
550 * know there are new descriptors to fetch. (Only
551 * applicable for weak-ordered memory model archs,
555 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
559 static inline u16
ixgbe_get_hdr_info(union ixgbe_adv_rx_desc
*rx_desc
)
561 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
564 static inline u16
ixgbe_get_pkt_info(union ixgbe_adv_rx_desc
*rx_desc
)
566 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
569 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter
*adapter
,
570 struct ixgbe_ring
*rx_ring
,
571 int *work_done
, int work_to_do
)
573 struct net_device
*netdev
= adapter
->netdev
;
574 struct pci_dev
*pdev
= adapter
->pdev
;
575 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
576 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
581 bool cleaned
= false;
582 int cleaned_count
= 0;
583 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
585 i
= rx_ring
->next_to_clean
;
586 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
587 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
588 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
590 while (staterr
& IXGBE_RXD_STAT_DD
) {
592 if (*work_done
>= work_to_do
)
596 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
597 hdr_info
= le16_to_cpu(ixgbe_get_hdr_info(rx_desc
));
598 len
= (hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
599 IXGBE_RXDADV_HDRBUFLEN_SHIFT
;
600 if (hdr_info
& IXGBE_RXDADV_SPH
)
601 adapter
->rx_hdr_split
++;
602 if (len
> IXGBE_RX_HDR_SIZE
)
603 len
= IXGBE_RX_HDR_SIZE
;
604 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
606 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
610 skb
= rx_buffer_info
->skb
;
611 prefetch(skb
->data
- NET_IP_ALIGN
);
612 rx_buffer_info
->skb
= NULL
;
614 if (len
&& !skb_shinfo(skb
)->nr_frags
) {
615 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
616 rx_ring
->rx_buf_len
+ NET_IP_ALIGN
,
622 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
,
623 PAGE_SIZE
, PCI_DMA_FROMDEVICE
);
624 rx_buffer_info
->page_dma
= 0;
625 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
626 rx_buffer_info
->page
, 0, upper_len
);
627 rx_buffer_info
->page
= NULL
;
629 skb
->len
+= upper_len
;
630 skb
->data_len
+= upper_len
;
631 skb
->truesize
+= upper_len
;
635 if (i
== rx_ring
->count
)
637 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
639 next_rxd
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
643 if (staterr
& IXGBE_RXD_STAT_EOP
) {
644 rx_ring
->stats
.packets
++;
645 rx_ring
->stats
.bytes
+= skb
->len
;
647 rx_buffer_info
->skb
= next_buffer
->skb
;
648 rx_buffer_info
->dma
= next_buffer
->dma
;
649 next_buffer
->skb
= skb
;
650 adapter
->non_eop_descs
++;
654 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
655 dev_kfree_skb_irq(skb
);
659 ixgbe_rx_checksum(adapter
, staterr
, skb
);
661 /* probably a little skewed due to removing CRC */
662 total_rx_bytes
+= skb
->len
;
665 skb
->protocol
= eth_type_trans(skb
, netdev
);
666 ixgbe_receive_skb(adapter
, skb
, staterr
, rx_ring
, rx_desc
);
667 netdev
->last_rx
= jiffies
;
670 rx_desc
->wb
.upper
.status_error
= 0;
672 /* return some buffers to hardware, one at a time is too slow */
673 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
674 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
678 /* use prefetched values */
680 rx_buffer_info
= next_buffer
;
682 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
685 if (rx_ring
->lro_used
) {
686 lro_flush_all(&rx_ring
->lro_mgr
);
687 rx_ring
->lro_used
= false;
690 rx_ring
->next_to_clean
= i
;
691 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
694 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
696 rx_ring
->total_packets
+= total_rx_packets
;
697 rx_ring
->total_bytes
+= total_rx_bytes
;
698 adapter
->net_stats
.rx_bytes
+= total_rx_bytes
;
699 adapter
->net_stats
.rx_packets
+= total_rx_packets
;
704 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
706 * ixgbe_configure_msix - Configure MSI-X hardware
707 * @adapter: board private structure
709 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
712 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
714 struct ixgbe_q_vector
*q_vector
;
715 int i
, j
, q_vectors
, v_idx
, r_idx
;
718 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
720 /* Populate the IVAR table and set the ITR values to the
721 * corresponding register.
723 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
724 q_vector
= &adapter
->q_vector
[v_idx
];
725 /* XXX for_each_bit(...) */
726 r_idx
= find_first_bit(q_vector
->rxr_idx
,
727 adapter
->num_rx_queues
);
729 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
730 j
= adapter
->rx_ring
[r_idx
].reg_idx
;
731 ixgbe_set_ivar(adapter
, IXGBE_IVAR_RX_QUEUE(j
), v_idx
);
732 r_idx
= find_next_bit(q_vector
->rxr_idx
,
733 adapter
->num_rx_queues
,
736 r_idx
= find_first_bit(q_vector
->txr_idx
,
737 adapter
->num_tx_queues
);
739 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
740 j
= adapter
->tx_ring
[r_idx
].reg_idx
;
741 ixgbe_set_ivar(adapter
, IXGBE_IVAR_TX_QUEUE(j
), v_idx
);
742 r_idx
= find_next_bit(q_vector
->txr_idx
,
743 adapter
->num_tx_queues
,
747 /* if this is a tx only vector use half the irq (tx) rate */
748 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
749 q_vector
->eitr
= adapter
->tx_eitr
;
751 /* rx only or mixed */
752 q_vector
->eitr
= adapter
->rx_eitr
;
754 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
),
755 EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
));
758 ixgbe_set_ivar(adapter
, IXGBE_IVAR_OTHER_CAUSES_INDEX
, v_idx
);
759 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
761 /* set up to autoclear timer, lsc, and the vectors */
762 mask
= IXGBE_EIMS_ENABLE_MASK
;
763 mask
&= ~IXGBE_EIMS_OTHER
;
764 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
771 latency_invalid
= 255
775 * ixgbe_update_itr - update the dynamic ITR value based on statistics
776 * @adapter: pointer to adapter
777 * @eitr: eitr setting (ints per sec) to give last timeslice
778 * @itr_setting: current throttle rate in ints/second
779 * @packets: the number of packets during this measurement interval
780 * @bytes: the number of bytes during this measurement interval
782 * Stores a new ITR value based on packets and byte
783 * counts during the last interrupt. The advantage of per interrupt
784 * computation is faster updates and more accurate ITR for the current
785 * traffic pattern. Constants in this function were computed
786 * based on theoretical maximum wire speed and thresholds were set based
787 * on testing data as well as attempting to minimize response time
788 * while increasing bulk throughput.
789 * this functionality is controlled by the InterruptThrottleRate module
790 * parameter (see ixgbe_param.c)
792 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
793 u32 eitr
, u8 itr_setting
,
794 int packets
, int bytes
)
796 unsigned int retval
= itr_setting
;
801 goto update_itr_done
;
804 /* simple throttlerate management
805 * 0-20MB/s lowest (100000 ints/s)
806 * 20-100MB/s low (20000 ints/s)
807 * 100-1249MB/s bulk (8000 ints/s)
809 /* what was last interrupt timeslice? */
810 timepassed_us
= 1000000/eitr
;
811 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
813 switch (itr_setting
) {
815 if (bytes_perint
> adapter
->eitr_low
)
816 retval
= low_latency
;
819 if (bytes_perint
> adapter
->eitr_high
)
820 retval
= bulk_latency
;
821 else if (bytes_perint
<= adapter
->eitr_low
)
822 retval
= lowest_latency
;
825 if (bytes_perint
<= adapter
->eitr_high
)
826 retval
= low_latency
;
834 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
836 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
837 struct ixgbe_hw
*hw
= &adapter
->hw
;
839 u8 current_itr
, ret_itr
;
840 int i
, r_idx
, v_idx
= ((void *)q_vector
- (void *)(adapter
->q_vector
)) /
841 sizeof(struct ixgbe_q_vector
);
842 struct ixgbe_ring
*rx_ring
, *tx_ring
;
844 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
845 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
846 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
847 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
849 tx_ring
->total_packets
,
850 tx_ring
->total_bytes
);
851 /* if the result for this queue would decrease interrupt
852 * rate for this vector then use that result */
853 q_vector
->tx_eitr
= ((q_vector
->tx_eitr
> ret_itr
) ?
854 q_vector
->tx_eitr
- 1 : ret_itr
);
855 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
859 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
860 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
861 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
862 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
864 rx_ring
->total_packets
,
865 rx_ring
->total_bytes
);
866 /* if the result for this queue would decrease interrupt
867 * rate for this vector then use that result */
868 q_vector
->rx_eitr
= ((q_vector
->rx_eitr
> ret_itr
) ?
869 q_vector
->rx_eitr
- 1 : ret_itr
);
870 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
874 current_itr
= max(q_vector
->rx_eitr
, q_vector
->tx_eitr
);
876 switch (current_itr
) {
877 /* counts and packets in update_itr are dependent on these numbers */
882 new_itr
= 20000; /* aka hwitr = ~200 */
890 if (new_itr
!= q_vector
->eitr
) {
892 /* do an exponential smoothing */
893 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
894 q_vector
->eitr
= new_itr
;
895 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
896 /* must write high and low 16 bits to reset counter */
897 DPRINTK(TX_ERR
, DEBUG
, "writing eitr(%d): %08X\n", v_idx
,
899 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
| (itr_reg
)<<16);
905 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
907 struct net_device
*netdev
= data
;
908 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
909 struct ixgbe_hw
*hw
= &adapter
->hw
;
910 u32 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
912 if (eicr
& IXGBE_EICR_LSC
) {
914 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
915 mod_timer(&adapter
->watchdog_timer
, jiffies
);
918 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
919 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
924 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
926 struct ixgbe_q_vector
*q_vector
= data
;
927 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
928 struct ixgbe_ring
*tx_ring
;
931 if (!q_vector
->txr_count
)
934 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
935 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
936 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
937 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
938 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
939 ixgbe_update_tx_dca(adapter
, tx_ring
);
941 tx_ring
->total_bytes
= 0;
942 tx_ring
->total_packets
= 0;
943 ixgbe_clean_tx_irq(adapter
, tx_ring
);
944 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
952 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
954 * @data: pointer to our q_vector struct for this interrupt vector
956 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
958 struct ixgbe_q_vector
*q_vector
= data
;
959 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
960 struct ixgbe_ring
*rx_ring
;
963 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
964 if (!q_vector
->rxr_count
)
967 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
968 /* disable interrupts on this vector only */
969 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, rx_ring
->v_idx
);
970 rx_ring
->total_bytes
= 0;
971 rx_ring
->total_packets
= 0;
972 netif_rx_schedule(adapter
->netdev
, &q_vector
->napi
);
977 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
979 ixgbe_msix_clean_rx(irq
, data
);
980 ixgbe_msix_clean_tx(irq
, data
);
986 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
987 * @napi: napi struct with our devices info in it
988 * @budget: amount of work driver is allowed to do this pass, in packets
991 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
993 struct ixgbe_q_vector
*q_vector
=
994 container_of(napi
, struct ixgbe_q_vector
, napi
);
995 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
996 struct ixgbe_ring
*rx_ring
;
1000 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1001 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1002 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
1003 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1004 ixgbe_update_rx_dca(adapter
, rx_ring
);
1007 ixgbe_clean_rx_irq(adapter
, rx_ring
, &work_done
, budget
);
1009 /* If all Rx work done, exit the polling mode */
1010 if (work_done
< budget
) {
1011 netif_rx_complete(adapter
->netdev
, napi
);
1012 if (adapter
->rx_eitr
< IXGBE_MIN_ITR_USECS
)
1013 ixgbe_set_itr_msix(q_vector
);
1014 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1015 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, rx_ring
->v_idx
);
1021 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
1024 a
->q_vector
[v_idx
].adapter
= a
;
1025 set_bit(r_idx
, a
->q_vector
[v_idx
].rxr_idx
);
1026 a
->q_vector
[v_idx
].rxr_count
++;
1027 a
->rx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1030 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
1033 a
->q_vector
[v_idx
].adapter
= a
;
1034 set_bit(r_idx
, a
->q_vector
[v_idx
].txr_idx
);
1035 a
->q_vector
[v_idx
].txr_count
++;
1036 a
->tx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1040 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1041 * @adapter: board private structure to initialize
1042 * @vectors: allotted vector count for descriptor rings
1044 * This function maps descriptor rings to the queue-specific vectors
1045 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1046 * one vector per ring/queue, but on a constrained vector budget, we
1047 * group the rings as "efficiently" as possible. You would add new
1048 * mapping configurations in here.
1050 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
1054 int rxr_idx
= 0, txr_idx
= 0;
1055 int rxr_remaining
= adapter
->num_rx_queues
;
1056 int txr_remaining
= adapter
->num_tx_queues
;
1061 /* No mapping required if MSI-X is disabled. */
1062 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1066 * The ideal configuration...
1067 * We have enough vectors to map one per queue.
1069 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
1070 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
1071 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
1073 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
1074 map_vector_to_txq(adapter
, v_start
, txr_idx
);
1080 * If we don't have enough vectors for a 1-to-1
1081 * mapping, we'll have to group them so there are
1082 * multiple queues per vector.
1084 /* Re-adjusting *qpv takes care of the remainder. */
1085 for (i
= v_start
; i
< vectors
; i
++) {
1086 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
1087 for (j
= 0; j
< rqpv
; j
++) {
1088 map_vector_to_rxq(adapter
, i
, rxr_idx
);
1093 for (i
= v_start
; i
< vectors
; i
++) {
1094 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
1095 for (j
= 0; j
< tqpv
; j
++) {
1096 map_vector_to_txq(adapter
, i
, txr_idx
);
1107 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1108 * @adapter: board private structure
1110 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1111 * interrupts from the kernel.
1113 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
1115 struct net_device
*netdev
= adapter
->netdev
;
1116 irqreturn_t (*handler
)(int, void *);
1117 int i
, vector
, q_vectors
, err
;
1119 /* Decrement for Other and TCP Timer vectors */
1120 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1122 /* Map the Tx/Rx rings to the vectors we were allotted. */
1123 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
1127 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1128 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1129 &ixgbe_msix_clean_many)
1130 for (vector
= 0; vector
< q_vectors
; vector
++) {
1131 handler
= SET_HANDLER(&adapter
->q_vector
[vector
]);
1132 sprintf(adapter
->name
[vector
], "%s:v%d-%s",
1133 netdev
->name
, vector
,
1134 (handler
== &ixgbe_msix_clean_rx
) ? "Rx" :
1135 ((handler
== &ixgbe_msix_clean_tx
) ? "Tx" : "TxRx"));
1136 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1137 handler
, 0, adapter
->name
[vector
],
1138 &(adapter
->q_vector
[vector
]));
1141 "request_irq failed for MSIX interrupt "
1142 "Error: %d\n", err
);
1143 goto free_queue_irqs
;
1147 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
1148 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1149 &ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
1152 "request_irq for msix_lsc failed: %d\n", err
);
1153 goto free_queue_irqs
;
1159 for (i
= vector
- 1; i
>= 0; i
--)
1160 free_irq(adapter
->msix_entries
[--vector
].vector
,
1161 &(adapter
->q_vector
[i
]));
1162 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
1163 pci_disable_msix(adapter
->pdev
);
1164 kfree(adapter
->msix_entries
);
1165 adapter
->msix_entries
= NULL
;
1170 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
1172 struct ixgbe_hw
*hw
= &adapter
->hw
;
1173 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
;
1175 u32 new_itr
= q_vector
->eitr
;
1176 struct ixgbe_ring
*rx_ring
= &adapter
->rx_ring
[0];
1177 struct ixgbe_ring
*tx_ring
= &adapter
->tx_ring
[0];
1179 q_vector
->tx_eitr
= ixgbe_update_itr(adapter
, new_itr
,
1181 tx_ring
->total_packets
,
1182 tx_ring
->total_bytes
);
1183 q_vector
->rx_eitr
= ixgbe_update_itr(adapter
, new_itr
,
1185 rx_ring
->total_packets
,
1186 rx_ring
->total_bytes
);
1188 current_itr
= max(q_vector
->rx_eitr
, q_vector
->tx_eitr
);
1190 switch (current_itr
) {
1191 /* counts and packets in update_itr are dependent on these numbers */
1192 case lowest_latency
:
1196 new_itr
= 20000; /* aka hwitr = ~200 */
1205 if (new_itr
!= q_vector
->eitr
) {
1207 /* do an exponential smoothing */
1208 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1209 q_vector
->eitr
= new_itr
;
1210 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
1211 /* must write high and low 16 bits to reset counter */
1212 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0), itr_reg
| (itr_reg
)<<16);
1218 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
);
1221 * ixgbe_intr - legacy mode Interrupt Handler
1222 * @irq: interrupt number
1223 * @data: pointer to a network interface device structure
1224 * @pt_regs: CPU registers structure
1226 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
1228 struct net_device
*netdev
= data
;
1229 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1230 struct ixgbe_hw
*hw
= &adapter
->hw
;
1234 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1235 * therefore no explict interrupt disable is necessary */
1236 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
1238 return IRQ_NONE
; /* Not our interrupt */
1240 if (eicr
& IXGBE_EICR_LSC
) {
1242 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1243 mod_timer(&adapter
->watchdog_timer
, jiffies
);
1247 if (netif_rx_schedule_prep(netdev
, &adapter
->q_vector
[0].napi
)) {
1248 adapter
->tx_ring
[0].total_packets
= 0;
1249 adapter
->tx_ring
[0].total_bytes
= 0;
1250 adapter
->rx_ring
[0].total_packets
= 0;
1251 adapter
->rx_ring
[0].total_bytes
= 0;
1252 /* would disable interrupts here but EIAM disabled it */
1253 __netif_rx_schedule(netdev
, &adapter
->q_vector
[0].napi
);
1259 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
1261 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1263 for (i
= 0; i
< q_vectors
; i
++) {
1264 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
1265 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
1266 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
1267 q_vector
->rxr_count
= 0;
1268 q_vector
->txr_count
= 0;
1273 * ixgbe_request_irq - initialize interrupts
1274 * @adapter: board private structure
1276 * Attempts to configure interrupts using the best available
1277 * capabilities of the hardware and kernel.
1279 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
1281 struct net_device
*netdev
= adapter
->netdev
;
1284 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1285 err
= ixgbe_request_msix_irqs(adapter
);
1286 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
1287 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, 0,
1288 netdev
->name
, netdev
);
1290 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, IRQF_SHARED
,
1291 netdev
->name
, netdev
);
1295 DPRINTK(PROBE
, ERR
, "request_irq failed, Error %d\n", err
);
1300 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
1302 struct net_device
*netdev
= adapter
->netdev
;
1304 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1307 q_vectors
= adapter
->num_msix_vectors
;
1310 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
1313 for (; i
>= 0; i
--) {
1314 free_irq(adapter
->msix_entries
[i
].vector
,
1315 &(adapter
->q_vector
[i
]));
1318 ixgbe_reset_q_vectors(adapter
);
1320 free_irq(adapter
->pdev
->irq
, netdev
);
1325 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1326 * @adapter: board private structure
1328 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
1330 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
1331 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1332 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1334 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
1335 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1337 synchronize_irq(adapter
->pdev
->irq
);
1342 * ixgbe_irq_enable - Enable default interrupt generation settings
1343 * @adapter: board private structure
1345 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
)
1348 mask
= IXGBE_EIMS_ENABLE_MASK
;
1349 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1350 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1354 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1357 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
1359 struct ixgbe_hw
*hw
= &adapter
->hw
;
1361 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
1362 EITR_INTS_PER_SEC_TO_REG(adapter
->rx_eitr
));
1364 ixgbe_set_ivar(adapter
, IXGBE_IVAR_RX_QUEUE(0), 0);
1365 ixgbe_set_ivar(adapter
, IXGBE_IVAR_TX_QUEUE(0), 0);
1367 map_vector_to_rxq(adapter
, 0, 0);
1368 map_vector_to_txq(adapter
, 0, 0);
1370 DPRINTK(HW
, INFO
, "Legacy interrupt IVAR setup done\n");
1374 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1375 * @adapter: board private structure
1377 * Configure the Tx unit of the MAC after a reset.
1379 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
1382 struct ixgbe_hw
*hw
= &adapter
->hw
;
1383 u32 i
, j
, tdlen
, txctrl
;
1385 /* Setup the HW Tx Head and Tail descriptor pointers */
1386 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1387 struct ixgbe_ring
*ring
= &adapter
->tx_ring
[i
];
1390 tdlen
= ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
1391 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(j
),
1392 (tdba
& DMA_32BIT_MASK
));
1393 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(j
), (tdba
>> 32));
1395 (ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
1396 tdwba
|= IXGBE_TDWBAL_HEAD_WB_ENABLE
;
1397 IXGBE_WRITE_REG(hw
, IXGBE_TDWBAL(j
), tdwba
& DMA_32BIT_MASK
);
1398 IXGBE_WRITE_REG(hw
, IXGBE_TDWBAH(j
), (tdwba
>> 32));
1399 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(j
), tdlen
);
1400 IXGBE_WRITE_REG(hw
, IXGBE_TDH(j
), 0);
1401 IXGBE_WRITE_REG(hw
, IXGBE_TDT(j
), 0);
1402 adapter
->tx_ring
[i
].head
= IXGBE_TDH(j
);
1403 adapter
->tx_ring
[i
].tail
= IXGBE_TDT(j
);
1404 /* Disable Tx Head Writeback RO bit, since this hoses
1405 * bookkeeping if things aren't delivered in order.
1407 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(j
));
1408 txctrl
&= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN
;
1409 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(j
), txctrl
);
1413 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1415 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
, int index
)
1417 struct ixgbe_ring
*rx_ring
;
1422 /* program one srrctl register per VMDq index */
1423 if (adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
) {
1425 mask
= (unsigned long) adapter
->ring_feature
[RING_F_RSS
].mask
;
1426 len
= sizeof(adapter
->ring_feature
[RING_F_VMDQ
].mask
) * 8;
1427 shift
= find_first_bit(&mask
, len
);
1428 queue0
= index
& mask
;
1429 index
= (index
& mask
) >> shift
;
1430 /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1432 mask
= (unsigned long) adapter
->ring_feature
[RING_F_RSS
].mask
;
1433 queue0
= index
& mask
;
1434 index
= index
& mask
;
1437 rx_ring
= &adapter
->rx_ring
[queue0
];
1439 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(index
));
1441 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
1442 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
1444 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1445 srrctl
|= IXGBE_RXBUFFER_2048
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1446 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1447 srrctl
|= ((IXGBE_RX_HDR_SIZE
<<
1448 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
1449 IXGBE_SRRCTL_BSIZEHDR_MASK
);
1451 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1453 if (rx_ring
->rx_buf_len
== MAXIMUM_ETHERNET_VLAN_SIZE
)
1454 srrctl
|= IXGBE_RXBUFFER_2048
>>
1455 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1457 srrctl
|= rx_ring
->rx_buf_len
>>
1458 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1460 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(index
), srrctl
);
1464 * ixgbe_get_skb_hdr - helper function for LRO header processing
1465 * @skb: pointer to sk_buff to be added to LRO packet
1466 * @iphdr: pointer to tcp header structure
1467 * @tcph: pointer to tcp header structure
1468 * @hdr_flags: pointer to header flags
1469 * @priv: private data
1471 static int ixgbe_get_skb_hdr(struct sk_buff
*skb
, void **iphdr
, void **tcph
,
1472 u64
*hdr_flags
, void *priv
)
1474 union ixgbe_adv_rx_desc
*rx_desc
= priv
;
1476 /* Verify that this is a valid IPv4 TCP packet */
1477 if (!((ixgbe_get_pkt_info(rx_desc
) & IXGBE_RXDADV_PKTTYPE_IPV4
) &&
1478 (ixgbe_get_pkt_info(rx_desc
) & IXGBE_RXDADV_PKTTYPE_TCP
)))
1481 /* Set network headers */
1482 skb_reset_network_header(skb
);
1483 skb_set_transport_header(skb
, ip_hdrlen(skb
));
1484 *iphdr
= ip_hdr(skb
);
1485 *tcph
= tcp_hdr(skb
);
1486 *hdr_flags
= LRO_IPV4
| LRO_TCP
;
1490 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1491 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1494 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1495 * @adapter: board private structure
1497 * Configure the Rx unit of the MAC after a reset.
1499 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
1502 struct ixgbe_hw
*hw
= &adapter
->hw
;
1503 struct net_device
*netdev
= adapter
->netdev
;
1504 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1506 u32 rdlen
, rxctrl
, rxcsum
;
1507 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1508 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1509 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1516 /* Decide whether to use packet split mode or not */
1517 if (netdev
->mtu
> ETH_DATA_LEN
)
1518 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
1520 adapter
->flags
&= ~IXGBE_FLAG_RX_PS_ENABLED
;
1522 /* Set the RX buffer length according to the mode */
1523 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1524 rx_buf_len
= IXGBE_RX_HDR_SIZE
;
1526 if (netdev
->mtu
<= ETH_DATA_LEN
)
1527 rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1529 rx_buf_len
= ALIGN(max_frame
, 1024);
1532 fctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
1533 fctrl
|= IXGBE_FCTRL_BAM
;
1534 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
1535 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_FCTRL
, fctrl
);
1537 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
1538 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
)
1539 hlreg0
&= ~IXGBE_HLREG0_JUMBOEN
;
1541 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
1542 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
1544 pages
= PAGE_USE_COUNT(adapter
->netdev
->mtu
);
1546 rdlen
= adapter
->rx_ring
[0].count
* sizeof(union ixgbe_adv_rx_desc
);
1547 /* disable receives while setting up the descriptors */
1548 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1549 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
1551 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1552 * the Base and Length of the Rx Descriptor Ring */
1553 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1554 rdba
= adapter
->rx_ring
[i
].dma
;
1555 j
= adapter
->rx_ring
[i
].reg_idx
;
1556 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(j
), (rdba
& DMA_32BIT_MASK
));
1557 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(j
), (rdba
>> 32));
1558 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(j
), rdlen
);
1559 IXGBE_WRITE_REG(hw
, IXGBE_RDH(j
), 0);
1560 IXGBE_WRITE_REG(hw
, IXGBE_RDT(j
), 0);
1561 adapter
->rx_ring
[i
].head
= IXGBE_RDH(j
);
1562 adapter
->rx_ring
[i
].tail
= IXGBE_RDT(j
);
1563 adapter
->rx_ring
[i
].rx_buf_len
= rx_buf_len
;
1564 /* Intitial LRO Settings */
1565 adapter
->rx_ring
[i
].lro_mgr
.max_aggr
= IXGBE_MAX_LRO_AGGREGATE
;
1566 adapter
->rx_ring
[i
].lro_mgr
.max_desc
= IXGBE_MAX_LRO_DESCRIPTORS
;
1567 adapter
->rx_ring
[i
].lro_mgr
.get_skb_header
= ixgbe_get_skb_hdr
;
1568 adapter
->rx_ring
[i
].lro_mgr
.features
= LRO_F_EXTRACT_VLAN_ID
;
1569 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1570 adapter
->rx_ring
[i
].lro_mgr
.features
|= LRO_F_NAPI
;
1571 adapter
->rx_ring
[i
].lro_mgr
.dev
= adapter
->netdev
;
1572 adapter
->rx_ring
[i
].lro_mgr
.ip_summed
= CHECKSUM_UNNECESSARY
;
1573 adapter
->rx_ring
[i
].lro_mgr
.ip_summed_aggr
= CHECKSUM_UNNECESSARY
;
1575 ixgbe_configure_srrctl(adapter
, j
);
1579 * For VMDq support of different descriptor types or
1580 * buffer sizes through the use of multiple SRRCTL
1581 * registers, RDRXCTL.MVMEN must be set to 1
1583 * also, the manual doesn't mention it clearly but DCA hints
1584 * will only use queue 0's tags unless this bit is set. Side
1585 * effects of setting this bit are only that SRRCTL must be
1586 * fully programmed [0..15]
1588 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
1589 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
1590 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
1593 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
1594 /* Fill out redirection table */
1595 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
1596 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
1598 /* reta = 4-byte sliding window of
1599 * 0x00..(indices-1)(indices-1)00..etc. */
1600 reta
= (reta
<< 8) | (j
* 0x11);
1602 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
1605 /* Fill out hash function seeds */
1606 for (i
= 0; i
< 10; i
++)
1607 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
1609 mrqc
= IXGBE_MRQC_RSSEN
1610 /* Perform hash on these packet types */
1611 | IXGBE_MRQC_RSS_FIELD_IPV4
1612 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1613 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1614 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1615 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1616 | IXGBE_MRQC_RSS_FIELD_IPV6
1617 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1618 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1619 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP
;
1620 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
1623 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
1625 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
||
1626 adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
) {
1627 /* Disable indicating checksum in descriptor, enables
1629 rxcsum
|= IXGBE_RXCSUM_PCSD
;
1631 if (!(rxcsum
& IXGBE_RXCSUM_PCSD
)) {
1632 /* Enable IPv4 payload checksum for UDP fragments
1633 * if PCSD is not set */
1634 rxcsum
|= IXGBE_RXCSUM_IPPCSE
;
1637 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
1640 static void ixgbe_vlan_rx_register(struct net_device
*netdev
,
1641 struct vlan_group
*grp
)
1643 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1646 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1647 ixgbe_irq_disable(adapter
);
1648 adapter
->vlgrp
= grp
;
1651 /* enable VLAN tag insert/strip */
1652 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
1653 ctrl
|= IXGBE_VLNCTRL_VME
;
1654 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
1655 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
1658 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1659 ixgbe_irq_enable(adapter
);
1662 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
1664 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1666 /* add VID to filter table */
1667 ixgbe_set_vfta(&adapter
->hw
, vid
, 0, true);
1670 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
1672 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1674 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1675 ixgbe_irq_disable(adapter
);
1677 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
1679 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1680 ixgbe_irq_enable(adapter
);
1682 /* remove VID from filter table */
1683 ixgbe_set_vfta(&adapter
->hw
, vid
, 0, false);
1686 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
1688 ixgbe_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
1690 if (adapter
->vlgrp
) {
1692 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
1693 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
1695 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
1700 static u8
*ixgbe_addr_list_itr(struct ixgbe_hw
*hw
, u8
**mc_addr_ptr
, u32
*vmdq
)
1702 struct dev_mc_list
*mc_ptr
;
1703 u8
*addr
= *mc_addr_ptr
;
1706 mc_ptr
= container_of(addr
, struct dev_mc_list
, dmi_addr
[0]);
1708 *mc_addr_ptr
= mc_ptr
->next
->dmi_addr
;
1710 *mc_addr_ptr
= NULL
;
1716 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1717 * @netdev: network interface device structure
1719 * The set_rx_method entry point is called whenever the unicast/multicast
1720 * address list or the network interface flags are updated. This routine is
1721 * responsible for configuring the hardware for proper unicast, multicast and
1724 static void ixgbe_set_rx_mode(struct net_device
*netdev
)
1726 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1727 struct ixgbe_hw
*hw
= &adapter
->hw
;
1729 u8
*addr_list
= NULL
;
1732 /* Check for Promiscuous and All Multicast modes */
1734 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
1735 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
1737 if (netdev
->flags
& IFF_PROMISC
) {
1738 hw
->addr_ctrl
.user_set_promisc
= 1;
1739 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
1740 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
1742 if (netdev
->flags
& IFF_ALLMULTI
) {
1743 fctrl
|= IXGBE_FCTRL_MPE
;
1744 fctrl
&= ~IXGBE_FCTRL_UPE
;
1746 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
1748 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
1749 hw
->addr_ctrl
.user_set_promisc
= 0;
1752 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
1753 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
1755 /* reprogram secondary unicast list */
1756 addr_count
= netdev
->uc_count
;
1758 addr_list
= netdev
->uc_list
->dmi_addr
;
1759 ixgbe_update_uc_addr_list(hw
, addr_list
, addr_count
,
1760 ixgbe_addr_list_itr
);
1762 /* reprogram multicast list */
1763 addr_count
= netdev
->mc_count
;
1765 addr_list
= netdev
->mc_list
->dmi_addr
;
1766 ixgbe_update_mc_addr_list(hw
, addr_list
, addr_count
,
1767 ixgbe_addr_list_itr
);
1770 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
1773 struct ixgbe_q_vector
*q_vector
;
1774 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1776 /* legacy and MSI only use one vector */
1777 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1780 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
1781 q_vector
= &adapter
->q_vector
[q_idx
];
1782 if (!q_vector
->rxr_count
)
1784 napi_enable(&q_vector
->napi
);
1788 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
1791 struct ixgbe_q_vector
*q_vector
;
1792 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1794 /* legacy and MSI only use one vector */
1795 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1798 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
1799 q_vector
= &adapter
->q_vector
[q_idx
];
1800 if (!q_vector
->rxr_count
)
1802 napi_disable(&q_vector
->napi
);
1806 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
1808 struct net_device
*netdev
= adapter
->netdev
;
1811 ixgbe_set_rx_mode(netdev
);
1813 ixgbe_restore_vlan(adapter
);
1815 ixgbe_configure_tx(adapter
);
1816 ixgbe_configure_rx(adapter
);
1817 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1818 ixgbe_alloc_rx_buffers(adapter
, &adapter
->rx_ring
[i
],
1819 (adapter
->rx_ring
[i
].count
- 1));
1822 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
1824 struct net_device
*netdev
= adapter
->netdev
;
1825 struct ixgbe_hw
*hw
= &adapter
->hw
;
1827 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1828 u32 txdctl
, rxdctl
, mhadd
;
1831 ixgbe_get_hw_control(adapter
);
1833 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) ||
1834 (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)) {
1835 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1836 gpie
= (IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_EIAME
|
1837 IXGBE_GPIE_PBA_SUPPORT
| IXGBE_GPIE_OCD
);
1842 /* XXX: to interrupt immediately for EICS writes, enable this */
1843 /* gpie |= IXGBE_GPIE_EIMEN; */
1844 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
1847 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
1848 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1849 * specifically only auto mask tx and rx interrupts */
1850 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
1853 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
1854 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
1855 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
1856 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
1858 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
1861 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1862 j
= adapter
->tx_ring
[i
].reg_idx
;
1863 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
1864 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1865 txdctl
|= (8 << 16);
1866 txdctl
|= IXGBE_TXDCTL_ENABLE
;
1867 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
1870 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1871 j
= adapter
->rx_ring
[i
].reg_idx
;
1872 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
1873 /* enable PTHRESH=32 descriptors (half the internal cache)
1874 * and HTHRESH=0 descriptors (to minimize latency on fetch),
1875 * this also removes a pesky rx_no_buffer_count increment */
1877 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
1878 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), rxdctl
);
1880 /* enable all receives */
1881 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1882 rxdctl
|= (IXGBE_RXCTRL_DMBYPS
| IXGBE_RXCTRL_RXEN
);
1883 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxdctl
);
1885 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
1886 ixgbe_configure_msix(adapter
);
1888 ixgbe_configure_msi_and_legacy(adapter
);
1890 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
1891 ixgbe_napi_enable_all(adapter
);
1893 /* clear any pending interrupts, may auto mask */
1894 IXGBE_READ_REG(hw
, IXGBE_EICR
);
1896 ixgbe_irq_enable(adapter
);
1898 /* bring the link up in the watchdog, this could race with our first
1899 * link up interrupt but shouldn't be a problem */
1900 mod_timer(&adapter
->watchdog_timer
, jiffies
);
1904 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
1906 WARN_ON(in_interrupt());
1907 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
1909 ixgbe_down(adapter
);
1911 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
1914 int ixgbe_up(struct ixgbe_adapter
*adapter
)
1916 /* hardware has been reset, we need to reload some things */
1917 ixgbe_configure(adapter
);
1919 return ixgbe_up_complete(adapter
);
1922 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
1924 if (ixgbe_init_hw(&adapter
->hw
))
1925 DPRINTK(PROBE
, ERR
, "Hardware Error\n");
1927 /* reprogram the RAR[0] in case user changed it. */
1928 ixgbe_set_rar(&adapter
->hw
, 0, adapter
->hw
.mac
.addr
, 0, IXGBE_RAH_AV
);
1933 static int ixgbe_resume(struct pci_dev
*pdev
)
1935 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1936 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1939 pci_set_power_state(pdev
, PCI_D0
);
1940 pci_restore_state(pdev
);
1941 err
= pci_enable_device(pdev
);
1943 printk(KERN_ERR
"ixgbe: Cannot enable PCI device from " \
1947 pci_set_master(pdev
);
1949 pci_enable_wake(pdev
, PCI_D3hot
, 0);
1950 pci_enable_wake(pdev
, PCI_D3cold
, 0);
1952 if (netif_running(netdev
)) {
1953 err
= ixgbe_request_irq(adapter
);
1958 ixgbe_reset(adapter
);
1960 if (netif_running(netdev
))
1963 netif_device_attach(netdev
);
1970 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1971 * @adapter: board private structure
1972 * @rx_ring: ring to free buffers from
1974 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
1975 struct ixgbe_ring
*rx_ring
)
1977 struct pci_dev
*pdev
= adapter
->pdev
;
1981 /* Free all the Rx ring sk_buffs */
1983 for (i
= 0; i
< rx_ring
->count
; i
++) {
1984 struct ixgbe_rx_buffer
*rx_buffer_info
;
1986 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
1987 if (rx_buffer_info
->dma
) {
1988 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
1989 rx_ring
->rx_buf_len
,
1990 PCI_DMA_FROMDEVICE
);
1991 rx_buffer_info
->dma
= 0;
1993 if (rx_buffer_info
->skb
) {
1994 dev_kfree_skb(rx_buffer_info
->skb
);
1995 rx_buffer_info
->skb
= NULL
;
1997 if (!rx_buffer_info
->page
)
1999 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
, PAGE_SIZE
,
2000 PCI_DMA_FROMDEVICE
);
2001 rx_buffer_info
->page_dma
= 0;
2003 put_page(rx_buffer_info
->page
);
2004 rx_buffer_info
->page
= NULL
;
2007 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2008 memset(rx_ring
->rx_buffer_info
, 0, size
);
2010 /* Zero out the descriptor ring */
2011 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2013 rx_ring
->next_to_clean
= 0;
2014 rx_ring
->next_to_use
= 0;
2016 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2017 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2021 * ixgbe_clean_tx_ring - Free Tx Buffers
2022 * @adapter: board private structure
2023 * @tx_ring: ring to be cleaned
2025 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
2026 struct ixgbe_ring
*tx_ring
)
2028 struct ixgbe_tx_buffer
*tx_buffer_info
;
2032 /* Free all the Tx ring sk_buffs */
2034 for (i
= 0; i
< tx_ring
->count
; i
++) {
2035 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
2036 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
2039 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2040 memset(tx_ring
->tx_buffer_info
, 0, size
);
2042 /* Zero out the descriptor ring */
2043 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2045 tx_ring
->next_to_use
= 0;
2046 tx_ring
->next_to_clean
= 0;
2048 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2049 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2053 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2054 * @adapter: board private structure
2056 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
2060 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2061 ixgbe_clean_rx_ring(adapter
, &adapter
->rx_ring
[i
]);
2065 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2066 * @adapter: board private structure
2068 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
2072 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2073 ixgbe_clean_tx_ring(adapter
, &adapter
->tx_ring
[i
]);
2076 void ixgbe_down(struct ixgbe_adapter
*adapter
)
2078 struct net_device
*netdev
= adapter
->netdev
;
2081 /* signal that we are down to the interrupt handler */
2082 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2084 /* disable receives */
2085 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_RXCTRL
);
2086 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_RXCTRL
,
2087 rxctrl
& ~IXGBE_RXCTRL_RXEN
);
2089 netif_tx_disable(netdev
);
2091 /* disable transmits in the hardware */
2093 /* flush both disables */
2094 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2097 ixgbe_irq_disable(adapter
);
2099 ixgbe_napi_disable_all(adapter
);
2100 del_timer_sync(&adapter
->watchdog_timer
);
2102 netif_carrier_off(netdev
);
2103 netif_tx_stop_all_queues(netdev
);
2105 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
2106 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2107 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
2108 dca_remove_requester(&adapter
->pdev
->dev
);
2112 if (!pci_channel_offline(adapter
->pdev
))
2113 ixgbe_reset(adapter
);
2114 ixgbe_clean_all_tx_rings(adapter
);
2115 ixgbe_clean_all_rx_rings(adapter
);
2117 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
2118 /* since we reset the hardware DCA settings were cleared */
2119 if (dca_add_requester(&adapter
->pdev
->dev
) == 0) {
2120 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
2121 /* always use CB2 mode, difference is masked
2122 * in the CB driver */
2123 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
2124 ixgbe_setup_dca(adapter
);
2129 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2131 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2132 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2137 netif_device_detach(netdev
);
2139 if (netif_running(netdev
)) {
2140 ixgbe_down(adapter
);
2141 ixgbe_free_irq(adapter
);
2145 retval
= pci_save_state(pdev
);
2150 pci_enable_wake(pdev
, PCI_D3hot
, 0);
2151 pci_enable_wake(pdev
, PCI_D3cold
, 0);
2153 ixgbe_release_hw_control(adapter
);
2155 pci_disable_device(pdev
);
2157 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2162 static void ixgbe_shutdown(struct pci_dev
*pdev
)
2164 ixgbe_suspend(pdev
, PMSG_SUSPEND
);
2168 * ixgbe_poll - NAPI Rx polling callback
2169 * @napi: structure for representing this polling device
2170 * @budget: how many packets driver is allowed to clean
2172 * This function is used for legacy and MSI, NAPI mode
2174 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2176 struct ixgbe_q_vector
*q_vector
= container_of(napi
,
2177 struct ixgbe_q_vector
, napi
);
2178 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2179 int tx_cleaned
= 0, work_done
= 0;
2181 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
2182 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2183 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
);
2184 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
);
2188 tx_cleaned
= ixgbe_clean_tx_irq(adapter
, adapter
->tx_ring
);
2189 ixgbe_clean_rx_irq(adapter
, adapter
->rx_ring
, &work_done
, budget
);
2194 /* If budget not fully consumed, exit the polling mode */
2195 if (work_done
< budget
) {
2196 netif_rx_complete(adapter
->netdev
, napi
);
2197 if (adapter
->rx_eitr
< IXGBE_MIN_ITR_USECS
)
2198 ixgbe_set_itr(adapter
);
2199 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2200 ixgbe_irq_enable(adapter
);
2207 * ixgbe_tx_timeout - Respond to a Tx Hang
2208 * @netdev: network interface device structure
2210 static void ixgbe_tx_timeout(struct net_device
*netdev
)
2212 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2214 /* Do the reset outside of interrupt context */
2215 schedule_work(&adapter
->reset_task
);
2218 static void ixgbe_reset_task(struct work_struct
*work
)
2220 struct ixgbe_adapter
*adapter
;
2221 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
2223 adapter
->tx_timeout_count
++;
2225 ixgbe_reinit_locked(adapter
);
2228 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
2231 int err
, vector_threshold
;
2233 /* We'll want at least 3 (vector_threshold):
2236 * 3) Other (Link Status Change, etc.)
2237 * 4) TCP Timer (optional)
2239 vector_threshold
= MIN_MSIX_COUNT
;
2241 /* The more we get, the more we will assign to Tx/Rx Cleanup
2242 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2243 * Right now, we simply care about how many we'll get; we'll
2244 * set them up later while requesting irq's.
2246 while (vectors
>= vector_threshold
) {
2247 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
2249 if (!err
) /* Success in acquiring all requested vectors. */
2252 vectors
= 0; /* Nasty failure, quit now */
2253 else /* err == number of vectors we should try again with */
2257 if (vectors
< vector_threshold
) {
2258 /* Can't allocate enough MSI-X interrupts? Oh well.
2259 * This just means we'll go with either a single MSI
2260 * vector or fall back to legacy interrupts.
2262 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI-X interrupts\n");
2263 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2264 kfree(adapter
->msix_entries
);
2265 adapter
->msix_entries
= NULL
;
2266 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2267 adapter
->num_tx_queues
= 1;
2268 adapter
->num_rx_queues
= 1;
2270 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
2271 adapter
->num_msix_vectors
= vectors
;
2275 static void __devinit
ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
2278 int feature_mask
= 0, rss_i
, rss_m
;
2280 /* Number of supported queues */
2281 switch (adapter
->hw
.mac
.type
) {
2282 case ixgbe_mac_82598EB
:
2283 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2285 feature_mask
|= IXGBE_FLAG_RSS_ENABLED
;
2287 switch (adapter
->flags
& feature_mask
) {
2288 case (IXGBE_FLAG_RSS_ENABLED
):
2302 adapter
->ring_feature
[RING_F_RSS
].indices
= rss_i
;
2303 adapter
->ring_feature
[RING_F_RSS
].mask
= rss_m
;
2311 adapter
->num_rx_queues
= nrq
;
2312 adapter
->num_tx_queues
= ntq
;
2316 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2317 * @adapter: board private structure to initialize
2319 * Once we know the feature-set enabled for the device, we'll cache
2320 * the register offset the descriptor ring is assigned to.
2322 static void __devinit
ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
2324 /* TODO: Remove all uses of the indices in the cases where multiple
2325 * features are OR'd together, if the feature set makes sense.
2327 int feature_mask
= 0, rss_i
;
2328 int i
, txr_idx
, rxr_idx
;
2330 /* Number of supported queues */
2331 switch (adapter
->hw
.mac
.type
) {
2332 case ixgbe_mac_82598EB
:
2333 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2336 feature_mask
|= IXGBE_FLAG_RSS_ENABLED
;
2337 switch (adapter
->flags
& feature_mask
) {
2338 case (IXGBE_FLAG_RSS_ENABLED
):
2339 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2340 adapter
->rx_ring
[i
].reg_idx
= i
;
2341 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2342 adapter
->tx_ring
[i
].reg_idx
= i
;
2355 * ixgbe_alloc_queues - Allocate memory for all rings
2356 * @adapter: board private structure to initialize
2358 * We allocate one ring per queue at run-time since we don't know the
2359 * number of queues at compile-time. The polling_netdev array is
2360 * intended for Multiqueue, but should work fine with a single queue.
2362 static int __devinit
ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
2366 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
2367 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2368 if (!adapter
->tx_ring
)
2369 goto err_tx_ring_allocation
;
2371 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
2372 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2373 if (!adapter
->rx_ring
)
2374 goto err_rx_ring_allocation
;
2376 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2377 adapter
->tx_ring
[i
].count
= IXGBE_DEFAULT_TXD
;
2378 adapter
->tx_ring
[i
].queue_index
= i
;
2380 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2381 adapter
->rx_ring
[i
].count
= IXGBE_DEFAULT_RXD
;
2382 adapter
->rx_ring
[i
].queue_index
= i
;
2385 ixgbe_cache_ring_register(adapter
);
2389 err_rx_ring_allocation
:
2390 kfree(adapter
->tx_ring
);
2391 err_tx_ring_allocation
:
2396 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2397 * @adapter: board private structure to initialize
2399 * Attempt to configure the interrupts using the best available
2400 * capabilities of the hardware and the kernel.
2402 static int __devinit
ixgbe_set_interrupt_capability(struct ixgbe_adapter
2406 int vector
, v_budget
;
2409 * It's easy to be greedy for MSI-X vectors, but it really
2410 * doesn't do us much good if we have a lot more vectors
2411 * than CPU's. So let's be conservative and only ask for
2412 * (roughly) twice the number of vectors as there are CPU's.
2414 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
2415 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS
;
2418 * At the same time, hardware can only support a maximum of
2419 * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq,
2420 * we can easily reach upwards of 64 Rx descriptor queues and
2421 * 32 Tx queues. Thus, we cap it off in those rare cases where
2422 * the cpu count also exceeds our vector limit.
2424 v_budget
= min(v_budget
, MAX_MSIX_COUNT
);
2426 /* A failure in MSI-X entry allocation isn't fatal, but it does
2427 * mean we disable MSI-X capabilities of the adapter. */
2428 adapter
->msix_entries
= kcalloc(v_budget
,
2429 sizeof(struct msix_entry
), GFP_KERNEL
);
2430 if (!adapter
->msix_entries
) {
2431 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2432 ixgbe_set_num_queues(adapter
);
2433 kfree(adapter
->tx_ring
);
2434 kfree(adapter
->rx_ring
);
2435 err
= ixgbe_alloc_queues(adapter
);
2437 DPRINTK(PROBE
, ERR
, "Unable to allocate memory "
2445 for (vector
= 0; vector
< v_budget
; vector
++)
2446 adapter
->msix_entries
[vector
].entry
= vector
;
2448 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
2450 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2454 err
= pci_enable_msi(adapter
->pdev
);
2456 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
2458 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI interrupt, "
2459 "falling back to legacy. Error: %d\n", err
);
2465 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2466 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
2471 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
2473 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2474 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2475 pci_disable_msix(adapter
->pdev
);
2476 kfree(adapter
->msix_entries
);
2477 adapter
->msix_entries
= NULL
;
2478 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
2479 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
2480 pci_disable_msi(adapter
->pdev
);
2486 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2487 * @adapter: board private structure to initialize
2489 * We determine which interrupt scheme to use based on...
2490 * - Kernel support (MSI, MSI-X)
2491 * - which can be user-defined (via MODULE_PARAM)
2492 * - Hardware queue count (num_*_queues)
2493 * - defined by miscellaneous hardware support/features (RSS, etc.)
2495 static int __devinit
ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
2499 /* Number of supported queues */
2500 ixgbe_set_num_queues(adapter
);
2502 err
= ixgbe_alloc_queues(adapter
);
2504 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queues\n");
2505 goto err_alloc_queues
;
2508 err
= ixgbe_set_interrupt_capability(adapter
);
2510 DPRINTK(PROBE
, ERR
, "Unable to setup interrupt capabilities\n");
2511 goto err_set_interrupt
;
2514 DPRINTK(DRV
, INFO
, "Multiqueue %s: Rx Queue count = %u, "
2515 "Tx Queue count = %u\n",
2516 (adapter
->num_rx_queues
> 1) ? "Enabled" :
2517 "Disabled", adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2519 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2524 kfree(adapter
->tx_ring
);
2525 kfree(adapter
->rx_ring
);
2531 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2532 * @adapter: board private structure to initialize
2534 * ixgbe_sw_init initializes the Adapter private data structure.
2535 * Fields are initialized based on PCI device information and
2536 * OS network device settings (MTU size).
2538 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
2540 struct ixgbe_hw
*hw
= &adapter
->hw
;
2541 struct pci_dev
*pdev
= adapter
->pdev
;
2544 /* Set capability flags */
2545 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
2546 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
2547 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
2549 /* Enable Dynamic interrupt throttling by default */
2550 adapter
->rx_eitr
= 1;
2551 adapter
->tx_eitr
= 1;
2553 /* default flow control settings */
2554 hw
->fc
.original_type
= ixgbe_fc_none
;
2555 hw
->fc
.type
= ixgbe_fc_none
;
2556 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
2557 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
2558 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
2559 hw
->fc
.send_xon
= true;
2561 /* select 10G link by default */
2562 hw
->mac
.link_mode_select
= IXGBE_AUTOC_LMS_10G_LINK_NO_AN
;
2563 if (hw
->mac
.ops
.reset(hw
)) {
2564 dev_err(&pdev
->dev
, "HW Init failed\n");
2567 if (hw
->mac
.ops
.setup_link_speed(hw
, IXGBE_LINK_SPEED_10GB_FULL
, true,
2569 dev_err(&pdev
->dev
, "Link Speed setup failed\n");
2573 /* initialize eeprom parameters */
2574 if (ixgbe_init_eeprom(hw
)) {
2575 dev_err(&pdev
->dev
, "EEPROM initialization failed\n");
2579 /* enable rx csum by default */
2580 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
2582 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2588 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2589 * @adapter: board private structure
2590 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2592 * Return 0 on success, negative on failure
2594 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
2595 struct ixgbe_ring
*tx_ring
)
2597 struct pci_dev
*pdev
= adapter
->pdev
;
2600 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2601 tx_ring
->tx_buffer_info
= vmalloc(size
);
2602 if (!tx_ring
->tx_buffer_info
)
2604 memset(tx_ring
->tx_buffer_info
, 0, size
);
2606 /* round up to nearest 4K */
2607 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
) +
2609 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
2611 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
2616 tx_ring
->next_to_use
= 0;
2617 tx_ring
->next_to_clean
= 0;
2618 tx_ring
->work_limit
= tx_ring
->count
;
2622 vfree(tx_ring
->tx_buffer_info
);
2623 tx_ring
->tx_buffer_info
= NULL
;
2624 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for the transmit "
2625 "descriptor ring\n");
2630 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2631 * @adapter: board private structure
2632 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2634 * Returns 0 on success, negative on failure
2636 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
2637 struct ixgbe_ring
*rx_ring
)
2639 struct pci_dev
*pdev
= adapter
->pdev
;
2642 size
= sizeof(struct net_lro_desc
) * IXGBE_MAX_LRO_DESCRIPTORS
;
2643 rx_ring
->lro_mgr
.lro_arr
= vmalloc(size
);
2644 if (!rx_ring
->lro_mgr
.lro_arr
)
2646 memset(rx_ring
->lro_mgr
.lro_arr
, 0, size
);
2648 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2649 rx_ring
->rx_buffer_info
= vmalloc(size
);
2650 if (!rx_ring
->rx_buffer_info
) {
2652 "vmalloc allocation failed for the rx desc ring\n");
2655 memset(rx_ring
->rx_buffer_info
, 0, size
);
2657 /* Round up to nearest 4K */
2658 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
2659 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
2661 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
, &rx_ring
->dma
);
2663 if (!rx_ring
->desc
) {
2665 "Memory allocation failed for the rx desc ring\n");
2666 vfree(rx_ring
->rx_buffer_info
);
2670 rx_ring
->next_to_clean
= 0;
2671 rx_ring
->next_to_use
= 0;
2676 vfree(rx_ring
->lro_mgr
.lro_arr
);
2677 rx_ring
->lro_mgr
.lro_arr
= NULL
;
2682 * ixgbe_free_tx_resources - Free Tx Resources per Queue
2683 * @adapter: board private structure
2684 * @tx_ring: Tx descriptor ring for a specific queue
2686 * Free all transmit software resources
2688 static void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
2689 struct ixgbe_ring
*tx_ring
)
2691 struct pci_dev
*pdev
= adapter
->pdev
;
2693 ixgbe_clean_tx_ring(adapter
, tx_ring
);
2695 vfree(tx_ring
->tx_buffer_info
);
2696 tx_ring
->tx_buffer_info
= NULL
;
2698 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2700 tx_ring
->desc
= NULL
;
2704 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2705 * @adapter: board private structure
2707 * Free all transmit software resources
2709 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
2713 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2714 ixgbe_free_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
2718 * ixgbe_free_rx_resources - Free Rx Resources
2719 * @adapter: board private structure
2720 * @rx_ring: ring to clean the resources from
2722 * Free all receive software resources
2724 static void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
2725 struct ixgbe_ring
*rx_ring
)
2727 struct pci_dev
*pdev
= adapter
->pdev
;
2729 vfree(rx_ring
->lro_mgr
.lro_arr
);
2730 rx_ring
->lro_mgr
.lro_arr
= NULL
;
2732 ixgbe_clean_rx_ring(adapter
, rx_ring
);
2734 vfree(rx_ring
->rx_buffer_info
);
2735 rx_ring
->rx_buffer_info
= NULL
;
2737 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2739 rx_ring
->desc
= NULL
;
2743 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2744 * @adapter: board private structure
2746 * Free all receive software resources
2748 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
2752 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2753 ixgbe_free_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2757 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2758 * @adapter: board private structure
2760 * If this function returns with an error, then it's possible one or
2761 * more of the rings is populated (while the rest are not). It is the
2762 * callers duty to clean those orphaned rings.
2764 * Return 0 on success, negative on failure
2766 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
2770 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2771 err
= ixgbe_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
2774 "Allocation for Tx Queue %u failed\n", i
);
2783 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2784 * @adapter: board private structure
2786 * If this function returns with an error, then it's possible one or
2787 * more of the rings is populated (while the rest are not). It is the
2788 * callers duty to clean those orphaned rings.
2790 * Return 0 on success, negative on failure
2793 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
2797 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2798 err
= ixgbe_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2801 "Allocation for Rx Queue %u failed\n", i
);
2810 * ixgbe_change_mtu - Change the Maximum Transfer Unit
2811 * @netdev: network interface device structure
2812 * @new_mtu: new value for maximum frame size
2814 * Returns 0 on success, negative on failure
2816 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
2818 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2819 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2821 if ((max_frame
< (ETH_ZLEN
+ ETH_FCS_LEN
)) ||
2822 (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
2825 DPRINTK(PROBE
, INFO
, "changing MTU from %d to %d\n",
2826 netdev
->mtu
, new_mtu
);
2827 /* must set new MTU before calling down or up */
2828 netdev
->mtu
= new_mtu
;
2830 if (netif_running(netdev
))
2831 ixgbe_reinit_locked(adapter
);
2837 * ixgbe_open - Called when a network interface is made active
2838 * @netdev: network interface device structure
2840 * Returns 0 on success, negative value on failure
2842 * The open entry point is called when a network interface is made
2843 * active by the system (IFF_UP). At this point all resources needed
2844 * for transmit and receive operations are allocated, the interrupt
2845 * handler is registered with the OS, the watchdog timer is started,
2846 * and the stack is notified that the interface is ready.
2848 static int ixgbe_open(struct net_device
*netdev
)
2850 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2853 /* disallow open during test */
2854 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
2857 /* allocate transmit descriptors */
2858 err
= ixgbe_setup_all_tx_resources(adapter
);
2862 /* allocate receive descriptors */
2863 err
= ixgbe_setup_all_rx_resources(adapter
);
2867 ixgbe_configure(adapter
);
2869 err
= ixgbe_request_irq(adapter
);
2873 err
= ixgbe_up_complete(adapter
);
2877 netif_tx_start_all_queues(netdev
);
2882 ixgbe_release_hw_control(adapter
);
2883 ixgbe_free_irq(adapter
);
2885 ixgbe_free_all_rx_resources(adapter
);
2887 ixgbe_free_all_tx_resources(adapter
);
2889 ixgbe_reset(adapter
);
2895 * ixgbe_close - Disables a network interface
2896 * @netdev: network interface device structure
2898 * Returns 0, this is not allowed to fail
2900 * The close entry point is called when an interface is de-activated
2901 * by the OS. The hardware is still under the drivers control, but
2902 * needs to be disabled. A global MAC reset is issued to stop the
2903 * hardware, and all transmit and receive resources are freed.
2905 static int ixgbe_close(struct net_device
*netdev
)
2907 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2909 ixgbe_down(adapter
);
2910 ixgbe_free_irq(adapter
);
2912 ixgbe_free_all_tx_resources(adapter
);
2913 ixgbe_free_all_rx_resources(adapter
);
2915 ixgbe_release_hw_control(adapter
);
2921 * ixgbe_update_stats - Update the board statistics counters.
2922 * @adapter: board private structure
2924 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
2926 struct ixgbe_hw
*hw
= &adapter
->hw
;
2928 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
2930 adapter
->stats
.crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
2931 for (i
= 0; i
< 8; i
++) {
2932 /* for packet buffers not used, the register should read 0 */
2933 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
2935 adapter
->stats
.mpc
[i
] += mpc
;
2936 total_mpc
+= adapter
->stats
.mpc
[i
];
2937 adapter
->stats
.rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
2939 adapter
->stats
.gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
2940 /* work around hardware counting issue */
2941 adapter
->stats
.gprc
-= missed_rx
;
2943 /* 82598 hardware only has a 32 bit counter in the high register */
2944 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
2945 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
2946 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
2947 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
2948 adapter
->stats
.bprc
+= bprc
;
2949 adapter
->stats
.mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
2950 adapter
->stats
.mprc
-= bprc
;
2951 adapter
->stats
.roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
2952 adapter
->stats
.prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
2953 adapter
->stats
.prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
2954 adapter
->stats
.prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
2955 adapter
->stats
.prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
2956 adapter
->stats
.prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
2957 adapter
->stats
.prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
2958 adapter
->stats
.rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
2959 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
2960 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
2961 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
2962 adapter
->stats
.lxontxc
+= lxon
;
2963 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
2964 adapter
->stats
.lxofftxc
+= lxoff
;
2965 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
2966 adapter
->stats
.gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
2967 adapter
->stats
.mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
2969 * 82598 errata - tx of flow control packets is included in tx counters
2971 xon_off_tot
= lxon
+ lxoff
;
2972 adapter
->stats
.gptc
-= xon_off_tot
;
2973 adapter
->stats
.mptc
-= xon_off_tot
;
2974 adapter
->stats
.gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
2975 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
2976 adapter
->stats
.rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
2977 adapter
->stats
.rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
2978 adapter
->stats
.tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
2979 adapter
->stats
.ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
2980 adapter
->stats
.ptc64
-= xon_off_tot
;
2981 adapter
->stats
.ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
2982 adapter
->stats
.ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
2983 adapter
->stats
.ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
2984 adapter
->stats
.ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
2985 adapter
->stats
.ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
2986 adapter
->stats
.bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
2988 /* Fill out the OS statistics structure */
2989 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
2992 adapter
->net_stats
.rx_errors
= adapter
->stats
.crcerrs
+
2993 adapter
->stats
.rlec
;
2994 adapter
->net_stats
.rx_dropped
= 0;
2995 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.rlec
;
2996 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
2997 adapter
->net_stats
.rx_missed_errors
= total_mpc
;
3001 * ixgbe_watchdog - Timer Call-back
3002 * @data: pointer to adapter cast into an unsigned long
3004 static void ixgbe_watchdog(unsigned long data
)
3006 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
3007 struct net_device
*netdev
= adapter
->netdev
;
3011 adapter
->hw
.mac
.ops
.check_link(&adapter
->hw
, &(link_speed
), &link_up
);
3014 if (!netif_carrier_ok(netdev
)) {
3015 u32 frctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
3016 u32 rmcs
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_RMCS
);
3017 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3018 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3019 DPRINTK(LINK
, INFO
, "NIC Link is Up %s, "
3020 "Flow Control: %s\n",
3021 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
3023 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
3024 "1 Gbps" : "unknown speed")),
3025 ((FLOW_RX
&& FLOW_TX
) ? "RX/TX" :
3027 (FLOW_TX
? "TX" : "None"))));
3029 netif_carrier_on(netdev
);
3030 netif_tx_wake_all_queues(netdev
);
3032 /* Force detection of hung controller */
3033 adapter
->detect_tx_hung
= true;
3036 if (netif_carrier_ok(netdev
)) {
3037 DPRINTK(LINK
, INFO
, "NIC Link is Down\n");
3038 netif_carrier_off(netdev
);
3039 netif_tx_stop_all_queues(netdev
);
3043 ixgbe_update_stats(adapter
);
3045 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
3046 /* Cause software interrupt to ensure rx rings are cleaned */
3047 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3049 (1 << (adapter
->num_msix_vectors
- NON_Q_VECTORS
)) - 1;
3050 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, eics
);
3052 /* for legacy and MSI interrupts don't set any bits that
3053 * are enabled for EIAM, because this operation would
3054 * set *both* EIMS and EICS for any bit in EIAM */
3055 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
,
3056 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
3058 /* Reset the timer */
3059 mod_timer(&adapter
->watchdog_timer
,
3060 round_jiffies(jiffies
+ 2 * HZ
));
3064 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
3065 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
3066 u32 tx_flags
, u8
*hdr_len
)
3068 struct ixgbe_adv_tx_context_desc
*context_desc
;
3071 struct ixgbe_tx_buffer
*tx_buffer_info
;
3072 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
3073 u32 mss_l4len_idx
= 0, l4len
;
3075 if (skb_is_gso(skb
)) {
3076 if (skb_header_cloned(skb
)) {
3077 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
3081 l4len
= tcp_hdrlen(skb
);
3084 if (skb
->protocol
== htons(ETH_P_IP
)) {
3085 struct iphdr
*iph
= ip_hdr(skb
);
3088 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
3092 adapter
->hw_tso_ctxt
++;
3093 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
3094 ipv6_hdr(skb
)->payload_len
= 0;
3095 tcp_hdr(skb
)->check
=
3096 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
3097 &ipv6_hdr(skb
)->daddr
,
3099 adapter
->hw_tso6_ctxt
++;
3102 i
= tx_ring
->next_to_use
;
3104 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3105 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
3107 /* VLAN MACLEN IPLEN */
3108 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3110 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
3111 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
3112 IXGBE_ADVTXD_MACLEN_SHIFT
);
3113 *hdr_len
+= skb_network_offset(skb
);
3115 (skb_transport_header(skb
) - skb_network_header(skb
));
3117 (skb_transport_header(skb
) - skb_network_header(skb
));
3118 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
3119 context_desc
->seqnum_seed
= 0;
3121 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3122 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
3123 IXGBE_ADVTXD_DTYP_CTXT
);
3125 if (skb
->protocol
== htons(ETH_P_IP
))
3126 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
3127 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3128 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
3132 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
3133 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
3134 /* use index 1 for TSO */
3135 mss_l4len_idx
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
3136 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
3138 tx_buffer_info
->time_stamp
= jiffies
;
3139 tx_buffer_info
->next_to_watch
= i
;
3142 if (i
== tx_ring
->count
)
3144 tx_ring
->next_to_use
= i
;
3151 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
3152 struct ixgbe_ring
*tx_ring
,
3153 struct sk_buff
*skb
, u32 tx_flags
)
3155 struct ixgbe_adv_tx_context_desc
*context_desc
;
3157 struct ixgbe_tx_buffer
*tx_buffer_info
;
3158 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
3160 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
3161 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
3162 i
= tx_ring
->next_to_use
;
3163 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3164 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
3166 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3168 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
3169 vlan_macip_lens
|= (skb_network_offset(skb
) <<
3170 IXGBE_ADVTXD_MACLEN_SHIFT
);
3171 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3172 vlan_macip_lens
|= (skb_transport_header(skb
) -
3173 skb_network_header(skb
));
3175 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
3176 context_desc
->seqnum_seed
= 0;
3178 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
3179 IXGBE_ADVTXD_DTYP_CTXT
);
3181 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
3182 switch (skb
->protocol
) {
3183 case __constant_htons(ETH_P_IP
):
3184 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
3185 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
3187 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3190 case __constant_htons(ETH_P_IPV6
):
3191 /* XXX what about other V6 headers?? */
3192 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
3194 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3198 if (unlikely(net_ratelimit())) {
3199 DPRINTK(PROBE
, WARNING
,
3200 "partial checksum but proto=%x!\n",
3207 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
3208 /* use index zero for tx checksum offload */
3209 context_desc
->mss_l4len_idx
= 0;
3211 tx_buffer_info
->time_stamp
= jiffies
;
3212 tx_buffer_info
->next_to_watch
= i
;
3213 adapter
->hw_csum_tx_good
++;
3215 if (i
== tx_ring
->count
)
3217 tx_ring
->next_to_use
= i
;
3224 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
3225 struct ixgbe_ring
*tx_ring
,
3226 struct sk_buff
*skb
, unsigned int first
)
3228 struct ixgbe_tx_buffer
*tx_buffer_info
;
3229 unsigned int len
= skb
->len
;
3230 unsigned int offset
= 0, size
, count
= 0, i
;
3231 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
3234 len
-= skb
->data_len
;
3236 i
= tx_ring
->next_to_use
;
3239 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3240 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
3242 tx_buffer_info
->length
= size
;
3243 tx_buffer_info
->dma
= pci_map_single(adapter
->pdev
,
3245 size
, PCI_DMA_TODEVICE
);
3246 tx_buffer_info
->time_stamp
= jiffies
;
3247 tx_buffer_info
->next_to_watch
= i
;
3253 if (i
== tx_ring
->count
)
3257 for (f
= 0; f
< nr_frags
; f
++) {
3258 struct skb_frag_struct
*frag
;
3260 frag
= &skb_shinfo(skb
)->frags
[f
];
3262 offset
= frag
->page_offset
;
3265 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3266 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
3268 tx_buffer_info
->length
= size
;
3269 tx_buffer_info
->dma
= pci_map_page(adapter
->pdev
,
3272 size
, PCI_DMA_TODEVICE
);
3273 tx_buffer_info
->time_stamp
= jiffies
;
3274 tx_buffer_info
->next_to_watch
= i
;
3280 if (i
== tx_ring
->count
)
3285 i
= tx_ring
->count
- 1;
3288 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
3289 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
3294 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
3295 struct ixgbe_ring
*tx_ring
,
3296 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
3298 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
3299 struct ixgbe_tx_buffer
*tx_buffer_info
;
3300 u32 olinfo_status
= 0, cmd_type_len
= 0;
3302 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
3304 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
3306 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
3308 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3309 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
3311 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
3312 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
3314 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
3315 IXGBE_ADVTXD_POPTS_SHIFT
;
3317 /* use index 1 context for tso */
3318 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
3319 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
3320 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
3321 IXGBE_ADVTXD_POPTS_SHIFT
;
3323 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
3324 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
3325 IXGBE_ADVTXD_POPTS_SHIFT
;
3327 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
3329 i
= tx_ring
->next_to_use
;
3331 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3332 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
3333 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
3334 tx_desc
->read
.cmd_type_len
=
3335 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
3336 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3339 if (i
== tx_ring
->count
)
3343 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
3346 * Force memory writes to complete before letting h/w
3347 * know there are new descriptors to fetch. (Only
3348 * applicable for weak-ordered memory model archs,
3353 tx_ring
->next_to_use
= i
;
3354 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3357 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
3358 struct ixgbe_ring
*tx_ring
, int size
)
3360 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3362 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3363 /* Herbert's original patch had:
3364 * smp_mb__after_netif_stop_queue();
3365 * but since that doesn't exist yet, just open code it. */
3368 /* We need to check again in a case another CPU has just
3369 * made room available. */
3370 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
3373 /* A reprieve! - use start_queue because it doesn't call schedule */
3374 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3375 ++adapter
->restart_queue
;
3379 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
3380 struct ixgbe_ring
*tx_ring
, int size
)
3382 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
3384 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
3388 static int ixgbe_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
3390 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3391 struct ixgbe_ring
*tx_ring
;
3392 unsigned int len
= skb
->len
;
3394 unsigned int tx_flags
= 0;
3397 unsigned int mss
= 0;
3400 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
3401 len
-= skb
->data_len
;
3402 r_idx
= (adapter
->num_tx_queues
- 1) & skb
->queue_mapping
;
3403 tx_ring
= &adapter
->tx_ring
[r_idx
];
3406 if (skb
->len
<= 0) {
3408 return NETDEV_TX_OK
;
3410 mss
= skb_shinfo(skb
)->gso_size
;
3414 else if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3417 count
+= TXD_USE_COUNT(len
);
3418 for (f
= 0; f
< nr_frags
; f
++)
3419 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
3421 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
3423 return NETDEV_TX_BUSY
;
3425 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3426 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
3427 tx_flags
|= (vlan_tx_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
);
3430 if (skb
->protocol
== htons(ETH_P_IP
))
3431 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
3432 first
= tx_ring
->next_to_use
;
3433 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
3435 dev_kfree_skb_any(skb
);
3436 return NETDEV_TX_OK
;
3440 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
3441 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
3442 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
3443 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
3445 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
,
3446 ixgbe_tx_map(adapter
, tx_ring
, skb
, first
),
3449 netdev
->trans_start
= jiffies
;
3451 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
3453 return NETDEV_TX_OK
;
3457 * ixgbe_get_stats - Get System Network Statistics
3458 * @netdev: network interface device structure
3460 * Returns the address of the device statistics structure.
3461 * The statistics are actually updated from the timer callback.
3463 static struct net_device_stats
*ixgbe_get_stats(struct net_device
*netdev
)
3465 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3467 /* only return the current stats */
3468 return &adapter
->net_stats
;
3472 * ixgbe_set_mac - Change the Ethernet Address of the NIC
3473 * @netdev: network interface device structure
3474 * @p: pointer to an address structure
3476 * Returns 0 on success, negative on failure
3478 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
3480 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3481 struct sockaddr
*addr
= p
;
3483 if (!is_valid_ether_addr(addr
->sa_data
))
3484 return -EADDRNOTAVAIL
;
3486 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
3487 memcpy(adapter
->hw
.mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
3489 ixgbe_set_rar(&adapter
->hw
, 0, adapter
->hw
.mac
.addr
, 0, IXGBE_RAH_AV
);
3494 #ifdef CONFIG_NET_POLL_CONTROLLER
3496 * Polling 'interrupt' - used by things like netconsole to send skbs
3497 * without having to re-enable interrupts. It's not called while
3498 * the interrupt routine is executing.
3500 static void ixgbe_netpoll(struct net_device
*netdev
)
3502 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3504 disable_irq(adapter
->pdev
->irq
);
3505 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
3506 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
3507 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
3508 enable_irq(adapter
->pdev
->irq
);
3513 * ixgbe_napi_add_all - prep napi structs for use
3514 * @adapter: private struct
3515 * helper function to napi_add each possible q_vector->napi
3517 static void ixgbe_napi_add_all(struct ixgbe_adapter
*adapter
)
3519 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3520 int (*poll
)(struct napi_struct
*, int);
3522 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3523 poll
= &ixgbe_clean_rxonly
;
3526 /* only one q_vector for legacy modes */
3530 for (i
= 0; i
< q_vectors
; i
++) {
3531 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
3532 netif_napi_add(adapter
->netdev
, &q_vector
->napi
,
3538 * ixgbe_probe - Device Initialization Routine
3539 * @pdev: PCI device information struct
3540 * @ent: entry in ixgbe_pci_tbl
3542 * Returns 0 on success, negative on failure
3544 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3545 * The OS initialization, configuring of the adapter private structure,
3546 * and a hardware reset occur.
3548 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
3549 const struct pci_device_id
*ent
)
3551 struct net_device
*netdev
;
3552 struct ixgbe_adapter
*adapter
= NULL
;
3553 struct ixgbe_hw
*hw
;
3554 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
3555 unsigned long mmio_start
, mmio_len
;
3556 static int cards_found
;
3557 int i
, err
, pci_using_dac
;
3558 u16 link_status
, link_speed
, link_width
;
3561 err
= pci_enable_device(pdev
);
3565 if (!pci_set_dma_mask(pdev
, DMA_64BIT_MASK
) &&
3566 !pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
)) {
3569 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
3571 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
3573 dev_err(&pdev
->dev
, "No usable DMA "
3574 "configuration, aborting\n");
3581 err
= pci_request_regions(pdev
, ixgbe_driver_name
);
3583 dev_err(&pdev
->dev
, "pci_request_regions failed 0x%x\n", err
);
3587 pci_set_master(pdev
);
3588 pci_save_state(pdev
);
3590 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), MAX_TX_QUEUES
);
3593 goto err_alloc_etherdev
;
3596 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
3598 pci_set_drvdata(pdev
, netdev
);
3599 adapter
= netdev_priv(netdev
);
3601 adapter
->netdev
= netdev
;
3602 adapter
->pdev
= pdev
;
3605 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
3607 mmio_start
= pci_resource_start(pdev
, 0);
3608 mmio_len
= pci_resource_len(pdev
, 0);
3610 hw
->hw_addr
= ioremap(mmio_start
, mmio_len
);
3616 for (i
= 1; i
<= 5; i
++) {
3617 if (pci_resource_len(pdev
, i
) == 0)
3621 netdev
->open
= &ixgbe_open
;
3622 netdev
->stop
= &ixgbe_close
;
3623 netdev
->hard_start_xmit
= &ixgbe_xmit_frame
;
3624 netdev
->get_stats
= &ixgbe_get_stats
;
3625 netdev
->set_rx_mode
= &ixgbe_set_rx_mode
;
3626 netdev
->set_multicast_list
= &ixgbe_set_rx_mode
;
3627 netdev
->set_mac_address
= &ixgbe_set_mac
;
3628 netdev
->change_mtu
= &ixgbe_change_mtu
;
3629 ixgbe_set_ethtool_ops(netdev
);
3630 netdev
->tx_timeout
= &ixgbe_tx_timeout
;
3631 netdev
->watchdog_timeo
= 5 * HZ
;
3632 netdev
->vlan_rx_register
= ixgbe_vlan_rx_register
;
3633 netdev
->vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
;
3634 netdev
->vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
;
3635 #ifdef CONFIG_NET_POLL_CONTROLLER
3636 netdev
->poll_controller
= ixgbe_netpoll
;
3638 strcpy(netdev
->name
, pci_name(pdev
));
3640 netdev
->mem_start
= mmio_start
;
3641 netdev
->mem_end
= mmio_start
+ mmio_len
;
3643 adapter
->bd_number
= cards_found
;
3645 /* PCI config space info */
3646 hw
->vendor_id
= pdev
->vendor
;
3647 hw
->device_id
= pdev
->device
;
3648 hw
->revision_id
= pdev
->revision
;
3649 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
3650 hw
->subsystem_device_id
= pdev
->subsystem_device
;
3653 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
3654 hw
->mac
.type
= ii
->mac
;
3656 err
= ii
->get_invariants(hw
);
3660 /* setup the private structure */
3661 err
= ixgbe_sw_init(adapter
);
3665 netdev
->features
= NETIF_F_SG
|
3667 NETIF_F_HW_VLAN_TX
|
3668 NETIF_F_HW_VLAN_RX
|
3669 NETIF_F_HW_VLAN_FILTER
;
3671 netdev
->features
|= NETIF_F_IPV6_CSUM
;
3672 netdev
->features
|= NETIF_F_TSO
;
3673 netdev
->features
|= NETIF_F_TSO6
;
3674 netdev
->features
|= NETIF_F_LRO
;
3676 netdev
->vlan_features
|= NETIF_F_TSO
;
3677 netdev
->vlan_features
|= NETIF_F_TSO6
;
3678 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
3679 netdev
->vlan_features
|= NETIF_F_SG
;
3682 netdev
->features
|= NETIF_F_HIGHDMA
;
3684 /* make sure the EEPROM is good */
3685 if (ixgbe_validate_eeprom_checksum(hw
, NULL
) < 0) {
3686 dev_err(&pdev
->dev
, "The EEPROM Checksum Is Not Valid\n");
3691 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
3692 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
3694 if (ixgbe_validate_mac_addr(netdev
->dev_addr
)) {
3699 init_timer(&adapter
->watchdog_timer
);
3700 adapter
->watchdog_timer
.function
= &ixgbe_watchdog
;
3701 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
3703 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
3705 err
= ixgbe_init_interrupt_scheme(adapter
);
3709 /* print bus type/speed/width info */
3710 pci_read_config_word(pdev
, IXGBE_PCI_LINK_STATUS
, &link_status
);
3711 link_speed
= link_status
& IXGBE_PCI_LINK_SPEED
;
3712 link_width
= link_status
& IXGBE_PCI_LINK_WIDTH
;
3713 dev_info(&pdev
->dev
, "(PCI Express:%s:%s) "
3714 "%02x:%02x:%02x:%02x:%02x:%02x\n",
3715 ((link_speed
== IXGBE_PCI_LINK_SPEED_5000
) ? "5.0Gb/s" :
3716 (link_speed
== IXGBE_PCI_LINK_SPEED_2500
) ? "2.5Gb/s" :
3718 ((link_width
== IXGBE_PCI_LINK_WIDTH_8
) ? "Width x8" :
3719 (link_width
== IXGBE_PCI_LINK_WIDTH_4
) ? "Width x4" :
3720 (link_width
== IXGBE_PCI_LINK_WIDTH_2
) ? "Width x2" :
3721 (link_width
== IXGBE_PCI_LINK_WIDTH_1
) ? "Width x1" :
3723 netdev
->dev_addr
[0], netdev
->dev_addr
[1], netdev
->dev_addr
[2],
3724 netdev
->dev_addr
[3], netdev
->dev_addr
[4], netdev
->dev_addr
[5]);
3725 ixgbe_read_part_num(hw
, &part_num
);
3726 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3727 hw
->mac
.type
, hw
->phy
.type
,
3728 (part_num
>> 8), (part_num
& 0xff));
3730 if (link_width
<= IXGBE_PCI_LINK_WIDTH_4
) {
3731 dev_warn(&pdev
->dev
, "PCI-Express bandwidth available for "
3732 "this card is not sufficient for optimal "
3734 dev_warn(&pdev
->dev
, "For optimal performance a x8 "
3735 "PCI-Express slot is required.\n");
3738 /* reset the hardware with the new settings */
3741 netif_carrier_off(netdev
);
3742 netif_tx_stop_all_queues(netdev
);
3744 ixgbe_napi_add_all(adapter
);
3746 strcpy(netdev
->name
, "eth%d");
3747 err
= register_netdev(netdev
);
3751 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
3752 if (dca_add_requester(&pdev
->dev
) == 0) {
3753 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
3754 /* always use CB2 mode, difference is masked
3755 * in the CB driver */
3756 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
3757 ixgbe_setup_dca(adapter
);
3761 dev_info(&pdev
->dev
, "Intel(R) 10 Gigabit Network Connection\n");
3766 ixgbe_release_hw_control(adapter
);
3769 ixgbe_reset_interrupt_capability(adapter
);
3771 iounmap(hw
->hw_addr
);
3773 free_netdev(netdev
);
3775 pci_release_regions(pdev
);
3778 pci_disable_device(pdev
);
3783 * ixgbe_remove - Device Removal Routine
3784 * @pdev: PCI device information struct
3786 * ixgbe_remove is called by the PCI subsystem to alert the driver
3787 * that it should release a PCI device. The could be caused by a
3788 * Hot-Plug event, or because the driver is going to be removed from
3791 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
3793 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3794 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3796 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3797 del_timer_sync(&adapter
->watchdog_timer
);
3799 flush_scheduled_work();
3801 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
3802 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
3803 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
3804 dca_remove_requester(&pdev
->dev
);
3805 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
3809 unregister_netdev(netdev
);
3811 ixgbe_reset_interrupt_capability(adapter
);
3813 ixgbe_release_hw_control(adapter
);
3815 iounmap(adapter
->hw
.hw_addr
);
3816 pci_release_regions(pdev
);
3818 DPRINTK(PROBE
, INFO
, "complete\n");
3819 kfree(adapter
->tx_ring
);
3820 kfree(adapter
->rx_ring
);
3822 free_netdev(netdev
);
3824 pci_disable_device(pdev
);
3828 * ixgbe_io_error_detected - called when PCI error is detected
3829 * @pdev: Pointer to PCI device
3830 * @state: The current pci connection state
3832 * This function is called after a PCI bus error affecting
3833 * this device has been detected.
3835 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
3836 pci_channel_state_t state
)
3838 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3839 struct ixgbe_adapter
*adapter
= netdev
->priv
;
3841 netif_device_detach(netdev
);
3843 if (netif_running(netdev
))
3844 ixgbe_down(adapter
);
3845 pci_disable_device(pdev
);
3847 /* Request a slot slot reset. */
3848 return PCI_ERS_RESULT_NEED_RESET
;
3852 * ixgbe_io_slot_reset - called after the pci bus has been reset.
3853 * @pdev: Pointer to PCI device
3855 * Restart the card from scratch, as if from a cold-boot.
3857 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
3859 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3860 struct ixgbe_adapter
*adapter
= netdev
->priv
;
3862 if (pci_enable_device(pdev
)) {
3864 "Cannot re-enable PCI device after reset.\n");
3865 return PCI_ERS_RESULT_DISCONNECT
;
3867 pci_set_master(pdev
);
3868 pci_restore_state(pdev
);
3870 pci_enable_wake(pdev
, PCI_D3hot
, 0);
3871 pci_enable_wake(pdev
, PCI_D3cold
, 0);
3873 ixgbe_reset(adapter
);
3875 return PCI_ERS_RESULT_RECOVERED
;
3879 * ixgbe_io_resume - called when traffic can start flowing again.
3880 * @pdev: Pointer to PCI device
3882 * This callback is called when the error recovery driver tells us that
3883 * its OK to resume normal operation.
3885 static void ixgbe_io_resume(struct pci_dev
*pdev
)
3887 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3888 struct ixgbe_adapter
*adapter
= netdev
->priv
;
3890 if (netif_running(netdev
)) {
3891 if (ixgbe_up(adapter
)) {
3892 DPRINTK(PROBE
, INFO
, "ixgbe_up failed after reset\n");
3897 netif_device_attach(netdev
);
3901 static struct pci_error_handlers ixgbe_err_handler
= {
3902 .error_detected
= ixgbe_io_error_detected
,
3903 .slot_reset
= ixgbe_io_slot_reset
,
3904 .resume
= ixgbe_io_resume
,
3907 static struct pci_driver ixgbe_driver
= {
3908 .name
= ixgbe_driver_name
,
3909 .id_table
= ixgbe_pci_tbl
,
3910 .probe
= ixgbe_probe
,
3911 .remove
= __devexit_p(ixgbe_remove
),
3913 .suspend
= ixgbe_suspend
,
3914 .resume
= ixgbe_resume
,
3916 .shutdown
= ixgbe_shutdown
,
3917 .err_handler
= &ixgbe_err_handler
3921 * ixgbe_init_module - Driver Registration Routine
3923 * ixgbe_init_module is the first routine called when the driver is
3924 * loaded. All it does is register with the PCI subsystem.
3926 static int __init
ixgbe_init_module(void)
3929 printk(KERN_INFO
"%s: %s - version %s\n", ixgbe_driver_name
,
3930 ixgbe_driver_string
, ixgbe_driver_version
);
3932 printk(KERN_INFO
"%s: %s\n", ixgbe_driver_name
, ixgbe_copyright
);
3934 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
3935 dca_register_notify(&dca_notifier
);
3938 ret
= pci_register_driver(&ixgbe_driver
);
3941 module_init(ixgbe_init_module
);
3944 * ixgbe_exit_module - Driver Exit Cleanup Routine
3946 * ixgbe_exit_module is called just before the driver is removed
3949 static void __exit
ixgbe_exit_module(void)
3951 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
3952 dca_unregister_notify(&dca_notifier
);
3954 pci_unregister_driver(&ixgbe_driver
);
3957 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
3958 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3963 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
3964 __ixgbe_notify_dca
);
3966 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3968 #endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
3970 module_exit(ixgbe_exit_module
);