2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
5 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * OpenIB.org BSD license below:
13 * Redistribution and use in source and binary forms, with or
14 * without modification, are permitted provided that the following
17 * - Redistributions of source code must retain the above
18 * copyright notice, this list of conditions and the following
21 * - Redistributions in binary form must reproduce the above
22 * copyright notice, this list of conditions and the following
23 * disclaimer in the documentation and/or other materials
24 * provided with the distribution.
26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/errno.h>
39 #include <linux/pci.h>
40 #include <linux/dma-mapping.h>
42 #include <linux/mlx4/device.h>
43 #include <linux/mlx4/doorbell.h>
49 MODULE_AUTHOR("Roland Dreier");
50 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
51 MODULE_LICENSE("Dual BSD/GPL");
52 MODULE_VERSION(DRV_VERSION
);
54 struct workqueue_struct
*mlx4_wq
;
56 #ifdef CONFIG_MLX4_DEBUG
58 int mlx4_debug_level
= 0;
59 module_param_named(debug_level
, mlx4_debug_level
, int, 0644);
60 MODULE_PARM_DESC(debug_level
, "Enable debug tracing if > 0");
62 #endif /* CONFIG_MLX4_DEBUG */
67 module_param(msi_x
, int, 0444);
68 MODULE_PARM_DESC(msi_x
, "attempt to use MSI-X if nonzero");
70 #else /* CONFIG_PCI_MSI */
74 #endif /* CONFIG_PCI_MSI */
76 static char mlx4_version
[] __devinitdata
=
77 DRV_NAME
": Mellanox ConnectX core driver v"
78 DRV_VERSION
" (" DRV_RELDATE
")\n";
80 static struct mlx4_profile default_profile
= {
83 .rdmarc_per_qp
= 1 << 4,
90 static int log_num_mac
= 2;
91 module_param_named(log_num_mac
, log_num_mac
, int, 0444);
92 MODULE_PARM_DESC(log_num_mac
, "Log2 max number of MACs per ETH port (1-7)");
94 static int log_num_vlan
;
95 module_param_named(log_num_vlan
, log_num_vlan
, int, 0444);
96 MODULE_PARM_DESC(log_num_vlan
, "Log2 max number of VLANs per ETH port (0-7)");
99 module_param_named(use_prio
, use_prio
, bool, 0444);
100 MODULE_PARM_DESC(use_prio
, "Enable steering by VLAN priority on ETH ports "
103 int mlx4_check_port_params(struct mlx4_dev
*dev
,
104 enum mlx4_port_type
*port_type
)
108 for (i
= 0; i
< dev
->caps
.num_ports
- 1; i
++) {
109 if (port_type
[i
] != port_type
[i
+ 1]) {
110 if (!(dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_DPDP
)) {
111 mlx4_err(dev
, "Only same port types supported "
112 "on this HCA, aborting.\n");
115 if (port_type
[i
] == MLX4_PORT_TYPE_ETH
&&
116 port_type
[i
+ 1] == MLX4_PORT_TYPE_IB
)
121 for (i
= 0; i
< dev
->caps
.num_ports
; i
++) {
122 if (!(port_type
[i
] & dev
->caps
.supported_type
[i
+1])) {
123 mlx4_err(dev
, "Requested port type for port %d is not "
124 "supported on this HCA\n", i
+ 1);
131 static void mlx4_set_port_mask(struct mlx4_dev
*dev
)
135 dev
->caps
.port_mask
= 0;
136 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
)
137 if (dev
->caps
.port_type
[i
] == MLX4_PORT_TYPE_IB
)
138 dev
->caps
.port_mask
|= 1 << (i
- 1);
140 static int mlx4_dev_cap(struct mlx4_dev
*dev
, struct mlx4_dev_cap
*dev_cap
)
145 err
= mlx4_QUERY_DEV_CAP(dev
, dev_cap
);
147 mlx4_err(dev
, "QUERY_DEV_CAP command failed, aborting.\n");
151 if (dev_cap
->min_page_sz
> PAGE_SIZE
) {
152 mlx4_err(dev
, "HCA minimum page size of %d bigger than "
153 "kernel PAGE_SIZE of %ld, aborting.\n",
154 dev_cap
->min_page_sz
, PAGE_SIZE
);
157 if (dev_cap
->num_ports
> MLX4_MAX_PORTS
) {
158 mlx4_err(dev
, "HCA has %d ports, but we only support %d, "
160 dev_cap
->num_ports
, MLX4_MAX_PORTS
);
164 if (dev_cap
->uar_size
> pci_resource_len(dev
->pdev
, 2)) {
165 mlx4_err(dev
, "HCA reported UAR size of 0x%x bigger than "
166 "PCI resource 2 size of 0x%llx, aborting.\n",
168 (unsigned long long) pci_resource_len(dev
->pdev
, 2));
172 dev
->caps
.num_ports
= dev_cap
->num_ports
;
173 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
) {
174 dev
->caps
.vl_cap
[i
] = dev_cap
->max_vl
[i
];
175 dev
->caps
.ib_mtu_cap
[i
] = dev_cap
->ib_mtu
[i
];
176 dev
->caps
.gid_table_len
[i
] = dev_cap
->max_gids
[i
];
177 dev
->caps
.pkey_table_len
[i
] = dev_cap
->max_pkeys
[i
];
178 dev
->caps
.port_width_cap
[i
] = dev_cap
->max_port_width
[i
];
179 dev
->caps
.eth_mtu_cap
[i
] = dev_cap
->eth_mtu
[i
];
180 dev
->caps
.def_mac
[i
] = dev_cap
->def_mac
[i
];
181 dev
->caps
.supported_type
[i
] = dev_cap
->supported_port_types
[i
];
184 dev
->caps
.num_uars
= dev_cap
->uar_size
/ PAGE_SIZE
;
185 dev
->caps
.local_ca_ack_delay
= dev_cap
->local_ca_ack_delay
;
186 dev
->caps
.bf_reg_size
= dev_cap
->bf_reg_size
;
187 dev
->caps
.bf_regs_per_page
= dev_cap
->bf_regs_per_page
;
188 dev
->caps
.max_sq_sg
= dev_cap
->max_sq_sg
;
189 dev
->caps
.max_rq_sg
= dev_cap
->max_rq_sg
;
190 dev
->caps
.max_wqes
= dev_cap
->max_qp_sz
;
191 dev
->caps
.max_qp_init_rdma
= dev_cap
->max_requester_per_qp
;
192 dev
->caps
.max_srq_wqes
= dev_cap
->max_srq_sz
;
193 dev
->caps
.max_srq_sge
= dev_cap
->max_rq_sg
- 1;
194 dev
->caps
.reserved_srqs
= dev_cap
->reserved_srqs
;
195 dev
->caps
.max_sq_desc_sz
= dev_cap
->max_sq_desc_sz
;
196 dev
->caps
.max_rq_desc_sz
= dev_cap
->max_rq_desc_sz
;
197 dev
->caps
.num_qp_per_mgm
= MLX4_QP_PER_MGM
;
199 * Subtract 1 from the limit because we need to allocate a
200 * spare CQE so the HCA HW can tell the difference between an
201 * empty CQ and a full CQ.
203 dev
->caps
.max_cqes
= dev_cap
->max_cq_sz
- 1;
204 dev
->caps
.reserved_cqs
= dev_cap
->reserved_cqs
;
205 dev
->caps
.reserved_eqs
= dev_cap
->reserved_eqs
;
206 dev
->caps
.reserved_mtts
= DIV_ROUND_UP(dev_cap
->reserved_mtts
,
207 MLX4_MTT_ENTRY_PER_SEG
);
208 dev
->caps
.reserved_mrws
= dev_cap
->reserved_mrws
;
209 dev
->caps
.reserved_uars
= dev_cap
->reserved_uars
;
210 dev
->caps
.reserved_pds
= dev_cap
->reserved_pds
;
211 dev
->caps
.mtt_entry_sz
= MLX4_MTT_ENTRY_PER_SEG
* dev_cap
->mtt_entry_sz
;
212 dev
->caps
.max_msg_sz
= dev_cap
->max_msg_sz
;
213 dev
->caps
.page_size_cap
= ~(u32
) (dev_cap
->min_page_sz
- 1);
214 dev
->caps
.flags
= dev_cap
->flags
;
215 dev
->caps
.bmme_flags
= dev_cap
->bmme_flags
;
216 dev
->caps
.reserved_lkey
= dev_cap
->reserved_lkey
;
217 dev
->caps
.stat_rate_support
= dev_cap
->stat_rate_support
;
218 dev
->caps
.max_gso_sz
= dev_cap
->max_gso_sz
;
220 dev
->caps
.log_num_macs
= log_num_mac
;
221 dev
->caps
.log_num_vlans
= log_num_vlan
;
222 dev
->caps
.log_num_prios
= use_prio
? 3 : 0;
224 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
) {
225 if (dev
->caps
.supported_type
[i
] != MLX4_PORT_TYPE_ETH
)
226 dev
->caps
.port_type
[i
] = MLX4_PORT_TYPE_IB
;
228 dev
->caps
.port_type
[i
] = MLX4_PORT_TYPE_ETH
;
229 dev
->caps
.possible_type
[i
] = dev
->caps
.port_type
[i
];
230 mlx4_priv(dev
)->sense
.sense_allowed
[i
] =
231 dev
->caps
.supported_type
[i
] == MLX4_PORT_TYPE_AUTO
;
233 if (dev
->caps
.log_num_macs
> dev_cap
->log_max_macs
[i
]) {
234 dev
->caps
.log_num_macs
= dev_cap
->log_max_macs
[i
];
235 mlx4_warn(dev
, "Requested number of MACs is too much "
236 "for port %d, reducing to %d.\n",
237 i
, 1 << dev
->caps
.log_num_macs
);
239 if (dev
->caps
.log_num_vlans
> dev_cap
->log_max_vlans
[i
]) {
240 dev
->caps
.log_num_vlans
= dev_cap
->log_max_vlans
[i
];
241 mlx4_warn(dev
, "Requested number of VLANs is too much "
242 "for port %d, reducing to %d.\n",
243 i
, 1 << dev
->caps
.log_num_vlans
);
247 mlx4_set_port_mask(dev
);
249 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
] = dev_cap
->reserved_qps
;
250 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_ETH_ADDR
] =
251 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_ADDR
] =
252 (1 << dev
->caps
.log_num_macs
) *
253 (1 << dev
->caps
.log_num_vlans
) *
254 (1 << dev
->caps
.log_num_prios
) *
256 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_EXCH
] = MLX4_NUM_FEXCH
;
258 dev
->caps
.reserved_qps
= dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
] +
259 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_ETH_ADDR
] +
260 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_ADDR
] +
261 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_EXCH
];
267 * Change the port configuration of the device.
268 * Every user of this function must hold the port mutex.
270 int mlx4_change_port_types(struct mlx4_dev
*dev
,
271 enum mlx4_port_type
*port_types
)
277 for (port
= 0; port
< dev
->caps
.num_ports
; port
++) {
278 /* Change the port type only if the new type is different
279 * from the current, and not set to Auto */
280 if (port_types
[port
] != dev
->caps
.port_type
[port
+ 1]) {
282 dev
->caps
.port_type
[port
+ 1] = port_types
[port
];
286 mlx4_unregister_device(dev
);
287 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++) {
288 mlx4_CLOSE_PORT(dev
, port
);
289 err
= mlx4_SET_PORT(dev
, port
);
291 mlx4_err(dev
, "Failed to set port %d, "
296 mlx4_set_port_mask(dev
);
297 err
= mlx4_register_device(dev
);
304 static ssize_t
show_port_type(struct device
*dev
,
305 struct device_attribute
*attr
,
308 struct mlx4_port_info
*info
= container_of(attr
, struct mlx4_port_info
,
310 struct mlx4_dev
*mdev
= info
->dev
;
314 (mdev
->caps
.port_type
[info
->port
] == MLX4_PORT_TYPE_IB
) ?
316 if (mdev
->caps
.possible_type
[info
->port
] == MLX4_PORT_TYPE_AUTO
)
317 sprintf(buf
, "auto (%s)\n", type
);
319 sprintf(buf
, "%s\n", type
);
324 static ssize_t
set_port_type(struct device
*dev
,
325 struct device_attribute
*attr
,
326 const char *buf
, size_t count
)
328 struct mlx4_port_info
*info
= container_of(attr
, struct mlx4_port_info
,
330 struct mlx4_dev
*mdev
= info
->dev
;
331 struct mlx4_priv
*priv
= mlx4_priv(mdev
);
332 enum mlx4_port_type types
[MLX4_MAX_PORTS
];
333 enum mlx4_port_type new_types
[MLX4_MAX_PORTS
];
337 if (!strcmp(buf
, "ib\n"))
338 info
->tmp_type
= MLX4_PORT_TYPE_IB
;
339 else if (!strcmp(buf
, "eth\n"))
340 info
->tmp_type
= MLX4_PORT_TYPE_ETH
;
341 else if (!strcmp(buf
, "auto\n"))
342 info
->tmp_type
= MLX4_PORT_TYPE_AUTO
;
344 mlx4_err(mdev
, "%s is not supported port type\n", buf
);
348 mlx4_stop_sense(mdev
);
349 mutex_lock(&priv
->port_mutex
);
350 /* Possible type is always the one that was delivered */
351 mdev
->caps
.possible_type
[info
->port
] = info
->tmp_type
;
353 for (i
= 0; i
< mdev
->caps
.num_ports
; i
++) {
354 types
[i
] = priv
->port
[i
+1].tmp_type
? priv
->port
[i
+1].tmp_type
:
355 mdev
->caps
.possible_type
[i
+1];
356 if (types
[i
] == MLX4_PORT_TYPE_AUTO
)
357 types
[i
] = mdev
->caps
.port_type
[i
+1];
360 if (!(mdev
->caps
.flags
& MLX4_DEV_CAP_FLAG_DPDP
)) {
361 for (i
= 1; i
<= mdev
->caps
.num_ports
; i
++) {
362 if (mdev
->caps
.possible_type
[i
] == MLX4_PORT_TYPE_AUTO
) {
363 mdev
->caps
.possible_type
[i
] = mdev
->caps
.port_type
[i
];
369 mlx4_err(mdev
, "Auto sensing is not supported on this HCA. "
370 "Set only 'eth' or 'ib' for both ports "
371 "(should be the same)\n");
375 mlx4_do_sense_ports(mdev
, new_types
, types
);
377 err
= mlx4_check_port_params(mdev
, new_types
);
381 /* We are about to apply the changes after the configuration
382 * was verified, no need to remember the temporary types
384 for (i
= 0; i
< mdev
->caps
.num_ports
; i
++)
385 priv
->port
[i
+ 1].tmp_type
= 0;
387 err
= mlx4_change_port_types(mdev
, new_types
);
390 mlx4_start_sense(mdev
);
391 mutex_unlock(&priv
->port_mutex
);
392 return err
? err
: count
;
395 static int mlx4_load_fw(struct mlx4_dev
*dev
)
397 struct mlx4_priv
*priv
= mlx4_priv(dev
);
400 priv
->fw
.fw_icm
= mlx4_alloc_icm(dev
, priv
->fw
.fw_pages
,
401 GFP_HIGHUSER
| __GFP_NOWARN
, 0);
402 if (!priv
->fw
.fw_icm
) {
403 mlx4_err(dev
, "Couldn't allocate FW area, aborting.\n");
407 err
= mlx4_MAP_FA(dev
, priv
->fw
.fw_icm
);
409 mlx4_err(dev
, "MAP_FA command failed, aborting.\n");
413 err
= mlx4_RUN_FW(dev
);
415 mlx4_err(dev
, "RUN_FW command failed, aborting.\n");
425 mlx4_free_icm(dev
, priv
->fw
.fw_icm
, 0);
429 static int mlx4_init_cmpt_table(struct mlx4_dev
*dev
, u64 cmpt_base
,
432 struct mlx4_priv
*priv
= mlx4_priv(dev
);
435 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.cmpt_table
,
437 ((u64
) (MLX4_CMPT_TYPE_QP
*
438 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
439 cmpt_entry_sz
, dev
->caps
.num_qps
,
440 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
445 err
= mlx4_init_icm_table(dev
, &priv
->srq_table
.cmpt_table
,
447 ((u64
) (MLX4_CMPT_TYPE_SRQ
*
448 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
449 cmpt_entry_sz
, dev
->caps
.num_srqs
,
450 dev
->caps
.reserved_srqs
, 0, 0);
454 err
= mlx4_init_icm_table(dev
, &priv
->cq_table
.cmpt_table
,
456 ((u64
) (MLX4_CMPT_TYPE_CQ
*
457 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
458 cmpt_entry_sz
, dev
->caps
.num_cqs
,
459 dev
->caps
.reserved_cqs
, 0, 0);
463 err
= mlx4_init_icm_table(dev
, &priv
->eq_table
.cmpt_table
,
465 ((u64
) (MLX4_CMPT_TYPE_EQ
*
466 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
468 dev
->caps
.num_eqs
, dev
->caps
.num_eqs
, 0, 0);
475 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
478 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
481 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
487 static int mlx4_init_icm(struct mlx4_dev
*dev
, struct mlx4_dev_cap
*dev_cap
,
488 struct mlx4_init_hca_param
*init_hca
, u64 icm_size
)
490 struct mlx4_priv
*priv
= mlx4_priv(dev
);
494 err
= mlx4_SET_ICM_SIZE(dev
, icm_size
, &aux_pages
);
496 mlx4_err(dev
, "SET_ICM_SIZE command failed, aborting.\n");
500 mlx4_dbg(dev
, "%lld KB of HCA context requires %lld KB aux memory.\n",
501 (unsigned long long) icm_size
>> 10,
502 (unsigned long long) aux_pages
<< 2);
504 priv
->fw
.aux_icm
= mlx4_alloc_icm(dev
, aux_pages
,
505 GFP_HIGHUSER
| __GFP_NOWARN
, 0);
506 if (!priv
->fw
.aux_icm
) {
507 mlx4_err(dev
, "Couldn't allocate aux memory, aborting.\n");
511 err
= mlx4_MAP_ICM_AUX(dev
, priv
->fw
.aux_icm
);
513 mlx4_err(dev
, "MAP_ICM_AUX command failed, aborting.\n");
517 err
= mlx4_init_cmpt_table(dev
, init_hca
->cmpt_base
, dev_cap
->cmpt_entry_sz
);
519 mlx4_err(dev
, "Failed to map cMPT context memory, aborting.\n");
523 err
= mlx4_map_eq_icm(dev
, init_hca
->eqc_base
);
525 mlx4_err(dev
, "Failed to map EQ context memory, aborting.\n");
530 * Reserved MTT entries must be aligned up to a cacheline
531 * boundary, since the FW will write to them, while the driver
532 * writes to all other MTT entries. (The variable
533 * dev->caps.mtt_entry_sz below is really the MTT segment
534 * size, not the raw entry size)
536 dev
->caps
.reserved_mtts
=
537 ALIGN(dev
->caps
.reserved_mtts
* dev
->caps
.mtt_entry_sz
,
538 dma_get_cache_alignment()) / dev
->caps
.mtt_entry_sz
;
540 err
= mlx4_init_icm_table(dev
, &priv
->mr_table
.mtt_table
,
542 dev
->caps
.mtt_entry_sz
,
543 dev
->caps
.num_mtt_segs
,
544 dev
->caps
.reserved_mtts
, 1, 0);
546 mlx4_err(dev
, "Failed to map MTT context memory, aborting.\n");
550 err
= mlx4_init_icm_table(dev
, &priv
->mr_table
.dmpt_table
,
552 dev_cap
->dmpt_entry_sz
,
554 dev
->caps
.reserved_mrws
, 1, 1);
556 mlx4_err(dev
, "Failed to map dMPT context memory, aborting.\n");
560 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.qp_table
,
562 dev_cap
->qpc_entry_sz
,
564 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
567 mlx4_err(dev
, "Failed to map QP context memory, aborting.\n");
571 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.auxc_table
,
573 dev_cap
->aux_entry_sz
,
575 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
578 mlx4_err(dev
, "Failed to map AUXC context memory, aborting.\n");
582 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.altc_table
,
584 dev_cap
->altc_entry_sz
,
586 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
589 mlx4_err(dev
, "Failed to map ALTC context memory, aborting.\n");
593 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.rdmarc_table
,
594 init_hca
->rdmarc_base
,
595 dev_cap
->rdmarc_entry_sz
<< priv
->qp_table
.rdmarc_shift
,
597 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
600 mlx4_err(dev
, "Failed to map RDMARC context memory, aborting\n");
604 err
= mlx4_init_icm_table(dev
, &priv
->cq_table
.table
,
606 dev_cap
->cqc_entry_sz
,
608 dev
->caps
.reserved_cqs
, 0, 0);
610 mlx4_err(dev
, "Failed to map CQ context memory, aborting.\n");
611 goto err_unmap_rdmarc
;
614 err
= mlx4_init_icm_table(dev
, &priv
->srq_table
.table
,
616 dev_cap
->srq_entry_sz
,
618 dev
->caps
.reserved_srqs
, 0, 0);
620 mlx4_err(dev
, "Failed to map SRQ context memory, aborting.\n");
625 * It's not strictly required, but for simplicity just map the
626 * whole multicast group table now. The table isn't very big
627 * and it's a lot easier than trying to track ref counts.
629 err
= mlx4_init_icm_table(dev
, &priv
->mcg_table
.table
,
630 init_hca
->mc_base
, MLX4_MGM_ENTRY_SIZE
,
631 dev
->caps
.num_mgms
+ dev
->caps
.num_amgms
,
632 dev
->caps
.num_mgms
+ dev
->caps
.num_amgms
,
635 mlx4_err(dev
, "Failed to map MCG context memory, aborting.\n");
642 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.table
);
645 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.table
);
648 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.rdmarc_table
);
651 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.altc_table
);
654 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.auxc_table
);
657 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.qp_table
);
660 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.dmpt_table
);
663 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.mtt_table
);
666 mlx4_unmap_eq_icm(dev
);
669 mlx4_cleanup_icm_table(dev
, &priv
->eq_table
.cmpt_table
);
670 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
671 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
672 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
675 mlx4_UNMAP_ICM_AUX(dev
);
678 mlx4_free_icm(dev
, priv
->fw
.aux_icm
, 0);
683 static void mlx4_free_icms(struct mlx4_dev
*dev
)
685 struct mlx4_priv
*priv
= mlx4_priv(dev
);
687 mlx4_cleanup_icm_table(dev
, &priv
->mcg_table
.table
);
688 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.table
);
689 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.table
);
690 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.rdmarc_table
);
691 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.altc_table
);
692 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.auxc_table
);
693 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.qp_table
);
694 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.dmpt_table
);
695 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.mtt_table
);
696 mlx4_cleanup_icm_table(dev
, &priv
->eq_table
.cmpt_table
);
697 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
698 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
699 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
700 mlx4_unmap_eq_icm(dev
);
702 mlx4_UNMAP_ICM_AUX(dev
);
703 mlx4_free_icm(dev
, priv
->fw
.aux_icm
, 0);
706 static void mlx4_close_hca(struct mlx4_dev
*dev
)
708 mlx4_CLOSE_HCA(dev
, 0);
711 mlx4_free_icm(dev
, mlx4_priv(dev
)->fw
.fw_icm
, 0);
714 static int mlx4_init_hca(struct mlx4_dev
*dev
)
716 struct mlx4_priv
*priv
= mlx4_priv(dev
);
717 struct mlx4_adapter adapter
;
718 struct mlx4_dev_cap dev_cap
;
719 struct mlx4_mod_stat_cfg mlx4_cfg
;
720 struct mlx4_profile profile
;
721 struct mlx4_init_hca_param init_hca
;
725 err
= mlx4_QUERY_FW(dev
);
727 mlx4_err(dev
, "QUERY_FW command failed, aborting.\n");
731 err
= mlx4_load_fw(dev
);
733 mlx4_err(dev
, "Failed to start FW, aborting.\n");
737 mlx4_cfg
.log_pg_sz_m
= 1;
738 mlx4_cfg
.log_pg_sz
= 0;
739 err
= mlx4_MOD_STAT_CFG(dev
, &mlx4_cfg
);
741 mlx4_warn(dev
, "Failed to override log_pg_sz parameter\n");
743 err
= mlx4_dev_cap(dev
, &dev_cap
);
745 mlx4_err(dev
, "QUERY_DEV_CAP command failed, aborting.\n");
749 profile
= default_profile
;
751 icm_size
= mlx4_make_profile(dev
, &profile
, &dev_cap
, &init_hca
);
752 if ((long long) icm_size
< 0) {
757 init_hca
.log_uar_sz
= ilog2(dev
->caps
.num_uars
);
759 err
= mlx4_init_icm(dev
, &dev_cap
, &init_hca
, icm_size
);
763 err
= mlx4_INIT_HCA(dev
, &init_hca
);
765 mlx4_err(dev
, "INIT_HCA command failed, aborting.\n");
769 err
= mlx4_QUERY_ADAPTER(dev
, &adapter
);
771 mlx4_err(dev
, "QUERY_ADAPTER command failed, aborting.\n");
775 priv
->eq_table
.inta_pin
= adapter
.inta_pin
;
776 memcpy(dev
->board_id
, adapter
.board_id
, sizeof dev
->board_id
);
788 mlx4_free_icm(dev
, priv
->fw
.fw_icm
, 0);
793 static int mlx4_setup_hca(struct mlx4_dev
*dev
)
795 struct mlx4_priv
*priv
= mlx4_priv(dev
);
798 __be32 ib_port_default_caps
;
800 err
= mlx4_init_uar_table(dev
);
802 mlx4_err(dev
, "Failed to initialize "
803 "user access region table, aborting.\n");
807 err
= mlx4_uar_alloc(dev
, &priv
->driver_uar
);
809 mlx4_err(dev
, "Failed to allocate driver access region, "
811 goto err_uar_table_free
;
814 priv
->kar
= ioremap(priv
->driver_uar
.pfn
<< PAGE_SHIFT
, PAGE_SIZE
);
816 mlx4_err(dev
, "Couldn't map kernel access region, "
822 err
= mlx4_init_pd_table(dev
);
824 mlx4_err(dev
, "Failed to initialize "
825 "protection domain table, aborting.\n");
829 err
= mlx4_init_mr_table(dev
);
831 mlx4_err(dev
, "Failed to initialize "
832 "memory region table, aborting.\n");
833 goto err_pd_table_free
;
836 err
= mlx4_init_eq_table(dev
);
838 mlx4_err(dev
, "Failed to initialize "
839 "event queue table, aborting.\n");
840 goto err_mr_table_free
;
843 err
= mlx4_cmd_use_events(dev
);
845 mlx4_err(dev
, "Failed to switch to event-driven "
846 "firmware commands, aborting.\n");
847 goto err_eq_table_free
;
852 if (dev
->flags
& MLX4_FLAG_MSI_X
) {
853 mlx4_warn(dev
, "NOP command failed to generate MSI-X "
854 "interrupt IRQ %d).\n",
855 priv
->eq_table
.eq
[dev
->caps
.num_comp_vectors
].irq
);
856 mlx4_warn(dev
, "Trying again without MSI-X.\n");
858 mlx4_err(dev
, "NOP command failed to generate interrupt "
859 "(IRQ %d), aborting.\n",
860 priv
->eq_table
.eq
[dev
->caps
.num_comp_vectors
].irq
);
861 mlx4_err(dev
, "BIOS or ACPI interrupt routing problem?\n");
867 mlx4_dbg(dev
, "NOP command IRQ test passed\n");
869 err
= mlx4_init_cq_table(dev
);
871 mlx4_err(dev
, "Failed to initialize "
872 "completion queue table, aborting.\n");
876 err
= mlx4_init_srq_table(dev
);
878 mlx4_err(dev
, "Failed to initialize "
879 "shared receive queue table, aborting.\n");
880 goto err_cq_table_free
;
883 err
= mlx4_init_qp_table(dev
);
885 mlx4_err(dev
, "Failed to initialize "
886 "queue pair table, aborting.\n");
887 goto err_srq_table_free
;
890 err
= mlx4_init_mcg_table(dev
);
892 mlx4_err(dev
, "Failed to initialize "
893 "multicast group table, aborting.\n");
894 goto err_qp_table_free
;
897 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++) {
898 ib_port_default_caps
= 0;
899 err
= mlx4_get_port_ib_caps(dev
, port
, &ib_port_default_caps
);
901 mlx4_warn(dev
, "failed to get port %d default "
902 "ib capabilities (%d). Continuing with "
903 "caps = 0\n", port
, err
);
904 dev
->caps
.ib_port_def_cap
[port
] = ib_port_default_caps
;
905 err
= mlx4_SET_PORT(dev
, port
);
907 mlx4_err(dev
, "Failed to set port %d, aborting\n",
909 goto err_mcg_table_free
;
916 mlx4_cleanup_mcg_table(dev
);
919 mlx4_cleanup_qp_table(dev
);
922 mlx4_cleanup_srq_table(dev
);
925 mlx4_cleanup_cq_table(dev
);
928 mlx4_cmd_use_polling(dev
);
931 mlx4_cleanup_eq_table(dev
);
934 mlx4_cleanup_mr_table(dev
);
937 mlx4_cleanup_pd_table(dev
);
943 mlx4_uar_free(dev
, &priv
->driver_uar
);
946 mlx4_cleanup_uar_table(dev
);
950 static void mlx4_enable_msi_x(struct mlx4_dev
*dev
)
952 struct mlx4_priv
*priv
= mlx4_priv(dev
);
953 struct msix_entry
*entries
;
959 nreq
= min_t(int, dev
->caps
.num_eqs
- dev
->caps
.reserved_eqs
,
960 num_possible_cpus() + 1);
961 entries
= kcalloc(nreq
, sizeof *entries
, GFP_KERNEL
);
965 for (i
= 0; i
< nreq
; ++i
)
966 entries
[i
].entry
= i
;
969 err
= pci_enable_msix(dev
->pdev
, entries
, nreq
);
971 /* Try again if at least 2 vectors are available */
973 mlx4_info(dev
, "Requested %d vectors, "
974 "but only %d MSI-X vectors available, "
975 "trying again\n", nreq
, err
);
983 dev
->caps
.num_comp_vectors
= nreq
- 1;
984 for (i
= 0; i
< nreq
; ++i
)
985 priv
->eq_table
.eq
[i
].irq
= entries
[i
].vector
;
987 dev
->flags
|= MLX4_FLAG_MSI_X
;
994 dev
->caps
.num_comp_vectors
= 1;
996 for (i
= 0; i
< 2; ++i
)
997 priv
->eq_table
.eq
[i
].irq
= dev
->pdev
->irq
;
1000 static int mlx4_init_port_info(struct mlx4_dev
*dev
, int port
)
1002 struct mlx4_port_info
*info
= &mlx4_priv(dev
)->port
[port
];
1007 mlx4_init_mac_table(dev
, &info
->mac_table
);
1008 mlx4_init_vlan_table(dev
, &info
->vlan_table
);
1010 sprintf(info
->dev_name
, "mlx4_port%d", port
);
1011 info
->port_attr
.attr
.name
= info
->dev_name
;
1012 info
->port_attr
.attr
.mode
= S_IRUGO
| S_IWUSR
;
1013 info
->port_attr
.show
= show_port_type
;
1014 info
->port_attr
.store
= set_port_type
;
1016 err
= device_create_file(&dev
->pdev
->dev
, &info
->port_attr
);
1018 mlx4_err(dev
, "Failed to create file for port %d\n", port
);
1025 static void mlx4_cleanup_port_info(struct mlx4_port_info
*info
)
1030 device_remove_file(&info
->dev
->pdev
->dev
, &info
->port_attr
);
1033 static int __mlx4_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
1035 struct mlx4_priv
*priv
;
1036 struct mlx4_dev
*dev
;
1040 printk(KERN_INFO PFX
"Initializing %s\n",
1043 err
= pci_enable_device(pdev
);
1045 dev_err(&pdev
->dev
, "Cannot enable PCI device, "
1051 * Check for BARs. We expect 0: 1MB
1053 if (!(pci_resource_flags(pdev
, 0) & IORESOURCE_MEM
) ||
1054 pci_resource_len(pdev
, 0) != 1 << 20) {
1055 dev_err(&pdev
->dev
, "Missing DCS, aborting.\n");
1057 goto err_disable_pdev
;
1059 if (!(pci_resource_flags(pdev
, 2) & IORESOURCE_MEM
)) {
1060 dev_err(&pdev
->dev
, "Missing UAR, aborting.\n");
1062 goto err_disable_pdev
;
1065 err
= pci_request_region(pdev
, 0, DRV_NAME
);
1067 dev_err(&pdev
->dev
, "Cannot request control region, aborting.\n");
1068 goto err_disable_pdev
;
1071 err
= pci_request_region(pdev
, 2, DRV_NAME
);
1073 dev_err(&pdev
->dev
, "Cannot request UAR region, aborting.\n");
1074 goto err_release_bar0
;
1077 pci_set_master(pdev
);
1079 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(64));
1081 dev_warn(&pdev
->dev
, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1082 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
1084 dev_err(&pdev
->dev
, "Can't set PCI DMA mask, aborting.\n");
1085 goto err_release_bar2
;
1088 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64));
1090 dev_warn(&pdev
->dev
, "Warning: couldn't set 64-bit "
1091 "consistent PCI DMA mask.\n");
1092 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
1094 dev_err(&pdev
->dev
, "Can't set consistent PCI DMA mask, "
1096 goto err_release_bar2
;
1100 priv
= kzalloc(sizeof *priv
, GFP_KERNEL
);
1102 dev_err(&pdev
->dev
, "Device struct alloc failed, "
1105 goto err_release_bar2
;
1110 INIT_LIST_HEAD(&priv
->ctx_list
);
1111 spin_lock_init(&priv
->ctx_lock
);
1113 mutex_init(&priv
->port_mutex
);
1115 INIT_LIST_HEAD(&priv
->pgdir_list
);
1116 mutex_init(&priv
->pgdir_mutex
);
1119 * Now reset the HCA before we touch the PCI capabilities or
1120 * attempt a firmware command, since a boot ROM may have left
1121 * the HCA in an undefined state.
1123 err
= mlx4_reset(dev
);
1125 mlx4_err(dev
, "Failed to reset HCA, aborting.\n");
1129 if (mlx4_cmd_init(dev
)) {
1130 mlx4_err(dev
, "Failed to init command interface, aborting.\n");
1134 err
= mlx4_init_hca(dev
);
1138 err
= mlx4_alloc_eq_table(dev
);
1142 mlx4_enable_msi_x(dev
);
1144 err
= mlx4_setup_hca(dev
);
1145 if (err
== -EBUSY
&& (dev
->flags
& MLX4_FLAG_MSI_X
)) {
1146 dev
->flags
&= ~MLX4_FLAG_MSI_X
;
1147 pci_disable_msix(pdev
);
1148 err
= mlx4_setup_hca(dev
);
1154 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++) {
1155 err
= mlx4_init_port_info(dev
, port
);
1160 err
= mlx4_register_device(dev
);
1164 mlx4_sense_init(dev
);
1165 mlx4_start_sense(dev
);
1167 pci_set_drvdata(pdev
, dev
);
1172 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++)
1173 mlx4_cleanup_port_info(&priv
->port
[port
]);
1175 mlx4_cleanup_mcg_table(dev
);
1176 mlx4_cleanup_qp_table(dev
);
1177 mlx4_cleanup_srq_table(dev
);
1178 mlx4_cleanup_cq_table(dev
);
1179 mlx4_cmd_use_polling(dev
);
1180 mlx4_cleanup_eq_table(dev
);
1181 mlx4_cleanup_mr_table(dev
);
1182 mlx4_cleanup_pd_table(dev
);
1183 mlx4_cleanup_uar_table(dev
);
1186 mlx4_free_eq_table(dev
);
1189 if (dev
->flags
& MLX4_FLAG_MSI_X
)
1190 pci_disable_msix(pdev
);
1192 mlx4_close_hca(dev
);
1195 mlx4_cmd_cleanup(dev
);
1201 pci_release_region(pdev
, 2);
1204 pci_release_region(pdev
, 0);
1207 pci_disable_device(pdev
);
1208 pci_set_drvdata(pdev
, NULL
);
1212 static int __devinit
mlx4_init_one(struct pci_dev
*pdev
,
1213 const struct pci_device_id
*id
)
1215 static int mlx4_version_printed
;
1217 if (!mlx4_version_printed
) {
1218 printk(KERN_INFO
"%s", mlx4_version
);
1219 ++mlx4_version_printed
;
1222 return __mlx4_init_one(pdev
, id
);
1225 static void mlx4_remove_one(struct pci_dev
*pdev
)
1227 struct mlx4_dev
*dev
= pci_get_drvdata(pdev
);
1228 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1232 mlx4_stop_sense(dev
);
1233 mlx4_unregister_device(dev
);
1235 for (p
= 1; p
<= dev
->caps
.num_ports
; p
++) {
1236 mlx4_cleanup_port_info(&priv
->port
[p
]);
1237 mlx4_CLOSE_PORT(dev
, p
);
1240 mlx4_cleanup_mcg_table(dev
);
1241 mlx4_cleanup_qp_table(dev
);
1242 mlx4_cleanup_srq_table(dev
);
1243 mlx4_cleanup_cq_table(dev
);
1244 mlx4_cmd_use_polling(dev
);
1245 mlx4_cleanup_eq_table(dev
);
1246 mlx4_cleanup_mr_table(dev
);
1247 mlx4_cleanup_pd_table(dev
);
1250 mlx4_uar_free(dev
, &priv
->driver_uar
);
1251 mlx4_cleanup_uar_table(dev
);
1252 mlx4_free_eq_table(dev
);
1253 mlx4_close_hca(dev
);
1254 mlx4_cmd_cleanup(dev
);
1256 if (dev
->flags
& MLX4_FLAG_MSI_X
)
1257 pci_disable_msix(pdev
);
1260 pci_release_region(pdev
, 2);
1261 pci_release_region(pdev
, 0);
1262 pci_disable_device(pdev
);
1263 pci_set_drvdata(pdev
, NULL
);
1267 int mlx4_restart_one(struct pci_dev
*pdev
)
1269 mlx4_remove_one(pdev
);
1270 return __mlx4_init_one(pdev
, NULL
);
1273 static struct pci_device_id mlx4_pci_table
[] = {
1274 { PCI_VDEVICE(MELLANOX
, 0x6340) }, /* MT25408 "Hermon" SDR */
1275 { PCI_VDEVICE(MELLANOX
, 0x634a) }, /* MT25408 "Hermon" DDR */
1276 { PCI_VDEVICE(MELLANOX
, 0x6354) }, /* MT25408 "Hermon" QDR */
1277 { PCI_VDEVICE(MELLANOX
, 0x6732) }, /* MT25408 "Hermon" DDR PCIe gen2 */
1278 { PCI_VDEVICE(MELLANOX
, 0x673c) }, /* MT25408 "Hermon" QDR PCIe gen2 */
1279 { PCI_VDEVICE(MELLANOX
, 0x6368) }, /* MT25408 "Hermon" EN 10GigE */
1280 { PCI_VDEVICE(MELLANOX
, 0x6750) }, /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
1281 { PCI_VDEVICE(MELLANOX
, 0x6372) }, /* MT25458 ConnectX EN 10GBASE-T 10GigE */
1282 { PCI_VDEVICE(MELLANOX
, 0x675a) }, /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
1286 MODULE_DEVICE_TABLE(pci
, mlx4_pci_table
);
1288 static struct pci_driver mlx4_driver
= {
1290 .id_table
= mlx4_pci_table
,
1291 .probe
= mlx4_init_one
,
1292 .remove
= __devexit_p(mlx4_remove_one
)
1295 static int __init
mlx4_verify_params(void)
1297 if ((log_num_mac
< 0) || (log_num_mac
> 7)) {
1298 printk(KERN_WARNING
"mlx4_core: bad num_mac: %d\n", log_num_mac
);
1302 if ((log_num_vlan
< 0) || (log_num_vlan
> 7)) {
1303 printk(KERN_WARNING
"mlx4_core: bad num_vlan: %d\n", log_num_vlan
);
1310 static int __init
mlx4_init(void)
1314 if (mlx4_verify_params())
1319 mlx4_wq
= create_singlethread_workqueue("mlx4");
1323 ret
= pci_register_driver(&mlx4_driver
);
1324 return ret
< 0 ? ret
: 0;
1327 static void __exit
mlx4_cleanup(void)
1329 pci_unregister_driver(&mlx4_driver
);
1330 destroy_workqueue(mlx4_wq
);
1333 module_init(mlx4_init
);
1334 module_exit(mlx4_cleanup
);