drivers/net/mlx4/mlx4.h

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005, 2006, 2007 Cisco Systems.  All rights reserved.
   5  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
   6  * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
   7  *
   8  * This software is available to you under a choice of one of two
   9  * licenses.  You may choose to be licensed under the terms of the GNU
  10  * General Public License (GPL) Version 2, available from the file
  11  * COPYING in the main directory of this source tree, or the
  12  * OpenIB.org BSD license below:
  13  *
  14  *     Redistribution and use in source and binary forms, with or
  15  *     without modification, are permitted provided that the following
  16  *     conditions are met:
  17  *
  18  *      - Redistributions of source code must retain the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer.
  21  *
  22  *      - Redistributions in binary form must reproduce the above
  23  *        copyright notice, this list of conditions and the following
  24  *        disclaimer in the documentation and/or other materials
  25  *        provided with the distribution.
  26  *
  27  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34  * SOFTWARE.
  35  */
  36
  37 #ifndef MLX4_H
  38 #define MLX4_H
  39
  40 #include <linux/mutex.h>
  41 #include <linux/radix-tree.h>
  42 #include <linux/timer.h>
  43
  44 #include <linux/mlx4/device.h>
  45 #include <linux/mlx4/driver.h>
  46 #include <linux/mlx4/doorbell.h>
  47
  48 #define DRV_NAME        "mlx4_core"
  49 #define PFX             DRV_NAME ": "
  50 #define DRV_VERSION     "0.01"
  51 #define DRV_RELDATE     "May 1, 2007"
  52
  53 enum {
  54         MLX4_HCR_BASE           = 0x80680,
  55         MLX4_HCR_SIZE           = 0x0001c,
  56         MLX4_CLR_INT_SIZE       = 0x00008
  57 };
  58
  59 enum {
  60         MLX4_MGM_ENTRY_SIZE     =  0x100,
  61         MLX4_QP_PER_MGM         = 4 * (MLX4_MGM_ENTRY_SIZE / 16 - 2),
  62         MLX4_MTT_ENTRY_PER_SEG  = 8
  63 };
  64
  65 enum {
  66         MLX4_EQ_ASYNC,
  67         MLX4_EQ_COMP,
  68         MLX4_NUM_EQ
  69 };
  70
  71 enum {
  72         MLX4_NUM_PDS            = 1 << 15
  73 };
  74
  75 enum {
  76         MLX4_CMPT_TYPE_QP       = 0,
  77         MLX4_CMPT_TYPE_SRQ      = 1,
  78         MLX4_CMPT_TYPE_CQ       = 2,
  79         MLX4_CMPT_TYPE_EQ       = 3,
  80         MLX4_CMPT_NUM_TYPE
  81 };
  82
  83 enum {
  84         MLX4_CMPT_SHIFT         = 24,
  85         MLX4_NUM_CMPTS          = MLX4_CMPT_NUM_TYPE << MLX4_CMPT_SHIFT
  86 };
  87
  88 #ifdef CONFIG_MLX4_DEBUG
  89 extern int mlx4_debug_level;
  90
  91 #define mlx4_dbg(mdev, format, arg...)                                  \
  92         do {                                                            \
  93                 if (mlx4_debug_level)                                   \
  94                         dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ## arg); \
  95         } while (0)
  96
  97 #else /* CONFIG_MLX4_DEBUG */
  98
  99 #define mlx4_dbg(mdev, format, arg...) do { (void) mdev; } while (0)
 100
 101 #endif /* CONFIG_MLX4_DEBUG */
 102
 103 #define mlx4_err(mdev, format, arg...) \
 104         dev_err(&mdev->pdev->dev, format, ## arg)
 105 #define mlx4_info(mdev, format, arg...) \
 106         dev_info(&mdev->pdev->dev, format, ## arg)
 107 #define mlx4_warn(mdev, format, arg...) \
 108         dev_warn(&mdev->pdev->dev, format, ## arg)
 109
 110 struct mlx4_bitmap {
 111         u32                     last;
 112         u32                     top;
 113         u32                     max;
 114         u32                     mask;
 115         spinlock_t              lock;
 116         unsigned long          *table;
 117 };
 118
 119 struct mlx4_buddy {
 120         unsigned long         **bits;
 121         int                     max_order;
 122         spinlock_t              lock;
 123 };
 124
 125 struct mlx4_icm;
 126
 127 struct mlx4_icm_table {
 128         u64                     virt;
 129         int                     num_icm;
 130         int                     num_obj;
 131         int                     obj_size;
 132         int                     lowmem;
 133         int                     coherent;
 134         struct mutex            mutex;
 135         struct mlx4_icm       **icm;
 136 };
 137
 138 struct mlx4_eq {
 139         struct mlx4_dev        *dev;
 140         void __iomem           *doorbell;
 141         int                     eqn;
 142         u32                     cons_index;
 143         u16                     irq;
 144         u16                     have_irq;
 145         int                     nent;
 146         struct mlx4_buf_list   *page_list;
 147         struct mlx4_mtt         mtt;
 148 };
 149
 150 struct mlx4_profile {
 151         int                     num_qp;
 152         int                     rdmarc_per_qp;
 153         int                     num_srq;
 154         int                     num_cq;
 155         int                     num_mcg;
 156         int                     num_mpt;
 157         int                     num_mtt;
 158 };
 159
 160 struct mlx4_fw {
 161         u64                     clr_int_base;
 162         u64                     catas_offset;
 163         struct mlx4_icm        *fw_icm;
 164         struct mlx4_icm        *aux_icm;
 165         u32                     catas_size;
 166         u16                     fw_pages;
 167         u8                      clr_int_bar;
 168         u8                      catas_bar;
 169 };
 170
 171 struct mlx4_cmd {
 172         struct pci_pool        *pool;
 173         void __iomem           *hcr;
 174         struct mutex            hcr_mutex;
 175         struct semaphore        poll_sem;
 176         struct semaphore        event_sem;
 177         int                     max_cmds;
 178         spinlock_t              context_lock;
 179         int                     free_head;
 180         struct mlx4_cmd_context *context;
 181         u16                     token_mask;
 182         u8                      use_events;
 183         u8                      toggle;
 184 };
 185
 186 struct mlx4_uar_table {
 187         struct mlx4_bitmap      bitmap;
 188 };
 189
 190 struct mlx4_mr_table {
 191         struct mlx4_bitmap      mpt_bitmap;
 192         struct mlx4_buddy       mtt_buddy;
 193         u64                     mtt_base;
 194         u64                     mpt_base;
 195         struct mlx4_icm_table   mtt_table;
 196         struct mlx4_icm_table   dmpt_table;
 197 };
 198
 199 struct mlx4_cq_table {
 200         struct mlx4_bitmap      bitmap;
 201         spinlock_t              lock;
 202         struct radix_tree_root  tree;
 203         struct mlx4_icm_table   table;
 204         struct mlx4_icm_table   cmpt_table;
 205 };
 206
 207 struct mlx4_eq_table {
 208         struct mlx4_bitmap      bitmap;
 209         void __iomem           *clr_int;
 210         void __iomem           *uar_map[(MLX4_NUM_EQ + 6) / 4];
 211         u32                     clr_mask;
 212         struct mlx4_eq          eq[MLX4_NUM_EQ];
 213         u64                     icm_virt;
 214         struct page            *icm_page;
 215         dma_addr_t              icm_dma;
 216         struct mlx4_icm_table   cmpt_table;
 217         int                     have_irq;
 218         u8                      inta_pin;
 219 };
 220
 221 struct mlx4_srq_table {
 222         struct mlx4_bitmap      bitmap;
 223         spinlock_t              lock;
 224         struct radix_tree_root  tree;
 225         struct mlx4_icm_table   table;
 226         struct mlx4_icm_table   cmpt_table;
 227 };
 228
 229 struct mlx4_qp_table {
 230         struct mlx4_bitmap      bitmap;
 231         u32                     rdmarc_base;
 232         int                     rdmarc_shift;
 233         spinlock_t              lock;
 234         struct mlx4_icm_table   qp_table;
 235         struct mlx4_icm_table   auxc_table;
 236         struct mlx4_icm_table   altc_table;
 237         struct mlx4_icm_table   rdmarc_table;
 238         struct mlx4_icm_table   cmpt_table;
 239 };
 240
 241 struct mlx4_mcg_table {
 242         struct mutex            mutex;
 243         struct mlx4_bitmap      bitmap;
 244         struct mlx4_icm_table   table;
 245 };
 246
 247 struct mlx4_catas_err {
 248         u32 __iomem            *map;
 249         struct timer_list       timer;
 250         struct list_head        list;
 251 };
 252
 253 struct mlx4_priv {
 254         struct mlx4_dev         dev;
 255
 256         struct list_head        dev_list;
 257         struct list_head        ctx_list;
 258         spinlock_t              ctx_lock;
 259
 260         struct mlx4_fw          fw;
 261         struct mlx4_cmd         cmd;
 262
 263         struct mlx4_bitmap      pd_bitmap;
 264         struct mlx4_uar_table   uar_table;
 265         struct mlx4_mr_table    mr_table;
 266         struct mlx4_cq_table    cq_table;
 267         struct mlx4_eq_table    eq_table;
 268         struct mlx4_srq_table   srq_table;
 269         struct mlx4_qp_table    qp_table;
 270         struct mlx4_mcg_table   mcg_table;
 271
 272         struct mlx4_catas_err   catas_err;
 273
 274         void __iomem           *clr_base;
 275
 276         struct mlx4_uar         driver_uar;
 277         void __iomem           *kar;
 278 };
 279
 280 static inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev)
 281 {
 282         return container_of(dev, struct mlx4_priv, dev);
 283 }
 284
 285 u32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap);
 286 void mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj);
 287 int mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask, u32 reserved);
 288 void mlx4_bitmap_cleanup(struct mlx4_bitmap *bitmap);
 289
 290 int mlx4_reset(struct mlx4_dev *dev);
 291
 292 int mlx4_init_pd_table(struct mlx4_dev *dev);
 293 int mlx4_init_uar_table(struct mlx4_dev *dev);
 294 int mlx4_init_mr_table(struct mlx4_dev *dev);
 295 int mlx4_init_eq_table(struct mlx4_dev *dev);
 296 int mlx4_init_cq_table(struct mlx4_dev *dev);
 297 int mlx4_init_qp_table(struct mlx4_dev *dev);
 298 int mlx4_init_srq_table(struct mlx4_dev *dev);
 299 int mlx4_init_mcg_table(struct mlx4_dev *dev);
 300
 301 void mlx4_cleanup_pd_table(struct mlx4_dev *dev);
 302 void mlx4_cleanup_uar_table(struct mlx4_dev *dev);
 303 void mlx4_cleanup_mr_table(struct mlx4_dev *dev);
 304 void mlx4_cleanup_eq_table(struct mlx4_dev *dev);
 305 void mlx4_cleanup_cq_table(struct mlx4_dev *dev);
 306 void mlx4_cleanup_qp_table(struct mlx4_dev *dev);
 307 void mlx4_cleanup_srq_table(struct mlx4_dev *dev);
 308 void mlx4_cleanup_mcg_table(struct mlx4_dev *dev);
 309
 310 void mlx4_start_catas_poll(struct mlx4_dev *dev);
 311 void mlx4_stop_catas_poll(struct mlx4_dev *dev);
 312 int mlx4_catas_init(void);
 313 void mlx4_catas_cleanup(void);
 314 int mlx4_restart_one(struct pci_dev *pdev);
 315 int mlx4_register_device(struct mlx4_dev *dev);
 316 void mlx4_unregister_device(struct mlx4_dev *dev);
 317 void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, int port);
 318
 319 struct mlx4_dev_cap;
 320 struct mlx4_init_hca_param;
 321
 322 u64 mlx4_make_profile(struct mlx4_dev *dev,
 323                       struct mlx4_profile *request,
 324                       struct mlx4_dev_cap *dev_cap,
 325                       struct mlx4_init_hca_param *init_hca);
 326
 327 int mlx4_map_eq_icm(struct mlx4_dev *dev, u64 icm_virt);
 328 void mlx4_unmap_eq_icm(struct mlx4_dev *dev);
 329
 330 int mlx4_cmd_init(struct mlx4_dev *dev);
 331 void mlx4_cmd_cleanup(struct mlx4_dev *dev);
 332 void mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param);
 333 int mlx4_cmd_use_events(struct mlx4_dev *dev);
 334 void mlx4_cmd_use_polling(struct mlx4_dev *dev);
 335
 336 void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn);
 337 void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type);
 338
 339 void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type);
 340
 341 void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type);
 342
 343 void mlx4_handle_catas_err(struct mlx4_dev *dev);
 344
 345 #endif /* MLX4_H */