2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved.
5 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
6 * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
40 #include <linux/mutex.h>
41 #include <linux/radix-tree.h>
42 #include <linux/timer.h>
43 #include <linux/semaphore.h>
44 #include <linux/workqueue.h>
46 #include <linux/mlx4/device.h>
47 #include <linux/mlx4/driver.h>
48 #include <linux/mlx4/doorbell.h>
50 #define DRV_NAME "mlx4_core"
51 #define DRV_VERSION "0.01"
52 #define DRV_RELDATE "May 1, 2007"
55 MLX4_HCR_BASE
= 0x80680,
56 MLX4_HCR_SIZE
= 0x0001c,
57 MLX4_CLR_INT_SIZE
= 0x00008
61 MLX4_MGM_ENTRY_SIZE
= 0x100,
62 MLX4_QP_PER_MGM
= 4 * (MLX4_MGM_ENTRY_SIZE
/ 16 - 2),
63 MLX4_MTT_ENTRY_PER_SEG
= 8
67 MLX4_NUM_PDS
= 1 << 15
71 MLX4_CMPT_TYPE_QP
= 0,
72 MLX4_CMPT_TYPE_SRQ
= 1,
73 MLX4_CMPT_TYPE_CQ
= 2,
74 MLX4_CMPT_TYPE_EQ
= 3,
80 MLX4_NUM_CMPTS
= MLX4_CMPT_NUM_TYPE
<< MLX4_CMPT_SHIFT
83 #ifdef CONFIG_MLX4_DEBUG
84 extern int mlx4_debug_level
;
85 #else /* CONFIG_MLX4_DEBUG */
86 #define mlx4_debug_level (0)
87 #endif /* CONFIG_MLX4_DEBUG */
89 #define mlx4_dbg(mdev, format, arg...) \
91 if (mlx4_debug_level) \
92 dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ##arg); \
95 #define mlx4_err(mdev, format, arg...) \
96 dev_err(&mdev->pdev->dev, format, ##arg)
97 #define mlx4_info(mdev, format, arg...) \
98 dev_info(&mdev->pdev->dev, format, ##arg)
99 #define mlx4_warn(mdev, format, arg...) \
100 dev_warn(&mdev->pdev->dev, format, ##arg)
110 unsigned long *table
;
114 unsigned long **bits
;
115 unsigned int *num_free
;
122 struct mlx4_icm_table
{
130 struct mlx4_icm
**icm
;
134 struct mlx4_dev
*dev
;
135 void __iomem
*doorbell
;
141 struct mlx4_buf_list
*page_list
;
145 struct mlx4_profile
{
158 struct mlx4_icm
*fw_icm
;
159 struct mlx4_icm
*aux_icm
;
166 #define MGM_QPN_MASK 0x00FFFFFF
167 #define MGM_BLCK_LB_BIT 30
169 struct mlx4_promisc_qp
{
170 struct list_head list
;
174 struct mlx4_steer_index
{
175 struct list_head list
;
177 struct list_head duplicates
;
181 __be32 next_gid_index
;
182 __be32 members_count
;
185 __be32 qp
[MLX4_QP_PER_MGM
];
188 struct pci_pool
*pool
;
190 struct mutex hcr_mutex
;
191 struct semaphore poll_sem
;
192 struct semaphore event_sem
;
194 spinlock_t context_lock
;
196 struct mlx4_cmd_context
*context
;
202 struct mlx4_uar_table
{
203 struct mlx4_bitmap bitmap
;
206 struct mlx4_mr_table
{
207 struct mlx4_bitmap mpt_bitmap
;
208 struct mlx4_buddy mtt_buddy
;
211 struct mlx4_icm_table mtt_table
;
212 struct mlx4_icm_table dmpt_table
;
215 struct mlx4_cq_table
{
216 struct mlx4_bitmap bitmap
;
218 struct radix_tree_root tree
;
219 struct mlx4_icm_table table
;
220 struct mlx4_icm_table cmpt_table
;
223 struct mlx4_eq_table
{
224 struct mlx4_bitmap bitmap
;
226 void __iomem
*clr_int
;
227 void __iomem
**uar_map
;
230 struct mlx4_icm_table table
;
231 struct mlx4_icm_table cmpt_table
;
236 struct mlx4_srq_table
{
237 struct mlx4_bitmap bitmap
;
239 struct radix_tree_root tree
;
240 struct mlx4_icm_table table
;
241 struct mlx4_icm_table cmpt_table
;
244 struct mlx4_qp_table
{
245 struct mlx4_bitmap bitmap
;
249 struct mlx4_icm_table qp_table
;
250 struct mlx4_icm_table auxc_table
;
251 struct mlx4_icm_table altc_table
;
252 struct mlx4_icm_table rdmarc_table
;
253 struct mlx4_icm_table cmpt_table
;
256 struct mlx4_mcg_table
{
258 struct mlx4_bitmap bitmap
;
259 struct mlx4_icm_table table
;
262 struct mlx4_catas_err
{
264 struct timer_list timer
;
265 struct list_head list
;
268 #define MLX4_MAX_MAC_NUM 128
269 #define MLX4_MAC_TABLE_SIZE (MLX4_MAX_MAC_NUM << 3)
271 struct mlx4_mac_table
{
272 __be64 entries
[MLX4_MAX_MAC_NUM
];
273 int refs
[MLX4_MAX_MAC_NUM
];
279 #define MLX4_MAX_VLAN_NUM 128
280 #define MLX4_VLAN_TABLE_SIZE (MLX4_MAX_VLAN_NUM << 2)
282 struct mlx4_vlan_table
{
283 __be32 entries
[MLX4_MAX_VLAN_NUM
];
284 int refs
[MLX4_MAX_VLAN_NUM
];
290 struct mlx4_mac_entry
{
294 struct mlx4_port_info
{
295 struct mlx4_dev
*dev
;
298 struct device_attribute port_attr
;
299 enum mlx4_port_type tmp_type
;
300 struct mlx4_mac_table mac_table
;
301 struct radix_tree_root mac_tree
;
302 struct mlx4_vlan_table vlan_table
;
307 struct mlx4_dev
*dev
;
308 u8 do_sense_port
[MLX4_MAX_PORTS
+ 1];
309 u8 sense_allowed
[MLX4_MAX_PORTS
+ 1];
310 struct delayed_work sense_poll
;
313 struct mlx4_msix_ctl
{
315 spinlock_t pool_lock
;
319 struct list_head promisc_qps
[MLX4_NUM_STEERS
];
320 struct list_head steer_entries
[MLX4_NUM_STEERS
];
321 struct list_head high_prios
;
327 struct list_head dev_list
;
328 struct list_head ctx_list
;
331 struct list_head pgdir_list
;
332 struct mutex pgdir_mutex
;
337 struct mlx4_bitmap pd_bitmap
;
338 struct mlx4_uar_table uar_table
;
339 struct mlx4_mr_table mr_table
;
340 struct mlx4_cq_table cq_table
;
341 struct mlx4_eq_table eq_table
;
342 struct mlx4_srq_table srq_table
;
343 struct mlx4_qp_table qp_table
;
344 struct mlx4_mcg_table mcg_table
;
346 struct mlx4_catas_err catas_err
;
348 void __iomem
*clr_base
;
350 struct mlx4_uar driver_uar
;
352 struct mlx4_port_info port
[MLX4_MAX_PORTS
+ 1];
353 struct mlx4_sense sense
;
354 struct mutex port_mutex
;
355 struct mlx4_msix_ctl msix_ctl
;
356 struct mlx4_steer
*steer
;
357 struct list_head bf_list
;
358 struct mutex bf_mutex
;
359 struct io_mapping
*bf_mapping
;
362 static inline struct mlx4_priv
*mlx4_priv(struct mlx4_dev
*dev
)
364 return container_of(dev
, struct mlx4_priv
, dev
);
367 #define MLX4_SENSE_RANGE (HZ * 3)
369 extern struct workqueue_struct
*mlx4_wq
;
371 u32
mlx4_bitmap_alloc(struct mlx4_bitmap
*bitmap
);
372 void mlx4_bitmap_free(struct mlx4_bitmap
*bitmap
, u32 obj
);
373 u32
mlx4_bitmap_alloc_range(struct mlx4_bitmap
*bitmap
, int cnt
, int align
);
374 void mlx4_bitmap_free_range(struct mlx4_bitmap
*bitmap
, u32 obj
, int cnt
);
375 u32
mlx4_bitmap_avail(struct mlx4_bitmap
*bitmap
);
376 int mlx4_bitmap_init(struct mlx4_bitmap
*bitmap
, u32 num
, u32 mask
,
377 u32 reserved_bot
, u32 resetrved_top
);
378 void mlx4_bitmap_cleanup(struct mlx4_bitmap
*bitmap
);
380 int mlx4_reset(struct mlx4_dev
*dev
);
382 int mlx4_alloc_eq_table(struct mlx4_dev
*dev
);
383 void mlx4_free_eq_table(struct mlx4_dev
*dev
);
385 int mlx4_init_pd_table(struct mlx4_dev
*dev
);
386 int mlx4_init_uar_table(struct mlx4_dev
*dev
);
387 int mlx4_init_mr_table(struct mlx4_dev
*dev
);
388 int mlx4_init_eq_table(struct mlx4_dev
*dev
);
389 int mlx4_init_cq_table(struct mlx4_dev
*dev
);
390 int mlx4_init_qp_table(struct mlx4_dev
*dev
);
391 int mlx4_init_srq_table(struct mlx4_dev
*dev
);
392 int mlx4_init_mcg_table(struct mlx4_dev
*dev
);
394 void mlx4_cleanup_pd_table(struct mlx4_dev
*dev
);
395 void mlx4_cleanup_uar_table(struct mlx4_dev
*dev
);
396 void mlx4_cleanup_mr_table(struct mlx4_dev
*dev
);
397 void mlx4_cleanup_eq_table(struct mlx4_dev
*dev
);
398 void mlx4_cleanup_cq_table(struct mlx4_dev
*dev
);
399 void mlx4_cleanup_qp_table(struct mlx4_dev
*dev
);
400 void mlx4_cleanup_srq_table(struct mlx4_dev
*dev
);
401 void mlx4_cleanup_mcg_table(struct mlx4_dev
*dev
);
403 void mlx4_start_catas_poll(struct mlx4_dev
*dev
);
404 void mlx4_stop_catas_poll(struct mlx4_dev
*dev
);
405 void mlx4_catas_init(void);
406 int mlx4_restart_one(struct pci_dev
*pdev
);
407 int mlx4_register_device(struct mlx4_dev
*dev
);
408 void mlx4_unregister_device(struct mlx4_dev
*dev
);
409 void mlx4_dispatch_event(struct mlx4_dev
*dev
, enum mlx4_dev_event type
, int port
);
412 struct mlx4_init_hca_param
;
414 u64
mlx4_make_profile(struct mlx4_dev
*dev
,
415 struct mlx4_profile
*request
,
416 struct mlx4_dev_cap
*dev_cap
,
417 struct mlx4_init_hca_param
*init_hca
);
419 int mlx4_cmd_init(struct mlx4_dev
*dev
);
420 void mlx4_cmd_cleanup(struct mlx4_dev
*dev
);
421 void mlx4_cmd_event(struct mlx4_dev
*dev
, u16 token
, u8 status
, u64 out_param
);
422 int mlx4_cmd_use_events(struct mlx4_dev
*dev
);
423 void mlx4_cmd_use_polling(struct mlx4_dev
*dev
);
425 void mlx4_cq_completion(struct mlx4_dev
*dev
, u32 cqn
);
426 void mlx4_cq_event(struct mlx4_dev
*dev
, u32 cqn
, int event_type
);
428 void mlx4_qp_event(struct mlx4_dev
*dev
, u32 qpn
, int event_type
);
430 void mlx4_srq_event(struct mlx4_dev
*dev
, u32 srqn
, int event_type
);
432 void mlx4_handle_catas_err(struct mlx4_dev
*dev
);
434 void mlx4_do_sense_ports(struct mlx4_dev
*dev
,
435 enum mlx4_port_type
*stype
,
436 enum mlx4_port_type
*defaults
);
437 void mlx4_start_sense(struct mlx4_dev
*dev
);
438 void mlx4_stop_sense(struct mlx4_dev
*dev
);
439 void mlx4_sense_init(struct mlx4_dev
*dev
);
440 int mlx4_check_port_params(struct mlx4_dev
*dev
,
441 enum mlx4_port_type
*port_type
);
442 int mlx4_change_port_types(struct mlx4_dev
*dev
,
443 enum mlx4_port_type
*port_types
);
445 void mlx4_init_mac_table(struct mlx4_dev
*dev
, struct mlx4_mac_table
*table
);
446 void mlx4_init_vlan_table(struct mlx4_dev
*dev
, struct mlx4_vlan_table
*table
);
448 int mlx4_SET_PORT(struct mlx4_dev
*dev
, u8 port
);
449 int mlx4_get_port_ib_caps(struct mlx4_dev
*dev
, u8 port
, __be32
*caps
);
451 int mlx4_qp_detach_common(struct mlx4_dev
*dev
, struct mlx4_qp
*qp
, u8 gid
[16],
452 enum mlx4_protocol prot
, enum mlx4_steer_type steer
);
453 int mlx4_qp_attach_common(struct mlx4_dev
*dev
, struct mlx4_qp
*qp
, u8 gid
[16],
454 int block_mcast_loopback
, enum mlx4_protocol prot
,
455 enum mlx4_steer_type steer
);