1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005, 2006 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
52 #include <linux/inet.h>
54 #include <linux/ethtool.h>
55 #include <linux/firmware.h>
56 #include <linux/delay.h>
57 #include <linux/version.h>
58 #include <linux/timer.h>
59 #include <linux/vmalloc.h>
60 #include <linux/crc32.h>
61 #include <linux/moduleparam.h>
63 #include <net/checksum.h>
64 #include <asm/byteorder.h>
66 #include <asm/processor.h>
71 #include "myri10ge_mcp.h"
72 #include "myri10ge_mcp_gen_header.h"
74 #define MYRI10GE_VERSION_STR "1.0.0"
76 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
77 MODULE_AUTHOR("Maintainer: help@myri.com");
78 MODULE_VERSION(MYRI10GE_VERSION_STR
);
79 MODULE_LICENSE("Dual BSD/GPL");
81 #define MYRI10GE_MAX_ETHER_MTU 9014
83 #define MYRI10GE_ETH_STOPPED 0
84 #define MYRI10GE_ETH_STOPPING 1
85 #define MYRI10GE_ETH_STARTING 2
86 #define MYRI10GE_ETH_RUNNING 3
87 #define MYRI10GE_ETH_OPEN_FAILED 4
89 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
90 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
92 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
93 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
95 struct myri10ge_rx_buffer_state
{
97 DECLARE_PCI_UNMAP_ADDR(bus
)
98 DECLARE_PCI_UNMAP_LEN(len
)
101 struct myri10ge_tx_buffer_state
{
104 DECLARE_PCI_UNMAP_ADDR(bus
)
105 DECLARE_PCI_UNMAP_LEN(len
)
108 struct myri10ge_cmd
{
114 struct myri10ge_rx_buf
{
115 struct mcp_kreq_ether_recv __iomem
*lanai
; /* lanai ptr for recv ring */
116 u8 __iomem
*wc_fifo
; /* w/c rx dma addr fifo address */
117 struct mcp_kreq_ether_recv
*shadow
; /* host shadow of recv ring */
118 struct myri10ge_rx_buffer_state
*info
;
121 int mask
; /* number of rx slots -1 */
124 struct myri10ge_tx_buf
{
125 struct mcp_kreq_ether_send __iomem
*lanai
; /* lanai ptr for sendq */
126 u8 __iomem
*wc_fifo
; /* w/c send fifo address */
127 struct mcp_kreq_ether_send
*req_list
; /* host shadow of sendq */
129 struct myri10ge_tx_buffer_state
*info
;
130 int mask
; /* number of transmit slots -1 */
131 int boundary
; /* boundary transmits cannot cross */
132 int req ____cacheline_aligned
; /* transmit slots submitted */
133 int pkt_start
; /* packets started */
134 int done ____cacheline_aligned
; /* transmit slots completed */
135 int pkt_done
; /* packets completed */
138 struct myri10ge_rx_done
{
139 struct mcp_slot
*entry
;
145 struct myri10ge_priv
{
146 int running
; /* running? */
147 int csum_flag
; /* rx_csums? */
148 struct myri10ge_tx_buf tx
; /* transmit ring */
149 struct myri10ge_rx_buf rx_small
;
150 struct myri10ge_rx_buf rx_big
;
151 struct myri10ge_rx_done rx_done
;
153 struct net_device
*dev
;
154 struct net_device_stats stats
;
157 unsigned long board_span
;
158 unsigned long iomem_base
;
159 __be32 __iomem
*irq_claim
;
160 __be32 __iomem
*irq_deassert
;
161 char *mac_addr_string
;
162 struct mcp_cmd_response
*cmd
;
164 struct mcp_irq_data
*fw_stats
;
165 dma_addr_t fw_stats_bus
;
166 struct pci_dev
*pdev
;
169 unsigned int rdma_tags_available
;
171 __be32 __iomem
*intr_coal_delay_ptr
;
176 wait_queue_head_t down_wq
;
177 struct work_struct watchdog_work
;
178 struct timer_list watchdog_timer
;
179 int watchdog_tx_done
;
185 char eeprom_strings
[MYRI10GE_EEPROM_STRINGS_SIZE
];
186 char fw_version
[128];
187 u8 mac_addr
[6]; /* eeprom mac address */
188 unsigned long serial_number
;
189 int vendor_specific_offset
;
190 int fw_multicast_support
;
200 static char *myri10ge_fw_unaligned
= "myri10ge_ethp_z8e.dat";
201 static char *myri10ge_fw_aligned
= "myri10ge_eth_z8e.dat";
203 static char *myri10ge_fw_name
= NULL
;
204 module_param(myri10ge_fw_name
, charp
, S_IRUGO
| S_IWUSR
);
205 MODULE_PARM_DESC(myri10ge_fw_name
, "Firmware image name\n");
207 static int myri10ge_ecrc_enable
= 1;
208 module_param(myri10ge_ecrc_enable
, int, S_IRUGO
);
209 MODULE_PARM_DESC(myri10ge_ecrc_enable
, "Enable Extended CRC on PCI-E\n");
211 static int myri10ge_max_intr_slots
= 1024;
212 module_param(myri10ge_max_intr_slots
, int, S_IRUGO
);
213 MODULE_PARM_DESC(myri10ge_max_intr_slots
, "Interrupt queue slots\n");
215 static int myri10ge_small_bytes
= -1; /* -1 == auto */
216 module_param(myri10ge_small_bytes
, int, S_IRUGO
| S_IWUSR
);
217 MODULE_PARM_DESC(myri10ge_small_bytes
, "Threshold of small packets\n");
219 static int myri10ge_msi
= 1; /* enable msi by default */
220 module_param(myri10ge_msi
, int, S_IRUGO
);
221 MODULE_PARM_DESC(myri10ge_msi
, "Enable Message Signalled Interrupts\n");
223 static int myri10ge_intr_coal_delay
= 25;
224 module_param(myri10ge_intr_coal_delay
, int, S_IRUGO
);
225 MODULE_PARM_DESC(myri10ge_intr_coal_delay
, "Interrupt coalescing delay\n");
227 static int myri10ge_flow_control
= 1;
228 module_param(myri10ge_flow_control
, int, S_IRUGO
);
229 MODULE_PARM_DESC(myri10ge_flow_control
, "Pause parameter\n");
231 static int myri10ge_deassert_wait
= 1;
232 module_param(myri10ge_deassert_wait
, int, S_IRUGO
| S_IWUSR
);
233 MODULE_PARM_DESC(myri10ge_deassert_wait
,
234 "Wait when deasserting legacy interrupts\n");
236 static int myri10ge_force_firmware
= 0;
237 module_param(myri10ge_force_firmware
, int, S_IRUGO
);
238 MODULE_PARM_DESC(myri10ge_force_firmware
,
239 "Force firmware to assume aligned completions\n");
241 static int myri10ge_skb_cross_4k
= 0;
242 module_param(myri10ge_skb_cross_4k
, int, S_IRUGO
| S_IWUSR
);
243 MODULE_PARM_DESC(myri10ge_skb_cross_4k
,
244 "Can a small skb cross a 4KB boundary?\n");
246 static int myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
247 module_param(myri10ge_initial_mtu
, int, S_IRUGO
);
248 MODULE_PARM_DESC(myri10ge_initial_mtu
, "Initial MTU\n");
250 static int myri10ge_napi_weight
= 64;
251 module_param(myri10ge_napi_weight
, int, S_IRUGO
);
252 MODULE_PARM_DESC(myri10ge_napi_weight
, "Set NAPI weight\n");
254 static int myri10ge_watchdog_timeout
= 1;
255 module_param(myri10ge_watchdog_timeout
, int, S_IRUGO
);
256 MODULE_PARM_DESC(myri10ge_watchdog_timeout
, "Set watchdog timeout\n");
258 static int myri10ge_max_irq_loops
= 1048576;
259 module_param(myri10ge_max_irq_loops
, int, S_IRUGO
);
260 MODULE_PARM_DESC(myri10ge_max_irq_loops
,
261 "Set stuck legacy IRQ detection threshold\n");
263 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
265 static int myri10ge_debug
= -1; /* defaults above */
266 module_param(myri10ge_debug
, int, 0);
267 MODULE_PARM_DESC(myri10ge_debug
, "Debug level (0=none,...,16=all)");
269 #define MYRI10GE_FW_OFFSET 1024*1024
270 #define MYRI10GE_HIGHPART_TO_U32(X) \
271 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
272 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
274 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
276 static inline void put_be32(__be32 val
, __be32 __iomem
*p
)
278 __raw_writel((__force __u32
)val
, (__force
void __iomem
*)p
);
282 myri10ge_send_cmd(struct myri10ge_priv
*mgp
, u32 cmd
,
283 struct myri10ge_cmd
*data
, int atomic
)
286 char buf_bytes
[sizeof(*buf
) + 8];
287 struct mcp_cmd_response
*response
= mgp
->cmd
;
288 char __iomem
*cmd_addr
= mgp
->sram
+ MXGEFW_ETH_CMD
;
289 u32 dma_low
, dma_high
, result
, value
;
292 /* ensure buf is aligned to 8 bytes */
293 buf
= (struct mcp_cmd
*)ALIGN((unsigned long)buf_bytes
, 8);
295 buf
->data0
= htonl(data
->data0
);
296 buf
->data1
= htonl(data
->data1
);
297 buf
->data2
= htonl(data
->data2
);
298 buf
->cmd
= htonl(cmd
);
299 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
300 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
302 buf
->response_addr
.low
= htonl(dma_low
);
303 buf
->response_addr
.high
= htonl(dma_high
);
304 response
->result
= htonl(MYRI10GE_NO_RESPONSE_RESULT
);
306 myri10ge_pio_copy(cmd_addr
, buf
, sizeof(*buf
));
308 /* wait up to 15ms. Longest command is the DMA benchmark,
309 * which is capped at 5ms, but runs from a timeout handler
310 * that runs every 7.8ms. So a 15ms timeout leaves us with
314 /* if atomic is set, do not sleep,
315 * and try to get the completion quickly
316 * (1ms will be enough for those commands) */
317 for (sleep_total
= 0;
319 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
323 /* use msleep for most command */
324 for (sleep_total
= 0;
326 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
331 result
= ntohl(response
->result
);
332 value
= ntohl(response
->data
);
333 if (result
!= MYRI10GE_NO_RESPONSE_RESULT
) {
337 } else if (result
== MXGEFW_CMD_UNKNOWN
) {
340 dev_err(&mgp
->pdev
->dev
,
341 "command %d failed, result = %d\n",
347 dev_err(&mgp
->pdev
->dev
, "command %d timed out, result = %d\n",
353 * The eeprom strings on the lanaiX have the format
356 * PT:ddd mmm xx xx:xx:xx xx\0
357 * PV:ddd mmm xx xx:xx:xx xx\0
359 static int myri10ge_read_mac_addr(struct myri10ge_priv
*mgp
)
364 ptr
= mgp
->eeprom_strings
;
365 limit
= mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
;
367 while (*ptr
!= '\0' && ptr
< limit
) {
368 if (memcmp(ptr
, "MAC=", 4) == 0) {
370 mgp
->mac_addr_string
= ptr
;
371 for (i
= 0; i
< 6; i
++) {
372 if ((ptr
+ 2) > limit
)
375 simple_strtoul(ptr
, &ptr
, 16);
379 if (memcmp((const void *)ptr
, "SN=", 3) == 0) {
381 mgp
->serial_number
= simple_strtoul(ptr
, &ptr
, 10);
383 while (ptr
< limit
&& *ptr
++) ;
389 dev_err(&mgp
->pdev
->dev
, "failed to parse eeprom_strings\n");
394 * Enable or disable periodic RDMAs from the host to make certain
395 * chipsets resend dropped PCIe messages
398 static void myri10ge_dummy_rdma(struct myri10ge_priv
*mgp
, int enable
)
400 char __iomem
*submit
;
402 u32 dma_low
, dma_high
;
405 /* clear confirmation addr */
409 /* send a rdma command to the PCIe engine, and wait for the
410 * response in the confirmation address. The firmware should
411 * write a -1 there to indicate it is alive and well
413 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
414 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
416 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
417 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
418 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
419 buf
[3] = htonl(dma_high
); /* dummy addr MSW */
420 buf
[4] = htonl(dma_low
); /* dummy addr LSW */
421 buf
[5] = htonl(enable
); /* enable? */
423 submit
= mgp
->sram
+ MXGEFW_BOOT_DUMMY_RDMA
;
425 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
426 for (i
= 0; mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20; i
++)
428 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
)
429 dev_err(&mgp
->pdev
->dev
, "dummy rdma %s failed\n",
430 (enable
? "enable" : "disable"));
434 myri10ge_validate_firmware(struct myri10ge_priv
*mgp
,
435 struct mcp_gen_header
*hdr
)
437 struct device
*dev
= &mgp
->pdev
->dev
;
440 /* check firmware type */
441 if (ntohl(hdr
->mcp_type
) != MCP_TYPE_ETH
) {
442 dev_err(dev
, "Bad firmware type: 0x%x\n", ntohl(hdr
->mcp_type
));
446 /* save firmware version for ethtool */
447 strncpy(mgp
->fw_version
, hdr
->version
, sizeof(mgp
->fw_version
));
449 sscanf(mgp
->fw_version
, "%d.%d", &major
, &minor
);
451 if (!(major
== MXGEFW_VERSION_MAJOR
&& minor
== MXGEFW_VERSION_MINOR
)) {
452 dev_err(dev
, "Found firmware version %s\n", mgp
->fw_version
);
453 dev_err(dev
, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR
,
454 MXGEFW_VERSION_MINOR
);
460 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv
*mgp
, u32
* size
)
462 unsigned crc
, reread_crc
;
463 const struct firmware
*fw
;
464 struct device
*dev
= &mgp
->pdev
->dev
;
465 struct mcp_gen_header
*hdr
;
470 if ((status
= request_firmware(&fw
, mgp
->fw_name
, dev
)) < 0) {
471 dev_err(dev
, "Unable to load %s firmware image via hotplug\n",
474 goto abort_with_nothing
;
479 if (fw
->size
>= mgp
->sram_size
- MYRI10GE_FW_OFFSET
||
480 fw
->size
< MCP_HEADER_PTR_OFFSET
+ 4) {
481 dev_err(dev
, "Firmware size invalid:%d\n", (int)fw
->size
);
487 hdr_offset
= ntohl(*(__be32
*) (fw
->data
+ MCP_HEADER_PTR_OFFSET
));
488 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > fw
->size
) {
489 dev_err(dev
, "Bad firmware file\n");
493 hdr
= (void *)(fw
->data
+ hdr_offset
);
495 status
= myri10ge_validate_firmware(mgp
, hdr
);
499 crc
= crc32(~0, fw
->data
, fw
->size
);
500 for (i
= 0; i
< fw
->size
; i
+= 256) {
501 myri10ge_pio_copy(mgp
->sram
+ MYRI10GE_FW_OFFSET
+ i
,
503 min(256U, (unsigned)(fw
->size
- i
)));
507 /* corruption checking is good for parity recovery and buggy chipset */
508 memcpy_fromio(fw
->data
, mgp
->sram
+ MYRI10GE_FW_OFFSET
, fw
->size
);
509 reread_crc
= crc32(~0, fw
->data
, fw
->size
);
510 if (crc
!= reread_crc
) {
511 dev_err(dev
, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
512 (unsigned)fw
->size
, reread_crc
, crc
);
516 *size
= (u32
) fw
->size
;
519 release_firmware(fw
);
525 static int myri10ge_adopt_running_firmware(struct myri10ge_priv
*mgp
)
527 struct mcp_gen_header
*hdr
;
528 struct device
*dev
= &mgp
->pdev
->dev
;
529 const size_t bytes
= sizeof(struct mcp_gen_header
);
533 /* find running firmware header */
534 hdr_offset
= ntohl(__raw_readl(mgp
->sram
+ MCP_HEADER_PTR_OFFSET
));
536 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > mgp
->sram_size
) {
537 dev_err(dev
, "Running firmware has bad header offset (%d)\n",
542 /* copy header of running firmware from SRAM to host memory to
543 * validate firmware */
544 hdr
= kmalloc(bytes
, GFP_KERNEL
);
546 dev_err(dev
, "could not malloc firmware hdr\n");
549 memcpy_fromio(hdr
, mgp
->sram
+ hdr_offset
, bytes
);
550 status
= myri10ge_validate_firmware(mgp
, hdr
);
555 static int myri10ge_load_firmware(struct myri10ge_priv
*mgp
)
557 char __iomem
*submit
;
559 u32 dma_low
, dma_high
, size
;
563 status
= myri10ge_load_hotplug_firmware(mgp
, &size
);
565 dev_warn(&mgp
->pdev
->dev
, "hotplug firmware loading failed\n");
567 /* Do not attempt to adopt firmware if there
572 status
= myri10ge_adopt_running_firmware(mgp
);
574 dev_err(&mgp
->pdev
->dev
,
575 "failed to adopt running firmware\n");
578 dev_info(&mgp
->pdev
->dev
,
579 "Successfully adopted running firmware\n");
580 if (mgp
->tx
.boundary
== 4096) {
581 dev_warn(&mgp
->pdev
->dev
,
582 "Using firmware currently running on NIC"
584 dev_warn(&mgp
->pdev
->dev
,
585 "performance consider loading optimized "
587 dev_warn(&mgp
->pdev
->dev
, "via hotplug\n");
590 mgp
->fw_name
= "adopted";
591 mgp
->tx
.boundary
= 2048;
595 /* clear confirmation addr */
599 /* send a reload command to the bootstrap MCP, and wait for the
600 * response in the confirmation address. The firmware should
601 * write a -1 there to indicate it is alive and well
603 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
604 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
606 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
607 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
608 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
610 /* FIX: All newest firmware should un-protect the bottom of
611 * the sram before handoff. However, the very first interfaces
612 * do not. Therefore the handoff copy must skip the first 8 bytes
614 buf
[3] = htonl(MYRI10GE_FW_OFFSET
+ 8); /* where the code starts */
615 buf
[4] = htonl(size
- 8); /* length of code */
616 buf
[5] = htonl(8); /* where to copy to */
617 buf
[6] = htonl(0); /* where to jump to */
619 submit
= mgp
->sram
+ MXGEFW_BOOT_HANDOFF
;
621 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
626 while (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20) {
630 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
) {
631 dev_err(&mgp
->pdev
->dev
, "handoff failed\n");
634 dev_info(&mgp
->pdev
->dev
, "handoff confirmed\n");
635 myri10ge_dummy_rdma(mgp
, 1);
640 static int myri10ge_update_mac_address(struct myri10ge_priv
*mgp
, u8
* addr
)
642 struct myri10ge_cmd cmd
;
645 cmd
.data0
= ((addr
[0] << 24) | (addr
[1] << 16)
646 | (addr
[2] << 8) | addr
[3]);
648 cmd
.data1
= ((addr
[4] << 8) | (addr
[5]));
650 status
= myri10ge_send_cmd(mgp
, MXGEFW_SET_MAC_ADDRESS
, &cmd
, 0);
654 static int myri10ge_change_pause(struct myri10ge_priv
*mgp
, int pause
)
656 struct myri10ge_cmd cmd
;
659 ctl
= pause
? MXGEFW_ENABLE_FLOW_CONTROL
: MXGEFW_DISABLE_FLOW_CONTROL
;
660 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, 0);
664 "myri10ge: %s: Failed to set flow control mode\n",
673 myri10ge_change_promisc(struct myri10ge_priv
*mgp
, int promisc
, int atomic
)
675 struct myri10ge_cmd cmd
;
678 ctl
= promisc
? MXGEFW_ENABLE_PROMISC
: MXGEFW_DISABLE_PROMISC
;
679 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, atomic
);
681 printk(KERN_ERR
"myri10ge: %s: Failed to set promisc mode\n",
685 static int myri10ge_reset(struct myri10ge_priv
*mgp
)
687 struct myri10ge_cmd cmd
;
692 /* try to send a reset command to the card to see if it
694 memset(&cmd
, 0, sizeof(cmd
));
695 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_RESET
, &cmd
, 0);
697 dev_err(&mgp
->pdev
->dev
, "failed reset\n");
701 /* Now exchange information about interrupts */
703 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
704 memset(mgp
->rx_done
.entry
, 0, bytes
);
705 cmd
.data0
= (u32
) bytes
;
706 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_SIZE
, &cmd
, 0);
707 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
708 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
709 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_DMA
, &cmd
, 0);
712 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_ACK_OFFSET
, &cmd
, 0);
713 mgp
->irq_claim
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
714 if (!mgp
->msi_enabled
) {
715 status
|= myri10ge_send_cmd
716 (mgp
, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET
, &cmd
, 0);
717 mgp
->irq_deassert
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
720 status
|= myri10ge_send_cmd
721 (mgp
, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET
, &cmd
, 0);
722 mgp
->intr_coal_delay_ptr
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
724 dev_err(&mgp
->pdev
->dev
, "failed set interrupt parameters\n");
727 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
729 /* Run a small DMA test.
730 * The magic multipliers to the length tell the firmware
731 * to do DMA read, write, or read+write tests. The
732 * results are returned in cmd.data0. The upper 16
733 * bits or the return is the number of transfers completed.
734 * The lower 16 bits is the time in 0.5us ticks that the
735 * transfers took to complete.
738 len
= mgp
->tx
.boundary
;
740 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
741 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
742 cmd
.data2
= len
* 0x10000;
743 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
745 mgp
->read_dma
= ((cmd
.data0
>> 16) * len
* 2) /
746 (cmd
.data0
& 0xffff);
748 dev_warn(&mgp
->pdev
->dev
, "DMA read benchmark failed: %d\n",
750 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
751 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
752 cmd
.data2
= len
* 0x1;
753 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
755 mgp
->write_dma
= ((cmd
.data0
>> 16) * len
* 2) /
756 (cmd
.data0
& 0xffff);
758 dev_warn(&mgp
->pdev
->dev
, "DMA write benchmark failed: %d\n",
761 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
762 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
763 cmd
.data2
= len
* 0x10001;
764 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
766 mgp
->read_write_dma
= ((cmd
.data0
>> 16) * len
* 2 * 2) /
767 (cmd
.data0
& 0xffff);
769 dev_warn(&mgp
->pdev
->dev
,
770 "DMA read/write benchmark failed: %d\n", status
);
772 memset(mgp
->rx_done
.entry
, 0, bytes
);
774 /* reset mcp/driver shared state back to 0 */
777 mgp
->tx
.pkt_start
= 0;
778 mgp
->tx
.pkt_done
= 0;
780 mgp
->rx_small
.cnt
= 0;
781 mgp
->rx_done
.idx
= 0;
782 mgp
->rx_done
.cnt
= 0;
783 mgp
->link_changes
= 0;
784 status
= myri10ge_update_mac_address(mgp
, mgp
->dev
->dev_addr
);
785 myri10ge_change_promisc(mgp
, 0, 0);
786 myri10ge_change_pause(mgp
, mgp
->pause
);
791 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem
* dst
,
792 struct mcp_kreq_ether_recv
*src
)
797 src
->addr_low
= htonl(DMA_32BIT_MASK
);
798 myri10ge_pio_copy(dst
, src
, 8 * sizeof(*src
));
801 put_be32(low
, &dst
->addr_low
);
806 * Set of routines to get a new receive buffer. Any buffer which
807 * crosses a 4KB boundary must start on a 4KB boundary due to PCIe
808 * wdma restrictions. We also try to align any smaller allocation to
809 * at least a 16 byte boundary for efficiency. We assume the linux
810 * memory allocator works by powers of 2, and will not return memory
811 * smaller than 2KB which crosses a 4KB boundary. If it does, we fall
812 * back to allocating 2x as much space as required.
814 * We intend to replace large (>4KB) skb allocations by using
815 * pages directly and building a fraglist in the near future.
818 static inline struct sk_buff
*myri10ge_alloc_big(struct net_device
*dev
,
822 unsigned long data
, roundup
;
824 skb
= netdev_alloc_skb(dev
, bytes
+ 4096 + MXGEFW_PAD
);
828 /* Correct skb->truesize so that socket buffer
829 * accounting is not confused the rounding we must
830 * do to satisfy alignment constraints.
832 skb
->truesize
-= 4096;
834 data
= (unsigned long)(skb
->data
);
835 roundup
= (-data
) & (4095);
836 skb_reserve(skb
, roundup
);
840 /* Allocate 2x as much space as required and use whichever portion
841 * does not cross a 4KB boundary */
842 static inline struct sk_buff
*myri10ge_alloc_small_safe(struct net_device
*dev
,
846 unsigned long data
, boundary
;
848 skb
= netdev_alloc_skb(dev
, 2 * (bytes
+ MXGEFW_PAD
) - 1);
849 if (unlikely(skb
== NULL
))
852 /* Correct skb->truesize so that socket buffer
853 * accounting is not confused the rounding we must
854 * do to satisfy alignment constraints.
856 skb
->truesize
-= bytes
+ MXGEFW_PAD
;
858 data
= (unsigned long)(skb
->data
);
859 boundary
= (data
+ 4095UL) & ~4095UL;
860 if ((boundary
- data
) >= (bytes
+ MXGEFW_PAD
))
863 skb_reserve(skb
, boundary
- data
);
867 /* Allocate just enough space, and verify that the allocated
868 * space does not cross a 4KB boundary */
869 static inline struct sk_buff
*myri10ge_alloc_small(struct net_device
*dev
,
873 unsigned long roundup
, data
, end
;
875 skb
= netdev_alloc_skb(dev
, bytes
+ 16 + MXGEFW_PAD
);
876 if (unlikely(skb
== NULL
))
879 /* Round allocated buffer to 16 byte boundary */
880 data
= (unsigned long)(skb
->data
);
881 roundup
= (-data
) & 15UL;
882 skb_reserve(skb
, roundup
);
883 /* Verify that the data buffer does not cross a page boundary */
884 data
= (unsigned long)(skb
->data
);
885 end
= data
+ bytes
+ MXGEFW_PAD
- 1;
886 if (unlikely(((end
>> 12) != (data
>> 12)) && (data
& 4095UL))) {
888 "myri10ge_alloc_small: small skb crossed 4KB boundary\n");
889 myri10ge_skb_cross_4k
= 1;
890 dev_kfree_skb_any(skb
);
891 skb
= myri10ge_alloc_small_safe(dev
, bytes
);
897 myri10ge_getbuf(struct myri10ge_rx_buf
*rx
, struct myri10ge_priv
*mgp
,
900 struct net_device
*dev
= mgp
->dev
;
901 struct pci_dev
*pdev
= mgp
->pdev
;
906 bytes
+= VLAN_HLEN
; /* account for 802.1q vlan tag */
908 if ((bytes
+ MXGEFW_PAD
) > (4096 - 16) /* linux overhead */ )
909 skb
= myri10ge_alloc_big(dev
, bytes
);
910 else if (myri10ge_skb_cross_4k
)
911 skb
= myri10ge_alloc_small_safe(dev
, bytes
);
913 skb
= myri10ge_alloc_small(dev
, bytes
);
915 if (unlikely(skb
== NULL
)) {
921 /* set len so that it only covers the area we
922 * need mapped for DMA */
923 len
= bytes
+ MXGEFW_PAD
;
925 bus
= pci_map_single(pdev
, skb
->data
, len
, PCI_DMA_FROMDEVICE
);
926 rx
->info
[idx
].skb
= skb
;
927 pci_unmap_addr_set(&rx
->info
[idx
], bus
, bus
);
928 pci_unmap_len_set(&rx
->info
[idx
], len
, len
);
929 rx
->shadow
[idx
].addr_low
= htonl(MYRI10GE_LOWPART_TO_U32(bus
));
930 rx
->shadow
[idx
].addr_high
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
933 /* copy 8 descriptors (64-bytes) to the mcp at a time */
934 if ((idx
& 7) == 7) {
935 if (rx
->wc_fifo
== NULL
)
936 myri10ge_submit_8rx(&rx
->lanai
[idx
- 7],
937 &rx
->shadow
[idx
- 7]);
940 myri10ge_pio_copy(rx
->wc_fifo
,
941 &rx
->shadow
[idx
- 7], 64);
947 static inline void myri10ge_vlan_ip_csum(struct sk_buff
*skb
, __wsum hw_csum
)
949 struct vlan_hdr
*vh
= (struct vlan_hdr
*)(skb
->data
);
951 if ((skb
->protocol
== htons(ETH_P_8021Q
)) &&
952 (vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IP
) ||
953 vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IPV6
))) {
955 skb
->ip_summed
= CHECKSUM_COMPLETE
;
959 static inline unsigned long
960 myri10ge_rx_done(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
961 int bytes
, int len
, __wsum csum
)
967 idx
= rx
->cnt
& rx
->mask
;
970 /* save a pointer to the received skb */
971 skb
= rx
->info
[idx
].skb
;
972 bus
= pci_unmap_addr(&rx
->info
[idx
], bus
);
973 unmap_len
= pci_unmap_len(&rx
->info
[idx
], len
);
975 /* try to replace the received skb */
976 if (myri10ge_getbuf(rx
, mgp
, bytes
, idx
)) {
977 /* drop the frame -- the old skbuf is re-cycled */
978 mgp
->stats
.rx_dropped
+= 1;
982 /* unmap the recvd skb */
983 pci_unmap_single(mgp
->pdev
, bus
, unmap_len
, PCI_DMA_FROMDEVICE
);
985 /* mcp implicitly skips 1st bytes so that packet is properly
987 skb_reserve(skb
, MXGEFW_PAD
);
989 /* set the length of the frame */
992 skb
->protocol
= eth_type_trans(skb
, mgp
->dev
);
993 if (mgp
->csum_flag
) {
994 if ((skb
->protocol
== htons(ETH_P_IP
)) ||
995 (skb
->protocol
== htons(ETH_P_IPV6
))) {
997 skb
->ip_summed
= CHECKSUM_COMPLETE
;
999 myri10ge_vlan_ip_csum(skb
, csum
);
1002 netif_receive_skb(skb
);
1003 mgp
->dev
->last_rx
= jiffies
;
1007 static inline void myri10ge_tx_done(struct myri10ge_priv
*mgp
, int mcp_index
)
1009 struct pci_dev
*pdev
= mgp
->pdev
;
1010 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1011 struct sk_buff
*skb
;
1015 while (tx
->pkt_done
!= mcp_index
) {
1016 idx
= tx
->done
& tx
->mask
;
1017 skb
= tx
->info
[idx
].skb
;
1020 tx
->info
[idx
].skb
= NULL
;
1021 if (tx
->info
[idx
].last
) {
1023 tx
->info
[idx
].last
= 0;
1026 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1027 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1029 mgp
->stats
.tx_bytes
+= skb
->len
;
1030 mgp
->stats
.tx_packets
++;
1031 dev_kfree_skb_irq(skb
);
1033 pci_unmap_single(pdev
,
1034 pci_unmap_addr(&tx
->info
[idx
],
1039 pci_unmap_page(pdev
,
1040 pci_unmap_addr(&tx
->info
[idx
],
1045 /* limit potential for livelock by only handling
1046 * 2 full tx rings per call */
1047 if (unlikely(++limit
> 2 * tx
->mask
))
1050 /* start the queue if we've stopped it */
1051 if (netif_queue_stopped(mgp
->dev
)
1052 && tx
->req
- tx
->done
< (tx
->mask
>> 1)) {
1054 netif_wake_queue(mgp
->dev
);
1058 static inline void myri10ge_clean_rx_done(struct myri10ge_priv
*mgp
, int *limit
)
1060 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1061 unsigned long rx_bytes
= 0;
1062 unsigned long rx_packets
= 0;
1063 unsigned long rx_ok
;
1065 int idx
= rx_done
->idx
;
1066 int cnt
= rx_done
->cnt
;
1070 while (rx_done
->entry
[idx
].length
!= 0 && *limit
!= 0) {
1071 length
= ntohs(rx_done
->entry
[idx
].length
);
1072 rx_done
->entry
[idx
].length
= 0;
1073 checksum
= csum_unfold(rx_done
->entry
[idx
].checksum
);
1074 if (length
<= mgp
->small_bytes
)
1075 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_small
,
1079 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_big
,
1080 mgp
->dev
->mtu
+ ETH_HLEN
,
1082 rx_packets
+= rx_ok
;
1083 rx_bytes
+= rx_ok
* (unsigned long)length
;
1085 idx
= cnt
& (myri10ge_max_intr_slots
- 1);
1087 /* limit potential for livelock by only handling a
1088 * limited number of frames. */
1093 mgp
->stats
.rx_packets
+= rx_packets
;
1094 mgp
->stats
.rx_bytes
+= rx_bytes
;
1097 static inline void myri10ge_check_statblock(struct myri10ge_priv
*mgp
)
1099 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1101 if (unlikely(stats
->stats_updated
)) {
1102 if (mgp
->link_state
!= stats
->link_up
) {
1103 mgp
->link_state
= stats
->link_up
;
1104 if (mgp
->link_state
) {
1105 if (netif_msg_link(mgp
))
1107 "myri10ge: %s: link up\n",
1109 netif_carrier_on(mgp
->dev
);
1110 mgp
->link_changes
++;
1112 if (netif_msg_link(mgp
))
1114 "myri10ge: %s: link down\n",
1116 netif_carrier_off(mgp
->dev
);
1117 mgp
->link_changes
++;
1120 if (mgp
->rdma_tags_available
!=
1121 ntohl(mgp
->fw_stats
->rdma_tags_available
)) {
1122 mgp
->rdma_tags_available
=
1123 ntohl(mgp
->fw_stats
->rdma_tags_available
);
1124 printk(KERN_WARNING
"myri10ge: %s: RDMA timed out! "
1125 "%d tags left\n", mgp
->dev
->name
,
1126 mgp
->rdma_tags_available
);
1128 mgp
->down_cnt
+= stats
->link_down
;
1129 if (stats
->link_down
)
1130 wake_up(&mgp
->down_wq
);
1134 static int myri10ge_poll(struct net_device
*netdev
, int *budget
)
1136 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1137 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1138 int limit
, orig_limit
, work_done
;
1140 /* process as many rx events as NAPI will allow */
1141 limit
= min(*budget
, netdev
->quota
);
1143 myri10ge_clean_rx_done(mgp
, &limit
);
1144 work_done
= orig_limit
- limit
;
1145 *budget
-= work_done
;
1146 netdev
->quota
-= work_done
;
1148 if (rx_done
->entry
[rx_done
->idx
].length
== 0 || !netif_running(netdev
)) {
1149 netif_rx_complete(netdev
);
1150 put_be32(htonl(3), mgp
->irq_claim
);
1156 static irqreturn_t
myri10ge_intr(int irq
, void *arg
)
1158 struct myri10ge_priv
*mgp
= arg
;
1159 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1160 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1161 u32 send_done_count
;
1164 /* make sure it is our IRQ, and that the DMA has finished */
1165 if (unlikely(!stats
->valid
))
1168 /* low bit indicates receives are present, so schedule
1169 * napi poll handler */
1170 if (stats
->valid
& 1)
1171 netif_rx_schedule(mgp
->dev
);
1173 if (!mgp
->msi_enabled
) {
1174 put_be32(0, mgp
->irq_deassert
);
1175 if (!myri10ge_deassert_wait
)
1181 /* Wait for IRQ line to go low, if using INTx */
1185 /* check for transmit completes and receives */
1186 send_done_count
= ntohl(stats
->send_done_count
);
1187 if (send_done_count
!= tx
->pkt_done
)
1188 myri10ge_tx_done(mgp
, (int)send_done_count
);
1189 if (unlikely(i
> myri10ge_max_irq_loops
)) {
1190 printk(KERN_WARNING
"myri10ge: %s: irq stuck?\n",
1193 schedule_work(&mgp
->watchdog_work
);
1195 if (likely(stats
->valid
== 0))
1201 myri10ge_check_statblock(mgp
);
1203 put_be32(htonl(3), mgp
->irq_claim
+ 1);
1204 return (IRQ_HANDLED
);
1208 myri10ge_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
1210 cmd
->autoneg
= AUTONEG_DISABLE
;
1211 cmd
->speed
= SPEED_10000
;
1212 cmd
->duplex
= DUPLEX_FULL
;
1217 myri10ge_get_drvinfo(struct net_device
*netdev
, struct ethtool_drvinfo
*info
)
1219 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1221 strlcpy(info
->driver
, "myri10ge", sizeof(info
->driver
));
1222 strlcpy(info
->version
, MYRI10GE_VERSION_STR
, sizeof(info
->version
));
1223 strlcpy(info
->fw_version
, mgp
->fw_version
, sizeof(info
->fw_version
));
1224 strlcpy(info
->bus_info
, pci_name(mgp
->pdev
), sizeof(info
->bus_info
));
1228 myri10ge_get_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1230 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1231 coal
->rx_coalesce_usecs
= mgp
->intr_coal_delay
;
1236 myri10ge_set_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1238 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1240 mgp
->intr_coal_delay
= coal
->rx_coalesce_usecs
;
1241 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
1246 myri10ge_get_pauseparam(struct net_device
*netdev
,
1247 struct ethtool_pauseparam
*pause
)
1249 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1252 pause
->rx_pause
= mgp
->pause
;
1253 pause
->tx_pause
= mgp
->pause
;
1257 myri10ge_set_pauseparam(struct net_device
*netdev
,
1258 struct ethtool_pauseparam
*pause
)
1260 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1262 if (pause
->tx_pause
!= mgp
->pause
)
1263 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1264 if (pause
->rx_pause
!= mgp
->pause
)
1265 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1266 if (pause
->autoneg
!= 0)
1272 myri10ge_get_ringparam(struct net_device
*netdev
,
1273 struct ethtool_ringparam
*ring
)
1275 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1277 ring
->rx_mini_max_pending
= mgp
->rx_small
.mask
+ 1;
1278 ring
->rx_max_pending
= mgp
->rx_big
.mask
+ 1;
1279 ring
->rx_jumbo_max_pending
= 0;
1280 ring
->tx_max_pending
= mgp
->rx_small
.mask
+ 1;
1281 ring
->rx_mini_pending
= ring
->rx_mini_max_pending
;
1282 ring
->rx_pending
= ring
->rx_max_pending
;
1283 ring
->rx_jumbo_pending
= ring
->rx_jumbo_max_pending
;
1284 ring
->tx_pending
= ring
->tx_max_pending
;
1287 static u32
myri10ge_get_rx_csum(struct net_device
*netdev
)
1289 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1296 static int myri10ge_set_rx_csum(struct net_device
*netdev
, u32 csum_enabled
)
1298 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1300 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
1306 static const char myri10ge_gstrings_stats
[][ETH_GSTRING_LEN
] = {
1307 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1308 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1309 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1310 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1311 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1312 "tx_heartbeat_errors", "tx_window_errors",
1313 /* device-specific stats */
1314 "tx_boundary", "WC", "irq", "MSI",
1315 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1316 "serial_number", "tx_pkt_start", "tx_pkt_done",
1317 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1318 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1319 "link_changes", "link_up", "dropped_link_overflow",
1320 "dropped_link_error_or_filtered", "dropped_multicast_filtered",
1321 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1322 "dropped_no_big_buffer"
1325 #define MYRI10GE_NET_STATS_LEN 21
1326 #define MYRI10GE_STATS_LEN sizeof(myri10ge_gstrings_stats) / ETH_GSTRING_LEN
1329 myri10ge_get_strings(struct net_device
*netdev
, u32 stringset
, u8
* data
)
1331 switch (stringset
) {
1333 memcpy(data
, *myri10ge_gstrings_stats
,
1334 sizeof(myri10ge_gstrings_stats
));
1339 static int myri10ge_get_stats_count(struct net_device
*netdev
)
1341 return MYRI10GE_STATS_LEN
;
1345 myri10ge_get_ethtool_stats(struct net_device
*netdev
,
1346 struct ethtool_stats
*stats
, u64
* data
)
1348 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1351 for (i
= 0; i
< MYRI10GE_NET_STATS_LEN
; i
++)
1352 data
[i
] = ((unsigned long *)&mgp
->stats
)[i
];
1354 data
[i
++] = (unsigned int)mgp
->tx
.boundary
;
1355 data
[i
++] = (unsigned int)(mgp
->mtrr
>= 0);
1356 data
[i
++] = (unsigned int)mgp
->pdev
->irq
;
1357 data
[i
++] = (unsigned int)mgp
->msi_enabled
;
1358 data
[i
++] = (unsigned int)mgp
->read_dma
;
1359 data
[i
++] = (unsigned int)mgp
->write_dma
;
1360 data
[i
++] = (unsigned int)mgp
->read_write_dma
;
1361 data
[i
++] = (unsigned int)mgp
->serial_number
;
1362 data
[i
++] = (unsigned int)mgp
->tx
.pkt_start
;
1363 data
[i
++] = (unsigned int)mgp
->tx
.pkt_done
;
1364 data
[i
++] = (unsigned int)mgp
->tx
.req
;
1365 data
[i
++] = (unsigned int)mgp
->tx
.done
;
1366 data
[i
++] = (unsigned int)mgp
->rx_small
.cnt
;
1367 data
[i
++] = (unsigned int)mgp
->rx_big
.cnt
;
1368 data
[i
++] = (unsigned int)mgp
->wake_queue
;
1369 data
[i
++] = (unsigned int)mgp
->stop_queue
;
1370 data
[i
++] = (unsigned int)mgp
->watchdog_resets
;
1371 data
[i
++] = (unsigned int)mgp
->tx_linearized
;
1372 data
[i
++] = (unsigned int)mgp
->link_changes
;
1373 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->link_up
);
1374 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_overflow
);
1376 (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_error_or_filtered
);
1378 (unsigned int)ntohl(mgp
->fw_stats
->dropped_multicast_filtered
);
1379 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_runt
);
1380 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_overrun
);
1381 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_small_buffer
);
1382 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_big_buffer
);
1385 static void myri10ge_set_msglevel(struct net_device
*netdev
, u32 value
)
1387 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1388 mgp
->msg_enable
= value
;
1391 static u32
myri10ge_get_msglevel(struct net_device
*netdev
)
1393 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1394 return mgp
->msg_enable
;
1397 static const struct ethtool_ops myri10ge_ethtool_ops
= {
1398 .get_settings
= myri10ge_get_settings
,
1399 .get_drvinfo
= myri10ge_get_drvinfo
,
1400 .get_coalesce
= myri10ge_get_coalesce
,
1401 .set_coalesce
= myri10ge_set_coalesce
,
1402 .get_pauseparam
= myri10ge_get_pauseparam
,
1403 .set_pauseparam
= myri10ge_set_pauseparam
,
1404 .get_ringparam
= myri10ge_get_ringparam
,
1405 .get_rx_csum
= myri10ge_get_rx_csum
,
1406 .set_rx_csum
= myri10ge_set_rx_csum
,
1407 .get_tx_csum
= ethtool_op_get_tx_csum
,
1408 .set_tx_csum
= ethtool_op_set_tx_hw_csum
,
1409 .get_sg
= ethtool_op_get_sg
,
1410 .set_sg
= ethtool_op_set_sg
,
1412 .get_tso
= ethtool_op_get_tso
,
1413 .set_tso
= ethtool_op_set_tso
,
1415 .get_strings
= myri10ge_get_strings
,
1416 .get_stats_count
= myri10ge_get_stats_count
,
1417 .get_ethtool_stats
= myri10ge_get_ethtool_stats
,
1418 .set_msglevel
= myri10ge_set_msglevel
,
1419 .get_msglevel
= myri10ge_get_msglevel
1422 static int myri10ge_allocate_rings(struct net_device
*dev
)
1424 struct myri10ge_priv
*mgp
;
1425 struct myri10ge_cmd cmd
;
1426 int tx_ring_size
, rx_ring_size
;
1427 int tx_ring_entries
, rx_ring_entries
;
1431 mgp
= netdev_priv(dev
);
1433 /* get ring sizes */
1435 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_RING_SIZE
, &cmd
, 0);
1436 tx_ring_size
= cmd
.data0
;
1437 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_RX_RING_SIZE
, &cmd
, 0);
1438 rx_ring_size
= cmd
.data0
;
1440 tx_ring_entries
= tx_ring_size
/ sizeof(struct mcp_kreq_ether_send
);
1441 rx_ring_entries
= rx_ring_size
/ sizeof(struct mcp_dma_addr
);
1442 mgp
->tx
.mask
= tx_ring_entries
- 1;
1443 mgp
->rx_small
.mask
= mgp
->rx_big
.mask
= rx_ring_entries
- 1;
1445 /* allocate the host shadow rings */
1447 bytes
= 8 + (MYRI10GE_MAX_SEND_DESC_TSO
+ 4)
1448 * sizeof(*mgp
->tx
.req_list
);
1449 mgp
->tx
.req_bytes
= kzalloc(bytes
, GFP_KERNEL
);
1450 if (mgp
->tx
.req_bytes
== NULL
)
1451 goto abort_with_nothing
;
1453 /* ensure req_list entries are aligned to 8 bytes */
1454 mgp
->tx
.req_list
= (struct mcp_kreq_ether_send
*)
1455 ALIGN((unsigned long)mgp
->tx
.req_bytes
, 8);
1457 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.shadow
);
1458 mgp
->rx_small
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1459 if (mgp
->rx_small
.shadow
== NULL
)
1460 goto abort_with_tx_req_bytes
;
1462 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.shadow
);
1463 mgp
->rx_big
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1464 if (mgp
->rx_big
.shadow
== NULL
)
1465 goto abort_with_rx_small_shadow
;
1467 /* allocate the host info rings */
1469 bytes
= tx_ring_entries
* sizeof(*mgp
->tx
.info
);
1470 mgp
->tx
.info
= kzalloc(bytes
, GFP_KERNEL
);
1471 if (mgp
->tx
.info
== NULL
)
1472 goto abort_with_rx_big_shadow
;
1474 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.info
);
1475 mgp
->rx_small
.info
= kzalloc(bytes
, GFP_KERNEL
);
1476 if (mgp
->rx_small
.info
== NULL
)
1477 goto abort_with_tx_info
;
1479 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.info
);
1480 mgp
->rx_big
.info
= kzalloc(bytes
, GFP_KERNEL
);
1481 if (mgp
->rx_big
.info
== NULL
)
1482 goto abort_with_rx_small_info
;
1484 /* Fill the receive rings */
1486 for (i
= 0; i
<= mgp
->rx_small
.mask
; i
++) {
1487 status
= myri10ge_getbuf(&mgp
->rx_small
, mgp
,
1488 mgp
->small_bytes
, i
);
1491 "myri10ge: %s: alloced only %d small bufs\n",
1493 goto abort_with_rx_small_ring
;
1497 for (i
= 0; i
<= mgp
->rx_big
.mask
; i
++) {
1499 myri10ge_getbuf(&mgp
->rx_big
, mgp
, dev
->mtu
+ ETH_HLEN
, i
);
1502 "myri10ge: %s: alloced only %d big bufs\n",
1504 goto abort_with_rx_big_ring
;
1510 abort_with_rx_big_ring
:
1511 for (i
= 0; i
<= mgp
->rx_big
.mask
; i
++) {
1512 if (mgp
->rx_big
.info
[i
].skb
!= NULL
)
1513 dev_kfree_skb_any(mgp
->rx_big
.info
[i
].skb
);
1514 if (pci_unmap_len(&mgp
->rx_big
.info
[i
], len
))
1515 pci_unmap_single(mgp
->pdev
,
1516 pci_unmap_addr(&mgp
->rx_big
.info
[i
],
1518 pci_unmap_len(&mgp
->rx_big
.info
[i
],
1520 PCI_DMA_FROMDEVICE
);
1523 abort_with_rx_small_ring
:
1524 for (i
= 0; i
<= mgp
->rx_small
.mask
; i
++) {
1525 if (mgp
->rx_small
.info
[i
].skb
!= NULL
)
1526 dev_kfree_skb_any(mgp
->rx_small
.info
[i
].skb
);
1527 if (pci_unmap_len(&mgp
->rx_small
.info
[i
], len
))
1528 pci_unmap_single(mgp
->pdev
,
1529 pci_unmap_addr(&mgp
->rx_small
.info
[i
],
1531 pci_unmap_len(&mgp
->rx_small
.info
[i
],
1533 PCI_DMA_FROMDEVICE
);
1535 kfree(mgp
->rx_big
.info
);
1537 abort_with_rx_small_info
:
1538 kfree(mgp
->rx_small
.info
);
1541 kfree(mgp
->tx
.info
);
1543 abort_with_rx_big_shadow
:
1544 kfree(mgp
->rx_big
.shadow
);
1546 abort_with_rx_small_shadow
:
1547 kfree(mgp
->rx_small
.shadow
);
1549 abort_with_tx_req_bytes
:
1550 kfree(mgp
->tx
.req_bytes
);
1551 mgp
->tx
.req_bytes
= NULL
;
1552 mgp
->tx
.req_list
= NULL
;
1558 static void myri10ge_free_rings(struct net_device
*dev
)
1560 struct myri10ge_priv
*mgp
;
1561 struct sk_buff
*skb
;
1562 struct myri10ge_tx_buf
*tx
;
1565 mgp
= netdev_priv(dev
);
1567 for (i
= 0; i
<= mgp
->rx_big
.mask
; i
++) {
1568 if (mgp
->rx_big
.info
[i
].skb
!= NULL
)
1569 dev_kfree_skb_any(mgp
->rx_big
.info
[i
].skb
);
1570 if (pci_unmap_len(&mgp
->rx_big
.info
[i
], len
))
1571 pci_unmap_single(mgp
->pdev
,
1572 pci_unmap_addr(&mgp
->rx_big
.info
[i
],
1574 pci_unmap_len(&mgp
->rx_big
.info
[i
],
1576 PCI_DMA_FROMDEVICE
);
1579 for (i
= 0; i
<= mgp
->rx_small
.mask
; i
++) {
1580 if (mgp
->rx_small
.info
[i
].skb
!= NULL
)
1581 dev_kfree_skb_any(mgp
->rx_small
.info
[i
].skb
);
1582 if (pci_unmap_len(&mgp
->rx_small
.info
[i
], len
))
1583 pci_unmap_single(mgp
->pdev
,
1584 pci_unmap_addr(&mgp
->rx_small
.info
[i
],
1586 pci_unmap_len(&mgp
->rx_small
.info
[i
],
1588 PCI_DMA_FROMDEVICE
);
1592 while (tx
->done
!= tx
->req
) {
1593 idx
= tx
->done
& tx
->mask
;
1594 skb
= tx
->info
[idx
].skb
;
1597 tx
->info
[idx
].skb
= NULL
;
1599 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1600 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1602 mgp
->stats
.tx_dropped
++;
1603 dev_kfree_skb_any(skb
);
1605 pci_unmap_single(mgp
->pdev
,
1606 pci_unmap_addr(&tx
->info
[idx
],
1611 pci_unmap_page(mgp
->pdev
,
1612 pci_unmap_addr(&tx
->info
[idx
],
1617 kfree(mgp
->rx_big
.info
);
1619 kfree(mgp
->rx_small
.info
);
1621 kfree(mgp
->tx
.info
);
1623 kfree(mgp
->rx_big
.shadow
);
1625 kfree(mgp
->rx_small
.shadow
);
1627 kfree(mgp
->tx
.req_bytes
);
1628 mgp
->tx
.req_bytes
= NULL
;
1629 mgp
->tx
.req_list
= NULL
;
1632 static int myri10ge_open(struct net_device
*dev
)
1634 struct myri10ge_priv
*mgp
;
1635 struct myri10ge_cmd cmd
;
1636 int status
, big_pow2
;
1638 mgp
= netdev_priv(dev
);
1640 if (mgp
->running
!= MYRI10GE_ETH_STOPPED
)
1643 mgp
->running
= MYRI10GE_ETH_STARTING
;
1644 status
= myri10ge_reset(mgp
);
1646 printk(KERN_ERR
"myri10ge: %s: failed reset\n", dev
->name
);
1647 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1651 /* decide what small buffer size to use. For good TCP rx
1652 * performance, it is important to not receive 1514 byte
1653 * frames into jumbo buffers, as it confuses the socket buffer
1654 * accounting code, leading to drops and erratic performance.
1657 if (dev
->mtu
<= ETH_DATA_LEN
)
1658 mgp
->small_bytes
= 128; /* enough for a TCP header */
1660 mgp
->small_bytes
= ETH_FRAME_LEN
; /* enough for an ETH_DATA_LEN frame */
1662 /* Override the small buffer size? */
1663 if (myri10ge_small_bytes
> 0)
1664 mgp
->small_bytes
= myri10ge_small_bytes
;
1666 /* If the user sets an obscenely small MTU, adjust the small
1667 * bytes down to nearly nothing */
1668 if (mgp
->small_bytes
>= (dev
->mtu
+ ETH_HLEN
))
1669 mgp
->small_bytes
= 64;
1671 /* get the lanai pointers to the send and receive rings */
1673 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_OFFSET
, &cmd
, 0);
1675 (struct mcp_kreq_ether_send __iomem
*)(mgp
->sram
+ cmd
.data0
);
1678 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SMALL_RX_OFFSET
, &cmd
, 0);
1679 mgp
->rx_small
.lanai
=
1680 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1682 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_BIG_RX_OFFSET
, &cmd
, 0);
1684 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1688 "myri10ge: %s: failed to get ring sizes or locations\n",
1690 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1694 if (mgp
->mtrr
>= 0) {
1695 mgp
->tx
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_SEND_4
;
1696 mgp
->rx_small
.wc_fifo
=
1697 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_SMALL
;
1698 mgp
->rx_big
.wc_fifo
=
1699 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_BIG
;
1701 mgp
->tx
.wc_fifo
= NULL
;
1702 mgp
->rx_small
.wc_fifo
= NULL
;
1703 mgp
->rx_big
.wc_fifo
= NULL
;
1706 status
= myri10ge_allocate_rings(dev
);
1708 goto abort_with_nothing
;
1710 /* Firmware needs the big buff size as a power of 2. Lie and
1711 * tell him the buffer is larger, because we only use 1
1712 * buffer/pkt, and the mtu will prevent overruns.
1714 big_pow2
= dev
->mtu
+ ETH_HLEN
+ MXGEFW_PAD
;
1715 while ((big_pow2
& (big_pow2
- 1)) != 0)
1718 /* now give firmware buffers sizes, and MTU */
1719 cmd
.data0
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
;
1720 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_MTU
, &cmd
, 0);
1721 cmd
.data0
= mgp
->small_bytes
;
1723 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE
, &cmd
, 0);
1724 cmd
.data0
= big_pow2
;
1726 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_BIG_BUFFER_SIZE
, &cmd
, 0);
1728 printk(KERN_ERR
"myri10ge: %s: Couldn't set buffer sizes\n",
1730 goto abort_with_rings
;
1733 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->fw_stats_bus
);
1734 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->fw_stats_bus
);
1735 cmd
.data2
= sizeof(struct mcp_irq_data
);
1736 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_STATS_DMA_V2
, &cmd
, 0);
1737 if (status
== -ENOSYS
) {
1738 dma_addr_t bus
= mgp
->fw_stats_bus
;
1739 bus
+= offsetof(struct mcp_irq_data
, send_done_count
);
1740 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(bus
);
1741 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(bus
);
1742 status
= myri10ge_send_cmd(mgp
,
1743 MXGEFW_CMD_SET_STATS_DMA_OBSOLETE
,
1745 /* Firmware cannot support multicast without STATS_DMA_V2 */
1746 mgp
->fw_multicast_support
= 0;
1748 mgp
->fw_multicast_support
= 1;
1751 printk(KERN_ERR
"myri10ge: %s: Couldn't set stats DMA\n",
1753 goto abort_with_rings
;
1756 mgp
->link_state
= htonl(~0U);
1757 mgp
->rdma_tags_available
= 15;
1759 netif_poll_enable(mgp
->dev
); /* must happen prior to any irq */
1761 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_UP
, &cmd
, 0);
1763 printk(KERN_ERR
"myri10ge: %s: Couldn't bring up link\n",
1765 goto abort_with_rings
;
1768 mgp
->wake_queue
= 0;
1769 mgp
->stop_queue
= 0;
1770 mgp
->running
= MYRI10GE_ETH_RUNNING
;
1771 mgp
->watchdog_timer
.expires
= jiffies
+ myri10ge_watchdog_timeout
* HZ
;
1772 add_timer(&mgp
->watchdog_timer
);
1773 netif_wake_queue(dev
);
1777 myri10ge_free_rings(dev
);
1780 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1784 static int myri10ge_close(struct net_device
*dev
)
1786 struct myri10ge_priv
*mgp
;
1787 struct myri10ge_cmd cmd
;
1788 int status
, old_down_cnt
;
1790 mgp
= netdev_priv(dev
);
1792 if (mgp
->running
!= MYRI10GE_ETH_RUNNING
)
1795 if (mgp
->tx
.req_bytes
== NULL
)
1798 del_timer_sync(&mgp
->watchdog_timer
);
1799 mgp
->running
= MYRI10GE_ETH_STOPPING
;
1800 netif_poll_disable(mgp
->dev
);
1801 netif_carrier_off(dev
);
1802 netif_stop_queue(dev
);
1803 old_down_cnt
= mgp
->down_cnt
;
1805 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_DOWN
, &cmd
, 0);
1807 printk(KERN_ERR
"myri10ge: %s: Couldn't bring down link\n",
1810 wait_event_timeout(mgp
->down_wq
, old_down_cnt
!= mgp
->down_cnt
, HZ
);
1811 if (old_down_cnt
== mgp
->down_cnt
)
1812 printk(KERN_ERR
"myri10ge: %s never got down irq\n", dev
->name
);
1814 netif_tx_disable(dev
);
1816 myri10ge_free_rings(dev
);
1818 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1822 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1823 * backwards one at a time and handle ring wraps */
1826 myri10ge_submit_req_backwards(struct myri10ge_tx_buf
*tx
,
1827 struct mcp_kreq_ether_send
*src
, int cnt
)
1829 int idx
, starting_slot
;
1830 starting_slot
= tx
->req
;
1833 idx
= (starting_slot
+ cnt
) & tx
->mask
;
1834 myri10ge_pio_copy(&tx
->lanai
[idx
], &src
[cnt
], sizeof(*src
));
1840 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1841 * at most 32 bytes at a time, so as to avoid involving the software
1842 * pio handler in the nic. We re-write the first segment's flags
1843 * to mark them valid only after writing the entire chain.
1847 myri10ge_submit_req(struct myri10ge_tx_buf
*tx
, struct mcp_kreq_ether_send
*src
,
1851 struct mcp_kreq_ether_send __iomem
*dstp
, *dst
;
1852 struct mcp_kreq_ether_send
*srcp
;
1855 idx
= tx
->req
& tx
->mask
;
1857 last_flags
= src
->flags
;
1860 dst
= dstp
= &tx
->lanai
[idx
];
1863 if ((idx
+ cnt
) < tx
->mask
) {
1864 for (i
= 0; i
< (cnt
- 1); i
+= 2) {
1865 myri10ge_pio_copy(dstp
, srcp
, 2 * sizeof(*src
));
1866 mb(); /* force write every 32 bytes */
1871 /* submit all but the first request, and ensure
1872 * that it is submitted below */
1873 myri10ge_submit_req_backwards(tx
, src
, cnt
);
1877 /* submit the first request */
1878 myri10ge_pio_copy(dstp
, srcp
, sizeof(*src
));
1879 mb(); /* barrier before setting valid flag */
1882 /* re-write the last 32-bits with the valid flags */
1883 src
->flags
= last_flags
;
1884 put_be32(*((__be32
*) src
+ 3), (__be32 __iomem
*) dst
+ 3);
1890 myri10ge_submit_req_wc(struct myri10ge_tx_buf
*tx
,
1891 struct mcp_kreq_ether_send
*src
, int cnt
)
1896 myri10ge_pio_copy(tx
->wc_fifo
, src
, 64);
1902 /* pad it to 64 bytes. The src is 64 bytes bigger than it
1903 * needs to be so that we don't overrun it */
1904 myri10ge_pio_copy(tx
->wc_fifo
+ MXGEFW_ETH_SEND_OFFSET(cnt
),
1911 * Transmit a packet. We need to split the packet so that a single
1912 * segment does not cross myri10ge->tx.boundary, so this makes segment
1913 * counting tricky. So rather than try to count segments up front, we
1914 * just give up if there are too few segments to hold a reasonably
1915 * fragmented packet currently available. If we run
1916 * out of segments while preparing a packet for DMA, we just linearize
1920 static int myri10ge_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1922 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
1923 struct mcp_kreq_ether_send
*req
;
1924 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1925 struct skb_frag_struct
*frag
;
1928 __be32 high_swapped
;
1930 int idx
, last_idx
, avail
, frag_cnt
, frag_idx
, count
, mss
, max_segments
;
1931 u16 pseudo_hdr_offset
, cksum_offset
;
1932 int cum_len
, seglen
, boundary
, rdma_count
;
1937 avail
= tx
->mask
- 1 - (tx
->req
- tx
->done
);
1940 max_segments
= MXGEFW_MAX_SEND_DESC
;
1943 if (skb
->len
> (dev
->mtu
+ ETH_HLEN
)) {
1944 mss
= skb_shinfo(skb
)->gso_size
;
1946 max_segments
= MYRI10GE_MAX_SEND_DESC_TSO
;
1948 #endif /*NETIF_F_TSO */
1950 if ((unlikely(avail
< max_segments
))) {
1951 /* we are out of transmit resources */
1953 netif_stop_queue(dev
);
1957 /* Setup checksum offloading, if needed */
1959 pseudo_hdr_offset
= 0;
1961 flags
= (MXGEFW_FLAGS_NO_TSO
| MXGEFW_FLAGS_FIRST
);
1962 if (likely(skb
->ip_summed
== CHECKSUM_PARTIAL
)) {
1963 cksum_offset
= (skb
->h
.raw
- skb
->data
);
1964 pseudo_hdr_offset
= cksum_offset
+ skb
->csum_offset
;
1965 /* If the headers are excessively large, then we must
1966 * fall back to a software checksum */
1967 if (unlikely(cksum_offset
> 255 || pseudo_hdr_offset
> 127)) {
1968 if (skb_checksum_help(skb
))
1971 pseudo_hdr_offset
= 0;
1973 odd_flag
= MXGEFW_FLAGS_ALIGN_ODD
;
1974 flags
|= MXGEFW_FLAGS_CKSUM
;
1981 if (mss
) { /* TSO */
1982 /* this removes any CKSUM flag from before */
1983 flags
= (MXGEFW_FLAGS_TSO_HDR
| MXGEFW_FLAGS_FIRST
);
1985 /* negative cum_len signifies to the
1986 * send loop that we are still in the
1987 * header portion of the TSO packet.
1988 * TSO header must be at most 134 bytes long */
1989 cum_len
= -((skb
->h
.raw
- skb
->data
) + (skb
->h
.th
->doff
<< 2));
1991 /* for TSO, pseudo_hdr_offset holds mss.
1992 * The firmware figures out where to put
1993 * the checksum by parsing the header. */
1994 pseudo_hdr_offset
= mss
;
1996 #endif /*NETIF_F_TSO */
1997 /* Mark small packets, and pad out tiny packets */
1998 if (skb
->len
<= MXGEFW_SEND_SMALL_SIZE
) {
1999 flags
|= MXGEFW_FLAGS_SMALL
;
2001 /* pad frames to at least ETH_ZLEN bytes */
2002 if (unlikely(skb
->len
< ETH_ZLEN
)) {
2003 if (skb_padto(skb
, ETH_ZLEN
)) {
2004 /* The packet is gone, so we must
2006 mgp
->stats
.tx_dropped
+= 1;
2009 /* adjust the len to account for the zero pad
2010 * so that the nic can know how long it is */
2011 skb
->len
= ETH_ZLEN
;
2015 /* map the skb for DMA */
2016 len
= skb
->len
- skb
->data_len
;
2017 idx
= tx
->req
& tx
->mask
;
2018 tx
->info
[idx
].skb
= skb
;
2019 bus
= pci_map_single(mgp
->pdev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
2020 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2021 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2023 frag_cnt
= skb_shinfo(skb
)->nr_frags
;
2028 /* "rdma_count" is the number of RDMAs belonging to the
2029 * current packet BEFORE the current send request. For
2030 * non-TSO packets, this is equal to "count".
2031 * For TSO packets, rdma_count needs to be reset
2032 * to 0 after a segment cut.
2034 * The rdma_count field of the send request is
2035 * the number of RDMAs of the packet starting at
2036 * that request. For TSO send requests with one ore more cuts
2037 * in the middle, this is the number of RDMAs starting
2038 * after the last cut in the request. All previous
2039 * segments before the last cut implicitly have 1 RDMA.
2041 * Since the number of RDMAs is not known beforehand,
2042 * it must be filled-in retroactively - after each
2043 * segmentation cut or at the end of the entire packet.
2047 /* Break the SKB or Fragment up into pieces which
2048 * do not cross mgp->tx.boundary */
2049 low
= MYRI10GE_LOWPART_TO_U32(bus
);
2050 high_swapped
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
2055 if (unlikely(count
== max_segments
))
2056 goto abort_linearize
;
2058 boundary
= (low
+ tx
->boundary
) & ~(tx
->boundary
- 1);
2059 seglen
= boundary
- low
;
2062 flags_next
= flags
& ~MXGEFW_FLAGS_FIRST
;
2063 cum_len_next
= cum_len
+ seglen
;
2065 if (mss
) { /* TSO */
2066 (req
- rdma_count
)->rdma_count
= rdma_count
+ 1;
2068 if (likely(cum_len
>= 0)) { /* payload */
2069 int next_is_first
, chop
;
2071 chop
= (cum_len_next
> mss
);
2072 cum_len_next
= cum_len_next
% mss
;
2073 next_is_first
= (cum_len_next
== 0);
2074 flags
|= chop
* MXGEFW_FLAGS_TSO_CHOP
;
2075 flags_next
|= next_is_first
*
2077 rdma_count
|= -(chop
| next_is_first
);
2078 rdma_count
+= chop
& !next_is_first
;
2079 } else if (likely(cum_len_next
>= 0)) { /* header ends */
2085 small
= (mss
<= MXGEFW_SEND_SMALL_SIZE
);
2086 flags_next
= MXGEFW_FLAGS_TSO_PLD
|
2087 MXGEFW_FLAGS_FIRST
|
2088 (small
* MXGEFW_FLAGS_SMALL
);
2091 #endif /* NETIF_F_TSO */
2092 req
->addr_high
= high_swapped
;
2093 req
->addr_low
= htonl(low
);
2094 req
->pseudo_hdr_offset
= htons(pseudo_hdr_offset
);
2095 req
->pad
= 0; /* complete solid 16-byte block; does this matter? */
2096 req
->rdma_count
= 1;
2097 req
->length
= htons(seglen
);
2098 req
->cksum_offset
= cksum_offset
;
2099 req
->flags
= flags
| ((cum_len
& 1) * odd_flag
);
2103 cum_len
= cum_len_next
;
2108 if (unlikely(cksum_offset
> seglen
))
2109 cksum_offset
-= seglen
;
2113 if (frag_idx
== frag_cnt
)
2116 /* map next fragment for DMA */
2117 idx
= (count
+ tx
->req
) & tx
->mask
;
2118 frag
= &skb_shinfo(skb
)->frags
[frag_idx
];
2121 bus
= pci_map_page(mgp
->pdev
, frag
->page
, frag
->page_offset
,
2122 len
, PCI_DMA_TODEVICE
);
2123 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2124 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2127 (req
- rdma_count
)->rdma_count
= rdma_count
;
2132 req
->flags
|= MXGEFW_FLAGS_TSO_LAST
;
2133 } while (!(req
->flags
& (MXGEFW_FLAGS_TSO_CHOP
|
2134 MXGEFW_FLAGS_FIRST
)));
2136 idx
= ((count
- 1) + tx
->req
) & tx
->mask
;
2137 tx
->info
[idx
].last
= 1;
2138 if (tx
->wc_fifo
== NULL
)
2139 myri10ge_submit_req(tx
, tx
->req_list
, count
);
2141 myri10ge_submit_req_wc(tx
, tx
->req_list
, count
);
2143 if ((avail
- count
) < MXGEFW_MAX_SEND_DESC
) {
2145 netif_stop_queue(dev
);
2147 dev
->trans_start
= jiffies
;
2151 /* Free any DMA resources we've alloced and clear out the skb
2152 * slot so as to not trip up assertions, and to avoid a
2153 * double-free if linearizing fails */
2155 last_idx
= (idx
+ 1) & tx
->mask
;
2156 idx
= tx
->req
& tx
->mask
;
2157 tx
->info
[idx
].skb
= NULL
;
2159 len
= pci_unmap_len(&tx
->info
[idx
], len
);
2161 if (tx
->info
[idx
].skb
!= NULL
)
2162 pci_unmap_single(mgp
->pdev
,
2163 pci_unmap_addr(&tx
->info
[idx
],
2167 pci_unmap_page(mgp
->pdev
,
2168 pci_unmap_addr(&tx
->info
[idx
],
2171 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
2172 tx
->info
[idx
].skb
= NULL
;
2174 idx
= (idx
+ 1) & tx
->mask
;
2175 } while (idx
!= last_idx
);
2176 if (skb_is_gso(skb
)) {
2178 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2183 if (skb_linearize(skb
))
2186 mgp
->tx_linearized
++;
2190 dev_kfree_skb_any(skb
);
2191 mgp
->stats
.tx_dropped
+= 1;
2196 static struct net_device_stats
*myri10ge_get_stats(struct net_device
*dev
)
2198 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2202 static void myri10ge_set_multicast_list(struct net_device
*dev
)
2204 struct myri10ge_cmd cmd
;
2205 struct myri10ge_priv
*mgp
;
2206 struct dev_mc_list
*mc_list
;
2207 __be32 data
[2] = {0, 0};
2210 mgp
= netdev_priv(dev
);
2211 /* can be called from atomic contexts,
2212 * pass 1 to force atomicity in myri10ge_send_cmd() */
2213 myri10ge_change_promisc(mgp
, dev
->flags
& IFF_PROMISC
, 1);
2215 /* This firmware is known to not support multicast */
2216 if (!mgp
->fw_multicast_support
)
2219 /* Disable multicast filtering */
2221 err
= myri10ge_send_cmd(mgp
, MXGEFW_ENABLE_ALLMULTI
, &cmd
, 1);
2223 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2224 " error status: %d\n", dev
->name
, err
);
2228 if (dev
->flags
& IFF_ALLMULTI
) {
2229 /* request to disable multicast filtering, so quit here */
2233 /* Flush the filters */
2235 err
= myri10ge_send_cmd(mgp
, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS
,
2239 "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2240 ", error status: %d\n", dev
->name
, err
);
2244 /* Walk the multicast list, and add each address */
2245 for (mc_list
= dev
->mc_list
; mc_list
!= NULL
; mc_list
= mc_list
->next
) {
2246 memcpy(data
, &mc_list
->dmi_addr
, 6);
2247 cmd
.data0
= ntohl(data
[0]);
2248 cmd
.data1
= ntohl(data
[1]);
2249 err
= myri10ge_send_cmd(mgp
, MXGEFW_JOIN_MULTICAST_GROUP
,
2253 printk(KERN_ERR
"myri10ge: %s: Failed "
2254 "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2255 "%d\t", dev
->name
, err
);
2256 printk(KERN_ERR
"MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
2257 ((unsigned char *)&mc_list
->dmi_addr
)[0],
2258 ((unsigned char *)&mc_list
->dmi_addr
)[1],
2259 ((unsigned char *)&mc_list
->dmi_addr
)[2],
2260 ((unsigned char *)&mc_list
->dmi_addr
)[3],
2261 ((unsigned char *)&mc_list
->dmi_addr
)[4],
2262 ((unsigned char *)&mc_list
->dmi_addr
)[5]
2267 /* Enable multicast filtering */
2268 err
= myri10ge_send_cmd(mgp
, MXGEFW_DISABLE_ALLMULTI
, &cmd
, 1);
2270 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2271 "error status: %d\n", dev
->name
, err
);
2281 static int myri10ge_set_mac_address(struct net_device
*dev
, void *addr
)
2283 struct sockaddr
*sa
= addr
;
2284 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2287 if (!is_valid_ether_addr(sa
->sa_data
))
2288 return -EADDRNOTAVAIL
;
2290 status
= myri10ge_update_mac_address(mgp
, sa
->sa_data
);
2293 "myri10ge: %s: changing mac address failed with %d\n",
2298 /* change the dev structure */
2299 memcpy(dev
->dev_addr
, sa
->sa_data
, 6);
2303 static int myri10ge_change_mtu(struct net_device
*dev
, int new_mtu
)
2305 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2308 if ((new_mtu
< 68) || (ETH_HLEN
+ new_mtu
> MYRI10GE_MAX_ETHER_MTU
)) {
2309 printk(KERN_ERR
"myri10ge: %s: new mtu (%d) is not valid\n",
2310 dev
->name
, new_mtu
);
2313 printk(KERN_INFO
"%s: changing mtu from %d to %d\n",
2314 dev
->name
, dev
->mtu
, new_mtu
);
2316 /* if we change the mtu on an active device, we must
2317 * reset the device so the firmware sees the change */
2318 myri10ge_close(dev
);
2328 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2329 * Only do it if the bridge is a root port since we don't want to disturb
2330 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2333 static void myri10ge_enable_ecrc(struct myri10ge_priv
*mgp
)
2335 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2336 struct device
*dev
= &mgp
->pdev
->dev
;
2343 if (!myri10ge_ecrc_enable
|| !bridge
)
2346 /* check that the bridge is a root port */
2347 cap
= pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2348 pci_read_config_word(bridge
, cap
+ PCI_CAP_FLAGS
, &val
);
2349 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2350 if (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
) {
2351 if (myri10ge_ecrc_enable
> 1) {
2352 struct pci_dev
*old_bridge
= bridge
;
2354 /* Walk the hierarchy up to the root port
2355 * where ECRC has to be enabled */
2357 bridge
= bridge
->bus
->self
;
2360 "Failed to find root port"
2361 " to force ECRC\n");
2365 pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2366 pci_read_config_word(bridge
,
2367 cap
+ PCI_CAP_FLAGS
, &val
);
2368 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2369 } while (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
);
2372 "Forcing ECRC on non-root port %s"
2373 " (enabling on root port %s)\n",
2374 pci_name(old_bridge
), pci_name(bridge
));
2377 "Not enabling ECRC on non-root port %s\n",
2383 cap
= pci_find_ext_capability(bridge
, PCI_EXT_CAP_ID_ERR
);
2387 ret
= pci_read_config_dword(bridge
, cap
+ PCI_ERR_CAP
, &err_cap
);
2389 dev_err(dev
, "failed reading ext-conf-space of %s\n",
2391 dev_err(dev
, "\t pci=nommconf in use? "
2392 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2395 if (!(err_cap
& PCI_ERR_CAP_ECRC_GENC
))
2398 err_cap
|= PCI_ERR_CAP_ECRC_GENE
;
2399 pci_write_config_dword(bridge
, cap
+ PCI_ERR_CAP
, err_cap
);
2400 dev_info(dev
, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge
));
2401 mgp
->tx
.boundary
= 4096;
2402 mgp
->fw_name
= myri10ge_fw_aligned
;
2406 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2407 * when the PCI-E Completion packets are aligned on an 8-byte
2408 * boundary. Some PCI-E chip sets always align Completion packets; on
2409 * the ones that do not, the alignment can be enforced by enabling
2410 * ECRC generation (if supported).
2412 * When PCI-E Completion packets are not aligned, it is actually more
2413 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2415 * If the driver can neither enable ECRC nor verify that it has
2416 * already been enabled, then it must use a firmware image which works
2417 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2418 * should also ensure that it never gives the device a Read-DMA which is
2419 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2420 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2421 * firmware image, and set tx.boundary to 4KB.
2424 #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7
2425 #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa
2427 static void myri10ge_select_firmware(struct myri10ge_priv
*mgp
)
2429 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2431 mgp
->tx
.boundary
= 2048;
2432 mgp
->fw_name
= myri10ge_fw_unaligned
;
2434 if (myri10ge_force_firmware
== 0) {
2435 int link_width
, exp_cap
;
2438 exp_cap
= pci_find_capability(mgp
->pdev
, PCI_CAP_ID_EXP
);
2439 pci_read_config_word(mgp
->pdev
, exp_cap
+ PCI_EXP_LNKSTA
, &lnk
);
2440 link_width
= (lnk
>> 4) & 0x3f;
2442 myri10ge_enable_ecrc(mgp
);
2444 /* Check to see if Link is less than 8 or if the
2445 * upstream bridge is known to provide aligned
2447 if (link_width
< 8) {
2448 dev_info(&mgp
->pdev
->dev
, "PCIE x%d Link\n",
2450 mgp
->tx
.boundary
= 4096;
2451 mgp
->fw_name
= myri10ge_fw_aligned
;
2452 } else if (bridge
&&
2453 /* ServerWorks HT2000/HT1000 */
2454 ((bridge
->vendor
== PCI_VENDOR_ID_SERVERWORKS
2455 && bridge
->device
==
2456 PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE
)
2457 /* All Intel E5000 PCIE ports */
2458 || (bridge
->vendor
== PCI_VENDOR_ID_INTEL
2459 && bridge
->device
>=
2460 PCI_DEVICE_ID_INTEL_E5000_PCIE23
2461 && bridge
->device
<=
2462 PCI_DEVICE_ID_INTEL_E5000_PCIE47
))) {
2463 dev_info(&mgp
->pdev
->dev
,
2464 "Assuming aligned completions (0x%x:0x%x)\n",
2465 bridge
->vendor
, bridge
->device
);
2466 mgp
->tx
.boundary
= 4096;
2467 mgp
->fw_name
= myri10ge_fw_aligned
;
2470 if (myri10ge_force_firmware
== 1) {
2471 dev_info(&mgp
->pdev
->dev
,
2472 "Assuming aligned completions (forced)\n");
2473 mgp
->tx
.boundary
= 4096;
2474 mgp
->fw_name
= myri10ge_fw_aligned
;
2476 dev_info(&mgp
->pdev
->dev
,
2477 "Assuming unaligned completions (forced)\n");
2478 mgp
->tx
.boundary
= 2048;
2479 mgp
->fw_name
= myri10ge_fw_unaligned
;
2482 if (myri10ge_fw_name
!= NULL
) {
2483 dev_info(&mgp
->pdev
->dev
, "overriding firmware to %s\n",
2485 mgp
->fw_name
= myri10ge_fw_name
;
2489 static void myri10ge_save_state(struct myri10ge_priv
*mgp
)
2491 struct pci_dev
*pdev
= mgp
->pdev
;
2494 pci_save_state(pdev
);
2495 /* now save PCIe and MSI state that Linux will not
2497 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2498 pci_read_config_dword(pdev
, cap
+ PCI_EXP_DEVCTL
, &mgp
->devctl
);
2499 cap
= pci_find_capability(pdev
, PCI_CAP_ID_MSI
);
2500 pci_read_config_word(pdev
, cap
+ PCI_MSI_FLAGS
, &mgp
->msi_flags
);
2503 static void myri10ge_restore_state(struct myri10ge_priv
*mgp
)
2505 struct pci_dev
*pdev
= mgp
->pdev
;
2508 /* restore PCIe and MSI state that linux will not */
2509 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2510 pci_write_config_dword(pdev
, cap
+ PCI_CAP_ID_EXP
, mgp
->devctl
);
2511 cap
= pci_find_capability(pdev
, PCI_CAP_ID_MSI
);
2512 pci_write_config_word(pdev
, cap
+ PCI_MSI_FLAGS
, mgp
->msi_flags
);
2514 pci_restore_state(pdev
);
2519 static int myri10ge_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2521 struct myri10ge_priv
*mgp
;
2522 struct net_device
*netdev
;
2524 mgp
= pci_get_drvdata(pdev
);
2529 netif_device_detach(netdev
);
2530 if (netif_running(netdev
)) {
2531 printk(KERN_INFO
"myri10ge: closing %s\n", netdev
->name
);
2533 myri10ge_close(netdev
);
2536 myri10ge_dummy_rdma(mgp
, 0);
2537 free_irq(pdev
->irq
, mgp
);
2538 myri10ge_save_state(mgp
);
2539 pci_disable_device(pdev
);
2540 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2544 static int myri10ge_resume(struct pci_dev
*pdev
)
2546 struct myri10ge_priv
*mgp
;
2547 struct net_device
*netdev
;
2551 mgp
= pci_get_drvdata(pdev
);
2555 pci_set_power_state(pdev
, 0); /* zeros conf space as a side effect */
2556 msleep(5); /* give card time to respond */
2557 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2558 if (vendor
== 0xffff) {
2559 printk(KERN_ERR
"myri10ge: %s: device disappeared!\n",
2563 myri10ge_restore_state(mgp
);
2565 status
= pci_enable_device(pdev
);
2567 dev_err(&pdev
->dev
, "failed to enable device\n");
2571 pci_set_master(pdev
);
2573 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
2576 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
2577 goto abort_with_enabled
;
2580 myri10ge_reset(mgp
);
2581 myri10ge_dummy_rdma(mgp
, 1);
2583 /* Save configuration space to be restored if the
2584 * nic resets due to a parity error */
2585 myri10ge_save_state(mgp
);
2587 if (netif_running(netdev
)) {
2589 myri10ge_open(netdev
);
2592 netif_device_attach(netdev
);
2597 pci_disable_device(pdev
);
2602 #endif /* CONFIG_PM */
2604 static u32
myri10ge_read_reboot(struct myri10ge_priv
*mgp
)
2606 struct pci_dev
*pdev
= mgp
->pdev
;
2607 int vs
= mgp
->vendor_specific_offset
;
2610 /*enter read32 mode */
2611 pci_write_config_byte(pdev
, vs
+ 0x10, 0x3);
2613 /*read REBOOT_STATUS (0xfffffff0) */
2614 pci_write_config_dword(pdev
, vs
+ 0x18, 0xfffffff0);
2615 pci_read_config_dword(pdev
, vs
+ 0x14, &reboot
);
2620 * This watchdog is used to check whether the board has suffered
2621 * from a parity error and needs to be recovered.
2623 static void myri10ge_watchdog(struct work_struct
*work
)
2625 struct myri10ge_priv
*mgp
=
2626 container_of(work
, struct myri10ge_priv
, watchdog_work
);
2631 mgp
->watchdog_resets
++;
2632 pci_read_config_word(mgp
->pdev
, PCI_COMMAND
, &cmd
);
2633 if ((cmd
& PCI_COMMAND_MASTER
) == 0) {
2634 /* Bus master DMA disabled? Check to see
2635 * if the card rebooted due to a parity error
2636 * For now, just report it */
2637 reboot
= myri10ge_read_reboot(mgp
);
2639 "myri10ge: %s: NIC rebooted (0x%x), resetting\n",
2640 mgp
->dev
->name
, reboot
);
2642 * A rebooted nic will come back with config space as
2643 * it was after power was applied to PCIe bus.
2644 * Attempt to restore config space which was saved
2645 * when the driver was loaded, or the last time the
2646 * nic was resumed from power saving mode.
2648 myri10ge_restore_state(mgp
);
2650 /* if we get back -1's from our slot, perhaps somebody
2651 * powered off our card. Don't try to reset it in
2653 if (cmd
== 0xffff) {
2654 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2655 if (vendor
== 0xffff) {
2657 "myri10ge: %s: device disappeared!\n",
2662 /* Perhaps it is a software error. Try to reset */
2664 printk(KERN_ERR
"myri10ge: %s: device timeout, resetting\n",
2666 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2667 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2668 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2669 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2671 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2672 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2673 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2674 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2677 myri10ge_close(mgp
->dev
);
2678 status
= myri10ge_load_firmware(mgp
);
2680 printk(KERN_ERR
"myri10ge: %s: failed to load firmware\n",
2683 myri10ge_open(mgp
->dev
);
2688 * We use our own timer routine rather than relying upon
2689 * netdev->tx_timeout because we have a very large hardware transmit
2690 * queue. Due to the large queue, the netdev->tx_timeout function
2691 * cannot detect a NIC with a parity error in a timely fashion if the
2692 * NIC is lightly loaded.
2694 static void myri10ge_watchdog_timer(unsigned long arg
)
2696 struct myri10ge_priv
*mgp
;
2698 mgp
= (struct myri10ge_priv
*)arg
;
2699 if (mgp
->tx
.req
!= mgp
->tx
.done
&&
2700 mgp
->tx
.done
== mgp
->watchdog_tx_done
&&
2701 mgp
->watchdog_tx_req
!= mgp
->watchdog_tx_done
)
2702 /* nic seems like it might be stuck.. */
2703 schedule_work(&mgp
->watchdog_work
);
2706 mod_timer(&mgp
->watchdog_timer
,
2707 jiffies
+ myri10ge_watchdog_timeout
* HZ
);
2709 mgp
->watchdog_tx_done
= mgp
->tx
.done
;
2710 mgp
->watchdog_tx_req
= mgp
->tx
.req
;
2713 static int myri10ge_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2715 struct net_device
*netdev
;
2716 struct myri10ge_priv
*mgp
;
2717 struct device
*dev
= &pdev
->dev
;
2720 int status
= -ENXIO
;
2725 netdev
= alloc_etherdev(sizeof(*mgp
));
2726 if (netdev
== NULL
) {
2727 dev_err(dev
, "Could not allocate ethernet device\n");
2731 mgp
= netdev_priv(netdev
);
2732 memset(mgp
, 0, sizeof(*mgp
));
2735 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
2736 mgp
->pause
= myri10ge_flow_control
;
2737 mgp
->intr_coal_delay
= myri10ge_intr_coal_delay
;
2738 mgp
->msg_enable
= netif_msg_init(myri10ge_debug
, MYRI10GE_MSG_DEFAULT
);
2739 init_waitqueue_head(&mgp
->down_wq
);
2741 if (pci_enable_device(pdev
)) {
2742 dev_err(&pdev
->dev
, "pci_enable_device call failed\n");
2744 goto abort_with_netdev
;
2746 myri10ge_select_firmware(mgp
);
2748 /* Find the vendor-specific cap so we can check
2749 * the reboot register later on */
2750 mgp
->vendor_specific_offset
2751 = pci_find_capability(pdev
, PCI_CAP_ID_VNDR
);
2753 /* Set our max read request to 4KB */
2754 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2756 dev_err(&pdev
->dev
, "Bad PCI_CAP_ID_EXP location %d\n", cap
);
2757 goto abort_with_netdev
;
2759 status
= pci_read_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, &val
);
2761 dev_err(&pdev
->dev
, "Error %d reading PCI_EXP_DEVCTL\n",
2763 goto abort_with_netdev
;
2765 val
= (val
& ~PCI_EXP_DEVCTL_READRQ
) | (5 << 12);
2766 status
= pci_write_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, val
);
2768 dev_err(&pdev
->dev
, "Error %d writing PCI_EXP_DEVCTL\n",
2770 goto abort_with_netdev
;
2773 pci_set_master(pdev
);
2775 status
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
2779 "64-bit pci address mask was refused, trying 32-bit");
2780 status
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
2783 dev_err(&pdev
->dev
, "Error %d setting DMA mask\n", status
);
2784 goto abort_with_netdev
;
2786 mgp
->cmd
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2787 &mgp
->cmd_bus
, GFP_KERNEL
);
2788 if (mgp
->cmd
== NULL
)
2789 goto abort_with_netdev
;
2791 mgp
->fw_stats
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2792 &mgp
->fw_stats_bus
, GFP_KERNEL
);
2793 if (mgp
->fw_stats
== NULL
)
2794 goto abort_with_cmd
;
2796 mgp
->board_span
= pci_resource_len(pdev
, 0);
2797 mgp
->iomem_base
= pci_resource_start(pdev
, 0);
2800 mgp
->mtrr
= mtrr_add(mgp
->iomem_base
, mgp
->board_span
,
2801 MTRR_TYPE_WRCOMB
, 1);
2803 /* Hack. need to get rid of these magic numbers */
2805 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
2806 if (mgp
->sram_size
> mgp
->board_span
) {
2807 dev_err(&pdev
->dev
, "board span %ld bytes too small\n",
2811 mgp
->sram
= ioremap(mgp
->iomem_base
, mgp
->board_span
);
2812 if (mgp
->sram
== NULL
) {
2813 dev_err(&pdev
->dev
, "ioremap failed for %ld bytes at 0x%lx\n",
2814 mgp
->board_span
, mgp
->iomem_base
);
2818 memcpy_fromio(mgp
->eeprom_strings
,
2819 mgp
->sram
+ mgp
->sram_size
- MYRI10GE_EEPROM_STRINGS_SIZE
,
2820 MYRI10GE_EEPROM_STRINGS_SIZE
);
2821 memset(mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
- 2, 0, 2);
2822 status
= myri10ge_read_mac_addr(mgp
);
2824 goto abort_with_ioremap
;
2826 for (i
= 0; i
< ETH_ALEN
; i
++)
2827 netdev
->dev_addr
[i
] = mgp
->mac_addr
[i
];
2829 /* allocate rx done ring */
2830 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2831 mgp
->rx_done
.entry
= dma_alloc_coherent(&pdev
->dev
, bytes
,
2832 &mgp
->rx_done
.bus
, GFP_KERNEL
);
2833 if (mgp
->rx_done
.entry
== NULL
)
2834 goto abort_with_ioremap
;
2835 memset(mgp
->rx_done
.entry
, 0, bytes
);
2837 status
= myri10ge_load_firmware(mgp
);
2839 dev_err(&pdev
->dev
, "failed to load firmware\n");
2840 goto abort_with_rx_done
;
2843 status
= myri10ge_reset(mgp
);
2845 dev_err(&pdev
->dev
, "failed reset\n");
2846 goto abort_with_firmware
;
2850 status
= pci_enable_msi(pdev
);
2853 "Error %d setting up MSI; falling back to xPIC\n",
2856 mgp
->msi_enabled
= 1;
2859 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
2862 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
2863 goto abort_with_firmware
;
2866 pci_set_drvdata(pdev
, mgp
);
2867 if ((myri10ge_initial_mtu
+ ETH_HLEN
) > MYRI10GE_MAX_ETHER_MTU
)
2868 myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
2869 if ((myri10ge_initial_mtu
+ ETH_HLEN
) < 68)
2870 myri10ge_initial_mtu
= 68;
2871 netdev
->mtu
= myri10ge_initial_mtu
;
2872 netdev
->open
= myri10ge_open
;
2873 netdev
->stop
= myri10ge_close
;
2874 netdev
->hard_start_xmit
= myri10ge_xmit
;
2875 netdev
->get_stats
= myri10ge_get_stats
;
2876 netdev
->base_addr
= mgp
->iomem_base
;
2877 netdev
->irq
= pdev
->irq
;
2878 netdev
->change_mtu
= myri10ge_change_mtu
;
2879 netdev
->set_multicast_list
= myri10ge_set_multicast_list
;
2880 netdev
->set_mac_address
= myri10ge_set_mac_address
;
2881 netdev
->features
= NETIF_F_SG
| NETIF_F_HW_CSUM
| NETIF_F_TSO
;
2883 netdev
->features
|= NETIF_F_HIGHDMA
;
2884 netdev
->poll
= myri10ge_poll
;
2885 netdev
->weight
= myri10ge_napi_weight
;
2887 /* Save configuration space to be restored if the
2888 * nic resets due to a parity error */
2889 myri10ge_save_state(mgp
);
2891 /* Setup the watchdog timer */
2892 setup_timer(&mgp
->watchdog_timer
, myri10ge_watchdog_timer
,
2893 (unsigned long)mgp
);
2895 SET_ETHTOOL_OPS(netdev
, &myri10ge_ethtool_ops
);
2896 INIT_WORK(&mgp
->watchdog_work
, myri10ge_watchdog
);
2897 status
= register_netdev(netdev
);
2899 dev_err(&pdev
->dev
, "register_netdev failed: %d\n", status
);
2900 goto abort_with_irq
;
2902 dev_info(dev
, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
2903 (mgp
->msi_enabled
? "MSI" : "xPIC"),
2904 pdev
->irq
, mgp
->tx
.boundary
, mgp
->fw_name
,
2905 (mgp
->mtrr
>= 0 ? "Enabled" : "Disabled"));
2910 free_irq(pdev
->irq
, mgp
);
2911 if (mgp
->msi_enabled
)
2912 pci_disable_msi(pdev
);
2914 abort_with_firmware
:
2915 myri10ge_dummy_rdma(mgp
, 0);
2918 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2919 dma_free_coherent(&pdev
->dev
, bytes
,
2920 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
2928 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
2930 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2931 mgp
->fw_stats
, mgp
->fw_stats_bus
);
2934 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2935 mgp
->cmd
, mgp
->cmd_bus
);
2939 free_netdev(netdev
);
2946 * Does what is necessary to shutdown one Myrinet device. Called
2947 * once for each Myrinet card by the kernel when a module is
2950 static void myri10ge_remove(struct pci_dev
*pdev
)
2952 struct myri10ge_priv
*mgp
;
2953 struct net_device
*netdev
;
2956 mgp
= pci_get_drvdata(pdev
);
2960 flush_scheduled_work();
2962 unregister_netdev(netdev
);
2963 free_irq(pdev
->irq
, mgp
);
2964 if (mgp
->msi_enabled
)
2965 pci_disable_msi(pdev
);
2967 myri10ge_dummy_rdma(mgp
, 0);
2969 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2970 dma_free_coherent(&pdev
->dev
, bytes
,
2971 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
2977 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
2979 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2980 mgp
->fw_stats
, mgp
->fw_stats_bus
);
2982 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2983 mgp
->cmd
, mgp
->cmd_bus
);
2985 free_netdev(netdev
);
2986 pci_set_drvdata(pdev
, NULL
);
2989 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
2991 static struct pci_device_id myri10ge_pci_tbl
[] = {
2992 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM
, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E
)},
2996 static struct pci_driver myri10ge_driver
= {
2998 .probe
= myri10ge_probe
,
2999 .remove
= myri10ge_remove
,
3000 .id_table
= myri10ge_pci_tbl
,
3002 .suspend
= myri10ge_suspend
,
3003 .resume
= myri10ge_resume
,
3007 static __init
int myri10ge_init_module(void)
3009 printk(KERN_INFO
"%s: Version %s\n", myri10ge_driver
.name
,
3010 MYRI10GE_VERSION_STR
);
3011 return pci_register_driver(&myri10ge_driver
);
3014 module_init(myri10ge_init_module
);
3016 static __exit
void myri10ge_cleanup_module(void)
3018 pci_unregister_driver(&myri10ge_driver
);
3021 module_exit(myri10ge_cleanup_module
);