1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005, 2006 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
52 #include <linux/inet.h>
54 #include <linux/ethtool.h>
55 #include <linux/firmware.h>
56 #include <linux/delay.h>
57 #include <linux/version.h>
58 #include <linux/timer.h>
59 #include <linux/vmalloc.h>
60 #include <linux/crc32.h>
61 #include <linux/moduleparam.h>
63 #include <net/checksum.h>
64 #include <asm/byteorder.h>
66 #include <asm/processor.h>
71 #include "myri10ge_mcp.h"
72 #include "myri10ge_mcp_gen_header.h"
74 #define MYRI10GE_VERSION_STR "1.0.0"
76 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
77 MODULE_AUTHOR("Maintainer: help@myri.com");
78 MODULE_VERSION(MYRI10GE_VERSION_STR
);
79 MODULE_LICENSE("Dual BSD/GPL");
81 #define MYRI10GE_MAX_ETHER_MTU 9014
83 #define MYRI10GE_ETH_STOPPED 0
84 #define MYRI10GE_ETH_STOPPING 1
85 #define MYRI10GE_ETH_STARTING 2
86 #define MYRI10GE_ETH_RUNNING 3
87 #define MYRI10GE_ETH_OPEN_FAILED 4
89 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
90 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
92 #define MYRI10GE_NO_CONFIRM_DATA 0xffffffff
93 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
95 struct myri10ge_rx_buffer_state
{
97 DECLARE_PCI_UNMAP_ADDR(bus
)
98 DECLARE_PCI_UNMAP_LEN(len
)
101 struct myri10ge_tx_buffer_state
{
104 DECLARE_PCI_UNMAP_ADDR(bus
)
105 DECLARE_PCI_UNMAP_LEN(len
)
108 struct myri10ge_cmd
{
114 struct myri10ge_rx_buf
{
115 struct mcp_kreq_ether_recv __iomem
*lanai
; /* lanai ptr for recv ring */
116 u8 __iomem
*wc_fifo
; /* w/c rx dma addr fifo address */
117 struct mcp_kreq_ether_recv
*shadow
; /* host shadow of recv ring */
118 struct myri10ge_rx_buffer_state
*info
;
121 int mask
; /* number of rx slots -1 */
124 struct myri10ge_tx_buf
{
125 struct mcp_kreq_ether_send __iomem
*lanai
; /* lanai ptr for sendq */
126 u8 __iomem
*wc_fifo
; /* w/c send fifo address */
127 struct mcp_kreq_ether_send
*req_list
; /* host shadow of sendq */
129 struct myri10ge_tx_buffer_state
*info
;
130 int mask
; /* number of transmit slots -1 */
131 int boundary
; /* boundary transmits cannot cross */
132 int req ____cacheline_aligned
; /* transmit slots submitted */
133 int pkt_start
; /* packets started */
134 int done ____cacheline_aligned
; /* transmit slots completed */
135 int pkt_done
; /* packets completed */
138 struct myri10ge_rx_done
{
139 struct mcp_slot
*entry
;
145 struct myri10ge_priv
{
146 int running
; /* running? */
147 int csum_flag
; /* rx_csums? */
148 struct myri10ge_tx_buf tx
; /* transmit ring */
149 struct myri10ge_rx_buf rx_small
;
150 struct myri10ge_rx_buf rx_big
;
151 struct myri10ge_rx_done rx_done
;
153 struct net_device
*dev
;
154 struct net_device_stats stats
;
157 unsigned long board_span
;
158 unsigned long iomem_base
;
159 u32 __iomem
*irq_claim
;
160 u32 __iomem
*irq_deassert
;
161 char *mac_addr_string
;
162 struct mcp_cmd_response
*cmd
;
164 struct mcp_irq_data
*fw_stats
;
165 dma_addr_t fw_stats_bus
;
166 struct pci_dev
*pdev
;
168 unsigned int link_state
;
169 unsigned int rdma_tags_available
;
171 u32 __iomem
*intr_coal_delay_ptr
;
176 wait_queue_head_t down_wq
;
177 struct work_struct watchdog_work
;
178 struct timer_list watchdog_timer
;
179 int watchdog_tx_done
;
185 char eeprom_strings
[MYRI10GE_EEPROM_STRINGS_SIZE
];
186 char fw_version
[128];
187 u8 mac_addr
[6]; /* eeprom mac address */
188 unsigned long serial_number
;
189 int vendor_specific_offset
;
197 static char *myri10ge_fw_unaligned
= "myri10ge_ethp_z8e.dat";
198 static char *myri10ge_fw_aligned
= "myri10ge_eth_z8e.dat";
200 static char *myri10ge_fw_name
= NULL
;
201 module_param(myri10ge_fw_name
, charp
, S_IRUGO
| S_IWUSR
);
202 MODULE_PARM_DESC(myri10ge_fw_name
, "Firmware image name\n");
204 static int myri10ge_ecrc_enable
= 1;
205 module_param(myri10ge_ecrc_enable
, int, S_IRUGO
);
206 MODULE_PARM_DESC(myri10ge_ecrc_enable
, "Enable Extended CRC on PCI-E\n");
208 static int myri10ge_max_intr_slots
= 1024;
209 module_param(myri10ge_max_intr_slots
, int, S_IRUGO
);
210 MODULE_PARM_DESC(myri10ge_max_intr_slots
, "Interrupt queue slots\n");
212 static int myri10ge_small_bytes
= -1; /* -1 == auto */
213 module_param(myri10ge_small_bytes
, int, S_IRUGO
| S_IWUSR
);
214 MODULE_PARM_DESC(myri10ge_small_bytes
, "Threshold of small packets\n");
216 static int myri10ge_msi
= 1; /* enable msi by default */
217 module_param(myri10ge_msi
, int, S_IRUGO
);
218 MODULE_PARM_DESC(myri10ge_msi
, "Enable Message Signalled Interrupts\n");
220 static int myri10ge_intr_coal_delay
= 25;
221 module_param(myri10ge_intr_coal_delay
, int, S_IRUGO
);
222 MODULE_PARM_DESC(myri10ge_intr_coal_delay
, "Interrupt coalescing delay\n");
224 static int myri10ge_flow_control
= 1;
225 module_param(myri10ge_flow_control
, int, S_IRUGO
);
226 MODULE_PARM_DESC(myri10ge_flow_control
, "Pause parameter\n");
228 static int myri10ge_deassert_wait
= 1;
229 module_param(myri10ge_deassert_wait
, int, S_IRUGO
| S_IWUSR
);
230 MODULE_PARM_DESC(myri10ge_deassert_wait
,
231 "Wait when deasserting legacy interrupts\n");
233 static int myri10ge_force_firmware
= 0;
234 module_param(myri10ge_force_firmware
, int, S_IRUGO
);
235 MODULE_PARM_DESC(myri10ge_force_firmware
,
236 "Force firmware to assume aligned completions\n");
238 static int myri10ge_skb_cross_4k
= 0;
239 module_param(myri10ge_skb_cross_4k
, int, S_IRUGO
| S_IWUSR
);
240 MODULE_PARM_DESC(myri10ge_skb_cross_4k
,
241 "Can a small skb cross a 4KB boundary?\n");
243 static int myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
244 module_param(myri10ge_initial_mtu
, int, S_IRUGO
);
245 MODULE_PARM_DESC(myri10ge_initial_mtu
, "Initial MTU\n");
247 static int myri10ge_napi_weight
= 64;
248 module_param(myri10ge_napi_weight
, int, S_IRUGO
);
249 MODULE_PARM_DESC(myri10ge_napi_weight
, "Set NAPI weight\n");
251 static int myri10ge_watchdog_timeout
= 1;
252 module_param(myri10ge_watchdog_timeout
, int, S_IRUGO
);
253 MODULE_PARM_DESC(myri10ge_watchdog_timeout
, "Set watchdog timeout\n");
255 static int myri10ge_max_irq_loops
= 1048576;
256 module_param(myri10ge_max_irq_loops
, int, S_IRUGO
);
257 MODULE_PARM_DESC(myri10ge_max_irq_loops
,
258 "Set stuck legacy IRQ detection threshold\n");
260 #define MYRI10GE_FW_OFFSET 1024*1024
261 #define MYRI10GE_HIGHPART_TO_U32(X) \
262 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
263 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
265 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
268 myri10ge_send_cmd(struct myri10ge_priv
*mgp
, u32 cmd
,
269 struct myri10ge_cmd
*data
, int atomic
)
272 char buf_bytes
[sizeof(*buf
) + 8];
273 struct mcp_cmd_response
*response
= mgp
->cmd
;
274 char __iomem
*cmd_addr
= mgp
->sram
+ MXGEFW_CMD_OFFSET
;
275 u32 dma_low
, dma_high
, result
, value
;
278 /* ensure buf is aligned to 8 bytes */
279 buf
= (struct mcp_cmd
*)ALIGN((unsigned long)buf_bytes
, 8);
281 buf
->data0
= htonl(data
->data0
);
282 buf
->data1
= htonl(data
->data1
);
283 buf
->data2
= htonl(data
->data2
);
284 buf
->cmd
= htonl(cmd
);
285 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
286 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
288 buf
->response_addr
.low
= htonl(dma_low
);
289 buf
->response_addr
.high
= htonl(dma_high
);
290 response
->result
= MYRI10GE_NO_RESPONSE_RESULT
;
292 myri10ge_pio_copy(cmd_addr
, buf
, sizeof(*buf
));
294 /* wait up to 15ms. Longest command is the DMA benchmark,
295 * which is capped at 5ms, but runs from a timeout handler
296 * that runs every 7.8ms. So a 15ms timeout leaves us with
300 /* if atomic is set, do not sleep,
301 * and try to get the completion quickly
302 * (1ms will be enough for those commands) */
303 for (sleep_total
= 0;
305 && response
->result
== MYRI10GE_NO_RESPONSE_RESULT
;
309 /* use msleep for most command */
310 for (sleep_total
= 0;
312 && response
->result
== MYRI10GE_NO_RESPONSE_RESULT
;
317 result
= ntohl(response
->result
);
318 value
= ntohl(response
->data
);
319 if (result
!= MYRI10GE_NO_RESPONSE_RESULT
) {
324 dev_err(&mgp
->pdev
->dev
,
325 "command %d failed, result = %d\n",
331 dev_err(&mgp
->pdev
->dev
, "command %d timed out, result = %d\n",
337 * The eeprom strings on the lanaiX have the format
340 * PT:ddd mmm xx xx:xx:xx xx\0
341 * PV:ddd mmm xx xx:xx:xx xx\0
343 static int myri10ge_read_mac_addr(struct myri10ge_priv
*mgp
)
348 ptr
= mgp
->eeprom_strings
;
349 limit
= mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
;
351 while (*ptr
!= '\0' && ptr
< limit
) {
352 if (memcmp(ptr
, "MAC=", 4) == 0) {
354 mgp
->mac_addr_string
= ptr
;
355 for (i
= 0; i
< 6; i
++) {
356 if ((ptr
+ 2) > limit
)
359 simple_strtoul(ptr
, &ptr
, 16);
363 if (memcmp((const void *)ptr
, "SN=", 3) == 0) {
365 mgp
->serial_number
= simple_strtoul(ptr
, &ptr
, 10);
367 while (ptr
< limit
&& *ptr
++) ;
373 dev_err(&mgp
->pdev
->dev
, "failed to parse eeprom_strings\n");
378 * Enable or disable periodic RDMAs from the host to make certain
379 * chipsets resend dropped PCIe messages
382 static void myri10ge_dummy_rdma(struct myri10ge_priv
*mgp
, int enable
)
384 char __iomem
*submit
;
386 u32 dma_low
, dma_high
;
389 /* clear confirmation addr */
393 /* send a rdma command to the PCIe engine, and wait for the
394 * response in the confirmation address. The firmware should
395 * write a -1 there to indicate it is alive and well
397 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
398 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
400 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
401 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
402 buf
[2] = htonl(MYRI10GE_NO_CONFIRM_DATA
); /* confirm data */
403 buf
[3] = htonl(dma_high
); /* dummy addr MSW */
404 buf
[4] = htonl(dma_low
); /* dummy addr LSW */
405 buf
[5] = htonl(enable
); /* enable? */
407 submit
= mgp
->sram
+ 0xfc01c0;
409 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
410 for (i
= 0; mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20; i
++)
412 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
)
413 dev_err(&mgp
->pdev
->dev
, "dummy rdma %s failed\n",
414 (enable
? "enable" : "disable"));
418 myri10ge_validate_firmware(struct myri10ge_priv
*mgp
,
419 struct mcp_gen_header
*hdr
)
421 struct device
*dev
= &mgp
->pdev
->dev
;
424 /* check firmware type */
425 if (ntohl(hdr
->mcp_type
) != MCP_TYPE_ETH
) {
426 dev_err(dev
, "Bad firmware type: 0x%x\n", ntohl(hdr
->mcp_type
));
430 /* save firmware version for ethtool */
431 strncpy(mgp
->fw_version
, hdr
->version
, sizeof(mgp
->fw_version
));
433 sscanf(mgp
->fw_version
, "%d.%d", &major
, &minor
);
435 if (!(major
== MXGEFW_VERSION_MAJOR
&& minor
== MXGEFW_VERSION_MINOR
)) {
436 dev_err(dev
, "Found firmware version %s\n", mgp
->fw_version
);
437 dev_err(dev
, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR
,
438 MXGEFW_VERSION_MINOR
);
444 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv
*mgp
, u32
* size
)
446 unsigned crc
, reread_crc
;
447 const struct firmware
*fw
;
448 struct device
*dev
= &mgp
->pdev
->dev
;
449 struct mcp_gen_header
*hdr
;
454 if ((status
= request_firmware(&fw
, mgp
->fw_name
, dev
)) < 0) {
455 dev_err(dev
, "Unable to load %s firmware image via hotplug\n",
458 goto abort_with_nothing
;
463 if (fw
->size
>= mgp
->sram_size
- MYRI10GE_FW_OFFSET
||
464 fw
->size
< MCP_HEADER_PTR_OFFSET
+ 4) {
465 dev_err(dev
, "Firmware size invalid:%d\n", (int)fw
->size
);
471 hdr_offset
= ntohl(*(u32
*) (fw
->data
+ MCP_HEADER_PTR_OFFSET
));
472 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > fw
->size
) {
473 dev_err(dev
, "Bad firmware file\n");
477 hdr
= (void *)(fw
->data
+ hdr_offset
);
479 status
= myri10ge_validate_firmware(mgp
, hdr
);
483 crc
= crc32(~0, fw
->data
, fw
->size
);
484 for (i
= 0; i
< fw
->size
; i
+= 256) {
485 myri10ge_pio_copy(mgp
->sram
+ MYRI10GE_FW_OFFSET
+ i
,
487 min(256U, (unsigned)(fw
->size
- i
)));
491 /* corruption checking is good for parity recovery and buggy chipset */
492 memcpy_fromio(fw
->data
, mgp
->sram
+ MYRI10GE_FW_OFFSET
, fw
->size
);
493 reread_crc
= crc32(~0, fw
->data
, fw
->size
);
494 if (crc
!= reread_crc
) {
495 dev_err(dev
, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
496 (unsigned)fw
->size
, reread_crc
, crc
);
500 *size
= (u32
) fw
->size
;
503 release_firmware(fw
);
509 static int myri10ge_adopt_running_firmware(struct myri10ge_priv
*mgp
)
511 struct mcp_gen_header
*hdr
;
512 struct device
*dev
= &mgp
->pdev
->dev
;
513 const size_t bytes
= sizeof(struct mcp_gen_header
);
517 /* find running firmware header */
518 hdr_offset
= ntohl(__raw_readl(mgp
->sram
+ MCP_HEADER_PTR_OFFSET
));
520 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > mgp
->sram_size
) {
521 dev_err(dev
, "Running firmware has bad header offset (%d)\n",
526 /* copy header of running firmware from SRAM to host memory to
527 * validate firmware */
528 hdr
= kmalloc(bytes
, GFP_KERNEL
);
530 dev_err(dev
, "could not malloc firmware hdr\n");
533 memcpy_fromio(hdr
, mgp
->sram
+ hdr_offset
, bytes
);
534 status
= myri10ge_validate_firmware(mgp
, hdr
);
539 static int myri10ge_load_firmware(struct myri10ge_priv
*mgp
)
541 char __iomem
*submit
;
543 u32 dma_low
, dma_high
, size
;
547 status
= myri10ge_load_hotplug_firmware(mgp
, &size
);
549 dev_warn(&mgp
->pdev
->dev
, "hotplug firmware loading failed\n");
551 /* Do not attempt to adopt firmware if there
556 status
= myri10ge_adopt_running_firmware(mgp
);
558 dev_err(&mgp
->pdev
->dev
,
559 "failed to adopt running firmware\n");
562 dev_info(&mgp
->pdev
->dev
,
563 "Successfully adopted running firmware\n");
564 if (mgp
->tx
.boundary
== 4096) {
565 dev_warn(&mgp
->pdev
->dev
,
566 "Using firmware currently running on NIC"
568 dev_warn(&mgp
->pdev
->dev
,
569 "performance consider loading optimized "
571 dev_warn(&mgp
->pdev
->dev
, "via hotplug\n");
574 mgp
->fw_name
= "adopted";
575 mgp
->tx
.boundary
= 2048;
579 /* clear confirmation addr */
583 /* send a reload command to the bootstrap MCP, and wait for the
584 * response in the confirmation address. The firmware should
585 * write a -1 there to indicate it is alive and well
587 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
588 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
590 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
591 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
592 buf
[2] = htonl(MYRI10GE_NO_CONFIRM_DATA
); /* confirm data */
594 /* FIX: All newest firmware should un-protect the bottom of
595 * the sram before handoff. However, the very first interfaces
596 * do not. Therefore the handoff copy must skip the first 8 bytes
598 buf
[3] = htonl(MYRI10GE_FW_OFFSET
+ 8); /* where the code starts */
599 buf
[4] = htonl(size
- 8); /* length of code */
600 buf
[5] = htonl(8); /* where to copy to */
601 buf
[6] = htonl(0); /* where to jump to */
603 submit
= mgp
->sram
+ 0xfc0000;
605 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
610 while (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20) {
614 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
) {
615 dev_err(&mgp
->pdev
->dev
, "handoff failed\n");
618 dev_info(&mgp
->pdev
->dev
, "handoff confirmed\n");
619 myri10ge_dummy_rdma(mgp
, 1);
624 static int myri10ge_update_mac_address(struct myri10ge_priv
*mgp
, u8
* addr
)
626 struct myri10ge_cmd cmd
;
629 cmd
.data0
= ((addr
[0] << 24) | (addr
[1] << 16)
630 | (addr
[2] << 8) | addr
[3]);
632 cmd
.data1
= ((addr
[4] << 8) | (addr
[5]));
634 status
= myri10ge_send_cmd(mgp
, MXGEFW_SET_MAC_ADDRESS
, &cmd
, 0);
638 static int myri10ge_change_pause(struct myri10ge_priv
*mgp
, int pause
)
640 struct myri10ge_cmd cmd
;
643 ctl
= pause
? MXGEFW_ENABLE_FLOW_CONTROL
: MXGEFW_DISABLE_FLOW_CONTROL
;
644 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, 0);
648 "myri10ge: %s: Failed to set flow control mode\n",
657 myri10ge_change_promisc(struct myri10ge_priv
*mgp
, int promisc
, int atomic
)
659 struct myri10ge_cmd cmd
;
662 ctl
= promisc
? MXGEFW_ENABLE_PROMISC
: MXGEFW_DISABLE_PROMISC
;
663 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, atomic
);
665 printk(KERN_ERR
"myri10ge: %s: Failed to set promisc mode\n",
669 static int myri10ge_reset(struct myri10ge_priv
*mgp
)
671 struct myri10ge_cmd cmd
;
676 /* try to send a reset command to the card to see if it
678 memset(&cmd
, 0, sizeof(cmd
));
679 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_RESET
, &cmd
, 0);
681 dev_err(&mgp
->pdev
->dev
, "failed reset\n");
685 /* Now exchange information about interrupts */
687 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
688 memset(mgp
->rx_done
.entry
, 0, bytes
);
689 cmd
.data0
= (u32
) bytes
;
690 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_SIZE
, &cmd
, 0);
691 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
692 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
693 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_DMA
, &cmd
, 0);
696 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_ACK_OFFSET
, &cmd
, 0);
697 mgp
->irq_claim
= (__iomem u32
*) (mgp
->sram
+ cmd
.data0
);
698 if (!mgp
->msi_enabled
) {
699 status
|= myri10ge_send_cmd
700 (mgp
, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET
, &cmd
, 0);
701 mgp
->irq_deassert
= (__iomem u32
*) (mgp
->sram
+ cmd
.data0
);
704 status
|= myri10ge_send_cmd
705 (mgp
, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET
, &cmd
, 0);
706 mgp
->intr_coal_delay_ptr
= (__iomem u32
*) (mgp
->sram
+ cmd
.data0
);
708 dev_err(&mgp
->pdev
->dev
, "failed set interrupt parameters\n");
711 __raw_writel(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
713 /* Run a small DMA test.
714 * The magic multipliers to the length tell the firmware
715 * to do DMA read, write, or read+write tests. The
716 * results are returned in cmd.data0. The upper 16
717 * bits or the return is the number of transfers completed.
718 * The lower 16 bits is the time in 0.5us ticks that the
719 * transfers took to complete.
722 len
= mgp
->tx
.boundary
;
724 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
725 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
726 cmd
.data2
= len
* 0x10000;
727 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
729 mgp
->read_dma
= ((cmd
.data0
>> 16) * len
* 2) /
730 (cmd
.data0
& 0xffff);
732 dev_warn(&mgp
->pdev
->dev
, "DMA read benchmark failed: %d\n",
734 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
735 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
736 cmd
.data2
= len
* 0x1;
737 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
739 mgp
->write_dma
= ((cmd
.data0
>> 16) * len
* 2) /
740 (cmd
.data0
& 0xffff);
742 dev_warn(&mgp
->pdev
->dev
, "DMA write benchmark failed: %d\n",
745 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
746 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
747 cmd
.data2
= len
* 0x10001;
748 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
750 mgp
->read_write_dma
= ((cmd
.data0
>> 16) * len
* 2 * 2) /
751 (cmd
.data0
& 0xffff);
753 dev_warn(&mgp
->pdev
->dev
,
754 "DMA read/write benchmark failed: %d\n", status
);
756 memset(mgp
->rx_done
.entry
, 0, bytes
);
758 /* reset mcp/driver shared state back to 0 */
761 mgp
->tx
.pkt_start
= 0;
762 mgp
->tx
.pkt_done
= 0;
764 mgp
->rx_small
.cnt
= 0;
765 mgp
->rx_done
.idx
= 0;
766 mgp
->rx_done
.cnt
= 0;
767 status
= myri10ge_update_mac_address(mgp
, mgp
->dev
->dev_addr
);
768 myri10ge_change_promisc(mgp
, 0, 0);
769 myri10ge_change_pause(mgp
, mgp
->pause
);
774 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem
* dst
,
775 struct mcp_kreq_ether_recv
*src
)
780 src
->addr_low
= DMA_32BIT_MASK
;
781 myri10ge_pio_copy(dst
, src
, 8 * sizeof(*src
));
784 __raw_writel(low
, &dst
->addr_low
);
789 * Set of routines to get a new receive buffer. Any buffer which
790 * crosses a 4KB boundary must start on a 4KB boundary due to PCIe
791 * wdma restrictions. We also try to align any smaller allocation to
792 * at least a 16 byte boundary for efficiency. We assume the linux
793 * memory allocator works by powers of 2, and will not return memory
794 * smaller than 2KB which crosses a 4KB boundary. If it does, we fall
795 * back to allocating 2x as much space as required.
797 * We intend to replace large (>4KB) skb allocations by using
798 * pages directly and building a fraglist in the near future.
801 static inline struct sk_buff
*myri10ge_alloc_big(int bytes
)
804 unsigned long data
, roundup
;
806 skb
= dev_alloc_skb(bytes
+ 4096 + MXGEFW_PAD
);
810 /* Correct skb->truesize so that socket buffer
811 * accounting is not confused the rounding we must
812 * do to satisfy alignment constraints.
814 skb
->truesize
-= 4096;
816 data
= (unsigned long)(skb
->data
);
817 roundup
= (-data
) & (4095);
818 skb_reserve(skb
, roundup
);
822 /* Allocate 2x as much space as required and use whichever portion
823 * does not cross a 4KB boundary */
824 static inline struct sk_buff
*myri10ge_alloc_small_safe(unsigned int bytes
)
827 unsigned long data
, boundary
;
829 skb
= dev_alloc_skb(2 * (bytes
+ MXGEFW_PAD
) - 1);
830 if (unlikely(skb
== NULL
))
833 /* Correct skb->truesize so that socket buffer
834 * accounting is not confused the rounding we must
835 * do to satisfy alignment constraints.
837 skb
->truesize
-= bytes
+ MXGEFW_PAD
;
839 data
= (unsigned long)(skb
->data
);
840 boundary
= (data
+ 4095UL) & ~4095UL;
841 if ((boundary
- data
) >= (bytes
+ MXGEFW_PAD
))
844 skb_reserve(skb
, boundary
- data
);
848 /* Allocate just enough space, and verify that the allocated
849 * space does not cross a 4KB boundary */
850 static inline struct sk_buff
*myri10ge_alloc_small(int bytes
)
853 unsigned long roundup
, data
, end
;
855 skb
= dev_alloc_skb(bytes
+ 16 + MXGEFW_PAD
);
856 if (unlikely(skb
== NULL
))
859 /* Round allocated buffer to 16 byte boundary */
860 data
= (unsigned long)(skb
->data
);
861 roundup
= (-data
) & 15UL;
862 skb_reserve(skb
, roundup
);
863 /* Verify that the data buffer does not cross a page boundary */
864 data
= (unsigned long)(skb
->data
);
865 end
= data
+ bytes
+ MXGEFW_PAD
- 1;
866 if (unlikely(((end
>> 12) != (data
>> 12)) && (data
& 4095UL))) {
868 "myri10ge_alloc_small: small skb crossed 4KB boundary\n");
869 myri10ge_skb_cross_4k
= 1;
870 dev_kfree_skb_any(skb
);
871 skb
= myri10ge_alloc_small_safe(bytes
);
877 myri10ge_getbuf(struct myri10ge_rx_buf
*rx
, struct pci_dev
*pdev
, int bytes
,
884 bytes
+= VLAN_HLEN
; /* account for 802.1q vlan tag */
886 if ((bytes
+ MXGEFW_PAD
) > (4096 - 16) /* linux overhead */ )
887 skb
= myri10ge_alloc_big(bytes
);
888 else if (myri10ge_skb_cross_4k
)
889 skb
= myri10ge_alloc_small_safe(bytes
);
891 skb
= myri10ge_alloc_small(bytes
);
893 if (unlikely(skb
== NULL
)) {
899 /* set len so that it only covers the area we
900 * need mapped for DMA */
901 len
= bytes
+ MXGEFW_PAD
;
903 bus
= pci_map_single(pdev
, skb
->data
, len
, PCI_DMA_FROMDEVICE
);
904 rx
->info
[idx
].skb
= skb
;
905 pci_unmap_addr_set(&rx
->info
[idx
], bus
, bus
);
906 pci_unmap_len_set(&rx
->info
[idx
], len
, len
);
907 rx
->shadow
[idx
].addr_low
= htonl(MYRI10GE_LOWPART_TO_U32(bus
));
908 rx
->shadow
[idx
].addr_high
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
911 /* copy 8 descriptors (64-bytes) to the mcp at a time */
912 if ((idx
& 7) == 7) {
913 if (rx
->wc_fifo
== NULL
)
914 myri10ge_submit_8rx(&rx
->lanai
[idx
- 7],
915 &rx
->shadow
[idx
- 7]);
918 myri10ge_pio_copy(rx
->wc_fifo
,
919 &rx
->shadow
[idx
- 7], 64);
925 static inline void myri10ge_vlan_ip_csum(struct sk_buff
*skb
, u16 hw_csum
)
927 struct vlan_hdr
*vh
= (struct vlan_hdr
*)(skb
->data
);
929 if ((skb
->protocol
== ntohs(ETH_P_8021Q
)) &&
930 (vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IP
) ||
931 vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IPV6
))) {
933 skb
->ip_summed
= CHECKSUM_HW
;
937 static inline unsigned long
938 myri10ge_rx_done(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
939 int bytes
, int len
, int csum
)
945 idx
= rx
->cnt
& rx
->mask
;
948 /* save a pointer to the received skb */
949 skb
= rx
->info
[idx
].skb
;
950 bus
= pci_unmap_addr(&rx
->info
[idx
], bus
);
951 unmap_len
= pci_unmap_len(&rx
->info
[idx
], len
);
953 /* try to replace the received skb */
954 if (myri10ge_getbuf(rx
, mgp
->pdev
, bytes
, idx
)) {
955 /* drop the frame -- the old skbuf is re-cycled */
956 mgp
->stats
.rx_dropped
+= 1;
960 /* unmap the recvd skb */
961 pci_unmap_single(mgp
->pdev
, bus
, unmap_len
, PCI_DMA_FROMDEVICE
);
963 /* mcp implicitly skips 1st bytes so that packet is properly
965 skb_reserve(skb
, MXGEFW_PAD
);
967 /* set the length of the frame */
970 skb
->protocol
= eth_type_trans(skb
, mgp
->dev
);
972 if (mgp
->csum_flag
) {
973 if ((skb
->protocol
== ntohs(ETH_P_IP
)) ||
974 (skb
->protocol
== ntohs(ETH_P_IPV6
))) {
975 skb
->csum
= ntohs((u16
) csum
);
976 skb
->ip_summed
= CHECKSUM_HW
;
978 myri10ge_vlan_ip_csum(skb
, ntohs((u16
) csum
));
981 netif_receive_skb(skb
);
982 mgp
->dev
->last_rx
= jiffies
;
986 static inline void myri10ge_tx_done(struct myri10ge_priv
*mgp
, int mcp_index
)
988 struct pci_dev
*pdev
= mgp
->pdev
;
989 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
994 while (tx
->pkt_done
!= mcp_index
) {
995 idx
= tx
->done
& tx
->mask
;
996 skb
= tx
->info
[idx
].skb
;
999 tx
->info
[idx
].skb
= NULL
;
1000 if (tx
->info
[idx
].last
) {
1002 tx
->info
[idx
].last
= 0;
1005 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1006 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1008 mgp
->stats
.tx_bytes
+= skb
->len
;
1009 mgp
->stats
.tx_packets
++;
1010 dev_kfree_skb_irq(skb
);
1012 pci_unmap_single(pdev
,
1013 pci_unmap_addr(&tx
->info
[idx
],
1018 pci_unmap_page(pdev
,
1019 pci_unmap_addr(&tx
->info
[idx
],
1024 /* limit potential for livelock by only handling
1025 * 2 full tx rings per call */
1026 if (unlikely(++limit
> 2 * tx
->mask
))
1029 /* start the queue if we've stopped it */
1030 if (netif_queue_stopped(mgp
->dev
)
1031 && tx
->req
- tx
->done
< (tx
->mask
>> 1)) {
1033 netif_wake_queue(mgp
->dev
);
1037 static inline void myri10ge_clean_rx_done(struct myri10ge_priv
*mgp
, int *limit
)
1039 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1040 unsigned long rx_bytes
= 0;
1041 unsigned long rx_packets
= 0;
1042 unsigned long rx_ok
;
1044 int idx
= rx_done
->idx
;
1045 int cnt
= rx_done
->cnt
;
1049 while (rx_done
->entry
[idx
].length
!= 0 && *limit
!= 0) {
1050 length
= ntohs(rx_done
->entry
[idx
].length
);
1051 rx_done
->entry
[idx
].length
= 0;
1052 checksum
= ntohs(rx_done
->entry
[idx
].checksum
);
1053 if (length
<= mgp
->small_bytes
)
1054 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_small
,
1058 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_big
,
1059 mgp
->dev
->mtu
+ ETH_HLEN
,
1061 rx_packets
+= rx_ok
;
1062 rx_bytes
+= rx_ok
* (unsigned long)length
;
1064 idx
= cnt
& (myri10ge_max_intr_slots
- 1);
1066 /* limit potential for livelock by only handling a
1067 * limited number of frames. */
1072 mgp
->stats
.rx_packets
+= rx_packets
;
1073 mgp
->stats
.rx_bytes
+= rx_bytes
;
1076 static inline void myri10ge_check_statblock(struct myri10ge_priv
*mgp
)
1078 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1080 if (unlikely(stats
->stats_updated
)) {
1081 if (mgp
->link_state
!= stats
->link_up
) {
1082 mgp
->link_state
= stats
->link_up
;
1083 if (mgp
->link_state
) {
1084 printk(KERN_INFO
"myri10ge: %s: link up\n",
1086 netif_carrier_on(mgp
->dev
);
1088 printk(KERN_INFO
"myri10ge: %s: link down\n",
1090 netif_carrier_off(mgp
->dev
);
1093 if (mgp
->rdma_tags_available
!=
1094 ntohl(mgp
->fw_stats
->rdma_tags_available
)) {
1095 mgp
->rdma_tags_available
=
1096 ntohl(mgp
->fw_stats
->rdma_tags_available
);
1097 printk(KERN_WARNING
"myri10ge: %s: RDMA timed out! "
1098 "%d tags left\n", mgp
->dev
->name
,
1099 mgp
->rdma_tags_available
);
1101 mgp
->down_cnt
+= stats
->link_down
;
1102 if (stats
->link_down
)
1103 wake_up(&mgp
->down_wq
);
1107 static int myri10ge_poll(struct net_device
*netdev
, int *budget
)
1109 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1110 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1111 int limit
, orig_limit
, work_done
;
1113 /* process as many rx events as NAPI will allow */
1114 limit
= min(*budget
, netdev
->quota
);
1116 myri10ge_clean_rx_done(mgp
, &limit
);
1117 work_done
= orig_limit
- limit
;
1118 *budget
-= work_done
;
1119 netdev
->quota
-= work_done
;
1121 if (rx_done
->entry
[rx_done
->idx
].length
== 0 || !netif_running(netdev
)) {
1122 netif_rx_complete(netdev
);
1123 __raw_writel(htonl(3), mgp
->irq_claim
);
1129 static irqreturn_t
myri10ge_intr(int irq
, void *arg
, struct pt_regs
*regs
)
1131 struct myri10ge_priv
*mgp
= arg
;
1132 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1133 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1134 u32 send_done_count
;
1137 /* make sure it is our IRQ, and that the DMA has finished */
1138 if (unlikely(!stats
->valid
))
1141 /* low bit indicates receives are present, so schedule
1142 * napi poll handler */
1143 if (stats
->valid
& 1)
1144 netif_rx_schedule(mgp
->dev
);
1146 if (!mgp
->msi_enabled
) {
1147 __raw_writel(0, mgp
->irq_deassert
);
1148 if (!myri10ge_deassert_wait
)
1154 /* Wait for IRQ line to go low, if using INTx */
1158 /* check for transmit completes and receives */
1159 send_done_count
= ntohl(stats
->send_done_count
);
1160 if (send_done_count
!= tx
->pkt_done
)
1161 myri10ge_tx_done(mgp
, (int)send_done_count
);
1162 if (unlikely(i
> myri10ge_max_irq_loops
)) {
1163 printk(KERN_WARNING
"myri10ge: %s: irq stuck?\n",
1166 schedule_work(&mgp
->watchdog_work
);
1168 if (likely(stats
->valid
== 0))
1174 myri10ge_check_statblock(mgp
);
1176 __raw_writel(htonl(3), mgp
->irq_claim
+ 1);
1177 return (IRQ_HANDLED
);
1181 myri10ge_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
1183 cmd
->autoneg
= AUTONEG_DISABLE
;
1184 cmd
->speed
= SPEED_10000
;
1185 cmd
->duplex
= DUPLEX_FULL
;
1190 myri10ge_get_drvinfo(struct net_device
*netdev
, struct ethtool_drvinfo
*info
)
1192 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1194 strlcpy(info
->driver
, "myri10ge", sizeof(info
->driver
));
1195 strlcpy(info
->version
, MYRI10GE_VERSION_STR
, sizeof(info
->version
));
1196 strlcpy(info
->fw_version
, mgp
->fw_version
, sizeof(info
->fw_version
));
1197 strlcpy(info
->bus_info
, pci_name(mgp
->pdev
), sizeof(info
->bus_info
));
1201 myri10ge_get_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1203 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1204 coal
->rx_coalesce_usecs
= mgp
->intr_coal_delay
;
1209 myri10ge_set_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1211 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1213 mgp
->intr_coal_delay
= coal
->rx_coalesce_usecs
;
1214 __raw_writel(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
1219 myri10ge_get_pauseparam(struct net_device
*netdev
,
1220 struct ethtool_pauseparam
*pause
)
1222 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1225 pause
->rx_pause
= mgp
->pause
;
1226 pause
->tx_pause
= mgp
->pause
;
1230 myri10ge_set_pauseparam(struct net_device
*netdev
,
1231 struct ethtool_pauseparam
*pause
)
1233 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1235 if (pause
->tx_pause
!= mgp
->pause
)
1236 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1237 if (pause
->rx_pause
!= mgp
->pause
)
1238 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1239 if (pause
->autoneg
!= 0)
1245 myri10ge_get_ringparam(struct net_device
*netdev
,
1246 struct ethtool_ringparam
*ring
)
1248 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1250 ring
->rx_mini_max_pending
= mgp
->rx_small
.mask
+ 1;
1251 ring
->rx_max_pending
= mgp
->rx_big
.mask
+ 1;
1252 ring
->rx_jumbo_max_pending
= 0;
1253 ring
->tx_max_pending
= mgp
->rx_small
.mask
+ 1;
1254 ring
->rx_mini_pending
= ring
->rx_mini_max_pending
;
1255 ring
->rx_pending
= ring
->rx_max_pending
;
1256 ring
->rx_jumbo_pending
= ring
->rx_jumbo_max_pending
;
1257 ring
->tx_pending
= ring
->tx_max_pending
;
1260 static u32
myri10ge_get_rx_csum(struct net_device
*netdev
)
1262 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1269 static int myri10ge_set_rx_csum(struct net_device
*netdev
, u32 csum_enabled
)
1271 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1273 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
1279 static const char myri10ge_gstrings_stats
[][ETH_GSTRING_LEN
] = {
1280 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1281 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1282 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1283 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1284 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1285 "tx_heartbeat_errors", "tx_window_errors",
1286 /* device-specific stats */
1287 "tx_boundary", "WC", "irq", "MSI",
1288 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1289 "serial_number", "tx_pkt_start", "tx_pkt_done",
1290 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1291 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1292 "link_up", "dropped_link_overflow", "dropped_link_error_or_filtered",
1293 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1294 "dropped_no_big_buffer"
1297 #define MYRI10GE_NET_STATS_LEN 21
1298 #define MYRI10GE_STATS_LEN sizeof(myri10ge_gstrings_stats) / ETH_GSTRING_LEN
1301 myri10ge_get_strings(struct net_device
*netdev
, u32 stringset
, u8
* data
)
1303 switch (stringset
) {
1305 memcpy(data
, *myri10ge_gstrings_stats
,
1306 sizeof(myri10ge_gstrings_stats
));
1311 static int myri10ge_get_stats_count(struct net_device
*netdev
)
1313 return MYRI10GE_STATS_LEN
;
1317 myri10ge_get_ethtool_stats(struct net_device
*netdev
,
1318 struct ethtool_stats
*stats
, u64
* data
)
1320 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1323 for (i
= 0; i
< MYRI10GE_NET_STATS_LEN
; i
++)
1324 data
[i
] = ((unsigned long *)&mgp
->stats
)[i
];
1326 data
[i
++] = (unsigned int)mgp
->tx
.boundary
;
1327 data
[i
++] = (unsigned int)(mgp
->mtrr
>= 0);
1328 data
[i
++] = (unsigned int)mgp
->pdev
->irq
;
1329 data
[i
++] = (unsigned int)mgp
->msi_enabled
;
1330 data
[i
++] = (unsigned int)mgp
->read_dma
;
1331 data
[i
++] = (unsigned int)mgp
->write_dma
;
1332 data
[i
++] = (unsigned int)mgp
->read_write_dma
;
1333 data
[i
++] = (unsigned int)mgp
->serial_number
;
1334 data
[i
++] = (unsigned int)mgp
->tx
.pkt_start
;
1335 data
[i
++] = (unsigned int)mgp
->tx
.pkt_done
;
1336 data
[i
++] = (unsigned int)mgp
->tx
.req
;
1337 data
[i
++] = (unsigned int)mgp
->tx
.done
;
1338 data
[i
++] = (unsigned int)mgp
->rx_small
.cnt
;
1339 data
[i
++] = (unsigned int)mgp
->rx_big
.cnt
;
1340 data
[i
++] = (unsigned int)mgp
->wake_queue
;
1341 data
[i
++] = (unsigned int)mgp
->stop_queue
;
1342 data
[i
++] = (unsigned int)mgp
->watchdog_resets
;
1343 data
[i
++] = (unsigned int)mgp
->tx_linearized
;
1344 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->link_up
);
1345 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_overflow
);
1347 (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_error_or_filtered
);
1348 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_runt
);
1349 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_overrun
);
1350 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_small_buffer
);
1351 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_big_buffer
);
1354 static struct ethtool_ops myri10ge_ethtool_ops
= {
1355 .get_settings
= myri10ge_get_settings
,
1356 .get_drvinfo
= myri10ge_get_drvinfo
,
1357 .get_coalesce
= myri10ge_get_coalesce
,
1358 .set_coalesce
= myri10ge_set_coalesce
,
1359 .get_pauseparam
= myri10ge_get_pauseparam
,
1360 .set_pauseparam
= myri10ge_set_pauseparam
,
1361 .get_ringparam
= myri10ge_get_ringparam
,
1362 .get_rx_csum
= myri10ge_get_rx_csum
,
1363 .set_rx_csum
= myri10ge_set_rx_csum
,
1364 .get_tx_csum
= ethtool_op_get_tx_csum
,
1365 .set_tx_csum
= ethtool_op_set_tx_hw_csum
,
1366 .get_sg
= ethtool_op_get_sg
,
1367 .set_sg
= ethtool_op_set_sg
,
1369 .get_tso
= ethtool_op_get_tso
,
1370 .set_tso
= ethtool_op_set_tso
,
1372 .get_strings
= myri10ge_get_strings
,
1373 .get_stats_count
= myri10ge_get_stats_count
,
1374 .get_ethtool_stats
= myri10ge_get_ethtool_stats
1377 static int myri10ge_allocate_rings(struct net_device
*dev
)
1379 struct myri10ge_priv
*mgp
;
1380 struct myri10ge_cmd cmd
;
1381 int tx_ring_size
, rx_ring_size
;
1382 int tx_ring_entries
, rx_ring_entries
;
1386 mgp
= netdev_priv(dev
);
1388 /* get ring sizes */
1390 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_RING_SIZE
, &cmd
, 0);
1391 tx_ring_size
= cmd
.data0
;
1392 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_RX_RING_SIZE
, &cmd
, 0);
1393 rx_ring_size
= cmd
.data0
;
1395 tx_ring_entries
= tx_ring_size
/ sizeof(struct mcp_kreq_ether_send
);
1396 rx_ring_entries
= rx_ring_size
/ sizeof(struct mcp_dma_addr
);
1397 mgp
->tx
.mask
= tx_ring_entries
- 1;
1398 mgp
->rx_small
.mask
= mgp
->rx_big
.mask
= rx_ring_entries
- 1;
1400 /* allocate the host shadow rings */
1402 bytes
= 8 + (MYRI10GE_MAX_SEND_DESC_TSO
+ 4)
1403 * sizeof(*mgp
->tx
.req_list
);
1404 mgp
->tx
.req_bytes
= kzalloc(bytes
, GFP_KERNEL
);
1405 if (mgp
->tx
.req_bytes
== NULL
)
1406 goto abort_with_nothing
;
1408 /* ensure req_list entries are aligned to 8 bytes */
1409 mgp
->tx
.req_list
= (struct mcp_kreq_ether_send
*)
1410 ALIGN((unsigned long)mgp
->tx
.req_bytes
, 8);
1412 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.shadow
);
1413 mgp
->rx_small
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1414 if (mgp
->rx_small
.shadow
== NULL
)
1415 goto abort_with_tx_req_bytes
;
1417 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.shadow
);
1418 mgp
->rx_big
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1419 if (mgp
->rx_big
.shadow
== NULL
)
1420 goto abort_with_rx_small_shadow
;
1422 /* allocate the host info rings */
1424 bytes
= tx_ring_entries
* sizeof(*mgp
->tx
.info
);
1425 mgp
->tx
.info
= kzalloc(bytes
, GFP_KERNEL
);
1426 if (mgp
->tx
.info
== NULL
)
1427 goto abort_with_rx_big_shadow
;
1429 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.info
);
1430 mgp
->rx_small
.info
= kzalloc(bytes
, GFP_KERNEL
);
1431 if (mgp
->rx_small
.info
== NULL
)
1432 goto abort_with_tx_info
;
1434 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.info
);
1435 mgp
->rx_big
.info
= kzalloc(bytes
, GFP_KERNEL
);
1436 if (mgp
->rx_big
.info
== NULL
)
1437 goto abort_with_rx_small_info
;
1439 /* Fill the receive rings */
1441 for (i
= 0; i
<= mgp
->rx_small
.mask
; i
++) {
1442 status
= myri10ge_getbuf(&mgp
->rx_small
, mgp
->pdev
,
1443 mgp
->small_bytes
, i
);
1446 "myri10ge: %s: alloced only %d small bufs\n",
1448 goto abort_with_rx_small_ring
;
1452 for (i
= 0; i
<= mgp
->rx_big
.mask
; i
++) {
1454 myri10ge_getbuf(&mgp
->rx_big
, mgp
->pdev
,
1455 dev
->mtu
+ ETH_HLEN
, i
);
1458 "myri10ge: %s: alloced only %d big bufs\n",
1460 goto abort_with_rx_big_ring
;
1466 abort_with_rx_big_ring
:
1467 for (i
= 0; i
<= mgp
->rx_big
.mask
; i
++) {
1468 if (mgp
->rx_big
.info
[i
].skb
!= NULL
)
1469 dev_kfree_skb_any(mgp
->rx_big
.info
[i
].skb
);
1470 if (pci_unmap_len(&mgp
->rx_big
.info
[i
], len
))
1471 pci_unmap_single(mgp
->pdev
,
1472 pci_unmap_addr(&mgp
->rx_big
.info
[i
],
1474 pci_unmap_len(&mgp
->rx_big
.info
[i
],
1476 PCI_DMA_FROMDEVICE
);
1479 abort_with_rx_small_ring
:
1480 for (i
= 0; i
<= mgp
->rx_small
.mask
; i
++) {
1481 if (mgp
->rx_small
.info
[i
].skb
!= NULL
)
1482 dev_kfree_skb_any(mgp
->rx_small
.info
[i
].skb
);
1483 if (pci_unmap_len(&mgp
->rx_small
.info
[i
], len
))
1484 pci_unmap_single(mgp
->pdev
,
1485 pci_unmap_addr(&mgp
->rx_small
.info
[i
],
1487 pci_unmap_len(&mgp
->rx_small
.info
[i
],
1489 PCI_DMA_FROMDEVICE
);
1491 kfree(mgp
->rx_big
.info
);
1493 abort_with_rx_small_info
:
1494 kfree(mgp
->rx_small
.info
);
1497 kfree(mgp
->tx
.info
);
1499 abort_with_rx_big_shadow
:
1500 kfree(mgp
->rx_big
.shadow
);
1502 abort_with_rx_small_shadow
:
1503 kfree(mgp
->rx_small
.shadow
);
1505 abort_with_tx_req_bytes
:
1506 kfree(mgp
->tx
.req_bytes
);
1507 mgp
->tx
.req_bytes
= NULL
;
1508 mgp
->tx
.req_list
= NULL
;
1514 static void myri10ge_free_rings(struct net_device
*dev
)
1516 struct myri10ge_priv
*mgp
;
1517 struct sk_buff
*skb
;
1518 struct myri10ge_tx_buf
*tx
;
1521 mgp
= netdev_priv(dev
);
1523 for (i
= 0; i
<= mgp
->rx_big
.mask
; i
++) {
1524 if (mgp
->rx_big
.info
[i
].skb
!= NULL
)
1525 dev_kfree_skb_any(mgp
->rx_big
.info
[i
].skb
);
1526 if (pci_unmap_len(&mgp
->rx_big
.info
[i
], len
))
1527 pci_unmap_single(mgp
->pdev
,
1528 pci_unmap_addr(&mgp
->rx_big
.info
[i
],
1530 pci_unmap_len(&mgp
->rx_big
.info
[i
],
1532 PCI_DMA_FROMDEVICE
);
1535 for (i
= 0; i
<= mgp
->rx_small
.mask
; i
++) {
1536 if (mgp
->rx_small
.info
[i
].skb
!= NULL
)
1537 dev_kfree_skb_any(mgp
->rx_small
.info
[i
].skb
);
1538 if (pci_unmap_len(&mgp
->rx_small
.info
[i
], len
))
1539 pci_unmap_single(mgp
->pdev
,
1540 pci_unmap_addr(&mgp
->rx_small
.info
[i
],
1542 pci_unmap_len(&mgp
->rx_small
.info
[i
],
1544 PCI_DMA_FROMDEVICE
);
1548 while (tx
->done
!= tx
->req
) {
1549 idx
= tx
->done
& tx
->mask
;
1550 skb
= tx
->info
[idx
].skb
;
1553 tx
->info
[idx
].skb
= NULL
;
1555 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1556 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1558 mgp
->stats
.tx_dropped
++;
1559 dev_kfree_skb_any(skb
);
1561 pci_unmap_single(mgp
->pdev
,
1562 pci_unmap_addr(&tx
->info
[idx
],
1567 pci_unmap_page(mgp
->pdev
,
1568 pci_unmap_addr(&tx
->info
[idx
],
1573 kfree(mgp
->rx_big
.info
);
1575 kfree(mgp
->rx_small
.info
);
1577 kfree(mgp
->tx
.info
);
1579 kfree(mgp
->rx_big
.shadow
);
1581 kfree(mgp
->rx_small
.shadow
);
1583 kfree(mgp
->tx
.req_bytes
);
1584 mgp
->tx
.req_bytes
= NULL
;
1585 mgp
->tx
.req_list
= NULL
;
1588 static int myri10ge_open(struct net_device
*dev
)
1590 struct myri10ge_priv
*mgp
;
1591 struct myri10ge_cmd cmd
;
1592 int status
, big_pow2
;
1594 mgp
= netdev_priv(dev
);
1596 if (mgp
->running
!= MYRI10GE_ETH_STOPPED
)
1599 mgp
->running
= MYRI10GE_ETH_STARTING
;
1600 status
= myri10ge_reset(mgp
);
1602 printk(KERN_ERR
"myri10ge: %s: failed reset\n", dev
->name
);
1603 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1607 /* decide what small buffer size to use. For good TCP rx
1608 * performance, it is important to not receive 1514 byte
1609 * frames into jumbo buffers, as it confuses the socket buffer
1610 * accounting code, leading to drops and erratic performance.
1613 if (dev
->mtu
<= ETH_DATA_LEN
)
1614 mgp
->small_bytes
= 128; /* enough for a TCP header */
1616 mgp
->small_bytes
= ETH_FRAME_LEN
; /* enough for an ETH_DATA_LEN frame */
1618 /* Override the small buffer size? */
1619 if (myri10ge_small_bytes
> 0)
1620 mgp
->small_bytes
= myri10ge_small_bytes
;
1622 /* If the user sets an obscenely small MTU, adjust the small
1623 * bytes down to nearly nothing */
1624 if (mgp
->small_bytes
>= (dev
->mtu
+ ETH_HLEN
))
1625 mgp
->small_bytes
= 64;
1627 /* get the lanai pointers to the send and receive rings */
1629 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_OFFSET
, &cmd
, 0);
1631 (struct mcp_kreq_ether_send __iomem
*)(mgp
->sram
+ cmd
.data0
);
1634 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SMALL_RX_OFFSET
, &cmd
, 0);
1635 mgp
->rx_small
.lanai
=
1636 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1638 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_BIG_RX_OFFSET
, &cmd
, 0);
1640 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1644 "myri10ge: %s: failed to get ring sizes or locations\n",
1646 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1650 if (mgp
->mtrr
>= 0) {
1651 mgp
->tx
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ 0x200000;
1652 mgp
->rx_small
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ 0x300000;
1653 mgp
->rx_big
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ 0x340000;
1655 mgp
->tx
.wc_fifo
= NULL
;
1656 mgp
->rx_small
.wc_fifo
= NULL
;
1657 mgp
->rx_big
.wc_fifo
= NULL
;
1660 status
= myri10ge_allocate_rings(dev
);
1662 goto abort_with_nothing
;
1664 /* Firmware needs the big buff size as a power of 2. Lie and
1665 * tell him the buffer is larger, because we only use 1
1666 * buffer/pkt, and the mtu will prevent overruns.
1668 big_pow2
= dev
->mtu
+ ETH_HLEN
+ MXGEFW_PAD
;
1669 while ((big_pow2
& (big_pow2
- 1)) != 0)
1672 /* now give firmware buffers sizes, and MTU */
1673 cmd
.data0
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
;
1674 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_MTU
, &cmd
, 0);
1675 cmd
.data0
= mgp
->small_bytes
;
1677 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE
, &cmd
, 0);
1678 cmd
.data0
= big_pow2
;
1680 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_BIG_BUFFER_SIZE
, &cmd
, 0);
1682 printk(KERN_ERR
"myri10ge: %s: Couldn't set buffer sizes\n",
1684 goto abort_with_rings
;
1687 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->fw_stats_bus
);
1688 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->fw_stats_bus
);
1689 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_STATS_DMA
, &cmd
, 0);
1691 printk(KERN_ERR
"myri10ge: %s: Couldn't set stats DMA\n",
1693 goto abort_with_rings
;
1696 mgp
->link_state
= -1;
1697 mgp
->rdma_tags_available
= 15;
1699 netif_poll_enable(mgp
->dev
); /* must happen prior to any irq */
1701 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_UP
, &cmd
, 0);
1703 printk(KERN_ERR
"myri10ge: %s: Couldn't bring up link\n",
1705 goto abort_with_rings
;
1708 mgp
->wake_queue
= 0;
1709 mgp
->stop_queue
= 0;
1710 mgp
->running
= MYRI10GE_ETH_RUNNING
;
1711 mgp
->watchdog_timer
.expires
= jiffies
+ myri10ge_watchdog_timeout
* HZ
;
1712 add_timer(&mgp
->watchdog_timer
);
1713 netif_wake_queue(dev
);
1717 myri10ge_free_rings(dev
);
1720 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1724 static int myri10ge_close(struct net_device
*dev
)
1726 struct myri10ge_priv
*mgp
;
1727 struct myri10ge_cmd cmd
;
1728 int status
, old_down_cnt
;
1730 mgp
= netdev_priv(dev
);
1732 if (mgp
->running
!= MYRI10GE_ETH_RUNNING
)
1735 if (mgp
->tx
.req_bytes
== NULL
)
1738 del_timer_sync(&mgp
->watchdog_timer
);
1739 mgp
->running
= MYRI10GE_ETH_STOPPING
;
1740 netif_poll_disable(mgp
->dev
);
1741 netif_carrier_off(dev
);
1742 netif_stop_queue(dev
);
1743 old_down_cnt
= mgp
->down_cnt
;
1745 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_DOWN
, &cmd
, 0);
1747 printk(KERN_ERR
"myri10ge: %s: Couldn't bring down link\n",
1750 wait_event_timeout(mgp
->down_wq
, old_down_cnt
!= mgp
->down_cnt
, HZ
);
1751 if (old_down_cnt
== mgp
->down_cnt
)
1752 printk(KERN_ERR
"myri10ge: %s never got down irq\n", dev
->name
);
1754 netif_tx_disable(dev
);
1756 myri10ge_free_rings(dev
);
1758 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1762 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1763 * backwards one at a time and handle ring wraps */
1766 myri10ge_submit_req_backwards(struct myri10ge_tx_buf
*tx
,
1767 struct mcp_kreq_ether_send
*src
, int cnt
)
1769 int idx
, starting_slot
;
1770 starting_slot
= tx
->req
;
1773 idx
= (starting_slot
+ cnt
) & tx
->mask
;
1774 myri10ge_pio_copy(&tx
->lanai
[idx
], &src
[cnt
], sizeof(*src
));
1780 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1781 * at most 32 bytes at a time, so as to avoid involving the software
1782 * pio handler in the nic. We re-write the first segment's flags
1783 * to mark them valid only after writing the entire chain.
1787 myri10ge_submit_req(struct myri10ge_tx_buf
*tx
, struct mcp_kreq_ether_send
*src
,
1791 struct mcp_kreq_ether_send __iomem
*dstp
, *dst
;
1792 struct mcp_kreq_ether_send
*srcp
;
1795 idx
= tx
->req
& tx
->mask
;
1797 last_flags
= src
->flags
;
1800 dst
= dstp
= &tx
->lanai
[idx
];
1803 if ((idx
+ cnt
) < tx
->mask
) {
1804 for (i
= 0; i
< (cnt
- 1); i
+= 2) {
1805 myri10ge_pio_copy(dstp
, srcp
, 2 * sizeof(*src
));
1806 mb(); /* force write every 32 bytes */
1811 /* submit all but the first request, and ensure
1812 * that it is submitted below */
1813 myri10ge_submit_req_backwards(tx
, src
, cnt
);
1817 /* submit the first request */
1818 myri10ge_pio_copy(dstp
, srcp
, sizeof(*src
));
1819 mb(); /* barrier before setting valid flag */
1822 /* re-write the last 32-bits with the valid flags */
1823 src
->flags
= last_flags
;
1824 __raw_writel(*((u32
*) src
+ 3), (u32 __iomem
*) dst
+ 3);
1830 myri10ge_submit_req_wc(struct myri10ge_tx_buf
*tx
,
1831 struct mcp_kreq_ether_send
*src
, int cnt
)
1836 myri10ge_pio_copy(tx
->wc_fifo
, src
, 64);
1842 /* pad it to 64 bytes. The src is 64 bytes bigger than it
1843 * needs to be so that we don't overrun it */
1844 myri10ge_pio_copy(tx
->wc_fifo
+ (cnt
<< 18), src
, 64);
1850 * Transmit a packet. We need to split the packet so that a single
1851 * segment does not cross myri10ge->tx.boundary, so this makes segment
1852 * counting tricky. So rather than try to count segments up front, we
1853 * just give up if there are too few segments to hold a reasonably
1854 * fragmented packet currently available. If we run
1855 * out of segments while preparing a packet for DMA, we just linearize
1859 static int myri10ge_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1861 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
1862 struct mcp_kreq_ether_send
*req
;
1863 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1864 struct skb_frag_struct
*frag
;
1866 u32 low
, high_swapped
;
1868 int idx
, last_idx
, avail
, frag_cnt
, frag_idx
, count
, mss
, max_segments
;
1869 u16 pseudo_hdr_offset
, cksum_offset
;
1870 int cum_len
, seglen
, boundary
, rdma_count
;
1875 avail
= tx
->mask
- 1 - (tx
->req
- tx
->done
);
1878 max_segments
= MXGEFW_MAX_SEND_DESC
;
1881 if (skb
->len
> (dev
->mtu
+ ETH_HLEN
)) {
1882 mss
= skb_shinfo(skb
)->gso_size
;
1884 max_segments
= MYRI10GE_MAX_SEND_DESC_TSO
;
1886 #endif /*NETIF_F_TSO */
1888 if ((unlikely(avail
< max_segments
))) {
1889 /* we are out of transmit resources */
1891 netif_stop_queue(dev
);
1895 /* Setup checksum offloading, if needed */
1897 pseudo_hdr_offset
= 0;
1899 flags
= (MXGEFW_FLAGS_NO_TSO
| MXGEFW_FLAGS_FIRST
);
1900 if (likely(skb
->ip_summed
== CHECKSUM_HW
)) {
1901 cksum_offset
= (skb
->h
.raw
- skb
->data
);
1902 pseudo_hdr_offset
= (skb
->h
.raw
+ skb
->csum
) - skb
->data
;
1903 /* If the headers are excessively large, then we must
1904 * fall back to a software checksum */
1905 if (unlikely(cksum_offset
> 255 || pseudo_hdr_offset
> 127)) {
1906 if (skb_checksum_help(skb
, 0))
1909 pseudo_hdr_offset
= 0;
1911 pseudo_hdr_offset
= htons(pseudo_hdr_offset
);
1912 odd_flag
= MXGEFW_FLAGS_ALIGN_ODD
;
1913 flags
|= MXGEFW_FLAGS_CKSUM
;
1920 if (mss
) { /* TSO */
1921 /* this removes any CKSUM flag from before */
1922 flags
= (MXGEFW_FLAGS_TSO_HDR
| MXGEFW_FLAGS_FIRST
);
1924 /* negative cum_len signifies to the
1925 * send loop that we are still in the
1926 * header portion of the TSO packet.
1927 * TSO header must be at most 134 bytes long */
1928 cum_len
= -((skb
->h
.raw
- skb
->data
) + (skb
->h
.th
->doff
<< 2));
1930 /* for TSO, pseudo_hdr_offset holds mss.
1931 * The firmware figures out where to put
1932 * the checksum by parsing the header. */
1933 pseudo_hdr_offset
= htons(mss
);
1935 #endif /*NETIF_F_TSO */
1936 /* Mark small packets, and pad out tiny packets */
1937 if (skb
->len
<= MXGEFW_SEND_SMALL_SIZE
) {
1938 flags
|= MXGEFW_FLAGS_SMALL
;
1940 /* pad frames to at least ETH_ZLEN bytes */
1941 if (unlikely(skb
->len
< ETH_ZLEN
)) {
1942 if (skb_padto(skb
, ETH_ZLEN
)) {
1943 /* The packet is gone, so we must
1945 mgp
->stats
.tx_dropped
+= 1;
1948 /* adjust the len to account for the zero pad
1949 * so that the nic can know how long it is */
1950 skb
->len
= ETH_ZLEN
;
1954 /* map the skb for DMA */
1955 len
= skb
->len
- skb
->data_len
;
1956 idx
= tx
->req
& tx
->mask
;
1957 tx
->info
[idx
].skb
= skb
;
1958 bus
= pci_map_single(mgp
->pdev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
1959 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
1960 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
1962 frag_cnt
= skb_shinfo(skb
)->nr_frags
;
1967 /* "rdma_count" is the number of RDMAs belonging to the
1968 * current packet BEFORE the current send request. For
1969 * non-TSO packets, this is equal to "count".
1970 * For TSO packets, rdma_count needs to be reset
1971 * to 0 after a segment cut.
1973 * The rdma_count field of the send request is
1974 * the number of RDMAs of the packet starting at
1975 * that request. For TSO send requests with one ore more cuts
1976 * in the middle, this is the number of RDMAs starting
1977 * after the last cut in the request. All previous
1978 * segments before the last cut implicitly have 1 RDMA.
1980 * Since the number of RDMAs is not known beforehand,
1981 * it must be filled-in retroactively - after each
1982 * segmentation cut or at the end of the entire packet.
1986 /* Break the SKB or Fragment up into pieces which
1987 * do not cross mgp->tx.boundary */
1988 low
= MYRI10GE_LOWPART_TO_U32(bus
);
1989 high_swapped
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
1994 if (unlikely(count
== max_segments
))
1995 goto abort_linearize
;
1997 boundary
= (low
+ tx
->boundary
) & ~(tx
->boundary
- 1);
1998 seglen
= boundary
- low
;
2001 flags_next
= flags
& ~MXGEFW_FLAGS_FIRST
;
2002 cum_len_next
= cum_len
+ seglen
;
2004 if (mss
) { /* TSO */
2005 (req
- rdma_count
)->rdma_count
= rdma_count
+ 1;
2007 if (likely(cum_len
>= 0)) { /* payload */
2008 int next_is_first
, chop
;
2010 chop
= (cum_len_next
> mss
);
2011 cum_len_next
= cum_len_next
% mss
;
2012 next_is_first
= (cum_len_next
== 0);
2013 flags
|= chop
* MXGEFW_FLAGS_TSO_CHOP
;
2014 flags_next
|= next_is_first
*
2016 rdma_count
|= -(chop
| next_is_first
);
2017 rdma_count
+= chop
& !next_is_first
;
2018 } else if (likely(cum_len_next
>= 0)) { /* header ends */
2024 small
= (mss
<= MXGEFW_SEND_SMALL_SIZE
);
2025 flags_next
= MXGEFW_FLAGS_TSO_PLD
|
2026 MXGEFW_FLAGS_FIRST
|
2027 (small
* MXGEFW_FLAGS_SMALL
);
2030 #endif /* NETIF_F_TSO */
2031 req
->addr_high
= high_swapped
;
2032 req
->addr_low
= htonl(low
);
2033 req
->pseudo_hdr_offset
= pseudo_hdr_offset
;
2034 req
->pad
= 0; /* complete solid 16-byte block; does this matter? */
2035 req
->rdma_count
= 1;
2036 req
->length
= htons(seglen
);
2037 req
->cksum_offset
= cksum_offset
;
2038 req
->flags
= flags
| ((cum_len
& 1) * odd_flag
);
2042 cum_len
= cum_len_next
;
2047 if (unlikely(cksum_offset
> seglen
))
2048 cksum_offset
-= seglen
;
2052 if (frag_idx
== frag_cnt
)
2055 /* map next fragment for DMA */
2056 idx
= (count
+ tx
->req
) & tx
->mask
;
2057 frag
= &skb_shinfo(skb
)->frags
[frag_idx
];
2060 bus
= pci_map_page(mgp
->pdev
, frag
->page
, frag
->page_offset
,
2061 len
, PCI_DMA_TODEVICE
);
2062 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2063 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2066 (req
- rdma_count
)->rdma_count
= rdma_count
;
2071 req
->flags
|= MXGEFW_FLAGS_TSO_LAST
;
2072 } while (!(req
->flags
& (MXGEFW_FLAGS_TSO_CHOP
|
2073 MXGEFW_FLAGS_FIRST
)));
2075 idx
= ((count
- 1) + tx
->req
) & tx
->mask
;
2076 tx
->info
[idx
].last
= 1;
2077 if (tx
->wc_fifo
== NULL
)
2078 myri10ge_submit_req(tx
, tx
->req_list
, count
);
2080 myri10ge_submit_req_wc(tx
, tx
->req_list
, count
);
2082 if ((avail
- count
) < MXGEFW_MAX_SEND_DESC
) {
2084 netif_stop_queue(dev
);
2086 dev
->trans_start
= jiffies
;
2090 /* Free any DMA resources we've alloced and clear out the skb
2091 * slot so as to not trip up assertions, and to avoid a
2092 * double-free if linearizing fails */
2094 last_idx
= (idx
+ 1) & tx
->mask
;
2095 idx
= tx
->req
& tx
->mask
;
2096 tx
->info
[idx
].skb
= NULL
;
2098 len
= pci_unmap_len(&tx
->info
[idx
], len
);
2100 if (tx
->info
[idx
].skb
!= NULL
)
2101 pci_unmap_single(mgp
->pdev
,
2102 pci_unmap_addr(&tx
->info
[idx
],
2106 pci_unmap_page(mgp
->pdev
,
2107 pci_unmap_addr(&tx
->info
[idx
],
2110 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
2111 tx
->info
[idx
].skb
= NULL
;
2113 idx
= (idx
+ 1) & tx
->mask
;
2114 } while (idx
!= last_idx
);
2115 if (skb_is_gso(skb
)) {
2117 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2122 if (skb_linearize(skb
))
2125 mgp
->tx_linearized
++;
2129 dev_kfree_skb_any(skb
);
2130 mgp
->stats
.tx_dropped
+= 1;
2135 static struct net_device_stats
*myri10ge_get_stats(struct net_device
*dev
)
2137 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2141 static void myri10ge_set_multicast_list(struct net_device
*dev
)
2143 /* can be called from atomic contexts,
2144 * pass 1 to force atomicity in myri10ge_send_cmd() */
2145 myri10ge_change_promisc(netdev_priv(dev
), dev
->flags
& IFF_PROMISC
, 1);
2148 static int myri10ge_set_mac_address(struct net_device
*dev
, void *addr
)
2150 struct sockaddr
*sa
= addr
;
2151 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2154 if (!is_valid_ether_addr(sa
->sa_data
))
2155 return -EADDRNOTAVAIL
;
2157 status
= myri10ge_update_mac_address(mgp
, sa
->sa_data
);
2160 "myri10ge: %s: changing mac address failed with %d\n",
2165 /* change the dev structure */
2166 memcpy(dev
->dev_addr
, sa
->sa_data
, 6);
2170 static int myri10ge_change_mtu(struct net_device
*dev
, int new_mtu
)
2172 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2175 if ((new_mtu
< 68) || (ETH_HLEN
+ new_mtu
> MYRI10GE_MAX_ETHER_MTU
)) {
2176 printk(KERN_ERR
"myri10ge: %s: new mtu (%d) is not valid\n",
2177 dev
->name
, new_mtu
);
2180 printk(KERN_INFO
"%s: changing mtu from %d to %d\n",
2181 dev
->name
, dev
->mtu
, new_mtu
);
2183 /* if we change the mtu on an active device, we must
2184 * reset the device so the firmware sees the change */
2185 myri10ge_close(dev
);
2195 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2196 * Only do it if the bridge is a root port since we don't want to disturb
2197 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2200 static void myri10ge_enable_ecrc(struct myri10ge_priv
*mgp
)
2202 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2203 struct device
*dev
= &mgp
->pdev
->dev
;
2210 if (!myri10ge_ecrc_enable
|| !bridge
)
2213 /* check that the bridge is a root port */
2214 cap
= pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2215 pci_read_config_word(bridge
, cap
+ PCI_CAP_FLAGS
, &val
);
2216 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2217 if (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
) {
2218 if (myri10ge_ecrc_enable
> 1) {
2219 struct pci_dev
*old_bridge
= bridge
;
2221 /* Walk the hierarchy up to the root port
2222 * where ECRC has to be enabled */
2224 bridge
= bridge
->bus
->self
;
2227 "Failed to find root port"
2228 " to force ECRC\n");
2232 pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2233 pci_read_config_word(bridge
,
2234 cap
+ PCI_CAP_FLAGS
, &val
);
2235 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2236 } while (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
);
2239 "Forcing ECRC on non-root port %s"
2240 " (enabling on root port %s)\n",
2241 pci_name(old_bridge
), pci_name(bridge
));
2244 "Not enabling ECRC on non-root port %s\n",
2250 cap
= pci_find_ext_capability(bridge
, PCI_EXT_CAP_ID_ERR
);
2254 ret
= pci_read_config_dword(bridge
, cap
+ PCI_ERR_CAP
, &err_cap
);
2256 dev_err(dev
, "failed reading ext-conf-space of %s\n",
2258 dev_err(dev
, "\t pci=nommconf in use? "
2259 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2262 if (!(err_cap
& PCI_ERR_CAP_ECRC_GENC
))
2265 err_cap
|= PCI_ERR_CAP_ECRC_GENE
;
2266 pci_write_config_dword(bridge
, cap
+ PCI_ERR_CAP
, err_cap
);
2267 dev_info(dev
, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge
));
2268 mgp
->tx
.boundary
= 4096;
2269 mgp
->fw_name
= myri10ge_fw_aligned
;
2273 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2274 * when the PCI-E Completion packets are aligned on an 8-byte
2275 * boundary. Some PCI-E chip sets always align Completion packets; on
2276 * the ones that do not, the alignment can be enforced by enabling
2277 * ECRC generation (if supported).
2279 * When PCI-E Completion packets are not aligned, it is actually more
2280 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2282 * If the driver can neither enable ECRC nor verify that it has
2283 * already been enabled, then it must use a firmware image which works
2284 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2285 * should also ensure that it never gives the device a Read-DMA which is
2286 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2287 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2288 * firmware image, and set tx.boundary to 4KB.
2291 #define PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE 0x0132
2293 static void myri10ge_select_firmware(struct myri10ge_priv
*mgp
)
2295 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2297 mgp
->tx
.boundary
= 2048;
2298 mgp
->fw_name
= myri10ge_fw_unaligned
;
2300 if (myri10ge_force_firmware
== 0) {
2301 myri10ge_enable_ecrc(mgp
);
2303 /* Check to see if the upstream bridge is known to
2304 * provide aligned completions */
2306 /* ServerWorks HT2000/HT1000 */
2307 && bridge
->vendor
== PCI_VENDOR_ID_SERVERWORKS
2308 && bridge
->device
==
2309 PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE
) {
2310 dev_info(&mgp
->pdev
->dev
,
2311 "Assuming aligned completions (0x%x:0x%x)\n",
2312 bridge
->vendor
, bridge
->device
);
2313 mgp
->tx
.boundary
= 4096;
2314 mgp
->fw_name
= myri10ge_fw_aligned
;
2317 if (myri10ge_force_firmware
== 1) {
2318 dev_info(&mgp
->pdev
->dev
,
2319 "Assuming aligned completions (forced)\n");
2320 mgp
->tx
.boundary
= 4096;
2321 mgp
->fw_name
= myri10ge_fw_aligned
;
2323 dev_info(&mgp
->pdev
->dev
,
2324 "Assuming unaligned completions (forced)\n");
2325 mgp
->tx
.boundary
= 2048;
2326 mgp
->fw_name
= myri10ge_fw_unaligned
;
2329 if (myri10ge_fw_name
!= NULL
) {
2330 dev_info(&mgp
->pdev
->dev
, "overriding firmware to %s\n",
2332 mgp
->fw_name
= myri10ge_fw_name
;
2336 static void myri10ge_save_state(struct myri10ge_priv
*mgp
)
2338 struct pci_dev
*pdev
= mgp
->pdev
;
2341 pci_save_state(pdev
);
2342 /* now save PCIe and MSI state that Linux will not
2344 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2345 pci_read_config_dword(pdev
, cap
+ PCI_EXP_DEVCTL
, &mgp
->devctl
);
2346 cap
= pci_find_capability(pdev
, PCI_CAP_ID_MSI
);
2347 pci_read_config_word(pdev
, cap
+ PCI_MSI_FLAGS
, &mgp
->msi_flags
);
2350 static void myri10ge_restore_state(struct myri10ge_priv
*mgp
)
2352 struct pci_dev
*pdev
= mgp
->pdev
;
2355 /* restore PCIe and MSI state that linux will not */
2356 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2357 pci_write_config_dword(pdev
, cap
+ PCI_CAP_ID_EXP
, mgp
->devctl
);
2358 cap
= pci_find_capability(pdev
, PCI_CAP_ID_MSI
);
2359 pci_write_config_word(pdev
, cap
+ PCI_MSI_FLAGS
, mgp
->msi_flags
);
2361 pci_restore_state(pdev
);
2366 static int myri10ge_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2368 struct myri10ge_priv
*mgp
;
2369 struct net_device
*netdev
;
2371 mgp
= pci_get_drvdata(pdev
);
2376 netif_device_detach(netdev
);
2377 if (netif_running(netdev
)) {
2378 printk(KERN_INFO
"myri10ge: closing %s\n", netdev
->name
);
2380 myri10ge_close(netdev
);
2383 myri10ge_dummy_rdma(mgp
, 0);
2384 free_irq(pdev
->irq
, mgp
);
2385 myri10ge_save_state(mgp
);
2386 pci_disable_device(pdev
);
2387 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2391 static int myri10ge_resume(struct pci_dev
*pdev
)
2393 struct myri10ge_priv
*mgp
;
2394 struct net_device
*netdev
;
2398 mgp
= pci_get_drvdata(pdev
);
2402 pci_set_power_state(pdev
, 0); /* zeros conf space as a side effect */
2403 msleep(5); /* give card time to respond */
2404 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2405 if (vendor
== 0xffff) {
2406 printk(KERN_ERR
"myri10ge: %s: device disappeared!\n",
2410 myri10ge_restore_state(mgp
);
2412 status
= pci_enable_device(pdev
);
2414 dev_err(&pdev
->dev
, "failed to enable device\n");
2418 pci_set_master(pdev
);
2420 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
2423 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
2424 goto abort_with_enabled
;
2427 myri10ge_reset(mgp
);
2428 myri10ge_dummy_rdma(mgp
, 1);
2430 /* Save configuration space to be restored if the
2431 * nic resets due to a parity error */
2432 myri10ge_save_state(mgp
);
2434 if (netif_running(netdev
)) {
2436 myri10ge_open(netdev
);
2439 netif_device_attach(netdev
);
2444 pci_disable_device(pdev
);
2449 #endif /* CONFIG_PM */
2451 static u32
myri10ge_read_reboot(struct myri10ge_priv
*mgp
)
2453 struct pci_dev
*pdev
= mgp
->pdev
;
2454 int vs
= mgp
->vendor_specific_offset
;
2457 /*enter read32 mode */
2458 pci_write_config_byte(pdev
, vs
+ 0x10, 0x3);
2460 /*read REBOOT_STATUS (0xfffffff0) */
2461 pci_write_config_dword(pdev
, vs
+ 0x18, 0xfffffff0);
2462 pci_read_config_dword(pdev
, vs
+ 0x14, &reboot
);
2467 * This watchdog is used to check whether the board has suffered
2468 * from a parity error and needs to be recovered.
2470 static void myri10ge_watchdog(void *arg
)
2472 struct myri10ge_priv
*mgp
= arg
;
2477 mgp
->watchdog_resets
++;
2478 pci_read_config_word(mgp
->pdev
, PCI_COMMAND
, &cmd
);
2479 if ((cmd
& PCI_COMMAND_MASTER
) == 0) {
2480 /* Bus master DMA disabled? Check to see
2481 * if the card rebooted due to a parity error
2482 * For now, just report it */
2483 reboot
= myri10ge_read_reboot(mgp
);
2485 "myri10ge: %s: NIC rebooted (0x%x), resetting\n",
2486 mgp
->dev
->name
, reboot
);
2488 * A rebooted nic will come back with config space as
2489 * it was after power was applied to PCIe bus.
2490 * Attempt to restore config space which was saved
2491 * when the driver was loaded, or the last time the
2492 * nic was resumed from power saving mode.
2494 myri10ge_restore_state(mgp
);
2496 /* if we get back -1's from our slot, perhaps somebody
2497 * powered off our card. Don't try to reset it in
2499 if (cmd
== 0xffff) {
2500 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2501 if (vendor
== 0xffff) {
2503 "myri10ge: %s: device disappeared!\n",
2508 /* Perhaps it is a software error. Try to reset */
2510 printk(KERN_ERR
"myri10ge: %s: device timeout, resetting\n",
2512 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2513 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2514 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2515 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2517 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2518 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2519 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2520 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2523 myri10ge_close(mgp
->dev
);
2524 status
= myri10ge_load_firmware(mgp
);
2526 printk(KERN_ERR
"myri10ge: %s: failed to load firmware\n",
2529 myri10ge_open(mgp
->dev
);
2534 * We use our own timer routine rather than relying upon
2535 * netdev->tx_timeout because we have a very large hardware transmit
2536 * queue. Due to the large queue, the netdev->tx_timeout function
2537 * cannot detect a NIC with a parity error in a timely fashion if the
2538 * NIC is lightly loaded.
2540 static void myri10ge_watchdog_timer(unsigned long arg
)
2542 struct myri10ge_priv
*mgp
;
2544 mgp
= (struct myri10ge_priv
*)arg
;
2545 if (mgp
->tx
.req
!= mgp
->tx
.done
&&
2546 mgp
->tx
.done
== mgp
->watchdog_tx_done
&&
2547 mgp
->watchdog_tx_req
!= mgp
->watchdog_tx_done
)
2548 /* nic seems like it might be stuck.. */
2549 schedule_work(&mgp
->watchdog_work
);
2552 mod_timer(&mgp
->watchdog_timer
,
2553 jiffies
+ myri10ge_watchdog_timeout
* HZ
);
2555 mgp
->watchdog_tx_done
= mgp
->tx
.done
;
2556 mgp
->watchdog_tx_req
= mgp
->tx
.req
;
2559 static int myri10ge_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2561 struct net_device
*netdev
;
2562 struct myri10ge_priv
*mgp
;
2563 struct device
*dev
= &pdev
->dev
;
2566 int status
= -ENXIO
;
2571 netdev
= alloc_etherdev(sizeof(*mgp
));
2572 if (netdev
== NULL
) {
2573 dev_err(dev
, "Could not allocate ethernet device\n");
2577 mgp
= netdev_priv(netdev
);
2578 memset(mgp
, 0, sizeof(*mgp
));
2581 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
2582 mgp
->pause
= myri10ge_flow_control
;
2583 mgp
->intr_coal_delay
= myri10ge_intr_coal_delay
;
2584 init_waitqueue_head(&mgp
->down_wq
);
2586 if (pci_enable_device(pdev
)) {
2587 dev_err(&pdev
->dev
, "pci_enable_device call failed\n");
2589 goto abort_with_netdev
;
2591 myri10ge_select_firmware(mgp
);
2593 /* Find the vendor-specific cap so we can check
2594 * the reboot register later on */
2595 mgp
->vendor_specific_offset
2596 = pci_find_capability(pdev
, PCI_CAP_ID_VNDR
);
2598 /* Set our max read request to 4KB */
2599 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2601 dev_err(&pdev
->dev
, "Bad PCI_CAP_ID_EXP location %d\n", cap
);
2602 goto abort_with_netdev
;
2604 status
= pci_read_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, &val
);
2606 dev_err(&pdev
->dev
, "Error %d reading PCI_EXP_DEVCTL\n",
2608 goto abort_with_netdev
;
2610 val
= (val
& ~PCI_EXP_DEVCTL_READRQ
) | (5 << 12);
2611 status
= pci_write_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, val
);
2613 dev_err(&pdev
->dev
, "Error %d writing PCI_EXP_DEVCTL\n",
2615 goto abort_with_netdev
;
2618 pci_set_master(pdev
);
2620 status
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
2624 "64-bit pci address mask was refused, trying 32-bit");
2625 status
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
2628 dev_err(&pdev
->dev
, "Error %d setting DMA mask\n", status
);
2629 goto abort_with_netdev
;
2631 mgp
->cmd
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2632 &mgp
->cmd_bus
, GFP_KERNEL
);
2633 if (mgp
->cmd
== NULL
)
2634 goto abort_with_netdev
;
2636 mgp
->fw_stats
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2637 &mgp
->fw_stats_bus
, GFP_KERNEL
);
2638 if (mgp
->fw_stats
== NULL
)
2639 goto abort_with_cmd
;
2641 mgp
->board_span
= pci_resource_len(pdev
, 0);
2642 mgp
->iomem_base
= pci_resource_start(pdev
, 0);
2645 mgp
->mtrr
= mtrr_add(mgp
->iomem_base
, mgp
->board_span
,
2646 MTRR_TYPE_WRCOMB
, 1);
2648 /* Hack. need to get rid of these magic numbers */
2650 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
2651 if (mgp
->sram_size
> mgp
->board_span
) {
2652 dev_err(&pdev
->dev
, "board span %ld bytes too small\n",
2656 mgp
->sram
= ioremap(mgp
->iomem_base
, mgp
->board_span
);
2657 if (mgp
->sram
== NULL
) {
2658 dev_err(&pdev
->dev
, "ioremap failed for %ld bytes at 0x%lx\n",
2659 mgp
->board_span
, mgp
->iomem_base
);
2663 memcpy_fromio(mgp
->eeprom_strings
,
2664 mgp
->sram
+ mgp
->sram_size
- MYRI10GE_EEPROM_STRINGS_SIZE
,
2665 MYRI10GE_EEPROM_STRINGS_SIZE
);
2666 memset(mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
- 2, 0, 2);
2667 status
= myri10ge_read_mac_addr(mgp
);
2669 goto abort_with_ioremap
;
2671 for (i
= 0; i
< ETH_ALEN
; i
++)
2672 netdev
->dev_addr
[i
] = mgp
->mac_addr
[i
];
2674 /* allocate rx done ring */
2675 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2676 mgp
->rx_done
.entry
= dma_alloc_coherent(&pdev
->dev
, bytes
,
2677 &mgp
->rx_done
.bus
, GFP_KERNEL
);
2678 if (mgp
->rx_done
.entry
== NULL
)
2679 goto abort_with_ioremap
;
2680 memset(mgp
->rx_done
.entry
, 0, bytes
);
2682 status
= myri10ge_load_firmware(mgp
);
2684 dev_err(&pdev
->dev
, "failed to load firmware\n");
2685 goto abort_with_rx_done
;
2688 status
= myri10ge_reset(mgp
);
2690 dev_err(&pdev
->dev
, "failed reset\n");
2691 goto abort_with_firmware
;
2695 status
= pci_enable_msi(pdev
);
2698 "Error %d setting up MSI; falling back to xPIC\n",
2701 mgp
->msi_enabled
= 1;
2704 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
2707 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
2708 goto abort_with_firmware
;
2711 pci_set_drvdata(pdev
, mgp
);
2712 if ((myri10ge_initial_mtu
+ ETH_HLEN
) > MYRI10GE_MAX_ETHER_MTU
)
2713 myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
2714 if ((myri10ge_initial_mtu
+ ETH_HLEN
) < 68)
2715 myri10ge_initial_mtu
= 68;
2716 netdev
->mtu
= myri10ge_initial_mtu
;
2717 netdev
->open
= myri10ge_open
;
2718 netdev
->stop
= myri10ge_close
;
2719 netdev
->hard_start_xmit
= myri10ge_xmit
;
2720 netdev
->get_stats
= myri10ge_get_stats
;
2721 netdev
->base_addr
= mgp
->iomem_base
;
2722 netdev
->irq
= pdev
->irq
;
2723 netdev
->change_mtu
= myri10ge_change_mtu
;
2724 netdev
->set_multicast_list
= myri10ge_set_multicast_list
;
2725 netdev
->set_mac_address
= myri10ge_set_mac_address
;
2726 netdev
->features
= NETIF_F_SG
| NETIF_F_HW_CSUM
| NETIF_F_TSO
;
2728 netdev
->features
|= NETIF_F_HIGHDMA
;
2729 netdev
->poll
= myri10ge_poll
;
2730 netdev
->weight
= myri10ge_napi_weight
;
2732 /* Save configuration space to be restored if the
2733 * nic resets due to a parity error */
2734 myri10ge_save_state(mgp
);
2736 /* Setup the watchdog timer */
2737 setup_timer(&mgp
->watchdog_timer
, myri10ge_watchdog_timer
,
2738 (unsigned long)mgp
);
2740 SET_ETHTOOL_OPS(netdev
, &myri10ge_ethtool_ops
);
2741 INIT_WORK(&mgp
->watchdog_work
, myri10ge_watchdog
, mgp
);
2742 status
= register_netdev(netdev
);
2744 dev_err(&pdev
->dev
, "register_netdev failed: %d\n", status
);
2745 goto abort_with_irq
;
2747 dev_info(dev
, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
2748 (mgp
->msi_enabled
? "MSI" : "xPIC"),
2749 pdev
->irq
, mgp
->tx
.boundary
, mgp
->fw_name
,
2750 (mgp
->mtrr
>= 0 ? "Enabled" : "Disabled"));
2755 free_irq(pdev
->irq
, mgp
);
2756 if (mgp
->msi_enabled
)
2757 pci_disable_msi(pdev
);
2759 abort_with_firmware
:
2760 myri10ge_dummy_rdma(mgp
, 0);
2763 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2764 dma_free_coherent(&pdev
->dev
, bytes
,
2765 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
2773 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
2775 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2776 mgp
->fw_stats
, mgp
->fw_stats_bus
);
2779 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2780 mgp
->cmd
, mgp
->cmd_bus
);
2784 free_netdev(netdev
);
2791 * Does what is necessary to shutdown one Myrinet device. Called
2792 * once for each Myrinet card by the kernel when a module is
2795 static void myri10ge_remove(struct pci_dev
*pdev
)
2797 struct myri10ge_priv
*mgp
;
2798 struct net_device
*netdev
;
2801 mgp
= pci_get_drvdata(pdev
);
2805 flush_scheduled_work();
2807 unregister_netdev(netdev
);
2808 free_irq(pdev
->irq
, mgp
);
2809 if (mgp
->msi_enabled
)
2810 pci_disable_msi(pdev
);
2812 myri10ge_dummy_rdma(mgp
, 0);
2814 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2815 dma_free_coherent(&pdev
->dev
, bytes
,
2816 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
2822 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
2824 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2825 mgp
->fw_stats
, mgp
->fw_stats_bus
);
2827 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2828 mgp
->cmd
, mgp
->cmd_bus
);
2830 free_netdev(netdev
);
2831 pci_set_drvdata(pdev
, NULL
);
2834 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
2836 static struct pci_device_id myri10ge_pci_tbl
[] = {
2837 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM
, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E
)},
2841 static struct pci_driver myri10ge_driver
= {
2843 .probe
= myri10ge_probe
,
2844 .remove
= myri10ge_remove
,
2845 .id_table
= myri10ge_pci_tbl
,
2847 .suspend
= myri10ge_suspend
,
2848 .resume
= myri10ge_resume
,
2852 static __init
int myri10ge_init_module(void)
2854 printk(KERN_INFO
"%s: Version %s\n", myri10ge_driver
.name
,
2855 MYRI10GE_VERSION_STR
);
2856 return pci_register_driver(&myri10ge_driver
);
2859 module_init(myri10ge_init_module
);
2861 static __exit
void myri10ge_cleanup_module(void)
2863 pci_unregister_driver(&myri10ge_driver
);
2866 module_exit(myri10ge_cleanup_module
);