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[mirror_ubuntu-hirsute-kernel.git] / drivers / net / phy / marvell.c
1 /*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
31 #include <linux/mm.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
37 #include <linux/of.h>
38
39 #include <linux/io.h>
40 #include <asm/irq.h>
41 #include <linux/uaccess.h>
42
43 #define MII_MARVELL_PHY_PAGE 22
44 #define MII_MARVELL_COPPER_PAGE 0x00
45 #define MII_MARVELL_FIBER_PAGE 0x01
46 #define MII_MARVELL_MSCR_PAGE 0x02
47 #define MII_MARVELL_LED_PAGE 0x03
48 #define MII_MARVELL_MISC_TEST_PAGE 0x06
49 #define MII_MARVELL_WOL_PAGE 0x11
50
51 #define MII_M1011_IEVENT 0x13
52 #define MII_M1011_IEVENT_CLEAR 0x0000
53
54 #define MII_M1011_IMASK 0x12
55 #define MII_M1011_IMASK_INIT 0x6400
56 #define MII_M1011_IMASK_CLEAR 0x0000
57
58 #define MII_M1011_PHY_SCR 0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
65
66 #define MII_M1111_PHY_LED_CONTROL 0x18
67 #define MII_M1111_PHY_LED_DIRECT 0x4100
68 #define MII_M1111_PHY_LED_COMBINE 0x411c
69 #define MII_M1111_PHY_EXT_CR 0x14
70 #define MII_M1111_RGMII_RX_DELAY BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY BIT(1)
72 #define MII_M1111_PHY_EXT_SR 0x1b
73
74 #define MII_M1111_HWCFG_MODE_MASK 0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77 #define MII_M1111_HWCFG_MODE_RTBI 0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
82
83 #define MII_88E1121_PHY_MSCR_REG 21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
87
88 #define MII_88E1121_MISC_TEST 0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
95
96 #define MII_88E1510_TEMP_SENSOR 0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
98
99 #define MII_88E6390_MISC_TEST 0x1b
100 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
105
106 #define MII_88E6390_TEMP_SENSOR 0x1c
107 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
109
110 #define MII_88E1318S_PHY_MSCR1_REG 16
111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
112
113 /* Copper Specific Interrupt Enable Register */
114 #define MII_88E1318S_PHY_CSIER 0x12
115 /* WOL Event Interrupt Enable */
116 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
117
118 /* LED Timer Control Register */
119 #define MII_88E1318S_PHY_LED_TCR 0x12
120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
123
124 /* Magic Packet MAC address registers */
125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
128
129 #define MII_88E1318S_PHY_WOL_CTRL 0x10
130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
132
133 #define MII_88E1121_PHY_LED_CTRL 16
134 #define MII_88E1121_PHY_LED_DEF 0x0030
135
136 #define MII_M1011_PHY_STATUS 0x11
137 #define MII_M1011_PHY_STATUS_1000 0x8000
138 #define MII_M1011_PHY_STATUS_100 0x4000
139 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
140 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
141 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
142 #define MII_M1011_PHY_STATUS_LINK 0x0400
143
144 #define MII_88E3016_PHY_SPEC_CTRL 0x10
145 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
146 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
147
148 #define MII_88E1510_GEN_CTRL_REG_1 0x14
149 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
151 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
152
153 #define LPA_FIBER_1000HALF 0x40
154 #define LPA_FIBER_1000FULL 0x20
155
156 #define LPA_PAUSE_FIBER 0x180
157 #define LPA_PAUSE_ASYM_FIBER 0x100
158
159 #define ADVERTISE_FIBER_1000HALF 0x40
160 #define ADVERTISE_FIBER_1000FULL 0x20
161
162 #define ADVERTISE_PAUSE_FIBER 0x180
163 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
164
165 #define REGISTER_LINK_STATUS 0x400
166 #define NB_FIBER_STATS 1
167
168 MODULE_DESCRIPTION("Marvell PHY driver");
169 MODULE_AUTHOR("Andy Fleming");
170 MODULE_LICENSE("GPL");
171
172 struct marvell_hw_stat {
173 const char *string;
174 u8 page;
175 u8 reg;
176 u8 bits;
177 };
178
179 static struct marvell_hw_stat marvell_hw_stats[] = {
180 { "phy_receive_errors_copper", 0, 21, 16},
181 { "phy_idle_errors", 0, 10, 8 },
182 { "phy_receive_errors_fiber", 1, 21, 16},
183 };
184
185 struct marvell_priv {
186 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
187 char *hwmon_name;
188 struct device *hwmon_dev;
189 };
190
191 static int marvell_read_page(struct phy_device *phydev)
192 {
193 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
194 }
195
196 static int marvell_write_page(struct phy_device *phydev, int page)
197 {
198 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
199 }
200
201 static int marvell_set_page(struct phy_device *phydev, int page)
202 {
203 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
204 }
205
206 static int marvell_ack_interrupt(struct phy_device *phydev)
207 {
208 int err;
209
210 /* Clear the interrupts by reading the reg */
211 err = phy_read(phydev, MII_M1011_IEVENT);
212
213 if (err < 0)
214 return err;
215
216 return 0;
217 }
218
219 static int marvell_config_intr(struct phy_device *phydev)
220 {
221 int err;
222
223 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
224 err = phy_write(phydev, MII_M1011_IMASK,
225 MII_M1011_IMASK_INIT);
226 else
227 err = phy_write(phydev, MII_M1011_IMASK,
228 MII_M1011_IMASK_CLEAR);
229
230 return err;
231 }
232
233 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
234 {
235 int reg;
236 int err;
237 int val;
238
239 /* get the current settings */
240 reg = phy_read(phydev, MII_M1011_PHY_SCR);
241 if (reg < 0)
242 return reg;
243
244 val = reg;
245 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
246 switch (polarity) {
247 case ETH_TP_MDI:
248 val |= MII_M1011_PHY_SCR_MDI;
249 break;
250 case ETH_TP_MDI_X:
251 val |= MII_M1011_PHY_SCR_MDI_X;
252 break;
253 case ETH_TP_MDI_AUTO:
254 case ETH_TP_MDI_INVALID:
255 default:
256 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
257 break;
258 }
259
260 if (val != reg) {
261 /* Set the new polarity value in the register */
262 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
263 if (err)
264 return err;
265 }
266
267 return 0;
268 }
269
270 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
271 u8 retries)
272 {
273 int reg;
274
275 reg = phy_read(phydev, MII_M1011_PHY_SCR);
276 if (reg < 0)
277 return reg;
278
279 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
280 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
281 if (enable)
282 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
283
284 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
285 }
286
287 static int marvell_config_aneg(struct phy_device *phydev)
288 {
289 int err;
290
291 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
292 if (err < 0)
293 return err;
294
295 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
296 MII_M1111_PHY_LED_DIRECT);
297 if (err < 0)
298 return err;
299
300 err = genphy_config_aneg(phydev);
301 if (err < 0)
302 return err;
303
304 if (phydev->autoneg != AUTONEG_ENABLE) {
305 /* A write to speed/duplex bits (that is performed by
306 * genphy_config_aneg() call above) must be followed by
307 * a software reset. Otherwise, the write has no effect.
308 */
309 err = genphy_soft_reset(phydev);
310 if (err < 0)
311 return err;
312 }
313
314 return 0;
315 }
316
317 static int m88e1101_config_aneg(struct phy_device *phydev)
318 {
319 int err;
320
321 /* This Marvell PHY has an errata which requires
322 * that certain registers get written in order
323 * to restart autonegotiation
324 */
325 err = genphy_soft_reset(phydev);
326 if (err < 0)
327 return err;
328
329 err = phy_write(phydev, 0x1d, 0x1f);
330 if (err < 0)
331 return err;
332
333 err = phy_write(phydev, 0x1e, 0x200c);
334 if (err < 0)
335 return err;
336
337 err = phy_write(phydev, 0x1d, 0x5);
338 if (err < 0)
339 return err;
340
341 err = phy_write(phydev, 0x1e, 0);
342 if (err < 0)
343 return err;
344
345 err = phy_write(phydev, 0x1e, 0x100);
346 if (err < 0)
347 return err;
348
349 return marvell_config_aneg(phydev);
350 }
351
352 static int m88e1111_config_aneg(struct phy_device *phydev)
353 {
354 int err;
355
356 /* The Marvell PHY has an errata which requires
357 * that certain registers get written in order
358 * to restart autonegotiation
359 */
360 err = genphy_soft_reset(phydev);
361
362 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
363 if (err < 0)
364 return err;
365
366 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
367 MII_M1111_PHY_LED_DIRECT);
368 if (err < 0)
369 return err;
370
371 err = genphy_config_aneg(phydev);
372 if (err < 0)
373 return err;
374
375 if (phydev->autoneg != AUTONEG_ENABLE) {
376 /* A write to speed/duplex bits (that is performed by
377 * genphy_config_aneg() call above) must be followed by
378 * a software reset. Otherwise, the write has no effect.
379 */
380 err = genphy_soft_reset(phydev);
381 if (err < 0)
382 return err;
383 }
384
385 return 0;
386 }
387
388 #ifdef CONFIG_OF_MDIO
389 /* Set and/or override some configuration registers based on the
390 * marvell,reg-init property stored in the of_node for the phydev.
391 *
392 * marvell,reg-init = <reg-page reg mask value>,...;
393 *
394 * There may be one or more sets of <reg-page reg mask value>:
395 *
396 * reg-page: which register bank to use.
397 * reg: the register.
398 * mask: if non-zero, ANDed with existing register value.
399 * value: ORed with the masked value and written to the regiser.
400 *
401 */
402 static int marvell_of_reg_init(struct phy_device *phydev)
403 {
404 const __be32 *paddr;
405 int len, i, saved_page, current_page, ret = 0;
406
407 if (!phydev->mdio.dev.of_node)
408 return 0;
409
410 paddr = of_get_property(phydev->mdio.dev.of_node,
411 "marvell,reg-init", &len);
412 if (!paddr || len < (4 * sizeof(*paddr)))
413 return 0;
414
415 saved_page = phy_save_page(phydev);
416 if (saved_page < 0)
417 goto err;
418 current_page = saved_page;
419
420 len /= sizeof(*paddr);
421 for (i = 0; i < len - 3; i += 4) {
422 u16 page = be32_to_cpup(paddr + i);
423 u16 reg = be32_to_cpup(paddr + i + 1);
424 u16 mask = be32_to_cpup(paddr + i + 2);
425 u16 val_bits = be32_to_cpup(paddr + i + 3);
426 int val;
427
428 if (page != current_page) {
429 current_page = page;
430 ret = marvell_write_page(phydev, page);
431 if (ret < 0)
432 goto err;
433 }
434
435 val = 0;
436 if (mask) {
437 val = __phy_read(phydev, reg);
438 if (val < 0) {
439 ret = val;
440 goto err;
441 }
442 val &= mask;
443 }
444 val |= val_bits;
445
446 ret = __phy_write(phydev, reg, val);
447 if (ret < 0)
448 goto err;
449 }
450 err:
451 return phy_restore_page(phydev, saved_page, ret);
452 }
453 #else
454 static int marvell_of_reg_init(struct phy_device *phydev)
455 {
456 return 0;
457 }
458 #endif /* CONFIG_OF_MDIO */
459
460 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
461 {
462 int mscr;
463
464 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
465 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
466 MII_88E1121_PHY_MSCR_TX_DELAY;
467 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
468 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
469 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
470 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
471 else
472 mscr = 0;
473
474 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
475 MII_88E1121_PHY_MSCR_REG,
476 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
477 }
478
479 static int m88e1121_config_aneg(struct phy_device *phydev)
480 {
481 int err = 0;
482
483 if (phy_interface_is_rgmii(phydev)) {
484 err = m88e1121_config_aneg_rgmii_delays(phydev);
485 if (err < 0)
486 return err;
487 }
488
489 err = genphy_soft_reset(phydev);
490 if (err < 0)
491 return err;
492
493 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
494 if (err < 0)
495 return err;
496
497 return genphy_config_aneg(phydev);
498 }
499
500 static int m88e1318_config_aneg(struct phy_device *phydev)
501 {
502 int err;
503
504 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
505 MII_88E1318S_PHY_MSCR1_REG,
506 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
507 if (err < 0)
508 return err;
509
510 return m88e1121_config_aneg(phydev);
511 }
512
513 /**
514 * ethtool_adv_to_fiber_adv_t
515 * @ethadv: the ethtool advertisement settings
516 *
517 * A small helper function that translates ethtool advertisement
518 * settings to phy autonegotiation advertisements for the
519 * MII_ADV register for fiber link.
520 */
521 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
522 {
523 u32 result = 0;
524
525 if (ethadv & ADVERTISED_1000baseT_Half)
526 result |= ADVERTISE_FIBER_1000HALF;
527 if (ethadv & ADVERTISED_1000baseT_Full)
528 result |= ADVERTISE_FIBER_1000FULL;
529
530 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
531 result |= LPA_PAUSE_ASYM_FIBER;
532 else if (ethadv & ADVERTISE_PAUSE_CAP)
533 result |= (ADVERTISE_PAUSE_FIBER
534 & (~ADVERTISE_PAUSE_ASYM_FIBER));
535
536 return result;
537 }
538
539 /**
540 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
541 * @phydev: target phy_device struct
542 *
543 * Description: If auto-negotiation is enabled, we configure the
544 * advertising, and then restart auto-negotiation. If it is not
545 * enabled, then we write the BMCR. Adapted for fiber link in
546 * some Marvell's devices.
547 */
548 static int marvell_config_aneg_fiber(struct phy_device *phydev)
549 {
550 int changed = 0;
551 int err;
552 int adv, oldadv;
553 u32 advertise;
554
555 if (phydev->autoneg != AUTONEG_ENABLE)
556 return genphy_setup_forced(phydev);
557
558 /* Only allow advertising what this PHY supports */
559 phydev->advertising &= phydev->supported;
560 advertise = phydev->advertising;
561
562 /* Setup fiber advertisement */
563 adv = phy_read(phydev, MII_ADVERTISE);
564 if (adv < 0)
565 return adv;
566
567 oldadv = adv;
568 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
569 | LPA_PAUSE_FIBER);
570 adv |= ethtool_adv_to_fiber_adv_t(advertise);
571
572 if (adv != oldadv) {
573 err = phy_write(phydev, MII_ADVERTISE, adv);
574 if (err < 0)
575 return err;
576
577 changed = 1;
578 }
579
580 if (changed == 0) {
581 /* Advertisement hasn't changed, but maybe aneg was never on to
582 * begin with? Or maybe phy was isolated?
583 */
584 int ctl = phy_read(phydev, MII_BMCR);
585
586 if (ctl < 0)
587 return ctl;
588
589 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
590 changed = 1; /* do restart aneg */
591 }
592
593 /* Only restart aneg if we are advertising something different
594 * than we were before.
595 */
596 if (changed > 0)
597 changed = genphy_restart_aneg(phydev);
598
599 return changed;
600 }
601
602 static int m88e1510_config_aneg(struct phy_device *phydev)
603 {
604 int err;
605
606 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
607 if (err < 0)
608 goto error;
609
610 /* Configure the copper link first */
611 err = m88e1318_config_aneg(phydev);
612 if (err < 0)
613 goto error;
614
615 /* Do not touch the fiber page if we're in copper->sgmii mode */
616 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
617 return 0;
618
619 /* Then the fiber link */
620 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
621 if (err < 0)
622 goto error;
623
624 err = marvell_config_aneg_fiber(phydev);
625 if (err < 0)
626 goto error;
627
628 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
629
630 error:
631 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
632 return err;
633 }
634
635 static int marvell_config_init(struct phy_device *phydev)
636 {
637 /* Set registers from marvell,reg-init DT property */
638 return marvell_of_reg_init(phydev);
639 }
640
641 static int m88e1116r_config_init(struct phy_device *phydev)
642 {
643 int err;
644
645 err = genphy_soft_reset(phydev);
646 if (err < 0)
647 return err;
648
649 mdelay(500);
650
651 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
652 if (err < 0)
653 return err;
654
655 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
656 if (err < 0)
657 return err;
658
659 err = marvell_set_downshift(phydev, true, 8);
660 if (err < 0)
661 return err;
662
663 if (phy_interface_is_rgmii(phydev)) {
664 err = m88e1121_config_aneg_rgmii_delays(phydev);
665 if (err < 0)
666 return err;
667 }
668
669 err = genphy_soft_reset(phydev);
670 if (err < 0)
671 return err;
672
673 return marvell_config_init(phydev);
674 }
675
676 static int m88e3016_config_init(struct phy_device *phydev)
677 {
678 int ret;
679
680 /* Enable Scrambler and Auto-Crossover */
681 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
682 MII_88E3016_DISABLE_SCRAMBLER,
683 MII_88E3016_AUTO_MDIX_CROSSOVER);
684 if (ret < 0)
685 return ret;
686
687 return marvell_config_init(phydev);
688 }
689
690 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
691 u16 mode,
692 int fibre_copper_auto)
693 {
694 if (fibre_copper_auto)
695 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
696
697 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
698 MII_M1111_HWCFG_MODE_MASK |
699 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
700 MII_M1111_HWCFG_FIBER_COPPER_RES,
701 mode);
702 }
703
704 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
705 {
706 int delay;
707
708 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
709 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
710 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
711 delay = MII_M1111_RGMII_RX_DELAY;
712 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
713 delay = MII_M1111_RGMII_TX_DELAY;
714 } else {
715 delay = 0;
716 }
717
718 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
719 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
720 delay);
721 }
722
723 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
724 {
725 int temp;
726 int err;
727
728 err = m88e1111_config_init_rgmii_delays(phydev);
729 if (err < 0)
730 return err;
731
732 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
733 if (temp < 0)
734 return temp;
735
736 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
737
738 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
739 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
740 else
741 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
742
743 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
744 }
745
746 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
747 {
748 int err;
749
750 err = m88e1111_config_init_hwcfg_mode(
751 phydev,
752 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
753 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
754 if (err < 0)
755 return err;
756
757 /* make sure copper is selected */
758 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
759 }
760
761 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
762 {
763 int err;
764
765 err = m88e1111_config_init_rgmii_delays(phydev);
766 if (err < 0)
767 return err;
768
769 err = m88e1111_config_init_hwcfg_mode(
770 phydev,
771 MII_M1111_HWCFG_MODE_RTBI,
772 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
773 if (err < 0)
774 return err;
775
776 /* soft reset */
777 err = genphy_soft_reset(phydev);
778 if (err < 0)
779 return err;
780
781 return m88e1111_config_init_hwcfg_mode(
782 phydev,
783 MII_M1111_HWCFG_MODE_RTBI,
784 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
785 }
786
787 static int m88e1111_config_init(struct phy_device *phydev)
788 {
789 int err;
790
791 if (phy_interface_is_rgmii(phydev)) {
792 err = m88e1111_config_init_rgmii(phydev);
793 if (err < 0)
794 return err;
795 }
796
797 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
798 err = m88e1111_config_init_sgmii(phydev);
799 if (err < 0)
800 return err;
801 }
802
803 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
804 err = m88e1111_config_init_rtbi(phydev);
805 if (err < 0)
806 return err;
807 }
808
809 err = marvell_of_reg_init(phydev);
810 if (err < 0)
811 return err;
812
813 return genphy_soft_reset(phydev);
814 }
815
816 static int m88e1121_config_init(struct phy_device *phydev)
817 {
818 int err;
819
820 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
821 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
822 MII_88E1121_PHY_LED_CTRL,
823 MII_88E1121_PHY_LED_DEF);
824 if (err < 0)
825 return err;
826
827 /* Set marvell,reg-init configuration from device tree */
828 return marvell_config_init(phydev);
829 }
830
831 static int m88e1510_config_init(struct phy_device *phydev)
832 {
833 int err;
834
835 /* SGMII-to-Copper mode initialization */
836 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
837 u32 pause;
838
839 /* Select page 18 */
840 err = marvell_set_page(phydev, 18);
841 if (err < 0)
842 return err;
843
844 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
845 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
846 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
847 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
848 if (err < 0)
849 return err;
850
851 /* PHY reset is necessary after changing MODE[2:0] */
852 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
853 MII_88E1510_GEN_CTRL_REG_1_RESET);
854 if (err < 0)
855 return err;
856
857 /* Reset page selection */
858 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
859 if (err < 0)
860 return err;
861
862 /* There appears to be a bug in the 88e1512 when used in
863 * SGMII to copper mode, where the AN advertisment register
864 * clears the pause bits each time a negotiation occurs.
865 * This means we can never be truely sure what was advertised,
866 * so disable Pause support.
867 */
868 pause = SUPPORTED_Pause | SUPPORTED_Asym_Pause;
869 phydev->supported &= ~pause;
870 phydev->advertising &= ~pause;
871 }
872
873 return m88e1121_config_init(phydev);
874 }
875
876 static int m88e1118_config_aneg(struct phy_device *phydev)
877 {
878 int err;
879
880 err = genphy_soft_reset(phydev);
881 if (err < 0)
882 return err;
883
884 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
885 if (err < 0)
886 return err;
887
888 err = genphy_config_aneg(phydev);
889 return 0;
890 }
891
892 static int m88e1118_config_init(struct phy_device *phydev)
893 {
894 int err;
895
896 /* Change address */
897 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
898 if (err < 0)
899 return err;
900
901 /* Enable 1000 Mbit */
902 err = phy_write(phydev, 0x15, 0x1070);
903 if (err < 0)
904 return err;
905
906 /* Change address */
907 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
908 if (err < 0)
909 return err;
910
911 /* Adjust LED Control */
912 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
913 err = phy_write(phydev, 0x10, 0x1100);
914 else
915 err = phy_write(phydev, 0x10, 0x021e);
916 if (err < 0)
917 return err;
918
919 err = marvell_of_reg_init(phydev);
920 if (err < 0)
921 return err;
922
923 /* Reset address */
924 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
925 if (err < 0)
926 return err;
927
928 return genphy_soft_reset(phydev);
929 }
930
931 static int m88e1149_config_init(struct phy_device *phydev)
932 {
933 int err;
934
935 /* Change address */
936 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
937 if (err < 0)
938 return err;
939
940 /* Enable 1000 Mbit */
941 err = phy_write(phydev, 0x15, 0x1048);
942 if (err < 0)
943 return err;
944
945 err = marvell_of_reg_init(phydev);
946 if (err < 0)
947 return err;
948
949 /* Reset address */
950 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
951 if (err < 0)
952 return err;
953
954 return genphy_soft_reset(phydev);
955 }
956
957 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
958 {
959 int err;
960
961 err = m88e1111_config_init_rgmii_delays(phydev);
962 if (err < 0)
963 return err;
964
965 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
966 err = phy_write(phydev, 0x1d, 0x0012);
967 if (err < 0)
968 return err;
969
970 err = phy_modify(phydev, 0x1e, 0x0fc0,
971 2 << 9 | /* 36 ohm */
972 2 << 6); /* 39 ohm */
973 if (err < 0)
974 return err;
975
976 err = phy_write(phydev, 0x1d, 0x3);
977 if (err < 0)
978 return err;
979
980 err = phy_write(phydev, 0x1e, 0x8000);
981 }
982 return err;
983 }
984
985 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
986 {
987 return m88e1111_config_init_hwcfg_mode(
988 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
989 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
990 }
991
992 static int m88e1145_config_init(struct phy_device *phydev)
993 {
994 int err;
995
996 /* Take care of errata E0 & E1 */
997 err = phy_write(phydev, 0x1d, 0x001b);
998 if (err < 0)
999 return err;
1000
1001 err = phy_write(phydev, 0x1e, 0x418f);
1002 if (err < 0)
1003 return err;
1004
1005 err = phy_write(phydev, 0x1d, 0x0016);
1006 if (err < 0)
1007 return err;
1008
1009 err = phy_write(phydev, 0x1e, 0xa2da);
1010 if (err < 0)
1011 return err;
1012
1013 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1014 err = m88e1145_config_init_rgmii(phydev);
1015 if (err < 0)
1016 return err;
1017 }
1018
1019 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1020 err = m88e1145_config_init_sgmii(phydev);
1021 if (err < 0)
1022 return err;
1023 }
1024
1025 err = marvell_of_reg_init(phydev);
1026 if (err < 0)
1027 return err;
1028
1029 return 0;
1030 }
1031
1032 /**
1033 * fiber_lpa_to_ethtool_lpa_t
1034 * @lpa: value of the MII_LPA register for fiber link
1035 *
1036 * A small helper function that translates MII_LPA
1037 * bits to ethtool LP advertisement settings.
1038 */
1039 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1040 {
1041 u32 result = 0;
1042
1043 if (lpa & LPA_FIBER_1000HALF)
1044 result |= ADVERTISED_1000baseT_Half;
1045 if (lpa & LPA_FIBER_1000FULL)
1046 result |= ADVERTISED_1000baseT_Full;
1047
1048 return result;
1049 }
1050
1051 /**
1052 * marvell_update_link - update link status in real time in @phydev
1053 * @phydev: target phy_device struct
1054 *
1055 * Description: Update the value in phydev->link to reflect the
1056 * current link value.
1057 */
1058 static int marvell_update_link(struct phy_device *phydev, int fiber)
1059 {
1060 int status;
1061
1062 /* Use the generic register for copper link, or specific
1063 * register for fiber case
1064 */
1065 if (fiber) {
1066 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1067 if (status < 0)
1068 return status;
1069
1070 if ((status & REGISTER_LINK_STATUS) == 0)
1071 phydev->link = 0;
1072 else
1073 phydev->link = 1;
1074 } else {
1075 return genphy_update_link(phydev);
1076 }
1077
1078 return 0;
1079 }
1080
1081 static int marvell_read_status_page_an(struct phy_device *phydev,
1082 int fiber)
1083 {
1084 int status;
1085 int lpa;
1086 int lpagb;
1087
1088 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1089 if (status < 0)
1090 return status;
1091
1092 lpa = phy_read(phydev, MII_LPA);
1093 if (lpa < 0)
1094 return lpa;
1095
1096 lpagb = phy_read(phydev, MII_STAT1000);
1097 if (lpagb < 0)
1098 return lpagb;
1099
1100 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1101 phydev->duplex = DUPLEX_FULL;
1102 else
1103 phydev->duplex = DUPLEX_HALF;
1104
1105 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1106 phydev->pause = 0;
1107 phydev->asym_pause = 0;
1108
1109 switch (status) {
1110 case MII_M1011_PHY_STATUS_1000:
1111 phydev->speed = SPEED_1000;
1112 break;
1113
1114 case MII_M1011_PHY_STATUS_100:
1115 phydev->speed = SPEED_100;
1116 break;
1117
1118 default:
1119 phydev->speed = SPEED_10;
1120 break;
1121 }
1122
1123 if (!fiber) {
1124 phydev->lp_advertising =
1125 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1126 mii_lpa_to_ethtool_lpa_t(lpa);
1127
1128 if (phydev->duplex == DUPLEX_FULL) {
1129 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1130 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1131 }
1132 } else {
1133 /* The fiber link is only 1000M capable */
1134 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1135
1136 if (phydev->duplex == DUPLEX_FULL) {
1137 if (!(lpa & LPA_PAUSE_FIBER)) {
1138 phydev->pause = 0;
1139 phydev->asym_pause = 0;
1140 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1141 phydev->pause = 1;
1142 phydev->asym_pause = 1;
1143 } else {
1144 phydev->pause = 1;
1145 phydev->asym_pause = 0;
1146 }
1147 }
1148 }
1149 return 0;
1150 }
1151
1152 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1153 {
1154 int bmcr = phy_read(phydev, MII_BMCR);
1155
1156 if (bmcr < 0)
1157 return bmcr;
1158
1159 if (bmcr & BMCR_FULLDPLX)
1160 phydev->duplex = DUPLEX_FULL;
1161 else
1162 phydev->duplex = DUPLEX_HALF;
1163
1164 if (bmcr & BMCR_SPEED1000)
1165 phydev->speed = SPEED_1000;
1166 else if (bmcr & BMCR_SPEED100)
1167 phydev->speed = SPEED_100;
1168 else
1169 phydev->speed = SPEED_10;
1170
1171 phydev->pause = 0;
1172 phydev->asym_pause = 0;
1173 phydev->lp_advertising = 0;
1174
1175 return 0;
1176 }
1177
1178 /* marvell_read_status_page
1179 *
1180 * Description:
1181 * Check the link, then figure out the current state
1182 * by comparing what we advertise with what the link partner
1183 * advertises. Start by checking the gigabit possibilities,
1184 * then move on to 10/100.
1185 */
1186 static int marvell_read_status_page(struct phy_device *phydev, int page)
1187 {
1188 int fiber;
1189 int err;
1190
1191 /* Detect and update the link, but return if there
1192 * was an error
1193 */
1194 if (page == MII_MARVELL_FIBER_PAGE)
1195 fiber = 1;
1196 else
1197 fiber = 0;
1198
1199 err = marvell_update_link(phydev, fiber);
1200 if (err)
1201 return err;
1202
1203 if (phydev->autoneg == AUTONEG_ENABLE)
1204 err = marvell_read_status_page_an(phydev, fiber);
1205 else
1206 err = marvell_read_status_page_fixed(phydev);
1207
1208 return err;
1209 }
1210
1211 /* marvell_read_status
1212 *
1213 * Some Marvell's phys have two modes: fiber and copper.
1214 * Both need status checked.
1215 * Description:
1216 * First, check the fiber link and status.
1217 * If the fiber link is down, check the copper link and status which
1218 * will be the default value if both link are down.
1219 */
1220 static int marvell_read_status(struct phy_device *phydev)
1221 {
1222 int err;
1223
1224 /* Check the fiber mode first */
1225 if (phydev->supported & SUPPORTED_FIBRE &&
1226 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1227 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1228 if (err < 0)
1229 goto error;
1230
1231 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1232 if (err < 0)
1233 goto error;
1234
1235 /* If the fiber link is up, it is the selected and
1236 * used link. In this case, we need to stay in the
1237 * fiber page. Please to be careful about that, avoid
1238 * to restore Copper page in other functions which
1239 * could break the behaviour for some fiber phy like
1240 * 88E1512.
1241 */
1242 if (phydev->link)
1243 return 0;
1244
1245 /* If fiber link is down, check and save copper mode state */
1246 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1247 if (err < 0)
1248 goto error;
1249 }
1250
1251 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1252
1253 error:
1254 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1255 return err;
1256 }
1257
1258 /* marvell_suspend
1259 *
1260 * Some Marvell's phys have two modes: fiber and copper.
1261 * Both need to be suspended
1262 */
1263 static int marvell_suspend(struct phy_device *phydev)
1264 {
1265 int err;
1266
1267 /* Suspend the fiber mode first */
1268 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1269 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1270 if (err < 0)
1271 goto error;
1272
1273 /* With the page set, use the generic suspend */
1274 err = genphy_suspend(phydev);
1275 if (err < 0)
1276 goto error;
1277
1278 /* Then, the copper link */
1279 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1280 if (err < 0)
1281 goto error;
1282 }
1283
1284 /* With the page set, use the generic suspend */
1285 return genphy_suspend(phydev);
1286
1287 error:
1288 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1289 return err;
1290 }
1291
1292 /* marvell_resume
1293 *
1294 * Some Marvell's phys have two modes: fiber and copper.
1295 * Both need to be resumed
1296 */
1297 static int marvell_resume(struct phy_device *phydev)
1298 {
1299 int err;
1300
1301 /* Resume the fiber mode first */
1302 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1303 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1304 if (err < 0)
1305 goto error;
1306
1307 /* With the page set, use the generic resume */
1308 err = genphy_resume(phydev);
1309 if (err < 0)
1310 goto error;
1311
1312 /* Then, the copper link */
1313 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1314 if (err < 0)
1315 goto error;
1316 }
1317
1318 /* With the page set, use the generic resume */
1319 return genphy_resume(phydev);
1320
1321 error:
1322 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1323 return err;
1324 }
1325
1326 static int marvell_aneg_done(struct phy_device *phydev)
1327 {
1328 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1329
1330 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1331 }
1332
1333 static int m88e1121_did_interrupt(struct phy_device *phydev)
1334 {
1335 int imask;
1336
1337 imask = phy_read(phydev, MII_M1011_IEVENT);
1338
1339 if (imask & MII_M1011_IMASK_INIT)
1340 return 1;
1341
1342 return 0;
1343 }
1344
1345 static void m88e1318_get_wol(struct phy_device *phydev,
1346 struct ethtool_wolinfo *wol)
1347 {
1348 int oldpage, ret = 0;
1349
1350 wol->supported = WAKE_MAGIC;
1351 wol->wolopts = 0;
1352
1353 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1354 if (oldpage < 0)
1355 goto error;
1356
1357 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1358 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1359 wol->wolopts |= WAKE_MAGIC;
1360
1361 error:
1362 phy_restore_page(phydev, oldpage, ret);
1363 }
1364
1365 static int m88e1318_set_wol(struct phy_device *phydev,
1366 struct ethtool_wolinfo *wol)
1367 {
1368 int err = 0, oldpage;
1369
1370 oldpage = phy_save_page(phydev);
1371 if (oldpage < 0)
1372 goto error;
1373
1374 if (wol->wolopts & WAKE_MAGIC) {
1375 /* Explicitly switch to page 0x00, just to be sure */
1376 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1377 if (err < 0)
1378 goto error;
1379
1380 /* Enable the WOL interrupt */
1381 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1382 MII_88E1318S_PHY_CSIER_WOL_EIE);
1383 if (err < 0)
1384 goto error;
1385
1386 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1387 if (err < 0)
1388 goto error;
1389
1390 /* Setup LED[2] as interrupt pin (active low) */
1391 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1392 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1393 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1394 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1395 if (err < 0)
1396 goto error;
1397
1398 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1399 if (err < 0)
1400 goto error;
1401
1402 /* Store the device address for the magic packet */
1403 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1404 ((phydev->attached_dev->dev_addr[5] << 8) |
1405 phydev->attached_dev->dev_addr[4]));
1406 if (err < 0)
1407 goto error;
1408 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1409 ((phydev->attached_dev->dev_addr[3] << 8) |
1410 phydev->attached_dev->dev_addr[2]));
1411 if (err < 0)
1412 goto error;
1413 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1414 ((phydev->attached_dev->dev_addr[1] << 8) |
1415 phydev->attached_dev->dev_addr[0]));
1416 if (err < 0)
1417 goto error;
1418
1419 /* Clear WOL status and enable magic packet matching */
1420 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1421 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1422 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1423 if (err < 0)
1424 goto error;
1425 } else {
1426 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1427 if (err < 0)
1428 goto error;
1429
1430 /* Clear WOL status and disable magic packet matching */
1431 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1432 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1433 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1434 if (err < 0)
1435 goto error;
1436 }
1437
1438 error:
1439 return phy_restore_page(phydev, oldpage, err);
1440 }
1441
1442 static int marvell_get_sset_count(struct phy_device *phydev)
1443 {
1444 if (phydev->supported & SUPPORTED_FIBRE)
1445 return ARRAY_SIZE(marvell_hw_stats);
1446 else
1447 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1448 }
1449
1450 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1451 {
1452 int i;
1453
1454 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1455 memcpy(data + i * ETH_GSTRING_LEN,
1456 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1457 }
1458 }
1459
1460 #ifndef UINT64_MAX
1461 #define UINT64_MAX (u64)(~((u64)0))
1462 #endif
1463 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1464 {
1465 struct marvell_hw_stat stat = marvell_hw_stats[i];
1466 struct marvell_priv *priv = phydev->priv;
1467 int val;
1468 u64 ret;
1469
1470 val = phy_read_paged(phydev, stat.page, stat.reg);
1471 if (val < 0) {
1472 ret = UINT64_MAX;
1473 } else {
1474 val = val & ((1 << stat.bits) - 1);
1475 priv->stats[i] += val;
1476 ret = priv->stats[i];
1477 }
1478
1479 return ret;
1480 }
1481
1482 static void marvell_get_stats(struct phy_device *phydev,
1483 struct ethtool_stats *stats, u64 *data)
1484 {
1485 int i;
1486
1487 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1488 data[i] = marvell_get_stat(phydev, i);
1489 }
1490
1491 #ifdef CONFIG_HWMON
1492 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1493 {
1494 int oldpage;
1495 int ret = 0;
1496 int val;
1497
1498 *temp = 0;
1499
1500 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1501 if (oldpage < 0)
1502 goto error;
1503
1504 /* Enable temperature sensor */
1505 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1506 if (ret < 0)
1507 goto error;
1508
1509 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1510 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1511 if (ret < 0)
1512 goto error;
1513
1514 /* Wait for temperature to stabilize */
1515 usleep_range(10000, 12000);
1516
1517 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1518 if (val < 0) {
1519 ret = val;
1520 goto error;
1521 }
1522
1523 /* Disable temperature sensor */
1524 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1525 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1526 if (ret < 0)
1527 goto error;
1528
1529 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1530
1531 error:
1532 return phy_restore_page(phydev, oldpage, ret);
1533 }
1534
1535 static int m88e1121_hwmon_read(struct device *dev,
1536 enum hwmon_sensor_types type,
1537 u32 attr, int channel, long *temp)
1538 {
1539 struct phy_device *phydev = dev_get_drvdata(dev);
1540 int err;
1541
1542 switch (attr) {
1543 case hwmon_temp_input:
1544 err = m88e1121_get_temp(phydev, temp);
1545 break;
1546 default:
1547 return -EOPNOTSUPP;
1548 }
1549
1550 return err;
1551 }
1552
1553 static umode_t m88e1121_hwmon_is_visible(const void *data,
1554 enum hwmon_sensor_types type,
1555 u32 attr, int channel)
1556 {
1557 if (type != hwmon_temp)
1558 return 0;
1559
1560 switch (attr) {
1561 case hwmon_temp_input:
1562 return 0444;
1563 default:
1564 return 0;
1565 }
1566 }
1567
1568 static u32 m88e1121_hwmon_chip_config[] = {
1569 HWMON_C_REGISTER_TZ,
1570 0
1571 };
1572
1573 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1574 .type = hwmon_chip,
1575 .config = m88e1121_hwmon_chip_config,
1576 };
1577
1578 static u32 m88e1121_hwmon_temp_config[] = {
1579 HWMON_T_INPUT,
1580 0
1581 };
1582
1583 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1584 .type = hwmon_temp,
1585 .config = m88e1121_hwmon_temp_config,
1586 };
1587
1588 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1589 &m88e1121_hwmon_chip,
1590 &m88e1121_hwmon_temp,
1591 NULL
1592 };
1593
1594 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1595 .is_visible = m88e1121_hwmon_is_visible,
1596 .read = m88e1121_hwmon_read,
1597 };
1598
1599 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1600 .ops = &m88e1121_hwmon_hwmon_ops,
1601 .info = m88e1121_hwmon_info,
1602 };
1603
1604 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1605 {
1606 int ret;
1607
1608 *temp = 0;
1609
1610 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1611 MII_88E1510_TEMP_SENSOR);
1612 if (ret < 0)
1613 return ret;
1614
1615 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1616
1617 return 0;
1618 }
1619
1620 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1621 {
1622 int ret;
1623
1624 *temp = 0;
1625
1626 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1627 MII_88E1121_MISC_TEST);
1628 if (ret < 0)
1629 return ret;
1630
1631 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1632 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1633 /* convert to mC */
1634 *temp *= 1000;
1635
1636 return 0;
1637 }
1638
1639 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1640 {
1641 temp = temp / 1000;
1642 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1643
1644 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1645 MII_88E1121_MISC_TEST,
1646 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1647 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1648 }
1649
1650 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1651 {
1652 int ret;
1653
1654 *alarm = false;
1655
1656 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1657 MII_88E1121_MISC_TEST);
1658 if (ret < 0)
1659 return ret;
1660
1661 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1662
1663 return 0;
1664 }
1665
1666 static int m88e1510_hwmon_read(struct device *dev,
1667 enum hwmon_sensor_types type,
1668 u32 attr, int channel, long *temp)
1669 {
1670 struct phy_device *phydev = dev_get_drvdata(dev);
1671 int err;
1672
1673 switch (attr) {
1674 case hwmon_temp_input:
1675 err = m88e1510_get_temp(phydev, temp);
1676 break;
1677 case hwmon_temp_crit:
1678 err = m88e1510_get_temp_critical(phydev, temp);
1679 break;
1680 case hwmon_temp_max_alarm:
1681 err = m88e1510_get_temp_alarm(phydev, temp);
1682 break;
1683 default:
1684 return -EOPNOTSUPP;
1685 }
1686
1687 return err;
1688 }
1689
1690 static int m88e1510_hwmon_write(struct device *dev,
1691 enum hwmon_sensor_types type,
1692 u32 attr, int channel, long temp)
1693 {
1694 struct phy_device *phydev = dev_get_drvdata(dev);
1695 int err;
1696
1697 switch (attr) {
1698 case hwmon_temp_crit:
1699 err = m88e1510_set_temp_critical(phydev, temp);
1700 break;
1701 default:
1702 return -EOPNOTSUPP;
1703 }
1704 return err;
1705 }
1706
1707 static umode_t m88e1510_hwmon_is_visible(const void *data,
1708 enum hwmon_sensor_types type,
1709 u32 attr, int channel)
1710 {
1711 if (type != hwmon_temp)
1712 return 0;
1713
1714 switch (attr) {
1715 case hwmon_temp_input:
1716 case hwmon_temp_max_alarm:
1717 return 0444;
1718 case hwmon_temp_crit:
1719 return 0644;
1720 default:
1721 return 0;
1722 }
1723 }
1724
1725 static u32 m88e1510_hwmon_temp_config[] = {
1726 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1727 0
1728 };
1729
1730 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1731 .type = hwmon_temp,
1732 .config = m88e1510_hwmon_temp_config,
1733 };
1734
1735 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1736 &m88e1121_hwmon_chip,
1737 &m88e1510_hwmon_temp,
1738 NULL
1739 };
1740
1741 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1742 .is_visible = m88e1510_hwmon_is_visible,
1743 .read = m88e1510_hwmon_read,
1744 .write = m88e1510_hwmon_write,
1745 };
1746
1747 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1748 .ops = &m88e1510_hwmon_hwmon_ops,
1749 .info = m88e1510_hwmon_info,
1750 };
1751
1752 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1753 {
1754 int sum = 0;
1755 int oldpage;
1756 int ret = 0;
1757 int i;
1758
1759 *temp = 0;
1760
1761 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1762 if (oldpage < 0)
1763 goto error;
1764
1765 /* Enable temperature sensor */
1766 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1767 if (ret < 0)
1768 goto error;
1769
1770 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1771 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1772 MII_88E6390_MISC_TEST_SAMPLE_1S;
1773
1774 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1775 if (ret < 0)
1776 goto error;
1777
1778 /* Wait for temperature to stabilize */
1779 usleep_range(10000, 12000);
1780
1781 /* Reading the temperature sense has an errata. You need to read
1782 * a number of times and take an average.
1783 */
1784 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1785 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1786 if (ret < 0)
1787 goto error;
1788 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1789 }
1790
1791 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1792 *temp = (sum - 75) * 1000;
1793
1794 /* Disable temperature sensor */
1795 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1796 if (ret < 0)
1797 goto error;
1798
1799 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1800 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1801
1802 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1803
1804 error:
1805 phy_restore_page(phydev, oldpage, ret);
1806
1807 return ret;
1808 }
1809
1810 static int m88e6390_hwmon_read(struct device *dev,
1811 enum hwmon_sensor_types type,
1812 u32 attr, int channel, long *temp)
1813 {
1814 struct phy_device *phydev = dev_get_drvdata(dev);
1815 int err;
1816
1817 switch (attr) {
1818 case hwmon_temp_input:
1819 err = m88e6390_get_temp(phydev, temp);
1820 break;
1821 default:
1822 return -EOPNOTSUPP;
1823 }
1824
1825 return err;
1826 }
1827
1828 static umode_t m88e6390_hwmon_is_visible(const void *data,
1829 enum hwmon_sensor_types type,
1830 u32 attr, int channel)
1831 {
1832 if (type != hwmon_temp)
1833 return 0;
1834
1835 switch (attr) {
1836 case hwmon_temp_input:
1837 return 0444;
1838 default:
1839 return 0;
1840 }
1841 }
1842
1843 static u32 m88e6390_hwmon_temp_config[] = {
1844 HWMON_T_INPUT,
1845 0
1846 };
1847
1848 static const struct hwmon_channel_info m88e6390_hwmon_temp = {
1849 .type = hwmon_temp,
1850 .config = m88e6390_hwmon_temp_config,
1851 };
1852
1853 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
1854 &m88e1121_hwmon_chip,
1855 &m88e6390_hwmon_temp,
1856 NULL
1857 };
1858
1859 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
1860 .is_visible = m88e6390_hwmon_is_visible,
1861 .read = m88e6390_hwmon_read,
1862 };
1863
1864 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
1865 .ops = &m88e6390_hwmon_hwmon_ops,
1866 .info = m88e6390_hwmon_info,
1867 };
1868
1869 static int marvell_hwmon_name(struct phy_device *phydev)
1870 {
1871 struct marvell_priv *priv = phydev->priv;
1872 struct device *dev = &phydev->mdio.dev;
1873 const char *devname = dev_name(dev);
1874 size_t len = strlen(devname);
1875 int i, j;
1876
1877 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1878 if (!priv->hwmon_name)
1879 return -ENOMEM;
1880
1881 for (i = j = 0; i < len && devname[i]; i++) {
1882 if (isalnum(devname[i]))
1883 priv->hwmon_name[j++] = devname[i];
1884 }
1885
1886 return 0;
1887 }
1888
1889 static int marvell_hwmon_probe(struct phy_device *phydev,
1890 const struct hwmon_chip_info *chip)
1891 {
1892 struct marvell_priv *priv = phydev->priv;
1893 struct device *dev = &phydev->mdio.dev;
1894 int err;
1895
1896 err = marvell_hwmon_name(phydev);
1897 if (err)
1898 return err;
1899
1900 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1901 dev, priv->hwmon_name, phydev, chip, NULL);
1902
1903 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1904 }
1905
1906 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1907 {
1908 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1909 }
1910
1911 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1912 {
1913 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1914 }
1915
1916 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1917 {
1918 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
1919 }
1920 #else
1921 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1922 {
1923 return 0;
1924 }
1925
1926 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1927 {
1928 return 0;
1929 }
1930
1931 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1932 {
1933 return 0;
1934 }
1935 #endif
1936
1937 static int marvell_probe(struct phy_device *phydev)
1938 {
1939 struct marvell_priv *priv;
1940
1941 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1942 if (!priv)
1943 return -ENOMEM;
1944
1945 phydev->priv = priv;
1946
1947 return 0;
1948 }
1949
1950 static int m88e1121_probe(struct phy_device *phydev)
1951 {
1952 int err;
1953
1954 err = marvell_probe(phydev);
1955 if (err)
1956 return err;
1957
1958 return m88e1121_hwmon_probe(phydev);
1959 }
1960
1961 static int m88e1510_probe(struct phy_device *phydev)
1962 {
1963 int err;
1964
1965 err = marvell_probe(phydev);
1966 if (err)
1967 return err;
1968
1969 return m88e1510_hwmon_probe(phydev);
1970 }
1971
1972 static int m88e6390_probe(struct phy_device *phydev)
1973 {
1974 int err;
1975
1976 err = marvell_probe(phydev);
1977 if (err)
1978 return err;
1979
1980 return m88e6390_hwmon_probe(phydev);
1981 }
1982
1983 static struct phy_driver marvell_drivers[] = {
1984 {
1985 .phy_id = MARVELL_PHY_ID_88E1101,
1986 .phy_id_mask = MARVELL_PHY_ID_MASK,
1987 .name = "Marvell 88E1101",
1988 .features = PHY_GBIT_FEATURES,
1989 .flags = PHY_HAS_INTERRUPT,
1990 .probe = marvell_probe,
1991 .config_init = &marvell_config_init,
1992 .config_aneg = &m88e1101_config_aneg,
1993 .ack_interrupt = &marvell_ack_interrupt,
1994 .config_intr = &marvell_config_intr,
1995 .resume = &genphy_resume,
1996 .suspend = &genphy_suspend,
1997 .read_page = marvell_read_page,
1998 .write_page = marvell_write_page,
1999 .get_sset_count = marvell_get_sset_count,
2000 .get_strings = marvell_get_strings,
2001 .get_stats = marvell_get_stats,
2002 },
2003 {
2004 .phy_id = MARVELL_PHY_ID_88E1112,
2005 .phy_id_mask = MARVELL_PHY_ID_MASK,
2006 .name = "Marvell 88E1112",
2007 .features = PHY_GBIT_FEATURES,
2008 .flags = PHY_HAS_INTERRUPT,
2009 .probe = marvell_probe,
2010 .config_init = &m88e1111_config_init,
2011 .config_aneg = &marvell_config_aneg,
2012 .ack_interrupt = &marvell_ack_interrupt,
2013 .config_intr = &marvell_config_intr,
2014 .resume = &genphy_resume,
2015 .suspend = &genphy_suspend,
2016 .read_page = marvell_read_page,
2017 .write_page = marvell_write_page,
2018 .get_sset_count = marvell_get_sset_count,
2019 .get_strings = marvell_get_strings,
2020 .get_stats = marvell_get_stats,
2021 },
2022 {
2023 .phy_id = MARVELL_PHY_ID_88E1111,
2024 .phy_id_mask = MARVELL_PHY_ID_MASK,
2025 .name = "Marvell 88E1111",
2026 .features = PHY_GBIT_FEATURES,
2027 .flags = PHY_HAS_INTERRUPT,
2028 .probe = marvell_probe,
2029 .config_init = &m88e1111_config_init,
2030 .config_aneg = &m88e1111_config_aneg,
2031 .read_status = &marvell_read_status,
2032 .ack_interrupt = &marvell_ack_interrupt,
2033 .config_intr = &marvell_config_intr,
2034 .resume = &genphy_resume,
2035 .suspend = &genphy_suspend,
2036 .read_page = marvell_read_page,
2037 .write_page = marvell_write_page,
2038 .get_sset_count = marvell_get_sset_count,
2039 .get_strings = marvell_get_strings,
2040 .get_stats = marvell_get_stats,
2041 },
2042 {
2043 .phy_id = MARVELL_PHY_ID_88E1118,
2044 .phy_id_mask = MARVELL_PHY_ID_MASK,
2045 .name = "Marvell 88E1118",
2046 .features = PHY_GBIT_FEATURES,
2047 .flags = PHY_HAS_INTERRUPT,
2048 .probe = marvell_probe,
2049 .config_init = &m88e1118_config_init,
2050 .config_aneg = &m88e1118_config_aneg,
2051 .ack_interrupt = &marvell_ack_interrupt,
2052 .config_intr = &marvell_config_intr,
2053 .resume = &genphy_resume,
2054 .suspend = &genphy_suspend,
2055 .read_page = marvell_read_page,
2056 .write_page = marvell_write_page,
2057 .get_sset_count = marvell_get_sset_count,
2058 .get_strings = marvell_get_strings,
2059 .get_stats = marvell_get_stats,
2060 },
2061 {
2062 .phy_id = MARVELL_PHY_ID_88E1121R,
2063 .phy_id_mask = MARVELL_PHY_ID_MASK,
2064 .name = "Marvell 88E1121R",
2065 .features = PHY_GBIT_FEATURES,
2066 .flags = PHY_HAS_INTERRUPT,
2067 .probe = &m88e1121_probe,
2068 .config_init = &m88e1121_config_init,
2069 .config_aneg = &m88e1121_config_aneg,
2070 .read_status = &marvell_read_status,
2071 .ack_interrupt = &marvell_ack_interrupt,
2072 .config_intr = &marvell_config_intr,
2073 .did_interrupt = &m88e1121_did_interrupt,
2074 .resume = &genphy_resume,
2075 .suspend = &genphy_suspend,
2076 .read_page = marvell_read_page,
2077 .write_page = marvell_write_page,
2078 .get_sset_count = marvell_get_sset_count,
2079 .get_strings = marvell_get_strings,
2080 .get_stats = marvell_get_stats,
2081 },
2082 {
2083 .phy_id = MARVELL_PHY_ID_88E1318S,
2084 .phy_id_mask = MARVELL_PHY_ID_MASK,
2085 .name = "Marvell 88E1318S",
2086 .features = PHY_GBIT_FEATURES,
2087 .flags = PHY_HAS_INTERRUPT,
2088 .probe = marvell_probe,
2089 .config_init = &m88e1121_config_init,
2090 .config_aneg = &m88e1318_config_aneg,
2091 .read_status = &marvell_read_status,
2092 .ack_interrupt = &marvell_ack_interrupt,
2093 .config_intr = &marvell_config_intr,
2094 .did_interrupt = &m88e1121_did_interrupt,
2095 .get_wol = &m88e1318_get_wol,
2096 .set_wol = &m88e1318_set_wol,
2097 .resume = &genphy_resume,
2098 .suspend = &genphy_suspend,
2099 .read_page = marvell_read_page,
2100 .write_page = marvell_write_page,
2101 .get_sset_count = marvell_get_sset_count,
2102 .get_strings = marvell_get_strings,
2103 .get_stats = marvell_get_stats,
2104 },
2105 {
2106 .phy_id = MARVELL_PHY_ID_88E1145,
2107 .phy_id_mask = MARVELL_PHY_ID_MASK,
2108 .name = "Marvell 88E1145",
2109 .features = PHY_GBIT_FEATURES,
2110 .flags = PHY_HAS_INTERRUPT,
2111 .probe = marvell_probe,
2112 .config_init = &m88e1145_config_init,
2113 .config_aneg = &m88e1101_config_aneg,
2114 .read_status = &genphy_read_status,
2115 .ack_interrupt = &marvell_ack_interrupt,
2116 .config_intr = &marvell_config_intr,
2117 .resume = &genphy_resume,
2118 .suspend = &genphy_suspend,
2119 .read_page = marvell_read_page,
2120 .write_page = marvell_write_page,
2121 .get_sset_count = marvell_get_sset_count,
2122 .get_strings = marvell_get_strings,
2123 .get_stats = marvell_get_stats,
2124 },
2125 {
2126 .phy_id = MARVELL_PHY_ID_88E1149R,
2127 .phy_id_mask = MARVELL_PHY_ID_MASK,
2128 .name = "Marvell 88E1149R",
2129 .features = PHY_GBIT_FEATURES,
2130 .flags = PHY_HAS_INTERRUPT,
2131 .probe = marvell_probe,
2132 .config_init = &m88e1149_config_init,
2133 .config_aneg = &m88e1118_config_aneg,
2134 .ack_interrupt = &marvell_ack_interrupt,
2135 .config_intr = &marvell_config_intr,
2136 .resume = &genphy_resume,
2137 .suspend = &genphy_suspend,
2138 .read_page = marvell_read_page,
2139 .write_page = marvell_write_page,
2140 .get_sset_count = marvell_get_sset_count,
2141 .get_strings = marvell_get_strings,
2142 .get_stats = marvell_get_stats,
2143 },
2144 {
2145 .phy_id = MARVELL_PHY_ID_88E1240,
2146 .phy_id_mask = MARVELL_PHY_ID_MASK,
2147 .name = "Marvell 88E1240",
2148 .features = PHY_GBIT_FEATURES,
2149 .flags = PHY_HAS_INTERRUPT,
2150 .probe = marvell_probe,
2151 .config_init = &m88e1111_config_init,
2152 .config_aneg = &marvell_config_aneg,
2153 .ack_interrupt = &marvell_ack_interrupt,
2154 .config_intr = &marvell_config_intr,
2155 .resume = &genphy_resume,
2156 .suspend = &genphy_suspend,
2157 .read_page = marvell_read_page,
2158 .write_page = marvell_write_page,
2159 .get_sset_count = marvell_get_sset_count,
2160 .get_strings = marvell_get_strings,
2161 .get_stats = marvell_get_stats,
2162 },
2163 {
2164 .phy_id = MARVELL_PHY_ID_88E1116R,
2165 .phy_id_mask = MARVELL_PHY_ID_MASK,
2166 .name = "Marvell 88E1116R",
2167 .features = PHY_GBIT_FEATURES,
2168 .flags = PHY_HAS_INTERRUPT,
2169 .probe = marvell_probe,
2170 .config_init = &m88e1116r_config_init,
2171 .ack_interrupt = &marvell_ack_interrupt,
2172 .config_intr = &marvell_config_intr,
2173 .resume = &genphy_resume,
2174 .suspend = &genphy_suspend,
2175 .read_page = marvell_read_page,
2176 .write_page = marvell_write_page,
2177 .get_sset_count = marvell_get_sset_count,
2178 .get_strings = marvell_get_strings,
2179 .get_stats = marvell_get_stats,
2180 },
2181 {
2182 .phy_id = MARVELL_PHY_ID_88E1510,
2183 .phy_id_mask = MARVELL_PHY_ID_MASK,
2184 .name = "Marvell 88E1510",
2185 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
2186 .flags = PHY_HAS_INTERRUPT,
2187 .probe = &m88e1510_probe,
2188 .config_init = &m88e1510_config_init,
2189 .config_aneg = &m88e1510_config_aneg,
2190 .read_status = &marvell_read_status,
2191 .ack_interrupt = &marvell_ack_interrupt,
2192 .config_intr = &marvell_config_intr,
2193 .did_interrupt = &m88e1121_did_interrupt,
2194 .get_wol = &m88e1318_get_wol,
2195 .set_wol = &m88e1318_set_wol,
2196 .resume = &marvell_resume,
2197 .suspend = &marvell_suspend,
2198 .read_page = marvell_read_page,
2199 .write_page = marvell_write_page,
2200 .get_sset_count = marvell_get_sset_count,
2201 .get_strings = marvell_get_strings,
2202 .get_stats = marvell_get_stats,
2203 .set_loopback = genphy_loopback,
2204 },
2205 {
2206 .phy_id = MARVELL_PHY_ID_88E1540,
2207 .phy_id_mask = MARVELL_PHY_ID_MASK,
2208 .name = "Marvell 88E1540",
2209 .features = PHY_GBIT_FEATURES,
2210 .flags = PHY_HAS_INTERRUPT,
2211 .probe = m88e1510_probe,
2212 .config_init = &marvell_config_init,
2213 .config_aneg = &m88e1510_config_aneg,
2214 .read_status = &marvell_read_status,
2215 .ack_interrupt = &marvell_ack_interrupt,
2216 .config_intr = &marvell_config_intr,
2217 .did_interrupt = &m88e1121_did_interrupt,
2218 .resume = &genphy_resume,
2219 .suspend = &genphy_suspend,
2220 .read_page = marvell_read_page,
2221 .write_page = marvell_write_page,
2222 .get_sset_count = marvell_get_sset_count,
2223 .get_strings = marvell_get_strings,
2224 .get_stats = marvell_get_stats,
2225 },
2226 {
2227 .phy_id = MARVELL_PHY_ID_88E1545,
2228 .phy_id_mask = MARVELL_PHY_ID_MASK,
2229 .name = "Marvell 88E1545",
2230 .probe = m88e1510_probe,
2231 .features = PHY_GBIT_FEATURES,
2232 .flags = PHY_HAS_INTERRUPT,
2233 .config_init = &marvell_config_init,
2234 .config_aneg = &m88e1510_config_aneg,
2235 .read_status = &marvell_read_status,
2236 .ack_interrupt = &marvell_ack_interrupt,
2237 .config_intr = &marvell_config_intr,
2238 .did_interrupt = &m88e1121_did_interrupt,
2239 .resume = &genphy_resume,
2240 .suspend = &genphy_suspend,
2241 .read_page = marvell_read_page,
2242 .write_page = marvell_write_page,
2243 .get_sset_count = marvell_get_sset_count,
2244 .get_strings = marvell_get_strings,
2245 .get_stats = marvell_get_stats,
2246 },
2247 {
2248 .phy_id = MARVELL_PHY_ID_88E3016,
2249 .phy_id_mask = MARVELL_PHY_ID_MASK,
2250 .name = "Marvell 88E3016",
2251 .features = PHY_BASIC_FEATURES,
2252 .flags = PHY_HAS_INTERRUPT,
2253 .probe = marvell_probe,
2254 .config_init = &m88e3016_config_init,
2255 .aneg_done = &marvell_aneg_done,
2256 .read_status = &marvell_read_status,
2257 .ack_interrupt = &marvell_ack_interrupt,
2258 .config_intr = &marvell_config_intr,
2259 .did_interrupt = &m88e1121_did_interrupt,
2260 .resume = &genphy_resume,
2261 .suspend = &genphy_suspend,
2262 .read_page = marvell_read_page,
2263 .write_page = marvell_write_page,
2264 .get_sset_count = marvell_get_sset_count,
2265 .get_strings = marvell_get_strings,
2266 .get_stats = marvell_get_stats,
2267 },
2268 {
2269 .phy_id = MARVELL_PHY_ID_88E6390,
2270 .phy_id_mask = MARVELL_PHY_ID_MASK,
2271 .name = "Marvell 88E6390",
2272 .features = PHY_GBIT_FEATURES,
2273 .flags = PHY_HAS_INTERRUPT,
2274 .probe = m88e6390_probe,
2275 .config_init = &marvell_config_init,
2276 .config_aneg = &m88e1510_config_aneg,
2277 .read_status = &marvell_read_status,
2278 .ack_interrupt = &marvell_ack_interrupt,
2279 .config_intr = &marvell_config_intr,
2280 .did_interrupt = &m88e1121_did_interrupt,
2281 .resume = &genphy_resume,
2282 .suspend = &genphy_suspend,
2283 .read_page = marvell_read_page,
2284 .write_page = marvell_write_page,
2285 .get_sset_count = marvell_get_sset_count,
2286 .get_strings = marvell_get_strings,
2287 .get_stats = marvell_get_stats,
2288 },
2289 };
2290
2291 module_phy_driver(marvell_drivers);
2292
2293 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2294 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2295 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2296 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2297 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2298 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2299 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2300 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2301 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2302 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2303 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2304 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2305 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2306 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2307 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2308 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2309 { }
2310 };
2311
2312 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
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