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[mirror_ubuntu-hirsute-kernel.git] / drivers / net / phy / marvell.c
1 /*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
31 #include <linux/mm.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
37 #include <linux/of.h>
38
39 #include <linux/io.h>
40 #include <asm/irq.h>
41 #include <linux/uaccess.h>
42
43 #define MII_MARVELL_PHY_PAGE 22
44 #define MII_MARVELL_COPPER_PAGE 0x00
45 #define MII_MARVELL_FIBER_PAGE 0x01
46 #define MII_MARVELL_MSCR_PAGE 0x02
47 #define MII_MARVELL_LED_PAGE 0x03
48 #define MII_MARVELL_MISC_TEST_PAGE 0x06
49 #define MII_MARVELL_WOL_PAGE 0x11
50
51 #define MII_M1011_IEVENT 0x13
52 #define MII_M1011_IEVENT_CLEAR 0x0000
53
54 #define MII_M1011_IMASK 0x12
55 #define MII_M1011_IMASK_INIT 0x6400
56 #define MII_M1011_IMASK_CLEAR 0x0000
57
58 #define MII_M1011_PHY_SCR 0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
65
66 #define MII_M1111_PHY_LED_CONTROL 0x18
67 #define MII_M1111_PHY_LED_DIRECT 0x4100
68 #define MII_M1111_PHY_LED_COMBINE 0x411c
69 #define MII_M1111_PHY_EXT_CR 0x14
70 #define MII_M1111_RGMII_RX_DELAY BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY BIT(1)
72 #define MII_M1111_PHY_EXT_SR 0x1b
73
74 #define MII_M1111_HWCFG_MODE_MASK 0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77 #define MII_M1111_HWCFG_MODE_RTBI 0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
82
83 #define MII_88E1121_PHY_MSCR_REG 21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
87
88 #define MII_88E1121_MISC_TEST 0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
95
96 #define MII_88E1510_TEMP_SENSOR 0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
98
99 #define MII_88E1318S_PHY_MSCR1_REG 16
100 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
101
102 /* Copper Specific Interrupt Enable Register */
103 #define MII_88E1318S_PHY_CSIER 0x12
104 /* WOL Event Interrupt Enable */
105 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
106
107 /* LED Timer Control Register */
108 #define MII_88E1318S_PHY_LED_TCR 0x12
109 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
110 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
111 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
112
113 /* Magic Packet MAC address registers */
114 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
115 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
116 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
117
118 #define MII_88E1318S_PHY_WOL_CTRL 0x10
119 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
120 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
121
122 #define MII_88E1121_PHY_LED_CTRL 16
123 #define MII_88E1121_PHY_LED_DEF 0x0030
124
125 #define MII_M1011_PHY_STATUS 0x11
126 #define MII_M1011_PHY_STATUS_1000 0x8000
127 #define MII_M1011_PHY_STATUS_100 0x4000
128 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
129 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
130 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
131 #define MII_M1011_PHY_STATUS_LINK 0x0400
132
133 #define MII_88E3016_PHY_SPEC_CTRL 0x10
134 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
135 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
136
137 #define MII_88E1510_GEN_CTRL_REG_1 0x14
138 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
139 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
140 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
141
142 #define LPA_FIBER_1000HALF 0x40
143 #define LPA_FIBER_1000FULL 0x20
144
145 #define LPA_PAUSE_FIBER 0x180
146 #define LPA_PAUSE_ASYM_FIBER 0x100
147
148 #define ADVERTISE_FIBER_1000HALF 0x40
149 #define ADVERTISE_FIBER_1000FULL 0x20
150
151 #define ADVERTISE_PAUSE_FIBER 0x180
152 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
153
154 #define REGISTER_LINK_STATUS 0x400
155 #define NB_FIBER_STATS 1
156
157 MODULE_DESCRIPTION("Marvell PHY driver");
158 MODULE_AUTHOR("Andy Fleming");
159 MODULE_LICENSE("GPL");
160
161 struct marvell_hw_stat {
162 const char *string;
163 u8 page;
164 u8 reg;
165 u8 bits;
166 };
167
168 static struct marvell_hw_stat marvell_hw_stats[] = {
169 { "phy_receive_errors_copper", 0, 21, 16},
170 { "phy_idle_errors", 0, 10, 8 },
171 { "phy_receive_errors_fiber", 1, 21, 16},
172 };
173
174 struct marvell_priv {
175 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
176 char *hwmon_name;
177 struct device *hwmon_dev;
178 };
179
180 static int marvell_read_page(struct phy_device *phydev)
181 {
182 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
183 }
184
185 static int marvell_write_page(struct phy_device *phydev, int page)
186 {
187 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
188 }
189
190 static int marvell_set_page(struct phy_device *phydev, int page)
191 {
192 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
193 }
194
195 static int marvell_ack_interrupt(struct phy_device *phydev)
196 {
197 int err;
198
199 /* Clear the interrupts by reading the reg */
200 err = phy_read(phydev, MII_M1011_IEVENT);
201
202 if (err < 0)
203 return err;
204
205 return 0;
206 }
207
208 static int marvell_config_intr(struct phy_device *phydev)
209 {
210 int err;
211
212 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
213 err = phy_write(phydev, MII_M1011_IMASK,
214 MII_M1011_IMASK_INIT);
215 else
216 err = phy_write(phydev, MII_M1011_IMASK,
217 MII_M1011_IMASK_CLEAR);
218
219 return err;
220 }
221
222 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
223 {
224 int reg;
225 int err;
226 int val;
227
228 /* get the current settings */
229 reg = phy_read(phydev, MII_M1011_PHY_SCR);
230 if (reg < 0)
231 return reg;
232
233 val = reg;
234 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
235 switch (polarity) {
236 case ETH_TP_MDI:
237 val |= MII_M1011_PHY_SCR_MDI;
238 break;
239 case ETH_TP_MDI_X:
240 val |= MII_M1011_PHY_SCR_MDI_X;
241 break;
242 case ETH_TP_MDI_AUTO:
243 case ETH_TP_MDI_INVALID:
244 default:
245 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
246 break;
247 }
248
249 if (val != reg) {
250 /* Set the new polarity value in the register */
251 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
252 if (err)
253 return err;
254 }
255
256 return 0;
257 }
258
259 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
260 u8 retries)
261 {
262 int reg;
263
264 reg = phy_read(phydev, MII_M1011_PHY_SCR);
265 if (reg < 0)
266 return reg;
267
268 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
269 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
270 if (enable)
271 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
272
273 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
274 }
275
276 static int marvell_config_aneg(struct phy_device *phydev)
277 {
278 int err;
279
280 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
281 if (err < 0)
282 return err;
283
284 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
285 MII_M1111_PHY_LED_DIRECT);
286 if (err < 0)
287 return err;
288
289 err = genphy_config_aneg(phydev);
290 if (err < 0)
291 return err;
292
293 if (phydev->autoneg != AUTONEG_ENABLE) {
294 /* A write to speed/duplex bits (that is performed by
295 * genphy_config_aneg() call above) must be followed by
296 * a software reset. Otherwise, the write has no effect.
297 */
298 err = genphy_soft_reset(phydev);
299 if (err < 0)
300 return err;
301 }
302
303 return 0;
304 }
305
306 static int m88e1101_config_aneg(struct phy_device *phydev)
307 {
308 int err;
309
310 /* This Marvell PHY has an errata which requires
311 * that certain registers get written in order
312 * to restart autonegotiation
313 */
314 err = genphy_soft_reset(phydev);
315 if (err < 0)
316 return err;
317
318 err = phy_write(phydev, 0x1d, 0x1f);
319 if (err < 0)
320 return err;
321
322 err = phy_write(phydev, 0x1e, 0x200c);
323 if (err < 0)
324 return err;
325
326 err = phy_write(phydev, 0x1d, 0x5);
327 if (err < 0)
328 return err;
329
330 err = phy_write(phydev, 0x1e, 0);
331 if (err < 0)
332 return err;
333
334 err = phy_write(phydev, 0x1e, 0x100);
335 if (err < 0)
336 return err;
337
338 return marvell_config_aneg(phydev);
339 }
340
341 static int m88e1111_config_aneg(struct phy_device *phydev)
342 {
343 int err;
344
345 /* The Marvell PHY has an errata which requires
346 * that certain registers get written in order
347 * to restart autonegotiation
348 */
349 err = genphy_soft_reset(phydev);
350
351 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
352 if (err < 0)
353 return err;
354
355 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
356 MII_M1111_PHY_LED_DIRECT);
357 if (err < 0)
358 return err;
359
360 err = genphy_config_aneg(phydev);
361 if (err < 0)
362 return err;
363
364 if (phydev->autoneg != AUTONEG_ENABLE) {
365 /* A write to speed/duplex bits (that is performed by
366 * genphy_config_aneg() call above) must be followed by
367 * a software reset. Otherwise, the write has no effect.
368 */
369 err = genphy_soft_reset(phydev);
370 if (err < 0)
371 return err;
372 }
373
374 return 0;
375 }
376
377 #ifdef CONFIG_OF_MDIO
378 /* Set and/or override some configuration registers based on the
379 * marvell,reg-init property stored in the of_node for the phydev.
380 *
381 * marvell,reg-init = <reg-page reg mask value>,...;
382 *
383 * There may be one or more sets of <reg-page reg mask value>:
384 *
385 * reg-page: which register bank to use.
386 * reg: the register.
387 * mask: if non-zero, ANDed with existing register value.
388 * value: ORed with the masked value and written to the regiser.
389 *
390 */
391 static int marvell_of_reg_init(struct phy_device *phydev)
392 {
393 const __be32 *paddr;
394 int len, i, saved_page, current_page, ret = 0;
395
396 if (!phydev->mdio.dev.of_node)
397 return 0;
398
399 paddr = of_get_property(phydev->mdio.dev.of_node,
400 "marvell,reg-init", &len);
401 if (!paddr || len < (4 * sizeof(*paddr)))
402 return 0;
403
404 saved_page = phy_save_page(phydev);
405 if (saved_page < 0)
406 goto err;
407 current_page = saved_page;
408
409 len /= sizeof(*paddr);
410 for (i = 0; i < len - 3; i += 4) {
411 u16 page = be32_to_cpup(paddr + i);
412 u16 reg = be32_to_cpup(paddr + i + 1);
413 u16 mask = be32_to_cpup(paddr + i + 2);
414 u16 val_bits = be32_to_cpup(paddr + i + 3);
415 int val;
416
417 if (page != current_page) {
418 current_page = page;
419 ret = marvell_write_page(phydev, page);
420 if (ret < 0)
421 goto err;
422 }
423
424 val = 0;
425 if (mask) {
426 val = __phy_read(phydev, reg);
427 if (val < 0) {
428 ret = val;
429 goto err;
430 }
431 val &= mask;
432 }
433 val |= val_bits;
434
435 ret = __phy_write(phydev, reg, val);
436 if (ret < 0)
437 goto err;
438 }
439 err:
440 return phy_restore_page(phydev, saved_page, ret);
441 }
442 #else
443 static int marvell_of_reg_init(struct phy_device *phydev)
444 {
445 return 0;
446 }
447 #endif /* CONFIG_OF_MDIO */
448
449 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
450 {
451 int mscr;
452
453 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
454 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
455 MII_88E1121_PHY_MSCR_TX_DELAY;
456 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
457 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
458 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
459 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
460 else
461 mscr = 0;
462
463 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
464 MII_88E1121_PHY_MSCR_REG,
465 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
466 }
467
468 static int m88e1121_config_aneg(struct phy_device *phydev)
469 {
470 int err = 0;
471
472 if (phy_interface_is_rgmii(phydev)) {
473 err = m88e1121_config_aneg_rgmii_delays(phydev);
474 if (err < 0)
475 return err;
476 }
477
478 err = genphy_soft_reset(phydev);
479 if (err < 0)
480 return err;
481
482 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
483 if (err < 0)
484 return err;
485
486 return genphy_config_aneg(phydev);
487 }
488
489 static int m88e1318_config_aneg(struct phy_device *phydev)
490 {
491 int err;
492
493 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
494 MII_88E1318S_PHY_MSCR1_REG,
495 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
496 if (err < 0)
497 return err;
498
499 return m88e1121_config_aneg(phydev);
500 }
501
502 /**
503 * ethtool_adv_to_fiber_adv_t
504 * @ethadv: the ethtool advertisement settings
505 *
506 * A small helper function that translates ethtool advertisement
507 * settings to phy autonegotiation advertisements for the
508 * MII_ADV register for fiber link.
509 */
510 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
511 {
512 u32 result = 0;
513
514 if (ethadv & ADVERTISED_1000baseT_Half)
515 result |= ADVERTISE_FIBER_1000HALF;
516 if (ethadv & ADVERTISED_1000baseT_Full)
517 result |= ADVERTISE_FIBER_1000FULL;
518
519 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
520 result |= LPA_PAUSE_ASYM_FIBER;
521 else if (ethadv & ADVERTISE_PAUSE_CAP)
522 result |= (ADVERTISE_PAUSE_FIBER
523 & (~ADVERTISE_PAUSE_ASYM_FIBER));
524
525 return result;
526 }
527
528 /**
529 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
530 * @phydev: target phy_device struct
531 *
532 * Description: If auto-negotiation is enabled, we configure the
533 * advertising, and then restart auto-negotiation. If it is not
534 * enabled, then we write the BMCR. Adapted for fiber link in
535 * some Marvell's devices.
536 */
537 static int marvell_config_aneg_fiber(struct phy_device *phydev)
538 {
539 int changed = 0;
540 int err;
541 int adv, oldadv;
542 u32 advertise;
543
544 if (phydev->autoneg != AUTONEG_ENABLE)
545 return genphy_setup_forced(phydev);
546
547 /* Only allow advertising what this PHY supports */
548 phydev->advertising &= phydev->supported;
549 advertise = phydev->advertising;
550
551 /* Setup fiber advertisement */
552 adv = phy_read(phydev, MII_ADVERTISE);
553 if (adv < 0)
554 return adv;
555
556 oldadv = adv;
557 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
558 | LPA_PAUSE_FIBER);
559 adv |= ethtool_adv_to_fiber_adv_t(advertise);
560
561 if (adv != oldadv) {
562 err = phy_write(phydev, MII_ADVERTISE, adv);
563 if (err < 0)
564 return err;
565
566 changed = 1;
567 }
568
569 if (changed == 0) {
570 /* Advertisement hasn't changed, but maybe aneg was never on to
571 * begin with? Or maybe phy was isolated?
572 */
573 int ctl = phy_read(phydev, MII_BMCR);
574
575 if (ctl < 0)
576 return ctl;
577
578 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
579 changed = 1; /* do restart aneg */
580 }
581
582 /* Only restart aneg if we are advertising something different
583 * than we were before.
584 */
585 if (changed > 0)
586 changed = genphy_restart_aneg(phydev);
587
588 return changed;
589 }
590
591 static int m88e1510_config_aneg(struct phy_device *phydev)
592 {
593 int err;
594
595 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
596 if (err < 0)
597 goto error;
598
599 /* Configure the copper link first */
600 err = m88e1318_config_aneg(phydev);
601 if (err < 0)
602 goto error;
603
604 /* Do not touch the fiber page if we're in copper->sgmii mode */
605 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
606 return 0;
607
608 /* Then the fiber link */
609 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
610 if (err < 0)
611 goto error;
612
613 err = marvell_config_aneg_fiber(phydev);
614 if (err < 0)
615 goto error;
616
617 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
618
619 error:
620 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
621 return err;
622 }
623
624 static int marvell_config_init(struct phy_device *phydev)
625 {
626 /* Set registers from marvell,reg-init DT property */
627 return marvell_of_reg_init(phydev);
628 }
629
630 static int m88e1116r_config_init(struct phy_device *phydev)
631 {
632 int err;
633
634 err = genphy_soft_reset(phydev);
635 if (err < 0)
636 return err;
637
638 mdelay(500);
639
640 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
641 if (err < 0)
642 return err;
643
644 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
645 if (err < 0)
646 return err;
647
648 err = marvell_set_downshift(phydev, true, 8);
649 if (err < 0)
650 return err;
651
652 if (phy_interface_is_rgmii(phydev)) {
653 err = m88e1121_config_aneg_rgmii_delays(phydev);
654 if (err < 0)
655 return err;
656 }
657
658 err = genphy_soft_reset(phydev);
659 if (err < 0)
660 return err;
661
662 return marvell_config_init(phydev);
663 }
664
665 static int m88e3016_config_init(struct phy_device *phydev)
666 {
667 int ret;
668
669 /* Enable Scrambler and Auto-Crossover */
670 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
671 MII_88E3016_DISABLE_SCRAMBLER,
672 MII_88E3016_AUTO_MDIX_CROSSOVER);
673 if (ret < 0)
674 return ret;
675
676 return marvell_config_init(phydev);
677 }
678
679 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
680 u16 mode,
681 int fibre_copper_auto)
682 {
683 if (fibre_copper_auto)
684 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
685
686 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
687 MII_M1111_HWCFG_MODE_MASK |
688 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
689 MII_M1111_HWCFG_FIBER_COPPER_RES,
690 mode);
691 }
692
693 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
694 {
695 int delay;
696
697 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
698 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
699 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
700 delay = MII_M1111_RGMII_RX_DELAY;
701 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
702 delay = MII_M1111_RGMII_TX_DELAY;
703 } else {
704 delay = 0;
705 }
706
707 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
708 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
709 delay);
710 }
711
712 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
713 {
714 int temp;
715 int err;
716
717 err = m88e1111_config_init_rgmii_delays(phydev);
718 if (err < 0)
719 return err;
720
721 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
722 if (temp < 0)
723 return temp;
724
725 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
726
727 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
728 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
729 else
730 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
731
732 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
733 }
734
735 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
736 {
737 int err;
738
739 err = m88e1111_config_init_hwcfg_mode(
740 phydev,
741 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
742 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
743 if (err < 0)
744 return err;
745
746 /* make sure copper is selected */
747 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
748 }
749
750 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
751 {
752 int err;
753
754 err = m88e1111_config_init_rgmii_delays(phydev);
755 if (err < 0)
756 return err;
757
758 err = m88e1111_config_init_hwcfg_mode(
759 phydev,
760 MII_M1111_HWCFG_MODE_RTBI,
761 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
762 if (err < 0)
763 return err;
764
765 /* soft reset */
766 err = genphy_soft_reset(phydev);
767 if (err < 0)
768 return err;
769
770 return m88e1111_config_init_hwcfg_mode(
771 phydev,
772 MII_M1111_HWCFG_MODE_RTBI,
773 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
774 }
775
776 static int m88e1111_config_init(struct phy_device *phydev)
777 {
778 int err;
779
780 if (phy_interface_is_rgmii(phydev)) {
781 err = m88e1111_config_init_rgmii(phydev);
782 if (err < 0)
783 return err;
784 }
785
786 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
787 err = m88e1111_config_init_sgmii(phydev);
788 if (err < 0)
789 return err;
790 }
791
792 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
793 err = m88e1111_config_init_rtbi(phydev);
794 if (err < 0)
795 return err;
796 }
797
798 err = marvell_of_reg_init(phydev);
799 if (err < 0)
800 return err;
801
802 return genphy_soft_reset(phydev);
803 }
804
805 static int m88e1121_config_init(struct phy_device *phydev)
806 {
807 int err;
808
809 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
810 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
811 MII_88E1121_PHY_LED_CTRL,
812 MII_88E1121_PHY_LED_DEF);
813 if (err < 0)
814 return err;
815
816 /* Set marvell,reg-init configuration from device tree */
817 return marvell_config_init(phydev);
818 }
819
820 static int m88e1510_config_init(struct phy_device *phydev)
821 {
822 int err;
823
824 /* SGMII-to-Copper mode initialization */
825 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
826 u32 pause;
827
828 /* Select page 18 */
829 err = marvell_set_page(phydev, 18);
830 if (err < 0)
831 return err;
832
833 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
834 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
835 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
836 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
837 if (err < 0)
838 return err;
839
840 /* PHY reset is necessary after changing MODE[2:0] */
841 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
842 MII_88E1510_GEN_CTRL_REG_1_RESET);
843 if (err < 0)
844 return err;
845
846 /* Reset page selection */
847 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
848 if (err < 0)
849 return err;
850
851 /* There appears to be a bug in the 88e1512 when used in
852 * SGMII to copper mode, where the AN advertisment register
853 * clears the pause bits each time a negotiation occurs.
854 * This means we can never be truely sure what was advertised,
855 * so disable Pause support.
856 */
857 pause = SUPPORTED_Pause | SUPPORTED_Asym_Pause;
858 phydev->supported &= ~pause;
859 phydev->advertising &= ~pause;
860 }
861
862 return m88e1121_config_init(phydev);
863 }
864
865 static int m88e1118_config_aneg(struct phy_device *phydev)
866 {
867 int err;
868
869 err = genphy_soft_reset(phydev);
870 if (err < 0)
871 return err;
872
873 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
874 if (err < 0)
875 return err;
876
877 err = genphy_config_aneg(phydev);
878 return 0;
879 }
880
881 static int m88e1118_config_init(struct phy_device *phydev)
882 {
883 int err;
884
885 /* Change address */
886 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
887 if (err < 0)
888 return err;
889
890 /* Enable 1000 Mbit */
891 err = phy_write(phydev, 0x15, 0x1070);
892 if (err < 0)
893 return err;
894
895 /* Change address */
896 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
897 if (err < 0)
898 return err;
899
900 /* Adjust LED Control */
901 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
902 err = phy_write(phydev, 0x10, 0x1100);
903 else
904 err = phy_write(phydev, 0x10, 0x021e);
905 if (err < 0)
906 return err;
907
908 err = marvell_of_reg_init(phydev);
909 if (err < 0)
910 return err;
911
912 /* Reset address */
913 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
914 if (err < 0)
915 return err;
916
917 return genphy_soft_reset(phydev);
918 }
919
920 static int m88e1149_config_init(struct phy_device *phydev)
921 {
922 int err;
923
924 /* Change address */
925 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
926 if (err < 0)
927 return err;
928
929 /* Enable 1000 Mbit */
930 err = phy_write(phydev, 0x15, 0x1048);
931 if (err < 0)
932 return err;
933
934 err = marvell_of_reg_init(phydev);
935 if (err < 0)
936 return err;
937
938 /* Reset address */
939 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
940 if (err < 0)
941 return err;
942
943 return genphy_soft_reset(phydev);
944 }
945
946 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
947 {
948 int err;
949
950 err = m88e1111_config_init_rgmii_delays(phydev);
951 if (err < 0)
952 return err;
953
954 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
955 err = phy_write(phydev, 0x1d, 0x0012);
956 if (err < 0)
957 return err;
958
959 err = phy_modify(phydev, 0x1e, 0x0fc0,
960 2 << 9 | /* 36 ohm */
961 2 << 6); /* 39 ohm */
962 if (err < 0)
963 return err;
964
965 err = phy_write(phydev, 0x1d, 0x3);
966 if (err < 0)
967 return err;
968
969 err = phy_write(phydev, 0x1e, 0x8000);
970 }
971 return err;
972 }
973
974 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
975 {
976 return m88e1111_config_init_hwcfg_mode(
977 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
978 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
979 }
980
981 static int m88e1145_config_init(struct phy_device *phydev)
982 {
983 int err;
984
985 /* Take care of errata E0 & E1 */
986 err = phy_write(phydev, 0x1d, 0x001b);
987 if (err < 0)
988 return err;
989
990 err = phy_write(phydev, 0x1e, 0x418f);
991 if (err < 0)
992 return err;
993
994 err = phy_write(phydev, 0x1d, 0x0016);
995 if (err < 0)
996 return err;
997
998 err = phy_write(phydev, 0x1e, 0xa2da);
999 if (err < 0)
1000 return err;
1001
1002 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1003 err = m88e1145_config_init_rgmii(phydev);
1004 if (err < 0)
1005 return err;
1006 }
1007
1008 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1009 err = m88e1145_config_init_sgmii(phydev);
1010 if (err < 0)
1011 return err;
1012 }
1013
1014 err = marvell_of_reg_init(phydev);
1015 if (err < 0)
1016 return err;
1017
1018 return 0;
1019 }
1020
1021 /**
1022 * fiber_lpa_to_ethtool_lpa_t
1023 * @lpa: value of the MII_LPA register for fiber link
1024 *
1025 * A small helper function that translates MII_LPA
1026 * bits to ethtool LP advertisement settings.
1027 */
1028 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1029 {
1030 u32 result = 0;
1031
1032 if (lpa & LPA_FIBER_1000HALF)
1033 result |= ADVERTISED_1000baseT_Half;
1034 if (lpa & LPA_FIBER_1000FULL)
1035 result |= ADVERTISED_1000baseT_Full;
1036
1037 return result;
1038 }
1039
1040 /**
1041 * marvell_update_link - update link status in real time in @phydev
1042 * @phydev: target phy_device struct
1043 *
1044 * Description: Update the value in phydev->link to reflect the
1045 * current link value.
1046 */
1047 static int marvell_update_link(struct phy_device *phydev, int fiber)
1048 {
1049 int status;
1050
1051 /* Use the generic register for copper link, or specific
1052 * register for fiber case
1053 */
1054 if (fiber) {
1055 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1056 if (status < 0)
1057 return status;
1058
1059 if ((status & REGISTER_LINK_STATUS) == 0)
1060 phydev->link = 0;
1061 else
1062 phydev->link = 1;
1063 } else {
1064 return genphy_update_link(phydev);
1065 }
1066
1067 return 0;
1068 }
1069
1070 static int marvell_read_status_page_an(struct phy_device *phydev,
1071 int fiber)
1072 {
1073 int status;
1074 int lpa;
1075 int lpagb;
1076
1077 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1078 if (status < 0)
1079 return status;
1080
1081 lpa = phy_read(phydev, MII_LPA);
1082 if (lpa < 0)
1083 return lpa;
1084
1085 lpagb = phy_read(phydev, MII_STAT1000);
1086 if (lpagb < 0)
1087 return lpagb;
1088
1089 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1090 phydev->duplex = DUPLEX_FULL;
1091 else
1092 phydev->duplex = DUPLEX_HALF;
1093
1094 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1095 phydev->pause = 0;
1096 phydev->asym_pause = 0;
1097
1098 switch (status) {
1099 case MII_M1011_PHY_STATUS_1000:
1100 phydev->speed = SPEED_1000;
1101 break;
1102
1103 case MII_M1011_PHY_STATUS_100:
1104 phydev->speed = SPEED_100;
1105 break;
1106
1107 default:
1108 phydev->speed = SPEED_10;
1109 break;
1110 }
1111
1112 if (!fiber) {
1113 phydev->lp_advertising =
1114 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1115 mii_lpa_to_ethtool_lpa_t(lpa);
1116
1117 if (phydev->duplex == DUPLEX_FULL) {
1118 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1119 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1120 }
1121 } else {
1122 /* The fiber link is only 1000M capable */
1123 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1124
1125 if (phydev->duplex == DUPLEX_FULL) {
1126 if (!(lpa & LPA_PAUSE_FIBER)) {
1127 phydev->pause = 0;
1128 phydev->asym_pause = 0;
1129 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1130 phydev->pause = 1;
1131 phydev->asym_pause = 1;
1132 } else {
1133 phydev->pause = 1;
1134 phydev->asym_pause = 0;
1135 }
1136 }
1137 }
1138 return 0;
1139 }
1140
1141 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1142 {
1143 int bmcr = phy_read(phydev, MII_BMCR);
1144
1145 if (bmcr < 0)
1146 return bmcr;
1147
1148 if (bmcr & BMCR_FULLDPLX)
1149 phydev->duplex = DUPLEX_FULL;
1150 else
1151 phydev->duplex = DUPLEX_HALF;
1152
1153 if (bmcr & BMCR_SPEED1000)
1154 phydev->speed = SPEED_1000;
1155 else if (bmcr & BMCR_SPEED100)
1156 phydev->speed = SPEED_100;
1157 else
1158 phydev->speed = SPEED_10;
1159
1160 phydev->pause = 0;
1161 phydev->asym_pause = 0;
1162 phydev->lp_advertising = 0;
1163
1164 return 0;
1165 }
1166
1167 /* marvell_read_status_page
1168 *
1169 * Description:
1170 * Check the link, then figure out the current state
1171 * by comparing what we advertise with what the link partner
1172 * advertises. Start by checking the gigabit possibilities,
1173 * then move on to 10/100.
1174 */
1175 static int marvell_read_status_page(struct phy_device *phydev, int page)
1176 {
1177 int fiber;
1178 int err;
1179
1180 /* Detect and update the link, but return if there
1181 * was an error
1182 */
1183 if (page == MII_MARVELL_FIBER_PAGE)
1184 fiber = 1;
1185 else
1186 fiber = 0;
1187
1188 err = marvell_update_link(phydev, fiber);
1189 if (err)
1190 return err;
1191
1192 if (phydev->autoneg == AUTONEG_ENABLE)
1193 err = marvell_read_status_page_an(phydev, fiber);
1194 else
1195 err = marvell_read_status_page_fixed(phydev);
1196
1197 return err;
1198 }
1199
1200 /* marvell_read_status
1201 *
1202 * Some Marvell's phys have two modes: fiber and copper.
1203 * Both need status checked.
1204 * Description:
1205 * First, check the fiber link and status.
1206 * If the fiber link is down, check the copper link and status which
1207 * will be the default value if both link are down.
1208 */
1209 static int marvell_read_status(struct phy_device *phydev)
1210 {
1211 int err;
1212
1213 /* Check the fiber mode first */
1214 if (phydev->supported & SUPPORTED_FIBRE &&
1215 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1216 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1217 if (err < 0)
1218 goto error;
1219
1220 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1221 if (err < 0)
1222 goto error;
1223
1224 /* If the fiber link is up, it is the selected and
1225 * used link. In this case, we need to stay in the
1226 * fiber page. Please to be careful about that, avoid
1227 * to restore Copper page in other functions which
1228 * could break the behaviour for some fiber phy like
1229 * 88E1512.
1230 */
1231 if (phydev->link)
1232 return 0;
1233
1234 /* If fiber link is down, check and save copper mode state */
1235 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1236 if (err < 0)
1237 goto error;
1238 }
1239
1240 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1241
1242 error:
1243 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1244 return err;
1245 }
1246
1247 /* marvell_suspend
1248 *
1249 * Some Marvell's phys have two modes: fiber and copper.
1250 * Both need to be suspended
1251 */
1252 static int marvell_suspend(struct phy_device *phydev)
1253 {
1254 int err;
1255
1256 /* Suspend the fiber mode first */
1257 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1258 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1259 if (err < 0)
1260 goto error;
1261
1262 /* With the page set, use the generic suspend */
1263 err = genphy_suspend(phydev);
1264 if (err < 0)
1265 goto error;
1266
1267 /* Then, the copper link */
1268 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1269 if (err < 0)
1270 goto error;
1271 }
1272
1273 /* With the page set, use the generic suspend */
1274 return genphy_suspend(phydev);
1275
1276 error:
1277 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1278 return err;
1279 }
1280
1281 /* marvell_resume
1282 *
1283 * Some Marvell's phys have two modes: fiber and copper.
1284 * Both need to be resumed
1285 */
1286 static int marvell_resume(struct phy_device *phydev)
1287 {
1288 int err;
1289
1290 /* Resume the fiber mode first */
1291 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1292 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1293 if (err < 0)
1294 goto error;
1295
1296 /* With the page set, use the generic resume */
1297 err = genphy_resume(phydev);
1298 if (err < 0)
1299 goto error;
1300
1301 /* Then, the copper link */
1302 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1303 if (err < 0)
1304 goto error;
1305 }
1306
1307 /* With the page set, use the generic resume */
1308 return genphy_resume(phydev);
1309
1310 error:
1311 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1312 return err;
1313 }
1314
1315 static int marvell_aneg_done(struct phy_device *phydev)
1316 {
1317 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1318
1319 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1320 }
1321
1322 static int m88e1121_did_interrupt(struct phy_device *phydev)
1323 {
1324 int imask;
1325
1326 imask = phy_read(phydev, MII_M1011_IEVENT);
1327
1328 if (imask & MII_M1011_IMASK_INIT)
1329 return 1;
1330
1331 return 0;
1332 }
1333
1334 static void m88e1318_get_wol(struct phy_device *phydev,
1335 struct ethtool_wolinfo *wol)
1336 {
1337 int oldpage, ret = 0;
1338
1339 wol->supported = WAKE_MAGIC;
1340 wol->wolopts = 0;
1341
1342 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1343 if (oldpage < 0)
1344 goto error;
1345
1346 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1347 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1348 wol->wolopts |= WAKE_MAGIC;
1349
1350 error:
1351 phy_restore_page(phydev, oldpage, ret);
1352 }
1353
1354 static int m88e1318_set_wol(struct phy_device *phydev,
1355 struct ethtool_wolinfo *wol)
1356 {
1357 int err = 0, oldpage;
1358
1359 oldpage = phy_save_page(phydev);
1360 if (oldpage < 0)
1361 goto error;
1362
1363 if (wol->wolopts & WAKE_MAGIC) {
1364 /* Explicitly switch to page 0x00, just to be sure */
1365 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1366 if (err < 0)
1367 goto error;
1368
1369 /* Enable the WOL interrupt */
1370 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1371 MII_88E1318S_PHY_CSIER_WOL_EIE);
1372 if (err < 0)
1373 goto error;
1374
1375 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1376 if (err < 0)
1377 goto error;
1378
1379 /* Setup LED[2] as interrupt pin (active low) */
1380 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1381 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1382 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1383 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1384 if (err < 0)
1385 goto error;
1386
1387 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1388 if (err < 0)
1389 goto error;
1390
1391 /* Store the device address for the magic packet */
1392 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1393 ((phydev->attached_dev->dev_addr[5] << 8) |
1394 phydev->attached_dev->dev_addr[4]));
1395 if (err < 0)
1396 goto error;
1397 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1398 ((phydev->attached_dev->dev_addr[3] << 8) |
1399 phydev->attached_dev->dev_addr[2]));
1400 if (err < 0)
1401 goto error;
1402 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1403 ((phydev->attached_dev->dev_addr[1] << 8) |
1404 phydev->attached_dev->dev_addr[0]));
1405 if (err < 0)
1406 goto error;
1407
1408 /* Clear WOL status and enable magic packet matching */
1409 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1410 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1411 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1412 if (err < 0)
1413 goto error;
1414 } else {
1415 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1416 if (err < 0)
1417 goto error;
1418
1419 /* Clear WOL status and disable magic packet matching */
1420 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1421 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1422 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1423 if (err < 0)
1424 goto error;
1425 }
1426
1427 error:
1428 return phy_restore_page(phydev, oldpage, err);
1429 }
1430
1431 static int marvell_get_sset_count(struct phy_device *phydev)
1432 {
1433 if (phydev->supported & SUPPORTED_FIBRE)
1434 return ARRAY_SIZE(marvell_hw_stats);
1435 else
1436 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1437 }
1438
1439 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1440 {
1441 int i;
1442
1443 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1444 memcpy(data + i * ETH_GSTRING_LEN,
1445 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1446 }
1447 }
1448
1449 #ifndef UINT64_MAX
1450 #define UINT64_MAX (u64)(~((u64)0))
1451 #endif
1452 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1453 {
1454 struct marvell_hw_stat stat = marvell_hw_stats[i];
1455 struct marvell_priv *priv = phydev->priv;
1456 int val;
1457 u64 ret;
1458
1459 val = phy_read_paged(phydev, stat.page, stat.reg);
1460 if (val < 0) {
1461 ret = UINT64_MAX;
1462 } else {
1463 val = val & ((1 << stat.bits) - 1);
1464 priv->stats[i] += val;
1465 ret = priv->stats[i];
1466 }
1467
1468 return ret;
1469 }
1470
1471 static void marvell_get_stats(struct phy_device *phydev,
1472 struct ethtool_stats *stats, u64 *data)
1473 {
1474 int i;
1475
1476 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1477 data[i] = marvell_get_stat(phydev, i);
1478 }
1479
1480 #ifdef CONFIG_HWMON
1481 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1482 {
1483 int oldpage;
1484 int ret = 0;
1485 int val;
1486
1487 *temp = 0;
1488
1489 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1490 if (oldpage < 0)
1491 goto error;
1492
1493 /* Enable temperature sensor */
1494 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1495 if (ret < 0)
1496 goto error;
1497
1498 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1499 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1500 if (ret < 0)
1501 goto error;
1502
1503 /* Wait for temperature to stabilize */
1504 usleep_range(10000, 12000);
1505
1506 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1507 if (val < 0) {
1508 ret = val;
1509 goto error;
1510 }
1511
1512 /* Disable temperature sensor */
1513 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1514 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1515 if (ret < 0)
1516 goto error;
1517
1518 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1519
1520 error:
1521 return phy_restore_page(phydev, oldpage, ret);
1522 }
1523
1524 static int m88e1121_hwmon_read(struct device *dev,
1525 enum hwmon_sensor_types type,
1526 u32 attr, int channel, long *temp)
1527 {
1528 struct phy_device *phydev = dev_get_drvdata(dev);
1529 int err;
1530
1531 switch (attr) {
1532 case hwmon_temp_input:
1533 err = m88e1121_get_temp(phydev, temp);
1534 break;
1535 default:
1536 return -EOPNOTSUPP;
1537 }
1538
1539 return err;
1540 }
1541
1542 static umode_t m88e1121_hwmon_is_visible(const void *data,
1543 enum hwmon_sensor_types type,
1544 u32 attr, int channel)
1545 {
1546 if (type != hwmon_temp)
1547 return 0;
1548
1549 switch (attr) {
1550 case hwmon_temp_input:
1551 return 0444;
1552 default:
1553 return 0;
1554 }
1555 }
1556
1557 static u32 m88e1121_hwmon_chip_config[] = {
1558 HWMON_C_REGISTER_TZ,
1559 0
1560 };
1561
1562 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1563 .type = hwmon_chip,
1564 .config = m88e1121_hwmon_chip_config,
1565 };
1566
1567 static u32 m88e1121_hwmon_temp_config[] = {
1568 HWMON_T_INPUT,
1569 0
1570 };
1571
1572 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1573 .type = hwmon_temp,
1574 .config = m88e1121_hwmon_temp_config,
1575 };
1576
1577 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1578 &m88e1121_hwmon_chip,
1579 &m88e1121_hwmon_temp,
1580 NULL
1581 };
1582
1583 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1584 .is_visible = m88e1121_hwmon_is_visible,
1585 .read = m88e1121_hwmon_read,
1586 };
1587
1588 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1589 .ops = &m88e1121_hwmon_hwmon_ops,
1590 .info = m88e1121_hwmon_info,
1591 };
1592
1593 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1594 {
1595 int ret;
1596
1597 *temp = 0;
1598
1599 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1600 MII_88E1510_TEMP_SENSOR);
1601 if (ret < 0)
1602 return ret;
1603
1604 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1605
1606 return 0;
1607 }
1608
1609 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1610 {
1611 int ret;
1612
1613 *temp = 0;
1614
1615 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1616 MII_88E1121_MISC_TEST);
1617 if (ret < 0)
1618 return ret;
1619
1620 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1621 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1622 /* convert to mC */
1623 *temp *= 1000;
1624
1625 return 0;
1626 }
1627
1628 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1629 {
1630 temp = temp / 1000;
1631 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1632
1633 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1634 MII_88E1121_MISC_TEST,
1635 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1636 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1637 }
1638
1639 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1640 {
1641 int ret;
1642
1643 *alarm = false;
1644
1645 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1646 MII_88E1121_MISC_TEST);
1647 if (ret < 0)
1648 return ret;
1649
1650 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1651
1652 return 0;
1653 }
1654
1655 static int m88e1510_hwmon_read(struct device *dev,
1656 enum hwmon_sensor_types type,
1657 u32 attr, int channel, long *temp)
1658 {
1659 struct phy_device *phydev = dev_get_drvdata(dev);
1660 int err;
1661
1662 switch (attr) {
1663 case hwmon_temp_input:
1664 err = m88e1510_get_temp(phydev, temp);
1665 break;
1666 case hwmon_temp_crit:
1667 err = m88e1510_get_temp_critical(phydev, temp);
1668 break;
1669 case hwmon_temp_max_alarm:
1670 err = m88e1510_get_temp_alarm(phydev, temp);
1671 break;
1672 default:
1673 return -EOPNOTSUPP;
1674 }
1675
1676 return err;
1677 }
1678
1679 static int m88e1510_hwmon_write(struct device *dev,
1680 enum hwmon_sensor_types type,
1681 u32 attr, int channel, long temp)
1682 {
1683 struct phy_device *phydev = dev_get_drvdata(dev);
1684 int err;
1685
1686 switch (attr) {
1687 case hwmon_temp_crit:
1688 err = m88e1510_set_temp_critical(phydev, temp);
1689 break;
1690 default:
1691 return -EOPNOTSUPP;
1692 }
1693 return err;
1694 }
1695
1696 static umode_t m88e1510_hwmon_is_visible(const void *data,
1697 enum hwmon_sensor_types type,
1698 u32 attr, int channel)
1699 {
1700 if (type != hwmon_temp)
1701 return 0;
1702
1703 switch (attr) {
1704 case hwmon_temp_input:
1705 case hwmon_temp_max_alarm:
1706 return 0444;
1707 case hwmon_temp_crit:
1708 return 0644;
1709 default:
1710 return 0;
1711 }
1712 }
1713
1714 static u32 m88e1510_hwmon_temp_config[] = {
1715 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1716 0
1717 };
1718
1719 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1720 .type = hwmon_temp,
1721 .config = m88e1510_hwmon_temp_config,
1722 };
1723
1724 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1725 &m88e1121_hwmon_chip,
1726 &m88e1510_hwmon_temp,
1727 NULL
1728 };
1729
1730 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1731 .is_visible = m88e1510_hwmon_is_visible,
1732 .read = m88e1510_hwmon_read,
1733 .write = m88e1510_hwmon_write,
1734 };
1735
1736 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1737 .ops = &m88e1510_hwmon_hwmon_ops,
1738 .info = m88e1510_hwmon_info,
1739 };
1740
1741 static int marvell_hwmon_name(struct phy_device *phydev)
1742 {
1743 struct marvell_priv *priv = phydev->priv;
1744 struct device *dev = &phydev->mdio.dev;
1745 const char *devname = dev_name(dev);
1746 size_t len = strlen(devname);
1747 int i, j;
1748
1749 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1750 if (!priv->hwmon_name)
1751 return -ENOMEM;
1752
1753 for (i = j = 0; i < len && devname[i]; i++) {
1754 if (isalnum(devname[i]))
1755 priv->hwmon_name[j++] = devname[i];
1756 }
1757
1758 return 0;
1759 }
1760
1761 static int marvell_hwmon_probe(struct phy_device *phydev,
1762 const struct hwmon_chip_info *chip)
1763 {
1764 struct marvell_priv *priv = phydev->priv;
1765 struct device *dev = &phydev->mdio.dev;
1766 int err;
1767
1768 err = marvell_hwmon_name(phydev);
1769 if (err)
1770 return err;
1771
1772 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1773 dev, priv->hwmon_name, phydev, chip, NULL);
1774
1775 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1776 }
1777
1778 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1779 {
1780 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1781 }
1782
1783 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1784 {
1785 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1786 }
1787 #else
1788 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1789 {
1790 return 0;
1791 }
1792
1793 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1794 {
1795 return 0;
1796 }
1797 #endif
1798
1799 static int marvell_probe(struct phy_device *phydev)
1800 {
1801 struct marvell_priv *priv;
1802
1803 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1804 if (!priv)
1805 return -ENOMEM;
1806
1807 phydev->priv = priv;
1808
1809 return 0;
1810 }
1811
1812 static int m88e1121_probe(struct phy_device *phydev)
1813 {
1814 int err;
1815
1816 err = marvell_probe(phydev);
1817 if (err)
1818 return err;
1819
1820 return m88e1121_hwmon_probe(phydev);
1821 }
1822
1823 static int m88e1510_probe(struct phy_device *phydev)
1824 {
1825 int err;
1826
1827 err = marvell_probe(phydev);
1828 if (err)
1829 return err;
1830
1831 return m88e1510_hwmon_probe(phydev);
1832 }
1833
1834 static struct phy_driver marvell_drivers[] = {
1835 {
1836 .phy_id = MARVELL_PHY_ID_88E1101,
1837 .phy_id_mask = MARVELL_PHY_ID_MASK,
1838 .name = "Marvell 88E1101",
1839 .features = PHY_GBIT_FEATURES,
1840 .flags = PHY_HAS_INTERRUPT,
1841 .probe = marvell_probe,
1842 .config_init = &marvell_config_init,
1843 .config_aneg = &m88e1101_config_aneg,
1844 .ack_interrupt = &marvell_ack_interrupt,
1845 .config_intr = &marvell_config_intr,
1846 .resume = &genphy_resume,
1847 .suspend = &genphy_suspend,
1848 .read_page = marvell_read_page,
1849 .write_page = marvell_write_page,
1850 .get_sset_count = marvell_get_sset_count,
1851 .get_strings = marvell_get_strings,
1852 .get_stats = marvell_get_stats,
1853 },
1854 {
1855 .phy_id = MARVELL_PHY_ID_88E1112,
1856 .phy_id_mask = MARVELL_PHY_ID_MASK,
1857 .name = "Marvell 88E1112",
1858 .features = PHY_GBIT_FEATURES,
1859 .flags = PHY_HAS_INTERRUPT,
1860 .probe = marvell_probe,
1861 .config_init = &m88e1111_config_init,
1862 .config_aneg = &marvell_config_aneg,
1863 .ack_interrupt = &marvell_ack_interrupt,
1864 .config_intr = &marvell_config_intr,
1865 .resume = &genphy_resume,
1866 .suspend = &genphy_suspend,
1867 .read_page = marvell_read_page,
1868 .write_page = marvell_write_page,
1869 .get_sset_count = marvell_get_sset_count,
1870 .get_strings = marvell_get_strings,
1871 .get_stats = marvell_get_stats,
1872 },
1873 {
1874 .phy_id = MARVELL_PHY_ID_88E1111,
1875 .phy_id_mask = MARVELL_PHY_ID_MASK,
1876 .name = "Marvell 88E1111",
1877 .features = PHY_GBIT_FEATURES,
1878 .flags = PHY_HAS_INTERRUPT,
1879 .probe = marvell_probe,
1880 .config_init = &m88e1111_config_init,
1881 .config_aneg = &m88e1111_config_aneg,
1882 .read_status = &marvell_read_status,
1883 .ack_interrupt = &marvell_ack_interrupt,
1884 .config_intr = &marvell_config_intr,
1885 .resume = &genphy_resume,
1886 .suspend = &genphy_suspend,
1887 .read_page = marvell_read_page,
1888 .write_page = marvell_write_page,
1889 .get_sset_count = marvell_get_sset_count,
1890 .get_strings = marvell_get_strings,
1891 .get_stats = marvell_get_stats,
1892 },
1893 {
1894 .phy_id = MARVELL_PHY_ID_88E1118,
1895 .phy_id_mask = MARVELL_PHY_ID_MASK,
1896 .name = "Marvell 88E1118",
1897 .features = PHY_GBIT_FEATURES,
1898 .flags = PHY_HAS_INTERRUPT,
1899 .probe = marvell_probe,
1900 .config_init = &m88e1118_config_init,
1901 .config_aneg = &m88e1118_config_aneg,
1902 .ack_interrupt = &marvell_ack_interrupt,
1903 .config_intr = &marvell_config_intr,
1904 .resume = &genphy_resume,
1905 .suspend = &genphy_suspend,
1906 .read_page = marvell_read_page,
1907 .write_page = marvell_write_page,
1908 .get_sset_count = marvell_get_sset_count,
1909 .get_strings = marvell_get_strings,
1910 .get_stats = marvell_get_stats,
1911 },
1912 {
1913 .phy_id = MARVELL_PHY_ID_88E1121R,
1914 .phy_id_mask = MARVELL_PHY_ID_MASK,
1915 .name = "Marvell 88E1121R",
1916 .features = PHY_GBIT_FEATURES,
1917 .flags = PHY_HAS_INTERRUPT,
1918 .probe = &m88e1121_probe,
1919 .config_init = &m88e1121_config_init,
1920 .config_aneg = &m88e1121_config_aneg,
1921 .read_status = &marvell_read_status,
1922 .ack_interrupt = &marvell_ack_interrupt,
1923 .config_intr = &marvell_config_intr,
1924 .did_interrupt = &m88e1121_did_interrupt,
1925 .resume = &genphy_resume,
1926 .suspend = &genphy_suspend,
1927 .read_page = marvell_read_page,
1928 .write_page = marvell_write_page,
1929 .get_sset_count = marvell_get_sset_count,
1930 .get_strings = marvell_get_strings,
1931 .get_stats = marvell_get_stats,
1932 },
1933 {
1934 .phy_id = MARVELL_PHY_ID_88E1318S,
1935 .phy_id_mask = MARVELL_PHY_ID_MASK,
1936 .name = "Marvell 88E1318S",
1937 .features = PHY_GBIT_FEATURES,
1938 .flags = PHY_HAS_INTERRUPT,
1939 .probe = marvell_probe,
1940 .config_init = &m88e1121_config_init,
1941 .config_aneg = &m88e1318_config_aneg,
1942 .read_status = &marvell_read_status,
1943 .ack_interrupt = &marvell_ack_interrupt,
1944 .config_intr = &marvell_config_intr,
1945 .did_interrupt = &m88e1121_did_interrupt,
1946 .get_wol = &m88e1318_get_wol,
1947 .set_wol = &m88e1318_set_wol,
1948 .resume = &genphy_resume,
1949 .suspend = &genphy_suspend,
1950 .read_page = marvell_read_page,
1951 .write_page = marvell_write_page,
1952 .get_sset_count = marvell_get_sset_count,
1953 .get_strings = marvell_get_strings,
1954 .get_stats = marvell_get_stats,
1955 },
1956 {
1957 .phy_id = MARVELL_PHY_ID_88E1145,
1958 .phy_id_mask = MARVELL_PHY_ID_MASK,
1959 .name = "Marvell 88E1145",
1960 .features = PHY_GBIT_FEATURES,
1961 .flags = PHY_HAS_INTERRUPT,
1962 .probe = marvell_probe,
1963 .config_init = &m88e1145_config_init,
1964 .config_aneg = &m88e1101_config_aneg,
1965 .read_status = &genphy_read_status,
1966 .ack_interrupt = &marvell_ack_interrupt,
1967 .config_intr = &marvell_config_intr,
1968 .resume = &genphy_resume,
1969 .suspend = &genphy_suspend,
1970 .read_page = marvell_read_page,
1971 .write_page = marvell_write_page,
1972 .get_sset_count = marvell_get_sset_count,
1973 .get_strings = marvell_get_strings,
1974 .get_stats = marvell_get_stats,
1975 },
1976 {
1977 .phy_id = MARVELL_PHY_ID_88E1149R,
1978 .phy_id_mask = MARVELL_PHY_ID_MASK,
1979 .name = "Marvell 88E1149R",
1980 .features = PHY_GBIT_FEATURES,
1981 .flags = PHY_HAS_INTERRUPT,
1982 .probe = marvell_probe,
1983 .config_init = &m88e1149_config_init,
1984 .config_aneg = &m88e1118_config_aneg,
1985 .ack_interrupt = &marvell_ack_interrupt,
1986 .config_intr = &marvell_config_intr,
1987 .resume = &genphy_resume,
1988 .suspend = &genphy_suspend,
1989 .read_page = marvell_read_page,
1990 .write_page = marvell_write_page,
1991 .get_sset_count = marvell_get_sset_count,
1992 .get_strings = marvell_get_strings,
1993 .get_stats = marvell_get_stats,
1994 },
1995 {
1996 .phy_id = MARVELL_PHY_ID_88E1240,
1997 .phy_id_mask = MARVELL_PHY_ID_MASK,
1998 .name = "Marvell 88E1240",
1999 .features = PHY_GBIT_FEATURES,
2000 .flags = PHY_HAS_INTERRUPT,
2001 .probe = marvell_probe,
2002 .config_init = &m88e1111_config_init,
2003 .config_aneg = &marvell_config_aneg,
2004 .ack_interrupt = &marvell_ack_interrupt,
2005 .config_intr = &marvell_config_intr,
2006 .resume = &genphy_resume,
2007 .suspend = &genphy_suspend,
2008 .read_page = marvell_read_page,
2009 .write_page = marvell_write_page,
2010 .get_sset_count = marvell_get_sset_count,
2011 .get_strings = marvell_get_strings,
2012 .get_stats = marvell_get_stats,
2013 },
2014 {
2015 .phy_id = MARVELL_PHY_ID_88E1116R,
2016 .phy_id_mask = MARVELL_PHY_ID_MASK,
2017 .name = "Marvell 88E1116R",
2018 .features = PHY_GBIT_FEATURES,
2019 .flags = PHY_HAS_INTERRUPT,
2020 .probe = marvell_probe,
2021 .config_init = &m88e1116r_config_init,
2022 .ack_interrupt = &marvell_ack_interrupt,
2023 .config_intr = &marvell_config_intr,
2024 .resume = &genphy_resume,
2025 .suspend = &genphy_suspend,
2026 .read_page = marvell_read_page,
2027 .write_page = marvell_write_page,
2028 .get_sset_count = marvell_get_sset_count,
2029 .get_strings = marvell_get_strings,
2030 .get_stats = marvell_get_stats,
2031 },
2032 {
2033 .phy_id = MARVELL_PHY_ID_88E1510,
2034 .phy_id_mask = MARVELL_PHY_ID_MASK,
2035 .name = "Marvell 88E1510",
2036 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
2037 .flags = PHY_HAS_INTERRUPT,
2038 .probe = &m88e1510_probe,
2039 .config_init = &m88e1510_config_init,
2040 .config_aneg = &m88e1510_config_aneg,
2041 .read_status = &marvell_read_status,
2042 .ack_interrupt = &marvell_ack_interrupt,
2043 .config_intr = &marvell_config_intr,
2044 .did_interrupt = &m88e1121_did_interrupt,
2045 .get_wol = &m88e1318_get_wol,
2046 .set_wol = &m88e1318_set_wol,
2047 .resume = &marvell_resume,
2048 .suspend = &marvell_suspend,
2049 .read_page = marvell_read_page,
2050 .write_page = marvell_write_page,
2051 .get_sset_count = marvell_get_sset_count,
2052 .get_strings = marvell_get_strings,
2053 .get_stats = marvell_get_stats,
2054 .set_loopback = genphy_loopback,
2055 },
2056 {
2057 .phy_id = MARVELL_PHY_ID_88E1540,
2058 .phy_id_mask = MARVELL_PHY_ID_MASK,
2059 .name = "Marvell 88E1540",
2060 .features = PHY_GBIT_FEATURES,
2061 .flags = PHY_HAS_INTERRUPT,
2062 .probe = m88e1510_probe,
2063 .config_init = &marvell_config_init,
2064 .config_aneg = &m88e1510_config_aneg,
2065 .read_status = &marvell_read_status,
2066 .ack_interrupt = &marvell_ack_interrupt,
2067 .config_intr = &marvell_config_intr,
2068 .did_interrupt = &m88e1121_did_interrupt,
2069 .resume = &genphy_resume,
2070 .suspend = &genphy_suspend,
2071 .read_page = marvell_read_page,
2072 .write_page = marvell_write_page,
2073 .get_sset_count = marvell_get_sset_count,
2074 .get_strings = marvell_get_strings,
2075 .get_stats = marvell_get_stats,
2076 },
2077 {
2078 .phy_id = MARVELL_PHY_ID_88E1545,
2079 .phy_id_mask = MARVELL_PHY_ID_MASK,
2080 .name = "Marvell 88E1545",
2081 .probe = m88e1510_probe,
2082 .features = PHY_GBIT_FEATURES,
2083 .flags = PHY_HAS_INTERRUPT,
2084 .config_init = &marvell_config_init,
2085 .config_aneg = &m88e1510_config_aneg,
2086 .read_status = &marvell_read_status,
2087 .ack_interrupt = &marvell_ack_interrupt,
2088 .config_intr = &marvell_config_intr,
2089 .did_interrupt = &m88e1121_did_interrupt,
2090 .resume = &genphy_resume,
2091 .suspend = &genphy_suspend,
2092 .read_page = marvell_read_page,
2093 .write_page = marvell_write_page,
2094 .get_sset_count = marvell_get_sset_count,
2095 .get_strings = marvell_get_strings,
2096 .get_stats = marvell_get_stats,
2097 },
2098 {
2099 .phy_id = MARVELL_PHY_ID_88E3016,
2100 .phy_id_mask = MARVELL_PHY_ID_MASK,
2101 .name = "Marvell 88E3016",
2102 .features = PHY_BASIC_FEATURES,
2103 .flags = PHY_HAS_INTERRUPT,
2104 .probe = marvell_probe,
2105 .config_init = &m88e3016_config_init,
2106 .aneg_done = &marvell_aneg_done,
2107 .read_status = &marvell_read_status,
2108 .ack_interrupt = &marvell_ack_interrupt,
2109 .config_intr = &marvell_config_intr,
2110 .did_interrupt = &m88e1121_did_interrupt,
2111 .resume = &genphy_resume,
2112 .suspend = &genphy_suspend,
2113 .read_page = marvell_read_page,
2114 .write_page = marvell_write_page,
2115 .get_sset_count = marvell_get_sset_count,
2116 .get_strings = marvell_get_strings,
2117 .get_stats = marvell_get_stats,
2118 },
2119 {
2120 .phy_id = MARVELL_PHY_ID_88E6390,
2121 .phy_id_mask = MARVELL_PHY_ID_MASK,
2122 .name = "Marvell 88E6390",
2123 .features = PHY_GBIT_FEATURES,
2124 .flags = PHY_HAS_INTERRUPT,
2125 .probe = m88e1510_probe,
2126 .config_init = &marvell_config_init,
2127 .config_aneg = &m88e1510_config_aneg,
2128 .read_status = &marvell_read_status,
2129 .ack_interrupt = &marvell_ack_interrupt,
2130 .config_intr = &marvell_config_intr,
2131 .did_interrupt = &m88e1121_did_interrupt,
2132 .resume = &genphy_resume,
2133 .suspend = &genphy_suspend,
2134 .read_page = marvell_read_page,
2135 .write_page = marvell_write_page,
2136 .get_sset_count = marvell_get_sset_count,
2137 .get_strings = marvell_get_strings,
2138 .get_stats = marvell_get_stats,
2139 },
2140 };
2141
2142 module_phy_driver(marvell_drivers);
2143
2144 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2145 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2146 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2147 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2148 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2149 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2150 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2151 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2152 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2153 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2154 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2155 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2156 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2157 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2158 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2159 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2160 { }
2161 };
2162
2163 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
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