drivers/net/phy/meson-gxl.c

   1 /*
   2  * Amlogic Meson GXL Internal PHY Driver
   3  *
   4  * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
   5  * Copyright (C) 2016 BayLibre, SAS. All rights reserved.
   6  * Author: Neil Armstrong <narmstrong@baylibre.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but WITHOUT
  14  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  16  * more details.
  17  *
  18  */
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/mii.h>
  22 #include <linux/ethtool.h>
  23 #include <linux/phy.h>
  24 #include <linux/netdevice.h>
  25
  26 static int meson_gxl_config_init(struct phy_device *phydev)
  27 {
  28         /* Enable Analog and DSP register Bank access by */
  29         phy_write(phydev, 0x14, 0x0000);
  30         phy_write(phydev, 0x14, 0x0400);
  31         phy_write(phydev, 0x14, 0x0000);
  32         phy_write(phydev, 0x14, 0x0400);
  33
  34         /* Write Analog register 23 */
  35         phy_write(phydev, 0x17, 0x8E0D);
  36         phy_write(phydev, 0x14, 0x4417);
  37
  38         /* Enable fractional PLL */
  39         phy_write(phydev, 0x17, 0x0005);
  40         phy_write(phydev, 0x14, 0x5C1B);
  41
  42         /* Program fraction FR_PLL_DIV1 */
  43         phy_write(phydev, 0x17, 0x029A);
  44         phy_write(phydev, 0x14, 0x5C1D);
  45
  46         /* Program fraction FR_PLL_DIV1 */
  47         phy_write(phydev, 0x17, 0xAAAA);
  48         phy_write(phydev, 0x14, 0x5C1C);
  49
  50         return 0;
  51 }
  52
  53 static struct phy_driver meson_gxl_phy[] = {
  54         {
  55                 .phy_id         = 0x01814400,
  56                 .phy_id_mask    = 0xfffffff0,
  57                 .name           = "Meson GXL Internal PHY",
  58                 .features       = PHY_BASIC_FEATURES,
  59                 .flags          = PHY_IS_INTERNAL,
  60                 .config_init    = meson_gxl_config_init,
  61                 .config_aneg    = genphy_config_aneg,
  62                 .aneg_done      = genphy_aneg_done,
  63                 .read_status    = genphy_read_status,
  64                 .suspend        = genphy_suspend,
  65                 .resume         = genphy_resume,
  66         },
  67 };
  68
  69 static struct mdio_device_id __maybe_unused meson_gxl_tbl[] = {
  70         { 0x01814400, 0xfffffff0 },
  71         { }
  72 };
  73
  74 module_phy_driver(meson_gxl_phy);
  75
  76 MODULE_DEVICE_TABLE(mdio, meson_gxl_tbl);
  77
  78 MODULE_DESCRIPTION("Amlogic Meson GXL Internal PHY driver");
  79 MODULE_AUTHOR("Baoqi wang");
  80 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
  81 MODULE_LICENSE("GPL");