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[PATCH] r8169: add module parameter (copybreak)
[mirror_ubuntu-bionic-kernel.git] / drivers / net / r8169.c
1 /*
2 =========================================================================
3 r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4 --------------------------------------------------------------------
5
6 History:
7 Feb 4 2002 - created initially by ShuChen <shuchen@realtek.com.tw>.
8 May 20 2002 - Add link status force-mode and TBI mode support.
9 2004 - Massive updates. See kernel SCM system for details.
10 =========================================================================
11 1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
12 Command: 'insmod r8169 media = SET_MEDIA'
13 Ex: 'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
14
15 SET_MEDIA can be:
16 _10_Half = 0x01
17 _10_Full = 0x02
18 _100_Half = 0x04
19 _100_Full = 0x08
20 _1000_Full = 0x10
21
22 2. Support TBI mode.
23 =========================================================================
24 VERSION 1.1 <2002/10/4>
25
26 The bit4:0 of MII register 4 is called "selector field", and have to be
27 00001b to indicate support of IEEE std 802.3 during NWay process of
28 exchanging Link Code Word (FLP).
29
30 VERSION 1.2 <2002/11/30>
31
32 - Large style cleanup
33 - Use ether_crc in stock kernel (linux/crc32.h)
34 - Copy mc_filter setup code from 8139cp
35 (includes an optimization, and avoids set_bit use)
36
37 VERSION 1.6LK <2004/04/14>
38
39 - Merge of Realtek's version 1.6
40 - Conversion to DMA API
41 - Suspend/resume
42 - Endianness
43 - Misc Rx/Tx bugs
44
45 VERSION 2.2LK <2005/01/25>
46
47 - RX csum, TX csum/SG, TSO
48 - VLAN
49 - baby (< 7200) Jumbo frames support
50 - Merge of Realtek's version 2.2 (new phy)
51 */
52
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/pci.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/delay.h>
59 #include <linux/ethtool.h>
60 #include <linux/mii.h>
61 #include <linux/if_vlan.h>
62 #include <linux/crc32.h>
63 #include <linux/in.h>
64 #include <linux/ip.h>
65 #include <linux/tcp.h>
66 #include <linux/init.h>
67 #include <linux/dma-mapping.h>
68
69 #include <asm/io.h>
70 #include <asm/irq.h>
71
72 #ifdef CONFIG_R8169_NAPI
73 #define NAPI_SUFFIX "-NAPI"
74 #else
75 #define NAPI_SUFFIX ""
76 #endif
77
78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
79 #define MODULENAME "r8169"
80 #define PFX MODULENAME ": "
81
82 #ifdef RTL8169_DEBUG
83 #define assert(expr) \
84 if(!(expr)) { \
85 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
86 #expr,__FILE__,__FUNCTION__,__LINE__); \
87 }
88 #define dprintk(fmt, args...) do { printk(PFX fmt, ## args); } while (0)
89 #else
90 #define assert(expr) do {} while (0)
91 #define dprintk(fmt, args...) do {} while (0)
92 #endif /* RTL8169_DEBUG */
93
94 #define TX_BUFFS_AVAIL(tp) \
95 (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
96
97 #ifdef CONFIG_R8169_NAPI
98 #define rtl8169_rx_skb netif_receive_skb
99 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_rx
100 #define rtl8169_rx_quota(count, quota) min(count, quota)
101 #else
102 #define rtl8169_rx_skb netif_rx
103 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_receive_skb
104 #define rtl8169_rx_quota(count, quota) count
105 #endif
106
107 /* media options */
108 #define MAX_UNITS 8
109 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
110 static int num_media = 0;
111
112 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
113 static int max_interrupt_work = 20;
114
115 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
116 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
117 static int multicast_filter_limit = 32;
118
119 /* MAC address length */
120 #define MAC_ADDR_LEN 6
121
122 #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
123 #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
124 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
125 #define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
126 #define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
127 #define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */
128 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
129
130 #define R8169_REGS_SIZE 256
131 #define R8169_NAPI_WEIGHT 64
132 #define NUM_TX_DESC 64 /* Number of Tx descriptor registers */
133 #define NUM_RX_DESC 256 /* Number of Rx descriptor registers */
134 #define RX_BUF_SIZE 1536 /* Rx Buffer size */
135 #define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
136 #define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
137
138 #define RTL8169_TX_TIMEOUT (6*HZ)
139 #define RTL8169_PHY_TIMEOUT (10*HZ)
140
141 /* write/read MMIO register */
142 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
143 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
144 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
145 #define RTL_R8(reg) readb (ioaddr + (reg))
146 #define RTL_R16(reg) readw (ioaddr + (reg))
147 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
148
149 enum mac_version {
150 RTL_GIGA_MAC_VER_B = 0x00,
151 /* RTL_GIGA_MAC_VER_C = 0x03, */
152 RTL_GIGA_MAC_VER_D = 0x01,
153 RTL_GIGA_MAC_VER_E = 0x02,
154 RTL_GIGA_MAC_VER_X = 0x04 /* Greater than RTL_GIGA_MAC_VER_E */
155 };
156
157 enum phy_version {
158 RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
159 RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
160 RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
161 RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
162 RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
163 RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
164 };
165
166
167 #define _R(NAME,MAC,MASK) \
168 { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
169
170 const static struct {
171 const char *name;
172 u8 mac_version;
173 u32 RxConfigMask; /* Clears the bits supported by this chip */
174 } rtl_chip_info[] = {
175 _R("RTL8169", RTL_GIGA_MAC_VER_B, 0xff7e1880),
176 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_D, 0xff7e1880),
177 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_E, 0xff7e1880),
178 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_X, 0xff7e1880),
179 };
180 #undef _R
181
182 static struct pci_device_id rtl8169_pci_tbl[] = {
183 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), },
184 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), },
185 { PCI_DEVICE(0x16ec, 0x0116), },
186 {0,},
187 };
188
189 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
190
191 static int rx_copybreak = 200;
192 static int use_dac;
193
194 enum RTL8169_registers {
195 MAC0 = 0, /* Ethernet hardware address. */
196 MAR0 = 8, /* Multicast filter. */
197 TxDescStartAddrLow = 0x20,
198 TxDescStartAddrHigh = 0x24,
199 TxHDescStartAddrLow = 0x28,
200 TxHDescStartAddrHigh = 0x2c,
201 FLASH = 0x30,
202 ERSR = 0x36,
203 ChipCmd = 0x37,
204 TxPoll = 0x38,
205 IntrMask = 0x3C,
206 IntrStatus = 0x3E,
207 TxConfig = 0x40,
208 RxConfig = 0x44,
209 RxMissed = 0x4C,
210 Cfg9346 = 0x50,
211 Config0 = 0x51,
212 Config1 = 0x52,
213 Config2 = 0x53,
214 Config3 = 0x54,
215 Config4 = 0x55,
216 Config5 = 0x56,
217 MultiIntr = 0x5C,
218 PHYAR = 0x60,
219 TBICSR = 0x64,
220 TBI_ANAR = 0x68,
221 TBI_LPAR = 0x6A,
222 PHYstatus = 0x6C,
223 RxMaxSize = 0xDA,
224 CPlusCmd = 0xE0,
225 IntrMitigate = 0xE2,
226 RxDescAddrLow = 0xE4,
227 RxDescAddrHigh = 0xE8,
228 EarlyTxThres = 0xEC,
229 FuncEvent = 0xF0,
230 FuncEventMask = 0xF4,
231 FuncPresetState = 0xF8,
232 FuncForceEvent = 0xFC,
233 };
234
235 enum RTL8169_register_content {
236 /* InterruptStatusBits */
237 SYSErr = 0x8000,
238 PCSTimeout = 0x4000,
239 SWInt = 0x0100,
240 TxDescUnavail = 0x80,
241 RxFIFOOver = 0x40,
242 LinkChg = 0x20,
243 RxOverflow = 0x10,
244 TxErr = 0x08,
245 TxOK = 0x04,
246 RxErr = 0x02,
247 RxOK = 0x01,
248
249 /* RxStatusDesc */
250 RxRES = 0x00200000,
251 RxCRC = 0x00080000,
252 RxRUNT = 0x00100000,
253 RxRWT = 0x00400000,
254
255 /* ChipCmdBits */
256 CmdReset = 0x10,
257 CmdRxEnb = 0x08,
258 CmdTxEnb = 0x04,
259 RxBufEmpty = 0x01,
260
261 /* Cfg9346Bits */
262 Cfg9346_Lock = 0x00,
263 Cfg9346_Unlock = 0xC0,
264
265 /* rx_mode_bits */
266 AcceptErr = 0x20,
267 AcceptRunt = 0x10,
268 AcceptBroadcast = 0x08,
269 AcceptMulticast = 0x04,
270 AcceptMyPhys = 0x02,
271 AcceptAllPhys = 0x01,
272
273 /* RxConfigBits */
274 RxCfgFIFOShift = 13,
275 RxCfgDMAShift = 8,
276
277 /* TxConfigBits */
278 TxInterFrameGapShift = 24,
279 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
280
281 /* TBICSR p.28 */
282 TBIReset = 0x80000000,
283 TBILoopback = 0x40000000,
284 TBINwEnable = 0x20000000,
285 TBINwRestart = 0x10000000,
286 TBILinkOk = 0x02000000,
287 TBINwComplete = 0x01000000,
288
289 /* CPlusCmd p.31 */
290 RxVlan = (1 << 6),
291 RxChkSum = (1 << 5),
292 PCIDAC = (1 << 4),
293 PCIMulRW = (1 << 3),
294
295 /* rtl8169_PHYstatus */
296 TBI_Enable = 0x80,
297 TxFlowCtrl = 0x40,
298 RxFlowCtrl = 0x20,
299 _1000bpsF = 0x10,
300 _100bps = 0x08,
301 _10bps = 0x04,
302 LinkStatus = 0x02,
303 FullDup = 0x01,
304
305 /* GIGABIT_PHY_registers */
306 PHY_CTRL_REG = 0,
307 PHY_STAT_REG = 1,
308 PHY_AUTO_NEGO_REG = 4,
309 PHY_1000_CTRL_REG = 9,
310
311 /* GIGABIT_PHY_REG_BIT */
312 PHY_Restart_Auto_Nego = 0x0200,
313 PHY_Enable_Auto_Nego = 0x1000,
314
315 /* PHY_STAT_REG = 1 */
316 PHY_Auto_Neco_Comp = 0x0020,
317
318 /* PHY_AUTO_NEGO_REG = 4 */
319 PHY_Cap_10_Half = 0x0020,
320 PHY_Cap_10_Full = 0x0040,
321 PHY_Cap_100_Half = 0x0080,
322 PHY_Cap_100_Full = 0x0100,
323
324 /* PHY_1000_CTRL_REG = 9 */
325 PHY_Cap_1000_Full = 0x0200,
326
327 PHY_Cap_Null = 0x0,
328
329 /* _MediaType */
330 _10_Half = 0x01,
331 _10_Full = 0x02,
332 _100_Half = 0x04,
333 _100_Full = 0x08,
334 _1000_Full = 0x10,
335
336 /* _TBICSRBit */
337 TBILinkOK = 0x02000000,
338 };
339
340 enum _DescStatusBit {
341 DescOwn = (1 << 31), /* Descriptor is owned by NIC */
342 RingEnd = (1 << 30), /* End of descriptor ring */
343 FirstFrag = (1 << 29), /* First segment of a packet */
344 LastFrag = (1 << 28), /* Final segment of a packet */
345
346 /* Tx private */
347 LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */
348 MSSShift = 16, /* MSS value position */
349 MSSMask = 0xfff, /* MSS value + LargeSend bit: 12 bits */
350 IPCS = (1 << 18), /* Calculate IP checksum */
351 UDPCS = (1 << 17), /* Calculate UDP/IP checksum */
352 TCPCS = (1 << 16), /* Calculate TCP/IP checksum */
353 TxVlanTag = (1 << 17), /* Add VLAN tag */
354
355 /* Rx private */
356 PID1 = (1 << 18), /* Protocol ID bit 1/2 */
357 PID0 = (1 << 17), /* Protocol ID bit 2/2 */
358
359 #define RxProtoUDP (PID1)
360 #define RxProtoTCP (PID0)
361 #define RxProtoIP (PID1 | PID0)
362 #define RxProtoMask RxProtoIP
363
364 IPFail = (1 << 16), /* IP checksum failed */
365 UDPFail = (1 << 15), /* UDP/IP checksum failed */
366 TCPFail = (1 << 14), /* TCP/IP checksum failed */
367 RxVlanTag = (1 << 16), /* VLAN tag available */
368 };
369
370 #define RsvdMask 0x3fffc000
371
372 struct TxDesc {
373 u32 opts1;
374 u32 opts2;
375 u64 addr;
376 };
377
378 struct RxDesc {
379 u32 opts1;
380 u32 opts2;
381 u64 addr;
382 };
383
384 struct ring_info {
385 struct sk_buff *skb;
386 u32 len;
387 u8 __pad[sizeof(void *) - sizeof(u32)];
388 };
389
390 struct rtl8169_private {
391 void __iomem *mmio_addr; /* memory map physical address */
392 struct pci_dev *pci_dev; /* Index of PCI device */
393 struct net_device_stats stats; /* statistics of net device */
394 spinlock_t lock; /* spin lock flag */
395 int chipset;
396 int mac_version;
397 int phy_version;
398 u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
399 u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
400 u32 dirty_rx;
401 u32 dirty_tx;
402 struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
403 struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
404 dma_addr_t TxPhyAddr;
405 dma_addr_t RxPhyAddr;
406 struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
407 struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */
408 unsigned rx_buf_sz;
409 struct timer_list timer;
410 u16 cp_cmd;
411 u16 intr_mask;
412 int phy_auto_nego_reg;
413 int phy_1000_ctrl_reg;
414 #ifdef CONFIG_R8169_VLAN
415 struct vlan_group *vlgrp;
416 #endif
417 int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
418 void (*get_settings)(struct net_device *, struct ethtool_cmd *);
419 void (*phy_reset_enable)(void __iomem *);
420 unsigned int (*phy_reset_pending)(void __iomem *);
421 unsigned int (*link_ok)(void __iomem *);
422 struct work_struct task;
423 };
424
425 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@oss.sgi.com>");
426 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
427 module_param_array(media, int, &num_media, 0);
428 module_param(rx_copybreak, int, 0);
429 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
430 module_param(use_dac, int, 0);
431 MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
432 MODULE_LICENSE("GPL");
433 MODULE_VERSION(RTL8169_VERSION);
434
435 static int rtl8169_open(struct net_device *dev);
436 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
437 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance,
438 struct pt_regs *regs);
439 static int rtl8169_init_ring(struct net_device *dev);
440 static void rtl8169_hw_start(struct net_device *dev);
441 static int rtl8169_close(struct net_device *dev);
442 static void rtl8169_set_rx_mode(struct net_device *dev);
443 static void rtl8169_tx_timeout(struct net_device *dev);
444 static struct net_device_stats *rtl8169_get_stats(struct net_device *netdev);
445 static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
446 void __iomem *);
447 static int rtl8169_change_mtu(struct net_device *netdev, int new_mtu);
448 static void rtl8169_down(struct net_device *dev);
449
450 #ifdef CONFIG_R8169_NAPI
451 static int rtl8169_poll(struct net_device *dev, int *budget);
452 #endif
453
454 static const u16 rtl8169_intr_mask =
455 SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
456 static const u16 rtl8169_napi_event =
457 RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
458 static const unsigned int rtl8169_rx_config =
459 (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
460
461 #define PHY_Cap_10_Half_Or_Less PHY_Cap_10_Half
462 #define PHY_Cap_10_Full_Or_Less PHY_Cap_10_Full | PHY_Cap_10_Half_Or_Less
463 #define PHY_Cap_100_Half_Or_Less PHY_Cap_100_Half | PHY_Cap_10_Full_Or_Less
464 #define PHY_Cap_100_Full_Or_Less PHY_Cap_100_Full | PHY_Cap_100_Half_Or_Less
465
466 static void mdio_write(void __iomem *ioaddr, int RegAddr, int value)
467 {
468 int i;
469
470 RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
471 udelay(1000);
472
473 for (i = 2000; i > 0; i--) {
474 /* Check if the RTL8169 has completed writing to the specified MII register */
475 if (!(RTL_R32(PHYAR) & 0x80000000))
476 break;
477 udelay(100);
478 }
479 }
480
481 static int mdio_read(void __iomem *ioaddr, int RegAddr)
482 {
483 int i, value = -1;
484
485 RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
486 udelay(1000);
487
488 for (i = 2000; i > 0; i--) {
489 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
490 if (RTL_R32(PHYAR) & 0x80000000) {
491 value = (int) (RTL_R32(PHYAR) & 0xFFFF);
492 break;
493 }
494 udelay(100);
495 }
496 return value;
497 }
498
499 static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
500 {
501 RTL_W16(IntrMask, 0x0000);
502
503 RTL_W16(IntrStatus, 0xffff);
504 }
505
506 static void rtl8169_asic_down(void __iomem *ioaddr)
507 {
508 RTL_W8(ChipCmd, 0x00);
509 rtl8169_irq_mask_and_ack(ioaddr);
510 RTL_R16(CPlusCmd);
511 }
512
513 static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr)
514 {
515 return RTL_R32(TBICSR) & TBIReset;
516 }
517
518 static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr)
519 {
520 return mdio_read(ioaddr, 0) & 0x8000;
521 }
522
523 static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
524 {
525 return RTL_R32(TBICSR) & TBILinkOk;
526 }
527
528 static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
529 {
530 return RTL_R8(PHYstatus) & LinkStatus;
531 }
532
533 static void rtl8169_tbi_reset_enable(void __iomem *ioaddr)
534 {
535 RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
536 }
537
538 static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
539 {
540 unsigned int val;
541
542 val = (mdio_read(ioaddr, PHY_CTRL_REG) | 0x8000) & 0xffff;
543 mdio_write(ioaddr, PHY_CTRL_REG, val);
544 }
545
546 static void rtl8169_check_link_status(struct net_device *dev,
547 struct rtl8169_private *tp, void __iomem *ioaddr)
548 {
549 unsigned long flags;
550
551 spin_lock_irqsave(&tp->lock, flags);
552 if (tp->link_ok(ioaddr)) {
553 netif_carrier_on(dev);
554 printk(KERN_INFO PFX "%s: link up\n", dev->name);
555 } else
556 netif_carrier_off(dev);
557 spin_unlock_irqrestore(&tp->lock, flags);
558 }
559
560 static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
561 {
562 struct {
563 u16 speed;
564 u8 duplex;
565 u8 autoneg;
566 u8 media;
567 } link_settings[] = {
568 { SPEED_10, DUPLEX_HALF, AUTONEG_DISABLE, _10_Half },
569 { SPEED_10, DUPLEX_FULL, AUTONEG_DISABLE, _10_Full },
570 { SPEED_100, DUPLEX_HALF, AUTONEG_DISABLE, _100_Half },
571 { SPEED_100, DUPLEX_FULL, AUTONEG_DISABLE, _100_Full },
572 { SPEED_1000, DUPLEX_FULL, AUTONEG_DISABLE, _1000_Full },
573 /* Make TBI happy */
574 { SPEED_1000, DUPLEX_FULL, AUTONEG_ENABLE, 0xff }
575 }, *p;
576 unsigned char option;
577
578 option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
579
580 if ((option != 0xff) && !idx)
581 printk(KERN_WARNING PFX "media option is deprecated.\n");
582
583 for (p = link_settings; p->media != 0xff; p++) {
584 if (p->media == option)
585 break;
586 }
587 *autoneg = p->autoneg;
588 *speed = p->speed;
589 *duplex = p->duplex;
590 }
591
592 static void rtl8169_get_drvinfo(struct net_device *dev,
593 struct ethtool_drvinfo *info)
594 {
595 struct rtl8169_private *tp = netdev_priv(dev);
596
597 strcpy(info->driver, MODULENAME);
598 strcpy(info->version, RTL8169_VERSION);
599 strcpy(info->bus_info, pci_name(tp->pci_dev));
600 }
601
602 static int rtl8169_get_regs_len(struct net_device *dev)
603 {
604 return R8169_REGS_SIZE;
605 }
606
607 static int rtl8169_set_speed_tbi(struct net_device *dev,
608 u8 autoneg, u16 speed, u8 duplex)
609 {
610 struct rtl8169_private *tp = netdev_priv(dev);
611 void __iomem *ioaddr = tp->mmio_addr;
612 int ret = 0;
613 u32 reg;
614
615 reg = RTL_R32(TBICSR);
616 if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
617 (duplex == DUPLEX_FULL)) {
618 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
619 } else if (autoneg == AUTONEG_ENABLE)
620 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
621 else {
622 printk(KERN_WARNING PFX
623 "%s: incorrect speed setting refused in TBI mode\n",
624 dev->name);
625 ret = -EOPNOTSUPP;
626 }
627
628 return ret;
629 }
630
631 static int rtl8169_set_speed_xmii(struct net_device *dev,
632 u8 autoneg, u16 speed, u8 duplex)
633 {
634 struct rtl8169_private *tp = netdev_priv(dev);
635 void __iomem *ioaddr = tp->mmio_addr;
636 int auto_nego, giga_ctrl;
637
638 auto_nego = mdio_read(ioaddr, PHY_AUTO_NEGO_REG);
639 auto_nego &= ~(PHY_Cap_10_Half | PHY_Cap_10_Full |
640 PHY_Cap_100_Half | PHY_Cap_100_Full);
641 giga_ctrl = mdio_read(ioaddr, PHY_1000_CTRL_REG);
642 giga_ctrl &= ~(PHY_Cap_1000_Full | PHY_Cap_Null);
643
644 if (autoneg == AUTONEG_ENABLE) {
645 auto_nego |= (PHY_Cap_10_Half | PHY_Cap_10_Full |
646 PHY_Cap_100_Half | PHY_Cap_100_Full);
647 giga_ctrl |= PHY_Cap_1000_Full;
648 } else {
649 if (speed == SPEED_10)
650 auto_nego |= PHY_Cap_10_Half | PHY_Cap_10_Full;
651 else if (speed == SPEED_100)
652 auto_nego |= PHY_Cap_100_Half | PHY_Cap_100_Full;
653 else if (speed == SPEED_1000)
654 giga_ctrl |= PHY_Cap_1000_Full;
655
656 if (duplex == DUPLEX_HALF)
657 auto_nego &= ~(PHY_Cap_10_Full | PHY_Cap_100_Full);
658 }
659
660 tp->phy_auto_nego_reg = auto_nego;
661 tp->phy_1000_ctrl_reg = giga_ctrl;
662
663 mdio_write(ioaddr, PHY_AUTO_NEGO_REG, auto_nego);
664 mdio_write(ioaddr, PHY_1000_CTRL_REG, giga_ctrl);
665 mdio_write(ioaddr, PHY_CTRL_REG, PHY_Enable_Auto_Nego |
666 PHY_Restart_Auto_Nego);
667 return 0;
668 }
669
670 static int rtl8169_set_speed(struct net_device *dev,
671 u8 autoneg, u16 speed, u8 duplex)
672 {
673 struct rtl8169_private *tp = netdev_priv(dev);
674 int ret;
675
676 ret = tp->set_speed(dev, autoneg, speed, duplex);
677
678 if (netif_running(dev) && (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
679 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
680
681 return ret;
682 }
683
684 static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
685 {
686 struct rtl8169_private *tp = netdev_priv(dev);
687 unsigned long flags;
688 int ret;
689
690 spin_lock_irqsave(&tp->lock, flags);
691 ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
692 spin_unlock_irqrestore(&tp->lock, flags);
693
694 return ret;
695 }
696
697 static u32 rtl8169_get_rx_csum(struct net_device *dev)
698 {
699 struct rtl8169_private *tp = netdev_priv(dev);
700
701 return tp->cp_cmd & RxChkSum;
702 }
703
704 static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
705 {
706 struct rtl8169_private *tp = netdev_priv(dev);
707 void __iomem *ioaddr = tp->mmio_addr;
708 unsigned long flags;
709
710 spin_lock_irqsave(&tp->lock, flags);
711
712 if (data)
713 tp->cp_cmd |= RxChkSum;
714 else
715 tp->cp_cmd &= ~RxChkSum;
716
717 RTL_W16(CPlusCmd, tp->cp_cmd);
718 RTL_R16(CPlusCmd);
719
720 spin_unlock_irqrestore(&tp->lock, flags);
721
722 return 0;
723 }
724
725 #ifdef CONFIG_R8169_VLAN
726
727 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
728 struct sk_buff *skb)
729 {
730 return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
731 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
732 }
733
734 static void rtl8169_vlan_rx_register(struct net_device *dev,
735 struct vlan_group *grp)
736 {
737 struct rtl8169_private *tp = netdev_priv(dev);
738 void __iomem *ioaddr = tp->mmio_addr;
739 unsigned long flags;
740
741 spin_lock_irqsave(&tp->lock, flags);
742 tp->vlgrp = grp;
743 if (tp->vlgrp)
744 tp->cp_cmd |= RxVlan;
745 else
746 tp->cp_cmd &= ~RxVlan;
747 RTL_W16(CPlusCmd, tp->cp_cmd);
748 RTL_R16(CPlusCmd);
749 spin_unlock_irqrestore(&tp->lock, flags);
750 }
751
752 static void rtl8169_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
753 {
754 struct rtl8169_private *tp = netdev_priv(dev);
755 unsigned long flags;
756
757 spin_lock_irqsave(&tp->lock, flags);
758 if (tp->vlgrp)
759 tp->vlgrp->vlan_devices[vid] = NULL;
760 spin_unlock_irqrestore(&tp->lock, flags);
761 }
762
763 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
764 struct sk_buff *skb)
765 {
766 u32 opts2 = le32_to_cpu(desc->opts2);
767 int ret;
768
769 if (tp->vlgrp && (opts2 & RxVlanTag)) {
770 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp,
771 swab16(opts2 & 0xffff));
772 ret = 0;
773 } else
774 ret = -1;
775 desc->opts2 = 0;
776 return ret;
777 }
778
779 #else /* !CONFIG_R8169_VLAN */
780
781 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
782 struct sk_buff *skb)
783 {
784 return 0;
785 }
786
787 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
788 struct sk_buff *skb)
789 {
790 return -1;
791 }
792
793 #endif
794
795 static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
796 {
797 struct rtl8169_private *tp = netdev_priv(dev);
798 void __iomem *ioaddr = tp->mmio_addr;
799 u32 status;
800
801 cmd->supported =
802 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
803 cmd->port = PORT_FIBRE;
804 cmd->transceiver = XCVR_INTERNAL;
805
806 status = RTL_R32(TBICSR);
807 cmd->advertising = (status & TBINwEnable) ? ADVERTISED_Autoneg : 0;
808 cmd->autoneg = !!(status & TBINwEnable);
809
810 cmd->speed = SPEED_1000;
811 cmd->duplex = DUPLEX_FULL; /* Always set */
812 }
813
814 static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
815 {
816 struct rtl8169_private *tp = netdev_priv(dev);
817 void __iomem *ioaddr = tp->mmio_addr;
818 u8 status;
819
820 cmd->supported = SUPPORTED_10baseT_Half |
821 SUPPORTED_10baseT_Full |
822 SUPPORTED_100baseT_Half |
823 SUPPORTED_100baseT_Full |
824 SUPPORTED_1000baseT_Full |
825 SUPPORTED_Autoneg |
826 SUPPORTED_TP;
827
828 cmd->autoneg = 1;
829 cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
830
831 if (tp->phy_auto_nego_reg & PHY_Cap_10_Half)
832 cmd->advertising |= ADVERTISED_10baseT_Half;
833 if (tp->phy_auto_nego_reg & PHY_Cap_10_Full)
834 cmd->advertising |= ADVERTISED_10baseT_Full;
835 if (tp->phy_auto_nego_reg & PHY_Cap_100_Half)
836 cmd->advertising |= ADVERTISED_100baseT_Half;
837 if (tp->phy_auto_nego_reg & PHY_Cap_100_Full)
838 cmd->advertising |= ADVERTISED_100baseT_Full;
839 if (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full)
840 cmd->advertising |= ADVERTISED_1000baseT_Full;
841
842 status = RTL_R8(PHYstatus);
843
844 if (status & _1000bpsF)
845 cmd->speed = SPEED_1000;
846 else if (status & _100bps)
847 cmd->speed = SPEED_100;
848 else if (status & _10bps)
849 cmd->speed = SPEED_10;
850
851 cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
852 DUPLEX_FULL : DUPLEX_HALF;
853 }
854
855 static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
856 {
857 struct rtl8169_private *tp = netdev_priv(dev);
858 unsigned long flags;
859
860 spin_lock_irqsave(&tp->lock, flags);
861
862 tp->get_settings(dev, cmd);
863
864 spin_unlock_irqrestore(&tp->lock, flags);
865 return 0;
866 }
867
868 static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
869 void *p)
870 {
871 struct rtl8169_private *tp = netdev_priv(dev);
872 unsigned long flags;
873
874 if (regs->len > R8169_REGS_SIZE)
875 regs->len = R8169_REGS_SIZE;
876
877 spin_lock_irqsave(&tp->lock, flags);
878 memcpy_fromio(p, tp->mmio_addr, regs->len);
879 spin_unlock_irqrestore(&tp->lock, flags);
880 }
881
882 static struct ethtool_ops rtl8169_ethtool_ops = {
883 .get_drvinfo = rtl8169_get_drvinfo,
884 .get_regs_len = rtl8169_get_regs_len,
885 .get_link = ethtool_op_get_link,
886 .get_settings = rtl8169_get_settings,
887 .set_settings = rtl8169_set_settings,
888 .get_rx_csum = rtl8169_get_rx_csum,
889 .set_rx_csum = rtl8169_set_rx_csum,
890 .get_tx_csum = ethtool_op_get_tx_csum,
891 .set_tx_csum = ethtool_op_set_tx_csum,
892 .get_sg = ethtool_op_get_sg,
893 .set_sg = ethtool_op_set_sg,
894 .get_tso = ethtool_op_get_tso,
895 .set_tso = ethtool_op_set_tso,
896 .get_regs = rtl8169_get_regs,
897 };
898
899 static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum,
900 int bitval)
901 {
902 int val;
903
904 val = mdio_read(ioaddr, reg);
905 val = (bitval == 1) ?
906 val | (bitval << bitnum) : val & ~(0x0001 << bitnum);
907 mdio_write(ioaddr, reg, val & 0xffff);
908 }
909
910 static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
911 {
912 const struct {
913 u32 mask;
914 int mac_version;
915 } mac_info[] = {
916 { 0x1 << 28, RTL_GIGA_MAC_VER_X },
917 { 0x1 << 26, RTL_GIGA_MAC_VER_E },
918 { 0x1 << 23, RTL_GIGA_MAC_VER_D },
919 { 0x00000000, RTL_GIGA_MAC_VER_B } /* Catch-all */
920 }, *p = mac_info;
921 u32 reg;
922
923 reg = RTL_R32(TxConfig) & 0x7c800000;
924 while ((reg & p->mask) != p->mask)
925 p++;
926 tp->mac_version = p->mac_version;
927 }
928
929 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
930 {
931 struct {
932 int version;
933 char *msg;
934 } mac_print[] = {
935 { RTL_GIGA_MAC_VER_E, "RTL_GIGA_MAC_VER_E" },
936 { RTL_GIGA_MAC_VER_D, "RTL_GIGA_MAC_VER_D" },
937 { RTL_GIGA_MAC_VER_B, "RTL_GIGA_MAC_VER_B" },
938 { 0, NULL }
939 }, *p;
940
941 for (p = mac_print; p->msg; p++) {
942 if (tp->mac_version == p->version) {
943 dprintk("mac_version == %s (%04d)\n", p->msg,
944 p->version);
945 return;
946 }
947 }
948 dprintk("mac_version == Unknown\n");
949 }
950
951 static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr)
952 {
953 const struct {
954 u16 mask;
955 u16 set;
956 int phy_version;
957 } phy_info[] = {
958 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
959 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
960 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
961 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
962 }, *p = phy_info;
963 u16 reg;
964
965 reg = mdio_read(ioaddr, 3) & 0xffff;
966 while ((reg & p->mask) != p->set)
967 p++;
968 tp->phy_version = p->phy_version;
969 }
970
971 static void rtl8169_print_phy_version(struct rtl8169_private *tp)
972 {
973 struct {
974 int version;
975 char *msg;
976 u32 reg;
977 } phy_print[] = {
978 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
979 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
980 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
981 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
982 { 0, NULL, 0x0000 }
983 }, *p;
984
985 for (p = phy_print; p->msg; p++) {
986 if (tp->phy_version == p->version) {
987 dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
988 return;
989 }
990 }
991 dprintk("phy_version == Unknown\n");
992 }
993
994 static void rtl8169_hw_phy_config(struct net_device *dev)
995 {
996 struct rtl8169_private *tp = netdev_priv(dev);
997 void __iomem *ioaddr = tp->mmio_addr;
998 struct {
999 u16 regs[5]; /* Beware of bit-sign propagation */
1000 } phy_magic[5] = { {
1001 { 0x0000, //w 4 15 12 0
1002 0x00a1, //w 3 15 0 00a1
1003 0x0008, //w 2 15 0 0008
1004 0x1020, //w 1 15 0 1020
1005 0x1000 } },{ //w 0 15 0 1000
1006 { 0x7000, //w 4 15 12 7
1007 0xff41, //w 3 15 0 ff41
1008 0xde60, //w 2 15 0 de60
1009 0x0140, //w 1 15 0 0140
1010 0x0077 } },{ //w 0 15 0 0077
1011 { 0xa000, //w 4 15 12 a
1012 0xdf01, //w 3 15 0 df01
1013 0xdf20, //w 2 15 0 df20
1014 0xff95, //w 1 15 0 ff95
1015 0xfa00 } },{ //w 0 15 0 fa00
1016 { 0xb000, //w 4 15 12 b
1017 0xff41, //w 3 15 0 ff41
1018 0xde20, //w 2 15 0 de20
1019 0x0140, //w 1 15 0 0140
1020 0x00bb } },{ //w 0 15 0 00bb
1021 { 0xf000, //w 4 15 12 f
1022 0xdf01, //w 3 15 0 df01
1023 0xdf20, //w 2 15 0 df20
1024 0xff95, //w 1 15 0 ff95
1025 0xbf00 } //w 0 15 0 bf00
1026 }
1027 }, *p = phy_magic;
1028 int i;
1029
1030 rtl8169_print_mac_version(tp);
1031 rtl8169_print_phy_version(tp);
1032
1033 if (tp->mac_version <= RTL_GIGA_MAC_VER_B)
1034 return;
1035 if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
1036 return;
1037
1038 dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1039 dprintk("Do final_reg2.cfg\n");
1040
1041 /* Shazam ! */
1042
1043 if (tp->mac_version == RTL_GIGA_MAC_VER_X) {
1044 mdio_write(ioaddr, 31, 0x0001);
1045 mdio_write(ioaddr, 9, 0x273a);
1046 mdio_write(ioaddr, 14, 0x7bfb);
1047 mdio_write(ioaddr, 27, 0x841e);
1048
1049 mdio_write(ioaddr, 31, 0x0002);
1050 mdio_write(ioaddr, 1, 0x90d0);
1051 mdio_write(ioaddr, 31, 0x0000);
1052 return;
1053 }
1054
1055 /* phy config for RTL8169s mac_version C chip */
1056 mdio_write(ioaddr, 31, 0x0001); //w 31 2 0 1
1057 mdio_write(ioaddr, 21, 0x1000); //w 21 15 0 1000
1058 mdio_write(ioaddr, 24, 0x65c7); //w 24 15 0 65c7
1059 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1060
1061 for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
1062 int val, pos = 4;
1063
1064 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
1065 mdio_write(ioaddr, pos, val);
1066 while (--pos >= 0)
1067 mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
1068 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
1069 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1070 }
1071 mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
1072 }
1073
1074 static void rtl8169_phy_timer(unsigned long __opaque)
1075 {
1076 struct net_device *dev = (struct net_device *)__opaque;
1077 struct rtl8169_private *tp = netdev_priv(dev);
1078 struct timer_list *timer = &tp->timer;
1079 void __iomem *ioaddr = tp->mmio_addr;
1080 unsigned long timeout = RTL8169_PHY_TIMEOUT;
1081
1082 assert(tp->mac_version > RTL_GIGA_MAC_VER_B);
1083 assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
1084
1085 if (!(tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
1086 return;
1087
1088 spin_lock_irq(&tp->lock);
1089
1090 if (tp->phy_reset_pending(ioaddr)) {
1091 /*
1092 * A busy loop could burn quite a few cycles on nowadays CPU.
1093 * Let's delay the execution of the timer for a few ticks.
1094 */
1095 timeout = HZ/10;
1096 goto out_mod_timer;
1097 }
1098
1099 if (tp->link_ok(ioaddr))
1100 goto out_unlock;
1101
1102 printk(KERN_WARNING PFX "%s: PHY reset until link up\n", dev->name);
1103
1104 tp->phy_reset_enable(ioaddr);
1105
1106 out_mod_timer:
1107 mod_timer(timer, jiffies + timeout);
1108 out_unlock:
1109 spin_unlock_irq(&tp->lock);
1110 }
1111
1112 static inline void rtl8169_delete_timer(struct net_device *dev)
1113 {
1114 struct rtl8169_private *tp = netdev_priv(dev);
1115 struct timer_list *timer = &tp->timer;
1116
1117 if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1118 (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1119 return;
1120
1121 del_timer_sync(timer);
1122 }
1123
1124 static inline void rtl8169_request_timer(struct net_device *dev)
1125 {
1126 struct rtl8169_private *tp = netdev_priv(dev);
1127 struct timer_list *timer = &tp->timer;
1128
1129 if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1130 (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1131 return;
1132
1133 init_timer(timer);
1134 timer->expires = jiffies + RTL8169_PHY_TIMEOUT;
1135 timer->data = (unsigned long)(dev);
1136 timer->function = rtl8169_phy_timer;
1137 add_timer(timer);
1138 }
1139
1140 #ifdef CONFIG_NET_POLL_CONTROLLER
1141 /*
1142 * Polling 'interrupt' - used by things like netconsole to send skbs
1143 * without having to re-enable interrupts. It's not called while
1144 * the interrupt routine is executing.
1145 */
1146 static void rtl8169_netpoll(struct net_device *dev)
1147 {
1148 struct rtl8169_private *tp = netdev_priv(dev);
1149 struct pci_dev *pdev = tp->pci_dev;
1150
1151 disable_irq(pdev->irq);
1152 rtl8169_interrupt(pdev->irq, dev, NULL);
1153 enable_irq(pdev->irq);
1154 }
1155 #endif
1156
1157 static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
1158 void __iomem *ioaddr)
1159 {
1160 iounmap(ioaddr);
1161 pci_release_regions(pdev);
1162 pci_disable_device(pdev);
1163 free_netdev(dev);
1164 }
1165
1166 static int __devinit
1167 rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out,
1168 void __iomem **ioaddr_out)
1169 {
1170 void __iomem *ioaddr;
1171 struct net_device *dev;
1172 struct rtl8169_private *tp;
1173 int rc = -ENOMEM, i, acpi_idle_state = 0, pm_cap;
1174
1175 assert(ioaddr_out != NULL);
1176
1177 /* dev zeroed in alloc_etherdev */
1178 dev = alloc_etherdev(sizeof (*tp));
1179 if (dev == NULL) {
1180 printk(KERN_ERR PFX "unable to alloc new ethernet\n");
1181 goto err_out;
1182 }
1183
1184 SET_MODULE_OWNER(dev);
1185 SET_NETDEV_DEV(dev, &pdev->dev);
1186 tp = netdev_priv(dev);
1187
1188 /* enable device (incl. PCI PM wakeup and hotplug setup) */
1189 rc = pci_enable_device(pdev);
1190 if (rc) {
1191 printk(KERN_ERR PFX "%s: enable failure\n", pci_name(pdev));
1192 goto err_out_free_dev;
1193 }
1194
1195 rc = pci_set_mwi(pdev);
1196 if (rc < 0)
1197 goto err_out_disable;
1198
1199 /* save power state before pci_enable_device overwrites it */
1200 pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1201 if (pm_cap) {
1202 u16 pwr_command;
1203
1204 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1205 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1206 } else {
1207 printk(KERN_ERR PFX
1208 "Cannot find PowerManagement capability, aborting.\n");
1209 goto err_out_mwi;
1210 }
1211
1212 /* make sure PCI base addr 1 is MMIO */
1213 if (!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1214 printk(KERN_ERR PFX
1215 "region #1 not an MMIO resource, aborting\n");
1216 rc = -ENODEV;
1217 goto err_out_mwi;
1218 }
1219 /* check for weird/broken PCI region reporting */
1220 if (pci_resource_len(pdev, 1) < R8169_REGS_SIZE) {
1221 printk(KERN_ERR PFX "Invalid PCI region size(s), aborting\n");
1222 rc = -ENODEV;
1223 goto err_out_mwi;
1224 }
1225
1226 rc = pci_request_regions(pdev, MODULENAME);
1227 if (rc) {
1228 printk(KERN_ERR PFX "%s: could not request regions.\n",
1229 pci_name(pdev));
1230 goto err_out_mwi;
1231 }
1232
1233 tp->cp_cmd = PCIMulRW | RxChkSum;
1234
1235 if ((sizeof(dma_addr_t) > 4) &&
1236 !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
1237 tp->cp_cmd |= PCIDAC;
1238 dev->features |= NETIF_F_HIGHDMA;
1239 } else {
1240 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1241 if (rc < 0) {
1242 printk(KERN_ERR PFX "DMA configuration failed.\n");
1243 goto err_out_free_res;
1244 }
1245 }
1246
1247 pci_set_master(pdev);
1248
1249 /* ioremap MMIO region */
1250 ioaddr = ioremap(pci_resource_start(pdev, 1), R8169_REGS_SIZE);
1251 if (ioaddr == NULL) {
1252 printk(KERN_ERR PFX "cannot remap MMIO, aborting\n");
1253 rc = -EIO;
1254 goto err_out_free_res;
1255 }
1256
1257 /* Unneeded ? Don't mess with Mrs. Murphy. */
1258 rtl8169_irq_mask_and_ack(ioaddr);
1259
1260 /* Soft reset the chip. */
1261 RTL_W8(ChipCmd, CmdReset);
1262
1263 /* Check that the chip has finished the reset. */
1264 for (i = 1000; i > 0; i--) {
1265 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1266 break;
1267 udelay(10);
1268 }
1269
1270 /* Identify chip attached to board */
1271 rtl8169_get_mac_version(tp, ioaddr);
1272 rtl8169_get_phy_version(tp, ioaddr);
1273
1274 rtl8169_print_mac_version(tp);
1275 rtl8169_print_phy_version(tp);
1276
1277 for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1278 if (tp->mac_version == rtl_chip_info[i].mac_version)
1279 break;
1280 }
1281 if (i < 0) {
1282 /* Unknown chip: assume array element #0, original RTL-8169 */
1283 printk(KERN_DEBUG PFX
1284 "PCI device %s: unknown chip version, assuming %s\n",
1285 pci_name(pdev), rtl_chip_info[0].name);
1286 i++;
1287 }
1288 tp->chipset = i;
1289
1290 *ioaddr_out = ioaddr;
1291 *dev_out = dev;
1292 out:
1293 return rc;
1294
1295 err_out_free_res:
1296 pci_release_regions(pdev);
1297
1298 err_out_mwi:
1299 pci_clear_mwi(pdev);
1300
1301 err_out_disable:
1302 pci_disable_device(pdev);
1303
1304 err_out_free_dev:
1305 free_netdev(dev);
1306 err_out:
1307 *ioaddr_out = NULL;
1308 *dev_out = NULL;
1309 goto out;
1310 }
1311
1312 static int __devinit
1313 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1314 {
1315 struct net_device *dev = NULL;
1316 struct rtl8169_private *tp;
1317 void __iomem *ioaddr = NULL;
1318 static int board_idx = -1;
1319 static int printed_version = 0;
1320 u8 autoneg, duplex;
1321 u16 speed;
1322 int i, rc;
1323
1324 assert(pdev != NULL);
1325 assert(ent != NULL);
1326
1327 board_idx++;
1328
1329 if (!printed_version) {
1330 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
1331 MODULENAME, RTL8169_VERSION);
1332 printed_version = 1;
1333 }
1334
1335 rc = rtl8169_init_board(pdev, &dev, &ioaddr);
1336 if (rc)
1337 return rc;
1338
1339 tp = netdev_priv(dev);
1340 assert(ioaddr != NULL);
1341
1342 if (RTL_R8(PHYstatus) & TBI_Enable) {
1343 tp->set_speed = rtl8169_set_speed_tbi;
1344 tp->get_settings = rtl8169_gset_tbi;
1345 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1346 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1347 tp->link_ok = rtl8169_tbi_link_ok;
1348
1349 tp->phy_1000_ctrl_reg = PHY_Cap_1000_Full; /* Implied by TBI */
1350 } else {
1351 tp->set_speed = rtl8169_set_speed_xmii;
1352 tp->get_settings = rtl8169_gset_xmii;
1353 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1354 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1355 tp->link_ok = rtl8169_xmii_link_ok;
1356 }
1357
1358 /* Get MAC address. FIXME: read EEPROM */
1359 for (i = 0; i < MAC_ADDR_LEN; i++)
1360 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1361
1362 dev->open = rtl8169_open;
1363 dev->hard_start_xmit = rtl8169_start_xmit;
1364 dev->get_stats = rtl8169_get_stats;
1365 SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
1366 dev->stop = rtl8169_close;
1367 dev->tx_timeout = rtl8169_tx_timeout;
1368 dev->set_multicast_list = rtl8169_set_rx_mode;
1369 dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1370 dev->irq = pdev->irq;
1371 dev->base_addr = (unsigned long) ioaddr;
1372 dev->change_mtu = rtl8169_change_mtu;
1373
1374 #ifdef CONFIG_R8169_NAPI
1375 dev->poll = rtl8169_poll;
1376 dev->weight = R8169_NAPI_WEIGHT;
1377 #endif
1378
1379 #ifdef CONFIG_R8169_VLAN
1380 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1381 dev->vlan_rx_register = rtl8169_vlan_rx_register;
1382 dev->vlan_rx_kill_vid = rtl8169_vlan_rx_kill_vid;
1383 #endif
1384
1385 #ifdef CONFIG_NET_POLL_CONTROLLER
1386 dev->poll_controller = rtl8169_netpoll;
1387 #endif
1388
1389 tp->intr_mask = 0xffff;
1390 tp->pci_dev = pdev;
1391 tp->mmio_addr = ioaddr;
1392
1393 spin_lock_init(&tp->lock);
1394
1395 rc = register_netdev(dev);
1396 if (rc) {
1397 rtl8169_release_board(pdev, dev, ioaddr);
1398 return rc;
1399 }
1400
1401 printk(KERN_DEBUG "%s: Identified chip type is '%s'.\n", dev->name,
1402 rtl_chip_info[tp->chipset].name);
1403
1404 pci_set_drvdata(pdev, dev);
1405
1406 printk(KERN_INFO "%s: %s at 0x%lx, "
1407 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1408 "IRQ %d\n",
1409 dev->name,
1410 rtl_chip_info[ent->driver_data].name,
1411 dev->base_addr,
1412 dev->dev_addr[0], dev->dev_addr[1],
1413 dev->dev_addr[2], dev->dev_addr[3],
1414 dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1415
1416 rtl8169_hw_phy_config(dev);
1417
1418 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1419 RTL_W8(0x82, 0x01);
1420
1421 if (tp->mac_version < RTL_GIGA_MAC_VER_E) {
1422 dprintk("Set PCI Latency=0x40\n");
1423 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
1424 }
1425
1426 if (tp->mac_version == RTL_GIGA_MAC_VER_D) {
1427 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1428 RTL_W8(0x82, 0x01);
1429 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1430 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1431 }
1432
1433 rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1434
1435 rtl8169_set_speed(dev, autoneg, speed, duplex);
1436
1437 if (RTL_R8(PHYstatus) & TBI_Enable)
1438 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1439
1440 return 0;
1441 }
1442
1443 static void __devexit
1444 rtl8169_remove_one(struct pci_dev *pdev)
1445 {
1446 struct net_device *dev = pci_get_drvdata(pdev);
1447 struct rtl8169_private *tp = netdev_priv(dev);
1448
1449 assert(dev != NULL);
1450 assert(tp != NULL);
1451
1452 unregister_netdev(dev);
1453 rtl8169_release_board(pdev, dev, tp->mmio_addr);
1454 pci_set_drvdata(pdev, NULL);
1455 }
1456
1457 #ifdef CONFIG_PM
1458
1459 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
1460 {
1461 struct net_device *dev = pci_get_drvdata(pdev);
1462 struct rtl8169_private *tp = netdev_priv(dev);
1463 void __iomem *ioaddr = tp->mmio_addr;
1464 unsigned long flags;
1465
1466 if (!netif_running(dev))
1467 return 0;
1468
1469 netif_device_detach(dev);
1470 netif_stop_queue(dev);
1471 spin_lock_irqsave(&tp->lock, flags);
1472
1473 /* Disable interrupts, stop Rx and Tx */
1474 RTL_W16(IntrMask, 0);
1475 RTL_W8(ChipCmd, 0);
1476
1477 /* Update the error counts. */
1478 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
1479 RTL_W32(RxMissed, 0);
1480 spin_unlock_irqrestore(&tp->lock, flags);
1481
1482 return 0;
1483 }
1484
1485 static int rtl8169_resume(struct pci_dev *pdev)
1486 {
1487 struct net_device *dev = pci_get_drvdata(pdev);
1488
1489 if (!netif_running(dev))
1490 return 0;
1491
1492 netif_device_attach(dev);
1493 rtl8169_hw_start(dev);
1494
1495 return 0;
1496 }
1497
1498 #endif /* CONFIG_PM */
1499
1500 static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1501 struct net_device *dev)
1502 {
1503 unsigned int mtu = dev->mtu;
1504
1505 tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1506 }
1507
1508 static int rtl8169_open(struct net_device *dev)
1509 {
1510 struct rtl8169_private *tp = netdev_priv(dev);
1511 struct pci_dev *pdev = tp->pci_dev;
1512 int retval;
1513
1514 rtl8169_set_rxbufsize(tp, dev);
1515
1516 retval =
1517 request_irq(dev->irq, rtl8169_interrupt, SA_SHIRQ, dev->name, dev);
1518 if (retval < 0)
1519 goto out;
1520
1521 retval = -ENOMEM;
1522
1523 /*
1524 * Rx and Tx desscriptors needs 256 bytes alignment.
1525 * pci_alloc_consistent provides more.
1526 */
1527 tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1528 &tp->TxPhyAddr);
1529 if (!tp->TxDescArray)
1530 goto err_free_irq;
1531
1532 tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1533 &tp->RxPhyAddr);
1534 if (!tp->RxDescArray)
1535 goto err_free_tx;
1536
1537 retval = rtl8169_init_ring(dev);
1538 if (retval < 0)
1539 goto err_free_rx;
1540
1541 INIT_WORK(&tp->task, NULL, dev);
1542
1543 rtl8169_hw_start(dev);
1544
1545 rtl8169_request_timer(dev);
1546
1547 rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1548 out:
1549 return retval;
1550
1551 err_free_rx:
1552 pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1553 tp->RxPhyAddr);
1554 err_free_tx:
1555 pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1556 tp->TxPhyAddr);
1557 err_free_irq:
1558 free_irq(dev->irq, dev);
1559 goto out;
1560 }
1561
1562 static void rtl8169_hw_reset(void __iomem *ioaddr)
1563 {
1564 /* Disable interrupts */
1565 rtl8169_irq_mask_and_ack(ioaddr);
1566
1567 /* Reset the chipset */
1568 RTL_W8(ChipCmd, CmdReset);
1569
1570 /* PCI commit */
1571 RTL_R8(ChipCmd);
1572 }
1573
1574 static void
1575 rtl8169_hw_start(struct net_device *dev)
1576 {
1577 struct rtl8169_private *tp = netdev_priv(dev);
1578 void __iomem *ioaddr = tp->mmio_addr;
1579 u32 i;
1580
1581 /* Soft reset the chip. */
1582 RTL_W8(ChipCmd, CmdReset);
1583
1584 /* Check that the chip has finished the reset. */
1585 for (i = 1000; i > 0; i--) {
1586 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1587 break;
1588 udelay(10);
1589 }
1590
1591 RTL_W8(Cfg9346, Cfg9346_Unlock);
1592 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1593 RTL_W8(EarlyTxThres, EarlyTxThld);
1594
1595 /* Low hurts. Let's disable the filtering. */
1596 RTL_W16(RxMaxSize, 16383);
1597
1598 /* Set Rx Config register */
1599 i = rtl8169_rx_config |
1600 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1601 RTL_W32(RxConfig, i);
1602
1603 /* Set DMA burst size and Interframe Gap Time */
1604 RTL_W32(TxConfig,
1605 (TX_DMA_BURST << TxDMAShift) | (InterFrameGap <<
1606 TxInterFrameGapShift));
1607 tp->cp_cmd |= RTL_R16(CPlusCmd);
1608 RTL_W16(CPlusCmd, tp->cp_cmd);
1609
1610 if ((tp->mac_version == RTL_GIGA_MAC_VER_D) ||
1611 (tp->mac_version == RTL_GIGA_MAC_VER_E)) {
1612 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1613 "Bit-3 and bit-14 MUST be 1\n");
1614 tp->cp_cmd |= (1 << 14) | PCIMulRW;
1615 RTL_W16(CPlusCmd, tp->cp_cmd);
1616 }
1617
1618 /*
1619 * Undocumented corner. Supposedly:
1620 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1621 */
1622 RTL_W16(IntrMitigate, 0x0000);
1623
1624 RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1625 RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1626 RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1627 RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1628 RTL_W8(Cfg9346, Cfg9346_Lock);
1629 udelay(10);
1630
1631 RTL_W32(RxMissed, 0);
1632
1633 rtl8169_set_rx_mode(dev);
1634
1635 /* no early-rx interrupts */
1636 RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1637
1638 /* Enable all known interrupts by setting the interrupt mask. */
1639 RTL_W16(IntrMask, rtl8169_intr_mask);
1640
1641 netif_start_queue(dev);
1642 }
1643
1644 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
1645 {
1646 struct rtl8169_private *tp = netdev_priv(dev);
1647 int ret = 0;
1648
1649 if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
1650 return -EINVAL;
1651
1652 dev->mtu = new_mtu;
1653
1654 if (!netif_running(dev))
1655 goto out;
1656
1657 rtl8169_down(dev);
1658
1659 rtl8169_set_rxbufsize(tp, dev);
1660
1661 ret = rtl8169_init_ring(dev);
1662 if (ret < 0)
1663 goto out;
1664
1665 netif_poll_enable(dev);
1666
1667 rtl8169_hw_start(dev);
1668
1669 rtl8169_request_timer(dev);
1670
1671 out:
1672 return ret;
1673 }
1674
1675 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1676 {
1677 desc->addr = 0x0badbadbadbadbadull;
1678 desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
1679 }
1680
1681 static void rtl8169_free_rx_skb(struct rtl8169_private *tp,
1682 struct sk_buff **sk_buff, struct RxDesc *desc)
1683 {
1684 struct pci_dev *pdev = tp->pci_dev;
1685
1686 pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
1687 PCI_DMA_FROMDEVICE);
1688 dev_kfree_skb(*sk_buff);
1689 *sk_buff = NULL;
1690 rtl8169_make_unusable_by_asic(desc);
1691 }
1692
1693 static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
1694 {
1695 u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
1696
1697 desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
1698 }
1699
1700 static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
1701 u32 rx_buf_sz)
1702 {
1703 desc->addr = cpu_to_le64(mapping);
1704 wmb();
1705 rtl8169_mark_to_asic(desc, rx_buf_sz);
1706 }
1707
1708 static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
1709 struct RxDesc *desc, int rx_buf_sz)
1710 {
1711 struct sk_buff *skb;
1712 dma_addr_t mapping;
1713 int ret = 0;
1714
1715 skb = dev_alloc_skb(rx_buf_sz + NET_IP_ALIGN);
1716 if (!skb)
1717 goto err_out;
1718
1719 skb_reserve(skb, NET_IP_ALIGN);
1720 *sk_buff = skb;
1721
1722 mapping = pci_map_single(pdev, skb->tail, rx_buf_sz,
1723 PCI_DMA_FROMDEVICE);
1724
1725 rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
1726
1727 out:
1728 return ret;
1729
1730 err_out:
1731 ret = -ENOMEM;
1732 rtl8169_make_unusable_by_asic(desc);
1733 goto out;
1734 }
1735
1736 static void rtl8169_rx_clear(struct rtl8169_private *tp)
1737 {
1738 int i;
1739
1740 for (i = 0; i < NUM_RX_DESC; i++) {
1741 if (tp->Rx_skbuff[i]) {
1742 rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i,
1743 tp->RxDescArray + i);
1744 }
1745 }
1746 }
1747
1748 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
1749 u32 start, u32 end)
1750 {
1751 u32 cur;
1752
1753 for (cur = start; end - cur > 0; cur++) {
1754 int ret, i = cur % NUM_RX_DESC;
1755
1756 if (tp->Rx_skbuff[i])
1757 continue;
1758
1759 ret = rtl8169_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
1760 tp->RxDescArray + i, tp->rx_buf_sz);
1761 if (ret < 0)
1762 break;
1763 }
1764 return cur - start;
1765 }
1766
1767 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
1768 {
1769 desc->opts1 |= cpu_to_le32(RingEnd);
1770 }
1771
1772 static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
1773 {
1774 tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
1775 }
1776
1777 static int rtl8169_init_ring(struct net_device *dev)
1778 {
1779 struct rtl8169_private *tp = netdev_priv(dev);
1780
1781 rtl8169_init_ring_indexes(tp);
1782
1783 memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
1784 memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
1785
1786 if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
1787 goto err_out;
1788
1789 rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
1790
1791 return 0;
1792
1793 err_out:
1794 rtl8169_rx_clear(tp);
1795 return -ENOMEM;
1796 }
1797
1798 static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb,
1799 struct TxDesc *desc)
1800 {
1801 unsigned int len = tx_skb->len;
1802
1803 pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
1804 desc->opts1 = 0x00;
1805 desc->opts2 = 0x00;
1806 desc->addr = 0x00;
1807 tx_skb->len = 0;
1808 }
1809
1810 static void rtl8169_tx_clear(struct rtl8169_private *tp)
1811 {
1812 unsigned int i;
1813
1814 for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) {
1815 unsigned int entry = i % NUM_TX_DESC;
1816 struct ring_info *tx_skb = tp->tx_skb + entry;
1817 unsigned int len = tx_skb->len;
1818
1819 if (len) {
1820 struct sk_buff *skb = tx_skb->skb;
1821
1822 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb,
1823 tp->TxDescArray + entry);
1824 if (skb) {
1825 dev_kfree_skb(skb);
1826 tx_skb->skb = NULL;
1827 }
1828 tp->stats.tx_dropped++;
1829 }
1830 }
1831 tp->cur_tx = tp->dirty_tx = 0;
1832 }
1833
1834 static void rtl8169_schedule_work(struct net_device *dev, void (*task)(void *))
1835 {
1836 struct rtl8169_private *tp = netdev_priv(dev);
1837
1838 PREPARE_WORK(&tp->task, task, dev);
1839 schedule_delayed_work(&tp->task, 4);
1840 }
1841
1842 static void rtl8169_wait_for_quiescence(struct net_device *dev)
1843 {
1844 struct rtl8169_private *tp = netdev_priv(dev);
1845 void __iomem *ioaddr = tp->mmio_addr;
1846
1847 synchronize_irq(dev->irq);
1848
1849 /* Wait for any pending NAPI task to complete */
1850 netif_poll_disable(dev);
1851
1852 rtl8169_irq_mask_and_ack(ioaddr);
1853
1854 netif_poll_enable(dev);
1855 }
1856
1857 static void rtl8169_reinit_task(void *_data)
1858 {
1859 struct net_device *dev = _data;
1860 int ret;
1861
1862 if (netif_running(dev)) {
1863 rtl8169_wait_for_quiescence(dev);
1864 rtl8169_close(dev);
1865 }
1866
1867 ret = rtl8169_open(dev);
1868 if (unlikely(ret < 0)) {
1869 if (net_ratelimit()) {
1870 printk(PFX KERN_ERR "%s: reinit failure (status = %d)."
1871 " Rescheduling.\n", dev->name, ret);
1872 }
1873 rtl8169_schedule_work(dev, rtl8169_reinit_task);
1874 }
1875 }
1876
1877 static void rtl8169_reset_task(void *_data)
1878 {
1879 struct net_device *dev = _data;
1880 struct rtl8169_private *tp = netdev_priv(dev);
1881
1882 if (!netif_running(dev))
1883 return;
1884
1885 rtl8169_wait_for_quiescence(dev);
1886
1887 rtl8169_rx_interrupt(dev, tp, tp->mmio_addr);
1888 rtl8169_tx_clear(tp);
1889
1890 if (tp->dirty_rx == tp->cur_rx) {
1891 rtl8169_init_ring_indexes(tp);
1892 rtl8169_hw_start(dev);
1893 netif_wake_queue(dev);
1894 } else {
1895 if (net_ratelimit()) {
1896 printk(PFX KERN_EMERG "%s: Rx buffers shortage\n",
1897 dev->name);
1898 }
1899 rtl8169_schedule_work(dev, rtl8169_reset_task);
1900 }
1901 }
1902
1903 static void rtl8169_tx_timeout(struct net_device *dev)
1904 {
1905 struct rtl8169_private *tp = netdev_priv(dev);
1906
1907 rtl8169_hw_reset(tp->mmio_addr);
1908
1909 /* Let's wait a bit while any (async) irq lands on */
1910 rtl8169_schedule_work(dev, rtl8169_reset_task);
1911 }
1912
1913 static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
1914 u32 opts1)
1915 {
1916 struct skb_shared_info *info = skb_shinfo(skb);
1917 unsigned int cur_frag, entry;
1918 struct TxDesc *txd;
1919
1920 entry = tp->cur_tx;
1921 for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
1922 skb_frag_t *frag = info->frags + cur_frag;
1923 dma_addr_t mapping;
1924 u32 status, len;
1925 void *addr;
1926
1927 entry = (entry + 1) % NUM_TX_DESC;
1928
1929 txd = tp->TxDescArray + entry;
1930 len = frag->size;
1931 addr = ((void *) page_address(frag->page)) + frag->page_offset;
1932 mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
1933
1934 /* anti gcc 2.95.3 bugware (sic) */
1935 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
1936
1937 txd->opts1 = cpu_to_le32(status);
1938 txd->addr = cpu_to_le64(mapping);
1939
1940 tp->tx_skb[entry].len = len;
1941 }
1942
1943 if (cur_frag) {
1944 tp->tx_skb[entry].skb = skb;
1945 txd->opts1 |= cpu_to_le32(LastFrag);
1946 }
1947
1948 return cur_frag;
1949 }
1950
1951 static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
1952 {
1953 if (dev->features & NETIF_F_TSO) {
1954 u32 mss = skb_shinfo(skb)->tso_size;
1955
1956 if (mss)
1957 return LargeSend | ((mss & MSSMask) << MSSShift);
1958 }
1959 if (skb->ip_summed == CHECKSUM_HW) {
1960 const struct iphdr *ip = skb->nh.iph;
1961
1962 if (ip->protocol == IPPROTO_TCP)
1963 return IPCS | TCPCS;
1964 else if (ip->protocol == IPPROTO_UDP)
1965 return IPCS | UDPCS;
1966 WARN_ON(1); /* we need a WARN() */
1967 }
1968 return 0;
1969 }
1970
1971 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
1972 {
1973 struct rtl8169_private *tp = netdev_priv(dev);
1974 unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC;
1975 struct TxDesc *txd = tp->TxDescArray + entry;
1976 void __iomem *ioaddr = tp->mmio_addr;
1977 dma_addr_t mapping;
1978 u32 status, len;
1979 u32 opts1;
1980 int ret = 0;
1981
1982 if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
1983 printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n",
1984 dev->name);
1985 goto err_stop;
1986 }
1987
1988 if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
1989 goto err_stop;
1990
1991 opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
1992
1993 frags = rtl8169_xmit_frags(tp, skb, opts1);
1994 if (frags) {
1995 len = skb_headlen(skb);
1996 opts1 |= FirstFrag;
1997 } else {
1998 len = skb->len;
1999
2000 if (unlikely(len < ETH_ZLEN)) {
2001 skb = skb_padto(skb, ETH_ZLEN);
2002 if (!skb)
2003 goto err_update_stats;
2004 len = ETH_ZLEN;
2005 }
2006
2007 opts1 |= FirstFrag | LastFrag;
2008 tp->tx_skb[entry].skb = skb;
2009 }
2010
2011 mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
2012
2013 tp->tx_skb[entry].len = len;
2014 txd->addr = cpu_to_le64(mapping);
2015 txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
2016
2017 wmb();
2018
2019 /* anti gcc 2.95.3 bugware (sic) */
2020 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2021 txd->opts1 = cpu_to_le32(status);
2022
2023 dev->trans_start = jiffies;
2024
2025 tp->cur_tx += frags + 1;
2026
2027 smp_wmb();
2028
2029 RTL_W8(TxPoll, 0x40); /* set polling bit */
2030
2031 if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
2032 netif_stop_queue(dev);
2033 smp_rmb();
2034 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
2035 netif_wake_queue(dev);
2036 }
2037
2038 out:
2039 return ret;
2040
2041 err_stop:
2042 netif_stop_queue(dev);
2043 ret = 1;
2044 err_update_stats:
2045 tp->stats.tx_dropped++;
2046 goto out;
2047 }
2048
2049 static void rtl8169_pcierr_interrupt(struct net_device *dev)
2050 {
2051 struct rtl8169_private *tp = netdev_priv(dev);
2052 struct pci_dev *pdev = tp->pci_dev;
2053 void __iomem *ioaddr = tp->mmio_addr;
2054 u16 pci_status, pci_cmd;
2055
2056 pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
2057 pci_read_config_word(pdev, PCI_STATUS, &pci_status);
2058
2059 printk(KERN_ERR PFX "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2060 dev->name, pci_cmd, pci_status);
2061
2062 /*
2063 * The recovery sequence below admits a very elaborated explanation:
2064 * - it seems to work;
2065 * - I did not see what else could be done.
2066 *
2067 * Feel free to adjust to your needs.
2068 */
2069 pci_write_config_word(pdev, PCI_COMMAND,
2070 pci_cmd | PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
2071
2072 pci_write_config_word(pdev, PCI_STATUS,
2073 pci_status & (PCI_STATUS_DETECTED_PARITY |
2074 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
2075 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
2076
2077 /* The infamous DAC f*ckup only happens at boot time */
2078 if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
2079 printk(KERN_INFO PFX "%s: disabling PCI DAC.\n", dev->name);
2080 tp->cp_cmd &= ~PCIDAC;
2081 RTL_W16(CPlusCmd, tp->cp_cmd);
2082 dev->features &= ~NETIF_F_HIGHDMA;
2083 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2084 }
2085
2086 rtl8169_hw_reset(ioaddr);
2087 }
2088
2089 static void
2090 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2091 void __iomem *ioaddr)
2092 {
2093 unsigned int dirty_tx, tx_left;
2094
2095 assert(dev != NULL);
2096 assert(tp != NULL);
2097 assert(ioaddr != NULL);
2098
2099 dirty_tx = tp->dirty_tx;
2100 smp_rmb();
2101 tx_left = tp->cur_tx - dirty_tx;
2102
2103 while (tx_left > 0) {
2104 unsigned int entry = dirty_tx % NUM_TX_DESC;
2105 struct ring_info *tx_skb = tp->tx_skb + entry;
2106 u32 len = tx_skb->len;
2107 u32 status;
2108
2109 rmb();
2110 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
2111 if (status & DescOwn)
2112 break;
2113
2114 tp->stats.tx_bytes += len;
2115 tp->stats.tx_packets++;
2116
2117 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
2118
2119 if (status & LastFrag) {
2120 dev_kfree_skb_irq(tx_skb->skb);
2121 tx_skb->skb = NULL;
2122 }
2123 dirty_tx++;
2124 tx_left--;
2125 }
2126
2127 if (tp->dirty_tx != dirty_tx) {
2128 tp->dirty_tx = dirty_tx;
2129 smp_wmb();
2130 if (netif_queue_stopped(dev) &&
2131 (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
2132 netif_wake_queue(dev);
2133 }
2134 }
2135 }
2136
2137 static inline int rtl8169_fragmented_frame(u32 status)
2138 {
2139 return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
2140 }
2141
2142 static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2143 {
2144 u32 opts1 = le32_to_cpu(desc->opts1);
2145 u32 status = opts1 & RxProtoMask;
2146
2147 if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
2148 ((status == RxProtoUDP) && !(opts1 & UDPFail)) ||
2149 ((status == RxProtoIP) && !(opts1 & IPFail)))
2150 skb->ip_summed = CHECKSUM_UNNECESSARY;
2151 else
2152 skb->ip_summed = CHECKSUM_NONE;
2153 }
2154
2155 static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2156 struct RxDesc *desc, int rx_buf_sz)
2157 {
2158 int ret = -1;
2159
2160 if (pkt_size < rx_copybreak) {
2161 struct sk_buff *skb;
2162
2163 skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN);
2164 if (skb) {
2165 skb_reserve(skb, NET_IP_ALIGN);
2166 eth_copy_and_sum(skb, sk_buff[0]->tail, pkt_size, 0);
2167 *sk_buff = skb;
2168 rtl8169_mark_to_asic(desc, rx_buf_sz);
2169 ret = 0;
2170 }
2171 }
2172 return ret;
2173 }
2174
2175 static int
2176 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2177 void __iomem *ioaddr)
2178 {
2179 unsigned int cur_rx, rx_left;
2180 unsigned int delta, count;
2181
2182 assert(dev != NULL);
2183 assert(tp != NULL);
2184 assert(ioaddr != NULL);
2185
2186 cur_rx = tp->cur_rx;
2187 rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2188 rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
2189
2190 while (rx_left > 0) {
2191 unsigned int entry = cur_rx % NUM_RX_DESC;
2192 struct RxDesc *desc = tp->RxDescArray + entry;
2193 u32 status;
2194
2195 rmb();
2196 status = le32_to_cpu(desc->opts1);
2197
2198 if (status & DescOwn)
2199 break;
2200 if (status & RxRES) {
2201 printk(KERN_INFO "%s: Rx ERROR. status = %08x\n",
2202 dev->name, status);
2203 tp->stats.rx_errors++;
2204 if (status & (RxRWT | RxRUNT))
2205 tp->stats.rx_length_errors++;
2206 if (status & RxCRC)
2207 tp->stats.rx_crc_errors++;
2208 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2209 } else {
2210 struct sk_buff *skb = tp->Rx_skbuff[entry];
2211 int pkt_size = (status & 0x00001FFF) - 4;
2212 void (*pci_action)(struct pci_dev *, dma_addr_t,
2213 size_t, int) = pci_dma_sync_single_for_device;
2214
2215 /*
2216 * The driver does not support incoming fragmented
2217 * frames. They are seen as a symptom of over-mtu
2218 * sized frames.
2219 */
2220 if (unlikely(rtl8169_fragmented_frame(status))) {
2221 tp->stats.rx_dropped++;
2222 tp->stats.rx_length_errors++;
2223 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2224 goto move_on;
2225 }
2226
2227 rtl8169_rx_csum(skb, desc);
2228
2229 pci_dma_sync_single_for_cpu(tp->pci_dev,
2230 le64_to_cpu(desc->addr), tp->rx_buf_sz,
2231 PCI_DMA_FROMDEVICE);
2232
2233 if (rtl8169_try_rx_copy(&skb, pkt_size, desc,
2234 tp->rx_buf_sz)) {
2235 pci_action = pci_unmap_single;
2236 tp->Rx_skbuff[entry] = NULL;
2237 }
2238
2239 pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
2240 tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
2241
2242 skb->dev = dev;
2243 skb_put(skb, pkt_size);
2244 skb->protocol = eth_type_trans(skb, dev);
2245
2246 if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
2247 rtl8169_rx_skb(skb);
2248
2249 dev->last_rx = jiffies;
2250 tp->stats.rx_bytes += pkt_size;
2251 tp->stats.rx_packets++;
2252 }
2253 move_on:
2254 cur_rx++;
2255 rx_left--;
2256 }
2257
2258 count = cur_rx - tp->cur_rx;
2259 tp->cur_rx = cur_rx;
2260
2261 delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
2262 if (!delta && count)
2263 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
2264 tp->dirty_rx += delta;
2265
2266 /*
2267 * FIXME: until there is periodic timer to try and refill the ring,
2268 * a temporary shortage may definitely kill the Rx process.
2269 * - disable the asic to try and avoid an overflow and kick it again
2270 * after refill ?
2271 * - how do others driver handle this condition (Uh oh...).
2272 */
2273 if (tp->dirty_rx + NUM_RX_DESC == tp->cur_rx)
2274 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
2275
2276 return count;
2277 }
2278
2279 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2280 static irqreturn_t
2281 rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
2282 {
2283 struct net_device *dev = (struct net_device *) dev_instance;
2284 struct rtl8169_private *tp = netdev_priv(dev);
2285 int boguscnt = max_interrupt_work;
2286 void __iomem *ioaddr = tp->mmio_addr;
2287 int status;
2288 int handled = 0;
2289
2290 do {
2291 status = RTL_R16(IntrStatus);
2292
2293 /* hotplug/major error/no more work/shared irq */
2294 if ((status == 0xFFFF) || !status)
2295 break;
2296
2297 handled = 1;
2298
2299 if (unlikely(!netif_running(dev))) {
2300 rtl8169_asic_down(ioaddr);
2301 goto out;
2302 }
2303
2304 status &= tp->intr_mask;
2305 RTL_W16(IntrStatus,
2306 (status & RxFIFOOver) ? (status | RxOverflow) : status);
2307
2308 if (!(status & rtl8169_intr_mask))
2309 break;
2310
2311 if (unlikely(status & SYSErr)) {
2312 rtl8169_pcierr_interrupt(dev);
2313 break;
2314 }
2315
2316 if (status & LinkChg)
2317 rtl8169_check_link_status(dev, tp, ioaddr);
2318
2319 #ifdef CONFIG_R8169_NAPI
2320 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
2321 tp->intr_mask = ~rtl8169_napi_event;
2322
2323 if (likely(netif_rx_schedule_prep(dev)))
2324 __netif_rx_schedule(dev);
2325 else {
2326 printk(KERN_INFO "%s: interrupt %04x taken in poll\n",
2327 dev->name, status);
2328 }
2329 break;
2330 #else
2331 /* Rx interrupt */
2332 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
2333 rtl8169_rx_interrupt(dev, tp, ioaddr);
2334 }
2335 /* Tx interrupt */
2336 if (status & (TxOK | TxErr))
2337 rtl8169_tx_interrupt(dev, tp, ioaddr);
2338 #endif
2339
2340 boguscnt--;
2341 } while (boguscnt > 0);
2342
2343 if (boguscnt <= 0) {
2344 printk(KERN_WARNING "%s: Too much work at interrupt!\n",
2345 dev->name);
2346 /* Clear all interrupt sources. */
2347 RTL_W16(IntrStatus, 0xffff);
2348 }
2349 out:
2350 return IRQ_RETVAL(handled);
2351 }
2352
2353 #ifdef CONFIG_R8169_NAPI
2354 static int rtl8169_poll(struct net_device *dev, int *budget)
2355 {
2356 unsigned int work_done, work_to_do = min(*budget, dev->quota);
2357 struct rtl8169_private *tp = netdev_priv(dev);
2358 void __iomem *ioaddr = tp->mmio_addr;
2359
2360 work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
2361 rtl8169_tx_interrupt(dev, tp, ioaddr);
2362
2363 *budget -= work_done;
2364 dev->quota -= work_done;
2365
2366 if (work_done < work_to_do) {
2367 netif_rx_complete(dev);
2368 tp->intr_mask = 0xffff;
2369 /*
2370 * 20040426: the barrier is not strictly required but the
2371 * behavior of the irq handler could be less predictable
2372 * without it. Btw, the lack of flush for the posted pci
2373 * write is safe - FR
2374 */
2375 smp_wmb();
2376 RTL_W16(IntrMask, rtl8169_intr_mask);
2377 }
2378
2379 return (work_done >= work_to_do);
2380 }
2381 #endif
2382
2383 static void rtl8169_down(struct net_device *dev)
2384 {
2385 struct rtl8169_private *tp = netdev_priv(dev);
2386 void __iomem *ioaddr = tp->mmio_addr;
2387 unsigned int poll_locked = 0;
2388
2389 rtl8169_delete_timer(dev);
2390
2391 netif_stop_queue(dev);
2392
2393 flush_scheduled_work();
2394
2395 core_down:
2396 spin_lock_irq(&tp->lock);
2397
2398 rtl8169_asic_down(ioaddr);
2399
2400 /* Update the error counts. */
2401 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2402 RTL_W32(RxMissed, 0);
2403
2404 spin_unlock_irq(&tp->lock);
2405
2406 synchronize_irq(dev->irq);
2407
2408 if (!poll_locked) {
2409 netif_poll_disable(dev);
2410 poll_locked++;
2411 }
2412
2413 /* Give a racing hard_start_xmit a few cycles to complete. */
2414 synchronize_sched(); /* FIXME: should this be synchronize_irq()? */
2415
2416 /*
2417 * And now for the 50k$ question: are IRQ disabled or not ?
2418 *
2419 * Two paths lead here:
2420 * 1) dev->close
2421 * -> netif_running() is available to sync the current code and the
2422 * IRQ handler. See rtl8169_interrupt for details.
2423 * 2) dev->change_mtu
2424 * -> rtl8169_poll can not be issued again and re-enable the
2425 * interruptions. Let's simply issue the IRQ down sequence again.
2426 */
2427 if (RTL_R16(IntrMask))
2428 goto core_down;
2429
2430 rtl8169_tx_clear(tp);
2431
2432 rtl8169_rx_clear(tp);
2433 }
2434
2435 static int rtl8169_close(struct net_device *dev)
2436 {
2437 struct rtl8169_private *tp = netdev_priv(dev);
2438 struct pci_dev *pdev = tp->pci_dev;
2439
2440 rtl8169_down(dev);
2441
2442 free_irq(dev->irq, dev);
2443
2444 netif_poll_enable(dev);
2445
2446 pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
2447 tp->RxPhyAddr);
2448 pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
2449 tp->TxPhyAddr);
2450 tp->TxDescArray = NULL;
2451 tp->RxDescArray = NULL;
2452
2453 return 0;
2454 }
2455
2456 static void
2457 rtl8169_set_rx_mode(struct net_device *dev)
2458 {
2459 struct rtl8169_private *tp = netdev_priv(dev);
2460 void __iomem *ioaddr = tp->mmio_addr;
2461 unsigned long flags;
2462 u32 mc_filter[2]; /* Multicast hash filter */
2463 int i, rx_mode;
2464 u32 tmp = 0;
2465
2466 if (dev->flags & IFF_PROMISC) {
2467 /* Unconditionally log net taps. */
2468 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2469 dev->name);
2470 rx_mode =
2471 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2472 AcceptAllPhys;
2473 mc_filter[1] = mc_filter[0] = 0xffffffff;
2474 } else if ((dev->mc_count > multicast_filter_limit)
2475 || (dev->flags & IFF_ALLMULTI)) {
2476 /* Too many to filter perfectly -- accept all multicasts. */
2477 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2478 mc_filter[1] = mc_filter[0] = 0xffffffff;
2479 } else {
2480 struct dev_mc_list *mclist;
2481 rx_mode = AcceptBroadcast | AcceptMyPhys;
2482 mc_filter[1] = mc_filter[0] = 0;
2483 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2484 i++, mclist = mclist->next) {
2485 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2486 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2487 rx_mode |= AcceptMulticast;
2488 }
2489 }
2490
2491 spin_lock_irqsave(&tp->lock, flags);
2492
2493 tmp = rtl8169_rx_config | rx_mode |
2494 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
2495
2496 RTL_W32(RxConfig, tmp);
2497 RTL_W32(MAR0 + 0, mc_filter[0]);
2498 RTL_W32(MAR0 + 4, mc_filter[1]);
2499
2500 spin_unlock_irqrestore(&tp->lock, flags);
2501 }
2502
2503 /**
2504 * rtl8169_get_stats - Get rtl8169 read/write statistics
2505 * @dev: The Ethernet Device to get statistics for
2506 *
2507 * Get TX/RX statistics for rtl8169
2508 */
2509 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2510 {
2511 struct rtl8169_private *tp = netdev_priv(dev);
2512 void __iomem *ioaddr = tp->mmio_addr;
2513 unsigned long flags;
2514
2515 if (netif_running(dev)) {
2516 spin_lock_irqsave(&tp->lock, flags);
2517 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2518 RTL_W32(RxMissed, 0);
2519 spin_unlock_irqrestore(&tp->lock, flags);
2520 }
2521
2522 return &tp->stats;
2523 }
2524
2525 static struct pci_driver rtl8169_pci_driver = {
2526 .name = MODULENAME,
2527 .id_table = rtl8169_pci_tbl,
2528 .probe = rtl8169_init_one,
2529 .remove = __devexit_p(rtl8169_remove_one),
2530 #ifdef CONFIG_PM
2531 .suspend = rtl8169_suspend,
2532 .resume = rtl8169_resume,
2533 #endif
2534 };
2535
2536 static int __init
2537 rtl8169_init_module(void)
2538 {
2539 return pci_module_init(&rtl8169_pci_driver);
2540 }
2541
2542 static void __exit
2543 rtl8169_cleanup_module(void)
2544 {
2545 pci_unregister_driver(&rtl8169_pci_driver);
2546 }
2547
2548 module_init(rtl8169_init_module);
2549 module_exit(rtl8169_cleanup_module);
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