2 * r8169.c: RealTek 8169/8168/8101 ethernet driver.
4 * Copyright (c) 2002 ShuChen <shuchen@realtek.com.tw>
5 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
6 * Copyright (c) a lot of people too. Please respect their work.
8 * See MAINTAINERS file for support contact information.
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/pci.h>
14 #include <linux/netdevice.h>
15 #include <linux/etherdevice.h>
16 #include <linux/delay.h>
17 #include <linux/ethtool.h>
18 #include <linux/mii.h>
19 #include <linux/if_vlan.h>
20 #include <linux/crc32.h>
23 #include <linux/tcp.h>
24 #include <linux/init.h>
25 #include <linux/dma-mapping.h>
27 #include <asm/system.h>
31 #ifdef CONFIG_R8169_NAPI
32 #define NAPI_SUFFIX "-NAPI"
34 #define NAPI_SUFFIX ""
37 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
38 #define MODULENAME "r8169"
39 #define PFX MODULENAME ": "
42 #define assert(expr) \
44 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
45 #expr,__FILE__,__FUNCTION__,__LINE__); \
47 #define dprintk(fmt, args...) \
48 do { printk(KERN_DEBUG PFX fmt, ## args); } while (0)
50 #define assert(expr) do {} while (0)
51 #define dprintk(fmt, args...) do {} while (0)
52 #endif /* RTL8169_DEBUG */
54 #define R8169_MSG_DEFAULT \
55 (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
57 #define TX_BUFFS_AVAIL(tp) \
58 (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
60 #ifdef CONFIG_R8169_NAPI
61 #define rtl8169_rx_skb netif_receive_skb
62 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_receive_skb
63 #define rtl8169_rx_quota(count, quota) min(count, quota)
65 #define rtl8169_rx_skb netif_rx
66 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_rx
67 #define rtl8169_rx_quota(count, quota) count
70 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
71 static const int max_interrupt_work
= 20;
73 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
74 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
75 static const int multicast_filter_limit
= 32;
77 /* MAC address length */
78 #define MAC_ADDR_LEN 6
80 #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
81 #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
82 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
83 #define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
84 #define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
85 #define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */
86 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
88 #define R8169_REGS_SIZE 256
89 #define R8169_NAPI_WEIGHT 64
90 #define NUM_TX_DESC 64 /* Number of Tx descriptor registers */
91 #define NUM_RX_DESC 256 /* Number of Rx descriptor registers */
92 #define RX_BUF_SIZE 1536 /* Rx Buffer size */
93 #define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
94 #define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
96 #define RTL8169_TX_TIMEOUT (6*HZ)
97 #define RTL8169_PHY_TIMEOUT (10*HZ)
99 /* write/read MMIO register */
100 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
101 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
102 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
103 #define RTL_R8(reg) readb (ioaddr + (reg))
104 #define RTL_R16(reg) readw (ioaddr + (reg))
105 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
108 RTL_GIGA_MAC_VER_01
= 0x01, // 8169
109 RTL_GIGA_MAC_VER_02
= 0x02, // 8169S
110 RTL_GIGA_MAC_VER_03
= 0x03, // 8110S
111 RTL_GIGA_MAC_VER_04
= 0x04, // 8169SB
112 RTL_GIGA_MAC_VER_05
= 0x05, // 8110SCd
113 RTL_GIGA_MAC_VER_06
= 0x06, // 8110SCe
114 RTL_GIGA_MAC_VER_11
= 0x0b, // 8168Bb
115 RTL_GIGA_MAC_VER_12
= 0x0c, // 8168Be 8168Bf
116 RTL_GIGA_MAC_VER_13
= 0x0d, // 8101Eb 8101Ec
117 RTL_GIGA_MAC_VER_14
= 0x0e, // 8101
118 RTL_GIGA_MAC_VER_15
= 0x0f // 8101
122 RTL_GIGA_PHY_VER_C
= 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
123 RTL_GIGA_PHY_VER_D
= 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
124 RTL_GIGA_PHY_VER_E
= 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
125 RTL_GIGA_PHY_VER_F
= 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
126 RTL_GIGA_PHY_VER_G
= 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
127 RTL_GIGA_PHY_VER_H
= 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
130 #define _R(NAME,MAC,MASK) \
131 { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
133 static const struct {
136 u32 RxConfigMask
; /* Clears the bits supported by this chip */
137 } rtl_chip_info
[] = {
138 _R("RTL8169", RTL_GIGA_MAC_VER_01
, 0xff7e1880), // 8169
139 _R("RTL8169s", RTL_GIGA_MAC_VER_02
, 0xff7e1880), // 8169S
140 _R("RTL8110s", RTL_GIGA_MAC_VER_03
, 0xff7e1880), // 8110S
141 _R("RTL8169sb/8110sb", RTL_GIGA_MAC_VER_04
, 0xff7e1880), // 8169SB
142 _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_05
, 0xff7e1880), // 8110SCd
143 _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_06
, 0xff7e1880), // 8110SCe
144 _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_11
, 0xff7e1880), // PCI-E
145 _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_12
, 0xff7e1880), // PCI-E
146 _R("RTL8101e", RTL_GIGA_MAC_VER_13
, 0xff7e1880), // PCI-E 8139
147 _R("RTL8100e", RTL_GIGA_MAC_VER_14
, 0xff7e1880), // PCI-E 8139
148 _R("RTL8100e", RTL_GIGA_MAC_VER_15
, 0xff7e1880) // PCI-E 8139
158 static void rtl_hw_start_8169(struct net_device
*);
159 static void rtl_hw_start_8168(struct net_device
*);
160 static void rtl_hw_start_8101(struct net_device
*);
162 static struct pci_device_id rtl8169_pci_tbl
[] = {
163 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8129), 0, 0, RTL_CFG_0
},
164 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8136), 0, 0, RTL_CFG_2
},
165 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8167), 0, 0, RTL_CFG_0
},
166 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8168), 0, 0, RTL_CFG_1
},
167 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8169), 0, 0, RTL_CFG_0
},
168 { PCI_DEVICE(PCI_VENDOR_ID_DLINK
, 0x4300), 0, 0, RTL_CFG_0
},
169 { PCI_DEVICE(0x1259, 0xc107), 0, 0, RTL_CFG_0
},
170 { PCI_DEVICE(0x16ec, 0x0116), 0, 0, RTL_CFG_0
},
171 { PCI_VENDOR_ID_LINKSYS
, 0x1032,
172 PCI_ANY_ID
, 0x0024, 0, 0, RTL_CFG_0
},
176 MODULE_DEVICE_TABLE(pci
, rtl8169_pci_tbl
);
178 static int rx_copybreak
= 200;
185 MAC0
= 0, /* Ethernet hardware address. */
187 MAR0
= 8, /* Multicast filter. */
188 CounterAddrLow
= 0x10,
189 CounterAddrHigh
= 0x14,
190 TxDescStartAddrLow
= 0x20,
191 TxDescStartAddrHigh
= 0x24,
192 TxHDescStartAddrLow
= 0x28,
193 TxHDescStartAddrHigh
= 0x2c,
219 RxDescAddrLow
= 0xe4,
220 RxDescAddrHigh
= 0xe8,
223 FuncEventMask
= 0xf4,
224 FuncPresetState
= 0xf8,
225 FuncForceEvent
= 0xfc,
228 enum rtl_register_content
{
229 /* InterruptStatusBits */
233 TxDescUnavail
= 0x0080,
255 /* TXPoll register p.5 */
256 HPQ
= 0x80, /* Poll cmd on the high prio queue */
257 NPQ
= 0x40, /* Poll cmd on the low prio queue */
258 FSWInt
= 0x01, /* Forced software interrupt */
262 Cfg9346_Unlock
= 0xc0,
267 AcceptBroadcast
= 0x08,
268 AcceptMulticast
= 0x04,
270 AcceptAllPhys
= 0x01,
277 TxInterFrameGapShift
= 24,
278 TxDMAShift
= 8, /* DMA burst value (0-7) is shift this many bits */
280 /* Config1 register p.24 */
281 PMEnable
= (1 << 0), /* Power Management Enable */
283 /* Config2 register p. 25 */
284 PCI_Clock_66MHz
= 0x01,
285 PCI_Clock_33MHz
= 0x00,
287 /* Config3 register p.25 */
288 MagicPacket
= (1 << 5), /* Wake up when receives a Magic Packet */
289 LinkUp
= (1 << 4), /* Wake up when the cable connection is re-established */
291 /* Config5 register p.27 */
292 BWF
= (1 << 6), /* Accept Broadcast wakeup frame */
293 MWF
= (1 << 5), /* Accept Multicast wakeup frame */
294 UWF
= (1 << 4), /* Accept Unicast wakeup frame */
295 LanWake
= (1 << 1), /* LanWake enable/disable */
296 PMEStatus
= (1 << 0), /* PME status can be reset by PCI RST# */
299 TBIReset
= 0x80000000,
300 TBILoopback
= 0x40000000,
301 TBINwEnable
= 0x20000000,
302 TBINwRestart
= 0x10000000,
303 TBILinkOk
= 0x02000000,
304 TBINwComplete
= 0x01000000,
307 PktCntrDisable
= (1 << 7), // 8168
312 INTT_0
= 0x0000, // 8168
313 INTT_1
= 0x0001, // 8168
314 INTT_2
= 0x0002, // 8168
315 INTT_3
= 0x0003, // 8168
317 /* rtl8169_PHYstatus */
328 TBILinkOK
= 0x02000000,
330 /* DumpCounterCommand */
334 enum desc_status_bit
{
335 DescOwn
= (1 << 31), /* Descriptor is owned by NIC */
336 RingEnd
= (1 << 30), /* End of descriptor ring */
337 FirstFrag
= (1 << 29), /* First segment of a packet */
338 LastFrag
= (1 << 28), /* Final segment of a packet */
341 LargeSend
= (1 << 27), /* TCP Large Send Offload (TSO) */
342 MSSShift
= 16, /* MSS value position */
343 MSSMask
= 0xfff, /* MSS value + LargeSend bit: 12 bits */
344 IPCS
= (1 << 18), /* Calculate IP checksum */
345 UDPCS
= (1 << 17), /* Calculate UDP/IP checksum */
346 TCPCS
= (1 << 16), /* Calculate TCP/IP checksum */
347 TxVlanTag
= (1 << 17), /* Add VLAN tag */
350 PID1
= (1 << 18), /* Protocol ID bit 1/2 */
351 PID0
= (1 << 17), /* Protocol ID bit 2/2 */
353 #define RxProtoUDP (PID1)
354 #define RxProtoTCP (PID0)
355 #define RxProtoIP (PID1 | PID0)
356 #define RxProtoMask RxProtoIP
358 IPFail
= (1 << 16), /* IP checksum failed */
359 UDPFail
= (1 << 15), /* UDP/IP checksum failed */
360 TCPFail
= (1 << 14), /* TCP/IP checksum failed */
361 RxVlanTag
= (1 << 16), /* VLAN tag available */
364 #define RsvdMask 0x3fffc000
381 u8 __pad
[sizeof(void *) - sizeof(u32
)];
384 struct rtl8169_private
{
385 void __iomem
*mmio_addr
; /* memory map physical address */
386 struct pci_dev
*pci_dev
; /* Index of PCI device */
387 struct net_device
*dev
;
388 struct napi_struct napi
;
389 struct net_device_stats stats
; /* statistics of net device */
390 spinlock_t lock
; /* spin lock flag */
395 u32 cur_rx
; /* Index into the Rx descriptor buffer of next Rx pkt. */
396 u32 cur_tx
; /* Index into the Tx descriptor buffer of next Rx pkt. */
399 struct TxDesc
*TxDescArray
; /* 256-aligned Tx descriptor ring */
400 struct RxDesc
*RxDescArray
; /* 256-aligned Rx descriptor ring */
401 dma_addr_t TxPhyAddr
;
402 dma_addr_t RxPhyAddr
;
403 struct sk_buff
*Rx_skbuff
[NUM_RX_DESC
]; /* Rx data buffers */
404 struct ring_info tx_skb
[NUM_TX_DESC
]; /* Tx data buffers */
407 struct timer_list timer
;
412 int phy_auto_nego_reg
;
413 int phy_1000_ctrl_reg
;
414 #ifdef CONFIG_R8169_VLAN
415 struct vlan_group
*vlgrp
;
417 int (*set_speed
)(struct net_device
*, u8 autoneg
, u16 speed
, u8 duplex
);
418 void (*get_settings
)(struct net_device
*, struct ethtool_cmd
*);
419 void (*phy_reset_enable
)(void __iomem
*);
420 void (*hw_start
)(struct net_device
*);
421 unsigned int (*phy_reset_pending
)(void __iomem
*);
422 unsigned int (*link_ok
)(void __iomem
*);
423 struct delayed_work task
;
424 unsigned wol_enabled
: 1;
427 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
428 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
429 module_param(rx_copybreak
, int, 0);
430 MODULE_PARM_DESC(rx_copybreak
, "Copy breakpoint for copy-only-tiny-frames");
431 module_param(use_dac
, int, 0);
432 MODULE_PARM_DESC(use_dac
, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
433 module_param_named(debug
, debug
.msg_enable
, int, 0);
434 MODULE_PARM_DESC(debug
, "Debug verbosity level (0=none, ..., 16=all)");
435 MODULE_LICENSE("GPL");
436 MODULE_VERSION(RTL8169_VERSION
);
438 static int rtl8169_open(struct net_device
*dev
);
439 static int rtl8169_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
);
440 static irqreturn_t
rtl8169_interrupt(int irq
, void *dev_instance
);
441 static int rtl8169_init_ring(struct net_device
*dev
);
442 static void rtl_hw_start(struct net_device
*dev
);
443 static int rtl8169_close(struct net_device
*dev
);
444 static void rtl_set_rx_mode(struct net_device
*dev
);
445 static void rtl8169_tx_timeout(struct net_device
*dev
);
446 static struct net_device_stats
*rtl8169_get_stats(struct net_device
*dev
);
447 static int rtl8169_rx_interrupt(struct net_device
*, struct rtl8169_private
*,
448 void __iomem
*, u32 budget
);
449 static int rtl8169_change_mtu(struct net_device
*dev
, int new_mtu
);
450 static void rtl8169_down(struct net_device
*dev
);
451 static void rtl8169_rx_clear(struct rtl8169_private
*tp
);
453 #ifdef CONFIG_R8169_NAPI
454 static int rtl8169_poll(struct napi_struct
*napi
, int budget
);
457 static const unsigned int rtl8169_rx_config
=
458 (RX_FIFO_THRESH
<< RxCfgFIFOShift
) | (RX_DMA_BURST
<< RxCfgDMAShift
);
460 static void mdio_write(void __iomem
*ioaddr
, int reg_addr
, int value
)
464 RTL_W32(PHYAR
, 0x80000000 | (reg_addr
& 0xFF) << 16 | value
);
466 for (i
= 20; i
> 0; i
--) {
468 * Check if the RTL8169 has completed writing to the specified
471 if (!(RTL_R32(PHYAR
) & 0x80000000))
477 static int mdio_read(void __iomem
*ioaddr
, int reg_addr
)
481 RTL_W32(PHYAR
, 0x0 | (reg_addr
& 0xFF) << 16);
483 for (i
= 20; i
> 0; i
--) {
485 * Check if the RTL8169 has completed retrieving data from
486 * the specified MII register.
488 if (RTL_R32(PHYAR
) & 0x80000000) {
489 value
= (int) (RTL_R32(PHYAR
) & 0xFFFF);
497 static void rtl8169_irq_mask_and_ack(void __iomem
*ioaddr
)
499 RTL_W16(IntrMask
, 0x0000);
501 RTL_W16(IntrStatus
, 0xffff);
504 static void rtl8169_asic_down(void __iomem
*ioaddr
)
506 RTL_W8(ChipCmd
, 0x00);
507 rtl8169_irq_mask_and_ack(ioaddr
);
511 static unsigned int rtl8169_tbi_reset_pending(void __iomem
*ioaddr
)
513 return RTL_R32(TBICSR
) & TBIReset
;
516 static unsigned int rtl8169_xmii_reset_pending(void __iomem
*ioaddr
)
518 return mdio_read(ioaddr
, MII_BMCR
) & BMCR_RESET
;
521 static unsigned int rtl8169_tbi_link_ok(void __iomem
*ioaddr
)
523 return RTL_R32(TBICSR
) & TBILinkOk
;
526 static unsigned int rtl8169_xmii_link_ok(void __iomem
*ioaddr
)
528 return RTL_R8(PHYstatus
) & LinkStatus
;
531 static void rtl8169_tbi_reset_enable(void __iomem
*ioaddr
)
533 RTL_W32(TBICSR
, RTL_R32(TBICSR
) | TBIReset
);
536 static void rtl8169_xmii_reset_enable(void __iomem
*ioaddr
)
540 val
= mdio_read(ioaddr
, MII_BMCR
) | BMCR_RESET
;
541 mdio_write(ioaddr
, MII_BMCR
, val
& 0xffff);
544 static void rtl8169_check_link_status(struct net_device
*dev
,
545 struct rtl8169_private
*tp
,
546 void __iomem
*ioaddr
)
550 spin_lock_irqsave(&tp
->lock
, flags
);
551 if (tp
->link_ok(ioaddr
)) {
552 netif_carrier_on(dev
);
553 if (netif_msg_ifup(tp
))
554 printk(KERN_INFO PFX
"%s: link up\n", dev
->name
);
556 if (netif_msg_ifdown(tp
))
557 printk(KERN_INFO PFX
"%s: link down\n", dev
->name
);
558 netif_carrier_off(dev
);
560 spin_unlock_irqrestore(&tp
->lock
, flags
);
563 static void rtl8169_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
565 struct rtl8169_private
*tp
= netdev_priv(dev
);
566 void __iomem
*ioaddr
= tp
->mmio_addr
;
571 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
572 wol
->supported
= WAKE_ANY
;
574 spin_lock_irq(&tp
->lock
);
576 options
= RTL_R8(Config1
);
577 if (!(options
& PMEnable
))
580 options
= RTL_R8(Config3
);
581 if (options
& LinkUp
)
582 wol
->wolopts
|= WAKE_PHY
;
583 if (options
& MagicPacket
)
584 wol
->wolopts
|= WAKE_MAGIC
;
586 options
= RTL_R8(Config5
);
588 wol
->wolopts
|= WAKE_UCAST
;
590 wol
->wolopts
|= WAKE_BCAST
;
592 wol
->wolopts
|= WAKE_MCAST
;
595 spin_unlock_irq(&tp
->lock
);
598 static int rtl8169_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
600 struct rtl8169_private
*tp
= netdev_priv(dev
);
601 void __iomem
*ioaddr
= tp
->mmio_addr
;
608 { WAKE_ANY
, Config1
, PMEnable
},
609 { WAKE_PHY
, Config3
, LinkUp
},
610 { WAKE_MAGIC
, Config3
, MagicPacket
},
611 { WAKE_UCAST
, Config5
, UWF
},
612 { WAKE_BCAST
, Config5
, BWF
},
613 { WAKE_MCAST
, Config5
, MWF
},
614 { WAKE_ANY
, Config5
, LanWake
}
617 spin_lock_irq(&tp
->lock
);
619 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
621 for (i
= 0; i
< ARRAY_SIZE(cfg
); i
++) {
622 u8 options
= RTL_R8(cfg
[i
].reg
) & ~cfg
[i
].mask
;
623 if (wol
->wolopts
& cfg
[i
].opt
)
624 options
|= cfg
[i
].mask
;
625 RTL_W8(cfg
[i
].reg
, options
);
628 RTL_W8(Cfg9346
, Cfg9346_Lock
);
630 tp
->wol_enabled
= (wol
->wolopts
) ? 1 : 0;
632 spin_unlock_irq(&tp
->lock
);
637 static void rtl8169_get_drvinfo(struct net_device
*dev
,
638 struct ethtool_drvinfo
*info
)
640 struct rtl8169_private
*tp
= netdev_priv(dev
);
642 strcpy(info
->driver
, MODULENAME
);
643 strcpy(info
->version
, RTL8169_VERSION
);
644 strcpy(info
->bus_info
, pci_name(tp
->pci_dev
));
647 static int rtl8169_get_regs_len(struct net_device
*dev
)
649 return R8169_REGS_SIZE
;
652 static int rtl8169_set_speed_tbi(struct net_device
*dev
,
653 u8 autoneg
, u16 speed
, u8 duplex
)
655 struct rtl8169_private
*tp
= netdev_priv(dev
);
656 void __iomem
*ioaddr
= tp
->mmio_addr
;
660 reg
= RTL_R32(TBICSR
);
661 if ((autoneg
== AUTONEG_DISABLE
) && (speed
== SPEED_1000
) &&
662 (duplex
== DUPLEX_FULL
)) {
663 RTL_W32(TBICSR
, reg
& ~(TBINwEnable
| TBINwRestart
));
664 } else if (autoneg
== AUTONEG_ENABLE
)
665 RTL_W32(TBICSR
, reg
| TBINwEnable
| TBINwRestart
);
667 if (netif_msg_link(tp
)) {
668 printk(KERN_WARNING
"%s: "
669 "incorrect speed setting refused in TBI mode\n",
678 static int rtl8169_set_speed_xmii(struct net_device
*dev
,
679 u8 autoneg
, u16 speed
, u8 duplex
)
681 struct rtl8169_private
*tp
= netdev_priv(dev
);
682 void __iomem
*ioaddr
= tp
->mmio_addr
;
683 int auto_nego
, giga_ctrl
;
685 auto_nego
= mdio_read(ioaddr
, MII_ADVERTISE
);
686 auto_nego
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
687 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
688 giga_ctrl
= mdio_read(ioaddr
, MII_CTRL1000
);
689 giga_ctrl
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
691 if (autoneg
== AUTONEG_ENABLE
) {
692 auto_nego
|= (ADVERTISE_10HALF
| ADVERTISE_10FULL
|
693 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
694 giga_ctrl
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
696 if (speed
== SPEED_10
)
697 auto_nego
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
698 else if (speed
== SPEED_100
)
699 auto_nego
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
700 else if (speed
== SPEED_1000
)
701 giga_ctrl
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
703 if (duplex
== DUPLEX_HALF
)
704 auto_nego
&= ~(ADVERTISE_10FULL
| ADVERTISE_100FULL
);
706 if (duplex
== DUPLEX_FULL
)
707 auto_nego
&= ~(ADVERTISE_10HALF
| ADVERTISE_100HALF
);
709 /* This tweak comes straight from Realtek's driver. */
710 if ((speed
== SPEED_100
) && (duplex
== DUPLEX_HALF
) &&
711 (tp
->mac_version
== RTL_GIGA_MAC_VER_13
)) {
712 auto_nego
= ADVERTISE_100HALF
| ADVERTISE_CSMA
;
716 /* The 8100e/8101e do Fast Ethernet only. */
717 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_13
) ||
718 (tp
->mac_version
== RTL_GIGA_MAC_VER_14
) ||
719 (tp
->mac_version
== RTL_GIGA_MAC_VER_15
)) {
720 if ((giga_ctrl
& (ADVERTISE_1000FULL
| ADVERTISE_1000HALF
)) &&
721 netif_msg_link(tp
)) {
722 printk(KERN_INFO
"%s: PHY does not support 1000Mbps.\n",
725 giga_ctrl
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
728 auto_nego
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
730 if (tp
->mac_version
== RTL_GIGA_MAC_VER_12
) {
731 /* Vendor specific (0x1f) and reserved (0x0e) MII registers. */
732 mdio_write(ioaddr
, 0x1f, 0x0000);
733 mdio_write(ioaddr
, 0x0e, 0x0000);
736 tp
->phy_auto_nego_reg
= auto_nego
;
737 tp
->phy_1000_ctrl_reg
= giga_ctrl
;
739 mdio_write(ioaddr
, MII_ADVERTISE
, auto_nego
);
740 mdio_write(ioaddr
, MII_CTRL1000
, giga_ctrl
);
741 mdio_write(ioaddr
, MII_BMCR
, BMCR_ANENABLE
| BMCR_ANRESTART
);
745 static int rtl8169_set_speed(struct net_device
*dev
,
746 u8 autoneg
, u16 speed
, u8 duplex
)
748 struct rtl8169_private
*tp
= netdev_priv(dev
);
751 ret
= tp
->set_speed(dev
, autoneg
, speed
, duplex
);
753 if (netif_running(dev
) && (tp
->phy_1000_ctrl_reg
& ADVERTISE_1000FULL
))
754 mod_timer(&tp
->timer
, jiffies
+ RTL8169_PHY_TIMEOUT
);
759 static int rtl8169_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
761 struct rtl8169_private
*tp
= netdev_priv(dev
);
765 spin_lock_irqsave(&tp
->lock
, flags
);
766 ret
= rtl8169_set_speed(dev
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
767 spin_unlock_irqrestore(&tp
->lock
, flags
);
772 static u32
rtl8169_get_rx_csum(struct net_device
*dev
)
774 struct rtl8169_private
*tp
= netdev_priv(dev
);
776 return tp
->cp_cmd
& RxChkSum
;
779 static int rtl8169_set_rx_csum(struct net_device
*dev
, u32 data
)
781 struct rtl8169_private
*tp
= netdev_priv(dev
);
782 void __iomem
*ioaddr
= tp
->mmio_addr
;
785 spin_lock_irqsave(&tp
->lock
, flags
);
788 tp
->cp_cmd
|= RxChkSum
;
790 tp
->cp_cmd
&= ~RxChkSum
;
792 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
795 spin_unlock_irqrestore(&tp
->lock
, flags
);
800 #ifdef CONFIG_R8169_VLAN
802 static inline u32
rtl8169_tx_vlan_tag(struct rtl8169_private
*tp
,
805 return (tp
->vlgrp
&& vlan_tx_tag_present(skb
)) ?
806 TxVlanTag
| swab16(vlan_tx_tag_get(skb
)) : 0x00;
809 static void rtl8169_vlan_rx_register(struct net_device
*dev
,
810 struct vlan_group
*grp
)
812 struct rtl8169_private
*tp
= netdev_priv(dev
);
813 void __iomem
*ioaddr
= tp
->mmio_addr
;
816 spin_lock_irqsave(&tp
->lock
, flags
);
819 tp
->cp_cmd
|= RxVlan
;
821 tp
->cp_cmd
&= ~RxVlan
;
822 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
824 spin_unlock_irqrestore(&tp
->lock
, flags
);
827 static int rtl8169_rx_vlan_skb(struct rtl8169_private
*tp
, struct RxDesc
*desc
,
830 u32 opts2
= le32_to_cpu(desc
->opts2
);
833 if (tp
->vlgrp
&& (opts2
& RxVlanTag
)) {
834 rtl8169_rx_hwaccel_skb(skb
, tp
->vlgrp
, swab16(opts2
& 0xffff));
842 #else /* !CONFIG_R8169_VLAN */
844 static inline u32
rtl8169_tx_vlan_tag(struct rtl8169_private
*tp
,
850 static int rtl8169_rx_vlan_skb(struct rtl8169_private
*tp
, struct RxDesc
*desc
,
858 static void rtl8169_gset_tbi(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
860 struct rtl8169_private
*tp
= netdev_priv(dev
);
861 void __iomem
*ioaddr
= tp
->mmio_addr
;
865 SUPPORTED_1000baseT_Full
| SUPPORTED_Autoneg
| SUPPORTED_FIBRE
;
866 cmd
->port
= PORT_FIBRE
;
867 cmd
->transceiver
= XCVR_INTERNAL
;
869 status
= RTL_R32(TBICSR
);
870 cmd
->advertising
= (status
& TBINwEnable
) ? ADVERTISED_Autoneg
: 0;
871 cmd
->autoneg
= !!(status
& TBINwEnable
);
873 cmd
->speed
= SPEED_1000
;
874 cmd
->duplex
= DUPLEX_FULL
; /* Always set */
877 static void rtl8169_gset_xmii(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
879 struct rtl8169_private
*tp
= netdev_priv(dev
);
880 void __iomem
*ioaddr
= tp
->mmio_addr
;
883 cmd
->supported
= SUPPORTED_10baseT_Half
|
884 SUPPORTED_10baseT_Full
|
885 SUPPORTED_100baseT_Half
|
886 SUPPORTED_100baseT_Full
|
887 SUPPORTED_1000baseT_Full
|
892 cmd
->advertising
= ADVERTISED_TP
| ADVERTISED_Autoneg
;
894 if (tp
->phy_auto_nego_reg
& ADVERTISE_10HALF
)
895 cmd
->advertising
|= ADVERTISED_10baseT_Half
;
896 if (tp
->phy_auto_nego_reg
& ADVERTISE_10FULL
)
897 cmd
->advertising
|= ADVERTISED_10baseT_Full
;
898 if (tp
->phy_auto_nego_reg
& ADVERTISE_100HALF
)
899 cmd
->advertising
|= ADVERTISED_100baseT_Half
;
900 if (tp
->phy_auto_nego_reg
& ADVERTISE_100FULL
)
901 cmd
->advertising
|= ADVERTISED_100baseT_Full
;
902 if (tp
->phy_1000_ctrl_reg
& ADVERTISE_1000FULL
)
903 cmd
->advertising
|= ADVERTISED_1000baseT_Full
;
905 status
= RTL_R8(PHYstatus
);
907 if (status
& _1000bpsF
)
908 cmd
->speed
= SPEED_1000
;
909 else if (status
& _100bps
)
910 cmd
->speed
= SPEED_100
;
911 else if (status
& _10bps
)
912 cmd
->speed
= SPEED_10
;
914 if (status
& TxFlowCtrl
)
915 cmd
->advertising
|= ADVERTISED_Asym_Pause
;
916 if (status
& RxFlowCtrl
)
917 cmd
->advertising
|= ADVERTISED_Pause
;
919 cmd
->duplex
= ((status
& _1000bpsF
) || (status
& FullDup
)) ?
920 DUPLEX_FULL
: DUPLEX_HALF
;
923 static int rtl8169_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
925 struct rtl8169_private
*tp
= netdev_priv(dev
);
928 spin_lock_irqsave(&tp
->lock
, flags
);
930 tp
->get_settings(dev
, cmd
);
932 spin_unlock_irqrestore(&tp
->lock
, flags
);
936 static void rtl8169_get_regs(struct net_device
*dev
, struct ethtool_regs
*regs
,
939 struct rtl8169_private
*tp
= netdev_priv(dev
);
942 if (regs
->len
> R8169_REGS_SIZE
)
943 regs
->len
= R8169_REGS_SIZE
;
945 spin_lock_irqsave(&tp
->lock
, flags
);
946 memcpy_fromio(p
, tp
->mmio_addr
, regs
->len
);
947 spin_unlock_irqrestore(&tp
->lock
, flags
);
950 static u32
rtl8169_get_msglevel(struct net_device
*dev
)
952 struct rtl8169_private
*tp
= netdev_priv(dev
);
954 return tp
->msg_enable
;
957 static void rtl8169_set_msglevel(struct net_device
*dev
, u32 value
)
959 struct rtl8169_private
*tp
= netdev_priv(dev
);
961 tp
->msg_enable
= value
;
964 static const char rtl8169_gstrings
[][ETH_GSTRING_LEN
] = {
971 "tx_single_collisions",
972 "tx_multi_collisions",
980 struct rtl8169_counters
{
987 __le32 tx_one_collision
;
988 __le32 tx_multi_collision
;
996 static int rtl8169_get_sset_count(struct net_device
*dev
, int sset
)
1000 return ARRAY_SIZE(rtl8169_gstrings
);
1006 static void rtl8169_get_ethtool_stats(struct net_device
*dev
,
1007 struct ethtool_stats
*stats
, u64
*data
)
1009 struct rtl8169_private
*tp
= netdev_priv(dev
);
1010 void __iomem
*ioaddr
= tp
->mmio_addr
;
1011 struct rtl8169_counters
*counters
;
1017 counters
= pci_alloc_consistent(tp
->pci_dev
, sizeof(*counters
), &paddr
);
1021 RTL_W32(CounterAddrHigh
, (u64
)paddr
>> 32);
1022 cmd
= (u64
)paddr
& DMA_32BIT_MASK
;
1023 RTL_W32(CounterAddrLow
, cmd
);
1024 RTL_W32(CounterAddrLow
, cmd
| CounterDump
);
1026 while (RTL_R32(CounterAddrLow
) & CounterDump
) {
1027 if (msleep_interruptible(1))
1031 RTL_W32(CounterAddrLow
, 0);
1032 RTL_W32(CounterAddrHigh
, 0);
1034 data
[0] = le64_to_cpu(counters
->tx_packets
);
1035 data
[1] = le64_to_cpu(counters
->rx_packets
);
1036 data
[2] = le64_to_cpu(counters
->tx_errors
);
1037 data
[3] = le32_to_cpu(counters
->rx_errors
);
1038 data
[4] = le16_to_cpu(counters
->rx_missed
);
1039 data
[5] = le16_to_cpu(counters
->align_errors
);
1040 data
[6] = le32_to_cpu(counters
->tx_one_collision
);
1041 data
[7] = le32_to_cpu(counters
->tx_multi_collision
);
1042 data
[8] = le64_to_cpu(counters
->rx_unicast
);
1043 data
[9] = le64_to_cpu(counters
->rx_broadcast
);
1044 data
[10] = le32_to_cpu(counters
->rx_multicast
);
1045 data
[11] = le16_to_cpu(counters
->tx_aborted
);
1046 data
[12] = le16_to_cpu(counters
->tx_underun
);
1048 pci_free_consistent(tp
->pci_dev
, sizeof(*counters
), counters
, paddr
);
1051 static void rtl8169_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
1055 memcpy(data
, *rtl8169_gstrings
, sizeof(rtl8169_gstrings
));
1060 static const struct ethtool_ops rtl8169_ethtool_ops
= {
1061 .get_drvinfo
= rtl8169_get_drvinfo
,
1062 .get_regs_len
= rtl8169_get_regs_len
,
1063 .get_link
= ethtool_op_get_link
,
1064 .get_settings
= rtl8169_get_settings
,
1065 .set_settings
= rtl8169_set_settings
,
1066 .get_msglevel
= rtl8169_get_msglevel
,
1067 .set_msglevel
= rtl8169_set_msglevel
,
1068 .get_rx_csum
= rtl8169_get_rx_csum
,
1069 .set_rx_csum
= rtl8169_set_rx_csum
,
1070 .set_tx_csum
= ethtool_op_set_tx_csum
,
1071 .set_sg
= ethtool_op_set_sg
,
1072 .set_tso
= ethtool_op_set_tso
,
1073 .get_regs
= rtl8169_get_regs
,
1074 .get_wol
= rtl8169_get_wol
,
1075 .set_wol
= rtl8169_set_wol
,
1076 .get_strings
= rtl8169_get_strings
,
1077 .get_sset_count
= rtl8169_get_sset_count
,
1078 .get_ethtool_stats
= rtl8169_get_ethtool_stats
,
1081 static void rtl8169_write_gmii_reg_bit(void __iomem
*ioaddr
, int reg
,
1082 int bitnum
, int bitval
)
1086 val
= mdio_read(ioaddr
, reg
);
1087 val
= (bitval
== 1) ?
1088 val
| (bitval
<< bitnum
) : val
& ~(0x0001 << bitnum
);
1089 mdio_write(ioaddr
, reg
, val
& 0xffff);
1092 static void rtl8169_get_mac_version(struct rtl8169_private
*tp
,
1093 void __iomem
*ioaddr
)
1096 * The driver currently handles the 8168Bf and the 8168Be identically
1097 * but they can be identified more specifically through the test below
1100 * (RTL_R32(TxConfig) & 0x700000) == 0x500000 ? 8168Bf : 8168Be
1102 * Same thing for the 8101Eb and the 8101Ec:
1104 * (RTL_R32(TxConfig) & 0x700000) == 0x200000 ? 8101Eb : 8101Ec
1110 { 0x38800000, RTL_GIGA_MAC_VER_15
},
1111 { 0x38000000, RTL_GIGA_MAC_VER_12
},
1112 { 0x34000000, RTL_GIGA_MAC_VER_13
},
1113 { 0x30800000, RTL_GIGA_MAC_VER_14
},
1114 { 0x30000000, RTL_GIGA_MAC_VER_11
},
1115 { 0x98000000, RTL_GIGA_MAC_VER_06
},
1116 { 0x18000000, RTL_GIGA_MAC_VER_05
},
1117 { 0x10000000, RTL_GIGA_MAC_VER_04
},
1118 { 0x04000000, RTL_GIGA_MAC_VER_03
},
1119 { 0x00800000, RTL_GIGA_MAC_VER_02
},
1120 { 0x00000000, RTL_GIGA_MAC_VER_01
} /* Catch-all */
1124 reg
= RTL_R32(TxConfig
) & 0xfc800000;
1125 while ((reg
& p
->mask
) != p
->mask
)
1127 tp
->mac_version
= p
->mac_version
;
1130 static void rtl8169_print_mac_version(struct rtl8169_private
*tp
)
1132 dprintk("mac_version = 0x%02x\n", tp
->mac_version
);
1135 static void rtl8169_get_phy_version(struct rtl8169_private
*tp
,
1136 void __iomem
*ioaddr
)
1143 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G
},
1144 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F
},
1145 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E
},
1146 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D
} /* Catch-all */
1150 reg
= mdio_read(ioaddr
, MII_PHYSID2
) & 0xffff;
1151 while ((reg
& p
->mask
) != p
->set
)
1153 tp
->phy_version
= p
->phy_version
;
1156 static void rtl8169_print_phy_version(struct rtl8169_private
*tp
)
1163 { RTL_GIGA_PHY_VER_G
, "RTL_GIGA_PHY_VER_G", 0x0002 },
1164 { RTL_GIGA_PHY_VER_F
, "RTL_GIGA_PHY_VER_F", 0x0001 },
1165 { RTL_GIGA_PHY_VER_E
, "RTL_GIGA_PHY_VER_E", 0x0000 },
1166 { RTL_GIGA_PHY_VER_D
, "RTL_GIGA_PHY_VER_D", 0x0000 },
1170 for (p
= phy_print
; p
->msg
; p
++) {
1171 if (tp
->phy_version
== p
->version
) {
1172 dprintk("phy_version == %s (%04x)\n", p
->msg
, p
->reg
);
1176 dprintk("phy_version == Unknown\n");
1179 static void rtl8169_hw_phy_config(struct net_device
*dev
)
1181 struct rtl8169_private
*tp
= netdev_priv(dev
);
1182 void __iomem
*ioaddr
= tp
->mmio_addr
;
1184 u16 regs
[5]; /* Beware of bit-sign propagation */
1185 } phy_magic
[5] = { {
1186 { 0x0000, //w 4 15 12 0
1187 0x00a1, //w 3 15 0 00a1
1188 0x0008, //w 2 15 0 0008
1189 0x1020, //w 1 15 0 1020
1190 0x1000 } },{ //w 0 15 0 1000
1191 { 0x7000, //w 4 15 12 7
1192 0xff41, //w 3 15 0 ff41
1193 0xde60, //w 2 15 0 de60
1194 0x0140, //w 1 15 0 0140
1195 0x0077 } },{ //w 0 15 0 0077
1196 { 0xa000, //w 4 15 12 a
1197 0xdf01, //w 3 15 0 df01
1198 0xdf20, //w 2 15 0 df20
1199 0xff95, //w 1 15 0 ff95
1200 0xfa00 } },{ //w 0 15 0 fa00
1201 { 0xb000, //w 4 15 12 b
1202 0xff41, //w 3 15 0 ff41
1203 0xde20, //w 2 15 0 de20
1204 0x0140, //w 1 15 0 0140
1205 0x00bb } },{ //w 0 15 0 00bb
1206 { 0xf000, //w 4 15 12 f
1207 0xdf01, //w 3 15 0 df01
1208 0xdf20, //w 2 15 0 df20
1209 0xff95, //w 1 15 0 ff95
1210 0xbf00 } //w 0 15 0 bf00
1215 rtl8169_print_mac_version(tp
);
1216 rtl8169_print_phy_version(tp
);
1218 if (tp
->mac_version
<= RTL_GIGA_MAC_VER_01
)
1220 if (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
)
1223 dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1224 dprintk("Do final_reg2.cfg\n");
1228 if (tp
->mac_version
== RTL_GIGA_MAC_VER_04
) {
1229 mdio_write(ioaddr
, 31, 0x0002);
1230 mdio_write(ioaddr
, 1, 0x90d0);
1231 mdio_write(ioaddr
, 31, 0x0000);
1235 if ((tp
->mac_version
!= RTL_GIGA_MAC_VER_02
) &&
1236 (tp
->mac_version
!= RTL_GIGA_MAC_VER_03
))
1239 mdio_write(ioaddr
, 31, 0x0001); //w 31 2 0 1
1240 mdio_write(ioaddr
, 21, 0x1000); //w 21 15 0 1000
1241 mdio_write(ioaddr
, 24, 0x65c7); //w 24 15 0 65c7
1242 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 0); //w 4 11 11 0
1244 for (i
= 0; i
< ARRAY_SIZE(phy_magic
); i
++, p
++) {
1247 val
= (mdio_read(ioaddr
, pos
) & 0x0fff) | (p
->regs
[0] & 0xffff);
1248 mdio_write(ioaddr
, pos
, val
);
1250 mdio_write(ioaddr
, pos
, p
->regs
[4 - pos
] & 0xffff);
1251 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 1); //w 4 11 11 1
1252 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 0); //w 4 11 11 0
1254 mdio_write(ioaddr
, 31, 0x0000); //w 31 2 0 0
1257 static void rtl8169_phy_timer(unsigned long __opaque
)
1259 struct net_device
*dev
= (struct net_device
*)__opaque
;
1260 struct rtl8169_private
*tp
= netdev_priv(dev
);
1261 struct timer_list
*timer
= &tp
->timer
;
1262 void __iomem
*ioaddr
= tp
->mmio_addr
;
1263 unsigned long timeout
= RTL8169_PHY_TIMEOUT
;
1265 assert(tp
->mac_version
> RTL_GIGA_MAC_VER_01
);
1266 assert(tp
->phy_version
< RTL_GIGA_PHY_VER_H
);
1268 if (!(tp
->phy_1000_ctrl_reg
& ADVERTISE_1000FULL
))
1271 spin_lock_irq(&tp
->lock
);
1273 if (tp
->phy_reset_pending(ioaddr
)) {
1275 * A busy loop could burn quite a few cycles on nowadays CPU.
1276 * Let's delay the execution of the timer for a few ticks.
1282 if (tp
->link_ok(ioaddr
))
1285 if (netif_msg_link(tp
))
1286 printk(KERN_WARNING
"%s: PHY reset until link up\n", dev
->name
);
1288 tp
->phy_reset_enable(ioaddr
);
1291 mod_timer(timer
, jiffies
+ timeout
);
1293 spin_unlock_irq(&tp
->lock
);
1296 static inline void rtl8169_delete_timer(struct net_device
*dev
)
1298 struct rtl8169_private
*tp
= netdev_priv(dev
);
1299 struct timer_list
*timer
= &tp
->timer
;
1301 if ((tp
->mac_version
<= RTL_GIGA_MAC_VER_01
) ||
1302 (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
))
1305 del_timer_sync(timer
);
1308 static inline void rtl8169_request_timer(struct net_device
*dev
)
1310 struct rtl8169_private
*tp
= netdev_priv(dev
);
1311 struct timer_list
*timer
= &tp
->timer
;
1313 if ((tp
->mac_version
<= RTL_GIGA_MAC_VER_01
) ||
1314 (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
))
1317 mod_timer(timer
, jiffies
+ RTL8169_PHY_TIMEOUT
);
1320 #ifdef CONFIG_NET_POLL_CONTROLLER
1322 * Polling 'interrupt' - used by things like netconsole to send skbs
1323 * without having to re-enable interrupts. It's not called while
1324 * the interrupt routine is executing.
1326 static void rtl8169_netpoll(struct net_device
*dev
)
1328 struct rtl8169_private
*tp
= netdev_priv(dev
);
1329 struct pci_dev
*pdev
= tp
->pci_dev
;
1331 disable_irq(pdev
->irq
);
1332 rtl8169_interrupt(pdev
->irq
, dev
);
1333 enable_irq(pdev
->irq
);
1337 static void rtl8169_release_board(struct pci_dev
*pdev
, struct net_device
*dev
,
1338 void __iomem
*ioaddr
)
1341 pci_release_regions(pdev
);
1342 pci_disable_device(pdev
);
1346 static void rtl8169_phy_reset(struct net_device
*dev
,
1347 struct rtl8169_private
*tp
)
1349 void __iomem
*ioaddr
= tp
->mmio_addr
;
1352 tp
->phy_reset_enable(ioaddr
);
1353 for (i
= 0; i
< 100; i
++) {
1354 if (!tp
->phy_reset_pending(ioaddr
))
1358 if (netif_msg_link(tp
))
1359 printk(KERN_ERR
"%s: PHY reset failed.\n", dev
->name
);
1362 static void rtl8169_init_phy(struct net_device
*dev
, struct rtl8169_private
*tp
)
1364 void __iomem
*ioaddr
= tp
->mmio_addr
;
1366 rtl8169_hw_phy_config(dev
);
1368 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1371 pci_write_config_byte(tp
->pci_dev
, PCI_LATENCY_TIMER
, 0x40);
1373 if (tp
->mac_version
<= RTL_GIGA_MAC_VER_06
)
1374 pci_write_config_byte(tp
->pci_dev
, PCI_CACHE_LINE_SIZE
, 0x08);
1376 if (tp
->mac_version
== RTL_GIGA_MAC_VER_02
) {
1377 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1379 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1380 mdio_write(ioaddr
, 0x0b, 0x0000); //w 0x0b 15 0 0
1383 rtl8169_phy_reset(dev
, tp
);
1386 * rtl8169_set_speed_xmii takes good care of the Fast Ethernet
1387 * only 8101. Don't panic.
1389 rtl8169_set_speed(dev
, AUTONEG_ENABLE
, SPEED_1000
, DUPLEX_FULL
);
1391 if ((RTL_R8(PHYstatus
) & TBI_Enable
) && netif_msg_link(tp
))
1392 printk(KERN_INFO PFX
"%s: TBI auto-negotiating\n", dev
->name
);
1395 static void rtl_rar_set(struct rtl8169_private
*tp
, u8
*addr
)
1397 void __iomem
*ioaddr
= tp
->mmio_addr
;
1401 low
= addr
[0] | (addr
[1] << 8) | (addr
[2] << 16) | (addr
[3] << 24);
1402 high
= addr
[4] | (addr
[5] << 8);
1404 spin_lock_irq(&tp
->lock
);
1406 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1408 RTL_W32(MAC4
, high
);
1409 RTL_W8(Cfg9346
, Cfg9346_Lock
);
1411 spin_unlock_irq(&tp
->lock
);
1414 static int rtl_set_mac_address(struct net_device
*dev
, void *p
)
1416 struct rtl8169_private
*tp
= netdev_priv(dev
);
1417 struct sockaddr
*addr
= p
;
1419 if (!is_valid_ether_addr(addr
->sa_data
))
1420 return -EADDRNOTAVAIL
;
1422 memcpy(dev
->dev_addr
, addr
->sa_data
, dev
->addr_len
);
1424 rtl_rar_set(tp
, dev
->dev_addr
);
1429 static int rtl8169_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1431 struct rtl8169_private
*tp
= netdev_priv(dev
);
1432 struct mii_ioctl_data
*data
= if_mii(ifr
);
1434 if (!netif_running(dev
))
1439 data
->phy_id
= 32; /* Internal PHY */
1443 data
->val_out
= mdio_read(tp
->mmio_addr
, data
->reg_num
& 0x1f);
1447 if (!capable(CAP_NET_ADMIN
))
1449 mdio_write(tp
->mmio_addr
, data
->reg_num
& 0x1f, data
->val_in
);
1455 static const struct rtl_cfg_info
{
1456 void (*hw_start
)(struct net_device
*);
1457 unsigned int region
;
1461 } rtl_cfg_infos
[] = {
1463 .hw_start
= rtl_hw_start_8169
,
1466 .intr_event
= SYSErr
| LinkChg
| RxOverflow
|
1467 RxFIFOOver
| TxErr
| TxOK
| RxOK
| RxErr
,
1468 .napi_event
= RxFIFOOver
| TxErr
| TxOK
| RxOK
| RxOverflow
1471 .hw_start
= rtl_hw_start_8168
,
1474 .intr_event
= SYSErr
| LinkChg
| RxOverflow
|
1475 TxErr
| TxOK
| RxOK
| RxErr
,
1476 .napi_event
= TxErr
| TxOK
| RxOK
| RxOverflow
1479 .hw_start
= rtl_hw_start_8101
,
1482 .intr_event
= SYSErr
| LinkChg
| RxOverflow
| PCSTimeout
|
1483 RxFIFOOver
| TxErr
| TxOK
| RxOK
| RxErr
,
1484 .napi_event
= RxFIFOOver
| TxErr
| TxOK
| RxOK
| RxOverflow
1488 static int __devinit
1489 rtl8169_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1491 const struct rtl_cfg_info
*cfg
= rtl_cfg_infos
+ ent
->driver_data
;
1492 const unsigned int region
= cfg
->region
;
1493 struct rtl8169_private
*tp
;
1494 struct net_device
*dev
;
1495 void __iomem
*ioaddr
;
1499 if (netif_msg_drv(&debug
)) {
1500 printk(KERN_INFO
"%s Gigabit Ethernet driver %s loaded\n",
1501 MODULENAME
, RTL8169_VERSION
);
1504 dev
= alloc_etherdev(sizeof (*tp
));
1506 if (netif_msg_drv(&debug
))
1507 dev_err(&pdev
->dev
, "unable to alloc new ethernet\n");
1512 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1513 tp
= netdev_priv(dev
);
1515 tp
->msg_enable
= netif_msg_init(debug
.msg_enable
, R8169_MSG_DEFAULT
);
1517 /* enable device (incl. PCI PM wakeup and hotplug setup) */
1518 rc
= pci_enable_device(pdev
);
1520 if (netif_msg_probe(tp
))
1521 dev_err(&pdev
->dev
, "enable failure\n");
1522 goto err_out_free_dev_1
;
1525 rc
= pci_set_mwi(pdev
);
1527 goto err_out_disable_2
;
1529 /* make sure PCI base addr 1 is MMIO */
1530 if (!(pci_resource_flags(pdev
, region
) & IORESOURCE_MEM
)) {
1531 if (netif_msg_probe(tp
)) {
1533 "region #%d not an MMIO resource, aborting\n",
1540 /* check for weird/broken PCI region reporting */
1541 if (pci_resource_len(pdev
, region
) < R8169_REGS_SIZE
) {
1542 if (netif_msg_probe(tp
)) {
1544 "Invalid PCI region size(s), aborting\n");
1550 rc
= pci_request_regions(pdev
, MODULENAME
);
1552 if (netif_msg_probe(tp
))
1553 dev_err(&pdev
->dev
, "could not request regions.\n");
1557 tp
->cp_cmd
= PCIMulRW
| RxChkSum
;
1559 if ((sizeof(dma_addr_t
) > 4) &&
1560 !pci_set_dma_mask(pdev
, DMA_64BIT_MASK
) && use_dac
) {
1561 tp
->cp_cmd
|= PCIDAC
;
1562 dev
->features
|= NETIF_F_HIGHDMA
;
1564 rc
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1566 if (netif_msg_probe(tp
)) {
1568 "DMA configuration failed.\n");
1570 goto err_out_free_res_4
;
1574 pci_set_master(pdev
);
1576 /* ioremap MMIO region */
1577 ioaddr
= ioremap(pci_resource_start(pdev
, region
), R8169_REGS_SIZE
);
1579 if (netif_msg_probe(tp
))
1580 dev_err(&pdev
->dev
, "cannot remap MMIO, aborting\n");
1582 goto err_out_free_res_4
;
1585 /* Unneeded ? Don't mess with Mrs. Murphy. */
1586 rtl8169_irq_mask_and_ack(ioaddr
);
1588 /* Soft reset the chip. */
1589 RTL_W8(ChipCmd
, CmdReset
);
1591 /* Check that the chip has finished the reset. */
1592 for (i
= 0; i
< 100; i
++) {
1593 if ((RTL_R8(ChipCmd
) & CmdReset
) == 0)
1595 msleep_interruptible(1);
1598 /* Identify chip attached to board */
1599 rtl8169_get_mac_version(tp
, ioaddr
);
1600 rtl8169_get_phy_version(tp
, ioaddr
);
1602 rtl8169_print_mac_version(tp
);
1603 rtl8169_print_phy_version(tp
);
1605 for (i
= ARRAY_SIZE(rtl_chip_info
) - 1; i
>= 0; i
--) {
1606 if (tp
->mac_version
== rtl_chip_info
[i
].mac_version
)
1610 /* Unknown chip: assume array element #0, original RTL-8169 */
1611 if (netif_msg_probe(tp
)) {
1612 dev_printk(KERN_DEBUG
, &pdev
->dev
,
1613 "unknown chip version, assuming %s\n",
1614 rtl_chip_info
[0].name
);
1620 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1621 RTL_W8(Config1
, RTL_R8(Config1
) | PMEnable
);
1622 RTL_W8(Config5
, RTL_R8(Config5
) & PMEStatus
);
1623 RTL_W8(Cfg9346
, Cfg9346_Lock
);
1625 if (RTL_R8(PHYstatus
) & TBI_Enable
) {
1626 tp
->set_speed
= rtl8169_set_speed_tbi
;
1627 tp
->get_settings
= rtl8169_gset_tbi
;
1628 tp
->phy_reset_enable
= rtl8169_tbi_reset_enable
;
1629 tp
->phy_reset_pending
= rtl8169_tbi_reset_pending
;
1630 tp
->link_ok
= rtl8169_tbi_link_ok
;
1632 tp
->phy_1000_ctrl_reg
= ADVERTISE_1000FULL
; /* Implied by TBI */
1634 tp
->set_speed
= rtl8169_set_speed_xmii
;
1635 tp
->get_settings
= rtl8169_gset_xmii
;
1636 tp
->phy_reset_enable
= rtl8169_xmii_reset_enable
;
1637 tp
->phy_reset_pending
= rtl8169_xmii_reset_pending
;
1638 tp
->link_ok
= rtl8169_xmii_link_ok
;
1640 dev
->do_ioctl
= rtl8169_ioctl
;
1643 /* Get MAC address. FIXME: read EEPROM */
1644 for (i
= 0; i
< MAC_ADDR_LEN
; i
++)
1645 dev
->dev_addr
[i
] = RTL_R8(MAC0
+ i
);
1646 memcpy(dev
->perm_addr
, dev
->dev_addr
, dev
->addr_len
);
1648 dev
->open
= rtl8169_open
;
1649 dev
->hard_start_xmit
= rtl8169_start_xmit
;
1650 dev
->get_stats
= rtl8169_get_stats
;
1651 SET_ETHTOOL_OPS(dev
, &rtl8169_ethtool_ops
);
1652 dev
->stop
= rtl8169_close
;
1653 dev
->tx_timeout
= rtl8169_tx_timeout
;
1654 dev
->set_multicast_list
= rtl_set_rx_mode
;
1655 dev
->watchdog_timeo
= RTL8169_TX_TIMEOUT
;
1656 dev
->irq
= pdev
->irq
;
1657 dev
->base_addr
= (unsigned long) ioaddr
;
1658 dev
->change_mtu
= rtl8169_change_mtu
;
1659 dev
->set_mac_address
= rtl_set_mac_address
;
1661 #ifdef CONFIG_R8169_NAPI
1662 netif_napi_add(dev
, &tp
->napi
, rtl8169_poll
, R8169_NAPI_WEIGHT
);
1665 #ifdef CONFIG_R8169_VLAN
1666 dev
->features
|= NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX
;
1667 dev
->vlan_rx_register
= rtl8169_vlan_rx_register
;
1670 #ifdef CONFIG_NET_POLL_CONTROLLER
1671 dev
->poll_controller
= rtl8169_netpoll
;
1674 tp
->intr_mask
= 0xffff;
1676 tp
->mmio_addr
= ioaddr
;
1677 tp
->align
= cfg
->align
;
1678 tp
->hw_start
= cfg
->hw_start
;
1679 tp
->intr_event
= cfg
->intr_event
;
1680 tp
->napi_event
= cfg
->napi_event
;
1682 init_timer(&tp
->timer
);
1683 tp
->timer
.data
= (unsigned long) dev
;
1684 tp
->timer
.function
= rtl8169_phy_timer
;
1686 spin_lock_init(&tp
->lock
);
1688 rc
= register_netdev(dev
);
1690 goto err_out_unmap_5
;
1692 pci_set_drvdata(pdev
, dev
);
1694 if (netif_msg_probe(tp
)) {
1695 u32 xid
= RTL_R32(TxConfig
) & 0x7cf0f8ff;
1697 printk(KERN_INFO
"%s: %s at 0x%lx, "
1698 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1699 "XID %08x IRQ %d\n",
1701 rtl_chip_info
[tp
->chipset
].name
,
1703 dev
->dev_addr
[0], dev
->dev_addr
[1],
1704 dev
->dev_addr
[2], dev
->dev_addr
[3],
1705 dev
->dev_addr
[4], dev
->dev_addr
[5], xid
, dev
->irq
);
1708 rtl8169_init_phy(dev
, tp
);
1716 pci_release_regions(pdev
);
1718 pci_clear_mwi(pdev
);
1720 pci_disable_device(pdev
);
1726 static void __devexit
rtl8169_remove_one(struct pci_dev
*pdev
)
1728 struct net_device
*dev
= pci_get_drvdata(pdev
);
1729 struct rtl8169_private
*tp
= netdev_priv(dev
);
1731 flush_scheduled_work();
1733 unregister_netdev(dev
);
1734 rtl8169_release_board(pdev
, dev
, tp
->mmio_addr
);
1735 pci_set_drvdata(pdev
, NULL
);
1738 static void rtl8169_set_rxbufsize(struct rtl8169_private
*tp
,
1739 struct net_device
*dev
)
1741 unsigned int mtu
= dev
->mtu
;
1743 tp
->rx_buf_sz
= (mtu
> RX_BUF_SIZE
) ? mtu
+ ETH_HLEN
+ 8 : RX_BUF_SIZE
;
1746 static int rtl8169_open(struct net_device
*dev
)
1748 struct rtl8169_private
*tp
= netdev_priv(dev
);
1749 struct pci_dev
*pdev
= tp
->pci_dev
;
1750 int retval
= -ENOMEM
;
1753 rtl8169_set_rxbufsize(tp
, dev
);
1756 * Rx and Tx desscriptors needs 256 bytes alignment.
1757 * pci_alloc_consistent provides more.
1759 tp
->TxDescArray
= pci_alloc_consistent(pdev
, R8169_TX_RING_BYTES
,
1761 if (!tp
->TxDescArray
)
1764 tp
->RxDescArray
= pci_alloc_consistent(pdev
, R8169_RX_RING_BYTES
,
1766 if (!tp
->RxDescArray
)
1769 retval
= rtl8169_init_ring(dev
);
1773 INIT_DELAYED_WORK(&tp
->task
, NULL
);
1777 retval
= request_irq(dev
->irq
, rtl8169_interrupt
, IRQF_SHARED
,
1780 goto err_release_ring_2
;
1782 #ifdef CONFIG_R8169_NAPI
1783 napi_enable(&tp
->napi
);
1788 rtl8169_request_timer(dev
);
1790 rtl8169_check_link_status(dev
, tp
, tp
->mmio_addr
);
1795 rtl8169_rx_clear(tp
);
1797 pci_free_consistent(pdev
, R8169_RX_RING_BYTES
, tp
->RxDescArray
,
1800 pci_free_consistent(pdev
, R8169_TX_RING_BYTES
, tp
->TxDescArray
,
1805 static void rtl8169_hw_reset(void __iomem
*ioaddr
)
1807 /* Disable interrupts */
1808 rtl8169_irq_mask_and_ack(ioaddr
);
1810 /* Reset the chipset */
1811 RTL_W8(ChipCmd
, CmdReset
);
1817 static void rtl_set_rx_tx_config_registers(struct rtl8169_private
*tp
)
1819 void __iomem
*ioaddr
= tp
->mmio_addr
;
1820 u32 cfg
= rtl8169_rx_config
;
1822 cfg
|= (RTL_R32(RxConfig
) & rtl_chip_info
[tp
->chipset
].RxConfigMask
);
1823 RTL_W32(RxConfig
, cfg
);
1825 /* Set DMA burst size and Interframe Gap Time */
1826 RTL_W32(TxConfig
, (TX_DMA_BURST
<< TxDMAShift
) |
1827 (InterFrameGap
<< TxInterFrameGapShift
));
1830 static void rtl_hw_start(struct net_device
*dev
)
1832 struct rtl8169_private
*tp
= netdev_priv(dev
);
1833 void __iomem
*ioaddr
= tp
->mmio_addr
;
1836 /* Soft reset the chip. */
1837 RTL_W8(ChipCmd
, CmdReset
);
1839 /* Check that the chip has finished the reset. */
1840 for (i
= 0; i
< 100; i
++) {
1841 if ((RTL_R8(ChipCmd
) & CmdReset
) == 0)
1843 msleep_interruptible(1);
1848 netif_start_queue(dev
);
1852 static void rtl_set_rx_tx_desc_registers(struct rtl8169_private
*tp
,
1853 void __iomem
*ioaddr
)
1856 * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
1857 * register to be written before TxDescAddrLow to work.
1858 * Switching from MMIO to I/O access fixes the issue as well.
1860 RTL_W32(TxDescStartAddrHigh
, ((u64
) tp
->TxPhyAddr
) >> 32);
1861 RTL_W32(TxDescStartAddrLow
, ((u64
) tp
->TxPhyAddr
) & DMA_32BIT_MASK
);
1862 RTL_W32(RxDescAddrHigh
, ((u64
) tp
->RxPhyAddr
) >> 32);
1863 RTL_W32(RxDescAddrLow
, ((u64
) tp
->RxPhyAddr
) & DMA_32BIT_MASK
);
1866 static u16
rtl_rw_cpluscmd(void __iomem
*ioaddr
)
1870 cmd
= RTL_R16(CPlusCmd
);
1871 RTL_W16(CPlusCmd
, cmd
);
1875 static void rtl_set_rx_max_size(void __iomem
*ioaddr
)
1877 /* Low hurts. Let's disable the filtering. */
1878 RTL_W16(RxMaxSize
, 16383);
1881 static void rtl8169_set_magic_reg(void __iomem
*ioaddr
, unsigned mac_version
)
1888 { RTL_GIGA_MAC_VER_05
, PCI_Clock_33MHz
, 0x000fff00 }, // 8110SCd
1889 { RTL_GIGA_MAC_VER_05
, PCI_Clock_66MHz
, 0x000fffff },
1890 { RTL_GIGA_MAC_VER_06
, PCI_Clock_33MHz
, 0x00ffff00 }, // 8110SCe
1891 { RTL_GIGA_MAC_VER_06
, PCI_Clock_66MHz
, 0x00ffffff }
1896 clk
= RTL_R8(Config2
) & PCI_Clock_66MHz
;
1897 for (i
= 0; i
< ARRAY_SIZE(cfg2_info
); i
++) {
1898 if ((p
->mac_version
== mac_version
) && (p
->clk
== clk
)) {
1899 RTL_W32(0x7c, p
->val
);
1905 static void rtl_hw_start_8169(struct net_device
*dev
)
1907 struct rtl8169_private
*tp
= netdev_priv(dev
);
1908 void __iomem
*ioaddr
= tp
->mmio_addr
;
1909 struct pci_dev
*pdev
= tp
->pci_dev
;
1911 if (tp
->mac_version
== RTL_GIGA_MAC_VER_05
) {
1912 RTL_W16(CPlusCmd
, RTL_R16(CPlusCmd
) | PCIMulRW
);
1913 pci_write_config_byte(pdev
, PCI_CACHE_LINE_SIZE
, 0x08);
1916 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1917 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_01
) ||
1918 (tp
->mac_version
== RTL_GIGA_MAC_VER_02
) ||
1919 (tp
->mac_version
== RTL_GIGA_MAC_VER_03
) ||
1920 (tp
->mac_version
== RTL_GIGA_MAC_VER_04
))
1921 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
1923 RTL_W8(EarlyTxThres
, EarlyTxThld
);
1925 rtl_set_rx_max_size(ioaddr
);
1927 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_01
) ||
1928 (tp
->mac_version
== RTL_GIGA_MAC_VER_02
) ||
1929 (tp
->mac_version
== RTL_GIGA_MAC_VER_03
) ||
1930 (tp
->mac_version
== RTL_GIGA_MAC_VER_04
))
1931 rtl_set_rx_tx_config_registers(tp
);
1933 tp
->cp_cmd
|= rtl_rw_cpluscmd(ioaddr
) | PCIMulRW
;
1935 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_02
) ||
1936 (tp
->mac_version
== RTL_GIGA_MAC_VER_03
)) {
1937 dprintk("Set MAC Reg C+CR Offset 0xE0. "
1938 "Bit-3 and bit-14 MUST be 1\n");
1939 tp
->cp_cmd
|= (1 << 14);
1942 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
1944 rtl8169_set_magic_reg(ioaddr
, tp
->mac_version
);
1947 * Undocumented corner. Supposedly:
1948 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1950 RTL_W16(IntrMitigate
, 0x0000);
1952 rtl_set_rx_tx_desc_registers(tp
, ioaddr
);
1954 if ((tp
->mac_version
!= RTL_GIGA_MAC_VER_01
) &&
1955 (tp
->mac_version
!= RTL_GIGA_MAC_VER_02
) &&
1956 (tp
->mac_version
!= RTL_GIGA_MAC_VER_03
) &&
1957 (tp
->mac_version
!= RTL_GIGA_MAC_VER_04
)) {
1958 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
1959 rtl_set_rx_tx_config_registers(tp
);
1962 RTL_W8(Cfg9346
, Cfg9346_Lock
);
1964 /* Initially a 10 us delay. Turned it into a PCI commit. - FR */
1967 RTL_W32(RxMissed
, 0);
1969 rtl_set_rx_mode(dev
);
1971 /* no early-rx interrupts */
1972 RTL_W16(MultiIntr
, RTL_R16(MultiIntr
) & 0xF000);
1974 /* Enable all known interrupts by setting the interrupt mask. */
1975 RTL_W16(IntrMask
, tp
->intr_event
);
1978 static void rtl_hw_start_8168(struct net_device
*dev
)
1980 struct rtl8169_private
*tp
= netdev_priv(dev
);
1981 void __iomem
*ioaddr
= tp
->mmio_addr
;
1982 struct pci_dev
*pdev
= tp
->pci_dev
;
1985 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1987 RTL_W8(EarlyTxThres
, EarlyTxThld
);
1989 rtl_set_rx_max_size(ioaddr
);
1991 rtl_set_rx_tx_config_registers(tp
);
1993 tp
->cp_cmd
|= RTL_R16(CPlusCmd
) | PktCntrDisable
| INTT_1
;
1995 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
1997 /* Tx performance tweak. */
1998 pci_read_config_byte(pdev
, 0x69, &ctl
);
1999 ctl
= (ctl
& ~0x70) | 0x50;
2000 pci_write_config_byte(pdev
, 0x69, ctl
);
2002 RTL_W16(IntrMitigate
, 0x5151);
2004 /* Work around for RxFIFO overflow. */
2005 if (tp
->mac_version
== RTL_GIGA_MAC_VER_11
) {
2006 tp
->intr_event
|= RxFIFOOver
| PCSTimeout
;
2007 tp
->intr_event
&= ~RxOverflow
;
2010 rtl_set_rx_tx_desc_registers(tp
, ioaddr
);
2012 RTL_W8(Cfg9346
, Cfg9346_Lock
);
2016 RTL_W32(RxMissed
, 0);
2018 rtl_set_rx_mode(dev
);
2020 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
2022 RTL_W16(MultiIntr
, RTL_R16(MultiIntr
) & 0xF000);
2024 RTL_W16(IntrMask
, tp
->intr_event
);
2027 static void rtl_hw_start_8101(struct net_device
*dev
)
2029 struct rtl8169_private
*tp
= netdev_priv(dev
);
2030 void __iomem
*ioaddr
= tp
->mmio_addr
;
2031 struct pci_dev
*pdev
= tp
->pci_dev
;
2033 if (tp
->mac_version
== RTL_GIGA_MAC_VER_13
) {
2034 pci_write_config_word(pdev
, 0x68, 0x00);
2035 pci_write_config_word(pdev
, 0x69, 0x08);
2038 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
2040 RTL_W8(EarlyTxThres
, EarlyTxThld
);
2042 rtl_set_rx_max_size(ioaddr
);
2044 tp
->cp_cmd
|= rtl_rw_cpluscmd(ioaddr
) | PCIMulRW
;
2046 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
2048 RTL_W16(IntrMitigate
, 0x0000);
2050 rtl_set_rx_tx_desc_registers(tp
, ioaddr
);
2052 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
2053 rtl_set_rx_tx_config_registers(tp
);
2055 RTL_W8(Cfg9346
, Cfg9346_Lock
);
2059 RTL_W32(RxMissed
, 0);
2061 rtl_set_rx_mode(dev
);
2063 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
2065 RTL_W16(MultiIntr
, RTL_R16(MultiIntr
) & 0xf000);
2067 RTL_W16(IntrMask
, tp
->intr_event
);
2070 static int rtl8169_change_mtu(struct net_device
*dev
, int new_mtu
)
2072 struct rtl8169_private
*tp
= netdev_priv(dev
);
2075 if (new_mtu
< ETH_ZLEN
|| new_mtu
> SafeMtu
)
2080 if (!netif_running(dev
))
2085 rtl8169_set_rxbufsize(tp
, dev
);
2087 ret
= rtl8169_init_ring(dev
);
2091 #ifdef CONFIG_R8169_NAPI
2092 napi_enable(&tp
->napi
);
2097 rtl8169_request_timer(dev
);
2103 static inline void rtl8169_make_unusable_by_asic(struct RxDesc
*desc
)
2105 desc
->addr
= 0x0badbadbadbadbadull
;
2106 desc
->opts1
&= ~cpu_to_le32(DescOwn
| RsvdMask
);
2109 static void rtl8169_free_rx_skb(struct rtl8169_private
*tp
,
2110 struct sk_buff
**sk_buff
, struct RxDesc
*desc
)
2112 struct pci_dev
*pdev
= tp
->pci_dev
;
2114 pci_unmap_single(pdev
, le64_to_cpu(desc
->addr
), tp
->rx_buf_sz
,
2115 PCI_DMA_FROMDEVICE
);
2116 dev_kfree_skb(*sk_buff
);
2118 rtl8169_make_unusable_by_asic(desc
);
2121 static inline void rtl8169_mark_to_asic(struct RxDesc
*desc
, u32 rx_buf_sz
)
2123 u32 eor
= le32_to_cpu(desc
->opts1
) & RingEnd
;
2125 desc
->opts1
= cpu_to_le32(DescOwn
| eor
| rx_buf_sz
);
2128 static inline void rtl8169_map_to_asic(struct RxDesc
*desc
, dma_addr_t mapping
,
2131 desc
->addr
= cpu_to_le64(mapping
);
2133 rtl8169_mark_to_asic(desc
, rx_buf_sz
);
2136 static struct sk_buff
*rtl8169_alloc_rx_skb(struct pci_dev
*pdev
,
2137 struct net_device
*dev
,
2138 struct RxDesc
*desc
, int rx_buf_sz
,
2141 struct sk_buff
*skb
;
2145 pad
= align
? align
: NET_IP_ALIGN
;
2147 skb
= netdev_alloc_skb(dev
, rx_buf_sz
+ pad
);
2151 skb_reserve(skb
, align
? ((pad
- 1) & (unsigned long)skb
->data
) : pad
);
2153 mapping
= pci_map_single(pdev
, skb
->data
, rx_buf_sz
,
2154 PCI_DMA_FROMDEVICE
);
2156 rtl8169_map_to_asic(desc
, mapping
, rx_buf_sz
);
2161 rtl8169_make_unusable_by_asic(desc
);
2165 static void rtl8169_rx_clear(struct rtl8169_private
*tp
)
2169 for (i
= 0; i
< NUM_RX_DESC
; i
++) {
2170 if (tp
->Rx_skbuff
[i
]) {
2171 rtl8169_free_rx_skb(tp
, tp
->Rx_skbuff
+ i
,
2172 tp
->RxDescArray
+ i
);
2177 static u32
rtl8169_rx_fill(struct rtl8169_private
*tp
, struct net_device
*dev
,
2182 for (cur
= start
; end
- cur
!= 0; cur
++) {
2183 struct sk_buff
*skb
;
2184 unsigned int i
= cur
% NUM_RX_DESC
;
2186 WARN_ON((s32
)(end
- cur
) < 0);
2188 if (tp
->Rx_skbuff
[i
])
2191 skb
= rtl8169_alloc_rx_skb(tp
->pci_dev
, dev
,
2192 tp
->RxDescArray
+ i
,
2193 tp
->rx_buf_sz
, tp
->align
);
2197 tp
->Rx_skbuff
[i
] = skb
;
2202 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc
*desc
)
2204 desc
->opts1
|= cpu_to_le32(RingEnd
);
2207 static void rtl8169_init_ring_indexes(struct rtl8169_private
*tp
)
2209 tp
->dirty_tx
= tp
->dirty_rx
= tp
->cur_tx
= tp
->cur_rx
= 0;
2212 static int rtl8169_init_ring(struct net_device
*dev
)
2214 struct rtl8169_private
*tp
= netdev_priv(dev
);
2216 rtl8169_init_ring_indexes(tp
);
2218 memset(tp
->tx_skb
, 0x0, NUM_TX_DESC
* sizeof(struct ring_info
));
2219 memset(tp
->Rx_skbuff
, 0x0, NUM_RX_DESC
* sizeof(struct sk_buff
*));
2221 if (rtl8169_rx_fill(tp
, dev
, 0, NUM_RX_DESC
) != NUM_RX_DESC
)
2224 rtl8169_mark_as_last_descriptor(tp
->RxDescArray
+ NUM_RX_DESC
- 1);
2229 rtl8169_rx_clear(tp
);
2233 static void rtl8169_unmap_tx_skb(struct pci_dev
*pdev
, struct ring_info
*tx_skb
,
2234 struct TxDesc
*desc
)
2236 unsigned int len
= tx_skb
->len
;
2238 pci_unmap_single(pdev
, le64_to_cpu(desc
->addr
), len
, PCI_DMA_TODEVICE
);
2245 static void rtl8169_tx_clear(struct rtl8169_private
*tp
)
2249 for (i
= tp
->dirty_tx
; i
< tp
->dirty_tx
+ NUM_TX_DESC
; i
++) {
2250 unsigned int entry
= i
% NUM_TX_DESC
;
2251 struct ring_info
*tx_skb
= tp
->tx_skb
+ entry
;
2252 unsigned int len
= tx_skb
->len
;
2255 struct sk_buff
*skb
= tx_skb
->skb
;
2257 rtl8169_unmap_tx_skb(tp
->pci_dev
, tx_skb
,
2258 tp
->TxDescArray
+ entry
);
2263 tp
->stats
.tx_dropped
++;
2266 tp
->cur_tx
= tp
->dirty_tx
= 0;
2269 static void rtl8169_schedule_work(struct net_device
*dev
, work_func_t task
)
2271 struct rtl8169_private
*tp
= netdev_priv(dev
);
2273 PREPARE_DELAYED_WORK(&tp
->task
, task
);
2274 schedule_delayed_work(&tp
->task
, 4);
2277 static void rtl8169_wait_for_quiescence(struct net_device
*dev
)
2279 struct rtl8169_private
*tp
= netdev_priv(dev
);
2280 void __iomem
*ioaddr
= tp
->mmio_addr
;
2282 synchronize_irq(dev
->irq
);
2284 /* Wait for any pending NAPI task to complete */
2285 #ifdef CONFIG_R8169_NAPI
2286 napi_disable(&tp
->napi
);
2289 rtl8169_irq_mask_and_ack(ioaddr
);
2291 #ifdef CONFIG_R8169_NAPI
2292 napi_enable(&tp
->napi
);
2296 static void rtl8169_reinit_task(struct work_struct
*work
)
2298 struct rtl8169_private
*tp
=
2299 container_of(work
, struct rtl8169_private
, task
.work
);
2300 struct net_device
*dev
= tp
->dev
;
2305 if (!netif_running(dev
))
2308 rtl8169_wait_for_quiescence(dev
);
2311 ret
= rtl8169_open(dev
);
2312 if (unlikely(ret
< 0)) {
2313 if (net_ratelimit() && netif_msg_drv(tp
)) {
2314 printk(KERN_ERR PFX
"%s: reinit failure (status = %d)."
2315 " Rescheduling.\n", dev
->name
, ret
);
2317 rtl8169_schedule_work(dev
, rtl8169_reinit_task
);
2324 static void rtl8169_reset_task(struct work_struct
*work
)
2326 struct rtl8169_private
*tp
=
2327 container_of(work
, struct rtl8169_private
, task
.work
);
2328 struct net_device
*dev
= tp
->dev
;
2332 if (!netif_running(dev
))
2335 rtl8169_wait_for_quiescence(dev
);
2337 rtl8169_rx_interrupt(dev
, tp
, tp
->mmio_addr
, ~(u32
)0);
2338 rtl8169_tx_clear(tp
);
2340 if (tp
->dirty_rx
== tp
->cur_rx
) {
2341 rtl8169_init_ring_indexes(tp
);
2343 netif_wake_queue(dev
);
2345 if (net_ratelimit() && netif_msg_intr(tp
)) {
2346 printk(KERN_EMERG PFX
"%s: Rx buffers shortage\n",
2349 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2356 static void rtl8169_tx_timeout(struct net_device
*dev
)
2358 struct rtl8169_private
*tp
= netdev_priv(dev
);
2360 rtl8169_hw_reset(tp
->mmio_addr
);
2362 /* Let's wait a bit while any (async) irq lands on */
2363 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2366 static int rtl8169_xmit_frags(struct rtl8169_private
*tp
, struct sk_buff
*skb
,
2369 struct skb_shared_info
*info
= skb_shinfo(skb
);
2370 unsigned int cur_frag
, entry
;
2371 struct TxDesc
* uninitialized_var(txd
);
2374 for (cur_frag
= 0; cur_frag
< info
->nr_frags
; cur_frag
++) {
2375 skb_frag_t
*frag
= info
->frags
+ cur_frag
;
2380 entry
= (entry
+ 1) % NUM_TX_DESC
;
2382 txd
= tp
->TxDescArray
+ entry
;
2384 addr
= ((void *) page_address(frag
->page
)) + frag
->page_offset
;
2385 mapping
= pci_map_single(tp
->pci_dev
, addr
, len
, PCI_DMA_TODEVICE
);
2387 /* anti gcc 2.95.3 bugware (sic) */
2388 status
= opts1
| len
| (RingEnd
* !((entry
+ 1) % NUM_TX_DESC
));
2390 txd
->opts1
= cpu_to_le32(status
);
2391 txd
->addr
= cpu_to_le64(mapping
);
2393 tp
->tx_skb
[entry
].len
= len
;
2397 tp
->tx_skb
[entry
].skb
= skb
;
2398 txd
->opts1
|= cpu_to_le32(LastFrag
);
2404 static inline u32
rtl8169_tso_csum(struct sk_buff
*skb
, struct net_device
*dev
)
2406 if (dev
->features
& NETIF_F_TSO
) {
2407 u32 mss
= skb_shinfo(skb
)->gso_size
;
2410 return LargeSend
| ((mss
& MSSMask
) << MSSShift
);
2412 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
2413 const struct iphdr
*ip
= ip_hdr(skb
);
2415 if (ip
->protocol
== IPPROTO_TCP
)
2416 return IPCS
| TCPCS
;
2417 else if (ip
->protocol
== IPPROTO_UDP
)
2418 return IPCS
| UDPCS
;
2419 WARN_ON(1); /* we need a WARN() */
2424 static int rtl8169_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
2426 struct rtl8169_private
*tp
= netdev_priv(dev
);
2427 unsigned int frags
, entry
= tp
->cur_tx
% NUM_TX_DESC
;
2428 struct TxDesc
*txd
= tp
->TxDescArray
+ entry
;
2429 void __iomem
*ioaddr
= tp
->mmio_addr
;
2433 int ret
= NETDEV_TX_OK
;
2435 if (unlikely(TX_BUFFS_AVAIL(tp
) < skb_shinfo(skb
)->nr_frags
)) {
2436 if (netif_msg_drv(tp
)) {
2438 "%s: BUG! Tx Ring full when queue awake!\n",
2444 if (unlikely(le32_to_cpu(txd
->opts1
) & DescOwn
))
2447 opts1
= DescOwn
| rtl8169_tso_csum(skb
, dev
);
2449 frags
= rtl8169_xmit_frags(tp
, skb
, opts1
);
2451 len
= skb_headlen(skb
);
2456 if (unlikely(len
< ETH_ZLEN
)) {
2457 if (skb_padto(skb
, ETH_ZLEN
))
2458 goto err_update_stats
;
2462 opts1
|= FirstFrag
| LastFrag
;
2463 tp
->tx_skb
[entry
].skb
= skb
;
2466 mapping
= pci_map_single(tp
->pci_dev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
2468 tp
->tx_skb
[entry
].len
= len
;
2469 txd
->addr
= cpu_to_le64(mapping
);
2470 txd
->opts2
= cpu_to_le32(rtl8169_tx_vlan_tag(tp
, skb
));
2474 /* anti gcc 2.95.3 bugware (sic) */
2475 status
= opts1
| len
| (RingEnd
* !((entry
+ 1) % NUM_TX_DESC
));
2476 txd
->opts1
= cpu_to_le32(status
);
2478 dev
->trans_start
= jiffies
;
2480 tp
->cur_tx
+= frags
+ 1;
2484 RTL_W8(TxPoll
, NPQ
); /* set polling bit */
2486 if (TX_BUFFS_AVAIL(tp
) < MAX_SKB_FRAGS
) {
2487 netif_stop_queue(dev
);
2489 if (TX_BUFFS_AVAIL(tp
) >= MAX_SKB_FRAGS
)
2490 netif_wake_queue(dev
);
2497 netif_stop_queue(dev
);
2498 ret
= NETDEV_TX_BUSY
;
2500 tp
->stats
.tx_dropped
++;
2504 static void rtl8169_pcierr_interrupt(struct net_device
*dev
)
2506 struct rtl8169_private
*tp
= netdev_priv(dev
);
2507 struct pci_dev
*pdev
= tp
->pci_dev
;
2508 void __iomem
*ioaddr
= tp
->mmio_addr
;
2509 u16 pci_status
, pci_cmd
;
2511 pci_read_config_word(pdev
, PCI_COMMAND
, &pci_cmd
);
2512 pci_read_config_word(pdev
, PCI_STATUS
, &pci_status
);
2514 if (netif_msg_intr(tp
)) {
2516 "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2517 dev
->name
, pci_cmd
, pci_status
);
2521 * The recovery sequence below admits a very elaborated explanation:
2522 * - it seems to work;
2523 * - I did not see what else could be done;
2524 * - it makes iop3xx happy.
2526 * Feel free to adjust to your needs.
2528 if (pdev
->broken_parity_status
)
2529 pci_cmd
&= ~PCI_COMMAND_PARITY
;
2531 pci_cmd
|= PCI_COMMAND_SERR
| PCI_COMMAND_PARITY
;
2533 pci_write_config_word(pdev
, PCI_COMMAND
, pci_cmd
);
2535 pci_write_config_word(pdev
, PCI_STATUS
,
2536 pci_status
& (PCI_STATUS_DETECTED_PARITY
|
2537 PCI_STATUS_SIG_SYSTEM_ERROR
| PCI_STATUS_REC_MASTER_ABORT
|
2538 PCI_STATUS_REC_TARGET_ABORT
| PCI_STATUS_SIG_TARGET_ABORT
));
2540 /* The infamous DAC f*ckup only happens at boot time */
2541 if ((tp
->cp_cmd
& PCIDAC
) && !tp
->dirty_rx
&& !tp
->cur_rx
) {
2542 if (netif_msg_intr(tp
))
2543 printk(KERN_INFO
"%s: disabling PCI DAC.\n", dev
->name
);
2544 tp
->cp_cmd
&= ~PCIDAC
;
2545 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
2546 dev
->features
&= ~NETIF_F_HIGHDMA
;
2549 rtl8169_hw_reset(ioaddr
);
2551 rtl8169_schedule_work(dev
, rtl8169_reinit_task
);
2554 static void rtl8169_tx_interrupt(struct net_device
*dev
,
2555 struct rtl8169_private
*tp
,
2556 void __iomem
*ioaddr
)
2558 unsigned int dirty_tx
, tx_left
;
2560 dirty_tx
= tp
->dirty_tx
;
2562 tx_left
= tp
->cur_tx
- dirty_tx
;
2564 while (tx_left
> 0) {
2565 unsigned int entry
= dirty_tx
% NUM_TX_DESC
;
2566 struct ring_info
*tx_skb
= tp
->tx_skb
+ entry
;
2567 u32 len
= tx_skb
->len
;
2571 status
= le32_to_cpu(tp
->TxDescArray
[entry
].opts1
);
2572 if (status
& DescOwn
)
2575 tp
->stats
.tx_bytes
+= len
;
2576 tp
->stats
.tx_packets
++;
2578 rtl8169_unmap_tx_skb(tp
->pci_dev
, tx_skb
, tp
->TxDescArray
+ entry
);
2580 if (status
& LastFrag
) {
2581 dev_kfree_skb_irq(tx_skb
->skb
);
2588 if (tp
->dirty_tx
!= dirty_tx
) {
2589 tp
->dirty_tx
= dirty_tx
;
2591 if (netif_queue_stopped(dev
) &&
2592 (TX_BUFFS_AVAIL(tp
) >= MAX_SKB_FRAGS
)) {
2593 netif_wake_queue(dev
);
2596 * 8168 hack: TxPoll requests are lost when the Tx packets are
2597 * too close. Let's kick an extra TxPoll request when a burst
2598 * of start_xmit activity is detected (if it is not detected,
2599 * it is slow enough). -- FR
2602 if (tp
->cur_tx
!= dirty_tx
)
2603 RTL_W8(TxPoll
, NPQ
);
2607 static inline int rtl8169_fragmented_frame(u32 status
)
2609 return (status
& (FirstFrag
| LastFrag
)) != (FirstFrag
| LastFrag
);
2612 static inline void rtl8169_rx_csum(struct sk_buff
*skb
, struct RxDesc
*desc
)
2614 u32 opts1
= le32_to_cpu(desc
->opts1
);
2615 u32 status
= opts1
& RxProtoMask
;
2617 if (((status
== RxProtoTCP
) && !(opts1
& TCPFail
)) ||
2618 ((status
== RxProtoUDP
) && !(opts1
& UDPFail
)) ||
2619 ((status
== RxProtoIP
) && !(opts1
& IPFail
)))
2620 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
2622 skb
->ip_summed
= CHECKSUM_NONE
;
2625 static inline bool rtl8169_try_rx_copy(struct sk_buff
**sk_buff
,
2626 struct rtl8169_private
*tp
, int pkt_size
,
2629 struct sk_buff
*skb
;
2632 if (pkt_size
>= rx_copybreak
)
2635 skb
= netdev_alloc_skb(tp
->dev
, pkt_size
+ NET_IP_ALIGN
);
2639 pci_dma_sync_single_for_cpu(tp
->pci_dev
, addr
, pkt_size
,
2640 PCI_DMA_FROMDEVICE
);
2641 skb_reserve(skb
, NET_IP_ALIGN
);
2642 skb_copy_from_linear_data(*sk_buff
, skb
->data
, pkt_size
);
2649 static int rtl8169_rx_interrupt(struct net_device
*dev
,
2650 struct rtl8169_private
*tp
,
2651 void __iomem
*ioaddr
, u32 budget
)
2653 unsigned int cur_rx
, rx_left
;
2654 unsigned int delta
, count
;
2656 cur_rx
= tp
->cur_rx
;
2657 rx_left
= NUM_RX_DESC
+ tp
->dirty_rx
- cur_rx
;
2658 rx_left
= rtl8169_rx_quota(rx_left
, budget
);
2660 for (; rx_left
> 0; rx_left
--, cur_rx
++) {
2661 unsigned int entry
= cur_rx
% NUM_RX_DESC
;
2662 struct RxDesc
*desc
= tp
->RxDescArray
+ entry
;
2666 status
= le32_to_cpu(desc
->opts1
);
2668 if (status
& DescOwn
)
2670 if (unlikely(status
& RxRES
)) {
2671 if (netif_msg_rx_err(tp
)) {
2673 "%s: Rx ERROR. status = %08x\n",
2676 tp
->stats
.rx_errors
++;
2677 if (status
& (RxRWT
| RxRUNT
))
2678 tp
->stats
.rx_length_errors
++;
2680 tp
->stats
.rx_crc_errors
++;
2681 if (status
& RxFOVF
) {
2682 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2683 tp
->stats
.rx_fifo_errors
++;
2685 rtl8169_mark_to_asic(desc
, tp
->rx_buf_sz
);
2687 struct sk_buff
*skb
= tp
->Rx_skbuff
[entry
];
2688 dma_addr_t addr
= le64_to_cpu(desc
->addr
);
2689 int pkt_size
= (status
& 0x00001FFF) - 4;
2690 struct pci_dev
*pdev
= tp
->pci_dev
;
2693 * The driver does not support incoming fragmented
2694 * frames. They are seen as a symptom of over-mtu
2697 if (unlikely(rtl8169_fragmented_frame(status
))) {
2698 tp
->stats
.rx_dropped
++;
2699 tp
->stats
.rx_length_errors
++;
2700 rtl8169_mark_to_asic(desc
, tp
->rx_buf_sz
);
2704 rtl8169_rx_csum(skb
, desc
);
2706 if (rtl8169_try_rx_copy(&skb
, tp
, pkt_size
, addr
)) {
2707 pci_dma_sync_single_for_device(pdev
, addr
,
2708 pkt_size
, PCI_DMA_FROMDEVICE
);
2709 rtl8169_mark_to_asic(desc
, tp
->rx_buf_sz
);
2711 pci_unmap_single(pdev
, addr
, pkt_size
,
2712 PCI_DMA_FROMDEVICE
);
2713 tp
->Rx_skbuff
[entry
] = NULL
;
2716 skb_put(skb
, pkt_size
);
2717 skb
->protocol
= eth_type_trans(skb
, dev
);
2719 if (rtl8169_rx_vlan_skb(tp
, desc
, skb
) < 0)
2720 rtl8169_rx_skb(skb
);
2722 dev
->last_rx
= jiffies
;
2723 tp
->stats
.rx_bytes
+= pkt_size
;
2724 tp
->stats
.rx_packets
++;
2727 /* Work around for AMD plateform. */
2728 if ((desc
->opts2
& 0xfffe000) &&
2729 (tp
->mac_version
== RTL_GIGA_MAC_VER_05
)) {
2735 count
= cur_rx
- tp
->cur_rx
;
2736 tp
->cur_rx
= cur_rx
;
2738 delta
= rtl8169_rx_fill(tp
, dev
, tp
->dirty_rx
, tp
->cur_rx
);
2739 if (!delta
&& count
&& netif_msg_intr(tp
))
2740 printk(KERN_INFO
"%s: no Rx buffer allocated\n", dev
->name
);
2741 tp
->dirty_rx
+= delta
;
2744 * FIXME: until there is periodic timer to try and refill the ring,
2745 * a temporary shortage may definitely kill the Rx process.
2746 * - disable the asic to try and avoid an overflow and kick it again
2748 * - how do others driver handle this condition (Uh oh...).
2750 if ((tp
->dirty_rx
+ NUM_RX_DESC
== tp
->cur_rx
) && netif_msg_intr(tp
))
2751 printk(KERN_EMERG
"%s: Rx buffers exhausted\n", dev
->name
);
2756 static irqreturn_t
rtl8169_interrupt(int irq
, void *dev_instance
)
2758 struct net_device
*dev
= dev_instance
;
2759 struct rtl8169_private
*tp
= netdev_priv(dev
);
2760 int boguscnt
= max_interrupt_work
;
2761 void __iomem
*ioaddr
= tp
->mmio_addr
;
2766 status
= RTL_R16(IntrStatus
);
2768 /* hotplug/major error/no more work/shared irq */
2769 if ((status
== 0xFFFF) || !status
)
2774 if (unlikely(!netif_running(dev
))) {
2775 rtl8169_asic_down(ioaddr
);
2779 status
&= tp
->intr_mask
;
2781 (status
& RxFIFOOver
) ? (status
| RxOverflow
) : status
);
2783 if (!(status
& tp
->intr_event
))
2786 /* Work around for rx fifo overflow */
2787 if (unlikely(status
& RxFIFOOver
) &&
2788 (tp
->mac_version
== RTL_GIGA_MAC_VER_11
)) {
2789 netif_stop_queue(dev
);
2790 rtl8169_tx_timeout(dev
);
2794 if (unlikely(status
& SYSErr
)) {
2795 rtl8169_pcierr_interrupt(dev
);
2799 if (status
& LinkChg
)
2800 rtl8169_check_link_status(dev
, tp
, ioaddr
);
2802 #ifdef CONFIG_R8169_NAPI
2803 if (status
& tp
->napi_event
) {
2804 RTL_W16(IntrMask
, tp
->intr_event
& ~tp
->napi_event
);
2805 tp
->intr_mask
= ~tp
->napi_event
;
2807 if (likely(netif_rx_schedule_prep(dev
, &tp
->napi
)))
2808 __netif_rx_schedule(dev
, &tp
->napi
);
2809 else if (netif_msg_intr(tp
)) {
2810 printk(KERN_INFO
"%s: interrupt %04x in poll\n",
2817 if (status
& (RxOK
| RxOverflow
| RxFIFOOver
))
2818 rtl8169_rx_interrupt(dev
, tp
, ioaddr
, ~(u32
)0);
2821 if (status
& (TxOK
| TxErr
))
2822 rtl8169_tx_interrupt(dev
, tp
, ioaddr
);
2826 } while (boguscnt
> 0);
2828 if (boguscnt
<= 0) {
2829 if (netif_msg_intr(tp
) && net_ratelimit() ) {
2831 "%s: Too much work at interrupt!\n", dev
->name
);
2833 /* Clear all interrupt sources. */
2834 RTL_W16(IntrStatus
, 0xffff);
2837 return IRQ_RETVAL(handled
);
2840 #ifdef CONFIG_R8169_NAPI
2841 static int rtl8169_poll(struct napi_struct
*napi
, int budget
)
2843 struct rtl8169_private
*tp
= container_of(napi
, struct rtl8169_private
, napi
);
2844 struct net_device
*dev
= tp
->dev
;
2845 void __iomem
*ioaddr
= tp
->mmio_addr
;
2848 work_done
= rtl8169_rx_interrupt(dev
, tp
, ioaddr
, (u32
) budget
);
2849 rtl8169_tx_interrupt(dev
, tp
, ioaddr
);
2851 if (work_done
< budget
) {
2852 netif_rx_complete(dev
, napi
);
2853 tp
->intr_mask
= 0xffff;
2855 * 20040426: the barrier is not strictly required but the
2856 * behavior of the irq handler could be less predictable
2857 * without it. Btw, the lack of flush for the posted pci
2858 * write is safe - FR
2861 RTL_W16(IntrMask
, tp
->intr_event
);
2868 static void rtl8169_down(struct net_device
*dev
)
2870 struct rtl8169_private
*tp
= netdev_priv(dev
);
2871 void __iomem
*ioaddr
= tp
->mmio_addr
;
2872 unsigned int poll_locked
= 0;
2873 unsigned int intrmask
;
2875 rtl8169_delete_timer(dev
);
2877 netif_stop_queue(dev
);
2880 spin_lock_irq(&tp
->lock
);
2882 rtl8169_asic_down(ioaddr
);
2884 /* Update the error counts. */
2885 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
2886 RTL_W32(RxMissed
, 0);
2888 spin_unlock_irq(&tp
->lock
);
2890 synchronize_irq(dev
->irq
);
2893 napi_disable(&tp
->napi
);
2897 /* Give a racing hard_start_xmit a few cycles to complete. */
2898 synchronize_sched(); /* FIXME: should this be synchronize_irq()? */
2901 * And now for the 50k$ question: are IRQ disabled or not ?
2903 * Two paths lead here:
2905 * -> netif_running() is available to sync the current code and the
2906 * IRQ handler. See rtl8169_interrupt for details.
2907 * 2) dev->change_mtu
2908 * -> rtl8169_poll can not be issued again and re-enable the
2909 * interruptions. Let's simply issue the IRQ down sequence again.
2911 * No loop if hotpluged or major error (0xffff).
2913 intrmask
= RTL_R16(IntrMask
);
2914 if (intrmask
&& (intrmask
!= 0xffff))
2917 rtl8169_tx_clear(tp
);
2919 rtl8169_rx_clear(tp
);
2922 static int rtl8169_close(struct net_device
*dev
)
2924 struct rtl8169_private
*tp
= netdev_priv(dev
);
2925 struct pci_dev
*pdev
= tp
->pci_dev
;
2929 free_irq(dev
->irq
, dev
);
2931 pci_free_consistent(pdev
, R8169_RX_RING_BYTES
, tp
->RxDescArray
,
2933 pci_free_consistent(pdev
, R8169_TX_RING_BYTES
, tp
->TxDescArray
,
2935 tp
->TxDescArray
= NULL
;
2936 tp
->RxDescArray
= NULL
;
2941 static void rtl_set_rx_mode(struct net_device
*dev
)
2943 struct rtl8169_private
*tp
= netdev_priv(dev
);
2944 void __iomem
*ioaddr
= tp
->mmio_addr
;
2945 unsigned long flags
;
2946 u32 mc_filter
[2]; /* Multicast hash filter */
2950 if (dev
->flags
& IFF_PROMISC
) {
2951 /* Unconditionally log net taps. */
2952 if (netif_msg_link(tp
)) {
2953 printk(KERN_NOTICE
"%s: Promiscuous mode enabled.\n",
2957 AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
|
2959 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
2960 } else if ((dev
->mc_count
> multicast_filter_limit
)
2961 || (dev
->flags
& IFF_ALLMULTI
)) {
2962 /* Too many to filter perfectly -- accept all multicasts. */
2963 rx_mode
= AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
;
2964 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
2966 struct dev_mc_list
*mclist
;
2969 rx_mode
= AcceptBroadcast
| AcceptMyPhys
;
2970 mc_filter
[1] = mc_filter
[0] = 0;
2971 for (i
= 0, mclist
= dev
->mc_list
; mclist
&& i
< dev
->mc_count
;
2972 i
++, mclist
= mclist
->next
) {
2973 int bit_nr
= ether_crc(ETH_ALEN
, mclist
->dmi_addr
) >> 26;
2974 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
2975 rx_mode
|= AcceptMulticast
;
2979 spin_lock_irqsave(&tp
->lock
, flags
);
2981 tmp
= rtl8169_rx_config
| rx_mode
|
2982 (RTL_R32(RxConfig
) & rtl_chip_info
[tp
->chipset
].RxConfigMask
);
2984 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_11
) ||
2985 (tp
->mac_version
== RTL_GIGA_MAC_VER_12
) ||
2986 (tp
->mac_version
== RTL_GIGA_MAC_VER_13
) ||
2987 (tp
->mac_version
== RTL_GIGA_MAC_VER_14
) ||
2988 (tp
->mac_version
== RTL_GIGA_MAC_VER_15
)) {
2989 mc_filter
[0] = 0xffffffff;
2990 mc_filter
[1] = 0xffffffff;
2993 RTL_W32(MAR0
+ 0, mc_filter
[0]);
2994 RTL_W32(MAR0
+ 4, mc_filter
[1]);
2996 RTL_W32(RxConfig
, tmp
);
2998 spin_unlock_irqrestore(&tp
->lock
, flags
);
3002 * rtl8169_get_stats - Get rtl8169 read/write statistics
3003 * @dev: The Ethernet Device to get statistics for
3005 * Get TX/RX statistics for rtl8169
3007 static struct net_device_stats
*rtl8169_get_stats(struct net_device
*dev
)
3009 struct rtl8169_private
*tp
= netdev_priv(dev
);
3010 void __iomem
*ioaddr
= tp
->mmio_addr
;
3011 unsigned long flags
;
3013 if (netif_running(dev
)) {
3014 spin_lock_irqsave(&tp
->lock
, flags
);
3015 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
3016 RTL_W32(RxMissed
, 0);
3017 spin_unlock_irqrestore(&tp
->lock
, flags
);
3025 static int rtl8169_suspend(struct pci_dev
*pdev
, pm_message_t state
)
3027 struct net_device
*dev
= pci_get_drvdata(pdev
);
3028 struct rtl8169_private
*tp
= netdev_priv(dev
);
3029 void __iomem
*ioaddr
= tp
->mmio_addr
;
3031 if (!netif_running(dev
))
3032 goto out_pci_suspend
;
3034 netif_device_detach(dev
);
3035 netif_stop_queue(dev
);
3037 spin_lock_irq(&tp
->lock
);
3039 rtl8169_asic_down(ioaddr
);
3041 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
3042 RTL_W32(RxMissed
, 0);
3044 spin_unlock_irq(&tp
->lock
);
3047 pci_save_state(pdev
);
3048 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), tp
->wol_enabled
);
3049 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
3054 static int rtl8169_resume(struct pci_dev
*pdev
)
3056 struct net_device
*dev
= pci_get_drvdata(pdev
);
3058 pci_set_power_state(pdev
, PCI_D0
);
3059 pci_restore_state(pdev
);
3060 pci_enable_wake(pdev
, PCI_D0
, 0);
3062 if (!netif_running(dev
))
3065 netif_device_attach(dev
);
3067 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
3072 #endif /* CONFIG_PM */
3074 static struct pci_driver rtl8169_pci_driver
= {
3076 .id_table
= rtl8169_pci_tbl
,
3077 .probe
= rtl8169_init_one
,
3078 .remove
= __devexit_p(rtl8169_remove_one
),
3080 .suspend
= rtl8169_suspend
,
3081 .resume
= rtl8169_resume
,
3085 static int __init
rtl8169_init_module(void)
3087 return pci_register_driver(&rtl8169_pci_driver
);
3090 static void __exit
rtl8169_cleanup_module(void)
3092 pci_unregister_driver(&rtl8169_pci_driver
);
3095 module_init(rtl8169_init_module
);
3096 module_exit(rtl8169_cleanup_module
);