2 =========================================================================
3 r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4 --------------------------------------------------------------------
7 Feb 4 2002 - created initially by ShuChen <shuchen@realtek.com.tw>.
8 May 20 2002 - Add link status force-mode and TBI mode support.
9 2004 - Massive updates. See kernel SCM system for details.
10 =========================================================================
11 1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
12 Command: 'insmod r8169 media = SET_MEDIA'
13 Ex: 'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
23 =========================================================================
24 VERSION 1.1 <2002/10/4>
26 The bit4:0 of MII register 4 is called "selector field", and have to be
27 00001b to indicate support of IEEE std 802.3 during NWay process of
28 exchanging Link Code Word (FLP).
30 VERSION 1.2 <2002/11/30>
33 - Use ether_crc in stock kernel (linux/crc32.h)
34 - Copy mc_filter setup code from 8139cp
35 (includes an optimization, and avoids set_bit use)
37 VERSION 1.6LK <2004/04/14>
39 - Merge of Realtek's version 1.6
40 - Conversion to DMA API
45 VERSION 2.2LK <2005/01/25>
47 - RX csum, TX csum/SG, TSO
49 - baby (< 7200) Jumbo frames support
50 - Merge of Realtek's version 2.2 (new phy)
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/pci.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/delay.h>
59 #include <linux/ethtool.h>
60 #include <linux/mii.h>
61 #include <linux/if_vlan.h>
62 #include <linux/crc32.h>
65 #include <linux/tcp.h>
66 #include <linux/init.h>
67 #include <linux/dma-mapping.h>
72 #ifdef CONFIG_R8169_NAPI
73 #define NAPI_SUFFIX "-NAPI"
75 #define NAPI_SUFFIX ""
78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
79 #define MODULENAME "r8169"
80 #define PFX MODULENAME ": "
83 #define assert(expr) \
85 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
86 #expr,__FILE__,__FUNCTION__,__LINE__); \
88 #define dprintk(fmt, args...) do { printk(PFX fmt, ## args); } while (0)
90 #define assert(expr) do {} while (0)
91 #define dprintk(fmt, args...) do {} while (0)
92 #endif /* RTL8169_DEBUG */
94 #define R8169_MSG_DEFAULT \
95 (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | NETIF_MSG_IFUP | \
98 #define TX_BUFFS_AVAIL(tp) \
99 (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
101 #ifdef CONFIG_R8169_NAPI
102 #define rtl8169_rx_skb netif_receive_skb
103 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_rx
104 #define rtl8169_rx_quota(count, quota) min(count, quota)
106 #define rtl8169_rx_skb netif_rx
107 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_receive_skb
108 #define rtl8169_rx_quota(count, quota) count
113 static int media
[MAX_UNITS
] = { -1, -1, -1, -1, -1, -1, -1, -1 };
114 static int num_media
= 0;
116 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
117 static int max_interrupt_work
= 20;
119 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
120 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
121 static int multicast_filter_limit
= 32;
123 /* MAC address length */
124 #define MAC_ADDR_LEN 6
126 #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
127 #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
128 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
129 #define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
130 #define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
131 #define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */
132 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
134 #define R8169_REGS_SIZE 256
135 #define R8169_NAPI_WEIGHT 64
136 #define NUM_TX_DESC 64 /* Number of Tx descriptor registers */
137 #define NUM_RX_DESC 256 /* Number of Rx descriptor registers */
138 #define RX_BUF_SIZE 1536 /* Rx Buffer size */
139 #define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
140 #define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
142 #define RTL8169_TX_TIMEOUT (6*HZ)
143 #define RTL8169_PHY_TIMEOUT (10*HZ)
145 /* write/read MMIO register */
146 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
147 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
148 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
149 #define RTL_R8(reg) readb (ioaddr + (reg))
150 #define RTL_R16(reg) readw (ioaddr + (reg))
151 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
154 RTL_GIGA_MAC_VER_B
= 0x00,
155 /* RTL_GIGA_MAC_VER_C = 0x03, */
156 RTL_GIGA_MAC_VER_D
= 0x01,
157 RTL_GIGA_MAC_VER_E
= 0x02,
158 RTL_GIGA_MAC_VER_X
= 0x04 /* Greater than RTL_GIGA_MAC_VER_E */
162 RTL_GIGA_PHY_VER_C
= 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
163 RTL_GIGA_PHY_VER_D
= 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
164 RTL_GIGA_PHY_VER_E
= 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
165 RTL_GIGA_PHY_VER_F
= 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
166 RTL_GIGA_PHY_VER_G
= 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
167 RTL_GIGA_PHY_VER_H
= 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
171 #define _R(NAME,MAC,MASK) \
172 { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
174 const static struct {
177 u32 RxConfigMask
; /* Clears the bits supported by this chip */
178 } rtl_chip_info
[] = {
179 _R("RTL8169", RTL_GIGA_MAC_VER_B
, 0xff7e1880),
180 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_D
, 0xff7e1880),
181 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_E
, 0xff7e1880),
182 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_X
, 0xff7e1880),
186 static struct pci_device_id rtl8169_pci_tbl
[] = {
187 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8169), },
188 { PCI_DEVICE(PCI_VENDOR_ID_DLINK
, 0x4300), },
189 { PCI_DEVICE(0x16ec, 0x0116), },
193 MODULE_DEVICE_TABLE(pci
, rtl8169_pci_tbl
);
195 static int rx_copybreak
= 200;
201 enum RTL8169_registers
{
202 MAC0
= 0, /* Ethernet hardware address. */
203 MAR0
= 8, /* Multicast filter. */
204 TxDescStartAddrLow
= 0x20,
205 TxDescStartAddrHigh
= 0x24,
206 TxHDescStartAddrLow
= 0x28,
207 TxHDescStartAddrHigh
= 0x2c,
233 RxDescAddrLow
= 0xE4,
234 RxDescAddrHigh
= 0xE8,
237 FuncEventMask
= 0xF4,
238 FuncPresetState
= 0xF8,
239 FuncForceEvent
= 0xFC,
242 enum RTL8169_register_content
{
243 /* InterruptStatusBits */
247 TxDescUnavail
= 0x80,
270 Cfg9346_Unlock
= 0xC0,
275 AcceptBroadcast
= 0x08,
276 AcceptMulticast
= 0x04,
278 AcceptAllPhys
= 0x01,
285 TxInterFrameGapShift
= 24,
286 TxDMAShift
= 8, /* DMA burst value (0-7) is shift this many bits */
289 TBIReset
= 0x80000000,
290 TBILoopback
= 0x40000000,
291 TBINwEnable
= 0x20000000,
292 TBINwRestart
= 0x10000000,
293 TBILinkOk
= 0x02000000,
294 TBINwComplete
= 0x01000000,
302 /* rtl8169_PHYstatus */
312 /* GIGABIT_PHY_registers */
315 PHY_AUTO_NEGO_REG
= 4,
316 PHY_1000_CTRL_REG
= 9,
318 /* GIGABIT_PHY_REG_BIT */
319 PHY_Restart_Auto_Nego
= 0x0200,
320 PHY_Enable_Auto_Nego
= 0x1000,
322 /* PHY_STAT_REG = 1 */
323 PHY_Auto_Neco_Comp
= 0x0020,
325 /* PHY_AUTO_NEGO_REG = 4 */
326 PHY_Cap_10_Half
= 0x0020,
327 PHY_Cap_10_Full
= 0x0040,
328 PHY_Cap_100_Half
= 0x0080,
329 PHY_Cap_100_Full
= 0x0100,
331 /* PHY_1000_CTRL_REG = 9 */
332 PHY_Cap_1000_Full
= 0x0200,
344 TBILinkOK
= 0x02000000,
347 enum _DescStatusBit
{
348 DescOwn
= (1 << 31), /* Descriptor is owned by NIC */
349 RingEnd
= (1 << 30), /* End of descriptor ring */
350 FirstFrag
= (1 << 29), /* First segment of a packet */
351 LastFrag
= (1 << 28), /* Final segment of a packet */
354 LargeSend
= (1 << 27), /* TCP Large Send Offload (TSO) */
355 MSSShift
= 16, /* MSS value position */
356 MSSMask
= 0xfff, /* MSS value + LargeSend bit: 12 bits */
357 IPCS
= (1 << 18), /* Calculate IP checksum */
358 UDPCS
= (1 << 17), /* Calculate UDP/IP checksum */
359 TCPCS
= (1 << 16), /* Calculate TCP/IP checksum */
360 TxVlanTag
= (1 << 17), /* Add VLAN tag */
363 PID1
= (1 << 18), /* Protocol ID bit 1/2 */
364 PID0
= (1 << 17), /* Protocol ID bit 2/2 */
366 #define RxProtoUDP (PID1)
367 #define RxProtoTCP (PID0)
368 #define RxProtoIP (PID1 | PID0)
369 #define RxProtoMask RxProtoIP
371 IPFail
= (1 << 16), /* IP checksum failed */
372 UDPFail
= (1 << 15), /* UDP/IP checksum failed */
373 TCPFail
= (1 << 14), /* TCP/IP checksum failed */
374 RxVlanTag
= (1 << 16), /* VLAN tag available */
377 #define RsvdMask 0x3fffc000
394 u8 __pad
[sizeof(void *) - sizeof(u32
)];
397 struct rtl8169_private
{
398 void __iomem
*mmio_addr
; /* memory map physical address */
399 struct pci_dev
*pci_dev
; /* Index of PCI device */
400 struct net_device_stats stats
; /* statistics of net device */
401 spinlock_t lock
; /* spin lock flag */
406 u32 cur_rx
; /* Index into the Rx descriptor buffer of next Rx pkt. */
407 u32 cur_tx
; /* Index into the Tx descriptor buffer of next Rx pkt. */
410 struct TxDesc
*TxDescArray
; /* 256-aligned Tx descriptor ring */
411 struct RxDesc
*RxDescArray
; /* 256-aligned Rx descriptor ring */
412 dma_addr_t TxPhyAddr
;
413 dma_addr_t RxPhyAddr
;
414 struct sk_buff
*Rx_skbuff
[NUM_RX_DESC
]; /* Rx data buffers */
415 struct ring_info tx_skb
[NUM_TX_DESC
]; /* Tx data buffers */
417 struct timer_list timer
;
420 int phy_auto_nego_reg
;
421 int phy_1000_ctrl_reg
;
422 #ifdef CONFIG_R8169_VLAN
423 struct vlan_group
*vlgrp
;
425 int (*set_speed
)(struct net_device
*, u8 autoneg
, u16 speed
, u8 duplex
);
426 void (*get_settings
)(struct net_device
*, struct ethtool_cmd
*);
427 void (*phy_reset_enable
)(void __iomem
*);
428 unsigned int (*phy_reset_pending
)(void __iomem
*);
429 unsigned int (*link_ok
)(void __iomem
*);
430 struct work_struct task
;
433 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@oss.sgi.com>");
434 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
435 module_param_array(media
, int, &num_media
, 0);
436 MODULE_PARM_DESC(media
, "force phy operation. Deprecated by ethtool (8).");
437 module_param(rx_copybreak
, int, 0);
438 MODULE_PARM_DESC(rx_copybreak
, "Copy breakpoint for copy-only-tiny-frames");
439 module_param(use_dac
, int, 0);
440 MODULE_PARM_DESC(use_dac
, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
441 module_param_named(debug
, debug
.msg_enable
, int, 0);
442 MODULE_PARM_DESC(debug
, "Debug verbosity level (0=none, ..., 16=all)");
443 MODULE_LICENSE("GPL");
444 MODULE_VERSION(RTL8169_VERSION
);
446 static int rtl8169_open(struct net_device
*dev
);
447 static int rtl8169_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
);
448 static irqreturn_t
rtl8169_interrupt(int irq
, void *dev_instance
,
449 struct pt_regs
*regs
);
450 static int rtl8169_init_ring(struct net_device
*dev
);
451 static void rtl8169_hw_start(struct net_device
*dev
);
452 static int rtl8169_close(struct net_device
*dev
);
453 static void rtl8169_set_rx_mode(struct net_device
*dev
);
454 static void rtl8169_tx_timeout(struct net_device
*dev
);
455 static struct net_device_stats
*rtl8169_get_stats(struct net_device
*netdev
);
456 static int rtl8169_rx_interrupt(struct net_device
*, struct rtl8169_private
*,
458 static int rtl8169_change_mtu(struct net_device
*netdev
, int new_mtu
);
459 static void rtl8169_down(struct net_device
*dev
);
461 #ifdef CONFIG_R8169_NAPI
462 static int rtl8169_poll(struct net_device
*dev
, int *budget
);
465 static const u16 rtl8169_intr_mask
=
466 SYSErr
| LinkChg
| RxOverflow
| RxFIFOOver
| TxErr
| TxOK
| RxErr
| RxOK
;
467 static const u16 rtl8169_napi_event
=
468 RxOK
| RxOverflow
| RxFIFOOver
| TxOK
| TxErr
;
469 static const unsigned int rtl8169_rx_config
=
470 (RX_FIFO_THRESH
<< RxCfgFIFOShift
) | (RX_DMA_BURST
<< RxCfgDMAShift
);
472 #define PHY_Cap_10_Half_Or_Less PHY_Cap_10_Half
473 #define PHY_Cap_10_Full_Or_Less PHY_Cap_10_Full | PHY_Cap_10_Half_Or_Less
474 #define PHY_Cap_100_Half_Or_Less PHY_Cap_100_Half | PHY_Cap_10_Full_Or_Less
475 #define PHY_Cap_100_Full_Or_Less PHY_Cap_100_Full | PHY_Cap_100_Half_Or_Less
477 static void mdio_write(void __iomem
*ioaddr
, int RegAddr
, int value
)
481 RTL_W32(PHYAR
, 0x80000000 | (RegAddr
& 0xFF) << 16 | value
);
484 for (i
= 2000; i
> 0; i
--) {
485 /* Check if the RTL8169 has completed writing to the specified MII register */
486 if (!(RTL_R32(PHYAR
) & 0x80000000))
492 static int mdio_read(void __iomem
*ioaddr
, int RegAddr
)
496 RTL_W32(PHYAR
, 0x0 | (RegAddr
& 0xFF) << 16);
499 for (i
= 2000; i
> 0; i
--) {
500 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
501 if (RTL_R32(PHYAR
) & 0x80000000) {
502 value
= (int) (RTL_R32(PHYAR
) & 0xFFFF);
510 static void rtl8169_irq_mask_and_ack(void __iomem
*ioaddr
)
512 RTL_W16(IntrMask
, 0x0000);
514 RTL_W16(IntrStatus
, 0xffff);
517 static void rtl8169_asic_down(void __iomem
*ioaddr
)
519 RTL_W8(ChipCmd
, 0x00);
520 rtl8169_irq_mask_and_ack(ioaddr
);
524 static unsigned int rtl8169_tbi_reset_pending(void __iomem
*ioaddr
)
526 return RTL_R32(TBICSR
) & TBIReset
;
529 static unsigned int rtl8169_xmii_reset_pending(void __iomem
*ioaddr
)
531 return mdio_read(ioaddr
, 0) & 0x8000;
534 static unsigned int rtl8169_tbi_link_ok(void __iomem
*ioaddr
)
536 return RTL_R32(TBICSR
) & TBILinkOk
;
539 static unsigned int rtl8169_xmii_link_ok(void __iomem
*ioaddr
)
541 return RTL_R8(PHYstatus
) & LinkStatus
;
544 static void rtl8169_tbi_reset_enable(void __iomem
*ioaddr
)
546 RTL_W32(TBICSR
, RTL_R32(TBICSR
) | TBIReset
);
549 static void rtl8169_xmii_reset_enable(void __iomem
*ioaddr
)
553 val
= (mdio_read(ioaddr
, PHY_CTRL_REG
) | 0x8000) & 0xffff;
554 mdio_write(ioaddr
, PHY_CTRL_REG
, val
);
557 static void rtl8169_check_link_status(struct net_device
*dev
,
558 struct rtl8169_private
*tp
, void __iomem
*ioaddr
)
562 spin_lock_irqsave(&tp
->lock
, flags
);
563 if (tp
->link_ok(ioaddr
)) {
564 netif_carrier_on(dev
);
565 if (netif_msg_ifup(tp
))
566 printk(KERN_INFO PFX
"%s: link up\n", dev
->name
);
568 if (netif_msg_ifdown(tp
))
569 printk(KERN_INFO PFX
"%s: link down\n", dev
->name
);
570 netif_carrier_off(dev
);
572 spin_unlock_irqrestore(&tp
->lock
, flags
);
575 static void rtl8169_link_option(int idx
, u8
*autoneg
, u16
*speed
, u8
*duplex
)
582 } link_settings
[] = {
583 { SPEED_10
, DUPLEX_HALF
, AUTONEG_DISABLE
, _10_Half
},
584 { SPEED_10
, DUPLEX_FULL
, AUTONEG_DISABLE
, _10_Full
},
585 { SPEED_100
, DUPLEX_HALF
, AUTONEG_DISABLE
, _100_Half
},
586 { SPEED_100
, DUPLEX_FULL
, AUTONEG_DISABLE
, _100_Full
},
587 { SPEED_1000
, DUPLEX_FULL
, AUTONEG_DISABLE
, _1000_Full
},
589 { SPEED_1000
, DUPLEX_FULL
, AUTONEG_ENABLE
, 0xff }
591 unsigned char option
;
593 option
= ((idx
< MAX_UNITS
) && (idx
>= 0)) ? media
[idx
] : 0xff;
595 if ((option
!= 0xff) && !idx
&& netif_msg_drv(&debug
))
596 printk(KERN_WARNING PFX
"media option is deprecated.\n");
598 for (p
= link_settings
; p
->media
!= 0xff; p
++) {
599 if (p
->media
== option
)
602 *autoneg
= p
->autoneg
;
607 static void rtl8169_get_drvinfo(struct net_device
*dev
,
608 struct ethtool_drvinfo
*info
)
610 struct rtl8169_private
*tp
= netdev_priv(dev
);
612 strcpy(info
->driver
, MODULENAME
);
613 strcpy(info
->version
, RTL8169_VERSION
);
614 strcpy(info
->bus_info
, pci_name(tp
->pci_dev
));
617 static int rtl8169_get_regs_len(struct net_device
*dev
)
619 return R8169_REGS_SIZE
;
622 static int rtl8169_set_speed_tbi(struct net_device
*dev
,
623 u8 autoneg
, u16 speed
, u8 duplex
)
625 struct rtl8169_private
*tp
= netdev_priv(dev
);
626 void __iomem
*ioaddr
= tp
->mmio_addr
;
630 reg
= RTL_R32(TBICSR
);
631 if ((autoneg
== AUTONEG_DISABLE
) && (speed
== SPEED_1000
) &&
632 (duplex
== DUPLEX_FULL
)) {
633 RTL_W32(TBICSR
, reg
& ~(TBINwEnable
| TBINwRestart
));
634 } else if (autoneg
== AUTONEG_ENABLE
)
635 RTL_W32(TBICSR
, reg
| TBINwEnable
| TBINwRestart
);
637 if (netif_msg_link(tp
)) {
638 printk(KERN_WARNING
"%s: "
639 "incorrect speed setting refused in TBI mode\n",
648 static int rtl8169_set_speed_xmii(struct net_device
*dev
,
649 u8 autoneg
, u16 speed
, u8 duplex
)
651 struct rtl8169_private
*tp
= netdev_priv(dev
);
652 void __iomem
*ioaddr
= tp
->mmio_addr
;
653 int auto_nego
, giga_ctrl
;
655 auto_nego
= mdio_read(ioaddr
, PHY_AUTO_NEGO_REG
);
656 auto_nego
&= ~(PHY_Cap_10_Half
| PHY_Cap_10_Full
|
657 PHY_Cap_100_Half
| PHY_Cap_100_Full
);
658 giga_ctrl
= mdio_read(ioaddr
, PHY_1000_CTRL_REG
);
659 giga_ctrl
&= ~(PHY_Cap_1000_Full
| PHY_Cap_Null
);
661 if (autoneg
== AUTONEG_ENABLE
) {
662 auto_nego
|= (PHY_Cap_10_Half
| PHY_Cap_10_Full
|
663 PHY_Cap_100_Half
| PHY_Cap_100_Full
);
664 giga_ctrl
|= PHY_Cap_1000_Full
;
666 if (speed
== SPEED_10
)
667 auto_nego
|= PHY_Cap_10_Half
| PHY_Cap_10_Full
;
668 else if (speed
== SPEED_100
)
669 auto_nego
|= PHY_Cap_100_Half
| PHY_Cap_100_Full
;
670 else if (speed
== SPEED_1000
)
671 giga_ctrl
|= PHY_Cap_1000_Full
;
673 if (duplex
== DUPLEX_HALF
)
674 auto_nego
&= ~(PHY_Cap_10_Full
| PHY_Cap_100_Full
);
677 tp
->phy_auto_nego_reg
= auto_nego
;
678 tp
->phy_1000_ctrl_reg
= giga_ctrl
;
680 mdio_write(ioaddr
, PHY_AUTO_NEGO_REG
, auto_nego
);
681 mdio_write(ioaddr
, PHY_1000_CTRL_REG
, giga_ctrl
);
682 mdio_write(ioaddr
, PHY_CTRL_REG
, PHY_Enable_Auto_Nego
|
683 PHY_Restart_Auto_Nego
);
687 static int rtl8169_set_speed(struct net_device
*dev
,
688 u8 autoneg
, u16 speed
, u8 duplex
)
690 struct rtl8169_private
*tp
= netdev_priv(dev
);
693 ret
= tp
->set_speed(dev
, autoneg
, speed
, duplex
);
695 if (netif_running(dev
) && (tp
->phy_1000_ctrl_reg
& PHY_Cap_1000_Full
))
696 mod_timer(&tp
->timer
, jiffies
+ RTL8169_PHY_TIMEOUT
);
701 static int rtl8169_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
703 struct rtl8169_private
*tp
= netdev_priv(dev
);
707 spin_lock_irqsave(&tp
->lock
, flags
);
708 ret
= rtl8169_set_speed(dev
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
709 spin_unlock_irqrestore(&tp
->lock
, flags
);
714 static u32
rtl8169_get_rx_csum(struct net_device
*dev
)
716 struct rtl8169_private
*tp
= netdev_priv(dev
);
718 return tp
->cp_cmd
& RxChkSum
;
721 static int rtl8169_set_rx_csum(struct net_device
*dev
, u32 data
)
723 struct rtl8169_private
*tp
= netdev_priv(dev
);
724 void __iomem
*ioaddr
= tp
->mmio_addr
;
727 spin_lock_irqsave(&tp
->lock
, flags
);
730 tp
->cp_cmd
|= RxChkSum
;
732 tp
->cp_cmd
&= ~RxChkSum
;
734 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
737 spin_unlock_irqrestore(&tp
->lock
, flags
);
742 #ifdef CONFIG_R8169_VLAN
744 static inline u32
rtl8169_tx_vlan_tag(struct rtl8169_private
*tp
,
747 return (tp
->vlgrp
&& vlan_tx_tag_present(skb
)) ?
748 TxVlanTag
| swab16(vlan_tx_tag_get(skb
)) : 0x00;
751 static void rtl8169_vlan_rx_register(struct net_device
*dev
,
752 struct vlan_group
*grp
)
754 struct rtl8169_private
*tp
= netdev_priv(dev
);
755 void __iomem
*ioaddr
= tp
->mmio_addr
;
758 spin_lock_irqsave(&tp
->lock
, flags
);
761 tp
->cp_cmd
|= RxVlan
;
763 tp
->cp_cmd
&= ~RxVlan
;
764 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
766 spin_unlock_irqrestore(&tp
->lock
, flags
);
769 static void rtl8169_vlan_rx_kill_vid(struct net_device
*dev
, unsigned short vid
)
771 struct rtl8169_private
*tp
= netdev_priv(dev
);
774 spin_lock_irqsave(&tp
->lock
, flags
);
776 tp
->vlgrp
->vlan_devices
[vid
] = NULL
;
777 spin_unlock_irqrestore(&tp
->lock
, flags
);
780 static int rtl8169_rx_vlan_skb(struct rtl8169_private
*tp
, struct RxDesc
*desc
,
783 u32 opts2
= le32_to_cpu(desc
->opts2
);
786 if (tp
->vlgrp
&& (opts2
& RxVlanTag
)) {
787 rtl8169_rx_hwaccel_skb(skb
, tp
->vlgrp
,
788 swab16(opts2
& 0xffff));
796 #else /* !CONFIG_R8169_VLAN */
798 static inline u32
rtl8169_tx_vlan_tag(struct rtl8169_private
*tp
,
804 static int rtl8169_rx_vlan_skb(struct rtl8169_private
*tp
, struct RxDesc
*desc
,
812 static void rtl8169_gset_tbi(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
814 struct rtl8169_private
*tp
= netdev_priv(dev
);
815 void __iomem
*ioaddr
= tp
->mmio_addr
;
819 SUPPORTED_1000baseT_Full
| SUPPORTED_Autoneg
| SUPPORTED_FIBRE
;
820 cmd
->port
= PORT_FIBRE
;
821 cmd
->transceiver
= XCVR_INTERNAL
;
823 status
= RTL_R32(TBICSR
);
824 cmd
->advertising
= (status
& TBINwEnable
) ? ADVERTISED_Autoneg
: 0;
825 cmd
->autoneg
= !!(status
& TBINwEnable
);
827 cmd
->speed
= SPEED_1000
;
828 cmd
->duplex
= DUPLEX_FULL
; /* Always set */
831 static void rtl8169_gset_xmii(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
833 struct rtl8169_private
*tp
= netdev_priv(dev
);
834 void __iomem
*ioaddr
= tp
->mmio_addr
;
837 cmd
->supported
= SUPPORTED_10baseT_Half
|
838 SUPPORTED_10baseT_Full
|
839 SUPPORTED_100baseT_Half
|
840 SUPPORTED_100baseT_Full
|
841 SUPPORTED_1000baseT_Full
|
846 cmd
->advertising
= ADVERTISED_TP
| ADVERTISED_Autoneg
;
848 if (tp
->phy_auto_nego_reg
& PHY_Cap_10_Half
)
849 cmd
->advertising
|= ADVERTISED_10baseT_Half
;
850 if (tp
->phy_auto_nego_reg
& PHY_Cap_10_Full
)
851 cmd
->advertising
|= ADVERTISED_10baseT_Full
;
852 if (tp
->phy_auto_nego_reg
& PHY_Cap_100_Half
)
853 cmd
->advertising
|= ADVERTISED_100baseT_Half
;
854 if (tp
->phy_auto_nego_reg
& PHY_Cap_100_Full
)
855 cmd
->advertising
|= ADVERTISED_100baseT_Full
;
856 if (tp
->phy_1000_ctrl_reg
& PHY_Cap_1000_Full
)
857 cmd
->advertising
|= ADVERTISED_1000baseT_Full
;
859 status
= RTL_R8(PHYstatus
);
861 if (status
& _1000bpsF
)
862 cmd
->speed
= SPEED_1000
;
863 else if (status
& _100bps
)
864 cmd
->speed
= SPEED_100
;
865 else if (status
& _10bps
)
866 cmd
->speed
= SPEED_10
;
868 cmd
->duplex
= ((status
& _1000bpsF
) || (status
& FullDup
)) ?
869 DUPLEX_FULL
: DUPLEX_HALF
;
872 static int rtl8169_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
874 struct rtl8169_private
*tp
= netdev_priv(dev
);
877 spin_lock_irqsave(&tp
->lock
, flags
);
879 tp
->get_settings(dev
, cmd
);
881 spin_unlock_irqrestore(&tp
->lock
, flags
);
885 static void rtl8169_get_regs(struct net_device
*dev
, struct ethtool_regs
*regs
,
888 struct rtl8169_private
*tp
= netdev_priv(dev
);
891 if (regs
->len
> R8169_REGS_SIZE
)
892 regs
->len
= R8169_REGS_SIZE
;
894 spin_lock_irqsave(&tp
->lock
, flags
);
895 memcpy_fromio(p
, tp
->mmio_addr
, regs
->len
);
896 spin_unlock_irqrestore(&tp
->lock
, flags
);
899 static u32
rtl8169_get_msglevel(struct net_device
*dev
)
901 struct rtl8169_private
*tp
= netdev_priv(dev
);
903 return tp
->msg_enable
;
906 static void rtl8169_set_msglevel(struct net_device
*dev
, u32 value
)
908 struct rtl8169_private
*tp
= netdev_priv(dev
);
910 tp
->msg_enable
= value
;
913 static struct ethtool_ops rtl8169_ethtool_ops
= {
914 .get_drvinfo
= rtl8169_get_drvinfo
,
915 .get_regs_len
= rtl8169_get_regs_len
,
916 .get_link
= ethtool_op_get_link
,
917 .get_settings
= rtl8169_get_settings
,
918 .set_settings
= rtl8169_set_settings
,
919 .get_msglevel
= rtl8169_get_msglevel
,
920 .set_msglevel
= rtl8169_set_msglevel
,
921 .get_rx_csum
= rtl8169_get_rx_csum
,
922 .set_rx_csum
= rtl8169_set_rx_csum
,
923 .get_tx_csum
= ethtool_op_get_tx_csum
,
924 .set_tx_csum
= ethtool_op_set_tx_csum
,
925 .get_sg
= ethtool_op_get_sg
,
926 .set_sg
= ethtool_op_set_sg
,
927 .get_tso
= ethtool_op_get_tso
,
928 .set_tso
= ethtool_op_set_tso
,
929 .get_regs
= rtl8169_get_regs
,
932 static void rtl8169_write_gmii_reg_bit(void __iomem
*ioaddr
, int reg
, int bitnum
,
937 val
= mdio_read(ioaddr
, reg
);
938 val
= (bitval
== 1) ?
939 val
| (bitval
<< bitnum
) : val
& ~(0x0001 << bitnum
);
940 mdio_write(ioaddr
, reg
, val
& 0xffff);
943 static void rtl8169_get_mac_version(struct rtl8169_private
*tp
, void __iomem
*ioaddr
)
949 { 0x1 << 28, RTL_GIGA_MAC_VER_X
},
950 { 0x1 << 26, RTL_GIGA_MAC_VER_E
},
951 { 0x1 << 23, RTL_GIGA_MAC_VER_D
},
952 { 0x00000000, RTL_GIGA_MAC_VER_B
} /* Catch-all */
956 reg
= RTL_R32(TxConfig
) & 0x7c800000;
957 while ((reg
& p
->mask
) != p
->mask
)
959 tp
->mac_version
= p
->mac_version
;
962 static void rtl8169_print_mac_version(struct rtl8169_private
*tp
)
968 { RTL_GIGA_MAC_VER_E
, "RTL_GIGA_MAC_VER_E" },
969 { RTL_GIGA_MAC_VER_D
, "RTL_GIGA_MAC_VER_D" },
970 { RTL_GIGA_MAC_VER_B
, "RTL_GIGA_MAC_VER_B" },
974 for (p
= mac_print
; p
->msg
; p
++) {
975 if (tp
->mac_version
== p
->version
) {
976 dprintk("mac_version == %s (%04d)\n", p
->msg
,
981 dprintk("mac_version == Unknown\n");
984 static void rtl8169_get_phy_version(struct rtl8169_private
*tp
, void __iomem
*ioaddr
)
991 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G
},
992 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F
},
993 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E
},
994 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D
} /* Catch-all */
998 reg
= mdio_read(ioaddr
, 3) & 0xffff;
999 while ((reg
& p
->mask
) != p
->set
)
1001 tp
->phy_version
= p
->phy_version
;
1004 static void rtl8169_print_phy_version(struct rtl8169_private
*tp
)
1011 { RTL_GIGA_PHY_VER_G
, "RTL_GIGA_PHY_VER_G", 0x0002 },
1012 { RTL_GIGA_PHY_VER_F
, "RTL_GIGA_PHY_VER_F", 0x0001 },
1013 { RTL_GIGA_PHY_VER_E
, "RTL_GIGA_PHY_VER_E", 0x0000 },
1014 { RTL_GIGA_PHY_VER_D
, "RTL_GIGA_PHY_VER_D", 0x0000 },
1018 for (p
= phy_print
; p
->msg
; p
++) {
1019 if (tp
->phy_version
== p
->version
) {
1020 dprintk("phy_version == %s (%04x)\n", p
->msg
, p
->reg
);
1024 dprintk("phy_version == Unknown\n");
1027 static void rtl8169_hw_phy_config(struct net_device
*dev
)
1029 struct rtl8169_private
*tp
= netdev_priv(dev
);
1030 void __iomem
*ioaddr
= tp
->mmio_addr
;
1032 u16 regs
[5]; /* Beware of bit-sign propagation */
1033 } phy_magic
[5] = { {
1034 { 0x0000, //w 4 15 12 0
1035 0x00a1, //w 3 15 0 00a1
1036 0x0008, //w 2 15 0 0008
1037 0x1020, //w 1 15 0 1020
1038 0x1000 } },{ //w 0 15 0 1000
1039 { 0x7000, //w 4 15 12 7
1040 0xff41, //w 3 15 0 ff41
1041 0xde60, //w 2 15 0 de60
1042 0x0140, //w 1 15 0 0140
1043 0x0077 } },{ //w 0 15 0 0077
1044 { 0xa000, //w 4 15 12 a
1045 0xdf01, //w 3 15 0 df01
1046 0xdf20, //w 2 15 0 df20
1047 0xff95, //w 1 15 0 ff95
1048 0xfa00 } },{ //w 0 15 0 fa00
1049 { 0xb000, //w 4 15 12 b
1050 0xff41, //w 3 15 0 ff41
1051 0xde20, //w 2 15 0 de20
1052 0x0140, //w 1 15 0 0140
1053 0x00bb } },{ //w 0 15 0 00bb
1054 { 0xf000, //w 4 15 12 f
1055 0xdf01, //w 3 15 0 df01
1056 0xdf20, //w 2 15 0 df20
1057 0xff95, //w 1 15 0 ff95
1058 0xbf00 } //w 0 15 0 bf00
1063 rtl8169_print_mac_version(tp
);
1064 rtl8169_print_phy_version(tp
);
1066 if (tp
->mac_version
<= RTL_GIGA_MAC_VER_B
)
1068 if (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
)
1071 dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1072 dprintk("Do final_reg2.cfg\n");
1076 if (tp
->mac_version
== RTL_GIGA_MAC_VER_X
) {
1077 mdio_write(ioaddr
, 31, 0x0001);
1078 mdio_write(ioaddr
, 9, 0x273a);
1079 mdio_write(ioaddr
, 14, 0x7bfb);
1080 mdio_write(ioaddr
, 27, 0x841e);
1082 mdio_write(ioaddr
, 31, 0x0002);
1083 mdio_write(ioaddr
, 1, 0x90d0);
1084 mdio_write(ioaddr
, 31, 0x0000);
1088 /* phy config for RTL8169s mac_version C chip */
1089 mdio_write(ioaddr
, 31, 0x0001); //w 31 2 0 1
1090 mdio_write(ioaddr
, 21, 0x1000); //w 21 15 0 1000
1091 mdio_write(ioaddr
, 24, 0x65c7); //w 24 15 0 65c7
1092 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 0); //w 4 11 11 0
1094 for (i
= 0; i
< ARRAY_SIZE(phy_magic
); i
++, p
++) {
1097 val
= (mdio_read(ioaddr
, pos
) & 0x0fff) | (p
->regs
[0] & 0xffff);
1098 mdio_write(ioaddr
, pos
, val
);
1100 mdio_write(ioaddr
, pos
, p
->regs
[4 - pos
] & 0xffff);
1101 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 1); //w 4 11 11 1
1102 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 0); //w 4 11 11 0
1104 mdio_write(ioaddr
, 31, 0x0000); //w 31 2 0 0
1107 static void rtl8169_phy_timer(unsigned long __opaque
)
1109 struct net_device
*dev
= (struct net_device
*)__opaque
;
1110 struct rtl8169_private
*tp
= netdev_priv(dev
);
1111 struct timer_list
*timer
= &tp
->timer
;
1112 void __iomem
*ioaddr
= tp
->mmio_addr
;
1113 unsigned long timeout
= RTL8169_PHY_TIMEOUT
;
1115 assert(tp
->mac_version
> RTL_GIGA_MAC_VER_B
);
1116 assert(tp
->phy_version
< RTL_GIGA_PHY_VER_H
);
1118 if (!(tp
->phy_1000_ctrl_reg
& PHY_Cap_1000_Full
))
1121 spin_lock_irq(&tp
->lock
);
1123 if (tp
->phy_reset_pending(ioaddr
)) {
1125 * A busy loop could burn quite a few cycles on nowadays CPU.
1126 * Let's delay the execution of the timer for a few ticks.
1132 if (tp
->link_ok(ioaddr
))
1135 if (netif_msg_link(tp
))
1136 printk(KERN_WARNING
"%s: PHY reset until link up\n", dev
->name
);
1138 tp
->phy_reset_enable(ioaddr
);
1141 mod_timer(timer
, jiffies
+ timeout
);
1143 spin_unlock_irq(&tp
->lock
);
1146 static inline void rtl8169_delete_timer(struct net_device
*dev
)
1148 struct rtl8169_private
*tp
= netdev_priv(dev
);
1149 struct timer_list
*timer
= &tp
->timer
;
1151 if ((tp
->mac_version
<= RTL_GIGA_MAC_VER_B
) ||
1152 (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
))
1155 del_timer_sync(timer
);
1158 static inline void rtl8169_request_timer(struct net_device
*dev
)
1160 struct rtl8169_private
*tp
= netdev_priv(dev
);
1161 struct timer_list
*timer
= &tp
->timer
;
1163 if ((tp
->mac_version
<= RTL_GIGA_MAC_VER_B
) ||
1164 (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
))
1168 timer
->expires
= jiffies
+ RTL8169_PHY_TIMEOUT
;
1169 timer
->data
= (unsigned long)(dev
);
1170 timer
->function
= rtl8169_phy_timer
;
1174 #ifdef CONFIG_NET_POLL_CONTROLLER
1176 * Polling 'interrupt' - used by things like netconsole to send skbs
1177 * without having to re-enable interrupts. It's not called while
1178 * the interrupt routine is executing.
1180 static void rtl8169_netpoll(struct net_device
*dev
)
1182 struct rtl8169_private
*tp
= netdev_priv(dev
);
1183 struct pci_dev
*pdev
= tp
->pci_dev
;
1185 disable_irq(pdev
->irq
);
1186 rtl8169_interrupt(pdev
->irq
, dev
, NULL
);
1187 enable_irq(pdev
->irq
);
1191 static void rtl8169_release_board(struct pci_dev
*pdev
, struct net_device
*dev
,
1192 void __iomem
*ioaddr
)
1195 pci_release_regions(pdev
);
1196 pci_disable_device(pdev
);
1200 static int __devinit
1201 rtl8169_init_board(struct pci_dev
*pdev
, struct net_device
**dev_out
,
1202 void __iomem
**ioaddr_out
)
1204 void __iomem
*ioaddr
;
1205 struct net_device
*dev
;
1206 struct rtl8169_private
*tp
;
1207 int rc
= -ENOMEM
, i
, acpi_idle_state
= 0, pm_cap
;
1209 assert(ioaddr_out
!= NULL
);
1211 /* dev zeroed in alloc_etherdev */
1212 dev
= alloc_etherdev(sizeof (*tp
));
1214 if (netif_msg_drv(&debug
))
1215 printk(KERN_ERR PFX
"unable to alloc new ethernet\n");
1219 SET_MODULE_OWNER(dev
);
1220 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1221 tp
= netdev_priv(dev
);
1222 tp
->msg_enable
= netif_msg_init(debug
.msg_enable
, R8169_MSG_DEFAULT
);
1224 /* enable device (incl. PCI PM wakeup and hotplug setup) */
1225 rc
= pci_enable_device(pdev
);
1227 if (netif_msg_probe(tp
)) {
1228 printk(KERN_ERR PFX
"%s: enable failure\n",
1231 goto err_out_free_dev
;
1234 rc
= pci_set_mwi(pdev
);
1236 goto err_out_disable
;
1238 /* save power state before pci_enable_device overwrites it */
1239 pm_cap
= pci_find_capability(pdev
, PCI_CAP_ID_PM
);
1243 pci_read_config_word(pdev
, pm_cap
+ PCI_PM_CTRL
, &pwr_command
);
1244 acpi_idle_state
= pwr_command
& PCI_PM_CTRL_STATE_MASK
;
1246 if (netif_msg_probe(tp
)) {
1248 "Cannot find PowerManagement capability. "
1254 /* make sure PCI base addr 1 is MMIO */
1255 if (!(pci_resource_flags(pdev
, 1) & IORESOURCE_MEM
)) {
1256 if (netif_msg_probe(tp
)) {
1258 "region #1 not an MMIO resource, aborting\n");
1263 /* check for weird/broken PCI region reporting */
1264 if (pci_resource_len(pdev
, 1) < R8169_REGS_SIZE
) {
1265 if (netif_msg_probe(tp
)) {
1267 "Invalid PCI region size(s), aborting\n");
1273 rc
= pci_request_regions(pdev
, MODULENAME
);
1275 if (netif_msg_probe(tp
)) {
1276 printk(KERN_ERR PFX
"%s: could not request regions.\n",
1282 tp
->cp_cmd
= PCIMulRW
| RxChkSum
;
1284 if ((sizeof(dma_addr_t
) > 4) &&
1285 !pci_set_dma_mask(pdev
, DMA_64BIT_MASK
) && use_dac
) {
1286 tp
->cp_cmd
|= PCIDAC
;
1287 dev
->features
|= NETIF_F_HIGHDMA
;
1289 rc
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1291 if (netif_msg_probe(tp
)) {
1293 "DMA configuration failed.\n");
1295 goto err_out_free_res
;
1299 pci_set_master(pdev
);
1301 /* ioremap MMIO region */
1302 ioaddr
= ioremap(pci_resource_start(pdev
, 1), R8169_REGS_SIZE
);
1303 if (ioaddr
== NULL
) {
1304 if (netif_msg_probe(tp
))
1305 printk(KERN_ERR PFX
"cannot remap MMIO, aborting\n");
1307 goto err_out_free_res
;
1310 /* Unneeded ? Don't mess with Mrs. Murphy. */
1311 rtl8169_irq_mask_and_ack(ioaddr
);
1313 /* Soft reset the chip. */
1314 RTL_W8(ChipCmd
, CmdReset
);
1316 /* Check that the chip has finished the reset. */
1317 for (i
= 1000; i
> 0; i
--) {
1318 if ((RTL_R8(ChipCmd
) & CmdReset
) == 0)
1323 /* Identify chip attached to board */
1324 rtl8169_get_mac_version(tp
, ioaddr
);
1325 rtl8169_get_phy_version(tp
, ioaddr
);
1327 rtl8169_print_mac_version(tp
);
1328 rtl8169_print_phy_version(tp
);
1330 for (i
= ARRAY_SIZE(rtl_chip_info
) - 1; i
>= 0; i
--) {
1331 if (tp
->mac_version
== rtl_chip_info
[i
].mac_version
)
1335 /* Unknown chip: assume array element #0, original RTL-8169 */
1336 if (netif_msg_probe(tp
)) {
1337 printk(KERN_DEBUG PFX
"PCI device %s: "
1338 "unknown chip version, assuming %s\n",
1339 pci_name(pdev
), rtl_chip_info
[0].name
);
1345 *ioaddr_out
= ioaddr
;
1351 pci_release_regions(pdev
);
1354 pci_clear_mwi(pdev
);
1357 pci_disable_device(pdev
);
1367 static int __devinit
1368 rtl8169_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1370 struct net_device
*dev
= NULL
;
1371 struct rtl8169_private
*tp
;
1372 void __iomem
*ioaddr
= NULL
;
1373 static int board_idx
= -1;
1378 assert(pdev
!= NULL
);
1379 assert(ent
!= NULL
);
1383 if (netif_msg_drv(&debug
)) {
1384 printk(KERN_INFO
"%s Gigabit Ethernet driver %s loaded\n",
1385 MODULENAME
, RTL8169_VERSION
);
1388 rc
= rtl8169_init_board(pdev
, &dev
, &ioaddr
);
1392 tp
= netdev_priv(dev
);
1393 assert(ioaddr
!= NULL
);
1395 if (RTL_R8(PHYstatus
) & TBI_Enable
) {
1396 tp
->set_speed
= rtl8169_set_speed_tbi
;
1397 tp
->get_settings
= rtl8169_gset_tbi
;
1398 tp
->phy_reset_enable
= rtl8169_tbi_reset_enable
;
1399 tp
->phy_reset_pending
= rtl8169_tbi_reset_pending
;
1400 tp
->link_ok
= rtl8169_tbi_link_ok
;
1402 tp
->phy_1000_ctrl_reg
= PHY_Cap_1000_Full
; /* Implied by TBI */
1404 tp
->set_speed
= rtl8169_set_speed_xmii
;
1405 tp
->get_settings
= rtl8169_gset_xmii
;
1406 tp
->phy_reset_enable
= rtl8169_xmii_reset_enable
;
1407 tp
->phy_reset_pending
= rtl8169_xmii_reset_pending
;
1408 tp
->link_ok
= rtl8169_xmii_link_ok
;
1411 /* Get MAC address. FIXME: read EEPROM */
1412 for (i
= 0; i
< MAC_ADDR_LEN
; i
++)
1413 dev
->dev_addr
[i
] = RTL_R8(MAC0
+ i
);
1415 dev
->open
= rtl8169_open
;
1416 dev
->hard_start_xmit
= rtl8169_start_xmit
;
1417 dev
->get_stats
= rtl8169_get_stats
;
1418 SET_ETHTOOL_OPS(dev
, &rtl8169_ethtool_ops
);
1419 dev
->stop
= rtl8169_close
;
1420 dev
->tx_timeout
= rtl8169_tx_timeout
;
1421 dev
->set_multicast_list
= rtl8169_set_rx_mode
;
1422 dev
->watchdog_timeo
= RTL8169_TX_TIMEOUT
;
1423 dev
->irq
= pdev
->irq
;
1424 dev
->base_addr
= (unsigned long) ioaddr
;
1425 dev
->change_mtu
= rtl8169_change_mtu
;
1427 #ifdef CONFIG_R8169_NAPI
1428 dev
->poll
= rtl8169_poll
;
1429 dev
->weight
= R8169_NAPI_WEIGHT
;
1432 #ifdef CONFIG_R8169_VLAN
1433 dev
->features
|= NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX
;
1434 dev
->vlan_rx_register
= rtl8169_vlan_rx_register
;
1435 dev
->vlan_rx_kill_vid
= rtl8169_vlan_rx_kill_vid
;
1438 #ifdef CONFIG_NET_POLL_CONTROLLER
1439 dev
->poll_controller
= rtl8169_netpoll
;
1442 tp
->intr_mask
= 0xffff;
1444 tp
->mmio_addr
= ioaddr
;
1446 spin_lock_init(&tp
->lock
);
1448 rc
= register_netdev(dev
);
1450 rtl8169_release_board(pdev
, dev
, ioaddr
);
1454 if (netif_msg_probe(tp
)) {
1455 printk(KERN_DEBUG
"%s: Identified chip type is '%s'.\n",
1456 dev
->name
, rtl_chip_info
[tp
->chipset
].name
);
1459 pci_set_drvdata(pdev
, dev
);
1461 if (netif_msg_probe(tp
)) {
1462 printk(KERN_INFO
"%s: %s at 0x%lx, "
1463 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1466 rtl_chip_info
[ent
->driver_data
].name
,
1468 dev
->dev_addr
[0], dev
->dev_addr
[1],
1469 dev
->dev_addr
[2], dev
->dev_addr
[3],
1470 dev
->dev_addr
[4], dev
->dev_addr
[5], dev
->irq
);
1473 rtl8169_hw_phy_config(dev
);
1475 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1478 if (tp
->mac_version
< RTL_GIGA_MAC_VER_E
) {
1479 dprintk("Set PCI Latency=0x40\n");
1480 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, 0x40);
1483 if (tp
->mac_version
== RTL_GIGA_MAC_VER_D
) {
1484 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1486 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1487 mdio_write(ioaddr
, 0x0b, 0x0000); //w 0x0b 15 0 0
1490 rtl8169_link_option(board_idx
, &autoneg
, &speed
, &duplex
);
1492 rtl8169_set_speed(dev
, autoneg
, speed
, duplex
);
1494 if ((RTL_R8(PHYstatus
) & TBI_Enable
) && netif_msg_link(tp
))
1495 printk(KERN_INFO PFX
"%s: TBI auto-negotiating\n", dev
->name
);
1500 static void __devexit
1501 rtl8169_remove_one(struct pci_dev
*pdev
)
1503 struct net_device
*dev
= pci_get_drvdata(pdev
);
1504 struct rtl8169_private
*tp
= netdev_priv(dev
);
1506 assert(dev
!= NULL
);
1509 unregister_netdev(dev
);
1510 rtl8169_release_board(pdev
, dev
, tp
->mmio_addr
);
1511 pci_set_drvdata(pdev
, NULL
);
1516 static int rtl8169_suspend(struct pci_dev
*pdev
, pm_message_t state
)
1518 struct net_device
*dev
= pci_get_drvdata(pdev
);
1519 struct rtl8169_private
*tp
= netdev_priv(dev
);
1520 void __iomem
*ioaddr
= tp
->mmio_addr
;
1521 unsigned long flags
;
1523 if (!netif_running(dev
))
1526 netif_device_detach(dev
);
1527 netif_stop_queue(dev
);
1528 spin_lock_irqsave(&tp
->lock
, flags
);
1530 /* Disable interrupts, stop Rx and Tx */
1531 RTL_W16(IntrMask
, 0);
1534 /* Update the error counts. */
1535 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
1536 RTL_W32(RxMissed
, 0);
1537 spin_unlock_irqrestore(&tp
->lock
, flags
);
1542 static int rtl8169_resume(struct pci_dev
*pdev
)
1544 struct net_device
*dev
= pci_get_drvdata(pdev
);
1546 if (!netif_running(dev
))
1549 netif_device_attach(dev
);
1550 rtl8169_hw_start(dev
);
1555 #endif /* CONFIG_PM */
1557 static void rtl8169_set_rxbufsize(struct rtl8169_private
*tp
,
1558 struct net_device
*dev
)
1560 unsigned int mtu
= dev
->mtu
;
1562 tp
->rx_buf_sz
= (mtu
> RX_BUF_SIZE
) ? mtu
+ ETH_HLEN
+ 8 : RX_BUF_SIZE
;
1565 static int rtl8169_open(struct net_device
*dev
)
1567 struct rtl8169_private
*tp
= netdev_priv(dev
);
1568 struct pci_dev
*pdev
= tp
->pci_dev
;
1571 rtl8169_set_rxbufsize(tp
, dev
);
1574 request_irq(dev
->irq
, rtl8169_interrupt
, SA_SHIRQ
, dev
->name
, dev
);
1581 * Rx and Tx desscriptors needs 256 bytes alignment.
1582 * pci_alloc_consistent provides more.
1584 tp
->TxDescArray
= pci_alloc_consistent(pdev
, R8169_TX_RING_BYTES
,
1586 if (!tp
->TxDescArray
)
1589 tp
->RxDescArray
= pci_alloc_consistent(pdev
, R8169_RX_RING_BYTES
,
1591 if (!tp
->RxDescArray
)
1594 retval
= rtl8169_init_ring(dev
);
1598 INIT_WORK(&tp
->task
, NULL
, dev
);
1600 rtl8169_hw_start(dev
);
1602 rtl8169_request_timer(dev
);
1604 rtl8169_check_link_status(dev
, tp
, tp
->mmio_addr
);
1609 pci_free_consistent(pdev
, R8169_RX_RING_BYTES
, tp
->RxDescArray
,
1612 pci_free_consistent(pdev
, R8169_TX_RING_BYTES
, tp
->TxDescArray
,
1615 free_irq(dev
->irq
, dev
);
1619 static void rtl8169_hw_reset(void __iomem
*ioaddr
)
1621 /* Disable interrupts */
1622 rtl8169_irq_mask_and_ack(ioaddr
);
1624 /* Reset the chipset */
1625 RTL_W8(ChipCmd
, CmdReset
);
1632 rtl8169_hw_start(struct net_device
*dev
)
1634 struct rtl8169_private
*tp
= netdev_priv(dev
);
1635 void __iomem
*ioaddr
= tp
->mmio_addr
;
1638 /* Soft reset the chip. */
1639 RTL_W8(ChipCmd
, CmdReset
);
1641 /* Check that the chip has finished the reset. */
1642 for (i
= 1000; i
> 0; i
--) {
1643 if ((RTL_R8(ChipCmd
) & CmdReset
) == 0)
1648 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1649 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
1650 RTL_W8(EarlyTxThres
, EarlyTxThld
);
1652 /* Low hurts. Let's disable the filtering. */
1653 RTL_W16(RxMaxSize
, 16383);
1655 /* Set Rx Config register */
1656 i
= rtl8169_rx_config
|
1657 (RTL_R32(RxConfig
) & rtl_chip_info
[tp
->chipset
].RxConfigMask
);
1658 RTL_W32(RxConfig
, i
);
1660 /* Set DMA burst size and Interframe Gap Time */
1662 (TX_DMA_BURST
<< TxDMAShift
) | (InterFrameGap
<<
1663 TxInterFrameGapShift
));
1664 tp
->cp_cmd
|= RTL_R16(CPlusCmd
);
1665 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
1667 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_D
) ||
1668 (tp
->mac_version
== RTL_GIGA_MAC_VER_E
)) {
1669 dprintk(KERN_INFO PFX
"Set MAC Reg C+CR Offset 0xE0. "
1670 "Bit-3 and bit-14 MUST be 1\n");
1671 tp
->cp_cmd
|= (1 << 14) | PCIMulRW
;
1672 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
1676 * Undocumented corner. Supposedly:
1677 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1679 RTL_W16(IntrMitigate
, 0x0000);
1681 RTL_W32(TxDescStartAddrLow
, ((u64
) tp
->TxPhyAddr
& DMA_32BIT_MASK
));
1682 RTL_W32(TxDescStartAddrHigh
, ((u64
) tp
->TxPhyAddr
>> 32));
1683 RTL_W32(RxDescAddrLow
, ((u64
) tp
->RxPhyAddr
& DMA_32BIT_MASK
));
1684 RTL_W32(RxDescAddrHigh
, ((u64
) tp
->RxPhyAddr
>> 32));
1685 RTL_W8(Cfg9346
, Cfg9346_Lock
);
1688 RTL_W32(RxMissed
, 0);
1690 rtl8169_set_rx_mode(dev
);
1692 /* no early-rx interrupts */
1693 RTL_W16(MultiIntr
, RTL_R16(MultiIntr
) & 0xF000);
1695 /* Enable all known interrupts by setting the interrupt mask. */
1696 RTL_W16(IntrMask
, rtl8169_intr_mask
);
1698 netif_start_queue(dev
);
1701 static int rtl8169_change_mtu(struct net_device
*dev
, int new_mtu
)
1703 struct rtl8169_private
*tp
= netdev_priv(dev
);
1706 if (new_mtu
< ETH_ZLEN
|| new_mtu
> SafeMtu
)
1711 if (!netif_running(dev
))
1716 rtl8169_set_rxbufsize(tp
, dev
);
1718 ret
= rtl8169_init_ring(dev
);
1722 netif_poll_enable(dev
);
1724 rtl8169_hw_start(dev
);
1726 rtl8169_request_timer(dev
);
1732 static inline void rtl8169_make_unusable_by_asic(struct RxDesc
*desc
)
1734 desc
->addr
= 0x0badbadbadbadbadull
;
1735 desc
->opts1
&= ~cpu_to_le32(DescOwn
| RsvdMask
);
1738 static void rtl8169_free_rx_skb(struct rtl8169_private
*tp
,
1739 struct sk_buff
**sk_buff
, struct RxDesc
*desc
)
1741 struct pci_dev
*pdev
= tp
->pci_dev
;
1743 pci_unmap_single(pdev
, le64_to_cpu(desc
->addr
), tp
->rx_buf_sz
,
1744 PCI_DMA_FROMDEVICE
);
1745 dev_kfree_skb(*sk_buff
);
1747 rtl8169_make_unusable_by_asic(desc
);
1750 static inline void rtl8169_mark_to_asic(struct RxDesc
*desc
, u32 rx_buf_sz
)
1752 u32 eor
= le32_to_cpu(desc
->opts1
) & RingEnd
;
1754 desc
->opts1
= cpu_to_le32(DescOwn
| eor
| rx_buf_sz
);
1757 static inline void rtl8169_map_to_asic(struct RxDesc
*desc
, dma_addr_t mapping
,
1760 desc
->addr
= cpu_to_le64(mapping
);
1762 rtl8169_mark_to_asic(desc
, rx_buf_sz
);
1765 static int rtl8169_alloc_rx_skb(struct pci_dev
*pdev
, struct sk_buff
**sk_buff
,
1766 struct RxDesc
*desc
, int rx_buf_sz
)
1768 struct sk_buff
*skb
;
1772 skb
= dev_alloc_skb(rx_buf_sz
+ NET_IP_ALIGN
);
1776 skb_reserve(skb
, NET_IP_ALIGN
);
1779 mapping
= pci_map_single(pdev
, skb
->tail
, rx_buf_sz
,
1780 PCI_DMA_FROMDEVICE
);
1782 rtl8169_map_to_asic(desc
, mapping
, rx_buf_sz
);
1789 rtl8169_make_unusable_by_asic(desc
);
1793 static void rtl8169_rx_clear(struct rtl8169_private
*tp
)
1797 for (i
= 0; i
< NUM_RX_DESC
; i
++) {
1798 if (tp
->Rx_skbuff
[i
]) {
1799 rtl8169_free_rx_skb(tp
, tp
->Rx_skbuff
+ i
,
1800 tp
->RxDescArray
+ i
);
1805 static u32
rtl8169_rx_fill(struct rtl8169_private
*tp
, struct net_device
*dev
,
1810 for (cur
= start
; end
- cur
> 0; cur
++) {
1811 int ret
, i
= cur
% NUM_RX_DESC
;
1813 if (tp
->Rx_skbuff
[i
])
1816 ret
= rtl8169_alloc_rx_skb(tp
->pci_dev
, tp
->Rx_skbuff
+ i
,
1817 tp
->RxDescArray
+ i
, tp
->rx_buf_sz
);
1824 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc
*desc
)
1826 desc
->opts1
|= cpu_to_le32(RingEnd
);
1829 static void rtl8169_init_ring_indexes(struct rtl8169_private
*tp
)
1831 tp
->dirty_tx
= tp
->dirty_rx
= tp
->cur_tx
= tp
->cur_rx
= 0;
1834 static int rtl8169_init_ring(struct net_device
*dev
)
1836 struct rtl8169_private
*tp
= netdev_priv(dev
);
1838 rtl8169_init_ring_indexes(tp
);
1840 memset(tp
->tx_skb
, 0x0, NUM_TX_DESC
* sizeof(struct ring_info
));
1841 memset(tp
->Rx_skbuff
, 0x0, NUM_RX_DESC
* sizeof(struct sk_buff
*));
1843 if (rtl8169_rx_fill(tp
, dev
, 0, NUM_RX_DESC
) != NUM_RX_DESC
)
1846 rtl8169_mark_as_last_descriptor(tp
->RxDescArray
+ NUM_RX_DESC
- 1);
1851 rtl8169_rx_clear(tp
);
1855 static void rtl8169_unmap_tx_skb(struct pci_dev
*pdev
, struct ring_info
*tx_skb
,
1856 struct TxDesc
*desc
)
1858 unsigned int len
= tx_skb
->len
;
1860 pci_unmap_single(pdev
, le64_to_cpu(desc
->addr
), len
, PCI_DMA_TODEVICE
);
1867 static void rtl8169_tx_clear(struct rtl8169_private
*tp
)
1871 for (i
= tp
->dirty_tx
; i
< tp
->dirty_tx
+ NUM_TX_DESC
; i
++) {
1872 unsigned int entry
= i
% NUM_TX_DESC
;
1873 struct ring_info
*tx_skb
= tp
->tx_skb
+ entry
;
1874 unsigned int len
= tx_skb
->len
;
1877 struct sk_buff
*skb
= tx_skb
->skb
;
1879 rtl8169_unmap_tx_skb(tp
->pci_dev
, tx_skb
,
1880 tp
->TxDescArray
+ entry
);
1885 tp
->stats
.tx_dropped
++;
1888 tp
->cur_tx
= tp
->dirty_tx
= 0;
1891 static void rtl8169_schedule_work(struct net_device
*dev
, void (*task
)(void *))
1893 struct rtl8169_private
*tp
= netdev_priv(dev
);
1895 PREPARE_WORK(&tp
->task
, task
, dev
);
1896 schedule_delayed_work(&tp
->task
, 4);
1899 static void rtl8169_wait_for_quiescence(struct net_device
*dev
)
1901 struct rtl8169_private
*tp
= netdev_priv(dev
);
1902 void __iomem
*ioaddr
= tp
->mmio_addr
;
1904 synchronize_irq(dev
->irq
);
1906 /* Wait for any pending NAPI task to complete */
1907 netif_poll_disable(dev
);
1909 rtl8169_irq_mask_and_ack(ioaddr
);
1911 netif_poll_enable(dev
);
1914 static void rtl8169_reinit_task(void *_data
)
1916 struct net_device
*dev
= _data
;
1919 if (netif_running(dev
)) {
1920 rtl8169_wait_for_quiescence(dev
);
1924 ret
= rtl8169_open(dev
);
1925 if (unlikely(ret
< 0)) {
1926 if (net_ratelimit()) {
1927 struct rtl8169_private
*tp
= netdev_priv(dev
);
1929 if (netif_msg_drv(tp
)) {
1931 "%s: reinit failure (status = %d)."
1932 " Rescheduling.\n", dev
->name
, ret
);
1935 rtl8169_schedule_work(dev
, rtl8169_reinit_task
);
1939 static void rtl8169_reset_task(void *_data
)
1941 struct net_device
*dev
= _data
;
1942 struct rtl8169_private
*tp
= netdev_priv(dev
);
1944 if (!netif_running(dev
))
1947 rtl8169_wait_for_quiescence(dev
);
1949 rtl8169_rx_interrupt(dev
, tp
, tp
->mmio_addr
);
1950 rtl8169_tx_clear(tp
);
1952 if (tp
->dirty_rx
== tp
->cur_rx
) {
1953 rtl8169_init_ring_indexes(tp
);
1954 rtl8169_hw_start(dev
);
1955 netif_wake_queue(dev
);
1957 if (net_ratelimit()) {
1958 struct rtl8169_private
*tp
= netdev_priv(dev
);
1960 if (netif_msg_intr(tp
)) {
1961 printk(PFX KERN_EMERG
1962 "%s: Rx buffers shortage\n", dev
->name
);
1965 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
1969 static void rtl8169_tx_timeout(struct net_device
*dev
)
1971 struct rtl8169_private
*tp
= netdev_priv(dev
);
1973 rtl8169_hw_reset(tp
->mmio_addr
);
1975 /* Let's wait a bit while any (async) irq lands on */
1976 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
1979 static int rtl8169_xmit_frags(struct rtl8169_private
*tp
, struct sk_buff
*skb
,
1982 struct skb_shared_info
*info
= skb_shinfo(skb
);
1983 unsigned int cur_frag
, entry
;
1987 for (cur_frag
= 0; cur_frag
< info
->nr_frags
; cur_frag
++) {
1988 skb_frag_t
*frag
= info
->frags
+ cur_frag
;
1993 entry
= (entry
+ 1) % NUM_TX_DESC
;
1995 txd
= tp
->TxDescArray
+ entry
;
1997 addr
= ((void *) page_address(frag
->page
)) + frag
->page_offset
;
1998 mapping
= pci_map_single(tp
->pci_dev
, addr
, len
, PCI_DMA_TODEVICE
);
2000 /* anti gcc 2.95.3 bugware (sic) */
2001 status
= opts1
| len
| (RingEnd
* !((entry
+ 1) % NUM_TX_DESC
));
2003 txd
->opts1
= cpu_to_le32(status
);
2004 txd
->addr
= cpu_to_le64(mapping
);
2006 tp
->tx_skb
[entry
].len
= len
;
2010 tp
->tx_skb
[entry
].skb
= skb
;
2011 txd
->opts1
|= cpu_to_le32(LastFrag
);
2017 static inline u32
rtl8169_tso_csum(struct sk_buff
*skb
, struct net_device
*dev
)
2019 if (dev
->features
& NETIF_F_TSO
) {
2020 u32 mss
= skb_shinfo(skb
)->tso_size
;
2023 return LargeSend
| ((mss
& MSSMask
) << MSSShift
);
2025 if (skb
->ip_summed
== CHECKSUM_HW
) {
2026 const struct iphdr
*ip
= skb
->nh
.iph
;
2028 if (ip
->protocol
== IPPROTO_TCP
)
2029 return IPCS
| TCPCS
;
2030 else if (ip
->protocol
== IPPROTO_UDP
)
2031 return IPCS
| UDPCS
;
2032 WARN_ON(1); /* we need a WARN() */
2037 static int rtl8169_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
2039 struct rtl8169_private
*tp
= netdev_priv(dev
);
2040 unsigned int frags
, entry
= tp
->cur_tx
% NUM_TX_DESC
;
2041 struct TxDesc
*txd
= tp
->TxDescArray
+ entry
;
2042 void __iomem
*ioaddr
= tp
->mmio_addr
;
2048 if (unlikely(TX_BUFFS_AVAIL(tp
) < skb_shinfo(skb
)->nr_frags
)) {
2049 if (netif_msg_drv(tp
)) {
2051 "%s: BUG! Tx Ring full when queue awake!\n",
2057 if (unlikely(le32_to_cpu(txd
->opts1
) & DescOwn
))
2060 opts1
= DescOwn
| rtl8169_tso_csum(skb
, dev
);
2062 frags
= rtl8169_xmit_frags(tp
, skb
, opts1
);
2064 len
= skb_headlen(skb
);
2069 if (unlikely(len
< ETH_ZLEN
)) {
2070 skb
= skb_padto(skb
, ETH_ZLEN
);
2072 goto err_update_stats
;
2076 opts1
|= FirstFrag
| LastFrag
;
2077 tp
->tx_skb
[entry
].skb
= skb
;
2080 mapping
= pci_map_single(tp
->pci_dev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
2082 tp
->tx_skb
[entry
].len
= len
;
2083 txd
->addr
= cpu_to_le64(mapping
);
2084 txd
->opts2
= cpu_to_le32(rtl8169_tx_vlan_tag(tp
, skb
));
2088 /* anti gcc 2.95.3 bugware (sic) */
2089 status
= opts1
| len
| (RingEnd
* !((entry
+ 1) % NUM_TX_DESC
));
2090 txd
->opts1
= cpu_to_le32(status
);
2092 dev
->trans_start
= jiffies
;
2094 tp
->cur_tx
+= frags
+ 1;
2098 RTL_W8(TxPoll
, 0x40); /* set polling bit */
2100 if (TX_BUFFS_AVAIL(tp
) < MAX_SKB_FRAGS
) {
2101 netif_stop_queue(dev
);
2103 if (TX_BUFFS_AVAIL(tp
) >= MAX_SKB_FRAGS
)
2104 netif_wake_queue(dev
);
2111 netif_stop_queue(dev
);
2114 tp
->stats
.tx_dropped
++;
2118 static void rtl8169_pcierr_interrupt(struct net_device
*dev
)
2120 struct rtl8169_private
*tp
= netdev_priv(dev
);
2121 struct pci_dev
*pdev
= tp
->pci_dev
;
2122 void __iomem
*ioaddr
= tp
->mmio_addr
;
2123 u16 pci_status
, pci_cmd
;
2125 pci_read_config_word(pdev
, PCI_COMMAND
, &pci_cmd
);
2126 pci_read_config_word(pdev
, PCI_STATUS
, &pci_status
);
2128 if (netif_msg_intr(tp
)) {
2130 "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2131 dev
->name
, pci_cmd
, pci_status
);
2135 * The recovery sequence below admits a very elaborated explanation:
2136 * - it seems to work;
2137 * - I did not see what else could be done.
2139 * Feel free to adjust to your needs.
2141 pci_write_config_word(pdev
, PCI_COMMAND
,
2142 pci_cmd
| PCI_COMMAND_SERR
| PCI_COMMAND_PARITY
);
2144 pci_write_config_word(pdev
, PCI_STATUS
,
2145 pci_status
& (PCI_STATUS_DETECTED_PARITY
|
2146 PCI_STATUS_SIG_SYSTEM_ERROR
| PCI_STATUS_REC_MASTER_ABORT
|
2147 PCI_STATUS_REC_TARGET_ABORT
| PCI_STATUS_SIG_TARGET_ABORT
));
2149 /* The infamous DAC f*ckup only happens at boot time */
2150 if ((tp
->cp_cmd
& PCIDAC
) && !tp
->dirty_rx
&& !tp
->cur_rx
) {
2151 if (netif_msg_intr(tp
))
2152 printk(KERN_INFO
"%s: disabling PCI DAC.\n", dev
->name
);
2153 tp
->cp_cmd
&= ~PCIDAC
;
2154 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
2155 dev
->features
&= ~NETIF_F_HIGHDMA
;
2156 rtl8169_schedule_work(dev
, rtl8169_reinit_task
);
2159 rtl8169_hw_reset(ioaddr
);
2163 rtl8169_tx_interrupt(struct net_device
*dev
, struct rtl8169_private
*tp
,
2164 void __iomem
*ioaddr
)
2166 unsigned int dirty_tx
, tx_left
;
2168 assert(dev
!= NULL
);
2170 assert(ioaddr
!= NULL
);
2172 dirty_tx
= tp
->dirty_tx
;
2174 tx_left
= tp
->cur_tx
- dirty_tx
;
2176 while (tx_left
> 0) {
2177 unsigned int entry
= dirty_tx
% NUM_TX_DESC
;
2178 struct ring_info
*tx_skb
= tp
->tx_skb
+ entry
;
2179 u32 len
= tx_skb
->len
;
2183 status
= le32_to_cpu(tp
->TxDescArray
[entry
].opts1
);
2184 if (status
& DescOwn
)
2187 tp
->stats
.tx_bytes
+= len
;
2188 tp
->stats
.tx_packets
++;
2190 rtl8169_unmap_tx_skb(tp
->pci_dev
, tx_skb
, tp
->TxDescArray
+ entry
);
2192 if (status
& LastFrag
) {
2193 dev_kfree_skb_irq(tx_skb
->skb
);
2200 if (tp
->dirty_tx
!= dirty_tx
) {
2201 tp
->dirty_tx
= dirty_tx
;
2203 if (netif_queue_stopped(dev
) &&
2204 (TX_BUFFS_AVAIL(tp
) >= MAX_SKB_FRAGS
)) {
2205 netif_wake_queue(dev
);
2210 static inline int rtl8169_fragmented_frame(u32 status
)
2212 return (status
& (FirstFrag
| LastFrag
)) != (FirstFrag
| LastFrag
);
2215 static inline void rtl8169_rx_csum(struct sk_buff
*skb
, struct RxDesc
*desc
)
2217 u32 opts1
= le32_to_cpu(desc
->opts1
);
2218 u32 status
= opts1
& RxProtoMask
;
2220 if (((status
== RxProtoTCP
) && !(opts1
& TCPFail
)) ||
2221 ((status
== RxProtoUDP
) && !(opts1
& UDPFail
)) ||
2222 ((status
== RxProtoIP
) && !(opts1
& IPFail
)))
2223 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
2225 skb
->ip_summed
= CHECKSUM_NONE
;
2228 static inline int rtl8169_try_rx_copy(struct sk_buff
**sk_buff
, int pkt_size
,
2229 struct RxDesc
*desc
, int rx_buf_sz
)
2233 if (pkt_size
< rx_copybreak
) {
2234 struct sk_buff
*skb
;
2236 skb
= dev_alloc_skb(pkt_size
+ NET_IP_ALIGN
);
2238 skb_reserve(skb
, NET_IP_ALIGN
);
2239 eth_copy_and_sum(skb
, sk_buff
[0]->tail
, pkt_size
, 0);
2241 rtl8169_mark_to_asic(desc
, rx_buf_sz
);
2249 rtl8169_rx_interrupt(struct net_device
*dev
, struct rtl8169_private
*tp
,
2250 void __iomem
*ioaddr
)
2252 unsigned int cur_rx
, rx_left
;
2253 unsigned int delta
, count
;
2255 assert(dev
!= NULL
);
2257 assert(ioaddr
!= NULL
);
2259 cur_rx
= tp
->cur_rx
;
2260 rx_left
= NUM_RX_DESC
+ tp
->dirty_rx
- cur_rx
;
2261 rx_left
= rtl8169_rx_quota(rx_left
, (u32
) dev
->quota
);
2263 while (rx_left
> 0) {
2264 unsigned int entry
= cur_rx
% NUM_RX_DESC
;
2265 struct RxDesc
*desc
= tp
->RxDescArray
+ entry
;
2269 status
= le32_to_cpu(desc
->opts1
);
2271 if (status
& DescOwn
)
2273 if (status
& RxRES
) {
2274 if (netif_msg_rx_err(tp
)) {
2276 "%s: Rx ERROR. status = %08x\n",
2279 tp
->stats
.rx_errors
++;
2280 if (status
& (RxRWT
| RxRUNT
))
2281 tp
->stats
.rx_length_errors
++;
2283 tp
->stats
.rx_crc_errors
++;
2284 rtl8169_mark_to_asic(desc
, tp
->rx_buf_sz
);
2286 struct sk_buff
*skb
= tp
->Rx_skbuff
[entry
];
2287 int pkt_size
= (status
& 0x00001FFF) - 4;
2288 void (*pci_action
)(struct pci_dev
*, dma_addr_t
,
2289 size_t, int) = pci_dma_sync_single_for_device
;
2292 * The driver does not support incoming fragmented
2293 * frames. They are seen as a symptom of over-mtu
2296 if (unlikely(rtl8169_fragmented_frame(status
))) {
2297 tp
->stats
.rx_dropped
++;
2298 tp
->stats
.rx_length_errors
++;
2299 rtl8169_mark_to_asic(desc
, tp
->rx_buf_sz
);
2303 rtl8169_rx_csum(skb
, desc
);
2305 pci_dma_sync_single_for_cpu(tp
->pci_dev
,
2306 le64_to_cpu(desc
->addr
), tp
->rx_buf_sz
,
2307 PCI_DMA_FROMDEVICE
);
2309 if (rtl8169_try_rx_copy(&skb
, pkt_size
, desc
,
2311 pci_action
= pci_unmap_single
;
2312 tp
->Rx_skbuff
[entry
] = NULL
;
2315 pci_action(tp
->pci_dev
, le64_to_cpu(desc
->addr
),
2316 tp
->rx_buf_sz
, PCI_DMA_FROMDEVICE
);
2319 skb_put(skb
, pkt_size
);
2320 skb
->protocol
= eth_type_trans(skb
, dev
);
2322 if (rtl8169_rx_vlan_skb(tp
, desc
, skb
) < 0)
2323 rtl8169_rx_skb(skb
);
2325 dev
->last_rx
= jiffies
;
2326 tp
->stats
.rx_bytes
+= pkt_size
;
2327 tp
->stats
.rx_packets
++;
2334 count
= cur_rx
- tp
->cur_rx
;
2335 tp
->cur_rx
= cur_rx
;
2337 delta
= rtl8169_rx_fill(tp
, dev
, tp
->dirty_rx
, tp
->cur_rx
);
2338 if (!delta
&& count
&& netif_msg_intr(tp
))
2339 printk(KERN_INFO
"%s: no Rx buffer allocated\n", dev
->name
);
2340 tp
->dirty_rx
+= delta
;
2343 * FIXME: until there is periodic timer to try and refill the ring,
2344 * a temporary shortage may definitely kill the Rx process.
2345 * - disable the asic to try and avoid an overflow and kick it again
2347 * - how do others driver handle this condition (Uh oh...).
2349 if ((tp
->dirty_rx
+ NUM_RX_DESC
== tp
->cur_rx
) && netif_msg_intr(tp
))
2350 printk(KERN_EMERG
"%s: Rx buffers exhausted\n", dev
->name
);
2355 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2357 rtl8169_interrupt(int irq
, void *dev_instance
, struct pt_regs
*regs
)
2359 struct net_device
*dev
= (struct net_device
*) dev_instance
;
2360 struct rtl8169_private
*tp
= netdev_priv(dev
);
2361 int boguscnt
= max_interrupt_work
;
2362 void __iomem
*ioaddr
= tp
->mmio_addr
;
2367 status
= RTL_R16(IntrStatus
);
2369 /* hotplug/major error/no more work/shared irq */
2370 if ((status
== 0xFFFF) || !status
)
2375 if (unlikely(!netif_running(dev
))) {
2376 rtl8169_asic_down(ioaddr
);
2380 status
&= tp
->intr_mask
;
2382 (status
& RxFIFOOver
) ? (status
| RxOverflow
) : status
);
2384 if (!(status
& rtl8169_intr_mask
))
2387 if (unlikely(status
& SYSErr
)) {
2388 rtl8169_pcierr_interrupt(dev
);
2392 if (status
& LinkChg
)
2393 rtl8169_check_link_status(dev
, tp
, ioaddr
);
2395 #ifdef CONFIG_R8169_NAPI
2396 RTL_W16(IntrMask
, rtl8169_intr_mask
& ~rtl8169_napi_event
);
2397 tp
->intr_mask
= ~rtl8169_napi_event
;
2399 if (likely(netif_rx_schedule_prep(dev
)))
2400 __netif_rx_schedule(dev
);
2401 else if (netif_msg_intr(tp
)) {
2402 printk(KERN_INFO
"%s: interrupt %04x taken in poll\n",
2408 if (status
& (RxOK
| RxOverflow
| RxFIFOOver
)) {
2409 rtl8169_rx_interrupt(dev
, tp
, ioaddr
);
2412 if (status
& (TxOK
| TxErr
))
2413 rtl8169_tx_interrupt(dev
, tp
, ioaddr
);
2417 } while (boguscnt
> 0);
2419 if (boguscnt
<= 0) {
2420 if (net_ratelimit() && netif_msg_intr(tp
)) {
2422 "%s: Too much work at interrupt!\n", dev
->name
);
2424 /* Clear all interrupt sources. */
2425 RTL_W16(IntrStatus
, 0xffff);
2428 return IRQ_RETVAL(handled
);
2431 #ifdef CONFIG_R8169_NAPI
2432 static int rtl8169_poll(struct net_device
*dev
, int *budget
)
2434 unsigned int work_done
, work_to_do
= min(*budget
, dev
->quota
);
2435 struct rtl8169_private
*tp
= netdev_priv(dev
);
2436 void __iomem
*ioaddr
= tp
->mmio_addr
;
2438 work_done
= rtl8169_rx_interrupt(dev
, tp
, ioaddr
);
2439 rtl8169_tx_interrupt(dev
, tp
, ioaddr
);
2441 *budget
-= work_done
;
2442 dev
->quota
-= work_done
;
2444 if (work_done
< work_to_do
) {
2445 netif_rx_complete(dev
);
2446 tp
->intr_mask
= 0xffff;
2448 * 20040426: the barrier is not strictly required but the
2449 * behavior of the irq handler could be less predictable
2450 * without it. Btw, the lack of flush for the posted pci
2451 * write is safe - FR
2454 RTL_W16(IntrMask
, rtl8169_intr_mask
);
2457 return (work_done
>= work_to_do
);
2461 static void rtl8169_down(struct net_device
*dev
)
2463 struct rtl8169_private
*tp
= netdev_priv(dev
);
2464 void __iomem
*ioaddr
= tp
->mmio_addr
;
2465 unsigned int poll_locked
= 0;
2467 rtl8169_delete_timer(dev
);
2469 netif_stop_queue(dev
);
2471 flush_scheduled_work();
2474 spin_lock_irq(&tp
->lock
);
2476 rtl8169_asic_down(ioaddr
);
2478 /* Update the error counts. */
2479 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
2480 RTL_W32(RxMissed
, 0);
2482 spin_unlock_irq(&tp
->lock
);
2484 synchronize_irq(dev
->irq
);
2487 netif_poll_disable(dev
);
2491 /* Give a racing hard_start_xmit a few cycles to complete. */
2492 synchronize_sched(); /* FIXME: should this be synchronize_irq()? */
2495 * And now for the 50k$ question: are IRQ disabled or not ?
2497 * Two paths lead here:
2499 * -> netif_running() is available to sync the current code and the
2500 * IRQ handler. See rtl8169_interrupt for details.
2501 * 2) dev->change_mtu
2502 * -> rtl8169_poll can not be issued again and re-enable the
2503 * interruptions. Let's simply issue the IRQ down sequence again.
2505 if (RTL_R16(IntrMask
))
2508 rtl8169_tx_clear(tp
);
2510 rtl8169_rx_clear(tp
);
2513 static int rtl8169_close(struct net_device
*dev
)
2515 struct rtl8169_private
*tp
= netdev_priv(dev
);
2516 struct pci_dev
*pdev
= tp
->pci_dev
;
2520 free_irq(dev
->irq
, dev
);
2522 netif_poll_enable(dev
);
2524 pci_free_consistent(pdev
, R8169_RX_RING_BYTES
, tp
->RxDescArray
,
2526 pci_free_consistent(pdev
, R8169_TX_RING_BYTES
, tp
->TxDescArray
,
2528 tp
->TxDescArray
= NULL
;
2529 tp
->RxDescArray
= NULL
;
2535 rtl8169_set_rx_mode(struct net_device
*dev
)
2537 struct rtl8169_private
*tp
= netdev_priv(dev
);
2538 void __iomem
*ioaddr
= tp
->mmio_addr
;
2539 unsigned long flags
;
2540 u32 mc_filter
[2]; /* Multicast hash filter */
2544 if (dev
->flags
& IFF_PROMISC
) {
2545 /* Unconditionally log net taps. */
2546 if (netif_msg_link(tp
)) {
2547 printk(KERN_NOTICE
"%s: Promiscuous mode enabled.\n",
2551 AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
|
2553 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
2554 } else if ((dev
->mc_count
> multicast_filter_limit
)
2555 || (dev
->flags
& IFF_ALLMULTI
)) {
2556 /* Too many to filter perfectly -- accept all multicasts. */
2557 rx_mode
= AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
;
2558 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
2560 struct dev_mc_list
*mclist
;
2561 rx_mode
= AcceptBroadcast
| AcceptMyPhys
;
2562 mc_filter
[1] = mc_filter
[0] = 0;
2563 for (i
= 0, mclist
= dev
->mc_list
; mclist
&& i
< dev
->mc_count
;
2564 i
++, mclist
= mclist
->next
) {
2565 int bit_nr
= ether_crc(ETH_ALEN
, mclist
->dmi_addr
) >> 26;
2566 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
2567 rx_mode
|= AcceptMulticast
;
2571 spin_lock_irqsave(&tp
->lock
, flags
);
2573 tmp
= rtl8169_rx_config
| rx_mode
|
2574 (RTL_R32(RxConfig
) & rtl_chip_info
[tp
->chipset
].RxConfigMask
);
2576 RTL_W32(RxConfig
, tmp
);
2577 RTL_W32(MAR0
+ 0, mc_filter
[0]);
2578 RTL_W32(MAR0
+ 4, mc_filter
[1]);
2580 spin_unlock_irqrestore(&tp
->lock
, flags
);
2584 * rtl8169_get_stats - Get rtl8169 read/write statistics
2585 * @dev: The Ethernet Device to get statistics for
2587 * Get TX/RX statistics for rtl8169
2589 static struct net_device_stats
*rtl8169_get_stats(struct net_device
*dev
)
2591 struct rtl8169_private
*tp
= netdev_priv(dev
);
2592 void __iomem
*ioaddr
= tp
->mmio_addr
;
2593 unsigned long flags
;
2595 if (netif_running(dev
)) {
2596 spin_lock_irqsave(&tp
->lock
, flags
);
2597 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
2598 RTL_W32(RxMissed
, 0);
2599 spin_unlock_irqrestore(&tp
->lock
, flags
);
2605 static struct pci_driver rtl8169_pci_driver
= {
2607 .id_table
= rtl8169_pci_tbl
,
2608 .probe
= rtl8169_init_one
,
2609 .remove
= __devexit_p(rtl8169_remove_one
),
2611 .suspend
= rtl8169_suspend
,
2612 .resume
= rtl8169_resume
,
2617 rtl8169_init_module(void)
2619 return pci_module_init(&rtl8169_pci_driver
);
2623 rtl8169_cleanup_module(void)
2625 pci_unregister_driver(&rtl8169_pci_driver
);
2628 module_init(rtl8169_init_module
);
2629 module_exit(rtl8169_cleanup_module
);