1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
33 #define EFX_MAX_MTU (9 * 1024)
35 /* RX slow fill workqueue. If memory allocation fails in the fast path,
36 * a work item is pushed onto this work queue to retry the allocation later,
37 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
38 * workqueue, there is nothing to be gained in making it per NIC
40 static struct workqueue_struct
*refill_workqueue
;
42 /**************************************************************************
46 *************************************************************************/
49 * Enable large receive offload (LRO) aka soft segment reassembly (SSR)
51 * This sets the default for new devices. It can be controlled later
54 static int lro
= true;
55 module_param(lro
, int, 0644);
56 MODULE_PARM_DESC(lro
, "Large receive offload acceleration");
59 * Use separate channels for TX and RX events
61 * Set this to 1 to use separate channels for TX and RX. It allows us to
62 * apply a higher level of interrupt moderation to TX events.
64 * This is forced to 0 for MSI interrupt mode as the interrupt vector
67 static unsigned int separate_tx_and_rx_channels
= true;
69 /* This is the weight assigned to each of the (per-channel) virtual
72 static int napi_weight
= 64;
74 /* This is the time (in jiffies) between invocations of the hardware
75 * monitor, which checks for known hardware bugs and resets the
76 * hardware and driver as necessary.
78 unsigned int efx_monitor_interval
= 1 * HZ
;
80 /* This controls whether or not the hardware monitor will trigger a
81 * reset when it detects an error condition.
83 static unsigned int monitor_reset
= true;
85 /* This controls whether or not the driver will initialise devices
86 * with invalid MAC addresses stored in the EEPROM or flash. If true,
87 * such devices will be initialised with a random locally-generated
88 * MAC address. This allows for loading the sfc_mtd driver to
89 * reprogram the flash, even if the flash contents (including the MAC
90 * address) have previously been erased.
92 static unsigned int allow_bad_hwaddr
;
94 /* Initial interrupt moderation settings. They can be modified after
95 * module load with ethtool.
97 * The default for RX should strike a balance between increasing the
98 * round-trip latency and reducing overhead.
100 static unsigned int rx_irq_mod_usec
= 60;
102 /* Initial interrupt moderation settings. They can be modified after
103 * module load with ethtool.
105 * This default is chosen to ensure that a 10G link does not go idle
106 * while a TX queue is stopped after it has become full. A queue is
107 * restarted when it drops below half full. The time this takes (assuming
108 * worst case 3 descriptors per packet and 1024 descriptors) is
109 * 512 / 3 * 1.2 = 205 usec.
111 static unsigned int tx_irq_mod_usec
= 150;
113 /* This is the first interrupt mode to try out of:
118 static unsigned int interrupt_mode
;
120 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
121 * i.e. the number of CPUs among which we may distribute simultaneous
122 * interrupt handling.
124 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
125 * The default (0) means to assign an interrupt to each package (level II cache)
127 static unsigned int rss_cpus
;
128 module_param(rss_cpus
, uint
, 0444);
129 MODULE_PARM_DESC(rss_cpus
, "Number of CPUs to use for Receive-Side Scaling");
131 /**************************************************************************
133 * Utility functions and prototypes
135 *************************************************************************/
136 static void efx_remove_channel(struct efx_channel
*channel
);
137 static void efx_remove_port(struct efx_nic
*efx
);
138 static void efx_fini_napi(struct efx_nic
*efx
);
139 static void efx_fini_channels(struct efx_nic
*efx
);
141 #define EFX_ASSERT_RESET_SERIALISED(efx) \
143 if (efx->state == STATE_RUNNING) \
147 /**************************************************************************
149 * Event queue processing
151 *************************************************************************/
153 /* Process channel's event queue
155 * This function is responsible for processing the event queue of a
156 * single channel. The caller must guarantee that this function will
157 * never be concurrently called more than once on the same channel,
158 * though different channels may be being processed concurrently.
160 static int efx_process_channel(struct efx_channel
*channel
, int rx_quota
)
162 struct efx_nic
*efx
= channel
->efx
;
165 if (unlikely(efx
->reset_pending
!= RESET_TYPE_NONE
||
169 rx_packets
= falcon_process_eventq(channel
, rx_quota
);
173 /* Deliver last RX packet. */
174 if (channel
->rx_pkt
) {
175 __efx_rx_packet(channel
, channel
->rx_pkt
,
176 channel
->rx_pkt_csummed
);
177 channel
->rx_pkt
= NULL
;
180 efx_flush_lro(channel
);
181 efx_rx_strategy(channel
);
183 efx_fast_push_rx_descriptors(&efx
->rx_queue
[channel
->channel
]);
188 /* Mark channel as finished processing
190 * Note that since we will not receive further interrupts for this
191 * channel before we finish processing and call the eventq_read_ack()
192 * method, there is no need to use the interrupt hold-off timers.
194 static inline void efx_channel_processed(struct efx_channel
*channel
)
196 /* The interrupt handler for this channel may set work_pending
197 * as soon as we acknowledge the events we've seen. Make sure
198 * it's cleared before then. */
199 channel
->work_pending
= false;
202 falcon_eventq_read_ack(channel
);
207 * NAPI guarantees serialisation of polls of the same device, which
208 * provides the guarantee required by efx_process_channel().
210 static int efx_poll(struct napi_struct
*napi
, int budget
)
212 struct efx_channel
*channel
=
213 container_of(napi
, struct efx_channel
, napi_str
);
214 struct net_device
*napi_dev
= channel
->napi_dev
;
217 EFX_TRACE(channel
->efx
, "channel %d NAPI poll executing on CPU %d\n",
218 channel
->channel
, raw_smp_processor_id());
220 rx_packets
= efx_process_channel(channel
, budget
);
222 if (rx_packets
< budget
) {
223 /* There is no race here; although napi_disable() will
224 * only wait for netif_rx_complete(), this isn't a problem
225 * since efx_channel_processed() will have no effect if
226 * interrupts have already been disabled.
228 netif_rx_complete(napi_dev
, napi
);
229 efx_channel_processed(channel
);
235 /* Process the eventq of the specified channel immediately on this CPU
237 * Disable hardware generated interrupts, wait for any existing
238 * processing to finish, then directly poll (and ack ) the eventq.
239 * Finally reenable NAPI and interrupts.
241 * Since we are touching interrupts the caller should hold the suspend lock
243 void efx_process_channel_now(struct efx_channel
*channel
)
245 struct efx_nic
*efx
= channel
->efx
;
247 BUG_ON(!channel
->used_flags
);
248 BUG_ON(!channel
->enabled
);
250 /* Disable interrupts and wait for ISRs to complete */
251 falcon_disable_interrupts(efx
);
253 synchronize_irq(efx
->legacy_irq
);
255 synchronize_irq(channel
->irq
);
257 /* Wait for any NAPI processing to complete */
258 napi_disable(&channel
->napi_str
);
260 /* Poll the channel */
261 efx_process_channel(channel
, efx
->type
->evq_size
);
263 /* Ack the eventq. This may cause an interrupt to be generated
264 * when they are reenabled */
265 efx_channel_processed(channel
);
267 napi_enable(&channel
->napi_str
);
268 falcon_enable_interrupts(efx
);
271 /* Create event queue
272 * Event queue memory allocations are done only once. If the channel
273 * is reset, the memory buffer will be reused; this guards against
274 * errors during channel reset and also simplifies interrupt handling.
276 static int efx_probe_eventq(struct efx_channel
*channel
)
278 EFX_LOG(channel
->efx
, "chan %d create event queue\n", channel
->channel
);
280 return falcon_probe_eventq(channel
);
283 /* Prepare channel's event queue */
284 static void efx_init_eventq(struct efx_channel
*channel
)
286 EFX_LOG(channel
->efx
, "chan %d init event queue\n", channel
->channel
);
288 channel
->eventq_read_ptr
= 0;
290 falcon_init_eventq(channel
);
293 static void efx_fini_eventq(struct efx_channel
*channel
)
295 EFX_LOG(channel
->efx
, "chan %d fini event queue\n", channel
->channel
);
297 falcon_fini_eventq(channel
);
300 static void efx_remove_eventq(struct efx_channel
*channel
)
302 EFX_LOG(channel
->efx
, "chan %d remove event queue\n", channel
->channel
);
304 falcon_remove_eventq(channel
);
307 /**************************************************************************
311 *************************************************************************/
313 static int efx_probe_channel(struct efx_channel
*channel
)
315 struct efx_tx_queue
*tx_queue
;
316 struct efx_rx_queue
*rx_queue
;
319 EFX_LOG(channel
->efx
, "creating channel %d\n", channel
->channel
);
321 rc
= efx_probe_eventq(channel
);
325 efx_for_each_channel_tx_queue(tx_queue
, channel
) {
326 rc
= efx_probe_tx_queue(tx_queue
);
331 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
332 rc
= efx_probe_rx_queue(rx_queue
);
337 channel
->n_rx_frm_trunc
= 0;
342 efx_for_each_channel_rx_queue(rx_queue
, channel
)
343 efx_remove_rx_queue(rx_queue
);
345 efx_for_each_channel_tx_queue(tx_queue
, channel
)
346 efx_remove_tx_queue(tx_queue
);
352 /* Channels are shutdown and reinitialised whilst the NIC is running
353 * to propagate configuration changes (mtu, checksum offload), or
354 * to clear hardware error conditions
356 static void efx_init_channels(struct efx_nic
*efx
)
358 struct efx_tx_queue
*tx_queue
;
359 struct efx_rx_queue
*rx_queue
;
360 struct efx_channel
*channel
;
362 /* Calculate the rx buffer allocation parameters required to
363 * support the current MTU, including padding for header
364 * alignment and overruns.
366 efx
->rx_buffer_len
= (max(EFX_PAGE_IP_ALIGN
, NET_IP_ALIGN
) +
367 EFX_MAX_FRAME_LEN(efx
->net_dev
->mtu
) +
368 efx
->type
->rx_buffer_padding
);
369 efx
->rx_buffer_order
= get_order(efx
->rx_buffer_len
);
371 /* Initialise the channels */
372 efx_for_each_channel(channel
, efx
) {
373 EFX_LOG(channel
->efx
, "init chan %d\n", channel
->channel
);
375 efx_init_eventq(channel
);
377 efx_for_each_channel_tx_queue(tx_queue
, channel
)
378 efx_init_tx_queue(tx_queue
);
380 /* The rx buffer allocation strategy is MTU dependent */
381 efx_rx_strategy(channel
);
383 efx_for_each_channel_rx_queue(rx_queue
, channel
)
384 efx_init_rx_queue(rx_queue
);
386 WARN_ON(channel
->rx_pkt
!= NULL
);
387 efx_rx_strategy(channel
);
391 /* This enables event queue processing and packet transmission.
393 * Note that this function is not allowed to fail, since that would
394 * introduce too much complexity into the suspend/resume path.
396 static void efx_start_channel(struct efx_channel
*channel
)
398 struct efx_rx_queue
*rx_queue
;
400 EFX_LOG(channel
->efx
, "starting chan %d\n", channel
->channel
);
402 if (!(channel
->efx
->net_dev
->flags
& IFF_UP
))
403 netif_napi_add(channel
->napi_dev
, &channel
->napi_str
,
404 efx_poll
, napi_weight
);
406 /* The interrupt handler for this channel may set work_pending
407 * as soon as we enable it. Make sure it's cleared before
408 * then. Similarly, make sure it sees the enabled flag set. */
409 channel
->work_pending
= false;
410 channel
->enabled
= true;
413 napi_enable(&channel
->napi_str
);
415 /* Load up RX descriptors */
416 efx_for_each_channel_rx_queue(rx_queue
, channel
)
417 efx_fast_push_rx_descriptors(rx_queue
);
420 /* This disables event queue processing and packet transmission.
421 * This function does not guarantee that all queue processing
422 * (e.g. RX refill) is complete.
424 static void efx_stop_channel(struct efx_channel
*channel
)
426 struct efx_rx_queue
*rx_queue
;
428 if (!channel
->enabled
)
431 EFX_LOG(channel
->efx
, "stop chan %d\n", channel
->channel
);
433 channel
->enabled
= false;
434 napi_disable(&channel
->napi_str
);
436 /* Ensure that any worker threads have exited or will be no-ops */
437 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
438 spin_lock_bh(&rx_queue
->add_lock
);
439 spin_unlock_bh(&rx_queue
->add_lock
);
443 static void efx_fini_channels(struct efx_nic
*efx
)
445 struct efx_channel
*channel
;
446 struct efx_tx_queue
*tx_queue
;
447 struct efx_rx_queue
*rx_queue
;
450 EFX_ASSERT_RESET_SERIALISED(efx
);
451 BUG_ON(efx
->port_enabled
);
453 rc
= falcon_flush_queues(efx
);
455 EFX_ERR(efx
, "failed to flush queues\n");
457 EFX_LOG(efx
, "successfully flushed all queues\n");
459 efx_for_each_channel(channel
, efx
) {
460 EFX_LOG(channel
->efx
, "shut down chan %d\n", channel
->channel
);
462 efx_for_each_channel_rx_queue(rx_queue
, channel
)
463 efx_fini_rx_queue(rx_queue
);
464 efx_for_each_channel_tx_queue(tx_queue
, channel
)
465 efx_fini_tx_queue(tx_queue
);
466 efx_fini_eventq(channel
);
470 static void efx_remove_channel(struct efx_channel
*channel
)
472 struct efx_tx_queue
*tx_queue
;
473 struct efx_rx_queue
*rx_queue
;
475 EFX_LOG(channel
->efx
, "destroy chan %d\n", channel
->channel
);
477 efx_for_each_channel_rx_queue(rx_queue
, channel
)
478 efx_remove_rx_queue(rx_queue
);
479 efx_for_each_channel_tx_queue(tx_queue
, channel
)
480 efx_remove_tx_queue(tx_queue
);
481 efx_remove_eventq(channel
);
483 channel
->used_flags
= 0;
486 void efx_schedule_slow_fill(struct efx_rx_queue
*rx_queue
, int delay
)
488 queue_delayed_work(refill_workqueue
, &rx_queue
->work
, delay
);
491 /**************************************************************************
495 **************************************************************************/
497 /* This ensures that the kernel is kept informed (via
498 * netif_carrier_on/off) of the link status, and also maintains the
499 * link status's stop on the port's TX queue.
501 static void efx_link_status_changed(struct efx_nic
*efx
)
503 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
504 * that no events are triggered between unregister_netdev() and the
505 * driver unloading. A more general condition is that NETDEV_CHANGE
506 * can only be generated between NETDEV_UP and NETDEV_DOWN */
507 if (!netif_running(efx
->net_dev
))
510 if (efx
->port_inhibited
) {
511 netif_carrier_off(efx
->net_dev
);
515 if (efx
->link_up
!= netif_carrier_ok(efx
->net_dev
)) {
516 efx
->n_link_state_changes
++;
519 netif_carrier_on(efx
->net_dev
);
521 netif_carrier_off(efx
->net_dev
);
524 /* Status message for kernel log */
526 struct mii_if_info
*gmii
= &efx
->mii
;
528 /* NONE here means direct XAUI from the controller, with no
529 * MDIO-attached device we can query. */
530 if (efx
->phy_type
!= PHY_TYPE_NONE
) {
531 adv
= gmii_advertised(gmii
);
532 lpa
= gmii_lpa(gmii
);
534 lpa
= GM_LPA_10000
| LPA_DUPLEX
;
537 EFX_INFO(efx
, "link up at %dMbps %s-duplex "
538 "(adv %04x lpa %04x) (MTU %d)%s\n",
539 (efx
->link_options
& GM_LPA_10000
? 10000 :
540 (efx
->link_options
& GM_LPA_1000
? 1000 :
541 (efx
->link_options
& GM_LPA_100
? 100 :
543 (efx
->link_options
& GM_LPA_DUPLEX
?
547 (efx
->promiscuous
? " [PROMISC]" : ""));
549 EFX_INFO(efx
, "link down\n");
554 /* This call reinitialises the MAC to pick up new PHY settings. The
555 * caller must hold the mac_lock */
556 void __efx_reconfigure_port(struct efx_nic
*efx
)
558 WARN_ON(!mutex_is_locked(&efx
->mac_lock
));
560 EFX_LOG(efx
, "reconfiguring MAC from PHY settings on CPU %d\n",
561 raw_smp_processor_id());
563 /* Serialise the promiscuous flag with efx_set_multicast_list. */
564 if (efx_dev_registered(efx
)) {
565 netif_addr_lock_bh(efx
->net_dev
);
566 netif_addr_unlock_bh(efx
->net_dev
);
569 falcon_reconfigure_xmac(efx
);
571 /* Inform kernel of loss/gain of carrier */
572 efx_link_status_changed(efx
);
575 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
577 void efx_reconfigure_port(struct efx_nic
*efx
)
579 EFX_ASSERT_RESET_SERIALISED(efx
);
581 mutex_lock(&efx
->mac_lock
);
582 __efx_reconfigure_port(efx
);
583 mutex_unlock(&efx
->mac_lock
);
586 /* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
587 * we don't efx_reconfigure_port() if the port is disabled. Care is taken
588 * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
589 static void efx_reconfigure_work(struct work_struct
*data
)
591 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
594 mutex_lock(&efx
->mac_lock
);
595 if (efx
->port_enabled
)
596 __efx_reconfigure_port(efx
);
597 mutex_unlock(&efx
->mac_lock
);
600 static int efx_probe_port(struct efx_nic
*efx
)
604 EFX_LOG(efx
, "create port\n");
606 /* Connect up MAC/PHY operations table and read MAC address */
607 rc
= falcon_probe_port(efx
);
611 /* Sanity check MAC address */
612 if (is_valid_ether_addr(efx
->mac_address
)) {
613 memcpy(efx
->net_dev
->dev_addr
, efx
->mac_address
, ETH_ALEN
);
615 EFX_ERR(efx
, "invalid MAC address %pM\n",
617 if (!allow_bad_hwaddr
) {
621 random_ether_addr(efx
->net_dev
->dev_addr
);
622 EFX_INFO(efx
, "using locally-generated MAC %pM\n",
623 efx
->net_dev
->dev_addr
);
629 efx_remove_port(efx
);
633 static int efx_init_port(struct efx_nic
*efx
)
637 EFX_LOG(efx
, "init port\n");
639 /* Initialise the MAC and PHY */
640 rc
= falcon_init_xmac(efx
);
644 efx
->port_initialized
= true;
645 efx
->stats_enabled
= true;
647 /* Reconfigure port to program MAC registers */
648 falcon_reconfigure_xmac(efx
);
653 /* Allow efx_reconfigure_port() to be scheduled, and close the window
654 * between efx_stop_port and efx_flush_all whereby a previously scheduled
655 * efx_reconfigure_port() may have been cancelled */
656 static void efx_start_port(struct efx_nic
*efx
)
658 EFX_LOG(efx
, "start port\n");
659 BUG_ON(efx
->port_enabled
);
661 mutex_lock(&efx
->mac_lock
);
662 efx
->port_enabled
= true;
663 __efx_reconfigure_port(efx
);
664 mutex_unlock(&efx
->mac_lock
);
667 /* Prevent efx_reconfigure_work and efx_monitor() from executing, and
668 * efx_set_multicast_list() from scheduling efx_reconfigure_work.
669 * efx_reconfigure_work can still be scheduled via NAPI processing
670 * until efx_flush_all() is called */
671 static void efx_stop_port(struct efx_nic
*efx
)
673 EFX_LOG(efx
, "stop port\n");
675 mutex_lock(&efx
->mac_lock
);
676 efx
->port_enabled
= false;
677 mutex_unlock(&efx
->mac_lock
);
679 /* Serialise against efx_set_multicast_list() */
680 if (efx_dev_registered(efx
)) {
681 netif_addr_lock_bh(efx
->net_dev
);
682 netif_addr_unlock_bh(efx
->net_dev
);
686 static void efx_fini_port(struct efx_nic
*efx
)
688 EFX_LOG(efx
, "shut down port\n");
690 if (!efx
->port_initialized
)
693 falcon_fini_xmac(efx
);
694 efx
->port_initialized
= false;
696 efx
->link_up
= false;
697 efx_link_status_changed(efx
);
700 static void efx_remove_port(struct efx_nic
*efx
)
702 EFX_LOG(efx
, "destroying port\n");
704 falcon_remove_port(efx
);
707 /**************************************************************************
711 **************************************************************************/
713 /* This configures the PCI device to enable I/O and DMA. */
714 static int efx_init_io(struct efx_nic
*efx
)
716 struct pci_dev
*pci_dev
= efx
->pci_dev
;
717 dma_addr_t dma_mask
= efx
->type
->max_dma_mask
;
720 EFX_LOG(efx
, "initialising I/O\n");
722 rc
= pci_enable_device(pci_dev
);
724 EFX_ERR(efx
, "failed to enable PCI device\n");
728 pci_set_master(pci_dev
);
730 /* Set the PCI DMA mask. Try all possibilities from our
731 * genuine mask down to 32 bits, because some architectures
732 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
733 * masks event though they reject 46 bit masks.
735 while (dma_mask
> 0x7fffffffUL
) {
736 if (pci_dma_supported(pci_dev
, dma_mask
) &&
737 ((rc
= pci_set_dma_mask(pci_dev
, dma_mask
)) == 0))
742 EFX_ERR(efx
, "could not find a suitable DMA mask\n");
745 EFX_LOG(efx
, "using DMA mask %llx\n", (unsigned long long) dma_mask
);
746 rc
= pci_set_consistent_dma_mask(pci_dev
, dma_mask
);
748 /* pci_set_consistent_dma_mask() is not *allowed* to
749 * fail with a mask that pci_set_dma_mask() accepted,
750 * but just in case...
752 EFX_ERR(efx
, "failed to set consistent DMA mask\n");
756 efx
->membase_phys
= pci_resource_start(efx
->pci_dev
,
758 rc
= pci_request_region(pci_dev
, efx
->type
->mem_bar
, "sfc");
760 EFX_ERR(efx
, "request for memory BAR failed\n");
764 efx
->membase
= ioremap_nocache(efx
->membase_phys
,
765 efx
->type
->mem_map_size
);
767 EFX_ERR(efx
, "could not map memory BAR %d at %llx+%x\n",
769 (unsigned long long)efx
->membase_phys
,
770 efx
->type
->mem_map_size
);
774 EFX_LOG(efx
, "memory BAR %u at %llx+%x (virtual %p)\n",
775 efx
->type
->mem_bar
, (unsigned long long)efx
->membase_phys
,
776 efx
->type
->mem_map_size
, efx
->membase
);
781 pci_release_region(efx
->pci_dev
, efx
->type
->mem_bar
);
783 efx
->membase_phys
= 0;
785 pci_disable_device(efx
->pci_dev
);
790 static void efx_fini_io(struct efx_nic
*efx
)
792 EFX_LOG(efx
, "shutting down I/O\n");
795 iounmap(efx
->membase
);
799 if (efx
->membase_phys
) {
800 pci_release_region(efx
->pci_dev
, efx
->type
->mem_bar
);
801 efx
->membase_phys
= 0;
804 pci_disable_device(efx
->pci_dev
);
807 /* Get number of RX queues wanted. Return number of online CPU
808 * packages in the expectation that an IRQ balancer will spread
809 * interrupts across them. */
810 static int efx_wanted_rx_queues(void)
816 cpus_clear(core_mask
);
818 for_each_online_cpu(cpu
) {
819 if (!cpu_isset(cpu
, core_mask
)) {
821 cpus_or(core_mask
, core_mask
,
822 topology_core_siblings(cpu
));
829 /* Probe the number and type of interrupts we are able to obtain, and
830 * the resulting numbers of channels and RX queues.
832 static void efx_probe_interrupts(struct efx_nic
*efx
)
835 min_t(int, efx
->type
->phys_addr_channels
, EFX_MAX_CHANNELS
);
838 if (efx
->interrupt_mode
== EFX_INT_MODE_MSIX
) {
839 struct msix_entry xentries
[EFX_MAX_CHANNELS
];
842 /* We want one RX queue and interrupt per CPU package
843 * (or as specified by the rss_cpus module parameter).
844 * We will need one channel per interrupt.
846 wanted_ints
= rss_cpus
? rss_cpus
: efx_wanted_rx_queues();
847 efx
->n_rx_queues
= min(wanted_ints
, max_channels
);
849 for (i
= 0; i
< efx
->n_rx_queues
; i
++)
850 xentries
[i
].entry
= i
;
851 rc
= pci_enable_msix(efx
->pci_dev
, xentries
, efx
->n_rx_queues
);
853 EFX_BUG_ON_PARANOID(rc
>= efx
->n_rx_queues
);
854 efx
->n_rx_queues
= rc
;
855 rc
= pci_enable_msix(efx
->pci_dev
, xentries
,
860 for (i
= 0; i
< efx
->n_rx_queues
; i
++)
861 efx
->channel
[i
].irq
= xentries
[i
].vector
;
863 /* Fall back to single channel MSI */
864 efx
->interrupt_mode
= EFX_INT_MODE_MSI
;
865 EFX_ERR(efx
, "could not enable MSI-X\n");
869 /* Try single interrupt MSI */
870 if (efx
->interrupt_mode
== EFX_INT_MODE_MSI
) {
871 efx
->n_rx_queues
= 1;
872 rc
= pci_enable_msi(efx
->pci_dev
);
874 efx
->channel
[0].irq
= efx
->pci_dev
->irq
;
876 EFX_ERR(efx
, "could not enable MSI\n");
877 efx
->interrupt_mode
= EFX_INT_MODE_LEGACY
;
881 /* Assume legacy interrupts */
882 if (efx
->interrupt_mode
== EFX_INT_MODE_LEGACY
) {
883 efx
->n_rx_queues
= 1;
884 efx
->legacy_irq
= efx
->pci_dev
->irq
;
888 static void efx_remove_interrupts(struct efx_nic
*efx
)
890 struct efx_channel
*channel
;
892 /* Remove MSI/MSI-X interrupts */
893 efx_for_each_channel(channel
, efx
)
895 pci_disable_msi(efx
->pci_dev
);
896 pci_disable_msix(efx
->pci_dev
);
898 /* Remove legacy interrupt */
902 static void efx_set_channels(struct efx_nic
*efx
)
904 struct efx_tx_queue
*tx_queue
;
905 struct efx_rx_queue
*rx_queue
;
907 efx_for_each_tx_queue(tx_queue
, efx
) {
908 if (!EFX_INT_MODE_USE_MSI(efx
) && separate_tx_and_rx_channels
)
909 tx_queue
->channel
= &efx
->channel
[1];
911 tx_queue
->channel
= &efx
->channel
[0];
912 tx_queue
->channel
->used_flags
|= EFX_USED_BY_TX
;
915 efx_for_each_rx_queue(rx_queue
, efx
) {
916 rx_queue
->channel
= &efx
->channel
[rx_queue
->queue
];
917 rx_queue
->channel
->used_flags
|= EFX_USED_BY_RX
;
921 static int efx_probe_nic(struct efx_nic
*efx
)
925 EFX_LOG(efx
, "creating NIC\n");
927 /* Carry out hardware-type specific initialisation */
928 rc
= falcon_probe_nic(efx
);
932 /* Determine the number of channels and RX queues by trying to hook
933 * in MSI-X interrupts. */
934 efx_probe_interrupts(efx
);
936 efx_set_channels(efx
);
938 /* Initialise the interrupt moderation settings */
939 efx_init_irq_moderation(efx
, tx_irq_mod_usec
, rx_irq_mod_usec
);
944 static void efx_remove_nic(struct efx_nic
*efx
)
946 EFX_LOG(efx
, "destroying NIC\n");
948 efx_remove_interrupts(efx
);
949 falcon_remove_nic(efx
);
952 /**************************************************************************
954 * NIC startup/shutdown
956 *************************************************************************/
958 static int efx_probe_all(struct efx_nic
*efx
)
960 struct efx_channel
*channel
;
964 rc
= efx_probe_nic(efx
);
966 EFX_ERR(efx
, "failed to create NIC\n");
971 rc
= efx_probe_port(efx
);
973 EFX_ERR(efx
, "failed to create port\n");
977 /* Create channels */
978 efx_for_each_channel(channel
, efx
) {
979 rc
= efx_probe_channel(channel
);
981 EFX_ERR(efx
, "failed to create channel %d\n",
990 efx_for_each_channel(channel
, efx
)
991 efx_remove_channel(channel
);
992 efx_remove_port(efx
);
999 /* Called after previous invocation(s) of efx_stop_all, restarts the
1000 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1001 * and ensures that the port is scheduled to be reconfigured.
1002 * This function is safe to call multiple times when the NIC is in any
1004 static void efx_start_all(struct efx_nic
*efx
)
1006 struct efx_channel
*channel
;
1008 EFX_ASSERT_RESET_SERIALISED(efx
);
1010 /* Check that it is appropriate to restart the interface. All
1011 * of these flags are safe to read under just the rtnl lock */
1012 if (efx
->port_enabled
)
1014 if ((efx
->state
!= STATE_RUNNING
) && (efx
->state
!= STATE_INIT
))
1016 if (efx_dev_registered(efx
) && !netif_running(efx
->net_dev
))
1019 /* Mark the port as enabled so port reconfigurations can start, then
1020 * restart the transmit interface early so the watchdog timer stops */
1021 efx_start_port(efx
);
1022 if (efx_dev_registered(efx
))
1023 efx_wake_queue(efx
);
1025 efx_for_each_channel(channel
, efx
)
1026 efx_start_channel(channel
);
1028 falcon_enable_interrupts(efx
);
1030 /* Start hardware monitor if we're in RUNNING */
1031 if (efx
->state
== STATE_RUNNING
)
1032 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1033 efx_monitor_interval
);
1036 /* Flush all delayed work. Should only be called when no more delayed work
1037 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1038 * since we're holding the rtnl_lock at this point. */
1039 static void efx_flush_all(struct efx_nic
*efx
)
1041 struct efx_rx_queue
*rx_queue
;
1043 /* Make sure the hardware monitor is stopped */
1044 cancel_delayed_work_sync(&efx
->monitor_work
);
1046 /* Ensure that all RX slow refills are complete. */
1047 efx_for_each_rx_queue(rx_queue
, efx
)
1048 cancel_delayed_work_sync(&rx_queue
->work
);
1050 /* Stop scheduled port reconfigurations */
1051 cancel_work_sync(&efx
->reconfigure_work
);
1055 /* Quiesce hardware and software without bringing the link down.
1056 * Safe to call multiple times, when the nic and interface is in any
1057 * state. The caller is guaranteed to subsequently be in a position
1058 * to modify any hardware and software state they see fit without
1060 static void efx_stop_all(struct efx_nic
*efx
)
1062 struct efx_channel
*channel
;
1064 EFX_ASSERT_RESET_SERIALISED(efx
);
1066 /* port_enabled can be read safely under the rtnl lock */
1067 if (!efx
->port_enabled
)
1070 /* Disable interrupts and wait for ISR to complete */
1071 falcon_disable_interrupts(efx
);
1072 if (efx
->legacy_irq
)
1073 synchronize_irq(efx
->legacy_irq
);
1074 efx_for_each_channel(channel
, efx
) {
1076 synchronize_irq(channel
->irq
);
1079 /* Stop all NAPI processing and synchronous rx refills */
1080 efx_for_each_channel(channel
, efx
)
1081 efx_stop_channel(channel
);
1083 /* Stop all asynchronous port reconfigurations. Since all
1084 * event processing has already been stopped, there is no
1085 * window to loose phy events */
1088 /* Flush reconfigure_work, refill_workqueue, monitor_work */
1091 /* Isolate the MAC from the TX and RX engines, so that queue
1092 * flushes will complete in a timely fashion. */
1093 falcon_drain_tx_fifo(efx
);
1095 /* Stop the kernel transmit interface late, so the watchdog
1096 * timer isn't ticking over the flush */
1097 if (efx_dev_registered(efx
)) {
1098 efx_stop_queue(efx
);
1099 netif_tx_lock_bh(efx
->net_dev
);
1100 netif_tx_unlock_bh(efx
->net_dev
);
1104 static void efx_remove_all(struct efx_nic
*efx
)
1106 struct efx_channel
*channel
;
1108 efx_for_each_channel(channel
, efx
)
1109 efx_remove_channel(channel
);
1110 efx_remove_port(efx
);
1111 efx_remove_nic(efx
);
1114 /* A convinience function to safely flush all the queues */
1115 void efx_flush_queues(struct efx_nic
*efx
)
1117 EFX_ASSERT_RESET_SERIALISED(efx
);
1121 efx_fini_channels(efx
);
1122 efx_init_channels(efx
);
1127 /**************************************************************************
1129 * Interrupt moderation
1131 **************************************************************************/
1133 /* Set interrupt moderation parameters */
1134 void efx_init_irq_moderation(struct efx_nic
*efx
, int tx_usecs
, int rx_usecs
)
1136 struct efx_tx_queue
*tx_queue
;
1137 struct efx_rx_queue
*rx_queue
;
1139 EFX_ASSERT_RESET_SERIALISED(efx
);
1141 efx_for_each_tx_queue(tx_queue
, efx
)
1142 tx_queue
->channel
->irq_moderation
= tx_usecs
;
1144 efx_for_each_rx_queue(rx_queue
, efx
)
1145 rx_queue
->channel
->irq_moderation
= rx_usecs
;
1148 /**************************************************************************
1152 **************************************************************************/
1154 /* Run periodically off the general workqueue. Serialised against
1155 * efx_reconfigure_port via the mac_lock */
1156 static void efx_monitor(struct work_struct
*data
)
1158 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
1162 EFX_TRACE(efx
, "hardware monitor executing on CPU %d\n",
1163 raw_smp_processor_id());
1166 /* If the mac_lock is already held then it is likely a port
1167 * reconfiguration is already in place, which will likely do
1168 * most of the work of check_hw() anyway. */
1169 if (!mutex_trylock(&efx
->mac_lock
)) {
1170 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1171 efx_monitor_interval
);
1175 if (efx
->port_enabled
)
1176 rc
= falcon_check_xmac(efx
);
1177 mutex_unlock(&efx
->mac_lock
);
1180 if (monitor_reset
) {
1181 EFX_ERR(efx
, "hardware monitor detected a fault: "
1182 "triggering reset\n");
1183 efx_schedule_reset(efx
, RESET_TYPE_MONITOR
);
1185 EFX_ERR(efx
, "hardware monitor detected a fault, "
1186 "skipping reset\n");
1190 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1191 efx_monitor_interval
);
1194 /**************************************************************************
1198 *************************************************************************/
1201 * Context: process, rtnl_lock() held.
1203 static int efx_ioctl(struct net_device
*net_dev
, struct ifreq
*ifr
, int cmd
)
1205 struct efx_nic
*efx
= netdev_priv(net_dev
);
1207 EFX_ASSERT_RESET_SERIALISED(efx
);
1209 return generic_mii_ioctl(&efx
->mii
, if_mii(ifr
), cmd
, NULL
);
1212 /**************************************************************************
1216 **************************************************************************/
1218 static int efx_init_napi(struct efx_nic
*efx
)
1220 struct efx_channel
*channel
;
1223 efx_for_each_channel(channel
, efx
) {
1224 channel
->napi_dev
= efx
->net_dev
;
1225 rc
= efx_lro_init(&channel
->lro_mgr
, efx
);
1235 static void efx_fini_napi(struct efx_nic
*efx
)
1237 struct efx_channel
*channel
;
1239 efx_for_each_channel(channel
, efx
) {
1240 efx_lro_fini(&channel
->lro_mgr
);
1241 channel
->napi_dev
= NULL
;
1245 /**************************************************************************
1247 * Kernel netpoll interface
1249 *************************************************************************/
1251 #ifdef CONFIG_NET_POLL_CONTROLLER
1253 /* Although in the common case interrupts will be disabled, this is not
1254 * guaranteed. However, all our work happens inside the NAPI callback,
1255 * so no locking is required.
1257 static void efx_netpoll(struct net_device
*net_dev
)
1259 struct efx_nic
*efx
= netdev_priv(net_dev
);
1260 struct efx_channel
*channel
;
1262 efx_for_each_channel(channel
, efx
)
1263 efx_schedule_channel(channel
);
1268 /**************************************************************************
1270 * Kernel net device interface
1272 *************************************************************************/
1274 /* Context: process, rtnl_lock() held. */
1275 static int efx_net_open(struct net_device
*net_dev
)
1277 struct efx_nic
*efx
= netdev_priv(net_dev
);
1278 EFX_ASSERT_RESET_SERIALISED(efx
);
1280 EFX_LOG(efx
, "opening device %s on CPU %d\n", net_dev
->name
,
1281 raw_smp_processor_id());
1283 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
1290 /* Context: process, rtnl_lock() held.
1291 * Note that the kernel will ignore our return code; this method
1292 * should really be a void.
1294 static int efx_net_stop(struct net_device
*net_dev
)
1296 struct efx_nic
*efx
= netdev_priv(net_dev
);
1298 EFX_LOG(efx
, "closing %s on CPU %d\n", net_dev
->name
,
1299 raw_smp_processor_id());
1301 /* Stop the device and flush all the channels */
1303 efx_fini_channels(efx
);
1304 efx_init_channels(efx
);
1309 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1310 static struct net_device_stats
*efx_net_stats(struct net_device
*net_dev
)
1312 struct efx_nic
*efx
= netdev_priv(net_dev
);
1313 struct efx_mac_stats
*mac_stats
= &efx
->mac_stats
;
1314 struct net_device_stats
*stats
= &net_dev
->stats
;
1316 /* Update stats if possible, but do not wait if another thread
1317 * is updating them (or resetting the NIC); slightly stale
1318 * stats are acceptable.
1320 if (!spin_trylock(&efx
->stats_lock
))
1322 if (efx
->stats_enabled
) {
1323 falcon_update_stats_xmac(efx
);
1324 falcon_update_nic_stats(efx
);
1326 spin_unlock(&efx
->stats_lock
);
1328 stats
->rx_packets
= mac_stats
->rx_packets
;
1329 stats
->tx_packets
= mac_stats
->tx_packets
;
1330 stats
->rx_bytes
= mac_stats
->rx_bytes
;
1331 stats
->tx_bytes
= mac_stats
->tx_bytes
;
1332 stats
->multicast
= mac_stats
->rx_multicast
;
1333 stats
->collisions
= mac_stats
->tx_collision
;
1334 stats
->rx_length_errors
= (mac_stats
->rx_gtjumbo
+
1335 mac_stats
->rx_length_error
);
1336 stats
->rx_over_errors
= efx
->n_rx_nodesc_drop_cnt
;
1337 stats
->rx_crc_errors
= mac_stats
->rx_bad
;
1338 stats
->rx_frame_errors
= mac_stats
->rx_align_error
;
1339 stats
->rx_fifo_errors
= mac_stats
->rx_overflow
;
1340 stats
->rx_missed_errors
= mac_stats
->rx_missed
;
1341 stats
->tx_window_errors
= mac_stats
->tx_late_collision
;
1343 stats
->rx_errors
= (stats
->rx_length_errors
+
1344 stats
->rx_over_errors
+
1345 stats
->rx_crc_errors
+
1346 stats
->rx_frame_errors
+
1347 stats
->rx_fifo_errors
+
1348 stats
->rx_missed_errors
+
1349 mac_stats
->rx_symbol_error
);
1350 stats
->tx_errors
= (stats
->tx_window_errors
+
1356 /* Context: netif_tx_lock held, BHs disabled. */
1357 static void efx_watchdog(struct net_device
*net_dev
)
1359 struct efx_nic
*efx
= netdev_priv(net_dev
);
1361 EFX_ERR(efx
, "TX stuck with stop_count=%d port_enabled=%d: %s\n",
1362 atomic_read(&efx
->netif_stop_count
), efx
->port_enabled
,
1363 monitor_reset
? "resetting channels" : "skipping reset");
1366 efx_schedule_reset(efx
, RESET_TYPE_MONITOR
);
1370 /* Context: process, rtnl_lock() held. */
1371 static int efx_change_mtu(struct net_device
*net_dev
, int new_mtu
)
1373 struct efx_nic
*efx
= netdev_priv(net_dev
);
1376 EFX_ASSERT_RESET_SERIALISED(efx
);
1378 if (new_mtu
> EFX_MAX_MTU
)
1383 EFX_LOG(efx
, "changing MTU to %d\n", new_mtu
);
1385 efx_fini_channels(efx
);
1386 net_dev
->mtu
= new_mtu
;
1387 efx_init_channels(efx
);
1393 static int efx_set_mac_address(struct net_device
*net_dev
, void *data
)
1395 struct efx_nic
*efx
= netdev_priv(net_dev
);
1396 struct sockaddr
*addr
= data
;
1397 char *new_addr
= addr
->sa_data
;
1399 EFX_ASSERT_RESET_SERIALISED(efx
);
1401 if (!is_valid_ether_addr(new_addr
)) {
1402 EFX_ERR(efx
, "invalid ethernet MAC address requested: %pM\n",
1407 memcpy(net_dev
->dev_addr
, new_addr
, net_dev
->addr_len
);
1409 /* Reconfigure the MAC */
1410 efx_reconfigure_port(efx
);
1415 /* Context: netif_addr_lock held, BHs disabled. */
1416 static void efx_set_multicast_list(struct net_device
*net_dev
)
1418 struct efx_nic
*efx
= netdev_priv(net_dev
);
1419 struct dev_mc_list
*mc_list
= net_dev
->mc_list
;
1420 union efx_multicast_hash
*mc_hash
= &efx
->multicast_hash
;
1421 bool promiscuous
= !!(net_dev
->flags
& IFF_PROMISC
);
1422 bool changed
= (efx
->promiscuous
!= promiscuous
);
1427 efx
->promiscuous
= promiscuous
;
1429 /* Build multicast hash table */
1430 if (promiscuous
|| (net_dev
->flags
& IFF_ALLMULTI
)) {
1431 memset(mc_hash
, 0xff, sizeof(*mc_hash
));
1433 memset(mc_hash
, 0x00, sizeof(*mc_hash
));
1434 for (i
= 0; i
< net_dev
->mc_count
; i
++) {
1435 crc
= ether_crc_le(ETH_ALEN
, mc_list
->dmi_addr
);
1436 bit
= crc
& (EFX_MCAST_HASH_ENTRIES
- 1);
1437 set_bit_le(bit
, mc_hash
->byte
);
1438 mc_list
= mc_list
->next
;
1442 if (!efx
->port_enabled
)
1443 /* Delay pushing settings until efx_start_port() */
1447 queue_work(efx
->workqueue
, &efx
->reconfigure_work
);
1449 /* Create and activate new global multicast hash table */
1450 falcon_set_multicast_hash(efx
);
1453 static int efx_netdev_event(struct notifier_block
*this,
1454 unsigned long event
, void *ptr
)
1456 struct net_device
*net_dev
= ptr
;
1458 if (net_dev
->open
== efx_net_open
&& event
== NETDEV_CHANGENAME
) {
1459 struct efx_nic
*efx
= netdev_priv(net_dev
);
1461 strcpy(efx
->name
, net_dev
->name
);
1467 static struct notifier_block efx_netdev_notifier
= {
1468 .notifier_call
= efx_netdev_event
,
1471 static int efx_register_netdev(struct efx_nic
*efx
)
1473 struct net_device
*net_dev
= efx
->net_dev
;
1476 net_dev
->watchdog_timeo
= 5 * HZ
;
1477 net_dev
->irq
= efx
->pci_dev
->irq
;
1478 net_dev
->open
= efx_net_open
;
1479 net_dev
->stop
= efx_net_stop
;
1480 net_dev
->get_stats
= efx_net_stats
;
1481 net_dev
->tx_timeout
= &efx_watchdog
;
1482 net_dev
->hard_start_xmit
= efx_hard_start_xmit
;
1483 net_dev
->do_ioctl
= efx_ioctl
;
1484 net_dev
->change_mtu
= efx_change_mtu
;
1485 net_dev
->set_mac_address
= efx_set_mac_address
;
1486 net_dev
->set_multicast_list
= efx_set_multicast_list
;
1487 #ifdef CONFIG_NET_POLL_CONTROLLER
1488 net_dev
->poll_controller
= efx_netpoll
;
1490 SET_NETDEV_DEV(net_dev
, &efx
->pci_dev
->dev
);
1491 SET_ETHTOOL_OPS(net_dev
, &efx_ethtool_ops
);
1493 /* Always start with carrier off; PHY events will detect the link */
1494 netif_carrier_off(efx
->net_dev
);
1496 /* Clear MAC statistics */
1497 falcon_update_stats_xmac(efx
);
1498 memset(&efx
->mac_stats
, 0, sizeof(efx
->mac_stats
));
1500 rc
= register_netdev(net_dev
);
1502 EFX_ERR(efx
, "could not register net dev\n");
1505 strcpy(efx
->name
, net_dev
->name
);
1510 static void efx_unregister_netdev(struct efx_nic
*efx
)
1512 struct efx_tx_queue
*tx_queue
;
1517 BUG_ON(netdev_priv(efx
->net_dev
) != efx
);
1519 /* Free up any skbs still remaining. This has to happen before
1520 * we try to unregister the netdev as running their destructors
1521 * may be needed to get the device ref. count to 0. */
1522 efx_for_each_tx_queue(tx_queue
, efx
)
1523 efx_release_tx_buffers(tx_queue
);
1525 if (efx_dev_registered(efx
)) {
1526 strlcpy(efx
->name
, pci_name(efx
->pci_dev
), sizeof(efx
->name
));
1527 unregister_netdev(efx
->net_dev
);
1531 /**************************************************************************
1533 * Device reset and suspend
1535 **************************************************************************/
1537 /* Tears down the entire software state and most of the hardware state
1539 void efx_reset_down(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
)
1543 EFX_ASSERT_RESET_SERIALISED(efx
);
1545 /* The net_dev->get_stats handler is quite slow, and will fail
1546 * if a fetch is pending over reset. Serialise against it. */
1547 spin_lock(&efx
->stats_lock
);
1548 efx
->stats_enabled
= false;
1549 spin_unlock(&efx
->stats_lock
);
1552 mutex_lock(&efx
->mac_lock
);
1554 rc
= falcon_xmac_get_settings(efx
, ecmd
);
1556 EFX_ERR(efx
, "could not back up PHY settings\n");
1558 efx_fini_channels(efx
);
1561 /* This function will always ensure that the locks acquired in
1562 * efx_reset_down() are released. A failure return code indicates
1563 * that we were unable to reinitialise the hardware, and the
1564 * driver should be disabled. If ok is false, then the rx and tx
1565 * engines are not restarted, pending a RESET_DISABLE. */
1566 int efx_reset_up(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
, bool ok
)
1570 EFX_ASSERT_RESET_SERIALISED(efx
);
1572 rc
= falcon_init_nic(efx
);
1574 EFX_ERR(efx
, "failed to initialise NIC\n");
1579 efx_init_channels(efx
);
1581 if (falcon_xmac_set_settings(efx
, ecmd
))
1582 EFX_ERR(efx
, "could not restore PHY settings\n");
1585 mutex_unlock(&efx
->mac_lock
);
1589 efx
->stats_enabled
= true;
1594 /* Reset the NIC as transparently as possible. Do not reset the PHY
1595 * Note that the reset may fail, in which case the card will be left
1596 * in a most-probably-unusable state.
1598 * This function will sleep. You cannot reset from within an atomic
1599 * state; use efx_schedule_reset() instead.
1601 * Grabs the rtnl_lock.
1603 static int efx_reset(struct efx_nic
*efx
)
1605 struct ethtool_cmd ecmd
;
1606 enum reset_type method
= efx
->reset_pending
;
1609 /* Serialise with kernel interfaces */
1612 /* If we're not RUNNING then don't reset. Leave the reset_pending
1613 * flag set so that efx_pci_probe_main will be retried */
1614 if (efx
->state
!= STATE_RUNNING
) {
1615 EFX_INFO(efx
, "scheduled reset quenched. NIC not RUNNING\n");
1619 EFX_INFO(efx
, "resetting (%d)\n", method
);
1621 efx_reset_down(efx
, &ecmd
);
1623 rc
= falcon_reset_hw(efx
, method
);
1625 EFX_ERR(efx
, "failed to reset hardware\n");
1629 /* Allow resets to be rescheduled. */
1630 efx
->reset_pending
= RESET_TYPE_NONE
;
1632 /* Reinitialise bus-mastering, which may have been turned off before
1633 * the reset was scheduled. This is still appropriate, even in the
1634 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1635 * can respond to requests. */
1636 pci_set_master(efx
->pci_dev
);
1638 /* Leave device stopped if necessary */
1639 if (method
== RESET_TYPE_DISABLE
) {
1644 rc
= efx_reset_up(efx
, &ecmd
, true);
1648 EFX_LOG(efx
, "reset complete\n");
1654 efx_reset_up(efx
, &ecmd
, false);
1656 EFX_ERR(efx
, "has been disabled\n");
1657 efx
->state
= STATE_DISABLED
;
1660 efx_unregister_netdev(efx
);
1665 /* The worker thread exists so that code that cannot sleep can
1666 * schedule a reset for later.
1668 static void efx_reset_work(struct work_struct
*data
)
1670 struct efx_nic
*nic
= container_of(data
, struct efx_nic
, reset_work
);
1675 void efx_schedule_reset(struct efx_nic
*efx
, enum reset_type type
)
1677 enum reset_type method
;
1679 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
1680 EFX_INFO(efx
, "quenching already scheduled reset\n");
1685 case RESET_TYPE_INVISIBLE
:
1686 case RESET_TYPE_ALL
:
1687 case RESET_TYPE_WORLD
:
1688 case RESET_TYPE_DISABLE
:
1691 case RESET_TYPE_RX_RECOVERY
:
1692 case RESET_TYPE_RX_DESC_FETCH
:
1693 case RESET_TYPE_TX_DESC_FETCH
:
1694 case RESET_TYPE_TX_SKIP
:
1695 method
= RESET_TYPE_INVISIBLE
;
1698 method
= RESET_TYPE_ALL
;
1703 EFX_LOG(efx
, "scheduling reset (%d:%d)\n", type
, method
);
1705 EFX_LOG(efx
, "scheduling reset (%d)\n", method
);
1707 efx
->reset_pending
= method
;
1709 queue_work(efx
->reset_workqueue
, &efx
->reset_work
);
1712 /**************************************************************************
1714 * List of NICs we support
1716 **************************************************************************/
1718 /* PCI device ID table */
1719 static struct pci_device_id efx_pci_table
[] __devinitdata
= {
1720 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_A_P_DEVID
),
1721 .driver_data
= (unsigned long) &falcon_a_nic_type
},
1722 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_B_P_DEVID
),
1723 .driver_data
= (unsigned long) &falcon_b_nic_type
},
1724 {0} /* end of list */
1727 /**************************************************************************
1729 * Dummy PHY/MAC/Board operations
1731 * Can be used for some unimplemented operations
1732 * Needed so all function pointers are valid and do not have to be tested
1735 **************************************************************************/
1736 int efx_port_dummy_op_int(struct efx_nic
*efx
)
1740 void efx_port_dummy_op_void(struct efx_nic
*efx
) {}
1741 void efx_port_dummy_op_blink(struct efx_nic
*efx
, bool blink
) {}
1743 static struct efx_phy_operations efx_dummy_phy_operations
= {
1744 .init
= efx_port_dummy_op_int
,
1745 .reconfigure
= efx_port_dummy_op_void
,
1746 .check_hw
= efx_port_dummy_op_int
,
1747 .fini
= efx_port_dummy_op_void
,
1748 .clear_interrupt
= efx_port_dummy_op_void
,
1751 static struct efx_board efx_dummy_board_info
= {
1752 .init
= efx_port_dummy_op_int
,
1753 .init_leds
= efx_port_dummy_op_int
,
1754 .set_fault_led
= efx_port_dummy_op_blink
,
1755 .blink
= efx_port_dummy_op_blink
,
1756 .fini
= efx_port_dummy_op_void
,
1759 /**************************************************************************
1763 **************************************************************************/
1765 /* This zeroes out and then fills in the invariants in a struct
1766 * efx_nic (including all sub-structures).
1768 static int efx_init_struct(struct efx_nic
*efx
, struct efx_nic_type
*type
,
1769 struct pci_dev
*pci_dev
, struct net_device
*net_dev
)
1771 struct efx_channel
*channel
;
1772 struct efx_tx_queue
*tx_queue
;
1773 struct efx_rx_queue
*rx_queue
;
1776 /* Initialise common structures */
1777 memset(efx
, 0, sizeof(*efx
));
1778 spin_lock_init(&efx
->biu_lock
);
1779 spin_lock_init(&efx
->phy_lock
);
1780 INIT_WORK(&efx
->reset_work
, efx_reset_work
);
1781 INIT_DELAYED_WORK(&efx
->monitor_work
, efx_monitor
);
1782 efx
->pci_dev
= pci_dev
;
1783 efx
->state
= STATE_INIT
;
1784 efx
->reset_pending
= RESET_TYPE_NONE
;
1785 strlcpy(efx
->name
, pci_name(pci_dev
), sizeof(efx
->name
));
1786 efx
->board_info
= efx_dummy_board_info
;
1788 efx
->net_dev
= net_dev
;
1789 efx
->rx_checksum_enabled
= true;
1790 spin_lock_init(&efx
->netif_stop_lock
);
1791 spin_lock_init(&efx
->stats_lock
);
1792 mutex_init(&efx
->mac_lock
);
1793 efx
->phy_op
= &efx_dummy_phy_operations
;
1794 efx
->mii
.dev
= net_dev
;
1795 INIT_WORK(&efx
->reconfigure_work
, efx_reconfigure_work
);
1796 atomic_set(&efx
->netif_stop_count
, 1);
1798 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++) {
1799 channel
= &efx
->channel
[i
];
1801 channel
->channel
= i
;
1802 channel
->work_pending
= false;
1804 for (i
= 0; i
< EFX_TX_QUEUE_COUNT
; i
++) {
1805 tx_queue
= &efx
->tx_queue
[i
];
1806 tx_queue
->efx
= efx
;
1807 tx_queue
->queue
= i
;
1808 tx_queue
->buffer
= NULL
;
1809 tx_queue
->channel
= &efx
->channel
[0]; /* for safety */
1810 tx_queue
->tso_headers_free
= NULL
;
1812 for (i
= 0; i
< EFX_MAX_RX_QUEUES
; i
++) {
1813 rx_queue
= &efx
->rx_queue
[i
];
1814 rx_queue
->efx
= efx
;
1815 rx_queue
->queue
= i
;
1816 rx_queue
->channel
= &efx
->channel
[0]; /* for safety */
1817 rx_queue
->buffer
= NULL
;
1818 spin_lock_init(&rx_queue
->add_lock
);
1819 INIT_DELAYED_WORK(&rx_queue
->work
, efx_rx_work
);
1824 /* Sanity-check NIC type */
1825 EFX_BUG_ON_PARANOID(efx
->type
->txd_ring_mask
&
1826 (efx
->type
->txd_ring_mask
+ 1));
1827 EFX_BUG_ON_PARANOID(efx
->type
->rxd_ring_mask
&
1828 (efx
->type
->rxd_ring_mask
+ 1));
1829 EFX_BUG_ON_PARANOID(efx
->type
->evq_size
&
1830 (efx
->type
->evq_size
- 1));
1831 /* As close as we can get to guaranteeing that we don't overflow */
1832 EFX_BUG_ON_PARANOID(efx
->type
->evq_size
<
1833 (efx
->type
->txd_ring_mask
+ 1 +
1834 efx
->type
->rxd_ring_mask
+ 1));
1835 EFX_BUG_ON_PARANOID(efx
->type
->phys_addr_channels
> EFX_MAX_CHANNELS
);
1837 /* Higher numbered interrupt modes are less capable! */
1838 efx
->interrupt_mode
= max(efx
->type
->max_interrupt_mode
,
1841 efx
->workqueue
= create_singlethread_workqueue("sfc_work");
1842 if (!efx
->workqueue
) {
1847 efx
->reset_workqueue
= create_singlethread_workqueue("sfc_reset");
1848 if (!efx
->reset_workqueue
) {
1856 destroy_workqueue(efx
->workqueue
);
1857 efx
->workqueue
= NULL
;
1863 static void efx_fini_struct(struct efx_nic
*efx
)
1865 if (efx
->reset_workqueue
) {
1866 destroy_workqueue(efx
->reset_workqueue
);
1867 efx
->reset_workqueue
= NULL
;
1869 if (efx
->workqueue
) {
1870 destroy_workqueue(efx
->workqueue
);
1871 efx
->workqueue
= NULL
;
1875 /**************************************************************************
1879 **************************************************************************/
1881 /* Main body of final NIC shutdown code
1882 * This is called only at module unload (or hotplug removal).
1884 static void efx_pci_remove_main(struct efx_nic
*efx
)
1886 EFX_ASSERT_RESET_SERIALISED(efx
);
1888 /* Skip everything if we never obtained a valid membase */
1892 efx_fini_channels(efx
);
1895 /* Shutdown the board, then the NIC and board state */
1896 efx
->board_info
.fini(efx
);
1897 falcon_fini_interrupt(efx
);
1900 efx_remove_all(efx
);
1903 /* Final NIC shutdown
1904 * This is called only at module unload (or hotplug removal).
1906 static void efx_pci_remove(struct pci_dev
*pci_dev
)
1908 struct efx_nic
*efx
;
1910 efx
= pci_get_drvdata(pci_dev
);
1914 /* Mark the NIC as fini, then stop the interface */
1916 efx
->state
= STATE_FINI
;
1917 dev_close(efx
->net_dev
);
1919 /* Allow any queued efx_resets() to complete */
1922 if (efx
->membase
== NULL
)
1925 efx_unregister_netdev(efx
);
1927 /* Wait for any scheduled resets to complete. No more will be
1928 * scheduled from this point because efx_stop_all() has been
1929 * called, we are no longer registered with driverlink, and
1930 * the net_device's have been removed. */
1931 flush_workqueue(efx
->reset_workqueue
);
1933 efx_pci_remove_main(efx
);
1937 EFX_LOG(efx
, "shutdown successful\n");
1939 pci_set_drvdata(pci_dev
, NULL
);
1940 efx_fini_struct(efx
);
1941 free_netdev(efx
->net_dev
);
1944 /* Main body of NIC initialisation
1945 * This is called at module load (or hotplug insertion, theoretically).
1947 static int efx_pci_probe_main(struct efx_nic
*efx
)
1951 /* Do start-of-day initialisation */
1952 rc
= efx_probe_all(efx
);
1956 rc
= efx_init_napi(efx
);
1960 /* Initialise the board */
1961 rc
= efx
->board_info
.init(efx
);
1963 EFX_ERR(efx
, "failed to initialise board\n");
1967 rc
= falcon_init_nic(efx
);
1969 EFX_ERR(efx
, "failed to initialise NIC\n");
1973 rc
= efx_init_port(efx
);
1975 EFX_ERR(efx
, "failed to initialise port\n");
1979 efx_init_channels(efx
);
1981 rc
= falcon_init_interrupt(efx
);
1988 efx_fini_channels(efx
);
1995 efx_remove_all(efx
);
2000 /* NIC initialisation
2002 * This is called at module load (or hotplug insertion,
2003 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2004 * sets up and registers the network devices with the kernel and hooks
2005 * the interrupt service routine. It does not prepare the device for
2006 * transmission; this is left to the first time one of the network
2007 * interfaces is brought up (i.e. efx_net_open).
2009 static int __devinit
efx_pci_probe(struct pci_dev
*pci_dev
,
2010 const struct pci_device_id
*entry
)
2012 struct efx_nic_type
*type
= (struct efx_nic_type
*) entry
->driver_data
;
2013 struct net_device
*net_dev
;
2014 struct efx_nic
*efx
;
2017 /* Allocate and initialise a struct net_device and struct efx_nic */
2018 net_dev
= alloc_etherdev(sizeof(*efx
));
2021 net_dev
->features
|= (NETIF_F_IP_CSUM
| NETIF_F_SG
|
2022 NETIF_F_HIGHDMA
| NETIF_F_TSO
);
2024 net_dev
->features
|= NETIF_F_LRO
;
2025 /* Mask for features that also apply to VLAN devices */
2026 net_dev
->vlan_features
|= (NETIF_F_ALL_CSUM
| NETIF_F_SG
|
2027 NETIF_F_HIGHDMA
| NETIF_F_TSO
);
2028 efx
= netdev_priv(net_dev
);
2029 pci_set_drvdata(pci_dev
, efx
);
2030 rc
= efx_init_struct(efx
, type
, pci_dev
, net_dev
);
2034 EFX_INFO(efx
, "Solarflare Communications NIC detected\n");
2036 /* Set up basic I/O (BAR mappings etc) */
2037 rc
= efx_init_io(efx
);
2041 /* No serialisation is required with the reset path because
2042 * we're in STATE_INIT. */
2043 for (i
= 0; i
< 5; i
++) {
2044 rc
= efx_pci_probe_main(efx
);
2048 /* Serialise against efx_reset(). No more resets will be
2049 * scheduled since efx_stop_all() has been called, and we
2050 * have not and never have been registered with either
2051 * the rtnetlink or driverlink layers. */
2052 flush_workqueue(efx
->reset_workqueue
);
2054 /* Retry if a recoverably reset event has been scheduled */
2055 if ((efx
->reset_pending
!= RESET_TYPE_INVISIBLE
) &&
2056 (efx
->reset_pending
!= RESET_TYPE_ALL
))
2059 efx
->reset_pending
= RESET_TYPE_NONE
;
2063 EFX_ERR(efx
, "Could not reset NIC\n");
2067 /* Switch to the running state before we expose the device to
2068 * the OS. This is to ensure that the initial gathering of
2069 * MAC stats succeeds. */
2071 efx
->state
= STATE_RUNNING
;
2074 rc
= efx_register_netdev(efx
);
2078 EFX_LOG(efx
, "initialisation successful\n");
2083 efx_pci_remove_main(efx
);
2088 efx_fini_struct(efx
);
2090 EFX_LOG(efx
, "initialisation failed. rc=%d\n", rc
);
2091 free_netdev(net_dev
);
2095 static struct pci_driver efx_pci_driver
= {
2096 .name
= EFX_DRIVER_NAME
,
2097 .id_table
= efx_pci_table
,
2098 .probe
= efx_pci_probe
,
2099 .remove
= efx_pci_remove
,
2102 /**************************************************************************
2104 * Kernel module interface
2106 *************************************************************************/
2108 module_param(interrupt_mode
, uint
, 0444);
2109 MODULE_PARM_DESC(interrupt_mode
,
2110 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2112 static int __init
efx_init_module(void)
2116 printk(KERN_INFO
"Solarflare NET driver v" EFX_DRIVER_VERSION
"\n");
2118 rc
= register_netdevice_notifier(&efx_netdev_notifier
);
2122 refill_workqueue
= create_workqueue("sfc_refill");
2123 if (!refill_workqueue
) {
2128 rc
= pci_register_driver(&efx_pci_driver
);
2135 destroy_workqueue(refill_workqueue
);
2137 unregister_netdevice_notifier(&efx_netdev_notifier
);
2142 static void __exit
efx_exit_module(void)
2144 printk(KERN_INFO
"Solarflare NET driver unloading\n");
2146 pci_unregister_driver(&efx_pci_driver
);
2147 destroy_workqueue(refill_workqueue
);
2148 unregister_netdevice_notifier(&efx_netdev_notifier
);
2152 module_init(efx_init_module
);
2153 module_exit(efx_exit_module
);
2155 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2156 "Solarflare Communications");
2157 MODULE_DESCRIPTION("Solarflare Communications network driver");
2158 MODULE_LICENSE("GPL");
2159 MODULE_DEVICE_TABLE(pci
, efx_pci_table
);