]> git.proxmox.com Git - mirror_ubuntu-kernels.git/blob - drivers/net/sfc/efx.c
sfc: Store MAC address from NVRAM in net_device::perm_addr
[mirror_ubuntu-kernels.git] / drivers / net / sfc / efx.c
1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include "net_driver.h"
25 #include "efx.h"
26 #include "nic.h"
27
28 #include "mcdi.h"
29 #include "workarounds.h"
30
31 /**************************************************************************
32 *
33 * Type name strings
34 *
35 **************************************************************************
36 */
37
38 /* Loopback mode names (see LOOPBACK_MODE()) */
39 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
40 const char *efx_loopback_mode_names[] = {
41 [LOOPBACK_NONE] = "NONE",
42 [LOOPBACK_DATA] = "DATAPATH",
43 [LOOPBACK_GMAC] = "GMAC",
44 [LOOPBACK_XGMII] = "XGMII",
45 [LOOPBACK_XGXS] = "XGXS",
46 [LOOPBACK_XAUI] = "XAUI",
47 [LOOPBACK_GMII] = "GMII",
48 [LOOPBACK_SGMII] = "SGMII",
49 [LOOPBACK_XGBR] = "XGBR",
50 [LOOPBACK_XFI] = "XFI",
51 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
52 [LOOPBACK_GMII_FAR] = "GMII_FAR",
53 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
54 [LOOPBACK_XFI_FAR] = "XFI_FAR",
55 [LOOPBACK_GPHY] = "GPHY",
56 [LOOPBACK_PHYXS] = "PHYXS",
57 [LOOPBACK_PCS] = "PCS",
58 [LOOPBACK_PMAPMD] = "PMA/PMD",
59 [LOOPBACK_XPORT] = "XPORT",
60 [LOOPBACK_XGMII_WS] = "XGMII_WS",
61 [LOOPBACK_XAUI_WS] = "XAUI_WS",
62 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
63 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
64 [LOOPBACK_GMII_WS] = "GMII_WS",
65 [LOOPBACK_XFI_WS] = "XFI_WS",
66 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
67 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
68 };
69
70 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
71 const char *efx_reset_type_names[] = {
72 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
73 [RESET_TYPE_ALL] = "ALL",
74 [RESET_TYPE_WORLD] = "WORLD",
75 [RESET_TYPE_DISABLE] = "DISABLE",
76 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
77 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
78 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
79 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
80 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
81 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
82 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
83 };
84
85 #define EFX_MAX_MTU (9 * 1024)
86
87 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
88 * queued onto this work queue. This is not a per-nic work queue, because
89 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
90 */
91 static struct workqueue_struct *reset_workqueue;
92
93 /**************************************************************************
94 *
95 * Configurable values
96 *
97 *************************************************************************/
98
99 /*
100 * Use separate channels for TX and RX events
101 *
102 * Set this to 1 to use separate channels for TX and RX. It allows us
103 * to control interrupt affinity separately for TX and RX.
104 *
105 * This is only used in MSI-X interrupt mode
106 */
107 static unsigned int separate_tx_channels;
108 module_param(separate_tx_channels, uint, 0444);
109 MODULE_PARM_DESC(separate_tx_channels,
110 "Use separate channels for TX and RX");
111
112 /* This is the weight assigned to each of the (per-channel) virtual
113 * NAPI devices.
114 */
115 static int napi_weight = 64;
116
117 /* This is the time (in jiffies) between invocations of the hardware
118 * monitor. On Falcon-based NICs, this will:
119 * - Check the on-board hardware monitor;
120 * - Poll the link state and reconfigure the hardware as necessary.
121 */
122 static unsigned int efx_monitor_interval = 1 * HZ;
123
124 /* This controls whether or not the driver will initialise devices
125 * with invalid MAC addresses stored in the EEPROM or flash. If true,
126 * such devices will be initialised with a random locally-generated
127 * MAC address. This allows for loading the sfc_mtd driver to
128 * reprogram the flash, even if the flash contents (including the MAC
129 * address) have previously been erased.
130 */
131 static unsigned int allow_bad_hwaddr;
132
133 /* Initial interrupt moderation settings. They can be modified after
134 * module load with ethtool.
135 *
136 * The default for RX should strike a balance between increasing the
137 * round-trip latency and reducing overhead.
138 */
139 static unsigned int rx_irq_mod_usec = 60;
140
141 /* Initial interrupt moderation settings. They can be modified after
142 * module load with ethtool.
143 *
144 * This default is chosen to ensure that a 10G link does not go idle
145 * while a TX queue is stopped after it has become full. A queue is
146 * restarted when it drops below half full. The time this takes (assuming
147 * worst case 3 descriptors per packet and 1024 descriptors) is
148 * 512 / 3 * 1.2 = 205 usec.
149 */
150 static unsigned int tx_irq_mod_usec = 150;
151
152 /* This is the first interrupt mode to try out of:
153 * 0 => MSI-X
154 * 1 => MSI
155 * 2 => legacy
156 */
157 static unsigned int interrupt_mode;
158
159 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
160 * i.e. the number of CPUs among which we may distribute simultaneous
161 * interrupt handling.
162 *
163 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
164 * The default (0) means to assign an interrupt to each package (level II cache)
165 */
166 static unsigned int rss_cpus;
167 module_param(rss_cpus, uint, 0444);
168 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
169
170 static int phy_flash_cfg;
171 module_param(phy_flash_cfg, int, 0644);
172 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
173
174 static unsigned irq_adapt_low_thresh = 10000;
175 module_param(irq_adapt_low_thresh, uint, 0644);
176 MODULE_PARM_DESC(irq_adapt_low_thresh,
177 "Threshold score for reducing IRQ moderation");
178
179 static unsigned irq_adapt_high_thresh = 20000;
180 module_param(irq_adapt_high_thresh, uint, 0644);
181 MODULE_PARM_DESC(irq_adapt_high_thresh,
182 "Threshold score for increasing IRQ moderation");
183
184 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
185 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
186 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
187 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
188 module_param(debug, uint, 0);
189 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
190
191 /**************************************************************************
192 *
193 * Utility functions and prototypes
194 *
195 *************************************************************************/
196
197 static void efx_remove_channels(struct efx_nic *efx);
198 static void efx_remove_port(struct efx_nic *efx);
199 static void efx_fini_napi(struct efx_nic *efx);
200 static void efx_fini_struct(struct efx_nic *efx);
201 static void efx_start_all(struct efx_nic *efx);
202 static void efx_stop_all(struct efx_nic *efx);
203
204 #define EFX_ASSERT_RESET_SERIALISED(efx) \
205 do { \
206 if ((efx->state == STATE_RUNNING) || \
207 (efx->state == STATE_DISABLED)) \
208 ASSERT_RTNL(); \
209 } while (0)
210
211 /**************************************************************************
212 *
213 * Event queue processing
214 *
215 *************************************************************************/
216
217 /* Process channel's event queue
218 *
219 * This function is responsible for processing the event queue of a
220 * single channel. The caller must guarantee that this function will
221 * never be concurrently called more than once on the same channel,
222 * though different channels may be being processed concurrently.
223 */
224 static int efx_process_channel(struct efx_channel *channel, int budget)
225 {
226 struct efx_nic *efx = channel->efx;
227 int spent;
228
229 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
230 !channel->enabled))
231 return 0;
232
233 spent = efx_nic_process_eventq(channel, budget);
234 if (spent == 0)
235 return 0;
236
237 /* Deliver last RX packet. */
238 if (channel->rx_pkt) {
239 __efx_rx_packet(channel, channel->rx_pkt,
240 channel->rx_pkt_csummed);
241 channel->rx_pkt = NULL;
242 }
243
244 efx_rx_strategy(channel);
245
246 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
247
248 return spent;
249 }
250
251 /* Mark channel as finished processing
252 *
253 * Note that since we will not receive further interrupts for this
254 * channel before we finish processing and call the eventq_read_ack()
255 * method, there is no need to use the interrupt hold-off timers.
256 */
257 static inline void efx_channel_processed(struct efx_channel *channel)
258 {
259 /* The interrupt handler for this channel may set work_pending
260 * as soon as we acknowledge the events we've seen. Make sure
261 * it's cleared before then. */
262 channel->work_pending = false;
263 smp_wmb();
264
265 efx_nic_eventq_read_ack(channel);
266 }
267
268 /* NAPI poll handler
269 *
270 * NAPI guarantees serialisation of polls of the same device, which
271 * provides the guarantee required by efx_process_channel().
272 */
273 static int efx_poll(struct napi_struct *napi, int budget)
274 {
275 struct efx_channel *channel =
276 container_of(napi, struct efx_channel, napi_str);
277 struct efx_nic *efx = channel->efx;
278 int spent;
279
280 netif_vdbg(efx, intr, efx->net_dev,
281 "channel %d NAPI poll executing on CPU %d\n",
282 channel->channel, raw_smp_processor_id());
283
284 spent = efx_process_channel(channel, budget);
285
286 if (spent < budget) {
287 if (channel->channel < efx->n_rx_channels &&
288 efx->irq_rx_adaptive &&
289 unlikely(++channel->irq_count == 1000)) {
290 if (unlikely(channel->irq_mod_score <
291 irq_adapt_low_thresh)) {
292 if (channel->irq_moderation > 1) {
293 channel->irq_moderation -= 1;
294 efx->type->push_irq_moderation(channel);
295 }
296 } else if (unlikely(channel->irq_mod_score >
297 irq_adapt_high_thresh)) {
298 if (channel->irq_moderation <
299 efx->irq_rx_moderation) {
300 channel->irq_moderation += 1;
301 efx->type->push_irq_moderation(channel);
302 }
303 }
304 channel->irq_count = 0;
305 channel->irq_mod_score = 0;
306 }
307
308 /* There is no race here; although napi_disable() will
309 * only wait for napi_complete(), this isn't a problem
310 * since efx_channel_processed() will have no effect if
311 * interrupts have already been disabled.
312 */
313 napi_complete(napi);
314 efx_channel_processed(channel);
315 }
316
317 return spent;
318 }
319
320 /* Process the eventq of the specified channel immediately on this CPU
321 *
322 * Disable hardware generated interrupts, wait for any existing
323 * processing to finish, then directly poll (and ack ) the eventq.
324 * Finally reenable NAPI and interrupts.
325 *
326 * Since we are touching interrupts the caller should hold the suspend lock
327 */
328 void efx_process_channel_now(struct efx_channel *channel)
329 {
330 struct efx_nic *efx = channel->efx;
331
332 BUG_ON(channel->channel >= efx->n_channels);
333 BUG_ON(!channel->enabled);
334
335 /* Disable interrupts and wait for ISRs to complete */
336 efx_nic_disable_interrupts(efx);
337 if (efx->legacy_irq)
338 synchronize_irq(efx->legacy_irq);
339 if (channel->irq)
340 synchronize_irq(channel->irq);
341
342 /* Wait for any NAPI processing to complete */
343 napi_disable(&channel->napi_str);
344
345 /* Poll the channel */
346 efx_process_channel(channel, channel->eventq_mask + 1);
347
348 /* Ack the eventq. This may cause an interrupt to be generated
349 * when they are reenabled */
350 efx_channel_processed(channel);
351
352 napi_enable(&channel->napi_str);
353 efx_nic_enable_interrupts(efx);
354 }
355
356 /* Create event queue
357 * Event queue memory allocations are done only once. If the channel
358 * is reset, the memory buffer will be reused; this guards against
359 * errors during channel reset and also simplifies interrupt handling.
360 */
361 static int efx_probe_eventq(struct efx_channel *channel)
362 {
363 struct efx_nic *efx = channel->efx;
364 unsigned long entries;
365
366 netif_dbg(channel->efx, probe, channel->efx->net_dev,
367 "chan %d create event queue\n", channel->channel);
368
369 /* Build an event queue with room for one event per tx and rx buffer,
370 * plus some extra for link state events and MCDI completions. */
371 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
372 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
373 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
374
375 return efx_nic_probe_eventq(channel);
376 }
377
378 /* Prepare channel's event queue */
379 static void efx_init_eventq(struct efx_channel *channel)
380 {
381 netif_dbg(channel->efx, drv, channel->efx->net_dev,
382 "chan %d init event queue\n", channel->channel);
383
384 channel->eventq_read_ptr = 0;
385
386 efx_nic_init_eventq(channel);
387 }
388
389 static void efx_fini_eventq(struct efx_channel *channel)
390 {
391 netif_dbg(channel->efx, drv, channel->efx->net_dev,
392 "chan %d fini event queue\n", channel->channel);
393
394 efx_nic_fini_eventq(channel);
395 }
396
397 static void efx_remove_eventq(struct efx_channel *channel)
398 {
399 netif_dbg(channel->efx, drv, channel->efx->net_dev,
400 "chan %d remove event queue\n", channel->channel);
401
402 efx_nic_remove_eventq(channel);
403 }
404
405 /**************************************************************************
406 *
407 * Channel handling
408 *
409 *************************************************************************/
410
411 /* Allocate and initialise a channel structure, optionally copying
412 * parameters (but not resources) from an old channel structure. */
413 static struct efx_channel *
414 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
415 {
416 struct efx_channel *channel;
417 struct efx_rx_queue *rx_queue;
418 struct efx_tx_queue *tx_queue;
419 int j;
420
421 if (old_channel) {
422 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
423 if (!channel)
424 return NULL;
425
426 *channel = *old_channel;
427
428 memset(&channel->eventq, 0, sizeof(channel->eventq));
429
430 rx_queue = &channel->rx_queue;
431 rx_queue->buffer = NULL;
432 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
433
434 for (j = 0; j < EFX_TXQ_TYPES; j++) {
435 tx_queue = &channel->tx_queue[j];
436 if (tx_queue->channel)
437 tx_queue->channel = channel;
438 tx_queue->buffer = NULL;
439 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
440 }
441 } else {
442 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
443 if (!channel)
444 return NULL;
445
446 channel->efx = efx;
447 channel->channel = i;
448
449 for (j = 0; j < EFX_TXQ_TYPES; j++) {
450 tx_queue = &channel->tx_queue[j];
451 tx_queue->efx = efx;
452 tx_queue->queue = i * EFX_TXQ_TYPES + j;
453 tx_queue->channel = channel;
454 }
455 }
456
457 spin_lock_init(&channel->tx_stop_lock);
458 atomic_set(&channel->tx_stop_count, 1);
459
460 rx_queue = &channel->rx_queue;
461 rx_queue->efx = efx;
462 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
463 (unsigned long)rx_queue);
464
465 return channel;
466 }
467
468 static int efx_probe_channel(struct efx_channel *channel)
469 {
470 struct efx_tx_queue *tx_queue;
471 struct efx_rx_queue *rx_queue;
472 int rc;
473
474 netif_dbg(channel->efx, probe, channel->efx->net_dev,
475 "creating channel %d\n", channel->channel);
476
477 rc = efx_probe_eventq(channel);
478 if (rc)
479 goto fail1;
480
481 efx_for_each_channel_tx_queue(tx_queue, channel) {
482 rc = efx_probe_tx_queue(tx_queue);
483 if (rc)
484 goto fail2;
485 }
486
487 efx_for_each_channel_rx_queue(rx_queue, channel) {
488 rc = efx_probe_rx_queue(rx_queue);
489 if (rc)
490 goto fail3;
491 }
492
493 channel->n_rx_frm_trunc = 0;
494
495 return 0;
496
497 fail3:
498 efx_for_each_channel_rx_queue(rx_queue, channel)
499 efx_remove_rx_queue(rx_queue);
500 fail2:
501 efx_for_each_channel_tx_queue(tx_queue, channel)
502 efx_remove_tx_queue(tx_queue);
503 fail1:
504 return rc;
505 }
506
507
508 static void efx_set_channel_names(struct efx_nic *efx)
509 {
510 struct efx_channel *channel;
511 const char *type = "";
512 int number;
513
514 efx_for_each_channel(channel, efx) {
515 number = channel->channel;
516 if (efx->n_channels > efx->n_rx_channels) {
517 if (channel->channel < efx->n_rx_channels) {
518 type = "-rx";
519 } else {
520 type = "-tx";
521 number -= efx->n_rx_channels;
522 }
523 }
524 snprintf(efx->channel_name[channel->channel],
525 sizeof(efx->channel_name[0]),
526 "%s%s-%d", efx->name, type, number);
527 }
528 }
529
530 static int efx_probe_channels(struct efx_nic *efx)
531 {
532 struct efx_channel *channel;
533 int rc;
534
535 /* Restart special buffer allocation */
536 efx->next_buffer_table = 0;
537
538 efx_for_each_channel(channel, efx) {
539 rc = efx_probe_channel(channel);
540 if (rc) {
541 netif_err(efx, probe, efx->net_dev,
542 "failed to create channel %d\n",
543 channel->channel);
544 goto fail;
545 }
546 }
547 efx_set_channel_names(efx);
548
549 return 0;
550
551 fail:
552 efx_remove_channels(efx);
553 return rc;
554 }
555
556 /* Channels are shutdown and reinitialised whilst the NIC is running
557 * to propagate configuration changes (mtu, checksum offload), or
558 * to clear hardware error conditions
559 */
560 static void efx_init_channels(struct efx_nic *efx)
561 {
562 struct efx_tx_queue *tx_queue;
563 struct efx_rx_queue *rx_queue;
564 struct efx_channel *channel;
565
566 /* Calculate the rx buffer allocation parameters required to
567 * support the current MTU, including padding for header
568 * alignment and overruns.
569 */
570 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
571 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
572 efx->type->rx_buffer_hash_size +
573 efx->type->rx_buffer_padding);
574 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
575 sizeof(struct efx_rx_page_state));
576
577 /* Initialise the channels */
578 efx_for_each_channel(channel, efx) {
579 netif_dbg(channel->efx, drv, channel->efx->net_dev,
580 "init chan %d\n", channel->channel);
581
582 efx_init_eventq(channel);
583
584 efx_for_each_channel_tx_queue(tx_queue, channel)
585 efx_init_tx_queue(tx_queue);
586
587 /* The rx buffer allocation strategy is MTU dependent */
588 efx_rx_strategy(channel);
589
590 efx_for_each_channel_rx_queue(rx_queue, channel)
591 efx_init_rx_queue(rx_queue);
592
593 WARN_ON(channel->rx_pkt != NULL);
594 efx_rx_strategy(channel);
595 }
596 }
597
598 /* This enables event queue processing and packet transmission.
599 *
600 * Note that this function is not allowed to fail, since that would
601 * introduce too much complexity into the suspend/resume path.
602 */
603 static void efx_start_channel(struct efx_channel *channel)
604 {
605 struct efx_rx_queue *rx_queue;
606
607 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
608 "starting chan %d\n", channel->channel);
609
610 /* The interrupt handler for this channel may set work_pending
611 * as soon as we enable it. Make sure it's cleared before
612 * then. Similarly, make sure it sees the enabled flag set. */
613 channel->work_pending = false;
614 channel->enabled = true;
615 smp_wmb();
616
617 /* Fill the queues before enabling NAPI */
618 efx_for_each_channel_rx_queue(rx_queue, channel)
619 efx_fast_push_rx_descriptors(rx_queue);
620
621 napi_enable(&channel->napi_str);
622 }
623
624 /* This disables event queue processing and packet transmission.
625 * This function does not guarantee that all queue processing
626 * (e.g. RX refill) is complete.
627 */
628 static void efx_stop_channel(struct efx_channel *channel)
629 {
630 if (!channel->enabled)
631 return;
632
633 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
634 "stop chan %d\n", channel->channel);
635
636 channel->enabled = false;
637 napi_disable(&channel->napi_str);
638 }
639
640 static void efx_fini_channels(struct efx_nic *efx)
641 {
642 struct efx_channel *channel;
643 struct efx_tx_queue *tx_queue;
644 struct efx_rx_queue *rx_queue;
645 int rc;
646
647 EFX_ASSERT_RESET_SERIALISED(efx);
648 BUG_ON(efx->port_enabled);
649
650 rc = efx_nic_flush_queues(efx);
651 if (rc && EFX_WORKAROUND_7803(efx)) {
652 /* Schedule a reset to recover from the flush failure. The
653 * descriptor caches reference memory we're about to free,
654 * but falcon_reconfigure_mac_wrapper() won't reconnect
655 * the MACs because of the pending reset. */
656 netif_err(efx, drv, efx->net_dev,
657 "Resetting to recover from flush failure\n");
658 efx_schedule_reset(efx, RESET_TYPE_ALL);
659 } else if (rc) {
660 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
661 } else {
662 netif_dbg(efx, drv, efx->net_dev,
663 "successfully flushed all queues\n");
664 }
665
666 efx_for_each_channel(channel, efx) {
667 netif_dbg(channel->efx, drv, channel->efx->net_dev,
668 "shut down chan %d\n", channel->channel);
669
670 efx_for_each_channel_rx_queue(rx_queue, channel)
671 efx_fini_rx_queue(rx_queue);
672 efx_for_each_channel_tx_queue(tx_queue, channel)
673 efx_fini_tx_queue(tx_queue);
674 efx_fini_eventq(channel);
675 }
676 }
677
678 static void efx_remove_channel(struct efx_channel *channel)
679 {
680 struct efx_tx_queue *tx_queue;
681 struct efx_rx_queue *rx_queue;
682
683 netif_dbg(channel->efx, drv, channel->efx->net_dev,
684 "destroy chan %d\n", channel->channel);
685
686 efx_for_each_channel_rx_queue(rx_queue, channel)
687 efx_remove_rx_queue(rx_queue);
688 efx_for_each_channel_tx_queue(tx_queue, channel)
689 efx_remove_tx_queue(tx_queue);
690 efx_remove_eventq(channel);
691 }
692
693 static void efx_remove_channels(struct efx_nic *efx)
694 {
695 struct efx_channel *channel;
696
697 efx_for_each_channel(channel, efx)
698 efx_remove_channel(channel);
699 }
700
701 int
702 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
703 {
704 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
705 u32 old_rxq_entries, old_txq_entries;
706 unsigned i;
707 int rc;
708
709 efx_stop_all(efx);
710 efx_fini_channels(efx);
711
712 /* Clone channels */
713 memset(other_channel, 0, sizeof(other_channel));
714 for (i = 0; i < efx->n_channels; i++) {
715 channel = efx_alloc_channel(efx, i, efx->channel[i]);
716 if (!channel) {
717 rc = -ENOMEM;
718 goto out;
719 }
720 other_channel[i] = channel;
721 }
722
723 /* Swap entry counts and channel pointers */
724 old_rxq_entries = efx->rxq_entries;
725 old_txq_entries = efx->txq_entries;
726 efx->rxq_entries = rxq_entries;
727 efx->txq_entries = txq_entries;
728 for (i = 0; i < efx->n_channels; i++) {
729 channel = efx->channel[i];
730 efx->channel[i] = other_channel[i];
731 other_channel[i] = channel;
732 }
733
734 rc = efx_probe_channels(efx);
735 if (rc)
736 goto rollback;
737
738 /* Destroy old channels */
739 for (i = 0; i < efx->n_channels; i++)
740 efx_remove_channel(other_channel[i]);
741 out:
742 /* Free unused channel structures */
743 for (i = 0; i < efx->n_channels; i++)
744 kfree(other_channel[i]);
745
746 efx_init_channels(efx);
747 efx_start_all(efx);
748 return rc;
749
750 rollback:
751 /* Swap back */
752 efx->rxq_entries = old_rxq_entries;
753 efx->txq_entries = old_txq_entries;
754 for (i = 0; i < efx->n_channels; i++) {
755 channel = efx->channel[i];
756 efx->channel[i] = other_channel[i];
757 other_channel[i] = channel;
758 }
759 goto out;
760 }
761
762 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
763 {
764 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
765 }
766
767 /**************************************************************************
768 *
769 * Port handling
770 *
771 **************************************************************************/
772
773 /* This ensures that the kernel is kept informed (via
774 * netif_carrier_on/off) of the link status, and also maintains the
775 * link status's stop on the port's TX queue.
776 */
777 void efx_link_status_changed(struct efx_nic *efx)
778 {
779 struct efx_link_state *link_state = &efx->link_state;
780
781 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
782 * that no events are triggered between unregister_netdev() and the
783 * driver unloading. A more general condition is that NETDEV_CHANGE
784 * can only be generated between NETDEV_UP and NETDEV_DOWN */
785 if (!netif_running(efx->net_dev))
786 return;
787
788 if (efx->port_inhibited) {
789 netif_carrier_off(efx->net_dev);
790 return;
791 }
792
793 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
794 efx->n_link_state_changes++;
795
796 if (link_state->up)
797 netif_carrier_on(efx->net_dev);
798 else
799 netif_carrier_off(efx->net_dev);
800 }
801
802 /* Status message for kernel log */
803 if (link_state->up) {
804 netif_info(efx, link, efx->net_dev,
805 "link up at %uMbps %s-duplex (MTU %d)%s\n",
806 link_state->speed, link_state->fd ? "full" : "half",
807 efx->net_dev->mtu,
808 (efx->promiscuous ? " [PROMISC]" : ""));
809 } else {
810 netif_info(efx, link, efx->net_dev, "link down\n");
811 }
812
813 }
814
815 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
816 {
817 efx->link_advertising = advertising;
818 if (advertising) {
819 if (advertising & ADVERTISED_Pause)
820 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
821 else
822 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
823 if (advertising & ADVERTISED_Asym_Pause)
824 efx->wanted_fc ^= EFX_FC_TX;
825 }
826 }
827
828 void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
829 {
830 efx->wanted_fc = wanted_fc;
831 if (efx->link_advertising) {
832 if (wanted_fc & EFX_FC_RX)
833 efx->link_advertising |= (ADVERTISED_Pause |
834 ADVERTISED_Asym_Pause);
835 else
836 efx->link_advertising &= ~(ADVERTISED_Pause |
837 ADVERTISED_Asym_Pause);
838 if (wanted_fc & EFX_FC_TX)
839 efx->link_advertising ^= ADVERTISED_Asym_Pause;
840 }
841 }
842
843 static void efx_fini_port(struct efx_nic *efx);
844
845 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
846 * the MAC appropriately. All other PHY configuration changes are pushed
847 * through phy_op->set_settings(), and pushed asynchronously to the MAC
848 * through efx_monitor().
849 *
850 * Callers must hold the mac_lock
851 */
852 int __efx_reconfigure_port(struct efx_nic *efx)
853 {
854 enum efx_phy_mode phy_mode;
855 int rc;
856
857 WARN_ON(!mutex_is_locked(&efx->mac_lock));
858
859 /* Serialise the promiscuous flag with efx_set_multicast_list. */
860 if (efx_dev_registered(efx)) {
861 netif_addr_lock_bh(efx->net_dev);
862 netif_addr_unlock_bh(efx->net_dev);
863 }
864
865 /* Disable PHY transmit in mac level loopbacks */
866 phy_mode = efx->phy_mode;
867 if (LOOPBACK_INTERNAL(efx))
868 efx->phy_mode |= PHY_MODE_TX_DISABLED;
869 else
870 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
871
872 rc = efx->type->reconfigure_port(efx);
873
874 if (rc)
875 efx->phy_mode = phy_mode;
876
877 return rc;
878 }
879
880 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
881 * disabled. */
882 int efx_reconfigure_port(struct efx_nic *efx)
883 {
884 int rc;
885
886 EFX_ASSERT_RESET_SERIALISED(efx);
887
888 mutex_lock(&efx->mac_lock);
889 rc = __efx_reconfigure_port(efx);
890 mutex_unlock(&efx->mac_lock);
891
892 return rc;
893 }
894
895 /* Asynchronous work item for changing MAC promiscuity and multicast
896 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
897 * MAC directly. */
898 static void efx_mac_work(struct work_struct *data)
899 {
900 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
901
902 mutex_lock(&efx->mac_lock);
903 if (efx->port_enabled) {
904 efx->type->push_multicast_hash(efx);
905 efx->mac_op->reconfigure(efx);
906 }
907 mutex_unlock(&efx->mac_lock);
908 }
909
910 static int efx_probe_port(struct efx_nic *efx)
911 {
912 unsigned char *perm_addr;
913 int rc;
914
915 netif_dbg(efx, probe, efx->net_dev, "create port\n");
916
917 if (phy_flash_cfg)
918 efx->phy_mode = PHY_MODE_SPECIAL;
919
920 /* Connect up MAC/PHY operations table */
921 rc = efx->type->probe_port(efx);
922 if (rc)
923 return rc;
924
925 /* Sanity check MAC address */
926 perm_addr = efx->net_dev->perm_addr;
927 if (is_valid_ether_addr(perm_addr)) {
928 memcpy(efx->net_dev->dev_addr, perm_addr, ETH_ALEN);
929 } else {
930 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
931 perm_addr);
932 if (!allow_bad_hwaddr) {
933 rc = -EINVAL;
934 goto err;
935 }
936 random_ether_addr(efx->net_dev->dev_addr);
937 netif_info(efx, probe, efx->net_dev,
938 "using locally-generated MAC %pM\n",
939 efx->net_dev->dev_addr);
940 }
941
942 return 0;
943
944 err:
945 efx->type->remove_port(efx);
946 return rc;
947 }
948
949 static int efx_init_port(struct efx_nic *efx)
950 {
951 int rc;
952
953 netif_dbg(efx, drv, efx->net_dev, "init port\n");
954
955 mutex_lock(&efx->mac_lock);
956
957 rc = efx->phy_op->init(efx);
958 if (rc)
959 goto fail1;
960
961 efx->port_initialized = true;
962
963 /* Reconfigure the MAC before creating dma queues (required for
964 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
965 efx->mac_op->reconfigure(efx);
966
967 /* Ensure the PHY advertises the correct flow control settings */
968 rc = efx->phy_op->reconfigure(efx);
969 if (rc)
970 goto fail2;
971
972 mutex_unlock(&efx->mac_lock);
973 return 0;
974
975 fail2:
976 efx->phy_op->fini(efx);
977 fail1:
978 mutex_unlock(&efx->mac_lock);
979 return rc;
980 }
981
982 static void efx_start_port(struct efx_nic *efx)
983 {
984 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
985 BUG_ON(efx->port_enabled);
986
987 mutex_lock(&efx->mac_lock);
988 efx->port_enabled = true;
989
990 /* efx_mac_work() might have been scheduled after efx_stop_port(),
991 * and then cancelled by efx_flush_all() */
992 efx->type->push_multicast_hash(efx);
993 efx->mac_op->reconfigure(efx);
994
995 mutex_unlock(&efx->mac_lock);
996 }
997
998 /* Prevent efx_mac_work() and efx_monitor() from working */
999 static void efx_stop_port(struct efx_nic *efx)
1000 {
1001 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1002
1003 mutex_lock(&efx->mac_lock);
1004 efx->port_enabled = false;
1005 mutex_unlock(&efx->mac_lock);
1006
1007 /* Serialise against efx_set_multicast_list() */
1008 if (efx_dev_registered(efx)) {
1009 netif_addr_lock_bh(efx->net_dev);
1010 netif_addr_unlock_bh(efx->net_dev);
1011 }
1012 }
1013
1014 static void efx_fini_port(struct efx_nic *efx)
1015 {
1016 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1017
1018 if (!efx->port_initialized)
1019 return;
1020
1021 efx->phy_op->fini(efx);
1022 efx->port_initialized = false;
1023
1024 efx->link_state.up = false;
1025 efx_link_status_changed(efx);
1026 }
1027
1028 static void efx_remove_port(struct efx_nic *efx)
1029 {
1030 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1031
1032 efx->type->remove_port(efx);
1033 }
1034
1035 /**************************************************************************
1036 *
1037 * NIC handling
1038 *
1039 **************************************************************************/
1040
1041 /* This configures the PCI device to enable I/O and DMA. */
1042 static int efx_init_io(struct efx_nic *efx)
1043 {
1044 struct pci_dev *pci_dev = efx->pci_dev;
1045 dma_addr_t dma_mask = efx->type->max_dma_mask;
1046 int rc;
1047
1048 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1049
1050 rc = pci_enable_device(pci_dev);
1051 if (rc) {
1052 netif_err(efx, probe, efx->net_dev,
1053 "failed to enable PCI device\n");
1054 goto fail1;
1055 }
1056
1057 pci_set_master(pci_dev);
1058
1059 /* Set the PCI DMA mask. Try all possibilities from our
1060 * genuine mask down to 32 bits, because some architectures
1061 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1062 * masks event though they reject 46 bit masks.
1063 */
1064 while (dma_mask > 0x7fffffffUL) {
1065 if (pci_dma_supported(pci_dev, dma_mask) &&
1066 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
1067 break;
1068 dma_mask >>= 1;
1069 }
1070 if (rc) {
1071 netif_err(efx, probe, efx->net_dev,
1072 "could not find a suitable DMA mask\n");
1073 goto fail2;
1074 }
1075 netif_dbg(efx, probe, efx->net_dev,
1076 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1077 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1078 if (rc) {
1079 /* pci_set_consistent_dma_mask() is not *allowed* to
1080 * fail with a mask that pci_set_dma_mask() accepted,
1081 * but just in case...
1082 */
1083 netif_err(efx, probe, efx->net_dev,
1084 "failed to set consistent DMA mask\n");
1085 goto fail2;
1086 }
1087
1088 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1089 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1090 if (rc) {
1091 netif_err(efx, probe, efx->net_dev,
1092 "request for memory BAR failed\n");
1093 rc = -EIO;
1094 goto fail3;
1095 }
1096 efx->membase = ioremap_nocache(efx->membase_phys,
1097 efx->type->mem_map_size);
1098 if (!efx->membase) {
1099 netif_err(efx, probe, efx->net_dev,
1100 "could not map memory BAR at %llx+%x\n",
1101 (unsigned long long)efx->membase_phys,
1102 efx->type->mem_map_size);
1103 rc = -ENOMEM;
1104 goto fail4;
1105 }
1106 netif_dbg(efx, probe, efx->net_dev,
1107 "memory BAR at %llx+%x (virtual %p)\n",
1108 (unsigned long long)efx->membase_phys,
1109 efx->type->mem_map_size, efx->membase);
1110
1111 return 0;
1112
1113 fail4:
1114 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1115 fail3:
1116 efx->membase_phys = 0;
1117 fail2:
1118 pci_disable_device(efx->pci_dev);
1119 fail1:
1120 return rc;
1121 }
1122
1123 static void efx_fini_io(struct efx_nic *efx)
1124 {
1125 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1126
1127 if (efx->membase) {
1128 iounmap(efx->membase);
1129 efx->membase = NULL;
1130 }
1131
1132 if (efx->membase_phys) {
1133 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1134 efx->membase_phys = 0;
1135 }
1136
1137 pci_disable_device(efx->pci_dev);
1138 }
1139
1140 /* Get number of channels wanted. Each channel will have its own IRQ,
1141 * 1 RX queue and/or 2 TX queues. */
1142 static int efx_wanted_channels(void)
1143 {
1144 cpumask_var_t core_mask;
1145 int count;
1146 int cpu;
1147
1148 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
1149 printk(KERN_WARNING
1150 "sfc: RSS disabled due to allocation failure\n");
1151 return 1;
1152 }
1153
1154 count = 0;
1155 for_each_online_cpu(cpu) {
1156 if (!cpumask_test_cpu(cpu, core_mask)) {
1157 ++count;
1158 cpumask_or(core_mask, core_mask,
1159 topology_core_cpumask(cpu));
1160 }
1161 }
1162
1163 free_cpumask_var(core_mask);
1164 return count;
1165 }
1166
1167 /* Probe the number and type of interrupts we are able to obtain, and
1168 * the resulting numbers of channels and RX queues.
1169 */
1170 static void efx_probe_interrupts(struct efx_nic *efx)
1171 {
1172 int max_channels =
1173 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1174 int rc, i;
1175
1176 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1177 struct msix_entry xentries[EFX_MAX_CHANNELS];
1178 int n_channels;
1179
1180 n_channels = efx_wanted_channels();
1181 if (separate_tx_channels)
1182 n_channels *= 2;
1183 n_channels = min(n_channels, max_channels);
1184
1185 for (i = 0; i < n_channels; i++)
1186 xentries[i].entry = i;
1187 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1188 if (rc > 0) {
1189 netif_err(efx, drv, efx->net_dev,
1190 "WARNING: Insufficient MSI-X vectors"
1191 " available (%d < %d).\n", rc, n_channels);
1192 netif_err(efx, drv, efx->net_dev,
1193 "WARNING: Performance may be reduced.\n");
1194 EFX_BUG_ON_PARANOID(rc >= n_channels);
1195 n_channels = rc;
1196 rc = pci_enable_msix(efx->pci_dev, xentries,
1197 n_channels);
1198 }
1199
1200 if (rc == 0) {
1201 efx->n_channels = n_channels;
1202 if (separate_tx_channels) {
1203 efx->n_tx_channels =
1204 max(efx->n_channels / 2, 1U);
1205 efx->n_rx_channels =
1206 max(efx->n_channels -
1207 efx->n_tx_channels, 1U);
1208 } else {
1209 efx->n_tx_channels = efx->n_channels;
1210 efx->n_rx_channels = efx->n_channels;
1211 }
1212 for (i = 0; i < n_channels; i++)
1213 efx_get_channel(efx, i)->irq =
1214 xentries[i].vector;
1215 } else {
1216 /* Fall back to single channel MSI */
1217 efx->interrupt_mode = EFX_INT_MODE_MSI;
1218 netif_err(efx, drv, efx->net_dev,
1219 "could not enable MSI-X\n");
1220 }
1221 }
1222
1223 /* Try single interrupt MSI */
1224 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1225 efx->n_channels = 1;
1226 efx->n_rx_channels = 1;
1227 efx->n_tx_channels = 1;
1228 rc = pci_enable_msi(efx->pci_dev);
1229 if (rc == 0) {
1230 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1231 } else {
1232 netif_err(efx, drv, efx->net_dev,
1233 "could not enable MSI\n");
1234 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1235 }
1236 }
1237
1238 /* Assume legacy interrupts */
1239 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1240 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1241 efx->n_rx_channels = 1;
1242 efx->n_tx_channels = 1;
1243 efx->legacy_irq = efx->pci_dev->irq;
1244 }
1245 }
1246
1247 static void efx_remove_interrupts(struct efx_nic *efx)
1248 {
1249 struct efx_channel *channel;
1250
1251 /* Remove MSI/MSI-X interrupts */
1252 efx_for_each_channel(channel, efx)
1253 channel->irq = 0;
1254 pci_disable_msi(efx->pci_dev);
1255 pci_disable_msix(efx->pci_dev);
1256
1257 /* Remove legacy interrupt */
1258 efx->legacy_irq = 0;
1259 }
1260
1261 struct efx_tx_queue *
1262 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1263 {
1264 unsigned tx_channel_offset =
1265 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1266 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1267 type >= EFX_TXQ_TYPES);
1268 return &efx->channel[tx_channel_offset + index]->tx_queue[type];
1269 }
1270
1271 static void efx_set_channels(struct efx_nic *efx)
1272 {
1273 struct efx_channel *channel;
1274 struct efx_tx_queue *tx_queue;
1275 unsigned tx_channel_offset =
1276 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1277
1278 /* Channel pointers were set in efx_init_struct() but we now
1279 * need to clear them for TX queues in any RX-only channels. */
1280 efx_for_each_channel(channel, efx) {
1281 if (channel->channel - tx_channel_offset >=
1282 efx->n_tx_channels) {
1283 efx_for_each_channel_tx_queue(tx_queue, channel)
1284 tx_queue->channel = NULL;
1285 }
1286 }
1287 }
1288
1289 static int efx_probe_nic(struct efx_nic *efx)
1290 {
1291 size_t i;
1292 int rc;
1293
1294 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1295
1296 /* Carry out hardware-type specific initialisation */
1297 rc = efx->type->probe(efx);
1298 if (rc)
1299 return rc;
1300
1301 /* Determine the number of channels and queues by trying to hook
1302 * in MSI-X interrupts. */
1303 efx_probe_interrupts(efx);
1304
1305 if (efx->n_channels > 1)
1306 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1307 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1308 efx->rx_indir_table[i] = i % efx->n_rx_channels;
1309
1310 efx_set_channels(efx);
1311 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1312 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1313
1314 /* Initialise the interrupt moderation settings */
1315 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1316
1317 return 0;
1318 }
1319
1320 static void efx_remove_nic(struct efx_nic *efx)
1321 {
1322 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1323
1324 efx_remove_interrupts(efx);
1325 efx->type->remove(efx);
1326 }
1327
1328 /**************************************************************************
1329 *
1330 * NIC startup/shutdown
1331 *
1332 *************************************************************************/
1333
1334 static int efx_probe_all(struct efx_nic *efx)
1335 {
1336 int rc;
1337
1338 rc = efx_probe_nic(efx);
1339 if (rc) {
1340 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1341 goto fail1;
1342 }
1343
1344 rc = efx_probe_port(efx);
1345 if (rc) {
1346 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1347 goto fail2;
1348 }
1349
1350 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1351 rc = efx_probe_channels(efx);
1352 if (rc)
1353 goto fail3;
1354
1355 rc = efx_probe_filters(efx);
1356 if (rc) {
1357 netif_err(efx, probe, efx->net_dev,
1358 "failed to create filter tables\n");
1359 goto fail4;
1360 }
1361
1362 return 0;
1363
1364 fail4:
1365 efx_remove_channels(efx);
1366 fail3:
1367 efx_remove_port(efx);
1368 fail2:
1369 efx_remove_nic(efx);
1370 fail1:
1371 return rc;
1372 }
1373
1374 /* Called after previous invocation(s) of efx_stop_all, restarts the
1375 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1376 * and ensures that the port is scheduled to be reconfigured.
1377 * This function is safe to call multiple times when the NIC is in any
1378 * state. */
1379 static void efx_start_all(struct efx_nic *efx)
1380 {
1381 struct efx_channel *channel;
1382
1383 EFX_ASSERT_RESET_SERIALISED(efx);
1384
1385 /* Check that it is appropriate to restart the interface. All
1386 * of these flags are safe to read under just the rtnl lock */
1387 if (efx->port_enabled)
1388 return;
1389 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1390 return;
1391 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1392 return;
1393
1394 /* Mark the port as enabled so port reconfigurations can start, then
1395 * restart the transmit interface early so the watchdog timer stops */
1396 efx_start_port(efx);
1397
1398 efx_for_each_channel(channel, efx) {
1399 if (efx_dev_registered(efx))
1400 efx_wake_queue(channel);
1401 efx_start_channel(channel);
1402 }
1403
1404 efx_nic_enable_interrupts(efx);
1405
1406 /* Switch to event based MCDI completions after enabling interrupts.
1407 * If a reset has been scheduled, then we need to stay in polled mode.
1408 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1409 * reset_pending [modified from an atomic context], we instead guarantee
1410 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1411 efx_mcdi_mode_event(efx);
1412 if (efx->reset_pending != RESET_TYPE_NONE)
1413 efx_mcdi_mode_poll(efx);
1414
1415 /* Start the hardware monitor if there is one. Otherwise (we're link
1416 * event driven), we have to poll the PHY because after an event queue
1417 * flush, we could have a missed a link state change */
1418 if (efx->type->monitor != NULL) {
1419 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1420 efx_monitor_interval);
1421 } else {
1422 mutex_lock(&efx->mac_lock);
1423 if (efx->phy_op->poll(efx))
1424 efx_link_status_changed(efx);
1425 mutex_unlock(&efx->mac_lock);
1426 }
1427
1428 efx->type->start_stats(efx);
1429 }
1430
1431 /* Flush all delayed work. Should only be called when no more delayed work
1432 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1433 * since we're holding the rtnl_lock at this point. */
1434 static void efx_flush_all(struct efx_nic *efx)
1435 {
1436 /* Make sure the hardware monitor is stopped */
1437 cancel_delayed_work_sync(&efx->monitor_work);
1438 /* Stop scheduled port reconfigurations */
1439 cancel_work_sync(&efx->mac_work);
1440 }
1441
1442 /* Quiesce hardware and software without bringing the link down.
1443 * Safe to call multiple times, when the nic and interface is in any
1444 * state. The caller is guaranteed to subsequently be in a position
1445 * to modify any hardware and software state they see fit without
1446 * taking locks. */
1447 static void efx_stop_all(struct efx_nic *efx)
1448 {
1449 struct efx_channel *channel;
1450
1451 EFX_ASSERT_RESET_SERIALISED(efx);
1452
1453 /* port_enabled can be read safely under the rtnl lock */
1454 if (!efx->port_enabled)
1455 return;
1456
1457 efx->type->stop_stats(efx);
1458
1459 /* Switch to MCDI polling on Siena before disabling interrupts */
1460 efx_mcdi_mode_poll(efx);
1461
1462 /* Disable interrupts and wait for ISR to complete */
1463 efx_nic_disable_interrupts(efx);
1464 if (efx->legacy_irq)
1465 synchronize_irq(efx->legacy_irq);
1466 efx_for_each_channel(channel, efx) {
1467 if (channel->irq)
1468 synchronize_irq(channel->irq);
1469 }
1470
1471 /* Stop all NAPI processing and synchronous rx refills */
1472 efx_for_each_channel(channel, efx)
1473 efx_stop_channel(channel);
1474
1475 /* Stop all asynchronous port reconfigurations. Since all
1476 * event processing has already been stopped, there is no
1477 * window to loose phy events */
1478 efx_stop_port(efx);
1479
1480 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1481 efx_flush_all(efx);
1482
1483 /* Stop the kernel transmit interface late, so the watchdog
1484 * timer isn't ticking over the flush */
1485 if (efx_dev_registered(efx)) {
1486 struct efx_channel *channel;
1487 efx_for_each_channel(channel, efx)
1488 efx_stop_queue(channel);
1489 netif_tx_lock_bh(efx->net_dev);
1490 netif_tx_unlock_bh(efx->net_dev);
1491 }
1492 }
1493
1494 static void efx_remove_all(struct efx_nic *efx)
1495 {
1496 efx_remove_filters(efx);
1497 efx_remove_channels(efx);
1498 efx_remove_port(efx);
1499 efx_remove_nic(efx);
1500 }
1501
1502 /**************************************************************************
1503 *
1504 * Interrupt moderation
1505 *
1506 **************************************************************************/
1507
1508 static unsigned irq_mod_ticks(int usecs, int resolution)
1509 {
1510 if (usecs <= 0)
1511 return 0; /* cannot receive interrupts ahead of time :-) */
1512 if (usecs < resolution)
1513 return 1; /* never round down to 0 */
1514 return usecs / resolution;
1515 }
1516
1517 /* Set interrupt moderation parameters */
1518 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1519 bool rx_adaptive)
1520 {
1521 struct efx_channel *channel;
1522 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1523 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1524
1525 EFX_ASSERT_RESET_SERIALISED(efx);
1526
1527 efx->irq_rx_adaptive = rx_adaptive;
1528 efx->irq_rx_moderation = rx_ticks;
1529 efx_for_each_channel(channel, efx) {
1530 if (efx_channel_get_rx_queue(channel))
1531 channel->irq_moderation = rx_ticks;
1532 else if (efx_channel_get_tx_queue(channel, 0))
1533 channel->irq_moderation = tx_ticks;
1534 }
1535 }
1536
1537 /**************************************************************************
1538 *
1539 * Hardware monitor
1540 *
1541 **************************************************************************/
1542
1543 /* Run periodically off the general workqueue */
1544 static void efx_monitor(struct work_struct *data)
1545 {
1546 struct efx_nic *efx = container_of(data, struct efx_nic,
1547 monitor_work.work);
1548
1549 netif_vdbg(efx, timer, efx->net_dev,
1550 "hardware monitor executing on CPU %d\n",
1551 raw_smp_processor_id());
1552 BUG_ON(efx->type->monitor == NULL);
1553
1554 /* If the mac_lock is already held then it is likely a port
1555 * reconfiguration is already in place, which will likely do
1556 * most of the work of monitor() anyway. */
1557 if (mutex_trylock(&efx->mac_lock)) {
1558 if (efx->port_enabled)
1559 efx->type->monitor(efx);
1560 mutex_unlock(&efx->mac_lock);
1561 }
1562
1563 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1564 efx_monitor_interval);
1565 }
1566
1567 /**************************************************************************
1568 *
1569 * ioctls
1570 *
1571 *************************************************************************/
1572
1573 /* Net device ioctl
1574 * Context: process, rtnl_lock() held.
1575 */
1576 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1577 {
1578 struct efx_nic *efx = netdev_priv(net_dev);
1579 struct mii_ioctl_data *data = if_mii(ifr);
1580
1581 EFX_ASSERT_RESET_SERIALISED(efx);
1582
1583 /* Convert phy_id from older PRTAD/DEVAD format */
1584 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1585 (data->phy_id & 0xfc00) == 0x0400)
1586 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1587
1588 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1589 }
1590
1591 /**************************************************************************
1592 *
1593 * NAPI interface
1594 *
1595 **************************************************************************/
1596
1597 static int efx_init_napi(struct efx_nic *efx)
1598 {
1599 struct efx_channel *channel;
1600
1601 efx_for_each_channel(channel, efx) {
1602 channel->napi_dev = efx->net_dev;
1603 netif_napi_add(channel->napi_dev, &channel->napi_str,
1604 efx_poll, napi_weight);
1605 }
1606 return 0;
1607 }
1608
1609 static void efx_fini_napi(struct efx_nic *efx)
1610 {
1611 struct efx_channel *channel;
1612
1613 efx_for_each_channel(channel, efx) {
1614 if (channel->napi_dev)
1615 netif_napi_del(&channel->napi_str);
1616 channel->napi_dev = NULL;
1617 }
1618 }
1619
1620 /**************************************************************************
1621 *
1622 * Kernel netpoll interface
1623 *
1624 *************************************************************************/
1625
1626 #ifdef CONFIG_NET_POLL_CONTROLLER
1627
1628 /* Although in the common case interrupts will be disabled, this is not
1629 * guaranteed. However, all our work happens inside the NAPI callback,
1630 * so no locking is required.
1631 */
1632 static void efx_netpoll(struct net_device *net_dev)
1633 {
1634 struct efx_nic *efx = netdev_priv(net_dev);
1635 struct efx_channel *channel;
1636
1637 efx_for_each_channel(channel, efx)
1638 efx_schedule_channel(channel);
1639 }
1640
1641 #endif
1642
1643 /**************************************************************************
1644 *
1645 * Kernel net device interface
1646 *
1647 *************************************************************************/
1648
1649 /* Context: process, rtnl_lock() held. */
1650 static int efx_net_open(struct net_device *net_dev)
1651 {
1652 struct efx_nic *efx = netdev_priv(net_dev);
1653 EFX_ASSERT_RESET_SERIALISED(efx);
1654
1655 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1656 raw_smp_processor_id());
1657
1658 if (efx->state == STATE_DISABLED)
1659 return -EIO;
1660 if (efx->phy_mode & PHY_MODE_SPECIAL)
1661 return -EBUSY;
1662 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1663 return -EIO;
1664
1665 /* Notify the kernel of the link state polled during driver load,
1666 * before the monitor starts running */
1667 efx_link_status_changed(efx);
1668
1669 efx_start_all(efx);
1670 return 0;
1671 }
1672
1673 /* Context: process, rtnl_lock() held.
1674 * Note that the kernel will ignore our return code; this method
1675 * should really be a void.
1676 */
1677 static int efx_net_stop(struct net_device *net_dev)
1678 {
1679 struct efx_nic *efx = netdev_priv(net_dev);
1680
1681 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1682 raw_smp_processor_id());
1683
1684 if (efx->state != STATE_DISABLED) {
1685 /* Stop the device and flush all the channels */
1686 efx_stop_all(efx);
1687 efx_fini_channels(efx);
1688 efx_init_channels(efx);
1689 }
1690
1691 return 0;
1692 }
1693
1694 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1695 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1696 {
1697 struct efx_nic *efx = netdev_priv(net_dev);
1698 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1699
1700 spin_lock_bh(&efx->stats_lock);
1701 efx->type->update_stats(efx);
1702 spin_unlock_bh(&efx->stats_lock);
1703
1704 stats->rx_packets = mac_stats->rx_packets;
1705 stats->tx_packets = mac_stats->tx_packets;
1706 stats->rx_bytes = mac_stats->rx_bytes;
1707 stats->tx_bytes = mac_stats->tx_bytes;
1708 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1709 stats->multicast = mac_stats->rx_multicast;
1710 stats->collisions = mac_stats->tx_collision;
1711 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1712 mac_stats->rx_length_error);
1713 stats->rx_crc_errors = mac_stats->rx_bad;
1714 stats->rx_frame_errors = mac_stats->rx_align_error;
1715 stats->rx_fifo_errors = mac_stats->rx_overflow;
1716 stats->rx_missed_errors = mac_stats->rx_missed;
1717 stats->tx_window_errors = mac_stats->tx_late_collision;
1718
1719 stats->rx_errors = (stats->rx_length_errors +
1720 stats->rx_crc_errors +
1721 stats->rx_frame_errors +
1722 mac_stats->rx_symbol_error);
1723 stats->tx_errors = (stats->tx_window_errors +
1724 mac_stats->tx_bad);
1725
1726 return stats;
1727 }
1728
1729 /* Context: netif_tx_lock held, BHs disabled. */
1730 static void efx_watchdog(struct net_device *net_dev)
1731 {
1732 struct efx_nic *efx = netdev_priv(net_dev);
1733
1734 netif_err(efx, tx_err, efx->net_dev,
1735 "TX stuck with port_enabled=%d: resetting channels\n",
1736 efx->port_enabled);
1737
1738 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1739 }
1740
1741
1742 /* Context: process, rtnl_lock() held. */
1743 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1744 {
1745 struct efx_nic *efx = netdev_priv(net_dev);
1746 int rc = 0;
1747
1748 EFX_ASSERT_RESET_SERIALISED(efx);
1749
1750 if (new_mtu > EFX_MAX_MTU)
1751 return -EINVAL;
1752
1753 efx_stop_all(efx);
1754
1755 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1756
1757 efx_fini_channels(efx);
1758
1759 mutex_lock(&efx->mac_lock);
1760 /* Reconfigure the MAC before enabling the dma queues so that
1761 * the RX buffers don't overflow */
1762 net_dev->mtu = new_mtu;
1763 efx->mac_op->reconfigure(efx);
1764 mutex_unlock(&efx->mac_lock);
1765
1766 efx_init_channels(efx);
1767
1768 efx_start_all(efx);
1769 return rc;
1770 }
1771
1772 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1773 {
1774 struct efx_nic *efx = netdev_priv(net_dev);
1775 struct sockaddr *addr = data;
1776 char *new_addr = addr->sa_data;
1777
1778 EFX_ASSERT_RESET_SERIALISED(efx);
1779
1780 if (!is_valid_ether_addr(new_addr)) {
1781 netif_err(efx, drv, efx->net_dev,
1782 "invalid ethernet MAC address requested: %pM\n",
1783 new_addr);
1784 return -EINVAL;
1785 }
1786
1787 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1788
1789 /* Reconfigure the MAC */
1790 mutex_lock(&efx->mac_lock);
1791 efx->mac_op->reconfigure(efx);
1792 mutex_unlock(&efx->mac_lock);
1793
1794 return 0;
1795 }
1796
1797 /* Context: netif_addr_lock held, BHs disabled. */
1798 static void efx_set_multicast_list(struct net_device *net_dev)
1799 {
1800 struct efx_nic *efx = netdev_priv(net_dev);
1801 struct netdev_hw_addr *ha;
1802 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1803 u32 crc;
1804 int bit;
1805
1806 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1807
1808 /* Build multicast hash table */
1809 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1810 memset(mc_hash, 0xff, sizeof(*mc_hash));
1811 } else {
1812 memset(mc_hash, 0x00, sizeof(*mc_hash));
1813 netdev_for_each_mc_addr(ha, net_dev) {
1814 crc = ether_crc_le(ETH_ALEN, ha->addr);
1815 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1816 set_bit_le(bit, mc_hash->byte);
1817 }
1818
1819 /* Broadcast packets go through the multicast hash filter.
1820 * ether_crc_le() of the broadcast address is 0xbe2612ff
1821 * so we always add bit 0xff to the mask.
1822 */
1823 set_bit_le(0xff, mc_hash->byte);
1824 }
1825
1826 if (efx->port_enabled)
1827 queue_work(efx->workqueue, &efx->mac_work);
1828 /* Otherwise efx_start_port() will do this */
1829 }
1830
1831 static const struct net_device_ops efx_netdev_ops = {
1832 .ndo_open = efx_net_open,
1833 .ndo_stop = efx_net_stop,
1834 .ndo_get_stats64 = efx_net_stats,
1835 .ndo_tx_timeout = efx_watchdog,
1836 .ndo_start_xmit = efx_hard_start_xmit,
1837 .ndo_validate_addr = eth_validate_addr,
1838 .ndo_do_ioctl = efx_ioctl,
1839 .ndo_change_mtu = efx_change_mtu,
1840 .ndo_set_mac_address = efx_set_mac_address,
1841 .ndo_set_multicast_list = efx_set_multicast_list,
1842 #ifdef CONFIG_NET_POLL_CONTROLLER
1843 .ndo_poll_controller = efx_netpoll,
1844 #endif
1845 };
1846
1847 static void efx_update_name(struct efx_nic *efx)
1848 {
1849 strcpy(efx->name, efx->net_dev->name);
1850 efx_mtd_rename(efx);
1851 efx_set_channel_names(efx);
1852 }
1853
1854 static int efx_netdev_event(struct notifier_block *this,
1855 unsigned long event, void *ptr)
1856 {
1857 struct net_device *net_dev = ptr;
1858
1859 if (net_dev->netdev_ops == &efx_netdev_ops &&
1860 event == NETDEV_CHANGENAME)
1861 efx_update_name(netdev_priv(net_dev));
1862
1863 return NOTIFY_DONE;
1864 }
1865
1866 static struct notifier_block efx_netdev_notifier = {
1867 .notifier_call = efx_netdev_event,
1868 };
1869
1870 static ssize_t
1871 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1872 {
1873 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1874 return sprintf(buf, "%d\n", efx->phy_type);
1875 }
1876 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1877
1878 static int efx_register_netdev(struct efx_nic *efx)
1879 {
1880 struct net_device *net_dev = efx->net_dev;
1881 int rc;
1882
1883 net_dev->watchdog_timeo = 5 * HZ;
1884 net_dev->irq = efx->pci_dev->irq;
1885 net_dev->netdev_ops = &efx_netdev_ops;
1886 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1887
1888 /* Clear MAC statistics */
1889 efx->mac_op->update_stats(efx);
1890 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1891
1892 rtnl_lock();
1893
1894 rc = dev_alloc_name(net_dev, net_dev->name);
1895 if (rc < 0)
1896 goto fail_locked;
1897 efx_update_name(efx);
1898
1899 rc = register_netdevice(net_dev);
1900 if (rc)
1901 goto fail_locked;
1902
1903 /* Always start with carrier off; PHY events will detect the link */
1904 netif_carrier_off(efx->net_dev);
1905
1906 rtnl_unlock();
1907
1908 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1909 if (rc) {
1910 netif_err(efx, drv, efx->net_dev,
1911 "failed to init net dev attributes\n");
1912 goto fail_registered;
1913 }
1914
1915 return 0;
1916
1917 fail_locked:
1918 rtnl_unlock();
1919 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1920 return rc;
1921
1922 fail_registered:
1923 unregister_netdev(net_dev);
1924 return rc;
1925 }
1926
1927 static void efx_unregister_netdev(struct efx_nic *efx)
1928 {
1929 struct efx_channel *channel;
1930 struct efx_tx_queue *tx_queue;
1931
1932 if (!efx->net_dev)
1933 return;
1934
1935 BUG_ON(netdev_priv(efx->net_dev) != efx);
1936
1937 /* Free up any skbs still remaining. This has to happen before
1938 * we try to unregister the netdev as running their destructors
1939 * may be needed to get the device ref. count to 0. */
1940 efx_for_each_channel(channel, efx) {
1941 efx_for_each_channel_tx_queue(tx_queue, channel)
1942 efx_release_tx_buffers(tx_queue);
1943 }
1944
1945 if (efx_dev_registered(efx)) {
1946 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1947 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1948 unregister_netdev(efx->net_dev);
1949 }
1950 }
1951
1952 /**************************************************************************
1953 *
1954 * Device reset and suspend
1955 *
1956 **************************************************************************/
1957
1958 /* Tears down the entire software state and most of the hardware state
1959 * before reset. */
1960 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
1961 {
1962 EFX_ASSERT_RESET_SERIALISED(efx);
1963
1964 efx_stop_all(efx);
1965 mutex_lock(&efx->mac_lock);
1966
1967 efx_fini_channels(efx);
1968 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1969 efx->phy_op->fini(efx);
1970 efx->type->fini(efx);
1971 }
1972
1973 /* This function will always ensure that the locks acquired in
1974 * efx_reset_down() are released. A failure return code indicates
1975 * that we were unable to reinitialise the hardware, and the
1976 * driver should be disabled. If ok is false, then the rx and tx
1977 * engines are not restarted, pending a RESET_DISABLE. */
1978 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
1979 {
1980 int rc;
1981
1982 EFX_ASSERT_RESET_SERIALISED(efx);
1983
1984 rc = efx->type->init(efx);
1985 if (rc) {
1986 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
1987 goto fail;
1988 }
1989
1990 if (!ok)
1991 goto fail;
1992
1993 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
1994 rc = efx->phy_op->init(efx);
1995 if (rc)
1996 goto fail;
1997 if (efx->phy_op->reconfigure(efx))
1998 netif_err(efx, drv, efx->net_dev,
1999 "could not restore PHY settings\n");
2000 }
2001
2002 efx->mac_op->reconfigure(efx);
2003
2004 efx_init_channels(efx);
2005 efx_restore_filters(efx);
2006
2007 mutex_unlock(&efx->mac_lock);
2008
2009 efx_start_all(efx);
2010
2011 return 0;
2012
2013 fail:
2014 efx->port_initialized = false;
2015
2016 mutex_unlock(&efx->mac_lock);
2017
2018 return rc;
2019 }
2020
2021 /* Reset the NIC using the specified method. Note that the reset may
2022 * fail, in which case the card will be left in an unusable state.
2023 *
2024 * Caller must hold the rtnl_lock.
2025 */
2026 int efx_reset(struct efx_nic *efx, enum reset_type method)
2027 {
2028 int rc, rc2;
2029 bool disabled;
2030
2031 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2032 RESET_TYPE(method));
2033
2034 efx_reset_down(efx, method);
2035
2036 rc = efx->type->reset(efx, method);
2037 if (rc) {
2038 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2039 goto out;
2040 }
2041
2042 /* Allow resets to be rescheduled. */
2043 efx->reset_pending = RESET_TYPE_NONE;
2044
2045 /* Reinitialise bus-mastering, which may have been turned off before
2046 * the reset was scheduled. This is still appropriate, even in the
2047 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2048 * can respond to requests. */
2049 pci_set_master(efx->pci_dev);
2050
2051 out:
2052 /* Leave device stopped if necessary */
2053 disabled = rc || method == RESET_TYPE_DISABLE;
2054 rc2 = efx_reset_up(efx, method, !disabled);
2055 if (rc2) {
2056 disabled = true;
2057 if (!rc)
2058 rc = rc2;
2059 }
2060
2061 if (disabled) {
2062 dev_close(efx->net_dev);
2063 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2064 efx->state = STATE_DISABLED;
2065 } else {
2066 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2067 }
2068 return rc;
2069 }
2070
2071 /* The worker thread exists so that code that cannot sleep can
2072 * schedule a reset for later.
2073 */
2074 static void efx_reset_work(struct work_struct *data)
2075 {
2076 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2077
2078 if (efx->reset_pending == RESET_TYPE_NONE)
2079 return;
2080
2081 /* If we're not RUNNING then don't reset. Leave the reset_pending
2082 * flag set so that efx_pci_probe_main will be retried */
2083 if (efx->state != STATE_RUNNING) {
2084 netif_info(efx, drv, efx->net_dev,
2085 "scheduled reset quenched. NIC not RUNNING\n");
2086 return;
2087 }
2088
2089 rtnl_lock();
2090 (void)efx_reset(efx, efx->reset_pending);
2091 rtnl_unlock();
2092 }
2093
2094 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2095 {
2096 enum reset_type method;
2097
2098 if (efx->reset_pending != RESET_TYPE_NONE) {
2099 netif_info(efx, drv, efx->net_dev,
2100 "quenching already scheduled reset\n");
2101 return;
2102 }
2103
2104 switch (type) {
2105 case RESET_TYPE_INVISIBLE:
2106 case RESET_TYPE_ALL:
2107 case RESET_TYPE_WORLD:
2108 case RESET_TYPE_DISABLE:
2109 method = type;
2110 break;
2111 case RESET_TYPE_RX_RECOVERY:
2112 case RESET_TYPE_RX_DESC_FETCH:
2113 case RESET_TYPE_TX_DESC_FETCH:
2114 case RESET_TYPE_TX_SKIP:
2115 method = RESET_TYPE_INVISIBLE;
2116 break;
2117 case RESET_TYPE_MC_FAILURE:
2118 default:
2119 method = RESET_TYPE_ALL;
2120 break;
2121 }
2122
2123 if (method != type)
2124 netif_dbg(efx, drv, efx->net_dev,
2125 "scheduling %s reset for %s\n",
2126 RESET_TYPE(method), RESET_TYPE(type));
2127 else
2128 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2129 RESET_TYPE(method));
2130
2131 efx->reset_pending = method;
2132
2133 /* efx_process_channel() will no longer read events once a
2134 * reset is scheduled. So switch back to poll'd MCDI completions. */
2135 efx_mcdi_mode_poll(efx);
2136
2137 queue_work(reset_workqueue, &efx->reset_work);
2138 }
2139
2140 /**************************************************************************
2141 *
2142 * List of NICs we support
2143 *
2144 **************************************************************************/
2145
2146 /* PCI device ID table */
2147 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2148 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
2149 .driver_data = (unsigned long) &falcon_a1_nic_type},
2150 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
2151 .driver_data = (unsigned long) &falcon_b0_nic_type},
2152 {PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
2153 .driver_data = (unsigned long) &siena_a0_nic_type},
2154 {PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
2155 .driver_data = (unsigned long) &siena_a0_nic_type},
2156 {0} /* end of list */
2157 };
2158
2159 /**************************************************************************
2160 *
2161 * Dummy PHY/MAC operations
2162 *
2163 * Can be used for some unimplemented operations
2164 * Needed so all function pointers are valid and do not have to be tested
2165 * before use
2166 *
2167 **************************************************************************/
2168 int efx_port_dummy_op_int(struct efx_nic *efx)
2169 {
2170 return 0;
2171 }
2172 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2173
2174 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2175 {
2176 return false;
2177 }
2178
2179 static struct efx_phy_operations efx_dummy_phy_operations = {
2180 .init = efx_port_dummy_op_int,
2181 .reconfigure = efx_port_dummy_op_int,
2182 .poll = efx_port_dummy_op_poll,
2183 .fini = efx_port_dummy_op_void,
2184 };
2185
2186 /**************************************************************************
2187 *
2188 * Data housekeeping
2189 *
2190 **************************************************************************/
2191
2192 /* This zeroes out and then fills in the invariants in a struct
2193 * efx_nic (including all sub-structures).
2194 */
2195 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
2196 struct pci_dev *pci_dev, struct net_device *net_dev)
2197 {
2198 int i;
2199
2200 /* Initialise common structures */
2201 memset(efx, 0, sizeof(*efx));
2202 spin_lock_init(&efx->biu_lock);
2203 #ifdef CONFIG_SFC_MTD
2204 INIT_LIST_HEAD(&efx->mtd_list);
2205 #endif
2206 INIT_WORK(&efx->reset_work, efx_reset_work);
2207 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2208 efx->pci_dev = pci_dev;
2209 efx->msg_enable = debug;
2210 efx->state = STATE_INIT;
2211 efx->reset_pending = RESET_TYPE_NONE;
2212 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2213
2214 efx->net_dev = net_dev;
2215 efx->rx_checksum_enabled = true;
2216 spin_lock_init(&efx->stats_lock);
2217 mutex_init(&efx->mac_lock);
2218 efx->mac_op = type->default_mac_ops;
2219 efx->phy_op = &efx_dummy_phy_operations;
2220 efx->mdio.dev = net_dev;
2221 INIT_WORK(&efx->mac_work, efx_mac_work);
2222
2223 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2224 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2225 if (!efx->channel[i])
2226 goto fail;
2227 }
2228
2229 efx->type = type;
2230
2231 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2232
2233 /* Higher numbered interrupt modes are less capable! */
2234 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2235 interrupt_mode);
2236
2237 /* Would be good to use the net_dev name, but we're too early */
2238 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2239 pci_name(pci_dev));
2240 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2241 if (!efx->workqueue)
2242 goto fail;
2243
2244 return 0;
2245
2246 fail:
2247 efx_fini_struct(efx);
2248 return -ENOMEM;
2249 }
2250
2251 static void efx_fini_struct(struct efx_nic *efx)
2252 {
2253 int i;
2254
2255 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2256 kfree(efx->channel[i]);
2257
2258 if (efx->workqueue) {
2259 destroy_workqueue(efx->workqueue);
2260 efx->workqueue = NULL;
2261 }
2262 }
2263
2264 /**************************************************************************
2265 *
2266 * PCI interface
2267 *
2268 **************************************************************************/
2269
2270 /* Main body of final NIC shutdown code
2271 * This is called only at module unload (or hotplug removal).
2272 */
2273 static void efx_pci_remove_main(struct efx_nic *efx)
2274 {
2275 efx_nic_fini_interrupt(efx);
2276 efx_fini_channels(efx);
2277 efx_fini_port(efx);
2278 efx->type->fini(efx);
2279 efx_fini_napi(efx);
2280 efx_remove_all(efx);
2281 }
2282
2283 /* Final NIC shutdown
2284 * This is called only at module unload (or hotplug removal).
2285 */
2286 static void efx_pci_remove(struct pci_dev *pci_dev)
2287 {
2288 struct efx_nic *efx;
2289
2290 efx = pci_get_drvdata(pci_dev);
2291 if (!efx)
2292 return;
2293
2294 /* Mark the NIC as fini, then stop the interface */
2295 rtnl_lock();
2296 efx->state = STATE_FINI;
2297 dev_close(efx->net_dev);
2298
2299 /* Allow any queued efx_resets() to complete */
2300 rtnl_unlock();
2301
2302 efx_unregister_netdev(efx);
2303
2304 efx_mtd_remove(efx);
2305
2306 /* Wait for any scheduled resets to complete. No more will be
2307 * scheduled from this point because efx_stop_all() has been
2308 * called, we are no longer registered with driverlink, and
2309 * the net_device's have been removed. */
2310 cancel_work_sync(&efx->reset_work);
2311
2312 efx_pci_remove_main(efx);
2313
2314 efx_fini_io(efx);
2315 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2316
2317 pci_set_drvdata(pci_dev, NULL);
2318 efx_fini_struct(efx);
2319 free_netdev(efx->net_dev);
2320 };
2321
2322 /* Main body of NIC initialisation
2323 * This is called at module load (or hotplug insertion, theoretically).
2324 */
2325 static int efx_pci_probe_main(struct efx_nic *efx)
2326 {
2327 int rc;
2328
2329 /* Do start-of-day initialisation */
2330 rc = efx_probe_all(efx);
2331 if (rc)
2332 goto fail1;
2333
2334 rc = efx_init_napi(efx);
2335 if (rc)
2336 goto fail2;
2337
2338 rc = efx->type->init(efx);
2339 if (rc) {
2340 netif_err(efx, probe, efx->net_dev,
2341 "failed to initialise NIC\n");
2342 goto fail3;
2343 }
2344
2345 rc = efx_init_port(efx);
2346 if (rc) {
2347 netif_err(efx, probe, efx->net_dev,
2348 "failed to initialise port\n");
2349 goto fail4;
2350 }
2351
2352 efx_init_channels(efx);
2353
2354 rc = efx_nic_init_interrupt(efx);
2355 if (rc)
2356 goto fail5;
2357
2358 return 0;
2359
2360 fail5:
2361 efx_fini_channels(efx);
2362 efx_fini_port(efx);
2363 fail4:
2364 efx->type->fini(efx);
2365 fail3:
2366 efx_fini_napi(efx);
2367 fail2:
2368 efx_remove_all(efx);
2369 fail1:
2370 return rc;
2371 }
2372
2373 /* NIC initialisation
2374 *
2375 * This is called at module load (or hotplug insertion,
2376 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2377 * sets up and registers the network devices with the kernel and hooks
2378 * the interrupt service routine. It does not prepare the device for
2379 * transmission; this is left to the first time one of the network
2380 * interfaces is brought up (i.e. efx_net_open).
2381 */
2382 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2383 const struct pci_device_id *entry)
2384 {
2385 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2386 struct net_device *net_dev;
2387 struct efx_nic *efx;
2388 int i, rc;
2389
2390 /* Allocate and initialise a struct net_device and struct efx_nic */
2391 net_dev = alloc_etherdev_mq(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES);
2392 if (!net_dev)
2393 return -ENOMEM;
2394 net_dev->features |= (type->offload_features | NETIF_F_SG |
2395 NETIF_F_HIGHDMA | NETIF_F_TSO |
2396 NETIF_F_GRO);
2397 if (type->offload_features & NETIF_F_V6_CSUM)
2398 net_dev->features |= NETIF_F_TSO6;
2399 /* Mask for features that also apply to VLAN devices */
2400 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2401 NETIF_F_HIGHDMA | NETIF_F_TSO);
2402 efx = netdev_priv(net_dev);
2403 pci_set_drvdata(pci_dev, efx);
2404 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2405 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2406 if (rc)
2407 goto fail1;
2408
2409 netif_info(efx, probe, efx->net_dev,
2410 "Solarflare Communications NIC detected\n");
2411
2412 /* Set up basic I/O (BAR mappings etc) */
2413 rc = efx_init_io(efx);
2414 if (rc)
2415 goto fail2;
2416
2417 /* No serialisation is required with the reset path because
2418 * we're in STATE_INIT. */
2419 for (i = 0; i < 5; i++) {
2420 rc = efx_pci_probe_main(efx);
2421
2422 /* Serialise against efx_reset(). No more resets will be
2423 * scheduled since efx_stop_all() has been called, and we
2424 * have not and never have been registered with either
2425 * the rtnetlink or driverlink layers. */
2426 cancel_work_sync(&efx->reset_work);
2427
2428 if (rc == 0) {
2429 if (efx->reset_pending != RESET_TYPE_NONE) {
2430 /* If there was a scheduled reset during
2431 * probe, the NIC is probably hosed anyway */
2432 efx_pci_remove_main(efx);
2433 rc = -EIO;
2434 } else {
2435 break;
2436 }
2437 }
2438
2439 /* Retry if a recoverably reset event has been scheduled */
2440 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2441 (efx->reset_pending != RESET_TYPE_ALL))
2442 goto fail3;
2443
2444 efx->reset_pending = RESET_TYPE_NONE;
2445 }
2446
2447 if (rc) {
2448 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2449 goto fail4;
2450 }
2451
2452 /* Switch to the running state before we expose the device to the OS,
2453 * so that dev_open()|efx_start_all() will actually start the device */
2454 efx->state = STATE_RUNNING;
2455
2456 rc = efx_register_netdev(efx);
2457 if (rc)
2458 goto fail5;
2459
2460 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2461
2462 rtnl_lock();
2463 efx_mtd_probe(efx); /* allowed to fail */
2464 rtnl_unlock();
2465 return 0;
2466
2467 fail5:
2468 efx_pci_remove_main(efx);
2469 fail4:
2470 fail3:
2471 efx_fini_io(efx);
2472 fail2:
2473 efx_fini_struct(efx);
2474 fail1:
2475 WARN_ON(rc > 0);
2476 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2477 free_netdev(net_dev);
2478 return rc;
2479 }
2480
2481 static int efx_pm_freeze(struct device *dev)
2482 {
2483 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2484
2485 efx->state = STATE_FINI;
2486
2487 netif_device_detach(efx->net_dev);
2488
2489 efx_stop_all(efx);
2490 efx_fini_channels(efx);
2491
2492 return 0;
2493 }
2494
2495 static int efx_pm_thaw(struct device *dev)
2496 {
2497 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2498
2499 efx->state = STATE_INIT;
2500
2501 efx_init_channels(efx);
2502
2503 mutex_lock(&efx->mac_lock);
2504 efx->phy_op->reconfigure(efx);
2505 mutex_unlock(&efx->mac_lock);
2506
2507 efx_start_all(efx);
2508
2509 netif_device_attach(efx->net_dev);
2510
2511 efx->state = STATE_RUNNING;
2512
2513 efx->type->resume_wol(efx);
2514
2515 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2516 queue_work(reset_workqueue, &efx->reset_work);
2517
2518 return 0;
2519 }
2520
2521 static int efx_pm_poweroff(struct device *dev)
2522 {
2523 struct pci_dev *pci_dev = to_pci_dev(dev);
2524 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2525
2526 efx->type->fini(efx);
2527
2528 efx->reset_pending = RESET_TYPE_NONE;
2529
2530 pci_save_state(pci_dev);
2531 return pci_set_power_state(pci_dev, PCI_D3hot);
2532 }
2533
2534 /* Used for both resume and restore */
2535 static int efx_pm_resume(struct device *dev)
2536 {
2537 struct pci_dev *pci_dev = to_pci_dev(dev);
2538 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2539 int rc;
2540
2541 rc = pci_set_power_state(pci_dev, PCI_D0);
2542 if (rc)
2543 return rc;
2544 pci_restore_state(pci_dev);
2545 rc = pci_enable_device(pci_dev);
2546 if (rc)
2547 return rc;
2548 pci_set_master(efx->pci_dev);
2549 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2550 if (rc)
2551 return rc;
2552 rc = efx->type->init(efx);
2553 if (rc)
2554 return rc;
2555 efx_pm_thaw(dev);
2556 return 0;
2557 }
2558
2559 static int efx_pm_suspend(struct device *dev)
2560 {
2561 int rc;
2562
2563 efx_pm_freeze(dev);
2564 rc = efx_pm_poweroff(dev);
2565 if (rc)
2566 efx_pm_resume(dev);
2567 return rc;
2568 }
2569
2570 static struct dev_pm_ops efx_pm_ops = {
2571 .suspend = efx_pm_suspend,
2572 .resume = efx_pm_resume,
2573 .freeze = efx_pm_freeze,
2574 .thaw = efx_pm_thaw,
2575 .poweroff = efx_pm_poweroff,
2576 .restore = efx_pm_resume,
2577 };
2578
2579 static struct pci_driver efx_pci_driver = {
2580 .name = KBUILD_MODNAME,
2581 .id_table = efx_pci_table,
2582 .probe = efx_pci_probe,
2583 .remove = efx_pci_remove,
2584 .driver.pm = &efx_pm_ops,
2585 };
2586
2587 /**************************************************************************
2588 *
2589 * Kernel module interface
2590 *
2591 *************************************************************************/
2592
2593 module_param(interrupt_mode, uint, 0444);
2594 MODULE_PARM_DESC(interrupt_mode,
2595 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2596
2597 static int __init efx_init_module(void)
2598 {
2599 int rc;
2600
2601 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2602
2603 rc = register_netdevice_notifier(&efx_netdev_notifier);
2604 if (rc)
2605 goto err_notifier;
2606
2607 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2608 if (!reset_workqueue) {
2609 rc = -ENOMEM;
2610 goto err_reset;
2611 }
2612
2613 rc = pci_register_driver(&efx_pci_driver);
2614 if (rc < 0)
2615 goto err_pci;
2616
2617 return 0;
2618
2619 err_pci:
2620 destroy_workqueue(reset_workqueue);
2621 err_reset:
2622 unregister_netdevice_notifier(&efx_netdev_notifier);
2623 err_notifier:
2624 return rc;
2625 }
2626
2627 static void __exit efx_exit_module(void)
2628 {
2629 printk(KERN_INFO "Solarflare NET driver unloading\n");
2630
2631 pci_unregister_driver(&efx_pci_driver);
2632 destroy_workqueue(reset_workqueue);
2633 unregister_netdevice_notifier(&efx_netdev_notifier);
2634
2635 }
2636
2637 module_init(efx_init_module);
2638 module_exit(efx_exit_module);
2639
2640 MODULE_AUTHOR("Solarflare Communications and "
2641 "Michael Brown <mbrown@fensystems.co.uk>");
2642 MODULE_DESCRIPTION("Solarflare Communications network driver");
2643 MODULE_LICENSE("GPL");
2644 MODULE_DEVICE_TABLE(pci, efx_pci_table);